arm64: dts: add atom & Beast project [1/1]

PD#170502: add atom & Beast project

Change-Id: I50da79dbb660372528c5abcdf5da4bb13773bf6c
Signed-off-by: Xindong Xu <xindong.xu@amlogic.com>

19 files changed, 6337 insertions, 4 deletions

diff --git a/Documentation/devicetree/bindings/sound/cs42528.txt b/Documentation/devicetree/bindings/sound/cs42528.txt
new file mode 100644
index 0000000..80ed12d
--- a/dev/null
+++ b/Documentation/devicetree/bindings/sound/cs42528.txt
@@ -0,0 +1,21 @@
+CS42518/CS42528 audio CODEC
+
+Required properties:
+
+  - compatible : must contain one of "cirrus,cs42518" and "cirrus,cs42528"
+
+  - reg : the I2C address of the device for I2C
+
+  - VA-supply, VD-supply, VLS-supply, VLC-supply: power supplies for the device,
+    as covered in Documentation/devicetree/bindings/regulator/regulator.txt
+
+Example:
+
+codec: cs42528@4C {
+	compatible = "cirrus,cs42528";
+	#sound-dai-cells = <0>;
+	codec_name = "cs425x8";
+	reg = <0x1C>;
+	reset_pin = <&gpio GPIOZ_17 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
diff --git a/Documentation/devicetree/bindings/spi/spidev.txt b/Documentation/devicetree/bindings/spi/spidev.txt
new file mode 100644
index 0000000..ce3fba91
--- a/dev/null
+++ b/Documentation/devicetree/bindings/spi/spidev.txt
@@ -0,0 +1,6 @@
+spidev {
+    compatible = "rohm,dh2228fv";
+    status = "okay";
+    reg = <0>;
+    spi-max-frequency = <3340000>;
+};
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index d0526e0..012e88b 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -314,3 +314,4 @@ zarlink	Zarlink Semiconductor
 zii	Zodiac Inflight Innovations
 zte	ZTE Corp.
 zyxel	ZyXEL Communications Corp.
+rohm
diff --git a/MAINTAINERS b/MAINTAINERS
index 3a2e6b6..180dcbf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14558,3 +14558,23 @@ F: arch/arm64/boot/dts/amlogic/partition_tv_4G.dtsi
 AMLOGIC AVIN DETECT DRIVER
 M:	Xingyu Chen <xingyu.chen@amlogic.com>
 F:	drivers/amlogic/input/avin_detect/*
+
+AMLOGIC DTS
+M:	Xindong Xu <xindong.xu@amlogic.com>
+F:	arch/arm64/boot/dts/amlogic/atom.dts
+F:	arch/arm64/boot/dts/amlogic/gxl_sei210_1g.dts
+F:	arch/arm64/boot/dts/amlogic/gxl_sei210_2g.dts
+F:	arch/arm64/boot/dts/amlogic/mesongxl_sei210.dtsi
+F:	arch/arm64/boot/dts/amlogic/partition_mbox_normal_P_32_atom.dtsi
+F:	arch/arm64/boot/dts/amlogic/partition_mbox_normal_P_32_sei.dtsi
+F:	arch/arm64/boot/dts/amlogic/partition_mbox_normal_sei32bit.dtsi
+
+AMLOGIC ADD CS42528 CODEC DRIVER
+M: Ivan Nie <ivan.nie@amlogic.com>
+F: Documentation/devicetree/bindings/sound/cs42528.txt
+F: sound/soc/codecs/amlogic/cs42528.c
+F: sound/soc/codecs/amlogic/cs42528.h
+
+AMLOGIC SPIDEV
+M:    Ivan Nie <Ivan.nie@amlogic.com>
+F:    Documentation/devicetree/bindings/spi/spidev.txt
diff --git a/arch/arm64/boot/dts/amlogic/atom.dts b/arch/arm64/boot/dts/amlogic/atom.dts
new file mode 100644
index 0000000..2aef683
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/atom.dts
@@ -0,0 +1,1504 @@
+/*
+ * arch/arm64/boot/dts/amlogic/atom.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/meson-txlx-gpio.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "mesontxlx.dtsi"
+#include "partition_mbox_normal.dtsi"
+
+/ {
+	model = "Amlogic";
+	amlogic-dt-id = "atom";
+	compatible = "amlogic, txlx";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart_AO;
+		serial1 = &uart_A;
+		serial2 = &uart_B;
+		serial3 = &uart_C;
+		serial4 = &uart_AO_B;
+	};
+
+	ion_dev {
+		compatible = "amlogic, ion_dev";
+		memory-region = <&ion_reserved>;
+	};
+
+	memory@00000000 {
+		device_type = "memory";
+		linux,usable-memory = <0x0 0x100000 0x0 0x7ff00000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		/* global autoconfigured region for contiguous allocations */
+		ramoops@0x07400000 {
+			compatible = "ramoops";
+			reg = <0x0 0x07400000 0x0 0x00100000>;
+			record-size = <0x8000>;
+			console-size = <0x8000>;
+			ftrace-size = <0x0>;
+			pmsg-size = <0x8000>;
+		};
+		secmon_reserved:linux,secmon {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x400000>;
+			alignment = <0x0 0x400000>;
+			alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
+		};
+
+		//secos_reserved:linux,secos {
+		//	status = "disabled";
+		//	compatible = "amlogic, aml_secos_memory";
+		//	reg = <0x0 0x05300000 0x0 0x2000000>;
+		//	no-map;
+		//};
+
+
+
+		logo_reserved:linux,meson-fb {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x800000>;
+			alignment = <0x0 0x400000>;
+			alloc-ranges = <0x0 0x7f800000 0x0 0x800000>;
+		};
+
+		//carveout_reserved:linux,carveout-reserve {
+		//	compatible = "amlogic, idev-mem";
+		//	size = <0x0 0x1000>;
+		//};
+
+		ion_reserved:linux,ion-dev {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x7C00000>;
+			alignment = <0x0 0x400000>;
+		};
+
+		/*di CMA pool */
+		di_cma_reserved:linux,di_cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			/* buffer_size = 3621952(yuv422 8bit)
+			 *  | 4736064(yuv422 10bit)
+			 *  | 4179008(yuv422 10bit full pack mode)
+			 * 10x3621952=34.6M(0x23) support 8bit
+			 * 10x4736064=45.2M(0x2e) support 12bit
+			 * 10x4179008=40M(0x28) support 10bit
+			 */
+			size = <0x0 0x02800000>;
+			alignment = <0x0 0x400000>;
+		};
+
+		/* POST PROCESS MANAGER */
+		ppmgr_reserved:linux,ppmgr {
+			compatible = "amlogic, ppmgr_memory";
+			size = <0x0 0x0>;
+		};
+
+		codec_mm_cma:linux,codec_mm_cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			/* ion_codec_mm max can alloc size 80M*/
+			size = <0x0 0x13400000>;
+			alignment = <0x0 0x400000>;
+			linux,contiguous-region;
+		};
+
+		picdec_cma_reserved:linux,picdec {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x0>;
+			alignment = <0x0 0x0>;
+			linux,contiguous-region;
+		};
+
+		/* codec shared reserved */
+		codec_mm_reserved:linux,codec_mm_reserved {
+			compatible = "amlogic, codec-mm-reserved";
+			size = <0x0 0x0>;
+			alignment = <0x0 0x100000>;
+			//no-map;
+		};
+
+		demod_cma_reserved:linux,demod_cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			/* 5M */
+			size = <0x0 0x0800000>;
+			alignment = <0x0 0x400000>;
+		};
+
+		/*  vdin1 CMA pool */
+		vdin1_cma_reserved:linux,vdin1_cma {
+			compatible = "shared-dma-pool";
+			linux,phandle = <5>;
+			reusable;
+			/* 1920x1080x2x4  =16+4 M */
+			size = <0x0 0x01400000>;
+			alignment = <0x0 0x400000>;
+		};
+
+		/*vbi reserved mem*/
+		vbi_reserved:linux,vbi {
+			compatible = "amlogic, vbi-mem";
+			size = <0x0 0x100000>;
+		};
+	};
+
+	/* for external keypad */
+	adc_keypad {
+		compatible = "amlogic, adc_keypad";
+		status = "okay";
+		key_name = "vol+","vol-","woofer_pairing";
+		key_num = <3>;
+		io-channels = <&saradc SARADC_CH1>,
+					<&saradc SARADC_CH2>;
+		io-channel-names = "key-chan-1", "key-chan-2";
+		key_chan = <SARADC_CH1 SARADC_CH1 SARADC_CH2>;
+		key_code = <115 114 600>;
+		key_val = <0 180 0>; //val=voltage/1800mV*1023
+		key_tolerance = <40 40 40>;
+	};
+
+	gpio_keypad{
+	    compatible = "amlogic, gpio_keypad";
+	    status = "okay";
+	    scan_period = <20>;
+	    key_num = <3>;
+	    key_name = "source", "bt_paring", "mute";
+	    key_code = <466 218 248>;
+	    key_pin = <&gpio GPIODV_0 GPIO_ACTIVE_LOW
+			&gpio GPIODV_1 GPIO_ACTIVE_LOW
+			&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
+	    interrupts = <0 70 1
+				0 71 2>;
+	    interrupt-names = "irq_keyup", "irq_keydown";
+	};
+
+	gpioleds {
+		compatible = "gpio-leds";
+		status = "okay";
+
+		bluetooth {
+			label = "bluetooth";
+			gpios = <&gpio GPIODV_6 GPIO_ACTIVE_HIGH>;
+			default-state = "off"; /* keep/on/off */
+			linux,default-trigger = "none";
+		};
+
+		rf_white {
+			label = "rf_white";
+			gpios = <&gpio GPIOW_11 (GPIO_OPEN_DRAIN |
+					GPIO_ACTIVE_HIGH)>;
+			default-state = "off"; /* keep/on/off */
+			linux,default-trigger = "none";
+		};
+
+		rf_amber {
+			label = "rf_amber";
+			gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
+			default-state = "off"; /* keep/on/off */
+			linux,default-trigger = "none";
+		};
+
+	};
+
+	pwmleds {
+		compatible = "pwm-leds";
+		status = "disabled";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwmleds_pins>;
+
+		sys {
+			active-low;
+			label = "sysled";
+			max-brightness = <255>;
+			pwms = <&pwm_AO_ab 0 50000 0>;
+		};
+	};
+
+	ethmac: ethernet@0xff3f0000 {
+		compatible = "amlogic, gxbb-eth-dwmac";
+		status = "okay";
+		reg = <0x0 0xff3f0000 0x0 0x10000
+			0x0 0xff634540 0x0 0x8
+			0x0 0xff634558 0x0 0xc
+			0x0 0xffd01084 0x0 0x4>;
+		interrupts = <0 8 1
+				0 9 1>;
+
+		phy-mode= "rmii";
+		mc_val_internal_phy = <0x1804>;
+		mc_val_external_phy = <0x1621>;
+		interrupt-names = "macirq",
+				"phyirq";
+		clocks = <&clkc CLKID_ETH_CORE>;
+		clock-names = "ethclk81";
+		internal_phy = <1>;
+	};
+
+	vout {
+		compatible = "amlogic, vout";
+		dev_name = "vout";
+		status = "okay";
+		fr_auto_policy = <0>;
+	};
+
+	meson-fb {
+		compatible = "amlogic, meson-txlx";
+		memory-region = <&logo_reserved>;
+		dev_name = "meson-fb";
+		status = "okay";
+		interrupts = <0 3 1
+			0 89 1>;
+		interrupt-names = "viu-vsync", "rdma";
+		mem_size = <0x00800000 0x01800000 0x00100000>;
+		/* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+		display_mode_default = "1080p60hz";
+		/* 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+		scale_mode = <1>;
+		/* 1920*1080*4*3 = 0x17BB000 */
+		display_size_default = <1920 1080 1920 3240 32>;
+		pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+		logo_addr = "0x7f800000";
+	};
+
+	ge2d {
+		compatible = "amlogic, ge2d-txlx";
+		dev_name = "ge2d";
+		status = "okay";
+		interrupts = <0 150 1>;
+		interrupt-names = "ge2d";
+		clocks = <&clkc CLKID_VAPB_MUX>,
+			<&clkc CLKID_G2D>,
+			<&clkc CLKID_GE2D_GATE>;
+		clock-names = "clk_vapb_0",
+			"clk_ge2d",
+			"clk_ge2d_gate";
+		reg = <0x0 0xff940000 0x0 0x10000>;
+	};
+
+	codec_io {
+		compatible = "amlogic, codec_io";
+		status = "okay";
+		#address-cells=<2>;
+		#size-cells=<2>;
+		ranges;
+		io_cbus_base{
+			reg = <0x0 0xffd00000 0x0 0x100000>;
+		};
+		io_dos_base{
+			reg = <0x0 0xff620000 0x0 0x10000>;
+		};
+		io_hiubus_base{
+			reg = <0x0 0xff63c000 0x0 0x2000>;
+		};
+		io_aobus_base{
+			reg = <0x0 0xff800000 0x0 0x10000>;
+		};
+		io_vcbus_base{
+			reg = <0x0 0xff900000 0x0 0x40000>;
+		};
+		io_dmc_base{
+			reg = <0x0 0xff638000 0x0 0x2000>;
+		};
+	};
+
+	codec_mm {
+		compatible = "amlogic, codec, mm";
+		memory-region = <&codec_mm_cma &codec_mm_reserved>;
+		dev_name = "codec_mm";
+		status = "okay";
+	};
+
+	mesonstream {
+		compatible = "amlogic, codec, streambuf";
+		dev_name = "mesonstream";
+		status = "okay";
+		clocks = <&clkc CLKID_DOS_PARSER
+			&clkc CLKID_DEMUX
+			&clkc CLKID_DOS
+			&clkc CLKID_VDEC_MUX
+			&clkc CLKID_HCODEC_MUX
+			&clkc CLKID_HEVC_MUX>;
+		clock-names = "parser_top",
+			"demux",
+			"vdec",
+			"clk_vdec_mux",
+			"clk_hcodec_mux",
+			"clk_hevc_mux";
+	};
+
+	vdec {
+		compatible = "amlogic, vdec";
+		dev_name = "vdec.0";
+		status = "okay";
+		interrupts = <0 3 1
+			0 23 1
+			0 32 1
+			0 43 1
+			0 44 1
+			0 45 1>;
+		interrupt-names = "vsync",
+			"demux",
+			"parser",
+			"mailbox_0",
+			"mailbox_1",
+			"mailbox_2";
+	};
+
+	meson-amvideom {
+		compatible = "amlogic, amvideom";
+		dev_name = "amvideom";
+		status = "okay";
+		interrupts = <0 3 1>;
+		interrupt-names = "vsync";
+	};
+
+
+
+	amvideocap {
+		compatible = "amlogic, amvideocap";
+		dev_name = "amvideocap.0";
+		status = "disabled";
+		max_size = <8>;//8M
+	};
+
+	picdec {
+		compatible = "amlogic, picdec";
+		memory-region = <&picdec_cma_reserved>;
+		dev_name = "picdec";
+		status = "disabled";
+	};
+
+	ppmgr {
+		compatible = "amlogic, ppmgr";
+		memory-region = <&ppmgr_reserved>;
+		dev_name = "ppmgr";
+		status = "okay";
+	};
+
+	deinterlace {
+		compatible = "amlogic, deinterlace";
+		status = "okay";
+		/* 0:use reserved; 1:use cma; 2:use cma as reserved */
+		flag_cma = <1>;
+		//memory-region = <&di_reserved>;
+		memory-region = <&di_cma_reserved>;
+		interrupts = <0 46 1
+				0 6 1>;
+		interrupt-names = "de_irq";
+		clocks = <&clkc CLKID_VPU_MUX>,
+			<&clkc CLKID_FCLK_DIV4>,
+			<&clkc CLKID_VPU_CLKB_TMP_COMP>,
+			<&clkc CLKID_VPU_CLKB_COMP>;
+		clock-names = "vpu_mux",
+			"fclk_div4",
+			"vpu_clkb_tmp_composite",
+			"vpu_clkb_composite";
+		clock-range = <250 500>;
+		/* buffer-size = <3621952>;(yuv422 8bit) */
+		buffer-size = <4179008>;/*yuv422 fullpack*/
+		/* reserve-iomap = "true"; */
+		/* if enable nr10bit, set nr10bit-support to 1 */
+		nr10bit-support = <1>;
+	};
+	ionvideo {
+		compatible = "amlogic, ionvideo";
+		dev_name = "ionvideo";
+		status = "okay";
+	};
+
+	amlvideo {
+		compatible = "amlogic, amlvideo";
+		dev_name = "amlvideo";
+		status = "okay";
+	};
+
+	amlvideo2_0 {
+		compatible = "amlogic, amlvideo2";
+		dev_name = "amlvideo2";
+		status = "okay";
+		amlvideo2_id = <0>;
+		cma_mode = <1>;
+	};
+
+	amlvideo2_1 {
+		compatible = "amlogic, amlvideo2";
+		dev_name = "amlvideo2";
+		status = "okay";
+		amlvideo2_id = <1>;
+		cma_mode = <1>;
+	};
+
+	hdmirx {
+		compatible = "amlogic, hdmirx_txlx";
+		#address-cells=<1>;
+		#size-cells=<1>;
+		dev_name = "hdmirx";
+		status = "okay";
+		pinctrl-names = "hdmirx_pins";
+		pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux &hdmirx_d_mux>;
+		repeat = <0>;
+		interrupts = <0 56 1>;
+		clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+			   <&clkc CLKID_HDMIRX_CFG_COMP>,
+			   <&clkc CLKID_HDMIRX_ACR_COMP>,
+			   <&clkc CLKID_HDMIRX_AUDMEAS_COMP>,
+			   <&xtal>,
+			   <&clkc CLKID_FCLK_DIV5>,
+			   <&clkc CLKID_FCLK_DIV7>,
+			   <&clkc CLKID_HDCP22_SKP_COMP>,
+			   <&clkc CLKID_HDCP22_ESM_COMP>;
+		//	   <&clkc CLK_AUD_PLL2FS>,
+		//	   <&clkc CLK_AUD_PLL4FS>,
+		//	   <&clkc CLK_AUD_OUT>;
+		clock-names = "hdmirx_modet_clk",
+			"hdmirx_cfg_clk",
+				"hdmirx_acr_ref_clk",
+				"hdmirx_audmeas_clk",
+				"xtal",
+				"fclk_div5",
+				"fclk_div7",
+				"hdcp_rx22_skp",
+				"hdcp_rx22_esm";
+		//		"hdmirx_aud_pll2fs",
+		//		"hdmirx_aud_pll4f",
+		//		"clk_aud_out";
+		hdmirx_id = <0>;
+		en_4k_2_2k = <0>;
+		reg = <0x0 0xffd26000 0x0 0xa00000
+			0x0 0xff63C000 0x0 0x2000
+			0x0 0xffe0d000 0x0 0x2000
+			0x0 0xff63e000 0x0 0x2000
+			0x0 0x0 0x0 0x0
+			0x0 0xff634400 0x0 0x2000
+			0x0 0xff646000 0x0 0x2000>;
+	};
+
+	vdin0 {
+		compatible = "amlogic, vdin";
+		/*memory-region = <&vdin0_cma_reserved>;*/
+		dev_name = "vdin0";
+		status = "okay";
+		reserve-iomap = "true";
+		flag_cma = <1>;/*1:share with codec_mm;2:cma alone*/
+		/* MByte, if 10bit disable: 64M(YUV422),
+		 * if 10bit enable: 64*1.5 = 96M(YUV422)
+		 * if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+		 * if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 190M
+		 * if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+		 * if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+		 * if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+		 */
+		cma_size = <190>;
+		interrupts = <0 83 1>;
+		rdma-irq = <2>;
+		clocks = <&clkc CLKID_FCLK_DIV5>,
+			<&clkc CLKID_VDIN_MEAS_COMP>;
+		clock-names = "fclk_div5", "cts_vdin_meas_clk";
+		vdin_id = <0>;
+		/* vdin write mem color depth support:
+		 * bit0:support 8bit
+		 * bit1:support 9bit
+		 * bit2:support 10bit
+		 * bit3:support 12bit
+		 * bit4:support yuv422 10bit full pack mode (from txl new add)
+		 */
+		tv_bit_mode = <21>;
+	};
+
+	vdin1 {
+		compatible = "amlogic, vdin";
+		memory-region = <&vdin1_cma_reserved>;
+		dev_name = "vdin1";
+		status = "okay";
+		reserve-iomap = "true";
+		flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+		interrupts = <0 85 1>;
+		rdma-irq = <4>;
+		clocks = <&clkc CLKID_FCLK_DIV5>,
+			<&clkc CLKID_VDIN_MEAS_COMP>;
+		clock-names = "fclk_div5", "cts_vdin_meas_clk";
+		vdin_id = <1>;
+		/* vdin write mem color depth support:
+		 * bit0:support 8bit
+		 * bit1:support 9bit
+		 * bit2:support 10bit
+		 * bit3:support 12bit
+		 */
+		tv_bit_mode = <1>;
+	};
+
+	tvafe {
+		compatible = "amlogic, tvafe-txlx";
+		/*memory-region = <&tvafe_cma_reserved>;*/
+		dev_name = "tvafe";
+		status = "okay";
+		flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+		cma_size = <5>;/*MByte*/
+		reg = <0x0 0xff642000 0x0 0x2000>;/*tvafe reg base*/
+		reserve-iomap = "true";
+		tvafe_id = <0>;
+		//pinctrl-names = "default";
+		/*!!particular sequence, no more and no less!!!*/
+		tvafe_pin_mux = <
+				3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+				1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+				2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+				4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+		>;
+		clocks = <&clkc CLKID_DAC_CLK>;
+		clock-names = "vdac_clk_gate";
+	};
+
+	vbi {
+		compatible = "amlogic, vbi";
+		memory-region = <&vbi_reserved>;
+		dev_name = "vbi";
+		status = "okay";
+		interrupts = <0 83 1>;
+		reserve-iomap = "true";
+	};
+
+	tvafe_avin_detect {
+		compatible = "amlogic, tvafe_avin_detect";
+		dev_name = "tvafe_avin_detect";
+		status = "okay";
+		device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+		interrupts = <0 12 1>,
+				<0 13 1>;
+	};
+
+	amlvecm {
+		compatible = "amlogic, vecm";
+		dev_name = "aml_vecm";
+		status = "okay";
+		gamma_en = <0>;/*1:enabel ;0:disable*/
+		wb_en = <0>;/*1:enabel ;0:disable*/
+		cm_en = <0>;/*1:enabel ;0:disable*/
+		wb_sel = <0>;/*1:mtx ;0:gainoff*/
+	};
+	amdolby_vision {
+		compatible = "amlogic, dolby_vision_txlx";
+		dev_name = "aml_amdolby_vision_driver";
+		status = "okay";
+		tv_mode = <0>;/*1:enabel ;0:disable*/
+	};
+	amvenc_avc {
+		compatible = "amlogic, amvenc_avc";
+		//memory-region = <&amvenc_avc_reserved>;
+		//memory-region = <&avc_cma_reserved>;
+		dev_name = "amvenc_avc";
+		status = "okay";
+		interrupts = <0 45 1>;
+		interrupt-names = "mailbox_2";
+	};
+
+	aml_atv_demod {
+		compatible = "amlogic, aml_atv_demod";
+		dev_name = "aml_atv_demod";
+		status = "disabled";
+		////pinctrl-names="atvdemod_agc";
+		////pinctrl-0=<&atvdemod_agc>;
+		reg = <0x0 0xff640000 0x0 0x2000
+			   0x0 0xff648000 0x0 0x2000>;
+		/* default:0x88188832;r840 on haier:0x48188832 */
+		reg_23cf = <0x88188832>;
+	};
+
+	bt-dev {
+		compatible = "amlogic, bt-dev";
+		dev_name = "bt-dev";
+		status = "okay";
+		gpio_reset = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
+		//gpio_en = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+	};
+
+	rtc {
+		compatible = "amlogic, aml_vrtc";
+		alarm_reg_addr = <0xff8000a8>;
+		timer_e_addr = <0xffd0f188>;
+		init_date = "2015/01/01";
+		status = "okay";
+	};
+
+	wifi {
+		compatible = "amlogic, aml_wifi";
+		dev_name = "aml_wifi";
+		status = "okay";
+		interrupt_pin = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
+		interrupts = <0 68 4>;
+		irq_trigger_type = "GPIO_IRQ_HIGH";
+		dhd_static_buf;
+		power_on_pin = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_32k_pins>;
+		pwm_config = <&wifi_pwm_conf>;
+	};
+
+	wifi_pwm_conf: wifi_pwm_conf {
+		pwm_channel1_conf {
+			pwms = <&pwm_cd MESON_PWM_1 30040 0>;
+			duty-cycle = <15020>;
+			times = <10>;
+		};
+		pwm_channel2_conf {
+			pwms = <&pwm_cd MESON_PWM_3 30030 0>;
+			duty-cycle = <15015>;
+			times = <12>;
+		};
+	};
+
+	sd_emmc_c: emmc@ffe07000 {
+		status = "okay";
+		compatible = "amlogic, meson-mmc-txlx";
+		reg = <0x0 0xffe07000 0x0 0x2000>;
+		interrupts = <0 218 1>;
+		pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+		pinctrl-0 = <&emmc_clk_cmd_pins>;
+		pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+		clocks = <&clkc CLKID_SD_EMMC_C>,
+			   <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+			   <&clkc CLKID_FCLK_DIV2>,
+			   <&clkc CLKID_FCLK_DIV5>,
+			   <&xtal>;
+		clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+		bus-width = <8>;
+		cap-sd-highspeed;
+		cap-mmc-highspeed;
+		mmc-ddr-1_8v;
+		mmc-hs200-1_8v;
+
+		max-frequency = <200000000>;
+		non-removable;
+		disable-wp;
+		emmc {
+			status = "disabled";
+			pinname = "emmc";
+			ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+			caps = "MMC_CAP_8_BIT_DATA",
+				 "MMC_CAP_MMC_HIGHSPEED",
+				 "MMC_CAP_SD_HIGHSPEED",
+				 "MMC_CAP_NONREMOVABLE",
+				 "MMC_CAP_1_8V_DDR",
+				 "MMC_CAP_HW_RESET",
+				 "MMC_CAP_ERASE",
+				 "MMC_CAP_CMD23";
+			caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+			f_min = <400000>;
+			f_max = <200000000>;
+			max_req_size = <0x20000>; /**128KB*/
+			gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+			hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+			card_type = <1>;
+			/* 1:mmc card(include eMMC),
+			 * 2:sd card(include tSD)
+			 */
+		};
+	};
+
+	sd_emmc_b: sd@ffe05000 {
+		status = "okay";
+		compatible = "amlogic, meson-mmc-txlx";
+		reg = <0x0 0xffe05000 0x0 0x2000>;
+		interrupts = <0 217 4>;
+		pinctrl-names = "sd_clk_cmd_pins", "sd_all_pins";
+		pinctrl-0 = <&sd_clk_cmd_pins>;
+		pinctrl-1 = <&sd_all_pins>;
+		clocks = <&clkc CLKID_SD_EMMC_B>,
+			   <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+			   <&clkc CLKID_FCLK_DIV2>,
+			   <&clkc CLKID_FCLK_DIV5>,
+			   <&xtal>;
+		clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+		bus-width = <4>;
+		cap-sd-highspeed;
+		cap-mmc-highspeed;
+		max-frequency = <100000000>;
+		non-removable;
+		disable-wp;
+		sd {
+			status = "disabled";
+			pinname = "sd";
+			ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+			caps = "MMC_CAP_4_BIT_DATA",
+				 "MMC_CAP_MMC_HIGHSPEED",
+				 "MMC_CAP_SD_HIGHSPEED",
+				 "MMC_CAP_NONREMOVABLE",
+				 "MMC_CAP_UHS_SDR12",
+				 "MMC_CAP_UHS_SDR25",
+				 "MMC_CAP_UHS_SDR50",
+				 "MMC_CAP_UHS_SDR104",
+				 "MMC_PM_KEEP_POWER",
+				 "MMC_CAP_SDIO_IRQ";
+			f_min = <400000>;
+			f_max = <200000000>;
+			max_req_size = <0x20000>; /**128KB*/
+			card_type = <3>;
+			/* 3:sdio device(ie:sdio-wifi),
+			 * 4:SD combo (IO+mem) card
+			 * 5:NON sdio device(means sd/mmc card)
+			 */
+		};
+	};
+
+	unifykey {
+		compatible = "amlogic, unifykey";
+		status = "okay";
+
+		unifykey-num = <18>;
+		unifykey-index-0 = <&keysn_0>;
+		unifykey-index-1 = <&keysn_1>;
+		unifykey-index-2 = <&keysn_2>;
+		unifykey-index-3 = <&keysn_3>;
+		unifykey-index-4 = <&keysn_4>;
+		unifykey-index-5 = <&keysn_5>;
+		unifykey-index-6 = <&keysn_6>;
+		unifykey-index-7 = <&keysn_7>;
+		unifykey-index-8 = <&keysn_8>;
+		unifykey-index-9 = <&keysn_9>;
+		unifykey-index-10= <&keysn_10>;
+		unifykey-index-11 = <&keysn_11>;
+		unifykey-index-12 = <&keysn_12>;
+		unifykey-index-13 = <&keysn_13>;
+		unifykey-index-14 = <&keysn_14>;
+		unifykey-index-15 = <&keysn_15>;
+		unifykey-index-16 = <&keysn_16>;
+		unifykey-index-17 = <&keysn_17>;
+
+		keysn_0: key_0{
+			key-name = "usid";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_1:key_1{
+			key-name = "mac";
+			key-device  = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_2:key_2{
+			key-name = "hdcp";
+			key-device = "secure";
+			key-type  = "sha1";
+			key-permit = "read","write","del";
+		};
+		keysn_3:key_3{
+			key-name = "secure_boot_set";
+			key-device = "efuse";
+			key-permit = "write";
+		};
+		keysn_4:key_4{
+			key-name = "mac_bt";
+			key-device = "normal";
+			key-permit = "read","write","del";
+			key-type  = "mac";
+		};
+		keysn_5:key_5{
+			key-name = "mac_wifi";
+			key-device = "normal";
+			key-permit = "read","write","del";
+			key-type  = "mac";
+		};
+		keysn_6:key_6{
+			key-name = "hdcp2_tx";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_7:key_7{
+			key-name = "hdcp2_rx";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_8:key_8{
+			key-name = "widevinekeybox";
+			key-device = "secure";
+			key-type = "sha1";
+			key-permit = "read","write","del";
+		};
+		keysn_9:key_9{
+			key-name = "deviceid";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_10:key_10{
+			key-name = "hdcp22_fw_private";
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_11:key_11{
+			key-name = "hdcp22_rx_private";
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_12:key_12{
+			key-name = "hdcp22_rx_fw";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_13:key_13{
+			key-name = "hdcp14_rx";
+			key-device = "normal";
+			key-type  = "sha1";
+			key-permit = "read","write","del";
+		};
+		keysn_14:key_14{
+			key-name = "prpubkeybox";// PlayReady
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_15:key_15{
+			key-name = "prprivkeybox";// PlayReady
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_16: key_16{
+			key-name = "region_code";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_17:key_17{
+			key-name = "attestationkeybox";// attestation key
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+
+	}; /* End unifykey */
+
+	vdac {
+		compatible = "amlogic, vdac";
+		dev_name = "vdac";
+		status = "okay";
+	};
+
+	cvbsout {
+		compatible = "amlogic, cvbsout-txlx";
+		dev_name = "cvbsout";
+		status = "okay";
+		clocks = <&clkc CLKID_VCLK2_ENCI
+			&clkc CLKID_VCLK2_VENCI0
+			&clkc CLKID_VCLK2_VENCI1
+			&clkc CLKID_DAC_CLK>;
+		clock-names = "venci_top_gate",
+			"venci_0_gate",
+			"venci_1_gate",
+			"vdac_clk_gate";
+
+		/* performance: reg_address, reg_value */
+		performance = <0x1b56  0x343
+			0x1b05  0xf4
+			0x1c59  0xfc48
+			0x1b12  0x8c00
+			0xffff  0x0>; /* ending flag */
+	};
+
+	amhdmitx: amhdmitx {
+		compatible = "amlogic, amhdmitx";
+		dev_name = "amhdmitx";
+		status = "okay";
+		pinctrl-names="default", "hdmitx_i2c";
+		pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+		pinctrl-1=<&hdmitx_hpd_gpio &i2c2_h_pins>;
+		clocks = <&clkc CLKID_HDCP22_SKP_COMP>,
+			     <&clkc CLKID_HDCP22_ESM_COMP>;
+		clock-names = "hdcp22_tx_skp",
+				      "hdcp22_tx_esm";
+		/* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+		interrupts = <0 57 1>;
+		interrupt-names = "hdmitx_hpd";
+		/* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+		 * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+		 */
+		ic_type = <6>;
+		//gpio_i2c_en = <0>;
+		//repeater_tx = <0x1>;
+		//#address-cells = <2>;
+		//#size-cells = <2>;
+		//ranges;
+	};
+
+	i2c_gpio: i2c_gpio {
+		compatible = "i2c-gpio";
+		dev_name = "i2c-gpio";
+		status = "disabled";
+		i2c-gpio,delay-us = <10>; /* 50 kHz */
+		gpios = <&gpio GPIOH_2 0
+			&gpio GPIOH_3 0>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		i2c-gpio,timeout-ms = <10>;
+		i2c_gpio_edid: i2c_gpio_edid {
+			compatible = "i2c-gpio";
+			reg = <0x50 0x0 0x0 0x0>;
+		};
+	};
+
+	aocec: aocec {
+		compatible = "amlogic, aocec-txlx";
+		device_name = "aocec";
+		status = "okay";
+		vendor_name = "Amlogic"; /* Max Chars: 8     */
+		/* Refer to the following URL at:
+		 * http://standards.ieee.org/develop/regauth/oui/oui.txt
+		 */
+		vendor_id = <0x000000>;
+		product_desc = "TXLX"; /* Max Chars: 16    */
+		cec_osd_string = "AML_TV"; /* Max Chars: 14    */
+		port_num = <4>;
+		ee_cec;
+		arc_port_mask = <0x2>;
+		interrupts = <0 205 1
+					0 199 1>;
+		interrupt-names = "hdmi_aocecb","hdmi_aocec";
+		pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+		pinctrl-0=<&hdmitx_aocec>;
+		pinctrl-1=<&hdmitx_aocecb>;
+		pinctrl-2=<&hdmitx_aocecb>;
+		reg = <0x0 0xFF80023c 0x0 0x4
+		       0x0 0xFF800000 0x0 0x400>;
+	};
+
+
+	canvas {
+		compatible = "amlogic, meson, canvas";
+		dev_name = "amlogic-canvas";
+		status = "okay";
+		reg = <0x0 0xff638000 0x0 0x2000>;
+	};
+
+	rdma {
+		compatible = "amlogic, meson, rdma";
+		dev_name = "amlogic-rdma";
+		status = "okay";
+		interrupts = <0 89 1>;
+		interrupt-names = "rdma";
+	};
+
+	dwc3: dwc3@ff500000 {
+		compatible = "synopsys, dwc3";
+		status = "okay";
+		reg = <0x0 0xff500000 0x0 0x100000>;
+		interrupts = <0 30 4>;
+		usb-phy = <&usb2_phy>, <&usb3_phy>;
+		cpu-type = "gxl";
+		clock-src = "usb3.0";
+	};
+
+	usb2_phy: usb2phy@ffe09000 {
+		compatible = "amlogic, amlogic-new-usb2";
+		status = "okay";
+		portnum = <4>;
+		reg = <0x0 0xffe09000 0x0 0x80
+			0x0 0xffd01008 0x0 0x4>;
+	};
+
+	usb3_phy: usb3phy@ffe09080 {
+		compatible = "amlogic, amlogic-new-usb3";
+		status = "okay";
+		portnum = <0>;
+		reg = <0x0 0xffe09080 0x0 0x20>;
+	};
+
+	dwc2_a {
+		compatible = "amlogic, dwc2";
+		device_name = "dwc2_a";
+		reg = <0x0 0xff400000 0x0 0x40000>;
+		status = "okay";
+		interrupts = <0 31 4>;
+		pl-periph-id = <0>; /** lm name */
+		clock-src = "usb0"; /** clock src */
+		port-id = <0>;  /** ref to mach/usb.h */
+		port-type = <2>;        /** 0: otg, 1: host, 2: slave */
+		port-speed = <0>; /** 0: default, high, 1: full */
+		port-config = <0>; /** 0: default */
+		/*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+		port-dma = <0>;
+		port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+		usb-fifo = <728>;
+		cpu-type = "gxl";
+		/** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+		controller-type = <1>;
+		phy-reg = <0xffe09000>;
+		phy-reg-size = <0xa0>;
+		clocks = <&clkc CLKID_USB_GENERAL
+					&clkc CLKID_USB1_TO_DDR>;
+		clock-names = "usb_general",
+						"usb1";
+	};
+
+	/* Sound iomap */
+	aml_snd_iomap {
+		compatible = "amlogic, meson-snd-iomap";
+		status = "okay";
+		#address-cells=<2>;
+		#size-cells=<2>;
+		ranges;
+		io_audin_base {
+			reg = <0x0 0xffd03000 0x0 0x100000>;
+		};
+		io_aiu_base {
+			reg = <0x0 0xFFCFFC00 0x0 0x100000>;
+		};
+		io_eqdrc_base {
+			reg = <0x0 0xFFCFF000 0x0 0x100000>;
+		};
+		io_hiu_reset_base {
+			reg = <0x0 0xFFCFCC00 0x0 0x100000>;
+		};
+		io_isa_base {
+			reg = <0x0 0xFFD05800 0x0 0x100000>;
+		};
+	};
+
+	/* AUDIO DEVICES */
+	i2s_dai: I2S {
+		#sound-dai-cells = <0>;
+		/* config mpll whether same with audin */
+		clocks = <&clkc CLKID_MPLL3>,
+			<&clkc CLKID_AMCLK_COMP>,
+			<&clkc CLKID_AIU_GLUE>,
+			<&clkc CLKID_I2S_OUT>,
+			<&clkc CLKID_AMCLK_MEASURE>,
+			<&clkc CLKID_AIFIFO2>,
+			<&clkc CLKID_MIXER>,
+			<&clkc CLKID_MIXER_IFACE>,
+			<&clkc CLKID_ADC>,
+			<&clkc CLKID_AIU_TOP>,
+			<&clkc CLKID_AOCLK_GATE>,
+			<&clkc CLKID_I2S_SPDIF>,
+			<&clkc CLKID_DAC_CLK>;
+		clock-names = "mpll",
+			"mclk",
+			"top_glue",
+			"i2s_out",
+			"amclk_measure",
+			"aififo2",
+			"aud_mixer",
+			"mixer_reg",
+			"adc",
+			"top_level",
+			"aoclk",
+			"aud_in",
+			"vdac_clk";
+		compatible = "amlogic, aml-i2s-dai";
+	};
+
+	i2s2_dai: I2S2 {
+		#sound-dai-cells = <0>;
+		/* config mpll whether same with aiu */
+		clocks = <&clkc CLKID_MPLL2>,
+			<&clkc CLKID_AUDIN_MCLK_COMP>,
+			<&clkc CLKID_AUDIN_SCLK_COMP>,
+			<&clkc CLKID_AUDIN_LRCLK_COMP>;
+		clock-names = "audin_mpll",
+			"audin_mclk",
+			"audin_sclk",
+			"audin_lrclk";
+		compatible = "amlogic, aml-i2s2-dai";
+	};
+
+	spdif_dai: SPDIF {
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-spdif-dai";
+		clocks = <&clkc CLKID_MPLL1>,
+			<&clkc CLKID_IEC958_INT_COMP>,
+			<&clkc CLKID_AMCLK_COMP>,
+			<&clkc CLKID_IEC958_MUX>,
+			<&clkc CLKID_CLK81>,
+			<&clkc CLKID_IEC958>,
+			<&clkc CLKID_IEC958_GATE>;
+		clock-names =
+			"mpll1",
+			"i958",
+			"mclk",
+			"spdif",
+			"clk_81",
+			"iec958",
+			"iec958_amclk";
+	};
+
+	pcm_dai: PCM {
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-pcm-dai";
+		pinctrl-names = "audio_pcm";
+		/* disable pcm pin mux temporary, enable it if necessary */
+		/*pinctrl-0 = <&aml_audio_pcm>;*/
+		clocks = <&clkc CLKID_MPLL0>,
+			<&clkc CLKID_PCM_MCLK_COMP>,
+			<&clkc CLKID_PCM_SCLK_COMP>;
+		clock-names = "mpll0", "pcm_mclk", "pcm_sclk";
+		pcm_mode = <1>;	/* 0=slave mode, 1=master mode */
+	};
+
+	i2s_plat: i2s_platform {
+		compatible = "amlogic, aml-i2s";
+		interrupts = <0 29 1>;
+	};
+
+	pcm_plat: pcm_platform {
+		compatible = "amlogic, aml-pcm";
+	};
+
+	spdif_codec: spdif_codec{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-spdif-codec";
+		pinctrl-names = "audio_spdif_in";
+		pinctrl-0 = <&audio_spdif_in_pins>;
+	};
+
+	pcm_codec: pcm_codec{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, pcm2BT-codec";
+	};
+	/* end of AUDIO DEVICES */
+
+	/* AUDIO board specific */
+	dummy_codec:dummy{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml_dummy_codec";
+		status = "okay";
+	};
+
+	amlogic_codec:txlx_acodec{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, txlx_acodec";
+		reg = <0x0 0xFF632000 0x0 0x1c>;
+		status = "okay";
+	};
+
+	aml_snd_tv {
+		compatible = "amlogic, txlx-snd-tv";
+		status = "okay";
+		aml-sound-card,format = "i2s";
+		aml_sound_card,name = "AML-TVAUDIO";
+		pinctrl-names = "audio_i2s";
+		pinctrl-0 = <&aml_audio_i2s>;
+		/*avout mute gpio*/
+		mute_gpio-gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>;
+		/*switch ARC_IN & SPDIF_IN*/
+		source_switch-gpios = <&gpio GPIOZ_4 GPIO_ACTIVE_HIGH>;
+		source_switch_inv = <1>;
+		sleep_time = <100>;
+		/*analog amp mute*/
+		amp_mute_gpio-gpios = <&gpio GPIOZ_2 GPIO_ACTIVE_HIGH>;
+		/*aux_dev = <&cs42528>;*/
+		cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
+		codec_list = <&codec0 &codec1 &codec2>;
+		plat_list = <&i2s_plat &i2s_plat &i2s_plat>;
+		cpudai0: cpudai0 {
+			sound-dai = <&i2s_dai>;
+		};
+		cpudai1: cpudai1 {
+			sound-dai = <&spdif_dai>;
+		};
+		cpudai2: cpudai2 {
+			sound-dai = <&i2s2_dai>;
+		};
+		codec0: codec0 {
+			sound-dai = <&cs42528>;
+		};
+		codec1: codec1 {
+			sound-dai = <&spdif_codec>;
+		};
+		codec2: codec2 {
+			sound-dai = <&dummy_codec>;
+		};
+		Channel_Mask {
+			/*i2s has 4 pins, 8channel, mux output*/
+			Speaker_Channel_Mask = "i2s_2/3";
+			DAC0_Channel_Mask = "i2s_0/1";
+			DAC1_Channel_Mask = "i2s_0/1";
+			EQ_DRC_Channel_Mask = "i2s_0/1";
+			Spdif_samesource_Channel_Mask = "i2s_0/1";
+		};
+	};
+
+	amaudio2 {
+		compatible = "amlogic, aml_amaudio2";
+		status = "okay";
+		interrupts = <0 48 1>;
+	};
+	/* end of AUDIO board specific */
+
+	dvb {
+		compatible = "amlogic, dvb";
+		dev_name = "dvb";
+		status = "disabled";
+		/*"parallel","serial","disable"*/
+		ts2 = "parallel";
+		ts2_control = <0>;
+		ts2_invert = <0>;
+		//resets = <&clock GCLK_IDX_DEMUX
+		//		&clock GCLK_IDX_ASYNC_FIFO
+		//		&clock GCLK_IDX_AHB_ARB0
+		//		&clock GCLK_IDX_U_PARSER_TOP>;
+		//reset-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+	};
+
+	aml_sensor0: aml-sensor@0 {
+		compatible = "amlogic, aml-thermal";
+		device_name = "thermal";
+		status = "disabled";
+		#thermal-sensor-cells = <1>;
+		cooling_devices {
+			cpufreq_cool_cluster0 {
+				min_state = <1000000>;
+				dyn_coeff = <140>;
+				cluster_id = <0>;
+				node_name = "cpus";
+				device_type = "cpufreq";
+			};
+			cpucore_cool_cluster0 {
+				min_state = <1>;
+				dyn_coeff = <0>;
+				cluster_id = <0>;
+				node_name = "cpu_core_cluster0";
+				device_type = "cpucore";
+			};
+			gpufreq_cool {
+				min_state = <400>;
+				dyn_coeff = <437>;
+				cluster_id = <0>;
+				node_name = "mali";
+				device_type = "gpufreq";
+			};
+			gpucore_cool {
+				min_state = <1>;
+				dyn_coeff = <0>;
+				cluster_id = <0>;
+				node_name = "thermal_gpu_cores";
+				device_type = "gpucore";
+			};
+		};
+		cpu_cluster0:cpu_core_cluster0 {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+		gpucore:thermal_gpu_cores {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+	};
+
+	dvb {
+		compatible = "amlogic, dvb";
+		dev_name = "dvb";
+		status = "disabled";
+		/*"parallel","serial","disable"*/
+		ts2 = "parallel";
+		ts2_control = <0>;
+		ts2_invert = <0>;
+		//resets = <&clock GCLK_IDX_DEMUX
+		//		&clock GCLK_IDX_ASYNC_FIFO
+		//		&clock GCLK_IDX_AHB_ARB0
+		//		&clock GCLK_IDX_U_PARSER_TOP>;
+		//reset-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+	};
+
+	dvbfe {
+		compatible = "amlogic, dvbfe";
+		dev_name = "dvbfe";
+		status = "disabled";
+		dtv_demod0 = "AMLDEMOD";
+		fe0_dtv_demod = <0>;
+		fe0_ts = <2>;
+		fe0_dev = <0>;
+		dtv_demod0_mem = <0>;
+		dtv_demod0_spectrum = <1>;
+		dtv_demod0_cma_flag = <1>;
+		dtv_demod0_cma_mem_size = <8>;
+		memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+		tuner0 = "si2151_tuner";
+		tuner0_i2c_adap_id = <2>;
+		tuner0_i2c_addr = <0x60>;
+		//tuner0_reset_value = <0>;
+		//tuner0_reset_gpio =  "GPIOY_10" ;  /*GPIOX_8   76*/
+		fe0_tuner = <0>;
+		atv_demod0 = "aml_atv_demod";
+		fe0_atv_demod = <0>;
+	};
+
+	thermal-zones {
+		soc_thermal {
+			polling-delay = <1000>;
+			polling-delay-passive = <100>;
+			sustainable-power = <2150>;
+
+			thermal-sensors = <&aml_sensor0 3>;
+
+			trips {
+				switch_on: trip-point@0 {
+					temperature = <70000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+				control: trip-point@1 {
+					temperature = <80000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+				hot: trip-point@2 {
+					temperature = <85000>;
+					hysteresis = <5000>;
+					type = "hot";
+				};
+				critical: trip-point@3 {
+					temperature = <260000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				cpufreq_cooling_map {
+					trip = <&control>;
+					cooling-device = <&cpus 0 4>;
+					contribution = <1024>;
+				};
+				cpucore_cooling_map {
+					trip = <&control>;
+					cooling-device = <&cpu_cluster0 0 3>;
+					contribution = <1024>;
+				};
+				gpufreq_cooling_map {
+					trip = <&control>;
+					//cooling-device = <&gpu 0 4>;
+					contribution = <1024>;
+				};
+				gpucore_cooling_map {
+					trip = <&control>;
+					cooling-device = <&gpucore 0 2>;
+					contribution = <1024>;
+				};
+			};
+		};
+	};
+
+}; /* end of / */
+
+&i2c0 {
+	status = "okay";
+	pinctrl-names="default";
+	pinctrl-0=<&i2c0_z_pins>;
+
+	tas5707: tas5707@36 {
+		compatible = "ti,tas5707";
+		#sound-dai-cells = <0>;
+		codec_name = "tas5707";
+		reg = <0x1B>;
+		reset_pin = <&gpio GPIOZ_13 GPIO_ACTIVE_LOW>;
+		eq_enable = <0>;
+		drc_enable = <0>;
+		status = "disable";
+	};
+	cs42528: cs42528@4E {
+		compatible = "cirrus,cs42528";
+		#sound-dai-cells = <0>;
+		codec_name = "cs42528";
+		reg = <0x4E>;
+		reset_pin = <&gpio GPIOZ_17 GPIO_ACTIVE_LOW>;
+		status = "okay";
+	};
+};
+
+&pinctrl_periphs {
+	/*i2s*/
+	aml_audio_i2s: aml_audio_i2s {
+		mux {
+			groups = "i2s_mclk_z",
+				"i2s_sclk_z",
+				"i2s_lrclk_z",
+				"i2s_dout01_z",
+				"i2s_dout23_z15",
+				"i2s_dout45_z",
+				"i2s_din67_z19",
+				"i2s_lrclk_h",
+				"i2s_sclk_h",
+				"i2s_din01_h6"
+				//, "i2s_dout67_z19"
+				//, "i2s_din23_h5"
+				//, "i2s_din23_h5"
+				//, "i2s_din67_h0"
+				;
+			function = "i2s";
+		};
+	};
+	/*spdif*/
+	audio_spdif_in_pins: audio_spdif_in_pins {
+	    mux {
+			groups = "spdif_in_z18";
+			function = "spdif_in";
+		};
+	};
+	/*pcm*/
+	aml_audio_pcm: aml_audio_pcm {
+		mux {
+			groups =
+				"pcm_clk_a_dv",
+				"pcm_fs_a_dv",
+				"pcm_in_a_dv",
+				"pcm_out_a_dv";
+			function = "pcm_a";
+		};
+	};
+	spi_a_pins: spi_a {
+		mux {
+			groups = "spi_mosi_a";
+			function = "spi_a";
+		};
+	};
+};
+
+&uart_A {
+	status = "okay";
+};
+
+&audio_data{
+	status = "okay";
+};
+
+&pwm_AO_ab {
+	status = "okay";
+};
+
+&pwm_cd {
+	status = "okay";
+};
+
+&spicc0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi_a_pins>;
+	//cs-gpios = <&gpio GPIOZ_3 0>;
+	spidev {
+	    compatible = "rohm,dh2228fv";
+	    status = "okay";
+	    reg = <0>;
+	    spi-max-frequency = <3340000>;
+	};
+};
+
diff --git a/arch/arm64/boot/dts/amlogic/gxl_sei210_1g.dts b/arch/arm64/boot/dts/amlogic/gxl_sei210_1g.dts
new file mode 100644
index 0000000..a557bf9
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/gxl_sei210_1g.dts
@@ -0,0 +1,1213 @@
+/*
+ * arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesongxl.dtsi"
+#include "partition_mbox_normal_sei32bit.dtsi"
+/ {
+	model = "Amlogic";
+	amlogic-dt-id = "gxl_sei210_1g";
+	compatible = "amlogic, Gxl";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart_AO;
+		serial1 = &uart_A;
+		serial2 = &uart_B;
+		serial3 = &uart_C;
+		serial4 = &uart_AO_B;
+	};
+
+	ion_dev {
+		compatible = "amlogic, ion_dev";
+		memory-region = <&ion_reserved>;
+	};
+
+	memory@00000000 {
+		device_type = "memory";
+		linux,usable-memory = <0x0 0x0100000 0x0 0x3ff00000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		/* global autoconfigured region for contiguous allocations */
+		secmon_reserved:linux,secmon {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x400000>;
+			alignment = <0x0 0x400000>;
+			alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
+		};
+		secos_reserved:linux,secos {
+			status = "disable";
+			compatible = "amlogic, aml_secos_memory";
+			reg = <0x0 0x05300000 0x0 0x2000000>;
+			no-map;
+		};
+		logo_reserved:linux,meson-fb {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x800000>;
+			alignment = <0x0 0x400000>;
+			alloc-ranges = <0x0 0x3f800000 0x0 0x800000>;
+		};
+		//don't put other dts in front of logo_reserved
+
+		//di_reserved:linux,di {
+		//	compatible = "amlogic, di-mem";
+			/** 10x3133440=30M(0x1e) support 8bit **/
+		//	size = <0x0 0x1e00000>;
+			//no-map;
+		//};
+		di_cma_reserved:linux,di_cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			/** 10x3133440=30M(0x1e) support 8bit **/
+			size = <0x0 0x2000000>;
+			alignment = <0x0 0x400000>;
+		};
+		ion_reserved:linux,ion-dev {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x7C00000>;
+			alignment = <0x0 0x400000>;
+		};
+
+		/*  vdin0 CMA pool */
+		//vdin0_cma_reserved:linux,vdin0_cma {
+		//	compatible = "shared-dma-pool";
+		//	linux,phandle = <4>;
+		//	reusable;
+		/* 1920x1080x2x4  =16+4 M */
+		//	size = <0x0 0x01400000>;
+		//	alignment = <0x0 0x400000>;
+		//};
+		/*  vdin1 CMA pool */
+		vdin1_cma_reserved:linux,vdin1_cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			/* 1920x1080x2x4  =16 M */
+			size = <0x0 0x01000000>;
+			alignment = <0x0 0x400000>;
+		};
+		/*  POST PROCESS MANAGER */
+		ppmgr_reserved:linux,ppmgr {
+			compatible = "shared-dma-pool";
+			size = <0x0 0x0>;
+		};
+
+		codec_mm_cma:linux,codec_mm_cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			/* ion_codec_mm max can alloc size 80M*/
+			size = <0x0 0x13400000>;
+			alignment = <0x0 0x400000>;
+			linux,contiguous-region;
+		};
+		picdec_cma_reserved:linux,picdec {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x0>;
+			alignment = <0x0 0x0>;
+			linux,contiguous-region;
+		};
+		/* codec shared reserved */
+		codec_mm_reserved:linux,codec_mm_reserved {
+			compatible = "amlogic, codec-mm-reserved";
+			size = <0x0 0x0>;
+			alignment = <0x0 0x100000>;
+			//no-map;
+		};
+	};
+
+	bt-dev{
+		compatible = "amlogic, bt-dev";
+		dev_name = "bt-dev";
+		status = "okay";
+		gpio_reset = <&gpio       GPIOX_17       GPIO_ACTIVE_HIGH>;
+	};
+
+	wifi{
+		compatible = "amlogic, aml_wifi";
+		dev_name = "aml_wifi";
+		status = "okay";
+		interrupt_pin = <&gpio       GPIOX_7       GPIO_ACTIVE_HIGH>;
+		irq_trigger_type = "GPIO_IRQ_LOW";
+		dhd_static_buf;    //dhd_static_buf support
+		power_on_pin = <&gpio       GPIOX_6       GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_32k_pins>;
+		pwm_config = <&wifi_pwm_conf>;
+	};
+
+	wifi_pwm_conf:wifi_pwm_conf{
+		pwm_channel1_conf {
+			pwms = <&pwm_ef MESON_PWM_0 30040 0>;
+			duty-cycle = <15020>;
+			times = <8>;
+		};
+		pwm_channel2_conf {
+			pwms = <&pwm_ef MESON_PWM_2 30030 0>;
+			duty-cycle = <15015>;
+			times = <12>;
+		};
+	};
+
+	sd_emmc_c: emmc@d0074000 {
+		status = "okay";
+		compatible = "amlogic, meson-mmc-gxl";
+		reg = <0x0 0xd0074000 0x0 0x2000>;
+		interrupts = <0 218 1>;
+		pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+		pinctrl-0 = <&emmc_clk_cmd_pins>;
+		pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+		clocks = <&clkc CLKID_SD_EMMC_C>,
+			   <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+			   <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "clkin0", "clkin1";
+
+		bus-width = <8>;
+		cap-sd-highspeed;
+		cap-mmc-highspeed;
+		mmc-ddr-1_8v;
+		mmc-hs200-1_8v;
+
+		max-frequency = <200000000>;
+		non-removable;
+		disable-wp;
+		emmc {
+			pinname = "emmc";
+			ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+			caps = "MMC_CAP_8_BIT_DATA",
+				 "MMC_CAP_MMC_HIGHSPEED",
+				 "MMC_CAP_SD_HIGHSPEED",
+				 "MMC_CAP_NONREMOVABLE",
+				 "MMC_CAP_1_8V_DDR",
+				 "MMC_CAP_HW_RESET",
+				 "MMC_CAP_ERASE",
+				 "MMC_CAP_CMD23";
+			caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+			f_min = <400000>;
+			f_max = <100000000>;
+			max_req_size = <0x20000>; /**128KB*/
+			gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+			hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+			card_type = <1>;
+			/* 1:mmc card(include eMMC),
+			 * 2:sd card(include tSD)
+			 */
+		};
+	};
+
+	sd_emmc_b:sd@d0072000 {
+		status = "okay";
+		compatible = "amlogic, meson-mmc-gxl";
+		reg = <0x0 0xd0072000 0x0 0x2000>;
+		interrupts = <0 217 1>;
+		pinctrl-names = "sd_all_pins",
+			"sd_clk_cmd_pins",
+			"sd_1bit_pins",
+			"sd_clk_cmd_uart_pins",
+			"sd_1bit_uart_pins",
+			"sd_to_ao_uart_pins",
+			"ao_to_sd_uart_pins",
+			"ao_to_sd_jtag_pins",
+			"sd_to_ao_jtag_pins";
+		pinctrl-0 = <&sd_all_pins>;
+		pinctrl-1 = <&sd_clk_cmd_pins>;
+		pinctrl-2 = <&sd_1bit_pins>;
+		pinctrl-3 = <&sd_to_ao_uart_clr_pins
+			&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+		pinctrl-4 = <&sd_to_ao_uart_clr_pins
+			&sd_1bit_pins &ao_to_sd_uart_pins>;
+		pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+		pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+		pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+		pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
+		clocks = <&clkc CLKID_SD_EMMC_B>,
+			   <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+			   <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "clkin0", "clkin1";
+
+		bus-width = <4>;
+		cap-sd-highspeed;
+		max-frequency = <100000000>;
+		disable-wp;
+		sd {
+			pinname = "sd";
+			ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+			caps = "MMC_CAP_4_BIT_DATA",
+				 "MMC_CAP_MMC_HIGHSPEED",
+				 "MMC_CAP_SD_HIGHSPEED";
+			/* "MMC_CAP_UHS_SDR12",
+			 * "MMC_CAP_UHS_SDR25",
+			 * "MMC_CAP_UHS_SDR50",
+			 * "MMC_CAP_UHS_SDR104";
+			 */
+			f_min = <400000>;
+			f_max = <100000000>;
+			max_req_size = <0x20000>; /**128KB*/
+			gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
+			jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
+			gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+			card_type = <5>;
+			/* 0:unknown,
+			 * 1:mmc card(include eMMC),
+			 * 2:sd card(include tSD),
+			 * 3:sdio device(ie:sdio-wifi),
+			 * 4:SD combo (IO+mem) card,
+			 * 5:NON sdio device(means sd/mmc card),
+			 * other:reserved
+			 */
+		};
+	};
+
+	sd_emmc_a:sdio@d0070000 {
+		status = "okay";
+		compatible = "amlogic, meson-mmc-gxl";
+		reg = <0x0 0xd0070000 0x0 0x2000>;
+		interrupts = <0 216 4>;
+		pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
+		pinctrl-0 = <&sdio_clk_cmd_pins>;
+		pinctrl-1 = <&sdio_all_pins>;
+		clocks = <&clkc CLKID_SD_EMMC_A>,
+			   <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+			   <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "clkin0", "clkin1";
+
+		bus-width = <4>;
+		cap-sd-highspeed;
+		cap-mmc-highspeed;
+		max-frequency = <100000000>;
+		non-removable;
+		disable-wp;
+		sdio {
+			pinname = "sdio";
+			ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+			caps = "MMC_CAP_4_BIT_DATA",
+				 "MMC_CAP_MMC_HIGHSPEED",
+				 "MMC_CAP_SD_HIGHSPEED",
+				 "MMC_CAP_NONREMOVABLE",
+				 "MMC_CAP_UHS_SDR12",
+				 "MMC_CAP_UHS_SDR25",
+				 "MMC_CAP_UHS_SDR50",
+				 "MMC_CAP_UHS_SDR104",
+				 "MMC_PM_KEEP_POWER",
+				 "MMC_CAP_SDIO_IRQ";
+			f_min = <400000>;
+			f_max = <200000000>;
+			max_req_size = <0x20000>; /**128KB*/
+			card_type = <3>;
+			/* 3:sdio device(ie:sdio-wifi),
+			 * 4:SD combo (IO+mem) card
+			 */
+		};
+	};
+	mtd_nand{
+		compatible = "amlogic, aml_mtd_nand";
+		dev_name = "mtdnand";
+		status = "disabled";
+		reg = <0x0 0xd0074800 0x0 0x200>;
+		interrupts = <	0 34 1 >;
+		pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+		pinctrl-0 = <&all_nand_pins>;
+		pinctrl-1 = <&all_nand_pins>;
+		pinctrl-2 = <&nand_cs_pins>;
+		device_id = <0>;
+		plat-names = "bootloader","nandnormal";
+		plat-num = <2>;
+		plat-part-0 = <&bootloader>;
+		plat-part-1 = <&nandnormal>;
+		bootloader: bootloader{
+			enable_pad ="ce0";
+			busy_pad = "rb0";
+			timming_mode = "mode5";
+			bch_mode = "bch60_1k";
+			t_rea = <20>;
+			t_rhoh = <15>;
+			chip_num = <1>;
+			part_num = <0>;
+			rb_detect = <1>;
+		};
+		nandnormal: nandnormal{
+			enable_pad ="ce0","ce1";
+			busy_pad = "rb0","rb1";
+			timming_mode = "mode5";
+			bch_mode = "bch60_1k";
+			plane_mode = "twoplane";
+			t_rea = <20>;
+			t_rhoh = <15>;
+			chip_num = <2>;
+			part_num = <3>;
+			partition = <&nand_partitions>;
+			rb_detect = <1>;
+		};
+		nand_partitions:nand_partition{
+			logo{
+				offset=<0x0 0x0>;
+				size=<0x0 0x200000>;
+			};
+			recovery{
+				offset=<0x0 0x0>;
+				size=<0x0 0x1000000>;
+			};
+			boot{
+				offset=<0x0 0x0>;
+				size=<0x0 0xC00000>;
+			};
+			system{
+				offset=<0x0 0x0>;
+				size=<0x0 0xDC40000>;
+			};
+			data{
+				offset=<0xffffffff 0xffffffff>;
+				size=<0x0 0x0>;
+			};
+		};
+	};
+
+	ethmac: ethernet@0xc9410000 {
+			compatible = "amlogic, gxbb-eth-dwmac";
+			reg = <0x0 0xc9410000 0x0 0x10000
+			0x0 0xc8834540 0x0 0x8
+			0x0 0xc8834558 0x0 0xc>;
+			interrupts = <0 8 1>;
+			pinctrl-names = "external_eth_pins";
+			pinctrl-0 = <&external_eth_pins>;
+			rst_pin-gpios = <&gpio GPIOZ_14 0>;
+			GPIOZ4_pin-gpios = <&gpio GPIOZ_4 0>;
+			GPIOZ5_pin-gpios = <&gpio GPIOZ_5 0>;
+			mc_val_internal_phy = <0x1800>;
+			mc_val_external_phy = <0x1621>;
+			cali_val = <0x20000>;
+			interrupt-names = "macirq";
+			clocks = <&clkc CLKID_ETH>;
+			clock-names = "ethclk81";
+			internal_phy=<1>;
+	};
+
+	aml_sensor0: aml-sensor@0 {
+		compatible = "amlogic, aml-thermal";
+		device_name = "thermal";
+		#thermal-sensor-cells = <1>;
+		cooling_devices {
+			cpufreq_cool_cluster0 {
+				min_state = <1000000>;
+				dyn_coeff = <140>;
+				cluster_id = <0>;
+				node_name = "cpufreq_cool0";
+				device_type = "cpufreq";
+			};
+			cpucore_cool_cluster0 {
+				min_state = <1>;
+				dyn_coeff = <0>;
+				cluster_id = <0>;
+				node_name = "cpucore_cool0";
+				device_type = "cpucore";
+			};
+			gpufreq_cool {
+				min_state = <400>;
+				dyn_coeff = <437>;
+				cluster_id = <0>;
+				node_name = "gpufreq_cool0";
+				device_type = "gpufreq";
+			};
+			gpucore_cool {
+				min_state = <1>;
+				dyn_coeff = <0>;
+				cluster_id = <0>;
+				node_name = "gpucore_cool0";
+				device_type = "gpucore";
+			};
+		};
+		cpufreq_cool0:cpufreq_cool0 {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+		cpucore_cool0:cpucore_cool0 {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+		gpufreq_cool0:gpufreq_cool0 {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+		gpucore_cool0:gpucore_cool0 {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+	};
+	thermal-zones {
+		soc_thermal {
+			polling-delay = <1000>;
+			polling-delay-passive = <100>;
+			sustainable-power = <2150>;
+
+			thermal-sensors = <&aml_sensor0 3>;
+
+			trips {
+				switch_on: trip-point@0 {
+					temperature = <70000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+				control: trip-point@1 {
+					temperature = <80000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+				hot: trip-point@2 {
+					temperature = <85000>;
+					hysteresis = <5000>;
+					type = "hot";
+				};
+				critical: trip-point@3 {
+					temperature = <260000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				cpufreq_cooling_map {
+					trip = <&control>;
+					cooling-device = <&cpufreq_cool0 0 4>;
+					contribution = <1024>;
+				};
+				cpucore_cooling_map {
+					trip = <&control>;
+					cooling-device = <&cpucore_cool0 0 3>;
+					contribution = <1024>;
+				};
+				gpufreq_cooling_map {
+					trip = <&control>;
+					cooling-device = <&gpufreq_cool0 0 4>;
+					contribution = <1024>;
+				};
+				gpucore_cooling_map {
+					trip = <&control>;
+					cooling-device = <&gpucore_cool0 0 2>;
+					contribution = <1024>;
+				};
+			};
+		};
+	};
+
+	dwc3: dwc3@c9000000 {
+		compatible = "synopsys, dwc3";
+		reg = <0x0 0xc9000000 0x0 0x100000>;
+		interrupts = <0 30 4>;
+		usb-phy = <&usb2_phy>, <&usb3_phy>;
+		cpu-type = "gxl";
+		clock-src = "usb3.0";
+	};
+
+	usb2_phy: usb2phy@d0078000 {
+		compatible = "amlogic, amlogic-new-usb2";
+		portnum = <3>;
+		reg = <0x0 0xd0078000 0x0 0x80
+					0x0 0xc1104408 0x0 0x4>;
+	};
+
+	usb3_phy: usb3phy@d0078080 {
+		compatible = "amlogic, amlogic-new-usb3";
+		portnum = <0>;
+		reg = <0x0 0xd0078080 0x0 0x20>;
+	};
+
+	dwc2_a {
+		compatible = "amlogic, dwc2";
+		device_name = "dwc2_a";
+		reg = <0x0 0xc9100000 0x0 0x40000>;
+		status = "okay";
+		interrupts = <0 31 4>;
+		pl-periph-id = <0>; /** lm name */
+		clock-src = "usb0"; /** clock src */
+		port-id = <0>;  /** ref to mach/usb.h */
+		port-type = <2>;        /** 0: otg, 1: host, 2: slave */
+		port-speed = <0>; /** 0: default, high, 1: full */
+		port-config = <0>; /** 0: default */
+		port-dma = <0>; /** 0: default ... 6: disable*/
+		port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+		usb-fifo = <728>;
+		cpu-type = "gxl";
+		controller-type = <1>; /** 0: normal, 1: host, 2: device*/
+		phy-reg = <0xd0078000>;
+		phy-reg-size = <0xa0>;
+		clocks = <&clkc CLKID_USB_GENERAL
+			&clkc CLKID_USB1_TO_DDR
+			&clkc CLKID_USB1>;
+		clock-names = "usb_general",
+						"usb1",
+						"usb1_to_ddr";
+	};
+
+	meson-amvideom {
+		compatible = "amlogic, amvideom";
+		dev_name = "amvideom";
+		status = "okay";
+		interrupts = <0 3 1>;
+		interrupt-names = "vsync";
+	};
+
+	vout {
+		compatible = "amlogic, vout";
+		dev_name = "vout";
+		status = "okay";
+		fr_auto_policy = <0>;
+	};
+
+	vdac {
+		compatible = "amlogic, vdac";
+		dev_name = "vdac";
+		status = "okay";
+	};
+
+	cvbsout {
+		compatible = "amlogic, cvbsout-gxl";
+		dev_name = "cvbsout";
+		status = "okay";
+		clocks = <&clkc CLKID_VCLK2_ENCI
+			&clkc CLKID_VCLK2_VENCI0
+			&clkc CLKID_VCLK2_VENCI1
+			&clkc CLKID_DAC_CLK>;
+		clock-names = "venci_top_gate",
+			"venci_0_gate",
+			"venci_1_gate",
+			"vdac_clk_gate";
+
+		/* performance: reg_address, reg_value */
+		/* s905x */
+		performance = <0x1bf0  0x9
+			0x1b56  0x343
+			0x1b12  0x8080
+			0x1b05  0xfd
+			0x1c59  0xf752
+			0xffff  0x0>; /* ending flag */
+	};
+
+	amhdmitx: amhdmitx{
+		compatible = "amlogic, amhdmitx";
+		dev_name = "amhdmitx";
+		status = "okay";
+		vend-data = <&vend_data>;
+		pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
+		pinctrl-0=<&hdmitx_hpd>;
+		pinctrl-1=<&hdmitx_ddc>;
+		/* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+		interrupts = <0 57 1>;
+		interrupt-names = "hdmitx_hpd";
+		/* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+		 * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+		 */
+		ic_type = <3>;
+		vend_data: vend_data{ /* Should modified by Customer */
+			vendor_name = "Amlogic"; /* Max Chars: 8 */
+			/* standards.ieee.org/develop/regauth/oui/oui.txt */
+			vendor_id = <0x000000>;
+			product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
+		};
+	};
+
+	aocec: aocec{
+		compatible = "amlogic, amlogic-aocec";
+		device_name = "aocec";
+		status = "okay";
+		vendor_id = <0x000000>;
+		cec_osd_string = "MBox"; /* Max Chars: 14    */
+		cec_version = <5>; /* 5: 1.4, 6: 2.0 */
+		port_num = <1>;
+		arc_port_mask = <0x0>;
+		interrupts = <0 199 1>;
+		interrupt-names = "hdmi_aocec";
+		pinctrl-names = "default";
+		pinctrl-0=<&hdmitx_aocec>;
+		reg = <0x0 0xc810023c 0x0 0x4
+		       0x0 0xc8100000 0x0 0x200>;
+	};
+
+	sysled {
+		compatible = "amlogic, sysled";
+		dev_name = "sysled";
+		status = "disabled";
+		led_gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
+		led_active_low = <1>;
+	};
+
+	codec_io {
+		compatible = "amlogic, codec_io";
+		#address-cells=<2>;
+		#size-cells=<2>;
+		ranges;
+		io_cbus_base{
+			reg = <0x0 0xC1100000 0x0 0x100000>;
+		};
+		io_dos_base{
+			reg = <0x0 0xc8820000 0x0 0x10000>;
+		};
+		io_hiubus_base{
+			reg = <0x0 0xc883c000 0x0 0x2000>;
+		};
+		io_aobus_base{
+			reg = <0x0 0xc8100000 0x0 0x100000>;
+		};
+		io_vcbus_base{
+			reg = <0x0 0xd0100000 0x0 0x40000>;
+		};
+		io_dmc_base{
+			reg = <0x0 0xc8838000 0x0 0x400>;
+		};
+	};
+
+	codec_mm {
+		compatible = "amlogic, codec, mm";
+		memory-region = <&codec_mm_cma &codec_mm_reserved>;
+		dev_name = "codec_mm";
+		status = "okay";
+	};
+
+	canvas{
+		compatible = "amlogic, meson, canvas";
+		dev_name = "amlogic-canvas";
+		status = "ok";
+		reg = <0x0 0xc8838000 0x0 0x400>;
+	};
+
+	mesonstream {
+		compatible = "amlogic, codec, streambuf";
+		dev_name = "mesonstream";
+		status = "okay";
+		clocks = <&clkc CLKID_DOS_PARSER
+			&clkc CLKID_DEMUX
+			&clkc CLKID_DOS
+			&clkc CLKID_VDEC_MUX
+			&clkc CLKID_HCODEC_MUX
+			&clkc CLKID_HEVC_MUX>;
+		clock-names = "parser_top",
+			"demux",
+			"vdec",
+			"clk_vdec_mux",
+			"clk_hcodec_mux",
+			"clk_hevc_mux";
+	};
+
+	vdec {
+		compatible = "amlogic, vdec";
+		dev_name = "vdec.0";
+		status = "okay";
+		interrupts = <0 3 1
+			0 23 1
+			0 32 1
+			0 43 1
+			0 44 1
+			0 45 1>;
+		interrupt-names = "vsync",
+			"demux",
+			"parser",
+			"mailbox_0",
+			"mailbox_1",
+			"mailbox_2";
+	};
+
+	gpio_keypad{
+		compatible = "amlogic, gpio_keypad";
+		status = "okay";
+		scan_period = <20>;
+		key_num = <1>;
+		key_name = "power";
+		key_code = <116>;
+		key_pin = <&gpio_ao  GPIOAO_2  GPIO_ACTIVE_HIGH>;
+		interrupts = <0 70 1
+				0 71 2>;
+		interrupt-names = "irq_keyup", "irq_keydown";
+	};
+	meson-fb {
+		compatible = "amlogic, meson-gxl";
+		memory-region = <&logo_reserved>;
+		dev_name = "meson-fb";
+		status = "okay";
+		interrupts = <0 3 1
+			0 89 1>;
+		interrupt-names = "viu-vsync", "rdma";
+		mem_size = <0x00800000 0x01800000 0x00100000>;
+		/* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+		display_mode_default = "1080p60hz";
+		scale_mode = <1>;
+		/** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+		display_size_default = <1920 1080 1920 3240 32>;
+		/*1920*1080*4*3 = 0x17BB000*/
+		logo_addr = "0x3f800000";
+	};
+	ge2d {
+		compatible = "amlogic, ge2d";
+		dev_name = "ge2d";
+		status = "okay";
+		interrupts = <0 150 1>;
+		interrupt-names = "ge2d";
+		clocks = <&clkc CLKID_VAPB_MUX>,
+			<&clkc CLKID_G2D>,
+			<&clkc CLKID_GE2D_GATE>;
+		clock-names = "clk_vapb_0",
+			"clk_ge2d",
+			"clk_ge2d_gate";
+	};
+
+
+	/* AUDIO MESON DEVICES */
+	i2s_dai: I2S {
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-i2s-dai";
+		clocks =
+			<&clkc CLKID_MPLL2>,
+			<&clkc CLKID_AMCLK_COMP>,
+			<&clkc CLKID_AIU_GLUE>,
+			<&clkc CLKID_IEC958>,
+			<&clkc CLKID_I2S_OUT>,
+			<&clkc CLKID_AMCLK>,
+			<&clkc CLKID_AIFIFO2>,
+			<&clkc CLKID_MIXER>,
+			<&clkc CLKID_MIXER_IFACE>,
+			<&clkc CLKID_ADC>,
+			<&clkc CLKID_AIU_TOP>,
+			<&clkc CLKID_AOCLK_GATE>,
+			<&clkc CLKID_I2S_SPDIF>;
+		clock-names =
+			"mpll",
+			"mclk",
+			"top_glue",
+			"aud_buf",
+			"i2s_out",
+			"amclk_measure",
+			"aififo2",
+			"aud_mixer",
+			"mixer_reg",
+			"adc",
+			"top_level",
+			"aoclk",
+			"aud_in";
+		i2s_pos_sync = <0>;
+		/*DMIC;*/  /* I2s Mic or Dmic, default for I2S mic */
+	};
+	dmic:snd_dmic {
+		#sound-dai-cells = <0>;
+		compatible = "aml, aml_snd_dmic";
+		reg = <0x0 0xd0042000 0x0 0x2000>;
+		status = "disabled";
+		resets = <
+			&clkc CLKID_PDM_GATE
+		>;
+		reset-names =	"pdm";
+		pinctrl-names = "audio_dmic";
+		pinctrl-0 = <&aml_dmic_pins>;
+		clocks = <&clkc CLKID_PDM_COMP>,
+			<&clkc CLKID_AMCLK_COMP>;
+		clock-names = "pdm", "mclk";
+	};
+	spdif_dai: SPDIF {
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-spdif-dai";
+		clocks =
+			<&clkc CLKID_MPLL1>,
+			<&clkc CLKID_I958_COMP>,
+			<&clkc CLKID_AMCLK_COMP>,
+			<&clkc CLKID_I958_COMP_SPDIF>,
+			<&clkc CLKID_CLK81>,
+			<&clkc CLKID_IEC958>,
+			<&clkc CLKID_IEC958_GATE>;
+		clock-names =
+			"mpll1",
+			"i958",
+			"mclk",
+			"spdif",
+			"clk_81",
+			"iec958",
+			"iec958_amclk";
+	};
+	pcm_dai: PCM {
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-pcm-dai";
+		pinctrl-names = "audio_pcm";
+		pinctrl-0 = <&audio_pcm_pins>;
+		clocks =
+			<&clkc CLKID_MPLL0>,
+			<&clkc CLKID_PCM_MCLK_COMP>,
+			<&clkc CLKID_PCM_SCLK_GATE>;
+		clock-names =
+			"mpll0",
+			"pcm_mclk",
+			"pcm_sclk";
+		pcm_mode = <1>; /* 0=slave mode, 1=master mode */
+	};
+	i2s_plat: i2s_platform {
+		compatible = "amlogic, aml-i2s";
+		interrupts = <0 29 1>;
+	};
+	pcm_plat: pcm_platform {
+		compatible = "amlogic, aml-pcm";
+	};
+	spdif_codec: spdif_codec{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-spdif-codec";
+		pinctrl-names = "audio_spdif";
+		pinctrl-0 = <&audio_spdif_pins>;
+	};
+	pcm_codec: pcm_codec{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, pcm2BT-codec";
+	};
+	/* endof AUDIO MESON DEVICES */
+
+	/* AUDIO board specific */
+	dummy_codec:dummy{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml_dummy_codec";
+		status = "disable";
+	};
+	amlogic_codec:t9015{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml_codec_T9015";
+		reg = <0x0 0xc8832000 0x0 0x14>;
+		status = "okay";
+	};
+	aml_sound_meson {
+		compatible = "aml, meson-snd-card";
+		status = "okay";
+		aml-sound-card,format = "i2s";
+		aml_sound_card,name = "AML-MESONAUDIO";
+		aml,audio-routing =
+				"Ext Spk","LOUTL",
+				"Ext Spk","LOUTR";
+
+		mute_gpio-gpios = <&gpio GPIOH_5 0>;
+		mute_inv;
+		hp_disable;
+		hp_paraments = <800 300 0 5 1>;
+		pinctrl-names = "audio_i2s";
+		pinctrl-0 = <&audio_i2s_pins>;
+		cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
+		codec_list = <&codec0 &codec1 &codec2>;
+		plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
+		cpudai0: cpudai0 {
+			sound-dai = <&i2s_dai>;
+		};
+		cpudai1: cpudai1 {
+			sound-dai = <&spdif_dai>;
+		};
+		cpudai2: cpudai2 {
+			sound-dai = <&pcm_dai>;
+		};
+		codec0: codec0 {
+			sound-dai = <&amlogic_codec>;
+		};
+		codec1: codec1 {
+			sound-dai = <&spdif_codec>;
+		};
+		codec2: codec2 {
+			sound-dai = <&pcm_codec>;
+		};
+	};
+	/* END OF AUDIO board specific */
+	rdma{
+		compatible = "amlogic, meson, rdma";
+		dev_name = "amlogic-rdma";
+		status = "ok";
+		interrupts = <0 89 1>;
+		interrupt-names = "rdma";
+	};
+
+	amvenc_avc{
+		compatible = "amlogic, amvenc_avc";
+		dev_name = "amvenc_avc";
+		status = "okay";
+		interrupts = <0 45 1>;
+		interrupt-names = "mailbox_2";
+	};
+
+	hevc_enc{
+		compatible = "cnm, HevcEnc";
+		dev_name = "HevcEnc";
+		status = "okay";
+		interrupts = <0 187 1>;
+		interrupt-names = "wave420l_irq";
+		#address-cells=<2>;
+		#size-cells=<2>;
+		ranges;
+		io_reg_base{
+			reg = <0x0 0xc8810000 0x0 0x4000>;
+		};
+	};
+
+	picdec {
+		compatible = "amlogic, picdec";
+		memory-region = <&picdec_cma_reserved>;
+		dev_name = "picdec";
+		status = "okay";
+	};
+
+	ppmgr {
+		compatible = "amlogic, ppmgr";
+		memory-region = <&ppmgr_reserved>;
+		dev_name = "ppmgr";
+		status = "okay";
+	};
+
+	deinterlace {
+		compatible = "amlogic, deinterlace";
+		status = "okay";
+		flag_cma = <1>;/*0:use reserved;1:use cma*/
+		//memory-region = <&di_reserved>;
+		memory-region = <&di_cma_reserved>;
+		interrupts = <0 46 1 0 6 1>;
+		interrupt-names = "de_irq",	"timerc";
+		/*
+		 * nr_size(byte) = 1920*544*2(yuv422 8bit) |
+		 * 1920*544*2*12/8(yuv422 10bit)
+		 * | 1920*544*2*10/8(yuv422 10bit full pack mode)
+		 */
+		/* mtn_size(byte) = 1920*544/2 */
+		/* count_size(byte) = 1920*544/2 */
+		buffer-size = <3133440>;
+		hw-version = <2>;
+	};
+
+	ionvideo {
+		compatible = "amlogic, ionvideo";
+		dev_name = "ionvideo";
+		status = "okay";
+	};
+
+	amlvideo {
+		compatible = "amlogic, amlvideo";
+		dev_name = "amlvideo";
+		status = "okay";
+	};
+
+	amlvideo2_0 {
+		compatible = "amlogic, amlvideo2";
+		dev_name = "amlvideo2";
+		status = "okay";
+		amlvideo2_id = <0>;
+		cma_mode = <1>;
+	};
+
+	amlvideo2_1 {
+		compatible = "amlogic, amlvideo2";
+		dev_name = "amlvideo2";
+		status = "okay";
+		amlvideo2_id = <1>;
+		cma_mode = <1>;
+	};
+
+	/*if you want to use vdin just modify status to "ok"*/
+	vdin0 {
+		compatible = "amlogic, vdin";
+		/*memory-region = <&vdin0_cma_reserved>;*/
+		dev_name = "vdin0";
+		status = "ok";
+		reserve-iomap = "true";
+		flag_cma = <1>;/*1:share with codec_mm;2:cma alone*/
+		/*MByte, if 10bit disable: 64M(YUV422),
+		 *if 10bit enable: 64*1.5 = 96M(YUV422)
+		 *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+		 *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+		 *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+		 *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+		 */
+		cma_size = <16>;
+		interrupts = <0 83 1>;
+		rdma-irq = <2>;
+		/*clocks = <&clock CLK_FPLL_DIV5>,
+		 *	<&clock CLK_VDIN_MEAS_CLK>;
+		 *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+		 */
+		vdin_id = <0>;
+		/*vdin write mem color depth support:
+		 *bit0:support 8bit
+		 *bit1:support 9bit
+		 *bit2:support 10bit
+		 *bit3:support 12bit
+		 *bit4:support yuv422 10bit full pack mode (from txl new add)
+		 */
+		tv_bit_mode = <1>;
+	};
+	vdin1 {
+		compatible = "amlogic, vdin";
+		memory-region = <&vdin1_cma_reserved>;
+		dev_name = "vdin1";
+		status = "ok";
+		reserve-iomap = "true";
+		flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+		interrupts = <0 85 1>;
+		rdma-irq = <4>;
+		/*clocks = <&clock CLK_FPLL_DIV5>,
+		 *	<&clock CLK_VDIN_MEAS_CLK>;
+		 *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+		 */
+		vdin_id = <1>;
+		/*vdin write mem color depth support:
+		 *bit0:support 8bit
+		 *bit1:support 9bit
+		 *bit2:support 10bit
+		 *bit3:support 12bit
+		 */
+		tv_bit_mode = <1>;
+	};
+
+	amlvecm {
+		compatible = "amlogic, vecm";
+		dev_name = "aml_vecm";
+		status = "okay";
+		gamma_en = <0>;/*1:enabel ;0:disable*/
+		wb_en = <0>;/*1:enabel ;0:disable*/
+		cm_en = <0>;/*1:enabel ;0:disable*/
+	};
+
+	unifykey{
+		compatible = "amlogic, unifykey";
+		status = "ok";
+
+		unifykey-num = <16>;
+		unifykey-index-0 = <&keysn_0>;
+		unifykey-index-1 = <&keysn_1>;
+		unifykey-index-2 = <&keysn_2>;
+		unifykey-index-3 = <&keysn_3>;
+		unifykey-index-4 = <&keysn_4>;
+		unifykey-index-5 = <&keysn_5>;
+		unifykey-index-6 = <&keysn_6>;
+		unifykey-index-7 = <&keysn_7>;
+		unifykey-index-8 = <&keysn_8>;
+		unifykey-index-9 = <&keysn_9>;
+		unifykey-index-10= <&keysn_10>;
+		unifykey-index-11= <&keysn_11>;
+		unifykey-index-12= <&keysn_12>;
+		unifykey-index-13= <&keysn_13>;
+		unifykey-index-14= <&keysn_14>;
+		unifykey-index-15= <&keysn_15>;
+
+		keysn_0: key_0{
+			key-name = "usid";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_1:key_1{
+			key-name = "mac";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_2:key_2{
+			key-name = "hdcp";
+			key-device = "secure";
+			key-type = "sha1";
+			key-permit = "read","write","del";
+		};
+		keysn_3:key_3{
+			key-name = "secure_boot_set";
+			key-device = "efuse";
+			key-permit = "write";
+		};
+		keysn_4:key_4{
+			key-name = "mac_bt";
+			key-device = "normal";
+			key-permit = "read","write","del";
+			key-type  = "mac";
+		};
+		keysn_5:key_5{
+			key-name = "mac_wifi";
+			key-device = "normal";
+			key-permit = "read","write","del";
+			key-type = "mac";
+		};
+		keysn_6:key_6{
+			key-name = "hdcp2_tx";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_7:key_7{
+			key-name = "hdcp2_rx";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_8:key_8{
+			key-name = "widevinekeybox";
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_9:key_9{
+			key-name = "deviceid";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_10:key_10{
+			key-name = "hdcp22_fw_private";
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_11:key_11{
+			key-name = "PlayReadykeybox25";
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_12:key_12{
+			key-name = "prpubkeybox";// PlayReady
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_13:key_13{
+			key-name = "prprivkeybox";// PlayReady
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_14:key_14{
+			key-name = "attestationkeybox";// attestation key
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_15: key_15{
+			key-name = "region_code";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+	};//End unifykey
+
+};
+&efuse {
+	status = "ok";
+};
+
+&pwm_ef {
+	status = "okay";
+};
+
+&audio_data{
+	status = "okay";
+};
+&spicc{
+	status = "disabled";
+	pinctrl-names = "spicc_pulldown","spicc_pullup";
+	pinctrl-0 = <&spicc_pulldown_x8x9x11>;
+	pinctrl-1 = <&spicc_pullup_x8x9x11>;
+	num_chipselect = <1>;
+	cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_HIGH>;
+	dma_en = <0>;
+	dma_tx_threshold = <3>;
+	dma_rx_threshold = <3>;
+	dma_num_per_read_burst = <3>;
+	dma_num_per_write_burst = <3>;
+	delay_control = <0x15>;
+	ssctl = <0>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/gxl_sei210_2g.dts b/arch/arm64/boot/dts/amlogic/gxl_sei210_2g.dts
new file mode 100644
index 0000000..ed4ba6f
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/gxl_sei210_2g.dts
@@ -0,0 +1,1208 @@
+/*
+ * arch/arm64/boot/dts/amlogic/gxl_sei210_2g.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "partition_mbox_normal_sei32bit.dtsi"
+#include "mesongxl_sei210.dtsi"
+/ {
+	model = "Amlogic";
+	amlogic-dt-id = "gxl_sei210_2g";
+	compatible = "amlogic, Gxl";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart_AO;
+		serial1 = &uart_A;
+		serial2 = &uart_B;
+		serial3 = &uart_C;
+		serial4 = &uart_AO_B;
+	};
+
+	ion_dev {
+		compatible = "amlogic, ion_dev";
+		memory-region = <&ion_reserved>;
+	};
+
+	memory@00000000 {
+		device_type = "memory";
+		linux,usable-memory = <0x0 0x0100000 0x0 0x7ff00000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		/* global autoconfigured region for contiguous allocations */
+		ramoops@0x07400000 {
+			compatible = "ramoops";
+			reg = <0x0 0x07400000 0x0 0x00100000>;
+			record-size = <0x8000>;
+			console-size = <0x8000>;
+			ftrace-size = <0x0>;
+			pmsg-size = <0x8000>;
+		};
+		secmon_reserved:linux,secmon {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x400000>;
+			alignment = <0x0 0x400000>;
+			alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
+		};
+		secos_reserved:linux,secos {
+			status = "disable";
+			compatible = "amlogic, aml_secos_memory";
+			reg = <0x0 0x05300000 0x0 0x2000000>;
+			no-map;
+		};
+		logo_reserved:linux,meson-fb {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x800000>;
+			alignment = <0x0 0x400000>;
+			alloc-ranges = <0x0 0x7f800000 0x0 0x800000>;
+		};
+		//don't put other dts in front of logo_reserved
+
+		//di_reserved:linux,di {
+		//	compatible = "amlogic, di-mem";
+			/** 10x3133440=30M(0x1e) support 8bit **/
+		//	size = <0x0 0x1e00000>;
+			//no-map;
+		//};
+		di_cma_reserved:linux,di_cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			/** 10x3133440=30M(0x1e) support 8bit **/
+			size = <0x0 0x2000000>;
+			alignment = <0x0 0x400000>;
+		};
+		ion_reserved:linux,ion-dev {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x7C00000>;
+			alignment = <0x0 0x400000>;
+		};
+
+		/*  vdin0 CMA pool */
+		//vdin0_cma_reserved:linux,vdin0_cma {
+		//	compatible = "shared-dma-pool";
+		//	linux,phandle = <4>;
+		//	reusable;
+		/* 1920x1080x2x4  =16+4 M */
+		//	size = <0x0 0x01400000>;
+		//	alignment = <0x0 0x400000>;
+		//};
+		/*  vdin1 CMA pool */
+		vdin1_cma_reserved:linux,vdin1_cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			/* 1920x1080x2x4  =16 M */
+			size = <0x0 0x01000000>;
+			alignment = <0x0 0x400000>;
+		};
+		/*  POST PROCESS MANAGER */
+		ppmgr_reserved:linux,ppmgr {
+			compatible = "shared-dma-pool";
+			size = <0x0 0x0>;
+		};
+
+		codec_mm_cma:linux,codec_mm_cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			/* ion_codec_mm max can alloc size 80M*/
+			size = <0x0 0x13400000>;
+			alignment = <0x0 0x400000>;
+			linux,contiguous-region;
+		};
+		picdec_cma_reserved:linux,picdec {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x0>;
+			alignment = <0x0 0x0>;
+			linux,contiguous-region;
+		};
+		/* codec shared reserved */
+		codec_mm_reserved:linux,codec_mm_reserved {
+			compatible = "amlogic, codec-mm-reserved";
+			size = <0x0 0x0>;
+			alignment = <0x0 0x100000>;
+			//no-map;
+		};
+	};
+
+	bt-dev{
+		compatible = "amlogic, bt-dev";
+		dev_name = "bt-dev";
+		status = "okay";
+		gpio_reset = <&gpio       GPIOX_17       GPIO_ACTIVE_HIGH>;
+	};
+
+	wifi{
+		compatible = "amlogic, aml_wifi";
+		dev_name = "aml_wifi";
+		status = "okay";
+		interrupt_pin = <&gpio       GPIOX_7       GPIO_ACTIVE_HIGH>;
+		irq_trigger_type = "GPIO_IRQ_LOW";
+		dhd_static_buf;    //dhd_static_buf support
+		power_on_pin = <&gpio       GPIOX_6       GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_32k_pins>;
+		pwm_config = <&wifi_pwm_conf>;
+	};
+
+	wifi_pwm_conf:wifi_pwm_conf{
+		pwm_channel1_conf {
+			pwms = <&pwm_ef MESON_PWM_0 30040 0>;
+			duty-cycle = <15020>;
+			times = <8>;
+		};
+		pwm_channel2_conf {
+			pwms = <&pwm_ef MESON_PWM_2 30030 0>;
+			duty-cycle = <15015>;
+			times = <12>;
+		};
+	};
+
+	sd_emmc_c: emmc@d0074000 {
+		status = "okay";
+		compatible = "amlogic, meson-mmc-gxl";
+		reg = <0x0 0xd0074000 0x0 0x2000>;
+		interrupts = <0 218 1>;
+		pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+		pinctrl-0 = <&emmc_clk_cmd_pins>;
+		pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+		clocks = <&clkc CLKID_SD_EMMC_C>,
+			   <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+			   <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "clkin0", "clkin1";
+
+		bus-width = <8>;
+		cap-sd-highspeed;
+		cap-mmc-highspeed;
+		mmc-ddr-1_8v;
+		mmc-hs200-1_8v;
+
+		max-frequency = <200000000>;
+		non-removable;
+		disable-wp;
+		emmc {
+			pinname = "emmc";
+			ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+			caps = "MMC_CAP_8_BIT_DATA",
+				 "MMC_CAP_MMC_HIGHSPEED",
+				 "MMC_CAP_SD_HIGHSPEED",
+				 "MMC_CAP_NONREMOVABLE",
+				 "MMC_CAP_1_8V_DDR",
+				 "MMC_CAP_HW_RESET",
+				 "MMC_CAP_ERASE",
+				 "MMC_CAP_CMD23";
+			caps2 = "MMC_CAP2_HS200";
+			f_min = <400000>;
+			f_max = <100000000>;
+			max_req_size = <0x20000>; /**128KB*/
+			gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+			hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+			card_type = <1>;
+			/* 1:mmc card(include eMMC),
+			 * 2:sd card(include tSD)
+			 */
+		};
+	};
+
+	sd_emmc_b:sd@d0072000 {
+		status = "disabled";
+		compatible = "amlogic, meson-mmc-gxl";
+		reg = <0x0 0xd0072000 0x0 0x2000>;
+		interrupts = <0 217 1>;
+		pinctrl-names = "sd_all_pins",
+			"sd_clk_cmd_pins",
+			"sd_1bit_pins",
+			"sd_clk_cmd_uart_pins",
+			"sd_1bit_uart_pins",
+			"sd_to_ao_uart_pins",
+			"ao_to_sd_uart_pins",
+			"ao_to_sd_jtag_pins",
+			"sd_to_ao_jtag_pins";
+		pinctrl-0 = <&sd_all_pins>;
+		pinctrl-1 = <&sd_clk_cmd_pins>;
+		pinctrl-2 = <&sd_1bit_pins>;
+		pinctrl-3 = <&sd_to_ao_uart_clr_pins
+			&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+		pinctrl-4 = <&sd_to_ao_uart_clr_pins
+			&sd_1bit_pins &ao_to_sd_uart_pins>;
+		pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+		pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+		pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+		pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
+		clocks = <&clkc CLKID_SD_EMMC_B>,
+			   <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+			   <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "clkin0", "clkin1";
+
+		bus-width = <4>;
+		cap-sd-highspeed;
+		max-frequency = <100000000>;
+		disable-wp;
+		sd {
+			pinname = "sd";
+			ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+			caps = "MMC_CAP_4_BIT_DATA",
+				 "MMC_CAP_MMC_HIGHSPEED",
+				 "MMC_CAP_SD_HIGHSPEED";
+			/* "MMC_CAP_UHS_SDR12",
+			 * "MMC_CAP_UHS_SDR25",
+			 * "MMC_CAP_UHS_SDR50",
+			 * "MMC_CAP_UHS_SDR104";
+			 */
+			f_min = <400000>;
+			f_max = <100000000>;
+			max_req_size = <0x20000>; /**128KB*/
+			gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
+			jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
+			gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+			card_type = <5>;
+			/* 0:unknown,
+			 * 1:mmc card(include eMMC),
+			 * 2:sd card(include tSD),
+			 * 3:sdio device(ie:sdio-wifi),
+			 * 4:SD combo (IO+mem) card,
+			 * 5:NON sdio device(means sd/mmc card),
+			 * other:reserved
+			 */
+		};
+	};
+
+	sd_emmc_a:sdio@d0070000 {
+		status = "okay";
+		compatible = "amlogic, meson-mmc-gxl";
+		reg = <0x0 0xd0070000 0x0 0x2000>;
+		interrupts = <0 216 4>;
+		pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
+		pinctrl-0 = <&sdio_clk_cmd_pins>;
+		pinctrl-1 = <&sdio_all_pins>;
+		clocks = <&clkc CLKID_SD_EMMC_A>,
+			   <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+			   <&clkc CLKID_FCLK_DIV2>;
+		clock-names = "core", "clkin0", "clkin1";
+
+		bus-width = <4>;
+		cap-sd-highspeed;
+		cap-mmc-highspeed;
+		max-frequency = <100000000>;
+		non-removable;
+		disable-wp;
+		sdio {
+			pinname = "sdio";
+			ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+			caps = "MMC_CAP_4_BIT_DATA",
+				 "MMC_CAP_MMC_HIGHSPEED",
+				 "MMC_CAP_SD_HIGHSPEED",
+				 "MMC_CAP_NONREMOVABLE",
+				 "MMC_CAP_UHS_SDR12",
+				 "MMC_CAP_UHS_SDR25",
+				 "MMC_CAP_UHS_SDR50",
+				 "MMC_CAP_UHS_SDR104",
+				 "MMC_PM_KEEP_POWER",
+				 "MMC_CAP_SDIO_IRQ";
+			f_min = <400000>;
+			f_max = <180000000>;
+			max_req_size = <0x20000>; /**128KB*/
+			card_type = <3>;
+			/* 3:sdio device(ie:sdio-wifi),
+			 * 4:SD combo (IO+mem) card
+			 */
+		};
+	};
+	mtd_nand{
+		compatible = "amlogic, aml_mtd_nand";
+		dev_name = "mtdnand";
+		status = "disabled";
+		reg = <0x0 0xd0074800 0x0 0x200>;
+		interrupts = <	0 34 1 >;
+		pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+		pinctrl-0 = <&all_nand_pins>;
+		pinctrl-1 = <&all_nand_pins>;
+		pinctrl-2 = <&nand_cs_pins>;
+		device_id = <0>;
+		plat-names = "bootloader","nandnormal";
+		plat-num = <2>;
+		plat-part-0 = <&bootloader>;
+		plat-part-1 = <&nandnormal>;
+		bootloader: bootloader{
+			enable_pad ="ce0";
+			busy_pad = "rb0";
+			timming_mode = "mode5";
+			bch_mode = "bch60_1k";
+			t_rea = <20>;
+			t_rhoh = <15>;
+			chip_num = <1>;
+			part_num = <0>;
+			rb_detect = <1>;
+		};
+		nandnormal: nandnormal{
+			enable_pad ="ce0","ce1";
+			busy_pad = "rb0","rb1";
+			timming_mode = "mode5";
+			bch_mode = "bch60_1k";
+			plane_mode = "twoplane";
+			t_rea = <20>;
+			t_rhoh = <15>;
+			chip_num = <2>;
+			part_num = <3>;
+			partition = <&nand_partitions>;
+			rb_detect = <1>;
+		};
+		nand_partitions:nand_partition{
+			logo{
+				offset=<0x0 0x0>;
+				size=<0x0 0x200000>;
+			};
+			recovery{
+				offset=<0x0 0x0>;
+				size=<0x0 0x1000000>;
+			};
+			boot{
+				offset=<0x0 0x0>;
+				size=<0x0 0xC00000>;
+			};
+			system{
+				offset=<0x0 0x0>;
+				size=<0x0 0xDC40000>;
+			};
+			data{
+				offset=<0xffffffff 0xffffffff>;
+				size=<0x0 0x0>;
+			};
+		};
+	};
+
+	ethmac: ethernet@0xc9410000 {
+			status = "disabled";
+			compatible = "amlogic, gxbb-eth-dwmac";
+			reg = <0x0 0xc9410000 0x0 0x10000
+			0x0 0xc8834540 0x0 0x8
+			0x0 0xc8834558 0x0 0xc>;
+			interrupts = <0 8 1>;
+			pinctrl-names = "external_eth_pins";
+			pinctrl-0 = <&external_eth_pins>;
+			rst_pin-gpios = <&gpio GPIOZ_14 0>;
+			GPIOZ4_pin-gpios = <&gpio GPIOZ_4 0>;
+			GPIOZ5_pin-gpios = <&gpio GPIOZ_5 0>;
+			mc_val_internal_phy = <0x1800>;
+			mc_val_external_phy = <0x1621>;
+			cali_val = <0x20000>;
+			interrupt-names = "macirq";
+			clocks = <&clkc CLKID_ETH>;
+			clock-names = "ethclk81";
+			internal_phy=<1>;
+	};
+
+	codec_io {
+		compatible = "amlogic, codec_io";
+		#address-cells=<2>;
+		#size-cells=<2>;
+		ranges;
+		io_cbus_base{
+			reg = <0x0 0xC1100000 0x0 0x100000>;
+		};
+		io_dos_base{
+			reg = <0x0 0xc8820000 0x0 0x10000>;
+		};
+		io_hiubus_base{
+			reg = <0x0 0xc883c000 0x0 0x2000>;
+		};
+		io_aobus_base{
+			reg = <0x0 0xc8100000 0x0 0x100000>;
+		};
+		io_vcbus_base{
+			reg = <0x0 0xd0100000 0x0 0x40000>;
+		};
+		io_dmc_base{
+			reg = <0x0 0xc8838000 0x0 0x400>;
+		};
+	};
+
+	codec_mm {
+		compatible = "amlogic, codec, mm";
+		memory-region = <&codec_mm_cma &codec_mm_reserved>;
+		dev_name = "codec_mm";
+		status = "okay";
+	};
+
+	canvas{
+		compatible = "amlogic, meson, canvas";
+		dev_name = "amlogic-canvas";
+		status = "ok";
+		reg = <0x0 0xc8838000 0x0 0x400>;
+	};
+
+	mesonstream {
+		compatible = "amlogic, codec, streambuf";
+		dev_name = "mesonstream";
+		status = "okay";
+		clocks = <&clkc CLKID_DOS_PARSER
+			&clkc CLKID_DEMUX
+			&clkc CLKID_DOS
+			&clkc CLKID_VDEC_MUX
+			&clkc CLKID_HCODEC_MUX
+			&clkc CLKID_HEVC_MUX>;
+		clock-names = "parser_top",
+			"demux",
+			"vdec",
+			"clk_vdec_mux",
+			"clk_hcodec_mux",
+			"clk_hevc_mux";
+	};
+
+	vdec {
+		compatible = "amlogic, vdec";
+		dev_name = "vdec.0";
+		status = "okay";
+		interrupts = <0 3 1
+			0 23 1
+			0 32 1
+			0 43 1
+			0 44 1
+			0 45 1>;
+		interrupt-names = "vsync",
+			"demux",
+			"parser",
+			"mailbox_0",
+			"mailbox_1",
+			"mailbox_2";
+	};
+
+	gpio_keypad{
+		compatible = "amlogic, gpio_keypad";
+		status = "okay";
+		scan_period = <20>;
+		key_num = <1>;
+		key_name = "power";
+		key_code = <116>;
+		key_pin = <&gpio_ao  GPIOAO_2  GPIO_ACTIVE_HIGH>;
+		interrupts = <  0 70 1
+			0 71 2>;
+		interrupt-names = "irq_keyup", "irq_keydown";
+	};
+
+	aml_sensor0: aml-sensor@0 {
+		compatible = "amlogic, aml-thermal";
+		device_name = "thermal";
+		#thermal-sensor-cells = <1>;
+		cooling_devices {
+			cpufreq_cool_cluster0 {
+				min_state = <1000000>;
+				dyn_coeff = <140>;
+				cluster_id = <0>;
+				node_name = "cpufreq_cool0";
+				device_type = "cpufreq";
+			};
+			cpucore_cool_cluster0 {
+				min_state = <1>;
+				dyn_coeff = <0>;
+				cluster_id = <0>;
+				node_name = "cpucore_cool0";
+				device_type = "cpucore";
+			};
+			gpufreq_cool {
+				min_state = <400>;
+				dyn_coeff = <437>;
+				cluster_id = <0>;
+				node_name = "gpufreq_cool0";
+				device_type = "gpufreq";
+			};
+			gpucore_cool {
+				min_state = <1>;
+				dyn_coeff = <0>;
+				cluster_id = <0>;
+				node_name = "gpucore_cool0";
+				device_type = "gpucore";
+			};
+		};
+		cpufreq_cool0:cpufreq_cool0 {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+		cpucore_cool0:cpucore_cool0 {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+		gpufreq_cool0:gpufreq_cool0 {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+		gpucore_cool0:gpucore_cool0 {
+			#cooling-cells = <2>; /* min followed by max */
+		};
+	};
+	thermal-zones {
+		soc_thermal {
+			polling-delay = <1000>;
+			polling-delay-passive = <100>;
+			sustainable-power = <2150>;
+
+			thermal-sensors = <&aml_sensor0 3>;
+
+			trips {
+				switch_on: trip-point@0 {
+					temperature = <70000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+				control: trip-point@1 {
+					temperature = <80000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+				hot: trip-point@2 {
+					temperature = <85000>;
+					hysteresis = <5000>;
+					type = "hot";
+				};
+				critical: trip-point@3 {
+					temperature = <260000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				cpufreq_cooling_map {
+					trip = <&control>;
+					cooling-device = <&cpufreq_cool0 0 4>;
+					contribution = <1024>;
+				};
+				cpucore_cooling_map {
+					trip = <&control>;
+					cooling-device = <&cpucore_cool0 0 3>;
+					contribution = <1024>;
+				};
+				gpufreq_cooling_map {
+					trip = <&control>;
+					cooling-device = <&gpufreq_cool0 0 4>;
+					contribution = <1024>;
+				};
+				gpucore_cooling_map {
+					trip = <&control>;
+					cooling-device = <&gpucore_cool0 0 2>;
+					contribution = <1024>;
+				};
+			};
+		};
+	};
+
+	dwc3: dwc3@c9000000 {
+		compatible = "synopsys, dwc3";
+		reg = <0x0 0xc9000000 0x0 0x100000>;
+		interrupts = <0 30 4>;
+		usb-phy = <&usb2_phy>, <&usb3_phy>;
+		cpu-type = "gxl";
+		clock-src = "usb3.0";
+	};
+
+	usb2_phy: usb2phy@d0078000 {
+		compatible = "amlogic, amlogic-new-usb2";
+		portnum = <3>;
+		reg = <0x0 0xd0078000 0x0 0x80
+					0x0 0xc1104408 0x0 0x4>;
+	};
+
+	usb3_phy: usb3phy@d0078080 {
+		compatible = "amlogic, amlogic-new-usb3";
+		portnum = <0>;
+		reg = <0x0 0xd0078080 0x0 0x20>;
+	};
+
+	dwc2_a {
+		compatible = "amlogic, dwc2";
+		device_name = "dwc2_a";
+		reg = <0x0 0xc9100000 0x0 0x40000>;
+		status = "okay";
+		interrupts = <0 31 4>;
+		pl-periph-id = <0>; /** lm name */
+		clock-src = "usb0"; /** clock src */
+		port-id = <0>;  /** ref to mach/usb.h */
+		port-type = <2>;        /** 0: otg, 1: host, 2: slave */
+		port-speed = <0>; /** 0: default, high, 1: full */
+		port-config = <0>; /** 0: default */
+		port-dma = <0>; /** 0: default ... 6: disable*/
+		port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+		usb-fifo = <728>;
+		cpu-type = "gxl";
+		controller-type = <1>; /** 0: normal, 1: host, 2: device*/
+		phy-reg = <0xd0078000>;
+		phy-reg-size = <0xa0>;
+		clocks = <&clkc CLKID_USB_GENERAL
+			&clkc CLKID_USB1_TO_DDR
+			&clkc CLKID_USB1>;
+		clock-names = "usb_general",
+			"usb1",
+			"usb1_to_ddr";
+		};
+
+	meson-amvideom {
+		compatible = "amlogic, amvideom";
+		dev_name = "amvideom";
+		status = "okay";
+		interrupts = <0 3 1>;
+		interrupt-names = "vsync";
+	};
+
+	vout {
+		compatible = "amlogic, vout";
+		dev_name = "vout";
+		status = "okay";
+		fr_auto_policy = <0>;
+	};
+
+	vdac {
+		compatible = "amlogic, vdac";
+		dev_name = "vdac";
+		status = "okay";
+	};
+
+	cvbsout {
+		compatible = "amlogic, cvbsout-gxl";
+		dev_name = "cvbsout";
+		status = "disabled";
+		clocks = <&clkc CLKID_VCLK2_ENCI
+			&clkc CLKID_VCLK2_VENCI0
+			&clkc CLKID_VCLK2_VENCI1
+			&clkc CLKID_DAC_CLK>;
+		clock-names = "venci_top_gate",
+			"venci_0_gate",
+			"venci_1_gate",
+			"vdac_clk_gate";
+
+		/* performance: reg_address, reg_value */
+		/* s905x */
+		performance = <0x1bf0  0x9
+			0x1b56  0x343
+			0x1b12  0x8080
+			0x1b05  0xfd
+			0x1c59  0xf752
+			0xffff  0x0>; /* ending flag */
+	};
+
+	amhdmitx: amhdmitx{
+		compatible = "amlogic, amhdmitx";
+		dev_name = "amhdmitx";
+		status = "okay";
+		vend-data = <&vend_data>;
+		pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
+		pinctrl-0=<&hdmitx_hpd>;
+		pinctrl-1=<&hdmitx_ddc>;
+		/* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+		interrupts = <0 57 1>;
+		interrupt-names = "hdmitx_hpd";
+		/* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+		 * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+		 */
+		ic_type = <3>;
+		vend_data: vend_data{ /* Should modified by Customer */
+			vendor_name = "Amlogic"; /* Max Chars: 8 */
+			/* standards.ieee.org/develop/regauth/oui/oui.txt */
+			vendor_id = <0x000000>;
+			product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
+		};
+	};
+
+	aocec: aocec{
+		compatible = "amlogic, amlogic-aocec";
+		device_name = "aocec";
+		status = "okay";
+		vendor_id = <0x000000>;
+		cec_osd_string = "MBox"; /* Max Chars: 14    */
+		cec_version = <5>; /* 5: 1.4, 6: 2.0 */
+		port_num = <1>;
+		arc_port_mask = <0x0>;
+		interrupts = <0 199 1>;
+		interrupt-names = "hdmi_aocec";
+		pinctrl-names = "default";
+		pinctrl-0=<&hdmitx_aocec>;
+		reg = <0x0 0xc810023c 0x0 0x4
+		       0x0 0xc8100000 0x0 0x200>;
+	};
+
+	sysled {
+		compatible = "amlogic, sysled";
+		dev_name = "sysled";
+		status = "disabled";
+		led_gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
+		led_active_low = <1>;
+	};
+
+	meson-fb {
+		compatible = "amlogic, meson-gxl";
+		memory-region = <&logo_reserved>;
+		dev_name = "meson-fb";
+		status = "okay";
+		interrupts = <0 3 1
+			0 89 1>;
+		interrupt-names = "viu-vsync", "rdma";
+		mem_size = <0x00800000 0x01800000 0x00100000>;
+		/* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+		display_mode_default = "1080p60hz";
+		scale_mode = <1>;
+		/** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+		display_size_default = <1920 1080 1920 3240 32>;
+		/*1920*1080*4*3 = 0x17BB000*/
+		logo_addr = "0x7f800000";
+	};
+	ge2d {
+		compatible = "amlogic, ge2d-gxl";
+		dev_name = "ge2d";
+		status = "okay";
+		interrupts = <0 150 1>;
+		interrupt-names = "ge2d";
+		clocks = <&clkc CLKID_VAPB_MUX>,
+			<&clkc CLKID_G2D>,
+			<&clkc CLKID_GE2D_GATE>;
+		clock-names = "clk_vapb_0",
+			"clk_ge2d",
+			"clk_ge2d_gate";
+	};
+
+
+	/* AUDIO MESON DEVICES */
+	i2s_dai: I2S {
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-i2s-dai";
+		clocks =
+			<&clkc CLKID_MPLL2>,
+			<&clkc CLKID_AMCLK_COMP>,
+			<&clkc CLKID_AIU_GLUE>,
+			<&clkc CLKID_IEC958>,
+			<&clkc CLKID_I2S_OUT>,
+			<&clkc CLKID_AMCLK>,
+			<&clkc CLKID_AIFIFO2>,
+			<&clkc CLKID_MIXER>,
+			<&clkc CLKID_MIXER_IFACE>,
+			<&clkc CLKID_ADC>,
+			<&clkc CLKID_AIU_TOP>,
+			<&clkc CLKID_AOCLK_GATE>,
+			<&clkc CLKID_I2S_SPDIF>;
+		clock-names =
+			"mpll",
+			"mclk",
+			"top_glue",
+			"aud_buf",
+			"i2s_out",
+			"amclk_measure",
+			"aififo2",
+			"aud_mixer",
+			"mixer_reg",
+			"adc",
+			"top_level",
+			"aoclk",
+			"aud_in";
+		i2s_pos_sync = <0>;
+		/*DMIC;*/  /* I2s Mic or Dmic, default for I2S mic */
+	};
+	dmic:snd_dmic {
+		#sound-dai-cells = <0>;
+		compatible = "aml, aml_snd_dmic";
+		reg = <0x0 0xd0042000 0x0 0x2000>;
+		status = "disabled";
+		resets = <
+			&clkc CLKID_PDM_GATE
+		>;
+		reset-names =	"pdm";
+		pinctrl-names = "audio_dmic";
+		pinctrl-0 = <&aml_dmic_pins>;
+		clocks = <&clkc CLKID_PDM_COMP>,
+			<&clkc CLKID_AMCLK_COMP>;
+		clock-names = "pdm", "mclk";
+	};
+	spdif_dai: SPDIF {
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-spdif-dai";
+		clocks =
+			<&clkc CLKID_MPLL1>,
+			<&clkc CLKID_I958_COMP>,
+			<&clkc CLKID_AMCLK_COMP>,
+			<&clkc CLKID_I958_COMP_SPDIF>,
+			<&clkc CLKID_CLK81>,
+			<&clkc CLKID_IEC958>,
+			<&clkc CLKID_IEC958_GATE>;
+		clock-names =
+			"mpll1",
+			"i958",
+			"mclk",
+			"spdif",
+			"clk_81",
+			"iec958",
+			"iec958_amclk";
+	};
+	pcm_dai: PCM {
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-pcm-dai";
+		pinctrl-names = "audio_pcm";
+		pinctrl-0 = <&audio_pcm_pins>;
+		clocks =
+			<&clkc CLKID_MPLL0>,
+			<&clkc CLKID_PCM_MCLK_COMP>,
+			<&clkc CLKID_PCM_SCLK_GATE>;
+		clock-names =
+			"mpll0",
+			"pcm_mclk",
+			"pcm_sclk";
+		pcm_mode = <1>; /* 0=slave mode, 1=master mode */
+	};
+	i2s_plat: i2s_platform {
+		compatible = "amlogic, aml-i2s";
+		interrupts = <0 29 1>;
+	};
+	pcm_plat: pcm_platform {
+		compatible = "amlogic, aml-pcm";
+	};
+	spdif_codec: spdif_codec{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml-spdif-codec";
+		pinctrl-names = "audio_spdif";
+		pinctrl-0 = <&audio_spdif_pins>;
+	};
+	pcm_codec: pcm_codec{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, pcm2BT-codec";
+	};
+	/* endof AUDIO MESON DEVICES */
+
+	/* AUDIO board specific */
+	dummy_codec:dummy{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml_dummy_codec";
+		status = "okay";
+	};
+	amlogic_codec:t9015{
+		#sound-dai-cells = <0>;
+		compatible = "amlogic, aml_codec_T9015";
+		reg = <0x0 0xc8832000 0x0 0x14>;
+		status = "disabled";
+	};
+	aml_sound_meson {
+		compatible = "aml, meson-snd-card";
+		status = "okay";
+		aml-sound-card,format = "i2s";
+		aml_sound_card,name = "AML-MESONAUDIO";
+		aml,audio-routing =
+				"Ext Spk","LOUTL",
+				"Ext Spk","LOUTR";
+
+		mute_gpio-gpios = <&gpio GPIOH_5 0>;
+		mute_inv;
+		hp_disable;
+		hp_paraments = <800 300 0 5 1>;
+		pinctrl-names = "audio_i2s";
+		pinctrl-0 = <&audio_i2s_pins>;
+		cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
+		codec_list = <&codec0 &codec1 &codec2>;
+		plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
+		cpudai0: cpudai0 {
+			sound-dai = <&i2s_dai>;
+		};
+		cpudai1: cpudai1 {
+			sound-dai = <&spdif_dai>;
+		};
+		cpudai2: cpudai2 {
+			sound-dai = <&pcm_dai>;
+		};
+		codec0: codec0 {
+			sound-dai = <&dummy_codec>;
+		};
+		codec1: codec1 {
+			sound-dai = <&spdif_codec>;
+		};
+		codec2: codec2 {
+			sound-dai = <&pcm_codec>;
+		};
+	};
+	/* END OF AUDIO board specific */
+	rdma{
+		compatible = "amlogic, meson, rdma";
+		dev_name = "amlogic-rdma";
+		status = "ok";
+		interrupts = <0 89 1>;
+		interrupt-names = "rdma";
+	};
+
+	amvenc_avc{
+		compatible = "amlogic, amvenc_avc";
+		dev_name = "amvenc_avc";
+		status = "okay";
+		interrupts = <0 45 1>;
+		interrupt-names = "mailbox_2";
+	};
+
+	hevc_enc{
+		compatible = "cnm, HevcEnc";
+		dev_name = "HevcEnc";
+		status = "okay";
+		interrupts = <0 187 1>;
+		interrupt-names = "wave420l_irq";
+		#address-cells=<2>;
+		#size-cells=<2>;
+		ranges;
+		io_reg_base{
+			reg = <0x0 0xc8810000 0x0 0x4000>;
+		};
+	};
+
+	picdec {
+		compatible = "amlogic, picdec";
+		memory-region = <&picdec_cma_reserved>;
+		dev_name = "picdec";
+		status = "okay";
+	};
+
+	ppmgr {
+		compatible = "amlogic, ppmgr";
+		memory-region = <&ppmgr_reserved>;
+		dev_name = "ppmgr";
+		status = "okay";
+	};
+
+	deinterlace {
+		compatible = "amlogic, deinterlace";
+		status = "okay";
+		flag_cma = <1>;/*0:use reserved;1:use cma*/
+		//memory-region = <&di_reserved>;
+		memory-region = <&di_cma_reserved>;
+		interrupts = <0 46 1 0 6 1>;
+		interrupt-names = "de_irq",	"timerc";
+		/*
+		 * nr_size(byte) = 1920*544*2(yuv422 8bit) |
+		 * 1920*544*2*12/8(yuv422 10bit)
+		 * | 1920*544*2*10/8(yuv422 10bit full pack mode)
+		 */
+		/* mtn_size(byte) = 1920*544/2 */
+		/* count_size(byte) = 1920*544/2 */
+		buffer-size = <3133440>;
+		hw-version = <2>;
+	};
+
+	ionvideo {
+		compatible = "amlogic, ionvideo";
+		dev_name = "ionvideo";
+		status = "okay";
+	};
+
+	amlvideo {
+		compatible = "amlogic, amlvideo";
+		dev_name = "amlvideo";
+		status = "okay";
+	};
+
+	amlvideo2_0 {
+		compatible = "amlogic, amlvideo2";
+		dev_name = "amlvideo2";
+		status = "okay";
+		amlvideo2_id = <0>;
+		cma_mode = <1>;
+	};
+
+	amlvideo2_1 {
+		compatible = "amlogic, amlvideo2";
+		dev_name = "amlvideo2";
+		status = "okay";
+		amlvideo2_id = <1>;
+		cma_mode = <1>;
+	};
+
+	/*if you want to use vdin just modify status to "ok"*/
+	vdin0 {
+		compatible = "amlogic, vdin";
+		/*memory-region = <&vdin0_cma_reserved>;*/
+		dev_name = "vdin0";
+		status = "ok";
+		reserve-iomap = "true";
+		flag_cma = <1>;/*1:share with codec_mm;2:cma alone*/
+		/*MByte, if 10bit disable: 64M(YUV422),
+		 *if 10bit enable: 64*1.5 = 96M(YUV422)
+		 *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+		 *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+		 *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+		 *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+		 */
+		cma_size = <16>;
+		interrupts = <0 83 1>;
+		rdma-irq = <2>;
+		/*clocks = <&clock CLK_FPLL_DIV5>,
+		 *	<&clock CLK_VDIN_MEAS_CLK>;
+		 *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+		 */
+		vdin_id = <0>;
+		/*vdin write mem color depth support:
+		 *bit0:support 8bit
+		 *bit1:support 9bit
+		 *bit2:support 10bit
+		 *bit3:support 12bit
+		 *bit4:support yuv422 10bit full pack mode (from txl new add)
+		 */
+		tv_bit_mode = <1>;
+	};
+	vdin1 {
+		compatible = "amlogic, vdin";
+		memory-region = <&vdin1_cma_reserved>;
+		dev_name = "vdin1";
+		status = "ok";
+		reserve-iomap = "true";
+		flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+		interrupts = <0 85 1>;
+		rdma-irq = <4>;
+		/*clocks = <&clock CLK_FPLL_DIV5>,
+		 *	<&clock CLK_VDIN_MEAS_CLK>;
+		 *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+		 */
+		vdin_id = <1>;
+		/*vdin write mem color depth support:
+		 *bit0:support 8bit
+		 *bit1:support 9bit
+		 *bit2:support 10bit
+		 *bit3:support 12bit
+		 */
+		tv_bit_mode = <1>;
+	};
+
+	amlvecm {
+		compatible = "amlogic, vecm";
+		dev_name = "aml_vecm";
+		status = "okay";
+		gamma_en = <0>;/*1:enabel ;0:disable*/
+		wb_en = <0>;/*1:enabel ;0:disable*/
+		cm_en = <0>;/*1:enabel ;0:disable*/
+	};
+
+	unifykey{
+		compatible = "amlogic, unifykey";
+		status = "ok";
+
+		unifykey-num = <16>;
+		unifykey-index-0 = <&keysn_0>;
+		unifykey-index-1 = <&keysn_1>;
+		unifykey-index-2 = <&keysn_2>;
+		unifykey-index-3 = <&keysn_3>;
+		unifykey-index-4 = <&keysn_4>;
+		unifykey-index-5 = <&keysn_5>;
+		unifykey-index-6 = <&keysn_6>;
+		unifykey-index-7 = <&keysn_7>;
+		unifykey-index-8 = <&keysn_8>;
+		unifykey-index-9 = <&keysn_9>;
+		unifykey-index-10= <&keysn_10>;
+		unifykey-index-11= <&keysn_11>;
+		unifykey-index-12= <&keysn_12>;
+		unifykey-index-13= <&keysn_13>;
+		unifykey-index-14= <&keysn_14>;
+		unifykey-index-15= <&keysn_15>;
+
+		keysn_0: key_0{
+			key-name = "usid";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_1:key_1{
+			key-name = "mac";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_2:key_2{
+			key-name = "hdcp";
+			key-device = "secure";
+			key-type = "sha1";
+			key-permit = "read","write","del";
+		};
+		keysn_3:key_3{
+			key-name = "secure_boot_set";
+			key-device = "efuse";
+			key-permit = "write";
+		};
+		keysn_4:key_4{
+			key-name = "mac_bt";
+			key-device = "normal";
+			key-permit = "read","write","del";
+			key-type  = "mac";
+		};
+		keysn_5:key_5{
+			key-name = "mac_wifi";
+			key-device = "normal";
+			key-permit = "read","write","del";
+			key-type = "mac";
+		};
+		keysn_6:key_6{
+			key-name = "hdcp2_tx";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_7:key_7{
+			key-name = "hdcp2_rx";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_8:key_8{
+			key-name = "widevinekeybox";
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_9:key_9{
+			key-name = "deviceid";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+		keysn_10:key_10{
+			key-name = "hdcp22_fw_private";
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_11:key_11{
+			key-name = "PlayReadykeybox25";
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_12:key_12{
+			key-name = "prpubkeybox";// PlayReady
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_13:key_13{
+			key-name = "prprivkeybox";// PlayReady
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_14:key_14{
+			key-name = "attestationkeybox";// attestation key
+			key-device = "secure";
+			key-permit = "read","write","del";
+		};
+		keysn_15: key_15{
+			key-name = "region_code";
+			key-device = "normal";
+			key-permit = "read","write","del";
+		};
+	};//End unifykey
+};
+&efuse {
+	status = "ok";
+};
+
+&pwm_ef {
+	status = "okay";
+};
+
+&audio_data{
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/mesongxl_sei210.dtsi b/arch/arm64/boot/dts/amlogic/mesongxl_sei210.dtsi
new file mode 100644
index 0000000..77c62b9
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/mesongxl_sei210.dtsi
@@ -0,0 +1,1312 @@
+/*
+ * arch/arm64/boot/dts/amlogic/mesongxl.dtsi
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/amlogic,gxl-reset.h>
+#include <dt-bindings/clock/amlogic,gxl-clkc.h>
+#include <dt-bindings/iio/adc/amlogic-saradc.h>
+#include <dt-bindings/gpio/gxl.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/meson_rc.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include "mesongxbb-gpu-mali450.dtsi"
+/ {
+	cpus:cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu-map {
+			cluster0:cluster0 {
+				core0 {
+					cpu = <&CPU0>;
+				};
+				core1 {
+					cpu = <&CPU1>;
+				};
+				core2 {
+					cpu = <&CPU2>;
+				};
+				core3 {
+					cpu = <&CPU3>;
+				};
+			};
+		};
+		CPU0:cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+			clocks = <&scpi_dvfs 0>;
+			clock-names = "cpu-cluster.0";
+			cpu-idle-states = <&SYSTEM_SLEEP_0>;
+			/*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
+		};
+
+		CPU1:cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+			clocks = <&scpi_dvfs 0>;
+			clock-names = "cpu-cluster.0";
+			cpu-idle-states = <&SYSTEM_SLEEP_0>;
+			/*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
+		};
+		CPU2:cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+			clocks = <&scpi_dvfs 0>;
+			clock-names = "cpu-cluster.0";
+			cpu-idle-states = <&SYSTEM_SLEEP_0>;
+			/*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
+		};
+
+		CPU3:cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+			clocks = <&scpi_dvfs 0>;
+			clock-names = "cpu-cluster.0";
+			cpu-idle-states = <&SYSTEM_SLEEP_0>;
+			/*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
+		};
+
+
+		idle-states {
+			entry-method = "arm,psci";
+/*
+			CPU_SLEEP_0: cpu-sleep-0 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x0010000>;
+				local-timer-stop;
+				entry-latency-us = <3000>;
+				exit-latency-us = <3000>;
+				min-residency-us = <8000>;
+			};
+*/
+			SYSTEM_SLEEP_0: system-sleep-0 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x0010000>;
+				local-timer-stop;
+				entry-latency-us = <0x3fffffff>;
+				exit-latency-us = <0x40000000>;
+				min-residency-us = <0xffffffff>;
+			};
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 0xff08>,
+				<GIC_PPI 14 0xff08>,
+				<GIC_PPI 11 0xff08>,
+				<GIC_PPI 10 0xff08>;
+	};
+	timer_bc {
+		compatible = "arm, meson-bc-timer";
+		reg=   <0x0 0xc1109990 0x0 0x4 0x0 0xc1109994 0x0 0x4>;
+		timer_name = "Meson TimerF";
+		clockevent-rating=<300>;
+		clockevent-shift=<20>;
+		clockevent-features=<0x23>;
+		interrupts = <0 60 1>;
+		bit_enable=<16>;
+		bit_mode=<12>;
+		bit_resolution=<0>;
+	};
+	arm_pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <0 137 4>,
+			     <0 138 4>,
+			     <0 153 4>,
+			     <0 154 4>;
+	};
+
+	gic: interrupt-controller@2c001000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0x0 0xc4301000 0 0x1000>,
+		      <0x0 0xc4302000 0 0x0100>;
+		interrupts = <GIC_PPI 9 0xf04>;
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	meson_suspend:pm{
+		compatible = "amlogic, pm";
+		device_name = "aml_pm";
+		reg = <0x0 0xc81000a8 0x0 0x4
+			0x0 0xc810023c 0x0 0x4>;
+	};
+
+	secmon {
+		compatible = "amlogic, secmon";
+		memory-region = <&secmon_reserved>;
+		in_base_func = <0x82000020>;
+		out_base_func = <0x82000021>;
+		reserve_mem_size = <0x00300000>;
+	};
+
+	securitykey {
+		compatible = "aml, securitykey";
+		storage_query = <0x82000060>;
+		storage_read = <0x82000061>;
+		storage_write = <0x82000062>;
+		storage_tell = <0x82000063>;
+		storage_verify = <0x82000064>;
+		storage_status = <0x82000065>;
+		storage_list = <0x82000067>;
+		storage_remove = <0x82000068>;
+		storage_in_func = <0x82000023>;
+		storage_out_func = <0x82000024>;
+		storage_block_func = <0x82000025>;
+		storage_size_func = <0x82000027>;
+		storage_set_enctype = <0x8200006A>;
+		storage_get_enctype = <0x8200006B>;
+		storage_version = <0x8200006C>;
+	};
+
+	cpu_iomap{
+		compatible = "amlogic, iomap";
+		#address-cells=<2>;
+		#size-cells=<2>;
+		ranges;
+		io_cbus_base{
+			reg = <0x0 0xc1100000 0x0 0x100000>;
+		};
+		io_apb_base{
+			reg = <0x0 0xd0050000 0x0 0x50000>;
+		};
+		io_aobus_base{
+			reg = <0x0 0xc8100000 0x0 0x100000>;
+		};
+		io_vapb_base{
+			reg = <0x0 0xd0100000 0x0 0x100000>;
+		};
+		io_hiu_base{
+			reg = <0x0 0xc883c000 0x0 0x2000>;
+		};
+	};
+
+	cpu_info{
+		compatible = "amlogic, cpuinfo";
+		cpuinfo_cmd = <0x82000044>;
+		status = "okay";
+	};
+
+	watchdog {
+		compatible = "amlogic, meson-wdt";
+		status = "disabled";
+		default_timeout=<10>;
+		reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
+		reset_watchdog_time=<2>;
+		shutdown_timeout=<10>;
+		firmware_timeout=<6>;
+		suspend_timeout=<6>;
+		reg = <0x0 0xc11098d0 0x0 0x10>;
+		clock-names = "xtal";
+		clocks = <&xtal>;
+	};
+
+	jtag {
+		compatible = "amlogic, jtag";
+		status = "okay";
+		select = "apao"; /* disable/apao/apee */
+		jtagao-gpios = <&gpio   GPIOH_6         0
+				&gpio   GPIOH_7         0
+				&gpio   GPIOH_8         0
+				&gpio   GPIOH_9         0>;
+		jtagee-gpios = <&gpio   CARD_0          0
+				&gpio   CARD_1          0
+				&gpio   CARD_2          0
+				&gpio   CARD_3          0>;
+	};
+
+	mailbox: mhu@c883c400 {
+		compatible = "amlogic, meson_mhu";
+		reg = <0x0 0xc883c400 0x0 0x4c>,   /* MHU registers */
+		      <0x0 0xc8013000 0x0 0x800>;   /* Payload area */
+		interrupts = <0 209 1>,   /* low priority interrupt */
+			     <0 210 1>;   /* high priority interrupt */
+		#mbox-cells = <1>;
+		mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
+		mboxes = <&mailbox 0 &mailbox 1>;
+	};
+
+	scpi_clocks {
+		compatible = "arm, scpi-clks";
+
+		scpi_dvfs: scpi_clocks@0 {
+			compatible = "arm, scpi-clk-indexed";
+			#clock-cells = <1>;
+			clock-indices = <0>;
+			clock-output-names = "vcpu";
+		};
+
+	};
+
+	xtal: xtal-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xtal";
+		#clock-cells = <0>;
+	};
+
+	vpu {
+		compatible = "amlogic, vpu-gxl";
+		dev_name = "vpu";
+		status = "okay";
+		clocks = <&clkc CLKID_VAPB_MUX>,
+			<&clkc CLKID_VPU_INTR>,
+			<&clkc CLKID_GP0_PLL>,
+			<&clkc CLKID_VPU_P0_COMP>,
+			<&clkc CLKID_VPU_P1_COMP>,
+			<&clkc CLKID_VPU_MUX>;
+		clock-names = "vapb_clk",
+			"vpu_intr",
+			"gp_pll",
+			"vpu_clk0",
+			"vpu_clk1",
+			"vpu_clk";
+		clk_level = <7>;
+		/* 0: 100.0M    1: 166.7M    2: 200.0M    3: 250.0M */
+		/* 4: 333.3M    5: 400.0M    6: 500.0M    7: 666.7M */
+	};
+
+	spicc:@c1108d80{
+		compatible = "amlogic, spicc";
+		status = "disabled";
+		reg = <0x0 0xc1108d80 0x0 0x28>;
+		clocks = <&clkc CLKID_SPICC>;
+		clock-names = "spicc_clk";
+		interrupts = <0 81 1>;
+		device_id = <0>;
+	};
+
+	uart_AO: serial@c81004c0 {
+		compatible = "amlogic, meson-uart";
+		reg = <0x0 0xc81004c0 0x0 0x18>;
+		interrupts = <0 193 1>;
+		status = "okay";
+		clocks = <&xtal>;
+		clock-names = "clk_uart";
+		xtal_tick_en = <1>;
+		fifosize = < 64 >;
+		pinctrl-names = "default";
+		/*pinctrl-0 = <&ao_uart_pins>;*/
+		support-sysrq = <0>;	/* 0 not support , 1 support */
+	};
+
+	uart_A: serial@c11084c0 {
+		compatible = "amlogic, meson-uart";
+		reg = <0x0 0xc11084c0 0x0 0x18>;
+		interrupts = <0 26 1>;
+		status = "okay";
+		clocks = <&clkc CLKID_UART0>;
+		clock-names = "clk_uart";
+		fifosize = < 128 >;
+		pinctrl-names = "default";
+		pinctrl-0 = <&a_uart_pins>;
+	};
+
+	uart_B: serial@c11084dc {
+		compatible = "amlogic, meson-uart";
+		reg = <0x0 0xc11084dc 0x0 0x18>;
+		interrupts = <0 75 1>;
+		status = "disabled";
+		clocks = <&clkc CLKID_UART1>;
+		clock-names = "clk_uart";
+		fifosize = < 64 >;
+		pinctrl-names = "default";
+		pinctrl-0 = <&b_uart_pins>;
+	};
+
+	uart_C: serial@c1108700 {
+		compatible = "amlogic, meson-uart";
+		reg = <0x0 0xc1108700 0x0 0x18>;
+		interrupts = <0 93 1>;
+		status = "disabled";
+		clocks = <&clkc CLKID_UART2>;
+		clock-names = "clk_uart";
+		fifosize = < 64 >;
+		pinctrl-names = "default";
+		pinctrl-0 = <&c_uart_pins>;
+	};
+
+	uart_AO_B: serial@c81004e0 {
+		compatible = "amlogic, meson-uart";
+		reg = <0x0 0xc81004e0 0x0 0x18>;
+		interrupts = <0 197 1>;
+		status = "disable";
+		clocks = <&xtal>;
+		clock-names = "clk_uart";
+		fifosize = < 64 >;
+		pinctrl-names = "default";
+		pinctrl-0 = <&ao_b_uart_pins>;
+	};
+
+	pinctrl_aobus: pinctrl@14 {
+		compatible = "amlogic,meson-gxl-aobus-pinctrl";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio_ao: bank@14 {
+			reg = <0x0 0xc8100014 0x0 0x8>,
+			      <0x0 0xc810002c 0x0 0x4>,
+			      <0x0 0xc8100024 0x0 0x8>;
+			reg-names = "mux", "pull", "gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+
+	pinctrl_periphs: pinctrl@4b0 {
+		compatible = "amlogic,meson-gxl-periphs-pinctrl";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio: bank@4b0 {
+			reg = <0x0 0xc88344b0 0x0 0x28>,
+			      <0x0 0xc88344e8 0x0 0x14>,
+			      <0x0 0xc8834520 0x0 0x14>,
+			      <0x0 0xc8834430 0x0 0x40>;
+			reg-names = "mux", "pull",
+				"pull-enable", "gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		cbus: cbus@c1100000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xc1100000 0x0 0x100000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
+
+			gpio_intc: interrupt-controller@9880 {
+				compatible = "amlogic,meson-gpio-intc",
+						"amlogic,meson-gxl-gpio-intc";
+				reg = <0x0 0x9880 0x0 0x10>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				amlogic,channel-interrupts =
+					<64 65 66 67 68 69 70 71>;
+				status = "okay";
+			};
+
+			meson_clk_msr{
+				compatible = "amlogic, gxl_measure";
+				reg = <0x0 0x875c 0x0 0x4
+					0x0 0x8764 0x0 0x4>;
+			};
+
+			/*i2c-A*/
+			i2c0: i2c@8500 {
+				compatible = "amlogic,meson-gx-i2c";
+				status = "disabled";
+				reg = <0x0 0x8500 0x0 0x20>;
+				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+					<GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+
+			/*i2c-B*/
+			i2c1: i2c@87c0 {
+				compatible = "amlogic,meson-gx-i2c";
+				status = "disabled";
+				reg = <0x0 0x87c0 0x0 0x20>;
+				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
+					<GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+
+			/*i2c-C*/
+			i2c2: i2c@87e0 {
+				compatible = "amlogic,meson-gx-i2c";
+				status = "disabled";
+				reg = <0x0 0x87e0 0x0 0x20>;
+				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
+					<GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+
+			/*i2c-D*/
+			i2c3: i2c@8d20 {
+				compatible = "amlogic,meson-gx-i2c";
+				status = "disabled";
+				reg = <0x0 0x8d20 0x0 0x20>;
+				interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+					<GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+		};
+
+		aobus: aobus@c8100000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xc8100000 0x0 0x100000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
+
+			cpu_version{
+				reg=<0x0 0x0220 0x0 0x4>;
+			};
+
+			i2c_AO: i2c@0500 {
+				compatible = "amlogic,meson-gx-i2c";
+				status = "disabled";
+				reg = <0x0 0x0500 0x0 0x20>;
+				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+		};
+
+		periphs: periphs@c8834000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xc8834000 0x0 0x2000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
+		};
+
+		hiubus: hiubus@c883c000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xc883c000 0x0 0x2000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
+
+			clkc: clock-controller@0 {
+				compatible = "amlogic,gxl-clkc";
+				#clock-cells = <1>;
+				reg = <0x0 0x0 0x0 0x3db>;
+			};
+		};
+
+		apb: apb@d0000000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xd0000000 0x0 0x200000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
+		};
+	}; /* end of soc */
+}; /* end of root */
+
+&pinctrl_aobus {
+	remote_pins:remote_pin {
+		mux {
+			groups = "remote_input";
+			function = "remote";
+		};
+	};
+
+	sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
+		mux {
+			groups = "GPIOAO_0",
+					"GPIOAO_1";
+			function = "gpio_aobus";
+		};
+	};
+
+	sd_to_ao_uart_pins:sd_to_ao_uart_pins {
+		mux {
+			groups = "uart_tx_ao_a_0",
+					"uart_rx_ao_a_0";
+			function = "uart_ao";
+			bias-pull-up;
+			input-enable;
+		};
+	};
+
+	ao_uart_pins:ao_uart {
+		mux {
+			groups = "uart_tx_ao_a_0",
+				"uart_rx_ao_a_0";
+			function = "uart_ao";
+		};
+	};
+
+	ao_b_uart_pins:ao_b_uart {
+		mux {
+			groups = "uart_tx_ao_b_0",
+					"uart_rx_ao_b_0";
+			function = "uart_ao_b";
+		};
+	};
+	ao_i2c_master:ao_i2c{
+		mux {
+			groups = "i2c_sda_ao",
+				"i2c_sck_ao";
+			function = "i2c_ao";
+		};
+	};
+
+	hdmitx_aocec: hdmitx_aocec {
+		mux {
+			groups = "ao_cec";
+			function = "ao_cec";
+		};
+	};
+
+	hdmitx_eecec: hdmitx_eecec {
+		mux {
+			groups = "ee_cec";
+			function = "ee_cec";
+		};
+	};
+}; /* end of pinctrl_aobus*/
+
+&pinctrl_periphs {
+	external_eth_pins:external_eth_pins {
+		mux {
+			groups = "eth_mdio",
+				"eth_mdc",
+				"eth_clk_rx_clk",
+				"eth_rx_dv",
+				"eth_rxd0",
+				"eth_rxd1",
+				"eth_rxd2",
+				"eth_rxd3",
+				"eth_rgmii_tx_clk",
+				"eth_tx_en",
+				"eth_txd0",
+				"eth_txd1",
+				"eth_txd2",
+				"eth_txd3";
+			function = "eth";
+		};
+	};
+
+	jtag_apao_pins:jtag_apao_pin {
+		mux {
+			groups = "jtag_tdi_0",
+				"jtag_tdo_0",
+				"jtag_clk_0",
+				"jtag_tms_0";
+			function = "jtag";
+		};
+	};
+
+	jtag_apee_pins:jtag_apee_pin {
+		mux {
+			groups ="jtag_tdi_1",
+				"jtag_tdo_1",
+				"jtag_clk_1",
+				"jtag_tms_1";
+			function = "jtag";
+		};
+	};
+
+	a_uart_pins:a_uart {
+		mux {
+			groups = "uart_tx_a",
+				"uart_rx_a",
+				"uart_rts_a";
+			function = "uart_a";
+		};
+	};
+
+	b_uart_pins:b_uart {
+		mux {
+			groups = "uart_tx_b",
+				"uart_rx_b",
+				"uart_cts_b",
+				"uart_rts_b";
+			function = "uart_b";
+		};
+	};
+
+	c_uart_pins:c_uart {
+		mux {
+			groups = "uart_tx_c",
+				"uart_rx_c",
+				"uart_cts_c",
+				"uart_rts_c";
+			function = "uart_c";
+		};
+	};
+
+	wifi_32k_pins:wifi_32k_pins {
+		mux {
+			groups ="pwm_e";
+			function = "pwm_e";
+		};
+	};
+
+/*
+* sd_clk_cmd_pins:sd_clk_cmd_pins{
+* };
+* sd_all_pins:sd_all_pins {
+*  };
+* sd_1bit_uart_pins:sd_1bit_uart_pins{
+*  };
+*  sd_clk_cmd_uart_pins:sd_clk_cmd_uart_pins {
+* };
+* sd_to_ao_jtag_pins:sd_to_ao_jtag_pins{
+* };
+*/
+	ao_to_sd_uart_clr_pins:ao_to_sd_uart_clr_pins {
+		mux {
+			groups = "sdcard_d2",
+					"sdcard_d3";
+			function = "sdcard";
+			input-enable;
+			bias-pull-up;
+		};
+	};
+
+	sd_1bit_pins:sd_1bit_pins {
+		mux {
+			groups = "sdcard_d0",
+					"sdcard_cmd",
+					"sdcard_clk";
+			function = "sdcard";
+			input-enable;
+			bias-pull-up;
+		};
+	};
+
+	ao_to_sd_uart_pins:ao_to_sd_uart_pins {
+		mux {
+			groups = "uart_tx_ao_a_card4",
+					"uart_rx_ao_a_card5";
+			function = "uart_ao_a_card";
+			bias-pull-up;
+			input-enable;
+		};
+	};
+
+	emmc_clk_cmd_pins:emmc_clk_cmd_pins {
+		mux {
+			groups = "emmc_cmd",
+				"emmc_clk";
+			function = "emmc";
+			input-enable;
+			bias-pull-up;
+		};
+	};
+
+
+	emmc_conf_pull_up:emmc_conf_pull_up {
+		mux {
+			groups = "emmc_nand_d07",
+				"emmc_clk",
+				"emmc_cmd";
+			function = "emmc";
+			input-enable;
+			bias-pull-up;
+		};
+	};
+
+	emmc_conf_pull_done:emmc_conf_pull_done {
+		mux {
+			groups = "emmc_ds";
+			function = "emmc";
+			input-enable;
+			bias-pull-down;
+		};
+	};
+
+	sd_clk_cmd_pins:sd_clk_cmd_pins{
+		mux {
+			groups = "sdcard_cmd",
+				"sdcard_clk";
+			function = "sdcard";
+			input-enable;
+			bias-pull-up;
+		};
+	};
+
+	sd_all_pins:sd_all_pins{
+		mux {
+			groups = "sdcard_d0",
+				"sdcard_d1",
+				"sdcard_d2",
+				"sdcard_d3",
+				"sdcard_cmd",
+				"sdcard_clk";
+			function = "sdcard";
+			input-enable;
+			bias-pull-up;
+		};
+	};
+
+	sdio_clk_cmd_pins:sdio_clk_cmd_pins {
+		mux {
+			groups = "sdio_clk",
+				"sdio_cmd";
+			function = "sdio";
+			input-enable;
+			bias-pull-up;
+		};
+	};
+
+	sdio_all_pins:sdio_all_pins {
+		mux {
+			groups = "sdio_d0",
+				"sdio_d1",
+				"sdio_d2",
+				"sdio_d3",
+				"sdio_clk",
+				"sdio_cmd";
+			function = "sdio";
+			input-enable;
+			bias-pull-up;
+		};
+	};
+
+	nand_pulldown: nand_pulldown {
+		mux {
+			groups = "emmc_nand_d07",
+				"emmc_ds";
+			function = "emmc";
+			bias-pull-down;
+		};
+	};
+
+	nand_pullup: nand_pullup {
+		mux {
+			groups = "emmc_clk",
+				"emmc_cmd";
+			function = "emmc";
+			bias-pull-up;
+		};
+	};
+
+	all_nand_pins: all_nand_pins {
+		mux {
+			groups = "emmc_nand_d07",
+				"nand_ce0",
+				"nand_ce1",
+				"nand_rb0",
+				"nand_ale",
+				"nand_cle",
+				"nand_wen_clk",
+				"nand_ren_wr",
+				"nand_dqs";
+			function = "nand";
+			input-enable;
+		};
+	};
+
+	nand_cs_pins: nand_cs {
+		mux {
+			groups = "nand_ce0",
+				"nand_ce1";
+			function = "nand";
+		};
+	};
+
+	hdmitx_hpd: hdmitx_hpd {
+		mux {
+			groups = "hdmi_hpd";
+			function = "hdmi_hpd";
+		};
+	};
+
+	hdmitx_ddc: hdmitx_ddc {
+		mux {
+			groups = "hdmi_sda",
+				"hdmi_scl";
+			function = "hdmi_ddc";
+		};
+	};
+
+	a_i2c_master:a_i2c {
+		mux {
+			groups = "i2c_sda_a",
+				"i2c_scl_a";
+			function = "i2c_a";
+		};
+	};
+
+	b_i2c_master:b_i2c {
+		mux {
+			groups = "i2c_sda_b",
+				"i2c_scl_b";
+			function = "i2c_b";
+		};
+	};
+
+	/* c_i2c_master:	  dv28 dv29 */
+	/* c_i2c_master_pin1: dv18 dv19 */
+	c_i2c_master:c_i2c {
+		mux {
+			groups = "i2c_sda_c_dv28",
+				"i2c_scl_c_dv29";
+			function = "i2c_c";
+		};
+	};
+	c_i2c_master_pin1:c_i2c_pin1{
+		mux {
+			groups = "i2c_sda_c_dv18",
+				"i2c_scl_c_dv19";
+			function = "i2c_c";
+		};
+	};
+
+	d_i2c_master:d_i2c {
+		mux {
+		groups = "i2c_sda_d",
+			"i2c_scl_d";
+		function = "i2c_d";
+		};
+	};
+
+	spicc_pulldown_z11z12z13: spicc_pulldown_z11z12z13 {
+		mux {
+			groups = "spi_sclk_0",
+				"spi_miso_0",
+				"spi_mosi_0";
+			function = "spi";
+		};
+	};
+
+	spicc_pullup_z11z12z13: spicc_pullup_z11z12z13 {
+		mux {
+			groups = "spi_sclk_0",
+				"spi_miso_0",
+				"spi_mosi_0";
+			function = "spi";
+		};
+	};
+
+	spicc_pulldown_x8x9x11: spicc_pulldown_x8x9x11 {
+		mux {
+			groups = "spi_sclk_1",
+				"spi_miso_1",
+				"spi_mosi_1";
+			function = "spi";
+			bias-pull-down;
+		};
+	};
+
+	spicc_pullup_x8x9x11: spicc_pullup_x8x9x11 {
+		mux {
+			groups = "spi_sclk_1",
+				"spi_miso_1",
+				"spi_mosi_1";
+			function = "spi";
+			bias-pull-up;
+		};
+	};
+
+	audio_i2s_pins:audio_i2s {
+		mux {
+			groups = "i2s_am_clk",
+				"i2s_ao_clk_out",
+				"i2s_lr_clk_out",
+				"i2sout_ch01";
+			function = "i2s";
+		};
+	};
+
+	audio_spdif_pins:audio_spdif {
+		mux {
+			groups = "spdif_out";
+			function = "spdif_out";
+		};
+	};
+
+	audio_spdif_in_pins:audio_spdif_in {
+		mux {
+			groups = "spdif_in_z14";
+			function = "spdif_in";
+		};
+	};
+
+	audio_spdif_in_1_pins:audio_spdif_in_1 {
+		mux {
+			groups = "spdif_in_h4";
+			function = "spdif_in";
+		};
+	};
+
+	audio_pcm_pins:audio_pcm {
+		mux {
+			groups = "pcm_out_a",
+				"pcm_in_a",
+				"pcm_fs_a",
+				"pcm_clk_a";
+			function = "pcm_a";
+		};
+	};
+	aml_dmic_pins:audio_dmic {
+		mux {
+			groups = "dmic_in_dv24",
+					"dmic_clk_dv25";
+			function = "dmic";
+		};
+	};
+	dvb_p_ts0_pins: dvb_p_ts0_pins {
+			tsin_a {
+				groups = "tsin_sop_a_dv9",
+				"tsin_d_valid_a_dv10",
+				"tsin_d0_a_dv0",
+				"tsin_d1_7_a_dv1_7",
+				"tsin_clk_a_dv8";
+				function = "tsin_a";
+			};
+		};
+	dvb_s_ts0_pins: dvb_s_ts0_pins {
+			tsin_a {
+				groups = "tsin_sop_a_dv9",
+					"tsin_d_valid_a_dv10",
+					"tsin_clk_a_dv8",
+					"tsin_d0_a_dv0";
+				function = "tsin_a";
+			};
+		};
+
+}; /* end of pinctrl_periphs */
+
+&periphs {
+	rng {
+		compatible = "amlogic,meson-rng";
+		reg = <0x0 0x0 0x0 0x4>;
+	};
+};
+
+&cbus{
+	reset: reset-controller@4404 {
+		compatible = "amlogic,reset";
+		reg = <0x0 0x04404 0x0 0x20>;
+		#reset-cells = <1>;
+	};
+};
+
+/{
+	aml_dma {
+		compatible = "amlogic,aml_gxl_dma";
+		reg = <0x0 0xc883e000 0x0 0x28>;
+		interrupts = <0 188 1>;
+
+		aml_aes {
+			compatible = "amlogic,aes_dma";
+			dev_name = "aml_aes_dma";
+			status = "okay";
+		};
+
+		aml_tdes {
+			compatible = "amlogic,des_dma,tdes_dma";
+			dev_name = "aml_tdes_dma";
+			status = "okay";
+		};
+	};
+
+	audio_data:audio_data {
+	   compatible = "amlogic, audio_data";
+	   query_licence_cmd = <0x82000050>;
+	   status = "disabled";
+	};
+
+	saradc: saradc {
+		compatible = "amlogic,meson-gxl-saradc";
+		status = "okay";
+		#io-channel-cells = <1>;
+		clocks = <&xtal>, <&clkc CLKID_SARADC>,
+				<&clkc CLKID_SARADC_COMP>;
+		clock-names = "xtal", "clk81_gate", "saradc_clk";
+		interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
+		reg = <0x0 0xc1108680 0x0 0x38>;
+	};
+
+	efuse: efuse{
+		compatible = "amlogic, efuse";
+		read_cmd = <0x82000030>;
+		write_cmd = <0x82000031>;
+		get_max_cmd = <0x82000033>;
+		key = <&efusekey>;
+		clocks = <&clkc CLKID_EFUSE>;
+		clock-names = "efuse_clk";
+		status = "disabled";
+	};
+
+	efusekey:efusekey{
+		keynum = <4>;
+		key0 = <&key_0>;
+		key1 = <&key_1>;
+		key2 = <&key_2>;
+		key3 = <&key_3>;
+		key_0:key_0{
+			keyname = "mac";
+			offset = <0>;
+			size = <6>;
+		};
+		key_1:key_1{
+			keyname = "mac_bt";
+			offset = <6>;
+			size = <6>;
+		};
+		key_2:key_2{
+			keyname = "mac_wifi";
+			offset = <12>;
+			size = <6>;
+		};
+		key_3:key_3{
+			keyname = "usid";
+			offset = <18>;
+			size = <16>;
+		};
+	};
+
+	remote:rc@c8100580 {
+		compatible = "amlogic, aml_remote";
+		dev_name = "meson-remote";
+		reg = <0x0 0xc8100580 0x00 0x44>, /*Multi-format IR controller*/
+			<0x0 0xc8100480 0x00 0x20>; /*Legacy IR controller*/
+		status = "okay";
+		protocol = <REMOTE_TYPE_NEC>;
+		interrupts = <0 196 1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&remote_pins>;
+		map = <&custom_maps>;
+		max_frame_time = <200>; /*set software decoder max frame time*/
+	};
+
+	custom_maps:custom_maps {
+		mapnum = <3>;
+		map0 = <&map_0>;
+		map1 = <&map_1>;
+		map2 = <&map_2>;
+		map_0: map_0{
+			mapname = "amlogic-remote-1";
+			customcode = <0xfb04>;
+			release_delay = <80>;
+			size  = <50>;   /*keymap size*/
+			keymap = <REMOTE_KEY(0x47, KEY_0)
+				REMOTE_KEY(0x13, KEY_1)
+				REMOTE_KEY(0x10, KEY_2)
+				REMOTE_KEY(0x11, KEY_3)
+				REMOTE_KEY(0x0F, KEY_4)
+				REMOTE_KEY(0x0C, KEY_5)
+				REMOTE_KEY(0x0D, KEY_6)
+				REMOTE_KEY(0x0B, KEY_7)
+				REMOTE_KEY(0x08, KEY_8)
+				REMOTE_KEY(0x09, KEY_9)
+				REMOTE_KEY(0x5C, KEY_RIGHTCTRL)
+				REMOTE_KEY(0x51, KEY_F3)
+				REMOTE_KEY(0x50, KEY_F4)
+				REMOTE_KEY(0x40, KEY_F5)
+				REMOTE_KEY(0x4d, KEY_F6)
+				REMOTE_KEY(0x43, KEY_F7)
+				REMOTE_KEY(0x17, KEY_F8)
+				REMOTE_KEY(0x00, KEY_F9)
+				REMOTE_KEY(0x01, KEY_F10)
+				REMOTE_KEY(0x16, KEY_F11)
+				REMOTE_KEY(0x49, KEY_BACKSPACE)
+				REMOTE_KEY(0x06, KEY_PROPS)
+				REMOTE_KEY(0x14, KEY_UNDO)
+				REMOTE_KEY(0x44, KEY_UP)
+				REMOTE_KEY(0x1D, KEY_DOWN)
+				REMOTE_KEY(0x1C, KEY_LEFT)
+				REMOTE_KEY(0x48, KEY_RIGHT)
+				REMOTE_KEY(0x53, KEY_LEFTMETA)
+				REMOTE_KEY(0x45, KEY_PAGEUP)
+				REMOTE_KEY(0x19, KEY_PAGEDOWN)
+				REMOTE_KEY(0x52, KEY_PAUSE)
+				REMOTE_KEY(0x05, KEY_HANGEUL)
+				REMOTE_KEY(0x59, KEY_HANJA)
+				REMOTE_KEY(0x1b, KEY_SCALE)
+				REMOTE_KEY(0x04, KEY_KPCOMMA)
+				REMOTE_KEY(0x1A, KEY_POWER)
+				REMOTE_KEY(0x0A, KEY_TAB)
+				REMOTE_KEY(0x0e, KEY_MUTE)
+				REMOTE_KEY(0x1F, KEY_HOME)
+				REMOTE_KEY(0x1e, KEY_FRONT)
+				REMOTE_KEY(0x07, KEY_COPY)
+				REMOTE_KEY(0x12, KEY_OPEN)
+				REMOTE_KEY(0x54, KEY_PASTE)
+				REMOTE_KEY(0x02, KEY_FIND)
+				REMOTE_KEY(0x4f, KEY_A)
+				REMOTE_KEY(0x42, KEY_B)
+				REMOTE_KEY(0x5d, KEY_C)
+				REMOTE_KEY(0x4c, KEY_D)
+				REMOTE_KEY(0x58, KEY_CUT)
+				REMOTE_KEY(0x55, KEY_CALC)>;
+		};
+		map_1: map_1{
+			mapname = "amlogic-remote-2";
+			customcode = <0xfe01>;
+			release_delay = <80>;
+			size  = <53>;
+			keymap = <REMOTE_KEY(0x01, KEY_1)
+				REMOTE_KEY(0x02, KEY_2)
+				REMOTE_KEY(0x03, KEY_3)
+				REMOTE_KEY(0x04, KEY_4)
+				REMOTE_KEY(0x05, KEY_5)
+				REMOTE_KEY(0x06, KEY_6)
+				REMOTE_KEY(0x07, KEY_7)
+				REMOTE_KEY(0x08, KEY_8)
+				REMOTE_KEY(0x09, KEY_9)
+				REMOTE_KEY(0x0a, KEY_0)
+				REMOTE_KEY(0x1F, KEY_FN_F1)
+				REMOTE_KEY(0x15, KEY_MENU)
+				REMOTE_KEY(0x16, KEY_TAB)
+				REMOTE_KEY(0x0c, KEY_CHANNELUP)
+				REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+				REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+				REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+				REMOTE_KEY(0x11, KEY_HOME)
+				REMOTE_KEY(0x1c, KEY_RIGHT)
+				REMOTE_KEY(0x1b, KEY_LEFT)
+				REMOTE_KEY(0x19, KEY_UP)
+				REMOTE_KEY(0x1a, KEY_DOWN)
+				REMOTE_KEY(0x1d, KEY_ENTER)
+				REMOTE_KEY(0x17, KEY_MUTE)
+				REMOTE_KEY(0x49, KEY_FINANCE)
+				REMOTE_KEY(0x43, KEY_BACK)
+				REMOTE_KEY(0x12, KEY_FN_F4)
+				REMOTE_KEY(0x14, KEY_FN_F5)
+				REMOTE_KEY(0x18, KEY_FN_F6)
+				REMOTE_KEY(0x59, KEY_INFO)
+				REMOTE_KEY(0x5a, KEY_STOPCD)
+				REMOTE_KEY(0x10, KEY_POWER)
+				REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+				REMOTE_KEY(0x44, KEY_NEXTSONG)
+				REMOTE_KEY(0x1e, KEY_REWIND)
+				REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+				REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+				REMOTE_KEY(0x46, KEY_PROPS)
+				REMOTE_KEY(0x40, KEY_UNDO)
+				REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+				REMOTE_KEY(0x57, KEY_FN)
+				REMOTE_KEY(0x5b, KEY_FN_ESC)
+				REMOTE_KEY(0x54, KEY_RED)
+				REMOTE_KEY(0x4c, KEY_GREEN)
+				REMOTE_KEY(0x4e, KEY_YELLOW)
+				REMOTE_KEY(0x55, KEY_BLUE)
+				REMOTE_KEY(0x53, KEY_BLUETOOTH)
+				REMOTE_KEY(0x52, KEY_WLAN)
+				REMOTE_KEY(0x39, KEY_CAMERA)
+				REMOTE_KEY(0x41, KEY_SOUND)
+				REMOTE_KEY(0x0b, KEY_QUESTION)
+				REMOTE_KEY(0x00, KEY_CHAT)
+				REMOTE_KEY(0x13, KEY_SEARCH)>;
+		};
+		map_2: map_2{
+			mapname = "amlogic-remote-3";
+			customcode = <0xbd02>;
+			release_delay = <80>;
+			size  = <17>;
+			keymap = <REMOTE_KEY(0xca,103)
+				REMOTE_KEY(0xd2,108)
+				REMOTE_KEY(0x99,105)
+				REMOTE_KEY(0xc1,106)
+				REMOTE_KEY(0xce,97)
+				REMOTE_KEY(0x45,116)
+				REMOTE_KEY(0xc5,133)
+				REMOTE_KEY(0x80,113)
+				REMOTE_KEY(0xd0,15)
+				REMOTE_KEY(0xd6,125)
+				REMOTE_KEY(0x95,102)
+				REMOTE_KEY(0xdd,104)
+				REMOTE_KEY(0x8c,109)
+				REMOTE_KEY(0x89,131)
+				REMOTE_KEY(0x9c,130)
+				REMOTE_KEY(0x9a,120)
+				REMOTE_KEY(0xcd,121)>;
+		};
+	};
+	aml_reboot{
+		compatible = "aml, reboot";
+		sys_reset = <0x84000009>;
+		sys_poweroff = <0x84000008>;
+	};
+
+	rtc{
+		compatible = "amlogic, aml_vrtc";
+		alarm_reg_addr = <0xc81000a8>;
+		timer_e_addr = <0xc1109988>;
+		init_date = "2017/01/01";
+		status = "okay";
+	};
+
+    pwm_ab: pwm@c1108550 {
+		compatible = "amlogic,gx-ee-pwm";
+		reg = <0x0 0xc1108550 0x0 0x1c>;
+		#pwm-cells = <3>;
+		clocks = <&xtal>,<&xtal>,<&xtal>,<&xtal>;
+		clock-names = "clkin0","clkin1","clkin2","clkin3";
+		status = "disabled";
+	};
+    pwm_cd: pwm@c1108640 {
+		compatible = "amlogic,gx-ee-pwm";
+		reg = <0x0 0xc1108640 0x0 0x1c>;
+		#pwm-cells = <3>;
+		clocks = <&xtal>,<&xtal>,<&xtal>,<&xtal>;
+		clock-names = "clkin0","clkin1","clkin2","clkin3";
+		status = "disabled";
+	};
+    pwm_ef: pwm@c11086c0 {
+		compatible = "amlogic,gx-ee-pwm";
+		reg = <0x0 0xc11086c0 0x0 0x1c>;
+		#pwm-cells = <3>;
+		clocks = <&xtal>,<&xtal>,<&xtal>,<&xtal>;
+		clock-names = "clkin0","clkin1","clkin2","clkin3";
+		status = "disabled";
+	};
+    pwm_aoab: pwm@c8100550 {
+		compatible = "amlogic,gx-ao-pwm";
+		reg = <0x0 0xc8100550 0x0 0x1c>;
+		#pwm-cells = <3>;
+		clocks = <&xtal>,<&xtal>,<&xtal>,<&xtal>;
+		clock-names = "clkin0","clkin1","clkin2","clkin3";
+		status = "disabled";
+	};
+};
+
+&gpu{
+	/*gpu max freq is 750M*/
+	tbl = <&clk125_cfg &clk285_cfg &clk400_cfg
+		   &clk500_cfg &clk500_cfg &clk500_cfg &clk500_cfg>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/mesontxlx.dtsi b/arch/arm64/boot/dts/amlogic/mesontxlx.dtsi
index 9330b5ad..2437a9e4 100644
--- a/arch/arm64/boot/dts/amlogic/mesontxlx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/mesontxlx.dtsi
@@ -477,7 +477,7 @@
 			mapname = "amlogic-remote-2";
 			customcode = <0xfe01>;
 			release_delay = <80>;
-			size  = <53>;
+			size  = <57>;
 			keymap = <REMOTE_KEY(0x01, KEY_1)
 				REMOTE_KEY(0x02, KEY_2)
 				REMOTE_KEY(0x03, KEY_3)
@@ -530,7 +530,11 @@
 				REMOTE_KEY(0x41, KEY_SOUND)
 				REMOTE_KEY(0x0b, KEY_QUESTION)
 				REMOTE_KEY(0x00, KEY_CHAT)
-				REMOTE_KEY(0x13, KEY_SEARCH)>;
+				REMOTE_KEY(0x13, KEY_SEARCH)
+				REMOTE_KEY(0x60, KEY_CONNECT)
+				REMOTE_KEY(0x61, KEY_PROG1)
+				REMOTE_KEY(0x62, KEY_PROG2)
+				REMOTE_KEY(0x63, KEY_PROG3)>;
 		};
 		map_2: map_2{
 			mapname = "amlogic-remote-3";
diff --git a/arch/arm64/boot/dts/amlogic/partition_mbox_normal_P_32_atom.dtsi b/arch/arm64/boot/dts/amlogic/partition_mbox_normal_P_32_atom.dtsi
new file mode 100644
index 0000000..b1db28a
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/partition_mbox_normal_P_32_atom.dtsi
@@ -0,0 +1,126 @@
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+
+#include "firmware_normal.dtsi"
+
+/ {
+    partitions: partitions{
+		parts = <17>;
+		part-0 = <&logo>;
+		part-1 = <&recovery>;
+		part-2 = <&misc>;
+		part-3 = <&dto>;
+		part-4 = <&cri_data>;
+		part-5 = <&param>;
+		part-6 = <&boot>;
+		part-7 = <&rsv>;
+		part-8 = <&metadata>;
+		part-9 = <&vbmeta>;
+		part-10 = <&tee>;
+		part-11 = <&vendor>;
+		part-12 = <&odm>;
+		part-13 = <&system>;
+		part-14 = <&product>;
+		part-15 = <&cache>;
+		part-16 = <&data>;
+
+		logo:logo{
+			pname = "logo";
+			size = <0x0 0x800000>;
+			mask = <1>;
+		};
+		recovery:recovery{
+			pname = "recovery";
+			size = <0x0 0x1800000>;
+			mask = <1>;
+		};
+		misc:misc{
+			pname = "misc";
+			size = <0x0 0x800000>;
+			mask = <1>;
+		};
+		dto:dto{
+			pname = "dto";
+			size = <0x0 0x800000>;
+			mask = <1>;
+		};
+		cri_data:cri_data
+		{
+			pname = "cri_data";
+			size = <0x0 0x800000>;
+			mask = <2>;
+		};
+		rsv:rsv{
+			pname = "rsv";
+			size = <0x0 0x1000000>;
+			mask = <1>;
+		};
+		metadata:metadata{
+			pname = "metadata";
+			size = <0x0 0x1000000>;
+			mask = <1>;
+		};
+		vbmeta:vbmeta{
+			pname = "vbmeta";
+			size = <0x0 0x200000>;
+			mask = <1>;
+		};
+		param:param{
+			pname = "param";
+			size = <0x0 0x1000000>;
+			mask = <2>;
+		};
+		boot:boot
+		{
+			pname = "boot";
+			size = <0x0 0x1000000>;
+			mask = <1>;
+		};
+		tee:tee{
+			pname = "tee";
+			size = <0x0 0x2000000>;
+			mask = <1>;
+		};
+		vendor:vendor
+		{
+			pname = "vendor";
+			size = <0x0 0x9C00000>;
+			mask = <1>;
+		};
+		odm:odm
+		{
+			pname = "odm";
+			size = <0x0 0x4000000>;
+			mask = <1>;
+		};
+		system:system
+		{
+			pname = "system";
+			size = <0x0 0x70800000>;
+			mask = <1>;
+		};
+		product:product{
+			pname = "product";
+			size = <0x0 0x4000000>;
+			mask = <1>;
+		};
+		cache:cache
+		{
+			pname = "cache";
+			size = <0x0 0x2BC00000>;
+			mask = <2>;
+		};
+		data:data
+		{
+			pname = "data";
+			size = <0xffffffff 0xffffffff>;
+			mask = <4>;
+		};
+	};
+};/* end of / */
diff --git a/arch/arm64/boot/dts/amlogic/partition_mbox_normal_P_32_sei.dtsi b/arch/arm64/boot/dts/amlogic/partition_mbox_normal_P_32_sei.dtsi
new file mode 100644
index 0000000..dffdb42
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/partition_mbox_normal_P_32_sei.dtsi
@@ -0,0 +1,126 @@
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+
+#include "firmware_normal.dtsi"
+
+/ {
+    partitions: partitions{
+		parts = <17>;
+		part-0 = <&logo>;
+		part-1 = <&recovery>;
+		part-2 = <&misc>;
+		part-3 = <&dto>;
+		part-4 = <&cri_data>;
+		part-5 = <&param>;
+		part-6 = <&boot>;
+		part-7 = <&rsv>;
+		part-8 = <&metadata>;
+		part-9 = <&vbmeta>;
+		part-10 = <&tee>;
+		part-11 = <&vendor>;
+		part-12 = <&odm>;
+		part-13 = <&system>;
+		part-14 = <&product>;
+		part-15 = <&cache>;
+		part-16 = <&data>;
+
+		logo:logo{
+			pname = "logo";
+			size = <0x0 0x800000>;
+			mask = <1>;
+		};
+		recovery:recovery{
+			pname = "recovery";
+			size = <0x0 0x1800000>;
+			mask = <1>;
+		};
+		misc:misc{
+			pname = "misc";
+			size = <0x0 0x800000>;
+			mask = <1>;
+		};
+		dto:dto{
+			pname = "dto";
+			size = <0x0 0x800000>;
+			mask = <1>;
+		};
+		cri_data:cri_data
+		{
+			pname = "cri_data";
+			size = <0x0 0x800000>;
+			mask = <2>;
+		};
+		rsv:rsv{
+			pname = "rsv";
+			size = <0x0 0x1000000>;
+			mask = <1>;
+		};
+		metadata:metadata{
+			pname = "metadata";
+			size = <0x0 0x1000000>;
+			mask = <1>;
+		};
+		vbmeta:vbmeta{
+			pname = "vbmeta";
+			size = <0x0 0x200000>;
+			mask = <1>;
+		};
+		param:param{
+			pname = "param";
+			size = <0x0 0x1000000>;
+			mask = <2>;
+		};
+		boot:boot
+		{
+			pname = "boot";
+			size = <0x0 0x1000000>;
+			mask = <1>;
+		};
+		tee:tee{
+			pname = "tee";
+			size = <0x0 0x2000000>;
+			mask = <1>;
+		};
+		vendor:vendor
+		{
+			pname = "vendor";
+			size = <0x0 0x10000000>;
+			mask = <1>;
+		};
+		odm:odm
+		{
+			pname = "odm";
+			size = <0x0 0x8000000>;
+			mask = <1>;
+		};
+		system:system
+		{
+			pname = "system";
+			size = <0x0 0x50000000>;
+			mask = <1>;
+		};
+		product:product{
+			pname = "product";
+			size = <0x0 0x8000000>;
+			mask = <1>;
+		};
+		cache:cache
+		{
+			pname = "cache";
+			size = <0x0 0x32000000>;
+			mask = <2>;
+		};
+		data:data
+		{
+			pname = "data";
+			size = <0xffffffff 0xffffffff>;
+			mask = <4>;
+		};
+	};
+};/* end of / */
diff --git a/arch/arm64/boot/dts/amlogic/partition_mbox_normal_sei32bit.dtsi b/arch/arm64/boot/dts/amlogic/partition_mbox_normal_sei32bit.dtsi
new file mode 100644
index 0000000..75984be
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/partition_mbox_normal_sei32bit.dtsi
@@ -0,0 +1,141 @@
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+/ {
+    partitions: partitions{
+		parts = <14>;
+		part-0 = <&logo>;
+		part-1 = <&recovery>;
+		part-2 = <&misc>;
+		part-3 = <&dto>;
+		part-4 = <&cri_data>;
+		part-5 = <&param>;
+		part-6 = <&boot>;
+		part-7 = <&rsv>;
+		part-8 = <&tee>;
+		part-9 = <&vendor>;
+		part-10 = <&odm>;
+		part-11 = <&system>;
+		part-12 = <&cache>;
+		part-13 = <&data>;
+
+		logo:logo{
+			pname = "logo";
+			size = <0x0 0x800000>;
+			mask = <1>;
+		};
+		recovery:recovery{
+			pname = "recovery";
+			size = <0x0 0x1800000>;
+			mask = <1>;
+		};
+		misc:misc{
+			pname = "misc";
+			size = <0x0 0x800000>;
+			mask = <1>;
+		};
+		dto:dto{
+			pname = "dto";
+			size = <0x0 0x800000>;
+			mask = <1>;
+		};
+		cri_data:cri_data
+		{
+			pname = "cri_data";
+			size = <0x0 0x800000>;
+			mask = <2>;
+		};
+		rsv:rsv{
+			pname = "rsv";
+			size = <0x0 0x1000000>;
+			mask = <1>;
+		};
+		param:param{
+			pname = "param";
+			size = <0x0 0x1000000>;
+			mask = <2>;
+		};
+		boot:boot
+		{
+			pname = "boot";
+			size = <0x0 0x1000000>;
+			mask = <1>;
+		};
+		tee:tee{
+			pname = "tee";
+			size = <0x0 0x2000000>;
+			mask = <1>;
+		};
+		vendor:vendor
+		{
+			pname = "vendor";
+			size = <0x0 0x10000000>;
+			mask = <1>;
+		};
+		odm:odm
+		{
+			pname = "odm";
+			size = <0x0 0x9000000>;
+			mask = <1>;
+		};
+		system:system
+		{
+			pname = "system";
+			size = <0x0 0x67000000>;
+			mask = <1>;
+		};
+		cache:cache
+		{
+			pname = "cache";
+			size = <0x0 0x32000000>;
+			mask = <2>;
+		};
+		data:data
+		{
+			pname = "data";
+			size = <0xffffffff 0xffffffff>;
+			mask = <4>;
+		};
+	};
+
+	firmware {
+		android {
+			compatible = "android,firmware";
+			vbmeta {
+				compatible = "android,vbmeta";
+				parts = "boot,system,vendor";
+				by_name_prefix="/dev/block";
+			};
+		fstab {
+			compatible = "android,fstab";
+			system {
+				compatible = "android,system";
+				dev = "/dev/block/system";
+				type = "ext4";
+				mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+				fsmgr_flags = "wait";
+				};
+
+			vendor {
+				compatible = "android,vendor";
+				dev = "/dev/block/vendor";
+				type = "ext4";
+				mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+				fsmgr_flags = "wait";
+				};
+			odm {
+				compatible = "android,odm";
+				dev = "/dev/block/odm";
+				type = "ext4";
+				mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+				fsmgr_flags = "wait";
+				};
+			};
+		};
+	};
+};/* end of / */
diff --git a/arch/arm64/configs/meson64_defconfig b/arch/arm64/configs/meson64_defconfig
index 2827591..a32ca70 100644
--- a/arch/arm64/configs/meson64_defconfig
+++ b/arch/arm64/configs/meson64_defconfig
@@ -476,6 +476,7 @@ CONFIG_AMLOGIC_SND_SOC_SSM3525=y
 CONFIG_AMLOGIC_SND_SOC_SSM3515=y
 CONFIG_AMLOGIC_SND_SOC_TAS575X=y
 CONFIG_AMLOGIC_SND_SOC_AD82584F=y
+CONFIG_AMLOGIC_SND_SOC_CS42528=y
 CONFIG_AMLOGIC_SND_SOC=y
 CONFIG_AMLOGIC_SND_SOC_MESON=y
 CONFIG_AMLOGIC_SND_SOC_AUGE=y
diff --git a/scripts/amlogic/mk_dtb_gx.sh b/scripts/amlogic/mk_dtb_gx.sh
index 58bca0a..28fb3d5 100755..100644
--- a/scripts/amlogic/mk_dtb_gx.sh
+++ b/scripts/amlogic/mk_dtb_gx.sh
@@ -12,6 +12,10 @@ make ARCH=arm64 gxl_p212_2g.dtb || echo "Compile dtb Fail !!"
 
 make ARCH=arm64 gxl_p212_1g.dtb || echo "Compile dtb Fail !!"
 
+make ARCH=arm64 gxl_sei210_2g.dtb || echo "Compile dtb Fail !!"
+
+make ARCH=arm64 gxl_sei210_1g.dtb || echo "Compile dtb Fail !!"
+
 make ARCH=arm64 gxl_p400_2g.dtb || echo "Compile dtb Fail !!"
 
 make ARCH=arm64 gxl_p401_2g.dtb || echo "Compile dtb Fail !!"
diff --git a/sound/soc/amlogic/meson/tv.c b/sound/soc/amlogic/meson/tv.c
index 33a698a..b204914 100644
--- a/sound/soc/amlogic/meson/tv.c
+++ b/sound/soc/amlogic/meson/tv.c
@@ -1299,7 +1299,7 @@ static int aml_asoc_init(struct snd_soc_pcm_runtime *rtd)
 	p_aml_audio->av_mute_desc =
 		gpiod_get(card->dev,
 				"mute_gpio",
-				GPIOD_OUT_HIGH);
+				0);
 	of_property_read_u32(card->dev->of_node, "av_mute_inv",
 		&p_aml_audio->av_mute_inv);
 	of_property_read_u32(card->dev->of_node, "sleep_time",
@@ -1309,7 +1309,7 @@ static int aml_asoc_init(struct snd_soc_pcm_runtime *rtd)
 	p_aml_audio->amp_mute_desc =
 		gpiod_get(card->dev,
 				"amp_mute_gpio",
-				GPIOD_OUT_HIGH);
+				0);
 	of_property_read_u32(card->dev->of_node, "amp_mute_inv",
 		&p_aml_audio->amp_mute_inv);
 
diff --git a/sound/soc/codecs/amlogic/Kconfig b/sound/soc/codecs/amlogic/Kconfig
index e88add8..6e7160b 100644
--- a/sound/soc/codecs/amlogic/Kconfig
+++ b/sound/soc/codecs/amlogic/Kconfig
@@ -166,4 +166,14 @@ config AMLOGIC_SND_SOC_AD82584F
 		Enable Support for ESMT AD82584f CODEC.
 		Select this if your AD82584F is connected via an I2C bus.
 
+config AMLOGIC_SND_SOC_CS42528
+	bool "Cirrus Logic CS42528"
+	depends on AMLOGIC_SND_SOC_CODECS
+	depends on I2C
+	default n
+	help
+		Enable Support for Cirrus Logic CS42528 CODEC.
+		Select this if your CS425X8 is connected via an I2C bus.
+		Enable Support for Cirrus Logic CS42528 CODEC.
+		Select this if your CS42528 is connected via an I2C bus.
 #endif #AMLOGIC_SND_SOC_CODECS
diff --git a/sound/soc/codecs/amlogic/Makefile b/sound/soc/codecs/amlogic/Makefile
index c64a36c..1ba930a 100644
--- a/sound/soc/codecs/amlogic/Makefile
+++ b/sound/soc/codecs/amlogic/Makefile
@@ -36,3 +36,4 @@ obj-$(CONFIG_AMLOGIC_SND_SOC_SSM3525) += snd-soc-ssm3525.o
 obj-$(CONFIG_AMLOGIC_SND_SOC_TAS575X) += tas575x.o
 obj-$(CONFIG_AMLOGIC_SND_SOC_ES7243) += es7243.o
 obj-$(CONFIG_AMLOGIC_SND_SOC_AD82584F) += ad82584f.o
+obj-$(CONFIG_AMLOGIC_SND_SOC_CS42528) += cs42528.o
diff --git a/sound/soc/codecs/amlogic/cs42528.c b/sound/soc/codecs/amlogic/cs42528.c
new file mode 100644
index 0000000..f1f0c96
--- a/dev/null
+++ b/sound/soc/codecs/amlogic/cs42528.c
@@ -0,0 +1,549 @@
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/tlv.h>
+#include <linux/amlogic/aml_gpio_consumer.h>
+
+#include "cs42528.h"
+
+#define DEV_NAME	"cs42528"
+
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+static void cs42528_early_suspend(struct early_suspend *h);
+static void cs42528_late_resume(struct early_suspend *h);
+#endif
+
+/* Power-up register defaults */
+struct reg_default cs42528_reg_defaults[] = {
+	{ 0x00, 0x00 },
+	{ 0x03, 0x08 },	/* Functional Mode */
+	{ 0x04, 0x40 },	/* Interface Formats */
+	{ 0x05, 0x80 },	/* Misc Control */
+	{ 0x06, 0x02 },	/* Clock Control */
+	{ 0x0D, 0x28 },	/* Volume Control */
+	{ 0x0E, 0xff },	/* Channel Mute */
+	{ 0x0F, 0x00 },	/* Volume Control A1 */
+	{ 0x10, 0x00 },	/* Volume Control B1 */
+	{ 0x11, 0x00 },	/* Volume Control A2 */
+	{ 0x12, 0x00 },	/* Volume Control B2 */
+	{ 0x13, 0x00 },	/* Volume Control A3 */
+	{ 0x14, 0x00 },	/* Volume Control B3 */
+	{ 0x15, 0x00 },	/* Volume Control A4 */
+	{ 0x16, 0x00 },	/* Volume Control B4 */
+	{ 0x17, 0x00 },	/* Channel invert */
+	{ 0x18, 0x09 },	/* Mixing Ctrl Pair 1 */
+	{ 0x19, 0x09 },	/* Mixing Ctrl Pair 2 */
+	{ 0x1A, 0x09 },	/* Mixing Ctrl Pair 3 */
+	{ 0x1B, 0x09 },	/* Mixing Ctrl Pair 4 */
+	{ 0x1C, 0x00 },	/* ADC Left Ch. Gain */
+	{ 0x1D, 0x00 },	/* ADC Right Ch. Gain */
+	{ 0x1E, 0x80 },	/* RVCR Mode Ctrl 1 */
+	{ 0x1F, 0x00 },	/* RVCR Mode Ctrl 2 */
+	{ 0x24, 0x00 },	/* Channel Status Data Buffer Control */
+	{ 0x28, 0x1f },	/* MuteC Pin Control */
+};
+
+#define CS42528_REG_COUNT 26
+static int cs42528_reg_table[CS42528_REG_COUNT][2] = {
+	{ 0x00, 0x00 },
+	{ 0x03, 0x08 },	/* Functional Mode */
+	{ 0x04, 0x40 },	/* Interface Formats */
+	{ 0x05, 0x80 },	/* Misc Control */
+	{ 0x06, 0x02 },	/* Clock Control */
+	{ 0x0D, 0x28 },	/* Volume Control */
+	{ 0x0E, 0xff },	/* Channel Mute */
+	{ 0x0F, 0x00 },	/* Volume Control A1 */
+	{ 0x10, 0x00 },	/* Volume Control B1 */
+	{ 0x11, 0x00 },	/* Volume Control A2 */
+	{ 0x12, 0x00 },	/* Volume Control B2 */
+	{ 0x13, 0x00 },	/* Volume Control A3 */
+	{ 0x14, 0x00 },	/* Volume Control B3 */
+	{ 0x15, 0x00 },	/* Volume Control A4 */
+	{ 0x16, 0x00 },	/* Volume Control B4 */
+	{ 0x17, 0x00 },	/* Channel invert */
+	{ 0x18, 0x09 },	/* Mixing Ctrl Pair 1 */
+	{ 0x19, 0x09 },	/* Mixing Ctrl Pair 2 */
+	{ 0x1A, 0x09 },	/* Mixing Ctrl Pair 3 */
+	{ 0x1B, 0x09 },	/* Mixing Ctrl Pair 4 */
+	{ 0x1C, 0x00 },	/* ADC Left Ch. Gain */
+	{ 0x1D, 0x00 },	/* ADC Right Ch. Gain */
+	{ 0x1E, 0x80 },	/* RVCR Mode Ctrl 1 */
+	{ 0x1F, 0x00 },	/* RVCR Mode Ctrl 2 */
+	{ 0x24, 0x00 },	/* Channel Status Data Buffer Control */
+	{ 0x28, 0x1f },	/* MuteC Pin Control */
+};
+
+#define CS42528_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE | \
+			 SNDRV_PCM_FMTBIT_S24_LE | \
+			 SNDRV_PCM_FMTBIT_S32_LE)
+
+/* codec private data */
+struct cs42528_priv {
+	struct regmap *regmap;
+	struct snd_soc_codec *codec;
+	struct cs42528_platform_data *pdata;
+	int sysclk;
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	struct early_suspend early_suspend;
+#endif
+};
+
+/* -127dB to 0dB with step of 0.5dB */
+static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 0);
+
+/* -15dB to 15dB with step of 1dB */
+static const DECLARE_TLV_DB_SCALE(adc_tlv, -1500, 100, 0);
+
+static const char *const cs42528_szc[] = {
+	"Immediate Change",
+	"Zero Cross",
+	"Soft Ramp",
+	"Soft Ramp on Zero Cross"
+};
+
+static const struct soc_enum dac_szc_enum =
+	SOC_ENUM_SINGLE(CS42528_TXCTL, 4, 4, cs42528_szc);
+
+static const struct snd_kcontrol_new cs42528_snd_controls[] = {
+	SOC_DOUBLE_R_TLV("DAC1 Playback Volume", CS42528_VOLCTLA1,
+			 CS42528_VOLCTLB1, 0, 0xff, 1, dac_tlv),
+	SOC_DOUBLE_R_TLV("DAC2 Playback Volume", CS42528_VOLCTLA2,
+			 CS42528_VOLCTLB2, 0, 0xff, 1, dac_tlv),
+	SOC_DOUBLE_R_TLV("DAC3 Playback Volume", CS42528_VOLCTLA3,
+			 CS42528_VOLCTLB3, 0, 0xff, 1, dac_tlv),
+	SOC_DOUBLE_R_TLV("DAC4 Playback Volume", CS42528_VOLCTLA4,
+			 CS42528_VOLCTLB4, 0, 0xff, 1, dac_tlv),
+	SOC_DOUBLE_R_S_TLV("ADC Channel Gain", CS42528_ADCLGAIN,
+			   CS42528_ADCRGAIN, 0, -0x0f, 0x0f, 5, 0, adc_tlv),
+	SOC_DOUBLE("DAC1 Invert Switch", CS42528_CHINV, 0, 1, 1, 0),
+	SOC_DOUBLE("DAC2 Invert Switch", CS42528_CHINV, 2, 3, 1, 0),
+	SOC_DOUBLE("DAC3 Invert Switch", CS42528_CHINV, 4, 5, 1, 0),
+	SOC_DOUBLE("DAC4 Invert Switch", CS42528_CHINV, 6, 7, 1, 0),
+	SOC_SINGLE("DAC Single Volume Control Switch", CS42528_TXCTL, 6, 1, 0),
+	SOC_ENUM("DAC Soft Ramp & Zero Cross Control Switch", dac_szc_enum),
+	SOC_SINGLE("DAC Auto Mute Switch", CS42528_TXCTL, 3, 1, 0),
+	SOC_SINGLE("DAC Serial Port Mute Switch", CS42528_TXCTL, 2, 1, 0),
+};
+
+#if 0
+static const struct snd_soc_dapm_widget cs42528_dapm_widgets[] = {
+	SND_SOC_DAPM_DAC("DAC1", "Playback", CS42528_PWRCTL, 1, 1),
+	SND_SOC_DAPM_DAC("DAC2", "Playback", CS42528_PWRCTL, 2, 1),
+	SND_SOC_DAPM_DAC("DAC3", "Playback", CS42528_PWRCTL, 3, 1),
+	SND_SOC_DAPM_DAC("DAC4", "Playback", CS42528_PWRCTL, 4, 1),
+
+	SND_SOC_DAPM_OUTPUT("AOUT1L"),
+	SND_SOC_DAPM_OUTPUT("AOUT1R"),
+	SND_SOC_DAPM_OUTPUT("AOUT2L"),
+	SND_SOC_DAPM_OUTPUT("AOUT2R"),
+	SND_SOC_DAPM_OUTPUT("AOUT3L"),
+	SND_SOC_DAPM_OUTPUT("AOUT3R"),
+	SND_SOC_DAPM_OUTPUT("AOUT4L"),
+	SND_SOC_DAPM_OUTPUT("AOUT4R"),
+
+	SND_SOC_DAPM_ADC("ADC", "Capture", CS42528_PWRCTL, 5, 1),
+
+	SND_SOC_DAPM_INPUT("AIN1L"),
+	SND_SOC_DAPM_INPUT("AIN1R"),
+	SND_SOC_DAPM_INPUT("AIN2L"),
+	SND_SOC_DAPM_INPUT("AIN2R"),
+
+	SND_SOC_DAPM_SUPPLY("PWR", CS42528_PWRCTL, 0, 1, NULL, 0),
+};
+
+static const struct snd_soc_dapm_route cs42528_dapm_routes[] = {
+	/* Playback */
+	{ "AOUT1L", NULL, "DAC1" },
+	{ "AOUT1R", NULL, "DAC1" },
+	{ "DAC1", NULL, "PWR" },
+
+	{ "AOUT2L", NULL, "DAC2" },
+	{ "AOUT2R", NULL, "DAC2" },
+	{ "DAC2", NULL, "PWR" },
+
+	{ "AOUT3L", NULL, "DAC3" },
+	{ "AOUT3R", NULL, "DAC3" },
+	{ "DAC3", NULL, "PWR" },
+
+	{ "AOUT4L", NULL, "DAC4" },
+	{ "AOUT4R", NULL, "DAC4" },
+	{ "DAC4", NULL, "PWR" },
+
+	/* Capture */
+	{ "ADC1", NULL, "AIN1L" },
+	{ "ADC1", NULL, "AIN1R" },
+	{ "ADC1", NULL, "PWR" },
+
+	{ "ADC2", NULL, "AIN2L" },
+	{ "ADC2", NULL, "AIN2R" },
+	{ "ADC2", NULL, "PWR" },
+};
+#endif
+
+static int cs42528_set_dai_sysclk(struct snd_soc_dai *codec_dai,
+				  int clk_id, unsigned int freq, int dir)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct cs42528_priv *cs42528 = snd_soc_codec_get_drvdata(codec);
+
+	cs42528->sysclk = freq;
+
+	pr_info("%s, %d  clk:%d\n", __func__, __LINE__, freq);
+
+	return 0;
+}
+
+static int cs42528_set_dai_fmt(struct snd_soc_dai *codec_dai,
+			       unsigned int format)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct cs42528_priv *cs42528 = snd_soc_codec_get_drvdata(codec);
+	u32 val;
+
+	pr_info("%s, %d  format:%d\n", __func__, __LINE__, format);
+
+	/* Set DAI format */
+	switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
+	case SND_SOC_DAIFMT_LEFT_J:
+		val = CS42528_INTF_DAC_DIF_LEFTJ;
+		break;
+	case SND_SOC_DAIFMT_I2S:
+		val = CS42528_INTF_DAC_DIF_I2S;
+		break;
+	case SND_SOC_DAIFMT_RIGHT_J:
+		val = CS42528_INTF_DAC_DIF_RIGHTJ;
+		break;
+	default:
+		dev_err(codec->dev, "unsupported dai format\n");
+		return -EINVAL;
+	}
+
+	regmap_update_bits(cs42528->regmap, CS42528_INTF,
+			   CS42528_INTF_DAC_DIF_MASK, val);
+
+	/* Set master/slave audio interface */
+	switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
+	case SND_SOC_DAIFMT_CBS_CFS:
+		break;
+	case SND_SOC_DAIFMT_CBM_CFM:
+		break;
+	default:
+		dev_err(codec->dev, "unsupported master/slave mode\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int cs42528_hw_params(struct snd_pcm_substream *substream,
+			     struct snd_pcm_hw_params *params,
+			     struct snd_soc_dai *dai)
+{
+	unsigned int rate;
+
+	rate = params_rate(params);
+
+	pr_info("%s %d rate: %u\n", __func__, __LINE__, rate);
+
+	switch (params_format(params)) {
+	case SNDRV_PCM_FORMAT_S24_LE:
+	case SNDRV_PCM_FORMAT_S24_BE:
+		pr_debug("24bit\n");
+		break;
+
+	case SNDRV_PCM_FORMAT_S32_LE:
+	case SNDRV_PCM_FORMAT_S20_3LE:
+	case SNDRV_PCM_FORMAT_S20_3BE:
+		pr_debug("20bit\n");
+		break;
+
+	case SNDRV_PCM_FORMAT_S16_LE:
+	case SNDRV_PCM_FORMAT_S16_BE:
+		pr_debug("16bit\n");
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int cs42528_digital_mute(struct snd_soc_dai *dai, int mute)
+{
+	struct snd_soc_codec *codec = dai->codec;
+
+	pr_info("%s %d mute: %d\n", __func__, __LINE__, mute);
+
+	if (mute)
+		snd_soc_write(codec, CS42528_DACMUTE, 0xff);
+	else
+		snd_soc_write(codec, CS42528_DACMUTE, 0);
+
+	return 0;
+}
+
+static const struct snd_soc_dai_ops cs42528_dai_ops = {
+	.hw_params = cs42528_hw_params,
+	.set_sysclk = cs42528_set_dai_sysclk,
+	.set_fmt = cs42528_set_dai_fmt,
+	.digital_mute	= cs42528_digital_mute,
+};
+
+static struct snd_soc_dai_driver cs42528_dai = {
+	.name = DEV_NAME,
+	.playback = {
+		.stream_name = "HIFI Playback",
+		.channels_min = 2,
+		.channels_max = 8,
+		.rates = SNDRV_PCM_RATE_8000_192000,
+		.formats = CS42528_FORMATS,
+	},
+	.capture = {
+		.stream_name = "Capture",
+		.channels_min = 2,
+		.channels_max = 8,
+		.rates = SNDRV_PCM_RATE_8000_192000,
+		.formats = CS42528_FORMATS,
+	},
+	.ops = &cs42528_dai_ops,
+};
+
+static int reset_cs42528(struct snd_soc_codec *codec)
+{
+	struct cs42528_priv *cs42528 = snd_soc_codec_get_drvdata(codec);
+	struct cs42528_platform_data *pdata = cs42528->pdata;
+	int ret = 0;
+
+	if (pdata->reset_pin < 0)
+		return 0;
+
+	ret = devm_gpio_request_one(codec->dev, pdata->reset_pin,
+					    GPIOF_OUT_INIT_LOW,
+					    "cs42528-reset-pin");
+	if (ret < 0)
+		return -1;
+
+	gpio_direction_output(pdata->reset_pin, GPIOF_OUT_INIT_LOW);
+	mdelay(1);
+	gpio_direction_output(pdata->reset_pin, GPIOF_OUT_INIT_HIGH);
+	msleep(85);
+
+	return 0;
+}
+
+static int cs42528_init(struct snd_soc_codec *codec)
+{
+	int i;
+
+	dev_info(codec->dev, "cs42528_init!\n");
+
+	reset_cs42528(codec);
+
+	for (i = 0; i < CS42528_REG_COUNT; i++) {
+		snd_soc_write(codec, cs42528_reg_table[i][0],
+				cs42528_reg_table[i][1]);
+	}
+
+	// Short delay to finish register writes
+	msleep(10);
+
+	// Write CS42528 Powerup Register
+	snd_soc_write(codec, CS42528_PWRCTL, 0x40);
+
+	return 0;
+}
+
+static int cs42528_probe(struct snd_soc_codec *codec)
+{
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	cs42528->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN;
+	cs42528->early_suspend.suspend = cs42528_early_suspend;
+	cs42528->early_suspend.resume = cs42528_late_resume;
+	cs42528->early_suspend.param = codec;
+	register_early_suspend(&(cs42528->early_suspend));
+#endif
+
+	cs42528_init(codec);
+
+	return 0;
+}
+
+static int cs42528_remove(struct snd_soc_codec *codec)
+{
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	struct cs42528_priv *cs42528 = snd_soc_codec_get_drvdata(codec);
+
+	unregister_early_suspend(&(cs42528->early_suspend));
+#endif
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int cs42528_suspend(struct snd_soc_codec *codec)
+{
+	dev_info(codec->dev, "cs42528_suspend!\n");
+	return 0;
+}
+
+static int cs42528_resume(struct snd_soc_codec *codec)
+{
+	dev_info(codec->dev, "cs42528_resume!\n");
+	return 0;
+}
+#else
+#define cs42528_suspend NULL
+#define cs42528_resume NULL
+#endif
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static void cs42528_early_suspend(struct early_suspend *h)
+{
+}
+
+static void cs42528_late_resume(struct early_suspend *h)
+{
+}
+#endif
+
+static const struct snd_soc_codec_driver soc_codec_dev_cs42528 = {
+	.probe = cs42528_probe,
+	.remove = cs42528_remove,
+	.suspend = cs42528_suspend,
+	.resume = cs42528_resume,
+	.component_driver = {
+		.controls		= cs42528_snd_controls,
+		.num_controls		= ARRAY_SIZE(cs42528_snd_controls),
+		//.dapm_widgets		= cs42528_dapm_widgets,
+		//.num_dapm_widgets	= ARRAY_SIZE(cs42528_dapm_widgets),
+		//.dapm_routes		= cs42528_dapm_routes,
+		//.num_dapm_routes	= ARRAY_SIZE(cs42528_dapm_routes),
+	}
+};
+
+static const struct regmap_config cs42528_regmap = {
+	.reg_bits = 8,
+	.val_bits = 8,
+
+	.max_register = CS42528_NUMREGS,
+	.reg_defaults = cs42528_reg_defaults,
+	.num_reg_defaults = ARRAY_SIZE(cs42528_reg_defaults),
+	.cache_type = REGCACHE_RBTREE,
+};
+
+static int cs42528_parse_dt(
+	struct cs42528_priv *cs42528,
+	struct device_node *np)
+{
+	int ret = 0;
+	int reset_pin = -1;
+
+	reset_pin = of_get_named_gpio(np, "reset_pin", 0);
+	if (reset_pin < 0) {
+		pr_err("%s fail to get reset pin from dts!\n", __func__);
+		ret = -1;
+	} else {
+		pr_info("%s reset_pin = %d!\n", __func__, reset_pin);
+	}
+	cs42528->pdata->reset_pin = reset_pin;
+
+	return ret;
+}
+
+static int cs42528_i2c_probe(struct i2c_client *i2c,
+			     const struct i2c_device_id *id)
+{
+	struct cs42528_priv *cs42528;
+	struct cs42528_platform_data *pdata;
+	int ret = 0;
+	const char *codec_name;
+
+	cs42528 = devm_kzalloc(&i2c->dev, sizeof(struct cs42528_priv),
+			       GFP_KERNEL);
+	if (!cs42528)
+		return -ENOMEM;
+
+	cs42528->regmap = devm_regmap_init_i2c(i2c, &cs42528_regmap);
+	if (IS_ERR(cs42528->regmap)) {
+		ret = PTR_ERR(cs42528->regmap);
+		dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
+			ret);
+		return ret;
+	}
+
+	pdata = devm_kzalloc(&i2c->dev,
+				sizeof(struct cs42528_platform_data),
+				GFP_KERNEL);
+	if (!pdata) {
+		pr_err("%s failed to kzalloc for cs42528 pdata\n", __func__);
+		return -ENOMEM;
+	}
+
+	cs42528->pdata = pdata;
+
+	cs42528_parse_dt(cs42528, i2c->dev.of_node);
+
+	if (of_property_read_string(i2c->dev.of_node,
+			"codec_name",
+				&codec_name)) {
+		pr_info("no codec name\n");
+		return -1;
+	}
+	pr_info("codec name = %s\n", codec_name);
+	if (codec_name)
+		dev_set_name(&i2c->dev, "%s", codec_name);
+
+	i2c_set_clientdata(i2c, cs42528);
+
+	ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_cs42528,
+				     &cs42528_dai, 1);
+	if (ret != 0)
+		dev_err(&i2c->dev, "Failed to register codec (%d)\n", ret);
+
+	return ret;
+}
+
+static int cs42528_i2c_remove(struct i2c_client *client)
+{
+	snd_soc_unregister_codec(&client->dev);
+
+	return 0;
+}
+
+static const struct i2c_device_id cs42528_i2c_id[] = {
+	{ "cs42528", 0 },
+	{}
+};
+
+static const struct of_device_id cs42528_of_id[] = {
+	{.compatible = "cirrus,cs42528",},
+	{ /* senitel */ }
+};
+MODULE_DEVICE_TABLE(of, cs42528_of_id);
+
+static struct i2c_driver cs42528_i2c_driver = {
+	.driver = {
+		.name = DEV_NAME,
+		.of_match_table = cs42528_of_id,
+		.owner = THIS_MODULE,
+	},
+	.probe = cs42528_i2c_probe,
+	.remove = cs42528_i2c_remove,
+	.id_table = cs42528_i2c_id,
+};
+module_i2c_driver(cs42528_i2c_driver);
+
+MODULE_DESCRIPTION("ASoC CS42528 driver");
+MODULE_AUTHOR("AML MM team");
+MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/amlogic/cs42528.h b/sound/soc/codecs/amlogic/cs42528.h
new file mode 100644
index 0000000..acd241f
--- a/dev/null
+++ b/sound/soc/codecs/amlogic/cs42528.h
@@ -0,0 +1,86 @@
+#ifndef _CS42528_H
+#define _CS42528_H
+
+struct cs42528_platform_data {
+	int reset_pin;
+	int mute_pin;
+};
+
+/* CS42888 register map */
+#define CS42528_CHIPID		0x01	/* Chip ID */
+#define CS42528_PWRCTL		0x02	/* Power Control */
+#define CS42528_FUNCMOD		0x03	/* Functional Mode */
+#define CS42528_INTF		0x04	/* Interface Formats */
+#define CS42528_MISCCTL		0x05	/* Misc Control */
+#define CS42528_CLKCTL		0x06	/* Clock Control */
+#define CS42528_CLKRATIO	0x07	/* OMCK/PLL_CLK Ratio */
+#define CS42528_RVCRSTA		0x08	/* RVCR Status */
+
+#define CS42528_BPPCB0		0x09	/* Burst Preamble PC Byte 0 */
+#define CS42528_BPPCB1		0x0A	/* Burst Preamble PC Byte 1 */
+#define CS42528_BPPDB0		0x0B	/* Burst Preamble PD Byte 0 */
+#define CS42528_BPPDB1		0x0C	/* Burst Preamble PD Byte 1 */
+
+#define CS42528_TXCTL		0x0D	/* Volume Transition Control */
+#define CS42528_DACMUTE		0x0E	/* Channel Mute */
+
+#define CS42528_VOLCTLA1	0x0F	/* Volume Control A1 */
+#define CS42528_VOLCTLB1	0x10	/* Volume Control B1 */
+#define CS42528_VOLCTLA2	0x11	/* Volume Control A2 */
+#define CS42528_VOLCTLB2	0x12	/* Volume Control B2 */
+#define CS42528_VOLCTLA3	0x13	/* Volume Control A3 */
+#define CS42528_VOLCTLB3	0x14	/* Volume Control B3 */
+#define CS42528_VOLCTLA4	0x15	/* Volume Control A4 */
+#define CS42528_VOLCTLB4	0x16	/* Volume Control B4 */
+
+#define CS42528_CHINV		0x17	/* Channel invert */
+
+#define CS42528_MIXCTLP1	0x18	/* Mixing Ctrl Pair 1 */
+#define CS42528_MIXCTLP2	0x19	/* Mixing Ctrl Pair 2 */
+#define CS42528_MIXCTLP3	0x1A	/* Mixing Ctrl Pair 3 */
+#define CS42528_MIXCTLP4	0x1B	/* Mixing Ctrl Pair 4 */
+
+#define CS42528_ADCLGAIN	0x1C	/* ADC Left Ch. Gain */
+#define CS42528_ADCRGAIN	0x1D	/* ADC Right Ch. Gain */
+
+#define CS42528_RCVRCTL1	0x1E	/* RVCR Mode Ctrl 1 */
+#define CS42528_RCVRCTL2	0x1F	/* RVCR Mode Ctrl 2 */
+#define CS42528_MUTECTRL	0x28	/* MuteC Pin Control */
+
+#define CS42528_FIRSTREG	CS42528_CHIPID
+#define CS42528_LASTREG		CS42528_MUTECTRL
+#define CS42528_NUMREGS		(CS42528_LASTREG - CS42528_FIRSTREG + 1)
+#define CS42528_I2C_INCR	0x80
+
+/* Chip I.D. and Revision Register (Address 01h) */
+#define CS42528_CHIPID_CHIP_ID_MASK		0xF0
+#define CS42528_CHIPID_REV_ID_MASK		0x0F
+
+/* Power Control (Address 02h) */
+#define CS42528_PWRCTL_PDN_RCVR1_MASK	(1 << 7)
+#define CS42528_PWRCTL_PDN_RCVR1		(1 << 7)
+#define CS42528_PWRCTL_PDN_RCVR0_MASK	(1 << 6)
+#define CS42528_PWRCTL_PDN_RCVR0		(1 << 6)
+#define CS42528_PWRCTL_PDN_ADC_MASK		(1 << 5)
+#define CS42528_PWRCTL_PDN_ADC			(1 << 5)
+#define CS42528_PWRCTL_PDN_DAC4_MASK	(1 << 4)
+#define CS42528_PWRCTL_PDN_DAC4			(1 << 4)
+#define CS42528_PWRCTL_PDN_DAC3_MASK	(1 << 3)
+#define CS42528_PWRCTL_PDN_DAC3			(1 << 3)
+#define CS42528_PWRCTL_PDN_DAC2_MASK	(1 << 2)
+#define CS42528_PWRCTL_PDN_DAC2			(1 << 2)
+#define CS42528_PWRCTL_PDN_DAC1_MASK	(1 << 1)
+#define CS42528_PWRCTL_PDN_DAC1			(1 << 1)
+#define CS42528_PWRCTL_PDN_MASK			(1 << 0)
+#define CS42528_PWRCTL_PDN				(1 << 0)
+
+/* Interface Formats (Address 04h) */
+#define CS42528_INTF_DAC_DIF_MASK		(3 << 6)
+#define CS42528_INTF_DAC_DIF_LEFTJ		(0 << 6)
+#define CS42528_INTF_DAC_DIF_I2S		(1 << 6)
+#define CS42528_INTF_DAC_DIF_RIGHTJ		(2 << 6)
+
+/* Channel Mute */
+#define CS42528_DACMUTE_ALL	0xFF
+
+#endif /* _CS42528_H */