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authorxiaojing.huang <xiaojing.huang@amlogic.com>2019-03-20 02:57:53 (GMT)
committer xiaojing.huang <xiaojing.huang@amlogic.com>2019-03-20 02:57:57 (GMT)
commit0836dee324063da0e08b2d9ccfdecc9d62375356 (patch)
tree3f422c9eaa3fa1529d6d82175ea1422315f1c8f3
parent1fe1291254cd5385523f7932df04f89026d124a9 (diff)
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audio:set the clknum to 6 when input source is 192KHz[1/1]
PD#OTT-1850 BUGID=123274981 Problem: optical mode,Cannot support 192khz sampling rate Solution: set the clknum to 6 when input source is 192Khz Verify: ATOM Change-Id: Ib1b5aebcfbe0f593c0dbc6c5574c4f5db9e29de4
Diffstat
-rw-r--r--sound/soc/amlogic/meson/audio_hw.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/amlogic/meson/audio_hw.c b/sound/soc/amlogic/meson/audio_hw.c
index 65ed720..49972f8 100644
--- a/sound/soc/amlogic/meson/audio_hw.c
+++ b/sound/soc/amlogic/meson/audio_hw.c
@@ -476,7 +476,7 @@ static void spdifin_reg_set(void)
u32 period_44k = (period_data / 22 + 1) >> 1; /* 44k min period */
u32 period_48k = (period_data / 24 + 1) >> 1; /* 48k min period */
u32 period_96k = (period_data / 48 + 1) >> 1; /* 96k min period */
- u32 period_192k = (period_data / 96 + 1) >> 1; /* 192k min period */
+ u32 period_192k = (period_data / 96) >> 1; /* 192k min period */
pr_info("spdifin_reg_set: clk_rate=%d\n", clk_rate);