author | long.yu <long.yu@amlogic.com> | 2020-08-13 07:25:12 (GMT) |
---|---|---|
committer | Shen Liu <shen.liu@amlogic.com> | 2020-08-20 06:49:45 (GMT) |
commit | 14b18dbfacd641f4b1e15fbadd03fac6f37d77bc (patch) | |
tree | 6a6a64c77e859e6d58227613196df5d47ec76e49 | |
parent | 1057bafb127aff9779d419fe1ac4d6acb8317145 (diff) | |
download | common-14b18dbfacd641f4b1e15fbadd03fac6f37d77bc.zip common-14b18dbfacd641f4b1e15fbadd03fac6f37d77bc.tar.gz common-14b18dbfacd641f4b1e15fbadd03fac6f37d77bc.tar.bz2 |
emmc: save clock reg after cali failure [1/1]
PD#SWPL-30974
Problem:
don't need to save the value of
the Clock register after a calibration failure
Solution:
save clock register
Verify:
txl
Change-Id: I79799967ee3417600df960492a94f868427effb2
Signed-off-by: long.yu <long.yu@amlogic.com>
-rw-r--r-- | drivers/amlogic/mmc/aml_sd_emmc.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/amlogic/mmc/aml_sd_emmc.c b/drivers/amlogic/mmc/aml_sd_emmc.c index 98f1195..016dd96 100644 --- a/drivers/amlogic/mmc/aml_sd_emmc.c +++ b/drivers/amlogic/mmc/aml_sd_emmc.c @@ -524,6 +524,15 @@ _cali_retry: } else { pr_err("%s: calibration failed, use default\n", mmc_hostname(host->mmc)); +#ifdef SD_EMMC_CLK_CTRL + vclk = readl(host->base + SD_EMMC_CLOCK); + clkc->div = clk_div_tmp; + writel(vclk, host->base + SD_EMMC_CLOCK); +#else + clk_set_rate(host->cfg_div_clk, clk_tmp); + vclk = readl(host->base + SD_EMMC_CLOCK); +#endif + pdata->clkc = vclk; return -1; } } @@ -537,6 +546,15 @@ _cali_retry: } else { pr_err("%s: calibration failed, use default\n", mmc_hostname(host->mmc)); +#ifdef SD_EMMC_CLK_CTRL + vclk = readl(host->base + SD_EMMC_CLOCK); + clkc->div = clk_div_tmp; + writel(vclk, host->base + SD_EMMC_CLOCK); +#else + clk_set_rate(host->cfg_div_clk, clk_tmp); + vclk = readl(host->base + SD_EMMC_CLOCK); +#endif + pdata->clkc = vclk; return -1; } } |