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path: root/arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts (plain)
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1/*
2 * arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts
3 *
4 * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18/dts-v1/;
19
20#include "mesongxl.dtsi"
21#include "partition_mbox_p241.dtsi"
22/ {
23 model = "Amlogic";
24 amlogic-dt-id = "gxl_p241_1g";
25 compatible = "amlogic, Gxl";
26 interrupt-parent = <&gic>;
27 #address-cells = <2>;
28 #size-cells = <2>;
29
30 aliases {
31 serial0 = &uart_AO;
32 serial1 = &uart_C;
33 serial2 = &uart_B;
34 serial3 = &uart_A;
35 serial4 = &uart_AO_B;
36 };
37
38 ion_dev {
39 compatible = "amlogic, ion_dev";
40 memory-region = <&ion_reserved>;
41 };
42
43 memory@00000000 {
44 device_type = "memory";
45 linux,usable-memory = <0x0 0x0100000 0x0 0x3ff00000>;
46 };
47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52 /* global autoconfigured region for contiguous allocations */
53 ramoops@0x07400000 {
54 compatible = "ramoops";
55 reg = <0x0 0x07400000 0x0 0x00100000>;
56 record-size = <0x8000>;
57 console-size = <0x8000>;
58 ftrace-size = <0x0>;
59 pmsg-size = <0x8000>;
60 };
61 secmon_reserved:linux,secmon {
62 compatible = "shared-dma-pool";
63 reusable;
64 size = <0x0 0x400000>;
65 alignment = <0x0 0x400000>;
66 alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
67 };
68 secos_reserved:linux,secos {
69 status = "disable";
70 compatible = "amlogic, aml_secos_memory";
71 reg = <0x0 0x05300000 0x0 0x2000000>;
72 no-map;
73 };
74 logo_reserved:linux,meson-fb {
75 compatible = "shared-dma-pool";
76 reusable;
77 size = <0x0 0x400000>;
78 alignment = <0x0 0x400000>;
79 alloc-ranges = <0x0 0x3fc00000 0x0 0x400000>;
80 };
81 //don't put other dts in front of logo_reserved
82
83 //di_reserved:linux,di {
84 // compatible = "amlogic, di-mem";
85 /** 10x3133440=30M(0x1e) support 8bit **/
86 // size = <0x0 0x1e00000>;
87 //no-map;
88 //};
89 /*di CMA pool */
90 di_cma_reserved:linux,di_cma {
91 compatible = "shared-dma-pool";
92 reusable;
93 /** 10x3552320=34M(0x22) support 8bit **/
94 /** 10x44596800=44M(0x2c) support 12bit **/
95 /** 10x4074560=39M(0x27) support 10bit **/
96 size = <0x0 0x02400000>;
97 alignment = <0x0 0x400000>;
98 };
99 ion_reserved:linux,ion-dev {
100 compatible = "shared-dma-pool";
101 reusable;
102 size = <0x0 0x3000000>;
103 alignment = <0x0 0x400000>;
104 };
105
106 /* vdin0 CMA pool */
107 //vdin0_cma_reserved:linux,vdin0_cma {
108 // compatible = "shared-dma-pool";
109 // linux,phandle = <4>;
110 // reusable;
111 /* 1920x1080x2x4 =16+4 M */
112 // size = <0x0 0x01400000>;
113 // alignment = <0x0 0x400000>;
114 //};
115 /* vdin1 CMA pool */
116 vdin1_cma_reserved:linux,vdin1_cma {
117 compatible = "shared-dma-pool";
118 reusable;
119 /* 1920x1080x2x4 =16 M */
120 size = <0x0 0x01000000>;
121 alignment = <0x0 0x400000>;
122 };
123 /* POST PROCESS MANAGER */
124 ppmgr_reserved:linux,ppmgr {
125 compatible = "amlogic, ppmgr_memory";
126 size = <0x0 0x0>;
127 multi-use;
128 };
129
130 codec_mm_cma:linux,codec_mm_cma {
131 compatible = "shared-dma-pool";
132 reusable;
133 /* ion_codec_mm max can alloc size 80M*/
134 size = <0x0 0x7800000>;
135 alignment = <0x0 0x400000>;
136 linux,contiguous-region;
137 };
138 picdec_cma_reserved:linux,picdec {
139 compatible = "shared-dma-pool";
140 reusable;
141 size = <0x0 0x0>;
142 alignment = <0x0 0x0>;
143 linux,contiguous-region;
144 };
145 /* codec shared reserved */
146 codec_mm_reserved:linux,codec_mm_reserved {
147 compatible = "amlogic, codec-mm-reserved";
148 size = <0x0 0x0>;
149 alignment = <0x0 0x100000>;
150 //no-map;
151 };
152 };
153
154 vpu {
155 compatible = "amlogic, vpu";
156 dev_name = "vpu";
157 status = "ok";
158 clocks = <&clkc CLKID_VPU_MUX
159 &clkc CLKID_VAPB_MUX
160 &clkc CLKID_VPU_INTR>;
161 clock-names = "vpu_clk",
162 "vapb_clk",
163 "vpu_intr";
164 clk_level = <2>;
165 /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
166 /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
167 };
168
169 uart_AO: serial@c81004c0 {
170 compatible = "amlogic, meson-uart";
171 reg = <0x0 0xc81004c0 0x0 0x18>;
172 interrupts = <0 193 1>;
173 status = "okay";
174 clocks = <&xtal>;
175 clock-names = "clk_uart";
176 xtal_tick_en = <1>;
177 fifosize = < 64 >;
178 pinctrl-names = "default";
179 pinctrl-0 = <&ao_uart_pins>;
180 support-sysrq = <0>; /* 0 not support , 1 support */
181 };
182
183 uart_A: serial@c11084c0 {
184 compatible = "amlogic, meson-uart";
185 reg = <0x0 0xc11084c0 0x0 0x18>;
186 interrupts = <0 26 1>;
187 status = "disable";
188 clocks = <&clkc CLKID_UART0>;
189 clock-names = "clk_uart";
190 fifosize = < 128 >;
191 pinctrl-names = "default";
192 // pinctrl-0 = <&a_uart_pins>;
193 };
194
195 uart_B: serial@c11084dc {
196 compatible = "amlogic, meson-uart";
197 reg = <0x0 0xc11084dc 0x0 0x18>;
198 interrupts = <0 75 1>;
199 status = "disabled";
200 clocks = <&clkc CLKID_UART1>;
201 clock-names = "clk_uart";
202 fifosize = < 64 >;
203 pinctrl-names = "default";
204 pinctrl-0 = <&b_uart_pins>;
205 };
206
207 uart_C: serial@c1108700 {
208 compatible = "amlogic, meson-uart";
209 reg = <0x0 0xc1108700 0x0 0x18>;
210 interrupts = <0 93 1>;
211 status = "okay";
212 clocks = <&clkc CLKID_UART2>;
213 clock-names = "clk_uart";
214 fifosize = < 64 >;
215 pinctrl-names = "default";
216 pinctrl-0 = <&c_uart_pins>;
217 };
218
219 uart_AO_B: serial@c81004e0 {
220 compatible = "amlogic, meson-uart";
221 reg = <0x0 0xc81004e0 0x0 0x18>;
222 interrupts = <0 197 1>;
223 status = "disable";
224 clocks = <&xtal>;
225 clock-names = "clk_uart";
226 fifosize = < 64 >;
227 pinctrl-names = "default";
228 pinctrl-0 = <&ao_b_uart_pins>;
229 };
230
231 bt-dev{
232 compatible = "amlogic, bt-dev";
233 dev_name = "bt-dev";
234 status = "okay";
235 gpio_reset = <&gpio GPIOX_12 GPIO_ACTIVE_HIGH>;
236 };
237
238 wifi{
239 compatible = "amlogic, aml_wifi";
240 dev_name = "aml_wifi";
241 status = "okay";
242 interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
243 interrupts = < 0 68 4>;
244 irq_trigger_type = "GPIO_IRQ_LOW";
245 dhd_static_buf; //dhd_static_buf support
246 power_on_pin = <&gpio GPIODV_25 GPIO_ACTIVE_HIGH>;
247 pinctrl-names = "default";
248 pinctrl-0 = <&wifi_32k_pins>;
249 pwm_config = <&wifi_pwm_conf>;
250 };
251
252 wifi_pwm_conf:wifi_pwm_conf{
253 pwm_channel1_conf {
254 pwms = <&pwm_ef MESON_PWM_0 30040 0>;
255 duty-cycle = <15020>;
256 times = <8>;
257 };
258 pwm_channel2_conf {
259 pwms = <&pwm_ef MESON_PWM_2 30030 0>;
260 duty-cycle = <15015>;
261 times = <12>;
262 };
263 };
264
265 sd_emmc_c: emmc@d0074000 {
266 status = "okay";
267 compatible = "amlogic, meson-mmc-gxl";
268 reg = <0x0 0xd0074000 0x0 0x2000>;
269 interrupts = <0 218 1>;
270 pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
271 pinctrl-0 = <&emmc_clk_cmd_pins>;
272 pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
273 clocks = <&clkc CLKID_SD_EMMC_C>,
274 <&clkc CLKID_SD_EMMC_C_P0_COMP>,
275 <&clkc CLKID_FCLK_DIV2>;
276 clock-names = "core", "clkin0", "clkin1";
277
278 bus-width = <8>;
279 cap-sd-highspeed;
280 cap-mmc-highspeed;
281 mmc-ddr-1_8v;
282 mmc-hs200-1_8v;
283
284 max-frequency = <200000000>;
285 non-removable;
286 disable-wp;
287 emmc {
288 status = "disabled";
289 pinname = "emmc";
290 ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
291 caps = "MMC_CAP_8_BIT_DATA",
292 "MMC_CAP_MMC_HIGHSPEED",
293 "MMC_CAP_SD_HIGHSPEED",
294 "MMC_CAP_NONREMOVABLE",
295 "MMC_CAP_1_8V_DDR",
296 "MMC_CAP_HW_RESET",
297 "MMC_CAP_ERASE",
298 "MMC_CAP_CMD23";
299 // caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
300 f_min = <300000>;
301 f_max = <50000000>;
302 max_req_size = <0x20000>; /**128KB*/
303 gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
304 hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
305 card_type = <1>;
306 /* 1:mmc card(include eMMC),
307 * 2:sd card(include tSD)
308 */
309 };
310 };
311
312 sd_emmc_b:sd@d0072000 {
313 status = "okay";
314 compatible = "amlogic, meson-mmc-gxl";
315 reg = <0x0 0xd0072000 0x0 0x2000>;
316 interrupts = <0 217 1>;
317 pinctrl-names = "sd_all_pins",
318 "sd_clk_cmd_pins",
319 "sd_clk_cmd_uart_pins",
320 "sd_to_ao_uart_pins",
321 "ao_to_sd_uart_pins";
322 pinctrl-0 = <&sd_all_pins>;
323 pinctrl-1 = <&sd_clk_cmd_pins>;
324 pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
325 pinctrl-3 = <&sd_to_ao_uart_pins>;
326 pinctrl-4 = <&ao_to_sd_uart_pins>;
327 clocks = <&clkc CLKID_SD_EMMC_B>,
328 <&clkc CLKID_SD_EMMC_B_P0_COMP>,
329 <&clkc CLKID_FCLK_DIV2>;
330 clock-names = "core", "clkin0", "clkin1";
331
332 bus-width = <4>;
333 cap-sd-highspeed;
334 max-frequency = <100000000>;
335 disable-wp;
336 sd {
337 status = "disabled";
338 pinname = "sd";
339 ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
340 caps = "MMC_CAP_4_BIT_DATA",
341 "MMC_CAP_MMC_HIGHSPEED",
342 "MMC_CAP_SD_HIGHSPEED";
343 /* "MMC_CAP_UHS_SDR12",
344 * "MMC_CAP_UHS_SDR25",
345 * "MMC_CAP_UHS_SDR50",
346 * "MMC_CAP_UHS_SDR104";
347 */
348 f_min = <400000>;
349 f_max = <100000000>;
350 max_req_size = <0x20000>; /**128KB*/
351 gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
352 jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
353 gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
354 card_type = <5>;
355 /* 0:unknown,
356 * 1:mmc card(include eMMC),
357 * 2:sd card(include tSD),
358 * 3:sdio device(ie:sdio-wifi),
359 * 4:SD combo (IO+mem) card,
360 * 5:NON sdio device(means sd/mmc card),
361 * other:reserved
362 */
363 };
364 };
365
366 sd_emmc_a:sdio@d0070000 {
367 status = "okay";
368 compatible = "amlogic, meson-mmc-gxl";
369 reg = <0x0 0xd0070000 0x0 0x2000>;
370 interrupts = <0 216 4>;
371 pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
372 pinctrl-0 = <&sdio_clk_cmd_pins>;
373 pinctrl-1 = <&sdio_all_pins>;
374 clocks = <&clkc CLKID_SD_EMMC_A>,
375 <&clkc CLKID_SD_EMMC_A_P0_COMP>,
376 <&clkc CLKID_FCLK_DIV2>;
377 clock-names = "core", "clkin0", "clkin1";
378
379 bus-width = <4>;
380 cap-sd-highspeed;
381 cap-mmc-highspeed;
382 max-frequency = <100000000>;
383 non-removable;
384 disable-wp;
385 sdio {
386 status = "disabled";
387 pinname = "sdio";
388 ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
389 caps = "MMC_CAP_4_BIT_DATA",
390 "MMC_CAP_MMC_HIGHSPEED",
391 "MMC_CAP_SD_HIGHSPEED",
392 "MMC_CAP_NONREMOVABLE",
393 "MMC_CAP_UHS_SDR12",
394 "MMC_CAP_UHS_SDR25",
395 "MMC_CAP_UHS_SDR50",
396 "MMC_CAP_UHS_SDR104",
397 "MMC_PM_KEEP_POWER",
398 "MMC_CAP_SDIO_IRQ";
399 f_min = <400000>;
400 f_max = <200000000>;
401 max_req_size = <0x20000>; /**128KB*/
402 card_type = <3>;
403 /* 3:sdio device(ie:sdio-wifi),
404 * 4:SD combo (IO+mem) card
405 */
406 };
407 };
408 mtd_nand{
409 compatible = "amlogic, aml_mtd_nand";
410 dev_name = "mtdnand";
411 status = "disabled";
412 reg = <0x0 0xd0074800 0x0 0x200>;
413 interrupts = < 0 34 1 >;
414 pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
415 pinctrl-0 = <&all_nand_pins>;
416 pinctrl-1 = <&all_nand_pins>;
417 pinctrl-2 = <&nand_cs_pins>;
418 device_id = <0>;
419 plat-names = "bootloader","nandnormal";
420 plat-num = <2>;
421 plat-part-0 = <&bootloader>;
422 plat-part-1 = <&nandnormal>;
423 bootloader: bootloader{
424 enable_pad ="ce0";
425 busy_pad = "rb0";
426 timming_mode = "mode5";
427 bch_mode = "bch60_1k";
428 t_rea = <20>;
429 t_rhoh = <15>;
430 chip_num = <1>;
431 part_num = <0>;
432 rb_detect = <1>;
433 };
434 nandnormal: nandnormal{
435 enable_pad ="ce0","ce1";
436 busy_pad = "rb0","rb1";
437 timming_mode = "mode5";
438 bch_mode = "bch60_1k";
439 plane_mode = "twoplane";
440 t_rea = <20>;
441 t_rhoh = <15>;
442 chip_num = <2>;
443 part_num = <3>;
444 partition = <&nand_partitions>;
445 rb_detect = <1>;
446 };
447 nand_partitions:nand_partition{
448 logo{
449 offset=<0x0 0x0>;
450 size=<0x0 0x200000>;
451 };
452 recovery{
453 offset=<0x0 0x0>;
454 size=<0x0 0x1000000>;
455 };
456 boot{
457 offset=<0x0 0x0>;
458 size=<0x0 0xC00000>;
459 };
460 system{
461 offset=<0x0 0x0>;
462 size=<0x0 0xDC40000>;
463 };
464 data{
465 offset=<0xffffffff 0xffffffff>;
466 size=<0x0 0x0>;
467 };
468 };
469 };
470
471 ethmac: ethernet@0xc9410000 {
472 compatible = "amlogic, gxbb-eth-dwmac";
473 reg = <0x0 0xc9410000 0x0 0x10000
474 0x0 0xc8834540 0x0 0x8
475 0x0 0xc8834558 0x0 0xc>;
476 interrupts = <0 8 1>;
477 pinctrl-names = "external_eth_pins";
478 pinctrl-0 = <&external_eth_pins>;
479 rst_pin-gpios = <&gpio GPIOZ_14 0>;
480 GPIOZ4_pin-gpios = <&gpio GPIOZ_4 0>;
481 GPIOZ5_pin-gpios = <&gpio GPIOZ_5 0>;
482 mc_val_internal_phy = <0x1800>;
483 mc_val_external_phy = <0x1621>;
484 cali_val = <0x20000>;
485 interrupt-names = "macirq";
486 clocks = <&clkc CLKID_ETH>;
487 clock-names = "ethclk81";
488 internal_phy=<1>;
489 };
490
491 aml_sensor0: aml-sensor@0 {
492 compatible = "amlogic, aml-thermal";
493 device_name = "thermal";
494 #thermal-sensor-cells = <1>;
495 cooling_devices {
496 cpufreq_cool_cluster0 {
497 min_state = <1000000>;
498 dyn_coeff = <140>;
499 cluster_id = <0>;
500 node_name = "cpufreq_cool0";
501 device_type = "cpufreq";
502 };
503 cpucore_cool_cluster0 {
504 min_state = <1>;
505 dyn_coeff = <0>;
506 cluster_id = <0>;
507 node_name = "cpucore_cool0";
508 device_type = "cpucore";
509 };
510 gpufreq_cool {
511 min_state = <400>;
512 dyn_coeff = <437>;
513 cluster_id = <0>;
514 node_name = "gpufreq_cool0";
515 device_type = "gpufreq";
516 };
517 gpucore_cool {
518 min_state = <1>;
519 dyn_coeff = <0>;
520 cluster_id = <0>;
521 node_name = "gpucore_cool0";
522 device_type = "gpucore";
523 };
524 };
525 cpufreq_cool0:cpufreq_cool0 {
526 #cooling-cells = <2>; /* min followed by max */
527 };
528 cpucore_cool0:cpucore_cool0 {
529 #cooling-cells = <2>; /* min followed by max */
530 };
531 gpufreq_cool0:gpufreq_cool0 {
532 #cooling-cells = <2>; /* min followed by max */
533 };
534 gpucore_cool0:gpucore_cool0 {
535 #cooling-cells = <2>; /* min followed by max */
536 };
537 };
538 thermal-zones {
539 soc_thermal {
540 polling-delay = <1000>;
541 polling-delay-passive = <100>;
542 sustainable-power = <2150>;
543
544 thermal-sensors = <&aml_sensor0 3>;
545
546 trips {
547 switch_on: trip-point@0 {
548 temperature = <70000>;
549 hysteresis = <1000>;
550 type = "passive";
551 };
552 control: trip-point@1 {
553 temperature = <80000>;
554 hysteresis = <1000>;
555 type = "passive";
556 };
557 hot: trip-point@2 {
558 temperature = <85000>;
559 hysteresis = <5000>;
560 type = "hot";
561 };
562 critical: trip-point@3 {
563 temperature = <260000>;
564 hysteresis = <1000>;
565 type = "critical";
566 };
567 };
568
569 cooling-maps {
570 cpufreq_cooling_map {
571 trip = <&control>;
572 cooling-device = <&cpufreq_cool0 0 4>;
573 contribution = <1024>;
574 };
575 cpucore_cooling_map {
576 trip = <&control>;
577 cooling-device = <&cpucore_cool0 0 3>;
578 contribution = <1024>;
579 };
580 gpufreq_cooling_map {
581 trip = <&control>;
582 cooling-device = <&gpufreq_cool0 0 4>;
583 contribution = <1024>;
584 };
585 gpucore_cooling_map {
586 trip = <&control>;
587 cooling-device = <&gpucore_cool0 0 2>;
588 contribution = <1024>;
589 };
590 };
591 };
592 };
593
594 dwc3: dwc3@c9000000 {
595 compatible = "synopsys, dwc3";
596 reg = <0x0 0xc9000000 0x0 0x100000>;
597 interrupts = <0 30 4>;
598 usb-phy = <&usb2_phy>, <&usb3_phy>;
599 cpu-type = "gxl";
600 clock-src = "usb3.0";
601 };
602
603 usb2_phy: usb2phy@d0078000 {
604 compatible = "amlogic, amlogic-new-usb2";
605 portnum = <3>;
606 reg = <0x0 0xd0078000 0x0 0x80
607 0x0 0xc1104408 0x0 0x4>;
608 };
609
610 usb3_phy: usb3phy@d0078080 {
611 compatible = "amlogic, amlogic-new-usb3";
612 portnum = <0>;
613 reg = <0x0 0xd0078080 0x0 0x20>;
614 };
615
616 dwc2_a {
617 compatible = "amlogic, dwc2";
618 device_name = "dwc2_a";
619 reg = <0x0 0xc9100000 0x0 0x40000>;
620 status = "okay";
621 interrupts = <0 31 4>;
622 pl-periph-id = <0>; /** lm name */
623 clock-src = "usb0"; /** clock src */
624 port-id = <0>; /** ref to mach/usb.h */
625 port-type = <2>; /** 0: otg, 1: host, 2: slave */
626 port-speed = <0>; /** 0: default, high, 1: full */
627 port-config = <0>; /** 0: default */
628 port-dma = <0>; /** 0: default ... 6: disable*/
629 port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
630 usb-fifo = <728>;
631 cpu-type = "gxl";
632 controller-type = <1>; /** 0: normal, 1: host, 2: device*/
633 phy-reg = <0xd0078000>;
634 phy-reg-size = <0xa0>;
635 clocks = <&clkc CLKID_USB_GENERAL
636 &clkc CLKID_USB1_TO_DDR
637 &clkc CLKID_USB1>;
638 clock-names = "usb_general",
639 "usb1",
640 "usb1_to_ddr";
641 };
642
643 meson-amvideom {
644 compatible = "amlogic, amvideom";
645 dev_name = "amvideom";
646 status = "okay";
647 interrupts = <0 3 1>;
648 interrupt-names = "vsync";
649 };
650
651 vout {
652 compatible = "amlogic, vout";
653 dev_name = "vout";
654 status = "okay";
655 fr_auto_policy = <0>;
656 };
657
658 cvbsout {
659 compatible = "amlogic, cvbsout";
660 dev_name = "cvbsout";
661 status = "okay";
662 };
663
664 amhdmitx: amhdmitx{
665 compatible = "amlogic, amhdmitx";
666 dev_name = "amhdmitx";
667 status = "okay";
668 vend-data = <&vend_data>;
669 pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
670 pinctrl-0=<&hdmitx_hpd>;
671 pinctrl-1=<&hdmitx_ddc>;
672 /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
673 interrupts = <0 57 1>;
674 interrupt-names = "hdmitx_hpd";
675 vend_data: vend_data{ /* Should modified by Customer */
676 vendor_name = "Amlogic"; /* Max Chars: 8 */
677 /* standards.ieee.org/develop/regauth/oui/oui.txt */
678 vendor_id = <0x000000>;
679 product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
680 };
681 };
682
683 aocec: aocec{
684 compatible = "amlogic, amlogic-aocec";
685 device_name = "aocec";
686 status = "okay";
687 vendor_id = <0x000000>;
688 cec_osd_string = "MBox"; /* Max Chars: 14 */
689 cec_version = <6>; /* 5: 1.4, 6: 2.0 */
690 port_num = <1>;
691 arc_port_mask = <0x0>;
692 interrupts = <0 199 1>;
693 interrupt-names = "hdmi_aocec";
694 pinctrl-names = "hdmitx_aocec";
695 pinctrl-0=<&hdmitx_aocec>;
696 reg = <0x0 0xc810023c 0x0 0x4
697 0x0 0xc8100000 0x0 0x200>;
698 };
699
700 sysled {
701 compatible = "amlogic, sysled";
702 dev_name = "sysled";
703 status = "okay";
704 led_gpio = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>;
705 led_active_low = <1>;
706 };
707
708 codec_io {
709 compatible = "amlogic, codec_io";
710 #address-cells=<2>;
711 #size-cells=<2>;
712 ranges;
713 io_cbus_base{
714 reg = <0x0 0xC1100000 0x0 0x100000>;
715 };
716 io_dos_base{
717 reg = <0x0 0xc8820000 0x0 0x10000>;
718 };
719 io_hiubus_base{
720 reg = <0x0 0xc883c000 0x0 0x2000>;
721 };
722 io_aobus_base{
723 reg = <0x0 0xc8100000 0x0 0x100000>;
724 };
725 io_vcbus_base{
726 reg = <0x0 0xd0100000 0x0 0x40000>;
727 };
728 io_dmc_base{
729 reg = <0x0 0xc8838000 0x0 0x400>;
730 };
731 };
732
733 codec_mm {
734 compatible = "amlogic, codec, mm";
735 memory-region = <&codec_mm_cma &codec_mm_reserved>;
736 dev_name = "codec_mm";
737 status = "okay";
738 };
739
740 canvas{
741 compatible = "amlogic, meson, canvas";
742 dev_name = "amlogic-canvas";
743 status = "ok";
744 reg = <0x0 0xc8838000 0x0 0x400>;
745 };
746
747 mesonstream {
748 compatible = "amlogic, codec, streambuf";
749 dev_name = "mesonstream";
750 status = "okay";
751 clocks = <&clkc CLKID_DOS_PARSER
752 &clkc CLKID_DEMUX
753 &clkc CLKID_DOS
754 &clkc CLKID_VDEC_MUX
755 &clkc CLKID_HCODEC_MUX
756 &clkc CLKID_HEVC_MUX>;
757 clock-names = "parser_top",
758 "demux",
759 "vdec",
760 "clk_vdec_mux",
761 "clk_hcodec_mux",
762 "clk_hevc_mux";
763 };
764
765 vdec {
766 compatible = "amlogic, vdec";
767 dev_name = "vdec.0";
768 status = "okay";
769 interrupts = <0 3 1
770 0 23 1
771 0 32 1
772 0 43 1
773 0 44 1
774 0 45 1>;
775 interrupt-names = "vsync",
776 "demux",
777 "parser",
778 "mailbox_0",
779 "mailbox_1",
780 "mailbox_2";
781 };
782
783 gpio_keypad{
784 compatible = "amlogic, gpio_keypad";
785 status = "okay";
786 scan_period = <20>;
787 key_num = <1>;
788 key_name = "power";
789 key_code = <116>;
790 key_pin = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
791 interrupts = <0 70 1
792 0 71 2>;
793 interrupt-names = "irq_keyup", "irq_keydown";
794 };
795 meson-fb {
796 compatible = "amlogic, meson-fb";
797 memory-region = <&logo_reserved>;
798 dev_name = "meson-fb";
799 status = "okay";
800 interrupts = <0 3 1
801 0 89 1>;
802 interrupt-names = "viu-vsync", "rdma";
803 mem_size = <0x00400000 0x00b00000 0x00100000>;
804 /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x0b51000*/
805 display_mode_default = "720p60hz";
806 scale_mode = <1>;
807 /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
808 display_size_default = <1280 720 1280 2160 32>;
809 /*1280*720*4*3 = 0xA8C000*/
810 logo_addr = "0x3fc00000";
811 };
812 ge2d {
813 compatible = "amlogic, ge2d";
814 dev_name = "ge2d";
815 status = "okay";
816 interrupts = <0 150 1>;
817 interrupt-names = "ge2d";
818 clocks = <&clkc CLKID_VAPB_MUX>,
819 <&clkc CLKID_GE2D_GATE>,
820 <&clkc CLKID_G2D>;
821 clock-names = "clk_vapb_0",
822 "clk_ge2d",
823 "clk_ge2d_gate";
824 };
825
826
827 /* AUDIO MESON DEVICES */
828 i2s_dai: I2S {
829 #sound-dai-cells = <0>;
830 compatible = "amlogic, aml-i2s-dai";
831 clocks =
832 <&clkc CLKID_MPLL2>,
833 <&clkc CLKID_AMCLK_COMP>,
834 <&clkc CLKID_AIU_GLUE>,
835 <&clkc CLKID_IEC958>,
836 <&clkc CLKID_I2S_OUT>,
837 <&clkc CLKID_AMCLK>,
838 <&clkc CLKID_AIFIFO2>,
839 <&clkc CLKID_MIXER>,
840 <&clkc CLKID_MIXER_IFACE>,
841 <&clkc CLKID_ADC>,
842 <&clkc CLKID_AIU_TOP>,
843 <&clkc CLKID_AOCLK_GATE>,
844 <&clkc CLKID_I2S_SPDIF>;
845 clock-names =
846 "mpll2",
847 "mclk",
848 "top_glue",
849 "aud_buf",
850 "i2s_out",
851 "amclk_measure",
852 "aififo2",
853 "aud_mixer",
854 "mixer_reg",
855 "adc",
856 "top_level",
857 "aoclk",
858 "aud_in";
859 i2s_pos_sync = <0>;
860 /*DMIC;*/ /* I2s Mic or Dmic, default for I2S mic */
861 };
862 dmic:snd_dmic {
863 #sound-dai-cells = <0>;
864 compatible = "aml, aml_snd_dmic";
865 reg = <0x0 0xd0042000 0x0 0x2000>;
866 status = "okay";
867 resets = <
868 &clkc CLKID_PDM_GATE
869 >;
870 reset-names = "pdm";
871 pinctrl-names = "aml_dmic_pins";
872 pinctrl-0 = <&aml_dmic_pins>;
873 clocks = <&clkc CLKID_PDM_COMP>,
874 <&clkc CLKID_AMCLK_COMP>;
875 clock-names = "pdm", "mclk";
876 };
877 spdif_dai: SPDIF {
878 #sound-dai-cells = <0>;
879 compatible = "amlogic, aml-spdif-dai";
880 clocks =
881 <&clkc CLKID_MPLL1>,
882 <&clkc CLKID_I958_COMP>,
883 <&clkc CLKID_AMCLK_COMP>,
884 <&clkc CLKID_I958_COMP_SPDIF>,
885 <&clkc CLKID_CLK81>,
886 <&clkc CLKID_IEC958>,
887 <&clkc CLKID_IEC958_GATE>;
888 clock-names =
889 "mpll1",
890 "i958",
891 "mclk",
892 "spdif",
893 "clk_81",
894 "iec958",
895 "iec958_amclk";
896 };
897 pcm_dai: PCM {
898 #sound-dai-cells = <0>;
899 compatible = "amlogic, aml-pcm-dai";
900 pinctrl-names = "aml_audio_pcm";
901 // pinctrl-0 = <&audio_pcm_pins>;
902 clocks =
903 <&clkc CLKID_MPLL0>,
904 <&clkc CLKID_PCM_MCLK_COMP>,
905 <&clkc CLKID_PCM_SCLK_GATE>;
906 clock-names =
907 "mpll0",
908 "pcm_mclk",
909 "pcm_sclk";
910 pcm_mode = <1>; /* 0=slave mode, 1=master mode */
911 };
912 i2s_plat: i2s_platform {
913 compatible = "amlogic, aml-i2s";
914 interrupts = <0 29 1>;
915 };
916 pcm_plat: pcm_platform {
917 compatible = "amlogic, aml-pcm";
918 };
919 spdif_codec: spdif_codec{
920 #sound-dai-cells = <0>;
921 compatible = "amlogic, aml-spdif-codec";
922 pinctrl-names = "aml_audio_spdif";
923 pinctrl-0 = <&audio_spdif_pins>;
924 };
925 pcm_codec: pcm_codec{
926 #sound-dai-cells = <0>;
927 compatible = "amlogic, pcm2BT-codec";
928 };
929 /* endof AUDIO MESON DEVICES */
930
931 /* AUDIO board specific */
932 dummy_codec:dummy{
933 #sound-dai-cells = <0>;
934 compatible = "amlogic, aml_dummy_codec";
935 status = "disable";
936 };
937 amlogic_codec:t9015{
938 #sound-dai-cells = <0>;
939 compatible = "amlogic, aml_codec_T9015";
940 reg = <0x0 0xc8832000 0x0 0x14>;
941 status = "okay";
942 };
943 aml_sound_meson {
944 compatible = "aml, meson-snd-card";
945 status = "okay";
946 aml-sound-card,format = "i2s";
947 aml_sound_card,name = "AML-MESONAUDIO";
948 aml,audio-routing =
949 "Ext Spk","LOUTL",
950 "Ext Spk","LOUTR";
951
952 mute_gpio-gpios = <&gpio GPIOH_5 0>;
953 mute_inv;
954 hp_disable;
955 hp_paraments = <800 300 0 5 1>;
956 pinctrl-names = "aml_audio_i2s";
957 pinctrl-0 = <&audio_i2s_pins>;
958 cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
959 codec_list = <&codec0 &codec1 &codec2>;
960 plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
961 cpudai0: cpudai0 {
962 sound-dai = <&i2s_dai>;
963 };
964 cpudai1: cpudai1 {
965 sound-dai = <&spdif_dai>;
966 };
967 cpudai2: cpudai2 {
968 sound-dai = <&pcm_dai>;
969 };
970 codec0: codec0 {
971 sound-dai = <&amlogic_codec>;
972 };
973 codec1: codec1 {
974 sound-dai = <&spdif_codec>;
975 };
976 codec2: codec2 {
977 sound-dai = <&pcm_codec>;
978 };
979 };
980 /* END OF AUDIO board specific */
981 rdma{
982 compatible = "amlogic, meson, rdma";
983 dev_name = "amlogic-rdma";
984 status = "ok";
985 interrupts = <0 89 1>;
986 interrupt-names = "rdma";
987 };
988
989 amvenc_avc{
990 compatible = "amlogic, amvenc_avc";
991 dev_name = "amvenc_avc";
992 status = "okay";
993 interrupts = <0 45 1>;
994 interrupt-names = "mailbox_2";
995 };
996
997 hevc_enc{
998 compatible = "cnm, HevcEnc";
999 dev_name = "HevcEnc";
1000 status = "okay";
1001 interrupts = <0 187 1>;
1002 interrupt-names = "wave420l_irq";
1003 #address-cells=<2>;
1004 #size-cells=<2>;
1005 ranges;
1006 io_reg_base{
1007 reg = <0x0 0xc8810000 0x0 0x4000>;
1008 };
1009 };
1010
1011 picdec {
1012 compatible = "amlogic, picdec";
1013 memory-region = <&picdec_cma_reserved>;
1014 dev_name = "picdec";
1015 status = "okay";
1016 };
1017
1018 ppmgr {
1019 compatible = "amlogic, ppmgr";
1020 memory-region = <&ppmgr_reserved>;
1021 dev_name = "ppmgr";
1022 status = "okay";
1023 };
1024
1025 deinterlace {
1026 compatible = "amlogic, deinterlace";
1027 status = "okay";
1028 flag_cma = <1>;/*0:use reserved;1:use cma*/
1029 //memory-region = <&di_reserved>;
1030 memory-region = <&di_cma_reserved>;
1031 interrupts = <0 46 1
1032 0 6 1>;
1033 interrupt-names = "de_irq",
1034 "timerc";
1035 /* mtn_size(byte) = 1920*544/2 */
1036 /* count_size(byte) = 1920*544/2 */
1037 /* mv_size(byte) = 1920*544*2/5 */
1038 /* mc_size(byte) = 544*2 */
1039 buffer-size = <3552320>;
1040 hw-version = <2>;
1041 /* reserve-iomap = "true"; */
1042 /* if enable nr10bit, set nr10bit-surpport to 1 */
1043 nr10bit-surpport = <0>;
1044 };
1045
1046 ionvideo {
1047 compatible = "amlogic, ionvideo";
1048 dev_name = "ionvideo";
1049 status = "okay";
1050 };
1051
1052 amlvideo {
1053 compatible = "amlogic, amlvideo";
1054 dev_name = "amlvideo";
1055 status = "okay";
1056 };
1057
1058 amlvideo2_0 {
1059 compatible = "amlogic, amlvideo2";
1060 dev_name = "amlvideo2";
1061 status = "okay";
1062 amlvideo2_id = <0>;
1063 cma_mode = <1>;
1064 };
1065
1066 amlvideo2_1 {
1067 compatible = "amlogic, amlvideo2";
1068 dev_name = "amlvideo2";
1069 status = "okay";
1070 amlvideo2_id = <1>;
1071 cma_mode = <1>;
1072 };
1073
1074 /*if you want to use vdin just modify status to "ok"*/
1075 vdin0 {
1076 compatible = "amlogic, vdin";
1077 /*memory-region = <&vdin0_cma_reserved>;*/
1078 dev_name = "vdin0";
1079 status = "ok";
1080 reserve-iomap = "true";
1081 flag_cma = <1>;/*1:share with codec_mm;2:cma alone*/
1082 /*MByte, if 10bit disable: 64M(YUV422),
1083 *if 10bit enable: 64*1.5 = 96M(YUV422)
1084 *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
1085 *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
1086 *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
1087 *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
1088 */
1089 cma_size = <16>;
1090 interrupts = <0 83 1>;
1091 rdma-irq = <2>;
1092 /*clocks = <&clock CLK_FPLL_DIV5>,
1093 * <&clock CLK_VDIN_MEAS_CLK>;
1094 *clock-names = "fclk_div5", "cts_vdin_meas_clk";
1095 */
1096 vdin_id = <0>;
1097 /*vdin write mem color depth support:
1098 *bit0:support 8bit
1099 *bit1:support 9bit
1100 *bit2:support 10bit
1101 *bit3:support 12bit
1102 *bit4:support yuv422 10bit full pack mode (from txl new add)
1103 */
1104 tv_bit_mode = <1>;
1105 };
1106 vdin1 {
1107 compatible = "amlogic, vdin";
1108 memory-region = <&vdin1_cma_reserved>;
1109 dev_name = "vdin1";
1110 status = "ok";
1111 reserve-iomap = "true";
1112 flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
1113 interrupts = <0 85 1>;
1114 rdma-irq = <4>;
1115 /*clocks = <&clock CLK_FPLL_DIV5>,
1116 * <&clock CLK_VDIN_MEAS_CLK>;
1117 *clock-names = "fclk_div5", "cts_vdin_meas_clk";
1118 */
1119 vdin_id = <1>;
1120 /*vdin write mem color depth support:
1121 *bit0:support 8bit
1122 *bit1:support 9bit
1123 *bit2:support 10bit
1124 *bit3:support 12bit
1125 */
1126 tv_bit_mode = <1>;
1127 };
1128
1129 amlvecm {
1130 compatible = "amlogic, vecm";
1131 dev_name = "aml_vecm";
1132 status = "okay";
1133 gamma_en = <0>;/*1:enabel ;0:disable*/
1134 wb_en = <0>;/*1:enabel ;0:disable*/
1135 cm_en = <0>;/*1:enabel ;0:disable*/
1136 };
1137
1138 unifykey{
1139 compatible = "amlogic, unifykey";
1140 status = "ok";
1141
1142 unifykey-num = <14>;
1143 unifykey-index-0 = <&keysn_0>;
1144 unifykey-index-1 = <&keysn_1>;
1145 unifykey-index-2 = <&keysn_2>;
1146 unifykey-index-3 = <&keysn_3>;
1147 unifykey-index-4 = <&keysn_4>;
1148 unifykey-index-5 = <&keysn_5>;
1149 unifykey-index-6 = <&keysn_6>;
1150 unifykey-index-7 = <&keysn_7>;
1151 unifykey-index-8 = <&keysn_8>;
1152 unifykey-index-9 = <&keysn_9>;
1153 unifykey-index-10= <&keysn_10>;
1154 unifykey-index-11= <&keysn_11>;
1155 unifykey-index-12= <&keysn_12>;
1156 unifykey-index-13= <&keysn_13>;
1157
1158 keysn_0: key_0{
1159 key-name = "usid";
1160 key-device = "normal";
1161 key-permit = "read","write","del";
1162 };
1163 keysn_1:key_1{
1164 key-name = "mac";
1165 key-device = "normal";
1166 key-permit = "read","write","del";
1167 };
1168 keysn_2:key_2{
1169 key-name = "hdcp";
1170 key-device = "secure";
1171 key-type = "sha1";
1172 key-permit = "read","write","del";
1173 };
1174 keysn_3:key_3{
1175 key-name = "secure_boot_set";
1176 key-device = "efuse";
1177 key-permit = "write";
1178 };
1179 keysn_4:key_4{
1180 key-name = "mac_bt";
1181 key-device = "normal";
1182 key-permit = "read","write","del";
1183 key-type = "mac";
1184 };
1185 keysn_5:key_5{
1186 key-name = "mac_wifi";
1187 key-device = "normal";
1188 key-permit = "read","write","del";
1189 key-type = "mac";
1190 };
1191 keysn_6:key_6{
1192 key-name = "hdcp2_tx";
1193 key-device = "normal";
1194 key-permit = "read","write","del";
1195 };
1196 keysn_7:key_7{
1197 key-name = "hdcp2_rx";
1198 key-device = "normal";
1199 key-permit = "read","write","del";
1200 };
1201 keysn_8:key_8{
1202 key-name = "widevinekeybox";
1203 key-device = "secure";
1204 key-permit = "read","write","del";
1205 };
1206 keysn_9:key_9{
1207 key-name = "deviceid";
1208 key-device = "normal";
1209 key-permit = "read","write","del";
1210 };
1211 keysn_10:key_10{
1212 key-name = "hdcp22_fw_private";
1213 key-device = "secure";
1214 key-permit = "read","write","del";
1215 };
1216 keysn_11:key_11{
1217 key-name = "PlayReadykeybox25";
1218 key-device = "secure";
1219 key-permit = "read","write","del";
1220 };
1221 keysn_12:key_12{
1222 key-name = "prpubkeybox";// PlayReady
1223 key-device = "secure";
1224 key-permit = "read","write","del";
1225 };
1226 keysn_13:key_13{
1227 key-name = "prprivkeybox";// PlayReady
1228 key-device = "secure";
1229 key-permit = "read","write","del";
1230 };
1231 };//End unifykey
1232
1233};
1234
1235&gpu{
1236 /*max gpu is 650M*/
1237 tbl = <&clk125_cfg &clk285_cfg &clk400_cfg
1238 &clk500_cfg &clk666_cfg &clk666_cfg>;
1239};
1240
1241&efuse {
1242 status = "ok";
1243};
1244
1245&pwm_ef {
1246 status = "okay";
1247};
1248
1249&audio_data{
1250 status = "okay";
1251};
1252&spicc{
1253 status = "disabled";
1254 pinctrl-names = "spicc_pulldown","spicc_pullup";
1255 pinctrl-0 = <&spicc_pulldown_x8x9x11>;
1256 pinctrl-1 = <&spicc_pullup_x8x9x11>;
1257 num_chipselect = <1>;
1258 cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_HIGH>;
1259 dma_en = <0>;
1260 dma_tx_threshold = <3>;
1261 dma_rx_threshold = <3>;
1262 dma_num_per_read_burst = <3>;
1263 dma_num_per_write_burst = <3>;
1264 delay_control = <0x15>;
1265 ssctl = <0>;
1266};
1267