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path: root/arch/arm64/boot/dts/amlogic/gxl_p244_1g.dts (plain)
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1/*
2 * arch/arm64/boot/dts/amlogic/gxl_p244_1g.dts
3 *
4 * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18/dts-v1/;
19
20#include "mesongxl.dtsi"
21#include "partition_mbox_normal.dtsi"
22/ {
23 model = "Amlogic";
24 amlogic-dt-id = "gxl_p244_1g";
25 compatible = "amlogic, Gxl";
26 interrupt-parent = <&gic>;
27 #address-cells = <2>;
28 #size-cells = <2>;
29
30 aliases {
31 serial0 = &uart_AO;
32 serial1 = &uart_A;
33 serial2 = &uart_B;
34 serial3 = &uart_C;
35 serial4 = &uart_AO_B;
36 };
37
38 ion_dev {
39 compatible = "amlogic, ion_dev";
40 memory-region = <&ion_reserved>;
41 };
42
43 memory@00000000 {
44 device_type = "memory";
45 linux,usable-memory = <0x0 0x0100000 0x0 0x3ff00000>;
46 };
47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52 /* global autoconfigured region for contiguous allocations */
53 secmon_reserved:linux,secmon {
54 compatible = "shared-dma-pool";
55 reusable;
56 size = <0x0 0x400000>;
57 alignment = <0x0 0x400000>;
58 alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
59 };
60 secos_reserved:linux,secos {
61 status = "disable";
62 compatible = "amlogic, aml_secos_memory";
63 reg = <0x0 0x05300000 0x0 0x2000000>;
64 no-map;
65 };
66 logo_reserved:linux,meson-fb {
67 compatible = "shared-dma-pool";
68 reusable;
69 size = <0x0 0x400000>;
70 alignment = <0x0 0x400000>;
71 alloc-ranges = <0x0 0x3fc00000 0x0 0x400000>;
72 };
73 //don't put other dts in front of logo_reserved
74
75 //di_reserved:linux,di {
76 // compatible = "amlogic, di-mem";
77 /** 10x3133440=30M(0x1e) support 8bit **/
78 // size = <0x0 0x1e00000>;
79 //no-map;
80 //};
81 di_cma_reserved:linux,di_cma {
82 compatible = "shared-dma-pool";
83 reusable;
84 /** 10x3133440=30M(0x1e) support 8bit **/
85 size = <0x0 0x2000000>;
86 alignment = <0x0 0x400000>;
87 };
88 ion_reserved:linux,ion-dev {
89 compatible = "shared-dma-pool";
90 reusable;
91 size = <0x0 0x4C00000>;
92 alignment = <0x0 0x400000>;
93 };
94
95 /* vdin0 CMA pool */
96 //vdin0_cma_reserved:linux,vdin0_cma {
97 // compatible = "shared-dma-pool";
98 // linux,phandle = <4>;
99 // reusable;
100 /* 1920x1080x2x4 =16+4 M */
101 // size = <0x0 0x01400000>;
102 // alignment = <0x0 0x400000>;
103 //};
104 /* vdin1 CMA pool */
105 vdin1_cma_reserved:linux,vdin1_cma {
106 compatible = "shared-dma-pool";
107 reusable;
108 /* 1920x1080x2x4 =16 M */
109 size = <0x0 0x01000000>;
110 alignment = <0x0 0x400000>;
111 };
112 /* POST PROCESS MANAGER */
113 ppmgr_reserved:linux,ppmgr {
114 compatible = "shared-dma-pool";
115 size = <0x0 0x0>;
116 };
117
118 codec_mm_cma:linux,codec_mm_cma {
119 compatible = "shared-dma-pool";
120 reusable;
121 /* ion_codec_mm max can alloc size 80M*/
122 size = <0x0 0xd000000>;
123 alignment = <0x0 0x400000>;
124 linux,contiguous-region;
125 };
126 picdec_cma_reserved:linux,picdec {
127 compatible = "shared-dma-pool";
128 reusable;
129 size = <0x0 0x0>;
130 alignment = <0x0 0x0>;
131 linux,contiguous-region;
132 };
133 /* codec shared reserved */
134 codec_mm_reserved:linux,codec_mm_reserved {
135 compatible = "amlogic, codec-mm-reserved";
136 size = <0x0 0x0>;
137 alignment = <0x0 0x100000>;
138 //no-map;
139 };
140 };
141
142 amlogic_battery:dummy-battery {
143 compatible = "amlogic, dummy-battery";
144 status = "disabled";
145 };
146
147 amlogic_charger:dummy-charger {
148 compatible = "amlogic, dummy-charger";
149 status = "disabled";
150 };
151
152 bt-dev{
153 compatible = "amlogic, bt-dev";
154 dev_name = "bt-dev";
155 status = "okay";
156 gpio_reset = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
157 };
158
159 wifi{
160 compatible = "amlogic, aml_wifi";
161 dev_name = "aml_wifi";
162 status = "okay";
163 interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
164 irq_trigger_type = "GPIO_IRQ_LOW";
165 dhd_static_buf; //dhd_static_buf support
166 power_on_pin = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&wifi_32k_pins>;
169 pwm_config = <&wifi_pwm_conf>;
170 };
171
172 wifi_pwm_conf:wifi_pwm_conf{
173 pwm_channel1_conf {
174 pwms = <&pwm_ef MESON_PWM_0 30541 0>;
175 duty-cycle = <15270>;
176 times = <8>;
177 };
178 pwm_channel2_conf {
179 pwms = <&pwm_ef MESON_PWM_2 30500 0>;
180 duty-cycle = <15250>;
181 times = <12>;
182 };
183 };
184
185 sd_emmc_c: emmc@d0074000 {
186 status = "okay";
187 compatible = "amlogic, meson-mmc-gxl";
188 reg = <0x0 0xd0074000 0x0 0x2000>;
189 interrupts = <0 218 1>;
190 pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
191 pinctrl-0 = <&emmc_clk_cmd_pins>;
192 pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
193 clocks = <&clkc CLKID_SD_EMMC_C>,
194 <&clkc CLKID_SD_EMMC_C_P0_COMP>,
195 <&clkc CLKID_FCLK_DIV2>;
196 clock-names = "core", "clkin0", "clkin1";
197
198 bus-width = <8>;
199 cap-sd-highspeed;
200 cap-mmc-highspeed;
201 mmc-ddr-1_8v;
202 mmc-hs200-1_8v;
203
204 max-frequency = <200000000>;
205 non-removable;
206 disable-wp;
207 emmc {
208 pinname = "emmc";
209 ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
210 caps = "MMC_CAP_8_BIT_DATA",
211 "MMC_CAP_MMC_HIGHSPEED",
212 "MMC_CAP_SD_HIGHSPEED",
213 "MMC_CAP_NONREMOVABLE",
214 "MMC_CAP_1_8V_DDR",
215 "MMC_CAP_HW_RESET",
216 "MMC_CAP_ERASE",
217 "MMC_CAP_CMD23";
218 caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
219 f_min = <400000>;
220 f_max = <100000000>;
221 max_req_size = <0x20000>; /**128KB*/
222 gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
223 hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
224 card_type = <1>;
225 /* 1:mmc card(include eMMC),
226 * 2:sd card(include tSD)
227 */
228 };
229 };
230
231 sd_emmc_b:sd@d0072000 {
232 status = "okay";
233 compatible = "amlogic, meson-mmc-gxl";
234 reg = <0x0 0xd0072000 0x0 0x2000>;
235 interrupts = <0 217 1>;
236 pinctrl-names = "sd_all_pins",
237 "sd_clk_cmd_pins",
238 "sd_1bit_pins",
239 "sd_clk_cmd_uart_pins",
240 "sd_1bit_uart_pins",
241 "sd_to_ao_uart_pins",
242 "ao_to_sd_uart_pins",
243 "ao_to_sd_jtag_pins",
244 "sd_to_ao_jtag_pins";
245 pinctrl-0 = <&sd_all_pins>;
246 pinctrl-1 = <&sd_clk_cmd_pins>;
247 pinctrl-2 = <&sd_1bit_pins>;
248 pinctrl-3 = <&sd_to_ao_uart_clr_pins
249 &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
250 pinctrl-4 = <&sd_to_ao_uart_clr_pins
251 &sd_1bit_pins &ao_to_sd_uart_pins>;
252 pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
253 pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
254 pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
255 pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
256 clocks = <&clkc CLKID_SD_EMMC_B>,
257 <&clkc CLKID_SD_EMMC_B_P0_COMP>,
258 <&clkc CLKID_FCLK_DIV2>;
259 clock-names = "core", "clkin0", "clkin1";
260
261 bus-width = <4>;
262 cap-sd-highspeed;
263 max-frequency = <100000000>;
264 disable-wp;
265 sd {
266 pinname = "sd";
267 ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
268 caps = "MMC_CAP_4_BIT_DATA",
269 "MMC_CAP_MMC_HIGHSPEED",
270 "MMC_CAP_SD_HIGHSPEED";
271 /* "MMC_CAP_UHS_SDR12",
272 * "MMC_CAP_UHS_SDR25",
273 * "MMC_CAP_UHS_SDR50",
274 * "MMC_CAP_UHS_SDR104";
275 */
276 f_min = <400000>;
277 f_max = <100000000>;
278 max_req_size = <0x20000>; /**128KB*/
279 gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
280 jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
281 gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
282 card_type = <5>;
283 /* 0:unknown,
284 * 1:mmc card(include eMMC),
285 * 2:sd card(include tSD),
286 * 3:sdio device(ie:sdio-wifi),
287 * 4:SD combo (IO+mem) card,
288 * 5:NON sdio device(means sd/mmc card),
289 * other:reserved
290 */
291 };
292 };
293
294 sd_emmc_a:sdio@d0070000 {
295 status = "okay";
296 compatible = "amlogic, meson-mmc-gxl";
297 reg = <0x0 0xd0070000 0x0 0x2000>;
298 interrupts = <0 216 4>;
299 pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
300 pinctrl-0 = <&sdio_clk_cmd_pins>;
301 pinctrl-1 = <&sdio_all_pins>;
302 clocks = <&clkc CLKID_SD_EMMC_A>,
303 <&clkc CLKID_SD_EMMC_A_P0_COMP>,
304 <&clkc CLKID_FCLK_DIV2>;
305 clock-names = "core", "clkin0", "clkin1";
306
307 bus-width = <4>;
308 cap-sd-highspeed;
309 cap-mmc-highspeed;
310 max-frequency = <100000000>;
311 non-removable;
312 disable-wp;
313 sdio {
314 pinname = "sdio";
315 ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
316 caps = "MMC_CAP_4_BIT_DATA",
317 "MMC_CAP_MMC_HIGHSPEED",
318 "MMC_CAP_SD_HIGHSPEED",
319 "MMC_CAP_NONREMOVABLE",
320 "MMC_CAP_UHS_SDR12",
321 "MMC_CAP_UHS_SDR25",
322 "MMC_CAP_UHS_SDR50",
323 "MMC_CAP_UHS_SDR104",
324 "MMC_PM_KEEP_POWER",
325 "MMC_CAP_SDIO_IRQ";
326 f_min = <400000>;
327 f_max = <200000000>;
328 max_req_size = <0x20000>; /**128KB*/
329 card_type = <3>;
330 /* 3:sdio device(ie:sdio-wifi),
331 * 4:SD combo (IO+mem) card
332 */
333 };
334 };
335 mtd_nand{
336 compatible = "amlogic, aml_mtd_nand";
337 dev_name = "mtdnand";
338 status = "disabled";
339 reg = <0x0 0xd0074800 0x0 0x200>;
340 interrupts = < 0 34 1 >;
341 pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
342 pinctrl-0 = <&all_nand_pins>;
343 pinctrl-1 = <&all_nand_pins>;
344 pinctrl-2 = <&nand_cs_pins>;
345 device_id = <0>;
346 plat-names = "bootloader","nandnormal";
347 plat-num = <2>;
348 plat-part-0 = <&bootloader>;
349 plat-part-1 = <&nandnormal>;
350 bootloader: bootloader{
351 enable_pad ="ce0";
352 busy_pad = "rb0";
353 timming_mode = "mode5";
354 bch_mode = "bch60_1k";
355 t_rea = <20>;
356 t_rhoh = <15>;
357 chip_num = <1>;
358 part_num = <0>;
359 rb_detect = <1>;
360 };
361 nandnormal: nandnormal{
362 enable_pad ="ce0","ce1";
363 busy_pad = "rb0","rb1";
364 timming_mode = "mode5";
365 bch_mode = "bch60_1k";
366 plane_mode = "twoplane";
367 t_rea = <20>;
368 t_rhoh = <15>;
369 chip_num = <2>;
370 part_num = <3>;
371 partition = <&nand_partitions>;
372 rb_detect = <1>;
373 };
374 nand_partitions:nand_partition{
375 logo{
376 offset=<0x0 0x0>;
377 size=<0x0 0x200000>;
378 };
379 recovery{
380 offset=<0x0 0x0>;
381 size=<0x0 0x1000000>;
382 };
383 boot{
384 offset=<0x0 0x0>;
385 size=<0x0 0xC00000>;
386 };
387 system{
388 offset=<0x0 0x0>;
389 size=<0x0 0xDC40000>;
390 };
391 data{
392 offset=<0xffffffff 0xffffffff>;
393 size=<0x0 0x0>;
394 };
395 };
396 };
397
398 ethmac: ethernet@0xc9410000 {
399 compatible = "amlogic, gxbb-eth-dwmac";
400 status = "disabled";
401 reg = <0x0 0xc9410000 0x0 0x10000
402 0x0 0xc8834540 0x0 0x8
403 0x0 0xc8834558 0x0 0xc>;
404 interrupts = <0 8 1>;
405 pinctrl-names = "external_eth_pins";
406 pinctrl-0 = <&external_eth_pins>;
407 rst_pin-gpios = <&gpio GPIOZ_14 0>;
408 GPIOZ4_pin-gpios = <&gpio GPIOZ_4 0>;
409 GPIOZ5_pin-gpios = <&gpio GPIOZ_5 0>;
410 mc_val_internal_phy = <0x1800>;
411 mc_val_external_phy = <0x1621>;
412 cali_val = <0x20000>;
413 interrupt-names = "macirq";
414 clocks = <&clkc CLKID_ETH>;
415 clock-names = "ethclk81";
416 internal_phy=<1>;
417 };
418
419 aml_sensor0: aml-sensor@0 {
420 compatible = "amlogic, aml-thermal";
421 device_name = "thermal";
422 #thermal-sensor-cells = <1>;
423 cooling_devices {
424 cpufreq_cool_cluster0 {
425 min_state = <1000000>;
426 dyn_coeff = <140>;
427 cluster_id = <0>;
428 node_name = "cpufreq_cool0";
429 device_type = "cpufreq";
430 };
431 cpucore_cool_cluster0 {
432 min_state = <3>;
433 dyn_coeff = <0>;
434 cluster_id = <0>;
435 node_name = "cpucore_cool0";
436 device_type = "cpucore";
437 };
438 gpufreq_cool {
439 min_state = <500>;
440 dyn_coeff = <437>;
441 cluster_id = <0>;
442 node_name = "gpufreq_cool0";
443 device_type = "gpufreq";
444 };
445 gpucore_cool {
446 min_state = <1>;
447 dyn_coeff = <0>;
448 cluster_id = <0>;
449 node_name = "gpucore_cool0";
450 device_type = "gpucore";
451 };
452 };
453 cpufreq_cool0:cpufreq_cool0 {
454 #cooling-cells = <2>; /* min followed by max */
455 };
456 cpucore_cool0:cpucore_cool0 {
457 #cooling-cells = <2>; /* min followed by max */
458 };
459 gpufreq_cool0:gpufreq_cool0 {
460 #cooling-cells = <2>; /* min followed by max */
461 };
462 gpucore_cool0:gpucore_cool0 {
463 #cooling-cells = <2>; /* min followed by max */
464 };
465 };
466 thermal-zones {
467 soc_thermal {
468 polling-delay = <1000>;
469 polling-delay-passive = <100>;
470 sustainable-power = <2150>;
471
472 thermal-sensors = <&aml_sensor0 3>;
473
474 trips {
475 switch_on: trip-point@0 {
476 temperature = <90000>;
477 hysteresis = <1000>;
478 type = "passive";
479 };
480 control: trip-point@1 {
481 temperature = <95000>;
482 hysteresis = <1000>;
483 type = "passive";
484 };
485 hot: trip-point@2 {
486 temperature = <105000>;
487 hysteresis = <5000>;
488 type = "hot";
489 };
490 critical: trip-point@3 {
491 temperature = <120000>;
492 hysteresis = <1000>;
493 type = "critical";
494 };
495 };
496
497 cooling-maps {
498 cpufreq_cooling_map {
499 trip = <&control>;
500 cooling-device = <&cpufreq_cool0 0 4>;
501 contribution = <1024>;
502 };
503 cpucore_cooling_map {
504 trip = <&control>;
505 cooling-device = <&cpucore_cool0 0 3>;
506 contribution = <1024>;
507 };
508 gpufreq_cooling_map {
509 trip = <&control>;
510 cooling-device = <&gpufreq_cool0 0 4>;
511 contribution = <1024>;
512 };
513 gpucore_cooling_map {
514 trip = <&control>;
515 cooling-device = <&gpucore_cool0 0 2>;
516 contribution = <1024>;
517 };
518 };
519 };
520 };
521
522 dwc3: dwc3@c9000000 {
523 compatible = "synopsys, dwc3";
524 reg = <0x0 0xc9000000 0x0 0x100000>;
525 interrupts = <0 30 4>;
526 usb-phy = <&usb2_phy>, <&usb3_phy>;
527 cpu-type = "gxl";
528 clock-src = "usb3.0";
529 };
530
531 usb2_phy: usb2phy@d0078000 {
532 compatible = "amlogic, amlogic-new-usb2";
533 portnum = <3>;
534 reg = <0x0 0xd0078000 0x0 0x80
535 0x0 0xc1104408 0x0 0x4>;
536 };
537
538 usb3_phy: usb3phy@d0078080 {
539 compatible = "amlogic, amlogic-new-usb3";
540 portnum = <0>;
541 reg = <0x0 0xd0078080 0x0 0x20>;
542 };
543
544 dwc2_a {
545 compatible = "amlogic, dwc2";
546 device_name = "dwc2_a";
547 reg = <0x0 0xc9100000 0x0 0x40000>;
548 status = "okay";
549 interrupts = <0 31 4>;
550 pl-periph-id = <0>; /** lm name */
551 clock-src = "usb0"; /** clock src */
552 port-id = <0>; /** ref to mach/usb.h */
553 port-type = <2>; /** 0: otg, 1: host, 2: slave */
554 port-speed = <0>; /** 0: default, high, 1: full */
555 port-config = <0>; /** 0: default */
556 port-dma = <0>; /** 0: default ... 6: disable*/
557 port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
558 usb-fifo = <728>;
559 cpu-type = "gxl";
560 controller-type = <1>; /** 0: normal, 1: host, 2: device*/
561 phy-reg = <0xd0078000>;
562 phy-reg-size = <0xa0>;
563 clocks = <&clkc CLKID_USB_GENERAL
564 &clkc CLKID_USB1_TO_DDR
565 &clkc CLKID_USB1>;
566 clock-names = "usb_general",
567 "usb1",
568 "usb1_to_ddr";
569 };
570
571 meson-amvideom {
572 compatible = "amlogic, amvideom";
573 dev_name = "amvideom";
574 status = "okay";
575 interrupts = <0 3 1>;
576 interrupt-names = "vsync";
577 };
578
579 vout {
580 compatible = "amlogic, vout";
581 dev_name = "vout";
582 status = "okay";
583 fr_auto_policy = <0>;
584 };
585
586 cvbsout {
587 compatible = "amlogic, cvbsout-gxl";
588 dev_name = "cvbsout";
589 status = "disabled";
590 clocks = <&clkc CLKID_VCLK2_ENCI
591 &clkc CLKID_VCLK2_VENCI0
592 &clkc CLKID_VCLK2_VENCI1
593 &clkc CLKID_DAC_CLK>;
594 clock-names = "venci_top_gate",
595 "venci_0_gate",
596 "venci_1_gate",
597 "vdac_clk_gate";
598
599 /* performance: reg_address, reg_value */
600 /* s905x */
601 performance = <0x1bf0 0x9
602 0x1b56 0x343
603 0x1b12 0x8080
604 0x1b05 0xfd
605 0x1c59 0xf752
606 0xffff 0x0>; /* ending flag */
607 };
608
609 amhdmitx: amhdmitx{
610 compatible = "amlogic, amhdmitx";
611 dev_name = "amhdmitx";
612 status = "okay";
613 vend-data = <&vend_data>;
614 pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
615 pinctrl-0=<&hdmitx_hpd>;
616 pinctrl-1=<&hdmitx_ddc>;
617 /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
618 interrupts = <0 57 1>;
619 interrupt-names = "hdmitx_hpd";
620 /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
621 * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
622 */
623 ic_type = <3>;
624 vend_data: vend_data{ /* Should modified by Customer */
625 vendor_name = "Amlogic"; /* Max Chars: 8 */
626 /* standards.ieee.org/develop/regauth/oui/oui.txt */
627 vendor_id = <0x000000>;
628 product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
629 };
630 };
631
632 aocec: aocec{
633 compatible = "amlogic, amlogic-aocec";
634 device_name = "aocec";
635 status = "okay";
636 vendor_id = <0x000000>;
637 cec_osd_string = "MBox"; /* Max Chars: 14 */
638 cec_version = <5>; /* 5: 1.4, 6: 2.0 */
639 port_num = <1>;
640 arc_port_mask = <0x0>;
641 interrupts = <0 199 1>;
642 interrupt-names = "hdmi_aocec";
643 pinctrl-names = "default";
644 pinctrl-0=<&hdmitx_aocec>;
645 reg = <0x0 0xc810023c 0x0 0x4
646 0x0 0xc8100000 0x0 0x200>;
647 reg-names = "ao_exit","ao";
648 };
649
650 sysled {
651 compatible = "amlogic, sysled";
652 dev_name = "sysled";
653 status = "disabled";
654 led_gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
655 led_active_low = <1>;
656 };
657
658 codec_io {
659 compatible = "amlogic, codec_io";
660 #address-cells=<2>;
661 #size-cells=<2>;
662 ranges;
663 io_cbus_base{
664 reg = <0x0 0xC1100000 0x0 0x100000>;
665 };
666 io_dos_base{
667 reg = <0x0 0xc8820000 0x0 0x10000>;
668 };
669 io_hiubus_base{
670 reg = <0x0 0xc883c000 0x0 0x2000>;
671 };
672 io_aobus_base{
673 reg = <0x0 0xc8100000 0x0 0x100000>;
674 };
675 io_vcbus_base{
676 reg = <0x0 0xd0100000 0x0 0x40000>;
677 };
678 io_dmc_base{
679 reg = <0x0 0xc8838000 0x0 0x400>;
680 };
681 };
682
683 codec_mm {
684 compatible = "amlogic, codec, mm";
685 memory-region = <&codec_mm_cma &codec_mm_reserved>;
686 dev_name = "codec_mm";
687 /*no-cmatvp;*/
688 status = "okay";
689 };
690
691 canvas{
692 compatible = "amlogic, meson, canvas";
693 dev_name = "amlogic-canvas";
694 status = "ok";
695 reg = <0x0 0xc8838000 0x0 0x400>;
696 };
697
698 mesonstream {
699 compatible = "amlogic, codec, streambuf";
700 dev_name = "mesonstream";
701 status = "okay";
702 clocks = <&clkc CLKID_DOS_PARSER
703 &clkc CLKID_DEMUX
704 &clkc CLKID_DOS
705 &clkc CLKID_CLK81
706 &clkc CLKID_VDEC_MUX
707 &clkc CLKID_HCODEC_MUX
708 &clkc CLKID_HEVC_MUX>;
709 clock-names = "parser_top",
710 "demux",
711 "vdec",
712 "clk_81",
713 "clk_vdec_mux",
714 "clk_hcodec_mux",
715 "clk_hevc_mux";
716 };
717
718 vdec {
719 compatible = "amlogic, vdec";
720 dev_name = "vdec.0";
721 status = "okay";
722 interrupts = <0 3 1
723 0 23 1
724 0 32 1
725 0 43 1
726 0 44 1
727 0 45 1>;
728 interrupt-names = "vsync",
729 "demux",
730 "parser",
731 "mailbox_0",
732 "mailbox_1",
733 "mailbox_2";
734 };
735
736 gpio_keypad{
737 compatible = "amlogic, gpio_keypad";
738 status = "okay";
739 scan_period = <20>;
740 key_num = <1>;
741 key_name = "power";
742 key_code = <116>;
743 key-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
744 detect_mode = <0>;/*0:polling mode, 1:irq mode*/
745 };
746 meson-fb {
747 compatible = "amlogic, meson-gxl";
748 memory-region = <&logo_reserved>;
749 dev_name = "meson-fb";
750 status = "okay";
751 interrupts = <0 3 1
752 0 89 1>;
753 interrupt-names = "viu-vsync", "rdma";
754 mem_size = <0x00400000 0x00b00000 0x00100000>;
755 /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
756 display_mode_default = "720p60hz";
757 scale_mode = <1>;
758 /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
759 display_size_default = <1280 720 1280 2160 32>;
760 /*1920*1080*4*3 = 0x17BB000*/
761 logo_addr = "0x3fc00000";
762 };
763 ge2d {
764 compatible = "amlogic, ge2d-gxl";
765 dev_name = "ge2d";
766 status = "okay";
767 interrupts = <0 150 1>;
768 interrupt-names = "ge2d";
769 clocks = <&clkc CLKID_VAPB_MUX>,
770 <&clkc CLKID_G2D>,
771 <&clkc CLKID_GE2D_GATE>;
772 clock-names = "clk_vapb_0",
773 "clk_ge2d",
774 "clk_ge2d_gate";
775 };
776
777
778 /* AUDIO MESON DEVICES */
779 i2s_dai: I2S {
780 #sound-dai-cells = <0>;
781 compatible = "amlogic, aml-i2s-dai";
782 clocks =
783 <&clkc CLKID_MPLL2>,
784 <&clkc CLKID_AMCLK_COMP>,
785 <&clkc CLKID_AIU_GLUE>,
786 <&clkc CLKID_IEC958>,
787 <&clkc CLKID_I2S_OUT>,
788 <&clkc CLKID_AMCLK>,
789 <&clkc CLKID_AIFIFO2>,
790 <&clkc CLKID_MIXER>,
791 <&clkc CLKID_MIXER_IFACE>,
792 <&clkc CLKID_ADC>,
793 <&clkc CLKID_AIU_TOP>,
794 <&clkc CLKID_AOCLK_GATE>,
795 <&clkc CLKID_I2S_SPDIF>;
796 clock-names =
797 "mpll",
798 "mclk",
799 "top_glue",
800 "aud_buf",
801 "i2s_out",
802 "amclk_measure",
803 "aififo2",
804 "aud_mixer",
805 "mixer_reg",
806 "adc",
807 "top_level",
808 "aoclk",
809 "aud_in";
810 i2s_pos_sync = <0>;
811 /*DMIC;*/ /* I2s Mic or Dmic, default for I2S mic */
812 };
813 dmic:snd_dmic {
814 #sound-dai-cells = <0>;
815 compatible = "aml, aml_snd_dmic";
816 reg = <0x0 0xd0042000 0x0 0x2000>;
817 status = "disabled";
818 resets = <
819 &clkc CLKID_PDM_GATE
820 >;
821 reset-names = "pdm";
822 pinctrl-names = "audio_dmic";
823 pinctrl-0 = <&aml_dmic_pins>;
824 clocks = <&clkc CLKID_PDM_COMP>,
825 <&clkc CLKID_AMCLK_COMP>;
826 clock-names = "pdm", "mclk";
827 };
828 spdif_dai: SPDIF {
829 #sound-dai-cells = <0>;
830 compatible = "amlogic, aml-spdif-dai";
831 clocks =
832 <&clkc CLKID_MPLL1>,
833 <&clkc CLKID_I958_COMP>,
834 <&clkc CLKID_AMCLK_COMP>,
835 <&clkc CLKID_I958_COMP_SPDIF>,
836 <&clkc CLKID_CLK81>,
837 <&clkc CLKID_IEC958>,
838 <&clkc CLKID_IEC958_GATE>;
839 clock-names =
840 "mpll1",
841 "i958",
842 "mclk",
843 "spdif",
844 "clk_81",
845 "iec958",
846 "iec958_amclk";
847 };
848 pcm_dai: PCM {
849 #sound-dai-cells = <0>;
850 compatible = "amlogic, aml-pcm-dai";
851 pinctrl-names = "audio_pcm";
852 pinctrl-0 = <&audio_pcm_pins>;
853 clocks =
854 <&clkc CLKID_MPLL0>,
855 <&clkc CLKID_PCM_MCLK_COMP>,
856 <&clkc CLKID_PCM_SCLK_GATE>;
857 clock-names =
858 "mpll0",
859 "pcm_mclk",
860 "pcm_sclk";
861 pcm_mode = <1>; /* 0=slave mode, 1=master mode */
862 };
863 i2s_plat: i2s_platform {
864 compatible = "amlogic, aml-i2s";
865 interrupts = <0 29 1>;
866 };
867 pcm_plat: pcm_platform {
868 compatible = "amlogic, aml-pcm";
869 };
870 spdif_codec: spdif_codec{
871 #sound-dai-cells = <0>;
872 compatible = "amlogic, aml-spdif-codec";
873 pinctrl-names = "audio_spdif";
874 pinctrl-0 = <&audio_spdif_pins>;
875 };
876 pcm_codec: pcm_codec{
877 #sound-dai-cells = <0>;
878 compatible = "amlogic, pcm2BT-codec";
879 };
880 /* endof AUDIO MESON DEVICES */
881
882 /* AUDIO board specific */
883 dummy_codec:dummy{
884 #sound-dai-cells = <0>;
885 compatible = "amlogic, aml_dummy_codec";
886 status = "okay";
887 };
888 amlogic_codec:t9015{
889 #sound-dai-cells = <0>;
890 compatible = "amlogic, aml_codec_T9015";
891 reg = <0x0 0xc8832000 0x0 0x14>;
892 status = "disable";
893 };
894 aml_sound_meson {
895 compatible = "aml, meson-snd-card";
896 status = "okay";
897 aml-sound-card,format = "i2s";
898 aml_sound_card,name = "AML-MESONAUDIO";
899 aml,audio-routing =
900 "Ext Spk","LOUTL",
901 "Ext Spk","LOUTR";
902
903 mute_gpio-gpios = <&gpio GPIOH_5 0>;
904 mute_inv;
905 hp_disable;
906 hp_paraments = <800 300 0 5 1>;
907 pinctrl-names = "audio_i2s";
908 pinctrl-0 = <&audio_i2s_pins>;
909 cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
910 codec_list = <&codec0 &codec1 &codec2>;
911 plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
912 cpudai0: cpudai0 {
913 sound-dai = <&i2s_dai>;
914 };
915 cpudai1: cpudai1 {
916 sound-dai = <&spdif_dai>;
917 };
918 cpudai2: cpudai2 {
919 sound-dai = <&pcm_dai>;
920 };
921 codec0: codec0 {
922 sound-dai = <&dummy_codec>;
923 };
924 codec1: codec1 {
925 sound-dai = <&spdif_codec>;
926 };
927 codec2: codec2 {
928 sound-dai = <&pcm_codec>;
929 };
930 };
931 /* END OF AUDIO board specific */
932 rdma{
933 compatible = "amlogic, meson, rdma";
934 dev_name = "amlogic-rdma";
935 status = "ok";
936 interrupts = <0 89 1>;
937 interrupt-names = "rdma";
938 };
939
940 amvenc_avc{
941 compatible = "amlogic, amvenc_avc";
942 dev_name = "amvenc_avc";
943 status = "okay";
944 interrupts = <0 45 1>;
945 interrupt-names = "mailbox_2";
946 };
947
948 hevc_enc{
949 compatible = "cnm, HevcEnc";
950 dev_name = "HevcEnc";
951 status = "okay";
952 interrupts = <0 187 1>;
953 interrupt-names = "wave420l_irq";
954 #address-cells=<2>;
955 #size-cells=<2>;
956 ranges;
957 io_reg_base{
958 reg = <0x0 0xc8810000 0x0 0x4000>;
959 };
960 };
961
962 picdec {
963 compatible = "amlogic, picdec";
964 memory-region = <&picdec_cma_reserved>;
965 dev_name = "picdec";
966 status = "okay";
967 };
968
969 ppmgr {
970 compatible = "amlogic, ppmgr";
971 memory-region = <&ppmgr_reserved>;
972 dev_name = "ppmgr";
973 status = "okay";
974 };
975
976 deinterlace {
977 compatible = "amlogic, deinterlace";
978 status = "okay";
979 flag_cma = <1>;/*0:use reserved;1:use cma*/
980 //memory-region = <&di_reserved>;
981 memory-region = <&di_cma_reserved>;
982 interrupts = <0 46 1 0 6 1>;
983 interrupt-names = "de_irq", "timerc";
984 /*
985 * nr_size(byte) = 1920*544*2(yuv422 8bit) |
986 * 1920*544*2*12/8(yuv422 10bit)
987 * | 1920*544*2*10/8(yuv422 10bit full pack mode)
988 */
989 /* mtn_size(byte) = 1920*544/2 */
990 /* count_size(byte) = 1920*544/2 */
991 buffer-size = <3133440>;
992 hw-version = <2>;
993 };
994
995 ionvideo {
996 compatible = "amlogic, ionvideo";
997 dev_name = "ionvideo";
998 status = "okay";
999 };
1000
1001 amlvideo {
1002 compatible = "amlogic, amlvideo";
1003 dev_name = "amlvideo";
1004 status = "okay";
1005 };
1006
1007 amlvideo2_0 {
1008 compatible = "amlogic, amlvideo2";
1009 dev_name = "amlvideo2";
1010 status = "okay";
1011 amlvideo2_id = <0>;
1012 cma_mode = <1>;
1013 };
1014
1015 amlvideo2_1 {
1016 compatible = "amlogic, amlvideo2";
1017 dev_name = "amlvideo2";
1018 status = "okay";
1019 amlvideo2_id = <1>;
1020 cma_mode = <1>;
1021 };
1022
1023 /*if you want to use vdin just modify status to "ok"*/
1024 vdin0 {
1025 compatible = "amlogic, vdin";
1026 /*memory-region = <&vdin0_cma_reserved>;*/
1027 dev_name = "vdin0";
1028 status = "ok";
1029 reserve-iomap = "true";
1030 flag_cma = <1>;/*1:share with codec_mm;2:cma alone*/
1031 /*MByte, if 10bit disable: 64M(YUV422),
1032 *if 10bit enable: 64*1.5 = 96M(YUV422)
1033 *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
1034 *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
1035 *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
1036 *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
1037 */
1038 cma_size = <16>;
1039 interrupts = <0 83 1>;
1040 rdma-irq = <2>;
1041 /*clocks = <&clock CLK_FPLL_DIV5>,
1042 * <&clock CLK_VDIN_MEAS_CLK>;
1043 *clock-names = "fclk_div5", "cts_vdin_meas_clk";
1044 */
1045 vdin_id = <0>;
1046 /*vdin write mem color depth support:
1047 *bit0:support 8bit
1048 *bit1:support 9bit
1049 *bit2:support 10bit
1050 *bit3:support 12bit
1051 *bit4:support yuv422 10bit full pack mode (from txl new add)
1052 */
1053 tv_bit_mode = <1>;
1054 };
1055 vdin1 {
1056 compatible = "amlogic, vdin";
1057 memory-region = <&vdin1_cma_reserved>;
1058 dev_name = "vdin1";
1059 status = "ok";
1060 reserve-iomap = "true";
1061 flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
1062 interrupts = <0 85 1>;
1063 rdma-irq = <4>;
1064 /*clocks = <&clock CLK_FPLL_DIV5>,
1065 * <&clock CLK_VDIN_MEAS_CLK>;
1066 *clock-names = "fclk_div5", "cts_vdin_meas_clk";
1067 */
1068 vdin_id = <1>;
1069 /*vdin write mem color depth support:
1070 *bit0:support 8bit
1071 *bit1:support 9bit
1072 *bit2:support 10bit
1073 *bit3:support 12bit
1074 */
1075 tv_bit_mode = <1>;
1076 };
1077
1078 amlvecm {
1079 compatible = "amlogic, vecm";
1080 dev_name = "aml_vecm";
1081 status = "okay";
1082 gamma_en = <0>;/*1:enabel ;0:disable*/
1083 wb_en = <0>;/*1:enabel ;0:disable*/
1084 cm_en = <0>;/*1:enabel ;0:disable*/
1085 /*1:enabel osd lut 100 table;0:disable*/
1086 cfg_en_osd_100 = <0>;
1087 /*0: 709/601 1: bt2020*/
1088 tx_op_color_primary = <1>;
1089 };
1090
1091 unifykey{
1092 compatible = "amlogic, unifykey";
1093 status = "ok";
1094
1095 unifykey-num = <18>;
1096 unifykey-index-0 = <&keysn_0>;
1097 unifykey-index-1 = <&keysn_1>;
1098 unifykey-index-2 = <&keysn_2>;
1099 unifykey-index-3 = <&keysn_3>;
1100 unifykey-index-4 = <&keysn_4>;
1101 unifykey-index-5 = <&keysn_5>;
1102 unifykey-index-6 = <&keysn_6>;
1103 unifykey-index-7 = <&keysn_7>;
1104 unifykey-index-8 = <&keysn_8>;
1105 unifykey-index-9 = <&keysn_9>;
1106 unifykey-index-10= <&keysn_10>;
1107 unifykey-index-11= <&keysn_11>;
1108 unifykey-index-12= <&keysn_12>;
1109 unifykey-index-13= <&keysn_13>;
1110 unifykey-index-14= <&keysn_14>;
1111 unifykey-index-15= <&keysn_15>;
1112 unifykey-index-16= <&keysn_16>;
1113 unifykey-index-17= <&keysn_17>;
1114
1115 keysn_0: key_0{
1116 key-name = "usid";
1117 key-device = "normal";
1118 key-permit = "read","write","del";
1119 };
1120 keysn_1:key_1{
1121 key-name = "mac";
1122 key-device = "normal";
1123 key-permit = "read","write","del";
1124 };
1125 keysn_2:key_2{
1126 key-name = "hdcp";
1127 key-device = "secure";
1128 key-type = "sha1";
1129 key-permit = "read","write","del";
1130 };
1131 keysn_3:key_3{
1132 key-name = "secure_boot_set";
1133 key-device = "efuse";
1134 key-permit = "write";
1135 };
1136 keysn_4:key_4{
1137 key-name = "mac_bt";
1138 key-device = "normal";
1139 key-permit = "read","write","del";
1140 key-type = "mac";
1141 };
1142 keysn_5:key_5{
1143 key-name = "mac_wifi";
1144 key-device = "normal";
1145 key-permit = "read","write","del";
1146 key-type = "mac";
1147 };
1148 keysn_6:key_6{
1149 key-name = "hdcp2_tx";
1150 key-device = "normal";
1151 key-permit = "read","write","del";
1152 };
1153 keysn_7:key_7{
1154 key-name = "hdcp2_rx";
1155 key-device = "normal";
1156 key-permit = "read","write","del";
1157 };
1158 keysn_8:key_8{
1159 key-name = "widevinekeybox";
1160 key-device = "secure";
1161 key-permit = "read","write","del";
1162 };
1163 keysn_9:key_9{
1164 key-name = "deviceid";
1165 key-device = "normal";
1166 key-permit = "read","write","del";
1167 };
1168 keysn_10:key_10{
1169 key-name = "hdcp22_fw_private";
1170 key-device = "secure";
1171 key-permit = "read","write","del";
1172 };
1173 keysn_11:key_11{
1174 key-name = "PlayReadykeybox25";
1175 key-device = "secure";
1176 key-permit = "read","write","del";
1177 };
1178 keysn_12:key_12{
1179 key-name = "prpubkeybox";// PlayReady
1180 key-device = "secure";
1181 key-permit = "read","write","del";
1182 };
1183 keysn_13:key_13{
1184 key-name = "prprivkeybox";// PlayReady
1185 key-device = "secure";
1186 key-permit = "read","write","del";
1187 };
1188 keysn_14:key_14{
1189 key-name = "attestationkeybox";// attestation key
1190 key-device = "secure";
1191 key-permit = "read","write","del";
1192 };
1193 keysn_15:key_15{
1194 key-name = "region_code";
1195 key-device = "normal";
1196 key-permit = "read","write","del";
1197 };
1198 keysn_16:key_16{
1199 key-name = "netflix_mgkid";
1200 key-device = "secure";
1201 key-permit = "read","write","del";
1202 };
1203 keysn_17:key_17{
1204 key-name = "oemkey";
1205 key-device = "normal";
1206 key-permit = "read","write","del";
1207 };
1208 };//End unifykey
1209
1210};
1211&efuse {
1212 status = "ok";
1213};
1214
1215&pwm_ef {
1216 status = "okay";
1217};
1218
1219&audio_data{
1220 status = "okay";
1221};
1222&spicc{
1223 status = "disabled";
1224 pinctrl-names = "spicc_pulldown","spicc_pullup";
1225 pinctrl-0 = <&spicc_pulldown_x8x9x11>;
1226 pinctrl-1 = <&spicc_pullup_x8x9x11>;
1227 num_chipselect = <1>;
1228 cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_HIGH>;
1229 dma_en = <0>;
1230 dma_tx_threshold = <3>;
1231 dma_rx_threshold = <3>;
1232 dma_num_per_read_burst = <3>;
1233 dma_num_per_write_burst = <3>;
1234 delay_control = <0x15>;
1235 ssctl = <0>;
1236};
1237
1238