Display: enable AFBC on dual display products [4/5]

PD#SWPL-22030

Problem:
AFBC is disabed in default on dual display products

Solution:
Main screen enable afbc, sub screen disable afbc

Verify:
adb shell dumpsys SurfaceFlinger
cat /sys/class/graphics/fb0/osd_afbcd
dual display show ok

Change-Id: I68e5d5dd86d37c184fbd09587ccce8aff60063a7
Signed-off-by: binqi zhang <binqi.zhang@amlogic.com>

3 files changed, 25 insertions, 15 deletions

diff --git a/common/base/include/DrmTypes.h b/common/base/include/DrmTypes.h
index 855c5ad..cf31b58 100644
--- a/common/base/include/DrmTypes.h
+++ b/common/base/include/DrmTypes.h
@@ -94,6 +94,7 @@ typedef enum {
     PLANE_NO_PRE_BLEND = (1 << 4),
     PLANE_PRE_BLEND_1 = (1 << 5),
     PLANE_PRE_BLEND_2  = (1 << 6),
+    PLANE_SUPPORT_AFBC  = (1 << 7),
 } drm_plane_capacity_t;
 
 typedef enum {
diff --git a/common/display/AmFramebuffer.h b/common/display/AmFramebuffer.h
index d7303c9..ebb4074 100644
--- a/common/display/AmFramebuffer.h
+++ b/common/display/AmFramebuffer.h
@@ -21,14 +21,15 @@ Amlogic defined ioctl, masks.
 #define AXIS_STR_LEN            (32)
 
 enum {
-    OSD_HW_CURSOR = (1 << 0),
-    OSD_UBOOT_LOGO = (1 << 1),
-    OSD_ZORDER = (1 << 2),
-    OSD_PRIMARY = (1 << 3),
-    OSD_FREESCALE = (1 << 4),
-    OSD_VIU2 = (1 << 29),
-    OSD_VIU1 = (1 << 30),
-    OSD_LAYER_ENABLE = (1 << 31)
+    OSD_HW_CURSOR     = (1 << 0),
+    OSD_UBOOT_LOGO    = (1 << 1),
+    OSD_ZORDER        = (1 << 2),
+    OSD_PRIMARY       = (1 << 3),
+    OSD_FREESCALE     = (1 << 4),
+    OSD_AFBC          = (1 << 5),
+    OSD_VIU2          = (1 << 29),
+    OSD_VIU1          = (1 << 30),
+    OSD_LAYER_ENABLE  = (1 << 31)
 };
 
 enum {
diff --git a/common/display/OsdPlane.cpp b/common/display/OsdPlane.cpp
index 0419620..5e6f564 100644
--- a/common/display/OsdPlane.cpp
+++ b/common/display/OsdPlane.cpp
@@ -45,6 +45,9 @@ int32_t OsdPlane::getProperties() {
     if (capacity & OSD_FREESCALE) {
         mCapability |= PLANE_SUPPORT_FREE_SCALE;
     }
+    if (capacity & OSD_AFBC) {
+        mCapability |= PLANE_SUPPORT_AFBC;
+    }
 
     /*set possible crtc*/
     if (capacity & OSD_VIU1) {
@@ -131,13 +134,18 @@ bool OsdPlane::isFbSupport(std::shared_ptr<DrmFramebuffer> & fb) {
                 return false;
         }
     } else {
-        switch (format) {
-            case HAL_PIXEL_FORMAT_RGBA_8888:
-            case HAL_PIXEL_FORMAT_RGBX_8888:
-                break;
-            default:
-                MESON_LOGE("afbc: %d, Layer format %d not support.", afbc, format);
-                return false;
+        if ((mCapability & PLANE_SUPPORT_AFBC) == PLANE_SUPPORT_AFBC) {
+            switch (format) {
+                case HAL_PIXEL_FORMAT_RGBA_8888:
+                case HAL_PIXEL_FORMAT_RGBX_8888:
+                    break;
+                default:
+                    MESON_LOGE("afbc: %d, Layer format %d not support.", afbc, format);
+                    return false;
+            }
+        } else {
+            MESON_LOGI("AFBC buffer && unsupported AFBC plane, turn to GPU composition");
+            return false;
         }
     }