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path: root/drivers/frame_provider/decoder/h264/vh264.c (plain)
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1/*
2 * drivers/amlogic/media/frame_provider/decoder/h264/vh264.c
3 *
4 * Copyright (C) 2016 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18#define DEBUG
19#include <linux/kernel.h>
20#include <linux/types.h>
21#include <linux/errno.h>
22#include <linux/interrupt.h>
23#include <linux/timer.h>
24#include <linux/kfifo.h>
25#include <linux/platform_device.h>
26
27#include <linux/amlogic/media/utils/amstream.h>
28#include <linux/amlogic/media/frame_sync/ptsserv.h>
29#include <linux/amlogic/media/vfm/vframe.h>
30#include <linux/amlogic/media/vfm/vframe_provider.h>
31#include <linux/amlogic/media/vfm/vframe_receiver.h>
32#include <linux/amlogic/media/utils/vformat.h>
33#include <linux/amlogic/media/frame_sync/tsync.h>
34#include <linux/workqueue.h>
35#include <linux/dma-mapping.h>
36#include <linux/atomic.h>
37#include <linux/module.h>
38#include <linux/slab.h>
39#include "../../../stream_input/amports/amports_priv.h"
40#include <linux/amlogic/media/canvas/canvas.h>
41
42#include "../utils/vdec.h"
43#include <linux/amlogic/media/utils/vdec_reg.h>
44#include "../utils/amvdec.h"
45#include "vh264.h"
46#include "../../../stream_input/parser/streambuf.h"
47#include <linux/delay.h>
48#include <linux/amlogic/media/video_sink/video.h>
49#include <linux/amlogic/tee.h>
50#include <linux/amlogic/media/ge2d/ge2d.h>
51#include "../utils/decoder_mmu_box.h"
52#include "../utils/decoder_bmmu_box.h"
53#include <linux/amlogic/media/codec_mm/codec_mm.h>
54#include <linux/amlogic/media/codec_mm/configs.h>
55#include "../utils/firmware.h"
56#include <linux/amlogic/tee.h>
57#include "../../../common/chips/decoder_cpu_ver_info.h"
58#include <linux/uaccess.h>
59
60
61
62#define DRIVER_NAME "amvdec_h264"
63#define MODULE_NAME "amvdec_h264"
64#define MEM_NAME "codec_264"
65#define HANDLE_H264_IRQ
66
67#if 0
68/* currently, only iptv supports this function*/
69#define SUPPORT_BAD_MACRO_BLOCK_REDUNDANCY
70#endif
71
72/* #define DEBUG_PTS */
73#if 0 /* MESON_CPU_TYPE <= MESON_CPU_TYPE_MESON6TV */
74#define DROP_B_FRAME_FOR_1080P_50_60FPS
75#endif
76#define RATE_MEASURE_NUM 8
77#define RATE_CORRECTION_THRESHOLD 5
78#define RATE_24_FPS 4004 /* 23.97 */
79#define RATE_25_FPS 3840 /* 25 */
80#define DUR2PTS(x) ((x)*90/96)
81#define PTS2DUR(x) ((x)*96/90)
82#define DUR2PTS_REM(x) (x*90 - DUR2PTS(x)*96)
83#define FIX_FRAME_RATE_CHECK_IDRFRAME_NUM 2
84#define VDEC_CLOCK_ADJUST_FRAME 30
85
86static inline bool close_to(int a, int b, int m)
87{
88 return (abs(a - b) < m) ? true : false;
89}
90
91static DEFINE_MUTEX(vh264_mutex);
92#define DEF_BUF_START_ADDR 0x1000000
93#define V_BUF_ADDR_OFFSET_NEW (0x1ee000)
94#define V_BUF_ADDR_OFFSET (0x13e000)
95
96#define PIC_SINGLE_FRAME 0
97#define PIC_TOP_BOT_TOP 1
98#define PIC_BOT_TOP_BOT 2
99#define PIC_DOUBLE_FRAME 3
100#define PIC_TRIPLE_FRAME 4
101#define PIC_TOP_BOT 5
102#define PIC_BOT_TOP 6
103#define PIC_INVALID 7
104
105#define EXTEND_SAR 0xff
106
107#define VF_POOL_SIZE 64
108#define VF_BUF_NUM 24
109#define WORKSPACE_BUF_NUM 2
110#define PUT_INTERVAL (HZ/100)
111#define NO_DISP_WD_COUNT (3 * HZ / PUT_INTERVAL)
112
113#define SWITCHING_STATE_OFF 0
114#define SWITCHING_STATE_ON_CMD3 1
115#define SWITCHING_STATE_ON_CMD1 2
116#define SWITCHING_STATE_ON_CMD1_PENDING 3
117
118
119#define DEC_CONTROL_FLAG_FORCE_2997_1080P_INTERLACE 0x0001
120#define DEC_CONTROL_FLAG_FORCE_2500_576P_INTERLACE 0x0002
121#define DEC_CONTROL_FLAG_DISABLE_FAST_POC 0x0004
122
123#define INCPTR(p) ptr_atomic_wrap_inc(&p)
124
125#define SLICE_TYPE_I 2
126#define SLICE_TYPE_P 5
127#define SLICE_TYPE_B 6
128
129struct buffer_spec_s {
130 unsigned int y_addr;
131 unsigned int u_addr;
132 unsigned int v_addr;
133
134 int y_canvas_index;
135 int u_canvas_index;
136 int v_canvas_index;
137
138 unsigned int y_canvas_width;
139 unsigned int u_canvas_width;
140 unsigned int v_canvas_width;
141
142 unsigned int y_canvas_height;
143 unsigned int u_canvas_height;
144 unsigned int v_canvas_height;
145
146 unsigned long phy_addr;
147 int alloc_count;
148};
149
150#define spec2canvas(x) \
151 (((x)->v_canvas_index << 16) | \
152 ((x)->u_canvas_index << 8) | \
153 ((x)->y_canvas_index << 0))
154
155static struct vframe_s *vh264_vf_peek(void *);
156static struct vframe_s *vh264_vf_get(void *);
157static void vh264_vf_put(struct vframe_s *, void *);
158static int vh264_vf_states(struct vframe_states *states, void *);
159static int vh264_event_cb(int type, void *data, void *private_data);
160
161static void vh264_prot_init(void);
162static int vh264_local_init(void);
163static void vh264_put_timer_func(unsigned long arg);
164static void stream_switching_done(void);
165
166static const char vh264_dec_id[] = "vh264-dev";
167
168#define PROVIDER_NAME "decoder.h264"
169
170static const struct vframe_operations_s vh264_vf_provider_ops = {
171 .peek = vh264_vf_peek,
172 .get = vh264_vf_get,
173 .put = vh264_vf_put,
174 .event_cb = vh264_event_cb,
175 .vf_states = vh264_vf_states,
176};
177
178static struct vframe_provider_s vh264_vf_prov;
179/*TODO irq*/
180#if 1
181static u32 frame_width, frame_height, frame_dur, frame_prog, frame_packing_type,
182 last_duration;
183static u32 saved_resolution;
184static u32 last_mb_width, last_mb_height;
185#else
186static u32 frame_buffer_size;
187static u32 frame_width, frame_height, frame_dur, frame_prog, last_duration;
188static u32 last_mb_width, last_mb_height;
189static u32 frame_packing_type;
190#endif
191static DECLARE_KFIFO(newframe_q, struct vframe_s *, VF_POOL_SIZE);
192static DECLARE_KFIFO(display_q, struct vframe_s *, VF_POOL_SIZE);
193static DECLARE_KFIFO(recycle_q, struct vframe_s *, VF_POOL_SIZE);
194static DECLARE_KFIFO(delay_display_q, struct vframe_s *, VF_POOL_SIZE);
195
196static struct vframe_s vfpool[VF_POOL_SIZE];
197static s32 vfbuf_use[VF_BUF_NUM];
198static struct buffer_spec_s buffer_spec[VF_BUF_NUM];
199static struct buffer_spec_s fense_buffer_spec[2];
200/* disp buf + keep buf+ fense buf + workspace */
201
202#define MAX_BLK_BUFFERS (VF_BUF_NUM + 2 + WORKSPACE_BUF_NUM)
203#define VF_BUFFER_IDX(n) (WORKSPACE_BUF_NUM + n)
204#define FENSE_BUFFER_IDX(n) (WORKSPACE_BUF_NUM + VF_BUF_NUM + n)
205
206#define USER_DATA_RUND_SIZE (USER_DATA_SIZE + 4096)
207static struct vframe_s fense_vf[2];
208
209static struct timer_list recycle_timer;
210static u32 stat;
211static s32 buf_offset;
212static u32 pts_outside;
213static u32 sync_outside;
214static u32 dec_control;
215static u32 vh264_ratio;
216static u32 vh264_rotation;
217static u32 use_idr_framerate;
218static u32 high_bandwidth;
219
220static u32 seq_info;
221static u32 timing_info_present_flag;
222static u32 fixed_frame_rate_flag;
223static u32 fixed_frame_rate_check_count;
224static u32 aspect_ratio_info;
225static u32 num_units_in_tick;
226static u32 time_scale;
227static u32 h264_ar;
228static u32 decoder_debug_flag;
229static u32 dpb_size_adj = 6;
230static u32 fr_hint_status;
231
232#ifdef DROP_B_FRAME_FOR_1080P_50_60FPS
233static u32 last_interlaced;
234#endif
235static bool is_4k;
236static unsigned char h264_first_pts_ready;
237static bool h264_first_valid_pts_ready;
238static u32 h264pts1, h264pts2;
239static u32 h264_pts_count, duration_from_pts_done, duration_on_correcting;
240static u32 vh264_error_count;
241static u32 vh264_no_disp_count;
242static u32 fatal_error_flag;
243static u32 fatal_error_reset;
244static u32 max_refer_buf = 1;
245static u32 decoder_force_reset;
246static unsigned int no_idr_error_count;
247static unsigned int no_idr_error_max = 60;
248static unsigned int canvas_mode;
249
250#ifdef SUPPORT_BAD_MACRO_BLOCK_REDUNDANCY
251/* 0~128*/
252static u32 bad_block_scale;
253#endif
254static u32 enable_userdata_debug;
255
256/* if not define, must clear AV_SCRATCH_J in isr when
257 * ITU_T35 code enabled in ucode, otherwise may fatal
258 * error repeatly.
259 */
260//#define ENABLE_SEI_ITU_T35
261
262
263
264static unsigned int enable_switch_fense = 1;
265#define EN_SWITCH_FENCE() (enable_switch_fense && !is_4k)
266static struct vframe_qos_s s_vframe_qos;
267static int frame_count;
268
269#if 0
270static u32 vh264_no_disp_wd_count;
271#endif
272static u32 vh264_running;
273static s32 vh264_stream_switching_state;
274static s32 vh264_eos;
275static struct vframe_s *p_last_vf;
276static s32 iponly_early_mode;
277static void *mm_blk_handle;
278static int tvp_flag;
279static bool is_reset;
280
281/*TODO irq*/
282#if 1
283static u32 last_pts, last_pts_remainder;
284#else
285static u32 last_pts;
286#endif
287static bool check_pts_discontinue;
288static u32 wait_buffer_counter;
289static u32 video_signal_from_vui;
290
291static uint error_recovery_mode;
292static uint error_recovery_mode_in = 3;
293static uint error_recovery_mode_use = 3;
294
295static uint mb_total = 0, mb_width = 0, mb_height;
296static uint saved_idc_level;
297#define UCODE_IP_ONLY 2
298#define UCODE_IP_ONLY_PARAM 1
299static uint ucode_type;
300
301#ifdef DEBUG_PTS
302static unsigned long pts_missed, pts_hit;
303#endif
304static uint debugfirmware;
305
306static atomic_t vh264_active = ATOMIC_INIT(0);
307static int vh264_reset;
308static struct work_struct error_wd_work;
309static struct work_struct stream_switching_work;
310static struct work_struct set_parameter_work;
311static struct work_struct notify_work;
312static struct work_struct set_clk_work;
313static struct work_struct userdata_push_work;
314
315struct h264_qos_data_node_t {
316 struct list_head list;
317
318 uint32_t b_offset;
319 int poc;
320 /* picture qos infomation*/
321 int max_qp;
322 int avg_qp;
323 int min_qp;
324 int max_skip;
325 int avg_skip;
326 int min_skip;
327 int max_mv;
328 int min_mv;
329 int avg_mv;
330};
331
332/*qos data records list waiting for match with picture that be display*/
333static struct list_head picture_qos_list;
334/*free qos data records list*/
335static struct list_head free_qos_nodes_list;
336#define MAX_FREE_QOS_NODES 64
337static struct h264_qos_data_node_t free_nodes[MAX_FREE_QOS_NODES];
338static struct work_struct qos_work;
339static struct dec_sysinfo vh264_amstream_dec_info;
340static dma_addr_t mc_dma_handle;
341static void *mc_cpu_addr;
342static u32 first_offset;
343static u32 first_pts;
344static u32 first_frame_size;
345static u64 first_pts64;
346static bool first_pts_cached;
347static void *sei_data_buffer;
348static dma_addr_t sei_data_buffer_phys;
349static int clk_adj_frame_count;
350
351#define MC_OFFSET_HEADER 0x0000
352#define MC_OFFSET_DATA 0x1000
353#define MC_OFFSET_MMCO 0x2000
354#define MC_OFFSET_LIST 0x3000
355#define MC_OFFSET_SLICE 0x4000
356
357#define MC_TOTAL_SIZE (20*SZ_1K)
358#define MC_SWAP_SIZE (4*SZ_1K)
359
360#define MODE_ERROR 0
361#define MODE_FULL 1
362
363static DEFINE_SPINLOCK(lock);
364static DEFINE_SPINLOCK(prepare_lock);
365static DEFINE_SPINLOCK(recycle_lock);
366
367static bool block_display_q;
368static int vh264_stop(int mode);
369static s32 vh264_init(void);
370
371
372#define DFS_HIGH_THEASHOLD 3
373
374static bool pts_discontinue;
375
376static struct ge2d_context_s *ge2d_videoh264_context;
377
378static struct vdec_info *gvs;
379
380static struct vdec_s *vdec_h264;
381
382static int ge2d_videoh264task_init(void)
383{
384 if (ge2d_videoh264_context == NULL)
385 ge2d_videoh264_context = create_ge2d_work_queue();
386
387 if (ge2d_videoh264_context == NULL) {
388 pr_info("create_ge2d_work_queue video task failed\n");
389 return -1;
390 }
391 return 0;
392}
393
394static int ge2d_videoh264task_release(void)
395{
396 if (ge2d_videoh264_context) {
397 destroy_ge2d_work_queue(ge2d_videoh264_context);
398 ge2d_videoh264_context = NULL;
399 }
400 return 0;
401}
402
403static int ge2d_canvas_dup(struct canvas_s *srcy, struct canvas_s *srcu,
404 struct canvas_s *des, int format, u32 srcindex,
405 u32 desindex)
406{
407
408 struct config_para_ex_s ge2d_config;
409 /* pr_info("[%s]h264 ADDR srcy[0x%lx] srcu[0x%lx] des[0x%lx]\n",
410 * __func__, srcy->addr, srcu->addr, des->addr);
411 */
412 memset(&ge2d_config, 0, sizeof(struct config_para_ex_s));
413
414 ge2d_config.alu_const_color = 0;
415 ge2d_config.bitmask_en = 0;
416 ge2d_config.src1_gb_alpha = 0;
417
418 ge2d_config.src_planes[0].addr = srcy->addr;
419 ge2d_config.src_planes[0].w = srcy->width;
420 ge2d_config.src_planes[0].h = srcy->height;
421
422 ge2d_config.src_planes[1].addr = srcu->addr;
423 ge2d_config.src_planes[1].w = srcu->width;
424 ge2d_config.src_planes[1].h = srcu->height;
425
426 ge2d_config.dst_planes[0].addr = des->addr;
427 ge2d_config.dst_planes[0].w = des->width;
428 ge2d_config.dst_planes[0].h = des->height;
429
430 ge2d_config.src_para.canvas_index = srcindex;
431 ge2d_config.src_para.mem_type = CANVAS_TYPE_INVALID;
432 ge2d_config.src_para.format = format;
433 ge2d_config.src_para.fill_color_en = 0;
434 ge2d_config.src_para.fill_mode = 0;
435 ge2d_config.src_para.color = 0;
436 ge2d_config.src_para.top = 0;
437 ge2d_config.src_para.left = 0;
438 ge2d_config.src_para.width = srcy->width;
439 ge2d_config.src_para.height = srcy->height;
440
441 ge2d_config.dst_para.canvas_index = desindex;
442 ge2d_config.dst_para.mem_type = CANVAS_TYPE_INVALID;
443 ge2d_config.dst_para.format = format;
444 ge2d_config.dst_para.fill_color_en = 0;
445 ge2d_config.dst_para.fill_mode = 0;
446 ge2d_config.dst_para.color = 0;
447 ge2d_config.dst_para.top = 0;
448 ge2d_config.dst_para.left = 0;
449 ge2d_config.dst_para.width = srcy->width;
450 ge2d_config.dst_para.height = srcy->height;
451
452 if (ge2d_context_config_ex(ge2d_videoh264_context, &ge2d_config) < 0) {
453 pr_info("ge2d_context_config_ex failed\n");
454 return -1;
455 }
456
457 stretchblt_noalpha(ge2d_videoh264_context, 0, 0, srcy->width,
458 srcy->height, 0, 0, srcy->width, srcy->height);
459
460 return 0;
461}
462
463static inline int fifo_level(void)
464{
465 return VF_POOL_SIZE - kfifo_len(&newframe_q);
466}
467
468
469void spec_set_canvas(struct buffer_spec_s *spec,
470 unsigned int width, unsigned int height)
471{
472 int endian;
473
474 endian = (canvas_mode == CANVAS_BLKMODE_LINEAR)?7:0;
475 canvas_config_ex(spec->y_canvas_index,
476 spec->y_addr,
477 width, height,
478 CANVAS_ADDR_NOWRAP, canvas_mode, endian);
479
480 canvas_config_ex(spec->u_canvas_index,
481 spec->u_addr,
482 width, height / 2,
483 CANVAS_ADDR_NOWRAP, canvas_mode, endian);
484
485}
486
487static void vh264_notify_work(struct work_struct *work)
488{
489 pr_info("frame duration changed %d\n", frame_dur);
490 vf_notify_receiver(PROVIDER_NAME, VFRAME_EVENT_PROVIDER_FR_HINT,
491 (void *)((unsigned long)frame_dur));
492
493 return;
494}
495
496static void prepare_display_q(void)
497{
498 unsigned long flags;
499 int count;
500
501 spin_lock_irqsave(&prepare_lock, flags);
502
503 if (block_display_q) {
504 spin_unlock_irqrestore(&prepare_lock, flags);
505 return;
506 }
507
508 spin_unlock_irqrestore(&prepare_lock, flags);
509
510 count = (int)VF_POOL_SIZE -
511 kfifo_len(&delay_display_q) -
512 kfifo_len(&display_q) -
513 kfifo_len(&recycle_q) -
514 kfifo_len(&newframe_q);
515
516 if ((vh264_stream_switching_state != SWITCHING_STATE_OFF)
517 || !EN_SWITCH_FENCE())
518 count = 0;
519 else
520 count = (count < 2) ? 0 : 2;
521
522 while (kfifo_len(&delay_display_q) > count) {
523 struct vframe_s *vf;
524
525 if (kfifo_get(&delay_display_q, &vf)) {
526 kfifo_put(&display_q,
527 (const struct vframe_s *)vf);
528 ATRACE_COUNTER(MODULE_NAME, vf->pts);
529 vf_notify_receiver(PROVIDER_NAME,
530 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
531 }
532 }
533}
534
535static struct vframe_s *vh264_vf_peek(void *op_arg)
536{
537 struct vframe_s *vf;
538
539 if (kfifo_peek(&display_q, &vf))
540 return vf;
541
542 return NULL;
543}
544
545static struct vframe_s *vh264_vf_get(void *op_arg)
546{
547 struct vframe_s *vf;
548
549 if (kfifo_get(&display_q, &vf))
550 return vf;
551
552 return NULL;
553}
554static bool vf_valid_check(struct vframe_s *vf) {
555 int i;
556 for (i = 0; i < VF_POOL_SIZE; i++) {
557 if (vf == &vfpool[i])
558 return true;
559 }
560 pr_info(" invalid vf been put, vf = %p\n", vf);
561 for (i = 0; i < VF_POOL_SIZE; i++) {
562 pr_info("www valid vf[%d]= %p \n", i, &vfpool[i]);
563 }
564 return false;
565}
566
567static void vh264_vf_put(struct vframe_s *vf, void *op_arg)
568{
569 unsigned long flags;
570
571 spin_lock_irqsave(&recycle_lock, flags);
572
573 if ((vf != &fense_vf[0]) && (vf != &fense_vf[1])) {
574 if (vf && (vf_valid_check(vf) == true))
575 kfifo_put(&recycle_q, (const struct vframe_s *)vf);
576 }
577 spin_unlock_irqrestore(&recycle_lock, flags);
578}
579
580static int vh264_event_cb(int type, void *data, void *private_data)
581{
582 if (type & VFRAME_EVENT_RECEIVER_RESET) {
583 unsigned long flags;
584
585 amvdec_stop();
586#ifndef CONFIG_AMLOGIC_POST_PROCESS_MANAGER
587 vf_light_unreg_provider(&vh264_vf_prov);
588#endif
589 spin_lock_irqsave(&lock, flags);
590 vh264_local_init();
591 vh264_prot_init();
592 spin_unlock_irqrestore(&lock, flags);
593#ifndef CONFIG_AMLOGIC_POST_PROCESS_MANAGER
594 vf_reg_provider(&vh264_vf_prov);
595#endif
596 amvdec_start();
597 }
598 return 0;
599}
600
601static int vh264_vf_states(struct vframe_states *states, void *op_arg)
602{
603 unsigned long flags;
604
605 spin_lock_irqsave(&lock, flags);
606
607 states->vf_pool_size = VF_POOL_SIZE;
608 states->buf_free_num = kfifo_len(&newframe_q);
609 states->buf_avail_num = kfifo_len(&display_q) +
610 kfifo_len(&delay_display_q);
611 states->buf_recycle_num = kfifo_len(&recycle_q);
612
613 spin_unlock_irqrestore(&lock, flags);
614
615 return 0;
616}
617
618#if 0
619static tvin_trans_fmt_t convert_3d_format(u32 type)
620{
621 const tvin_trans_fmt_t conv_tab[] = {
622 0, /* checkerboard */
623 0, /* column alternation */
624 TVIN_TFMT_3D_LA, /* row alternation */
625 TVIN_TFMT_3D_LRH_OLER, /* side by side */
626 TVIN_TFMT_3D_FA /* top bottom */
627 };
628
629 return (type <= 4) ? conv_tab[type] : 0;
630}
631#endif
632
633
634
635#define DUMP_CC_AS_ASCII
636
637#ifdef DUMP_CC_AS_ASCII
638static int vbi_to_ascii(int c)
639{
640 if (c < 0)
641 return '?';
642
643 c &= 0x7F;
644
645 if (c < 0x20 || c >= 0x7F)
646 return '.';
647
648 return c;
649}
650
651static void dump_cc_ascii(const uint8_t *buf, unsigned int vpts, int poc)
652{
653 int cc_flag;
654 int cc_count;
655 int i;
656 int szAscii[32];
657 int index = 0;
658
659 cc_flag = buf[1] & 0x40;
660 if (!cc_flag) {
661 pr_info("### cc_flag is invalid\n");
662 return;
663 }
664 cc_count = buf[1] & 0x1f;
665
666 for (i = 0; i < cc_count; ++i) {
667 unsigned int b0;
668 unsigned int cc_valid;
669 unsigned int cc_type;
670 unsigned char cc_data1;
671 unsigned char cc_data2;
672
673 b0 = buf[3 + i * 3];
674 cc_valid = b0 & 4;
675 cc_type = b0 & 3;
676 cc_data1 = buf[4 + i * 3];
677 cc_data2 = buf[5 + i * 3];
678
679
680 if (cc_type == 0) {
681 /* NTSC pair, Line 21 */
682 szAscii[index++] = vbi_to_ascii(cc_data1);
683 szAscii[index++] = vbi_to_ascii(cc_data2);
684 if ((!cc_valid) || (i >= 3))
685 break;
686 }
687 }
688
689 if (index > 0 && index <= 8) {
690 char pr_buf[128];
691 int len;
692
693 sprintf(pr_buf, "push vpts:0x%x, poc:%d :", vpts, poc);
694 len = strlen(pr_buf);
695 for (i=0;i<index;i++)
696 sprintf(pr_buf + len + i*2, "%c ", szAscii[i]);
697 pr_info("%s\n", pr_buf);
698 }
699
700}
701#endif
702
703/*
704#define DUMP_USER_DATA_HEX
705*/
706#ifdef DUMP_USER_DATA_HEX
707static void print_data(unsigned char *pdata, int len)
708{
709 int nLeft;
710 char buf[128];
711
712 nLeft = len;
713 while (nLeft >= 16) {
714 int i;
715
716 for (i=0;i<16;i++)
717 sprintf(buf+i*3, "%02x ", pdata[i]);
718
719 pr_info("%s\n", buf);
720 nLeft -= 16;
721 pdata += 16;
722 }
723
724 while (nLeft >= 8) {
725 int i;
726 for (i=0;i<nLeft;i++)
727 sprintf(buf+i*3, "%02x ", pdata[i]);
728
729 pr_info("%s\n", buf);
730 nLeft -= 8;
731 pdata += 8;
732 }
733}
734#endif
735
736
737
738static void aml_swap_data(uint8_t *user_data, int ud_size)
739{
740 int swap_blocks, i, j, k, m;
741 unsigned char c_temp;
742
743 /* swap byte order */
744 swap_blocks = ud_size / 8;
745 for (i = 0; i < swap_blocks; i++) {
746 j = i * 8;
747 k = j + 7;
748 for (m = 0; m < 4; m++) {
749 c_temp = user_data[j];
750 user_data[j++] = user_data[k];
751 user_data[k--] = c_temp;
752 }
753 }
754}
755
756
757static void udr_dump_data(unsigned int user_data_wp,
758 unsigned int user_data_length,
759 unsigned int pts,
760 int poc)
761{
762 unsigned char *pdata;
763 int user_data_len;
764 int wp_start;
765 int nLeft;
766 unsigned char szBuf[256];
767 int nOffset;
768
769 dma_sync_single_for_cpu(amports_get_dma_device(),
770 sei_data_buffer_phys, USER_DATA_SIZE,
771 DMA_FROM_DEVICE);
772
773 if (user_data_length & 0x07)
774 user_data_len = (user_data_length + 8) & 0xFFFFFFF8;
775 else
776 user_data_len = user_data_length;
777
778 if (user_data_wp >= user_data_len) {
779 wp_start = user_data_wp - user_data_len;
780
781 pdata = (unsigned char *)sei_data_buffer;
782 pdata += wp_start;
783 nLeft = user_data_len;
784
785 memset(szBuf, 0, 256);
786 memcpy(szBuf, pdata, user_data_len);
787 } else {
788 wp_start = user_data_wp +
789 USER_DATA_SIZE - user_data_len;
790
791 pdata = (unsigned char *)sei_data_buffer;
792 pdata += wp_start;
793 nLeft = USER_DATA_SIZE - wp_start;
794
795 memset(szBuf, 0, 256);
796 memcpy(szBuf, pdata, nLeft);
797 nOffset = nLeft;
798
799 pdata = (unsigned char *)sei_data_buffer;
800 nLeft = user_data_wp;
801 memcpy(szBuf+nOffset, pdata, nLeft);
802 }
803
804 aml_swap_data(szBuf, user_data_len);
805
806#ifdef DUMP_USER_DATA_HEX
807 print_data(szBuf, user_data_len);
808#endif
809
810#ifdef DUMP_CC_AS_ASCII
811 dump_cc_ascii(szBuf+7, pts, poc);
812#endif
813}
814
815
816struct vh264_userdata_recored_t {
817 struct userdata_meta_info_t meta_info;
818 u32 rec_start;
819 u32 rec_len;
820};
821
822#define USERDATA_FIFO_NUM 256
823
824struct vh264_userdata_info_t {
825 struct vh264_userdata_recored_t records[USERDATA_FIFO_NUM];
826 u8 *data_buf;
827 u8 *data_buf_end;
828 u32 buf_len;
829 u32 read_index;
830 u32 write_index;
831 u32 last_wp;
832};
833
834static struct vh264_userdata_info_t *p_userdata_mgr;
835
836static DEFINE_MUTEX(userdata_mutex);
837
838
839void vh264_crate_userdata_manager(u8 *userdata_buf, int buf_len)
840{
841 p_userdata_mgr = (struct vh264_userdata_info_t *)
842 vmalloc(sizeof(struct vh264_userdata_info_t));
843 if (p_userdata_mgr) {
844 memset(p_userdata_mgr, 0,
845 sizeof(struct vh264_userdata_info_t));
846 p_userdata_mgr->data_buf = userdata_buf;
847 p_userdata_mgr->buf_len = buf_len;
848 p_userdata_mgr->data_buf_end = userdata_buf + buf_len;
849 }
850}
851
852void vh264_destroy_userdata_manager(void)
853{
854 if (p_userdata_mgr) {
855 vfree(p_userdata_mgr);
856 p_userdata_mgr = NULL;
857 }
858}
859
860/*
861#define DUMP_USER_DATA
862*/
863#ifdef DUMP_USER_DATA
864
865#define MAX_USER_DATA_SIZE 3145728
866static void *user_data_buf;
867static unsigned char *pbuf_start;
868static int total_len;
869static int bskip;
870static int n_userdata_id;
871
872
873static void print_mem_data(unsigned char *pdata,
874 int len,
875 unsigned int flag,
876 unsigned int duration,
877 unsigned int vpts,
878 unsigned int vpts_valid,
879 int rec_id)
880{
881 int nLeft;
882
883 nLeft = len;
884#if 0
885 pr_info("%d len = %d, flag = %d, duration = %d, vpts = 0x%x, vpts_valid = %d\n",
886 rec_id, len, flag,
887 duration, vpts, vpts_valid);
888#endif
889 pr_info("%d len = %d, flag = %d, vpts = 0x%x\n",
890 rec_id, len, flag, vpts);
891
892
893 while (nLeft >= 16) {
894 pr_info("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
895 pdata[0], pdata[1], pdata[2], pdata[3],
896 pdata[4], pdata[5], pdata[6], pdata[7],
897 pdata[8], pdata[9], pdata[10], pdata[11],
898 pdata[12], pdata[13], pdata[14], pdata[15]);
899 nLeft -= 16;
900 pdata += 16;
901 }
902
903
904 while (nLeft > 0) {
905 pr_info("%02x %02x %02x %02x %02x %02x %02x %02x\n",
906 pdata[0], pdata[1], pdata[2], pdata[3],
907 pdata[4], pdata[5], pdata[6], pdata[7]);
908 nLeft -= 8;
909 pdata += 8;
910 }
911}
912
913
914static void dump_data(u8 *pdata,
915 unsigned int user_data_length,
916 unsigned int flag,
917 unsigned int duration,
918 unsigned int vpts,
919 unsigned int vpts_valid,
920 int rec_id)
921{
922 unsigned char szBuf[256];
923
924
925 memset(szBuf, 0, 256);
926 memcpy(szBuf, pdata, user_data_length);
927/*
928 aml_swap_data(szBuf, user_data_length);
929*/
930
931 print_mem_data(szBuf, user_data_length,
932 flag, duration, vpts,
933 vpts_valid, rec_id);
934
935#ifdef DEBUG_CC_DUMP_ASCII
936 dump_cc_ascii(szBuf+7);
937#endif
938}
939
940static void push_to_buf(u8 *pdata, int len, struct userdata_meta_info_t *pmeta)
941{
942 u32 *pLen;
943 int info_cnt;
944 u8 *pbuf_end;
945
946 if (!user_data_buf)
947 return;
948
949 if (bskip) {
950 pr_info("over size, skip\n");
951 return;
952 }
953 info_cnt = 0;
954 pLen = (u32 *)pbuf_start;
955
956 *pLen = len;
957 pbuf_start += sizeof(u32);
958 info_cnt++;
959 pLen++;
960
961 *pLen = pmeta->duration;
962 pbuf_start += sizeof(u32);
963 info_cnt++;
964 pLen++;
965
966 *pLen = pmeta->flags;
967 pbuf_start += sizeof(u32);
968 info_cnt++;
969 pLen++;
970
971 *pLen = pmeta->vpts;
972 pbuf_start += sizeof(u32);
973 info_cnt++;
974 pLen++;
975
976 *pLen = pmeta->vpts_valid;
977 pbuf_start += sizeof(u32);
978 info_cnt++;
979 pLen++;
980
981
982 *pLen = n_userdata_id;
983 pbuf_start += sizeof(u32);
984 info_cnt++;
985 pLen++;
986
987
988
989 pbuf_end = (u8 *)sei_data_buffer + USER_DATA_SIZE;
990 if (pdata + len > pbuf_end) {
991 int first_section_len;
992
993 first_section_len = pbuf_end - pdata;
994 memcpy(pbuf_start, pdata, first_section_len);
995 pdata = (u8 *)sei_data_buffer;
996 pbuf_start += first_section_len;
997 memcpy(pbuf_start, pdata, len - first_section_len);
998 pbuf_start += len - first_section_len;
999 } else {
1000 memcpy(pbuf_start, pdata, len);
1001 pbuf_start += len;
1002 }
1003
1004 total_len += len + info_cnt * sizeof(u32);
1005 if (total_len >= MAX_USER_DATA_SIZE-4096)
1006 bskip = 1;
1007}
1008
1009
1010static void dump_userdata_info(
1011 void *puser_data,
1012 int len,
1013 struct userdata_meta_info_t *pmeta)
1014{
1015 u8 *pstart;
1016
1017 pstart = (u8 *)puser_data;
1018
1019
1020 push_to_buf(pstart, len, pmeta);
1021}
1022
1023static void show_user_data_buf(void)
1024{
1025 u8 *pbuf;
1026 int len;
1027 unsigned int flag;
1028 unsigned int duration;
1029 unsigned int vpts;
1030 unsigned int vpts_valid;
1031 int rec_id;
1032
1033 pr_info("show user data buf\n");
1034 pbuf = user_data_buf;
1035
1036 while (pbuf < pbuf_start) {
1037 u32 *pLen;
1038
1039 pLen = (u32 *)pbuf;
1040
1041 len = *pLen;
1042 pLen++;
1043 pbuf += sizeof(u32);
1044
1045 duration = *pLen;
1046 pLen++;
1047 pbuf += sizeof(u32);
1048
1049 flag = *pLen;
1050 pLen++;
1051 pbuf += sizeof(u32);
1052
1053 vpts = *pLen;
1054 pLen++;
1055 pbuf += sizeof(u32);
1056
1057 vpts_valid = *pLen;
1058 pLen++;
1059 pbuf += sizeof(u32);
1060
1061 rec_id = *pLen;
1062 pLen++;
1063 pbuf += sizeof(u32);
1064
1065 dump_data(pbuf, len, flag, duration, vpts, vpts_valid, rec_id);
1066 pbuf += len;
1067 msleep(30);
1068 }
1069}
1070
1071static int vh264_init_userdata_dump(void)
1072{
1073 user_data_buf = kmalloc(MAX_USER_DATA_SIZE, GFP_KERNEL);
1074 if (user_data_buf)
1075 return 1;
1076 else
1077 return 0;
1078}
1079
1080static void vh264_dump_userdata(void)
1081{
1082 if (user_data_buf) {
1083 show_user_data_buf();
1084 kfree(user_data_buf);
1085 user_data_buf = NULL;
1086 }
1087}
1088
1089static void vh264_reset_user_data_buf(void)
1090{
1091 total_len = 0;
1092 pbuf_start = user_data_buf;
1093 bskip = 0;
1094 n_userdata_id = 0;
1095}
1096#endif
1097
1098static void vh264_add_userdata(struct userdata_meta_info_t meta_info, int wp)
1099{
1100 struct vh264_userdata_recored_t *p_userdata_rec;
1101 int data_length;
1102
1103 mutex_lock(&userdata_mutex);
1104
1105 if (p_userdata_mgr) {
1106 if (wp > p_userdata_mgr->last_wp)
1107 data_length = wp - p_userdata_mgr->last_wp;
1108 else
1109 data_length = wp + p_userdata_mgr->buf_len -
1110 p_userdata_mgr->last_wp;
1111
1112 if (data_length & 0x7)
1113 data_length = (((data_length + 8) >> 3) << 3);
1114#if 0
1115 pr_info("wakeup_push: ri:%d, wi:%d, data_len:%d, last_wp:%d, wp:%d, id = %d\n",
1116 p_userdata_mgr->read_index,
1117 p_userdata_mgr->write_index,
1118 data_length,
1119 p_userdata_mgr->last_wp,
1120 wp,
1121 n_userdata_id);
1122#endif
1123 p_userdata_rec = p_userdata_mgr->records +
1124 p_userdata_mgr->write_index;
1125 p_userdata_rec->meta_info = meta_info;
1126 p_userdata_rec->rec_start = p_userdata_mgr->last_wp;
1127 p_userdata_rec->rec_len = data_length;
1128 p_userdata_mgr->last_wp = wp;
1129
1130#ifdef DUMP_USER_DATA
1131 dump_userdata_info(p_userdata_mgr->data_buf +
1132 p_userdata_rec->rec_start,
1133 data_length,
1134 &meta_info);
1135 n_userdata_id++;
1136#endif
1137
1138 p_userdata_mgr->write_index++;
1139 if (p_userdata_mgr->write_index >= USERDATA_FIFO_NUM)
1140 p_userdata_mgr->write_index = 0;
1141 }
1142 mutex_unlock(&userdata_mutex);
1143
1144 vdec_wakeup_userdata_poll(vdec_h264);
1145}
1146
1147static int vh264_user_data_read(struct vdec_s *vdec,
1148 struct userdata_param_t *puserdata_para)
1149{
1150 int rec_ri, rec_wi;
1151 int rec_len;
1152 u8 *rec_data_start;
1153 u8 *pdest_buf;
1154 struct vh264_userdata_recored_t *p_userdata_rec;
1155 u32 data_size;
1156 u32 res;
1157 int copy_ok = 1;
1158
1159
1160 pdest_buf = puserdata_para->pbuf_addr;
1161
1162
1163 mutex_lock(&userdata_mutex);
1164
1165 if (!p_userdata_mgr) {
1166 mutex_unlock(&userdata_mutex);
1167 return 0;
1168 }
1169/*
1170 pr_info("ri = %d, wi = %d\n",
1171 p_userdata_mgr->read_index,
1172 p_userdata_mgr->write_index);
1173*/
1174 rec_ri = p_userdata_mgr->read_index;
1175 rec_wi = p_userdata_mgr->write_index;
1176
1177 if (rec_ri == rec_wi) {
1178 mutex_unlock(&userdata_mutex);
1179 return 0;
1180 }
1181
1182 p_userdata_rec = p_userdata_mgr->records + rec_ri;
1183
1184 rec_len = p_userdata_rec->rec_len;
1185 rec_data_start = p_userdata_rec->rec_start + p_userdata_mgr->data_buf;
1186/*
1187 pr_info("rec_len:%d, rec_start:%d, buf_len:%d\n",
1188 p_userdata_rec->rec_len,
1189 p_userdata_rec->rec_start,
1190 puserdata_para->buf_len);
1191*/
1192 if (rec_len <= puserdata_para->buf_len) {
1193 /* dvb user data buffer is enought to copy the whole recored. */
1194 data_size = rec_len;
1195 if (rec_data_start + data_size
1196 > p_userdata_mgr->data_buf_end) {
1197 int first_section_len;
1198
1199 first_section_len = p_userdata_mgr->buf_len -
1200 p_userdata_rec->rec_start;
1201 res = (u32)copy_to_user((void *)pdest_buf,
1202 (void *)rec_data_start,
1203 first_section_len);
1204 if (res) {
1205 pr_info("p1 read not end res=%d, request=%d\n",
1206 res, first_section_len);
1207 copy_ok = 0;
1208
1209 p_userdata_rec->rec_len -=
1210 first_section_len - res;
1211 p_userdata_rec->rec_start +=
1212 first_section_len - res;
1213 puserdata_para->data_size =
1214 first_section_len - res;
1215 } else {
1216 res = (u32)copy_to_user(
1217 (void *)(pdest_buf+first_section_len),
1218 (void *)p_userdata_mgr->data_buf,
1219 data_size - first_section_len);
1220 if (res) {
1221 pr_info("p2 read not end res=%d, request=%d\n",
1222 res, data_size);
1223 copy_ok = 0;
1224 }
1225 p_userdata_rec->rec_len -=
1226 data_size - res;
1227 p_userdata_rec->rec_start =
1228 data_size - first_section_len - res;
1229 puserdata_para->data_size =
1230 data_size - res;
1231 }
1232 } else {
1233 res = (u32)copy_to_user((void *)pdest_buf,
1234 (void *)rec_data_start,
1235 data_size);
1236 if (res) {
1237 pr_info("p3 read not end res=%d, request=%d\n",
1238 res, data_size);
1239 copy_ok = 0;
1240 }
1241 p_userdata_rec->rec_len -= data_size - res;
1242 p_userdata_rec->rec_start += data_size - res;
1243 puserdata_para->data_size = data_size - res;
1244 }
1245
1246 if (copy_ok) {
1247 p_userdata_mgr->read_index++;
1248 if (p_userdata_mgr->read_index >= USERDATA_FIFO_NUM)
1249 p_userdata_mgr->read_index = 0;
1250 }
1251 } else {
1252 /* dvb user data buffer is not enought
1253 to copy the whole recored. */
1254 data_size = puserdata_para->buf_len;
1255 if (rec_data_start + data_size
1256 > p_userdata_mgr->data_buf_end) {
1257 int first_section_len;
1258
1259 first_section_len = p_userdata_mgr->buf_len
1260 - p_userdata_rec->rec_start;
1261 res = (u32)copy_to_user((void *)pdest_buf,
1262 (void *)rec_data_start,
1263 first_section_len);
1264 if (res) {
1265 pr_info("p4 read not end res=%d, request=%d\n",
1266 res, first_section_len);
1267 copy_ok = 0;
1268 p_userdata_rec->rec_len -=
1269 first_section_len - res;
1270 p_userdata_rec->rec_start +=
1271 first_section_len - res;
1272 puserdata_para->data_size =
1273 first_section_len - res;
1274 } else {
1275 /* first secton copy is ok*/
1276 res = (u32)copy_to_user(
1277 (void *)(pdest_buf+first_section_len),
1278 (void *)p_userdata_mgr->data_buf,
1279 data_size - first_section_len);
1280 if (res) {
1281 pr_info("p5 read not end res=%d, request=%d\n",
1282 res,
1283 data_size - first_section_len);
1284 copy_ok = 0;
1285 }
1286
1287 p_userdata_rec->rec_len -= data_size - res;
1288 p_userdata_rec->rec_start =
1289 data_size - first_section_len - res;
1290 puserdata_para->data_size = data_size - res;
1291 }
1292 } else {
1293 res = (u32)copy_to_user((void *)pdest_buf,
1294 (void *)rec_data_start,
1295 data_size);
1296 if (res) {
1297 pr_info("p6 read not end res=%d, request=%d\n",
1298 res, data_size);
1299 copy_ok = 0;
1300 }
1301
1302 p_userdata_rec->rec_len -= data_size - res;
1303 p_userdata_rec->rec_start += data_size - res;
1304 puserdata_para->data_size = data_size - res;
1305 }
1306
1307 if (copy_ok) {
1308 p_userdata_mgr->read_index++;
1309 if (p_userdata_mgr->read_index
1310 >= USERDATA_FIFO_NUM)
1311 p_userdata_mgr->read_index = 0;
1312 }
1313
1314 }
1315 puserdata_para->meta_info = p_userdata_rec->meta_info;
1316
1317 if (p_userdata_mgr->read_index <= p_userdata_mgr->write_index)
1318 puserdata_para->meta_info.records_in_que =
1319 p_userdata_mgr->write_index -
1320 p_userdata_mgr->read_index;
1321 else
1322 puserdata_para->meta_info.records_in_que =
1323 p_userdata_mgr->write_index +
1324 USERDATA_FIFO_NUM -
1325 p_userdata_mgr->read_index;
1326
1327 puserdata_para->version = (0<<24|0<<16|0<<8|1);
1328
1329 mutex_unlock(&userdata_mutex);
1330
1331 return 1;
1332}
1333
1334static void vh264_wakeup_userdata_poll(struct vdec_s *vdec)
1335{
1336 amstream_wakeup_userdata_poll(vdec);
1337}
1338
1339static void vh264_reset_userdata_fifo(struct vdec_s *vdec, int bInit)
1340{
1341 mutex_lock(&userdata_mutex);
1342
1343 if (p_userdata_mgr) {
1344 pr_info("h264_reset_userdata_fifo: bInit: %d, ri: %d, wi: %d\n",
1345 bInit, p_userdata_mgr->read_index,
1346 p_userdata_mgr->write_index);
1347 p_userdata_mgr->read_index = 0;
1348 p_userdata_mgr->write_index = 0;
1349
1350 if (bInit)
1351 p_userdata_mgr->last_wp = 0;
1352 }
1353
1354 mutex_unlock(&userdata_mutex);
1355}
1356
1357static void h264_reset_qos_mgr(void)
1358{
1359 int i;
1360
1361 pr_info("h264_reset_qos_mgr\n");
1362
1363 INIT_LIST_HEAD(&free_qos_nodes_list);
1364 INIT_LIST_HEAD(&picture_qos_list);
1365
1366 for (i = 0; i < MAX_FREE_QOS_NODES; i++) {
1367 free_nodes[i].b_offset = 0xFFFFFFFF;
1368
1369 list_add_tail(&free_nodes[i].list,
1370 &free_qos_nodes_list);
1371 }
1372}
1373
1374
1375static void load_qos_data(int pic_number, uint32_t b_offset)
1376{
1377 uint32_t blk88_y_count;
1378 uint32_t blk88_c_count;
1379 uint32_t blk22_mv_count;
1380 uint32_t rdata32;
1381 int32_t mv_hi;
1382 int32_t mv_lo;
1383 uint32_t rdata32_l;
1384 uint32_t mvx_L0_hi;
1385 uint32_t mvy_L0_hi;
1386 uint32_t mvx_L1_hi;
1387 uint32_t mvy_L1_hi;
1388 int64_t value;
1389 uint64_t temp_value;
1390/*
1391#define DEBUG_QOS
1392*/
1393#define SUPPORT_NODE
1394
1395#ifdef SUPPORT_NODE
1396 struct h264_qos_data_node_t *node;
1397 struct h264_qos_data_node_t *tmp;
1398 int bFoundNode = 0;
1399
1400 node = NULL;
1401 if (!list_empty(&picture_qos_list)) {
1402 list_for_each_entry_safe(node, tmp, &picture_qos_list, list) {
1403 if (node->b_offset == b_offset) {
1404 bFoundNode = 1;
1405 break;
1406 }
1407 }
1408 }
1409 /*
1410 pr_info("bFoundNode = %d, node:0x%p\n", bFoundNode, node);
1411 */
1412 if (!bFoundNode) {
1413 if (!list_empty(&free_qos_nodes_list)) {
1414 node = list_entry(
1415 free_qos_nodes_list.next,
1416 struct h264_qos_data_node_t,
1417 list);
1418 /*
1419 pr_info("get a node:0x%p\n", node);
1420 */
1421 } else {
1422 pr_info("there is no qos data node avaible\n");
1423
1424 return;
1425 }
1426 }
1427
1428 node->b_offset = b_offset;
1429 node->poc = pic_number;
1430
1431 node->max_mv = 0;
1432 node->avg_mv = 0;
1433 node->min_mv = 0;
1434
1435 node->max_skip = 0;
1436 node->avg_skip = 0;
1437 node->min_skip = 0;
1438
1439 node->max_qp = 0;
1440 node->avg_qp = 0;
1441 node->min_qp = 0;
1442#endif
1443
1444
1445
1446
1447
1448
1449 /* set rd_idx to 0 */
1450 WRITE_VREG(VDEC_PIC_QUALITY_CTRL, 0);
1451 blk88_y_count = READ_VREG(VDEC_PIC_QUALITY_DATA);
1452 if (blk88_y_count == 0) {
1453#ifdef DEBUG_QOS
1454 pr_info(" [Picture %d Quality] NO Data yet.\n",
1455 pic_number);
1456#endif
1457 /* reset all counts */
1458 WRITE_VREG(VDEC_PIC_QUALITY_CTRL, (1<<8));
1459
1460#ifdef SUPPORT_NODE
1461 list_move(&node->list, &picture_qos_list);
1462#endif
1463 return;
1464 }
1465 /* qp_y_sum */
1466 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1467#ifdef DEBUG_QOS
1468 pr_info(" [Picture %d Quality] Y QP AVG : %d (%d/%d)\n",
1469 pic_number, rdata32/blk88_y_count,
1470 rdata32, blk88_y_count);
1471#endif
1472#ifdef SUPPORT_NODE
1473 node->avg_qp = rdata32/blk88_y_count;
1474#endif
1475
1476 /* intra_y_count */
1477 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1478#ifdef DEBUG_QOS
1479 pr_info(" [Picture %d Quality] Y intra rate : %d%c (%d)\n",
1480 pic_number, rdata32*100/blk88_y_count,
1481 '%', rdata32);
1482#endif
1483 /* skipped_y_count */
1484 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1485#ifdef DEBUG_QOS
1486 pr_info(" [Picture %d Quality] Y skipped rate : %d%c (%d)\n",
1487 pic_number, rdata32*100/blk88_y_count,
1488 '%', rdata32);
1489#endif
1490#ifdef SUPPORT_NODE
1491 node->avg_skip = rdata32*100/blk88_y_count;
1492#endif
1493 /* coeff_non_zero_y_count */
1494 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1495#ifdef DEBUG_QOS
1496 pr_info(" [Picture %d Quality] Y ZERO_Coeff rate : %d%c (%d)\n",
1497 pic_number, (100 - rdata32*100/(blk88_y_count*1)),
1498 '%', rdata32);
1499#endif
1500 /* blk66_c_count */
1501 blk88_c_count = READ_VREG(VDEC_PIC_QUALITY_DATA);
1502 if (blk88_c_count == 0) {
1503#ifdef DEBUG_QOS
1504 pr_info(" [Picture %d Quality] NO Data yet.\n",
1505 pic_number);
1506#endif
1507 /* reset all counts */
1508 WRITE_VREG(VDEC_PIC_QUALITY_CTRL, (1<<8));
1509
1510#ifdef SUPPORT_NODE
1511 list_move(&node->list, &picture_qos_list);
1512#endif
1513 return;
1514 }
1515 /* qp_c_sum */
1516 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1517#ifdef DEBUG_QOS
1518 pr_info(" [Picture %d Quality] C QP AVG : %d (%d/%d)\n",
1519 pic_number, rdata32/blk88_c_count,
1520 rdata32, blk88_c_count);
1521#endif
1522 /* intra_c_count */
1523 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1524#ifdef DEBUG_QOS
1525 pr_info(" [Picture %d Quality] C intra rate : %d%c (%d)\n",
1526 pic_number, rdata32*100/blk88_c_count,
1527 '%', rdata32);
1528#endif
1529 /* skipped_cu_c_count */
1530 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1531#ifdef DEBUG_QOS
1532 pr_info(" [Picture %d Quality] C skipped rate : %d%c (%d)\n",
1533 pic_number, rdata32*100/blk88_c_count,
1534 '%', rdata32);
1535#endif
1536 /* coeff_non_zero_c_count */
1537 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1538#ifdef DEBUG_QOS
1539 pr_info(" [Picture %d Quality] C ZERO_Coeff rate : %d%c (%d)\n",
1540 pic_number, (100 - rdata32*100/(blk88_c_count*1)),
1541 '%', rdata32);
1542#endif
1543
1544 /* 1'h0, qp_c_max[6:0], 1'h0, qp_c_min[6:0],
1545 1'h0, qp_y_max[6:0], 1'h0, qp_y_min[6:0] */
1546 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1547#ifdef DEBUG_QOS
1548 pr_info(" [Picture %d Quality] Y QP min : %d\n",
1549 pic_number, (rdata32>>0)&0xff);
1550#endif
1551#ifdef SUPPORT_NODE
1552 node->min_qp = (rdata32>>0)&0xff;
1553#endif
1554
1555#ifdef DEBUG_QOS
1556 pr_info(" [Picture %d Quality] Y QP max : %d\n",
1557 pic_number, (rdata32>>8)&0xff);
1558#endif
1559#ifdef SUPPORT_NODE
1560 node->max_qp = (rdata32>>8)&0xff;
1561#endif
1562
1563#ifdef DEBUG_QOS
1564 pr_info(" [Picture %d Quality] C QP min : %d\n",
1565 pic_number, (rdata32>>16)&0xff);
1566 pr_info(" [Picture %d Quality] C QP max : %d\n",
1567 pic_number, (rdata32>>24)&0xff);
1568#endif
1569
1570 /* blk22_mv_count */
1571 blk22_mv_count = READ_VREG(VDEC_PIC_QUALITY_DATA);
1572 if (blk22_mv_count == 0) {
1573#ifdef DEBUG_QOS
1574 pr_info(" [Picture %d Quality] NO MV Data yet.\n",
1575 pic_number);
1576#endif
1577 /* reset all counts */
1578 WRITE_VREG(VDEC_PIC_QUALITY_CTRL, (1<<8));
1579#ifdef SUPPORT_NODE
1580 list_move(&node->list, &picture_qos_list);
1581#endif
1582 return;
1583 }
1584 /* mvy_L1_count[39:32], mvx_L1_count[39:32],
1585 mvy_L0_count[39:32], mvx_L0_count[39:32] */
1586 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1587 /* should all be 0x00 or 0xff */
1588#ifdef DEBUG_QOS
1589 pr_info(" [Picture %d Quality] MV AVG High Bits: 0x%X\n",
1590 pic_number, rdata32);
1591#endif
1592 mvx_L0_hi = ((rdata32>>0)&0xff);
1593 mvy_L0_hi = ((rdata32>>8)&0xff);
1594 mvx_L1_hi = ((rdata32>>16)&0xff);
1595 mvy_L1_hi = ((rdata32>>24)&0xff);
1596
1597 /* mvx_L0_count[31:0] */
1598 rdata32_l = READ_VREG(VDEC_PIC_QUALITY_DATA);
1599 temp_value = mvx_L0_hi;
1600 temp_value = (temp_value << 32) | rdata32_l;
1601
1602 if (mvx_L0_hi & 0x80)
1603 value = 0xFFFFFFF000000000 | temp_value;
1604 else
1605 value = temp_value;
1606 value = div_s64(value, blk22_mv_count);
1607#ifdef DEBUG_QOS
1608 pr_info(" [Picture %d Quality] MVX_L0 AVG : %d (%lld/%d)\n",
1609 pic_number, (int)(value),
1610 value, blk22_mv_count);
1611#endif
1612#ifdef SUPPORT_NODE
1613 node->avg_mv = value;
1614#endif
1615
1616 /* mvy_L0_count[31:0] */
1617 rdata32_l = READ_VREG(VDEC_PIC_QUALITY_DATA);
1618 temp_value = mvy_L0_hi;
1619 temp_value = (temp_value << 32) | rdata32_l;
1620
1621 if (mvy_L0_hi & 0x80)
1622 value = 0xFFFFFFF000000000 | temp_value;
1623 else
1624 value = temp_value;
1625#ifdef DEBUG_QOS
1626 pr_info(" [Picture %d Quality] MVY_L0 AVG : %d (%lld/%d)\n",
1627 pic_number, rdata32_l/blk22_mv_count,
1628 value, blk22_mv_count);
1629#endif
1630
1631 /* mvx_L1_count[31:0] */
1632 rdata32_l = READ_VREG(VDEC_PIC_QUALITY_DATA);
1633 temp_value = mvx_L1_hi;
1634 temp_value = (temp_value << 32) | rdata32_l;
1635 if (mvx_L1_hi & 0x80)
1636 value = 0xFFFFFFF000000000 | temp_value;
1637 else
1638 value = temp_value;
1639#ifdef DEBUG_QOS
1640 pr_info(" [Picture %d Quality] MVX_L1 AVG : %d (%lld/%d)\n",
1641 pic_number, rdata32_l/blk22_mv_count,
1642 value, blk22_mv_count);
1643#endif
1644
1645 /* mvy_L1_count[31:0] */
1646 rdata32_l = READ_VREG(VDEC_PIC_QUALITY_DATA);
1647 temp_value = mvy_L1_hi;
1648 temp_value = (temp_value << 32) | rdata32_l;
1649 if (mvy_L1_hi & 0x80)
1650 value = 0xFFFFFFF000000000 | temp_value;
1651 else
1652 value = temp_value;
1653#ifdef DEBUG_QOS
1654 pr_info(" [Picture %d Quality] MVY_L1 AVG : %d (%lld/%d)\n",
1655 pic_number, rdata32_l/blk22_mv_count,
1656 value, blk22_mv_count);
1657#endif
1658
1659 /* {mvx_L0_max, mvx_L0_min} // format : {sign, abs[14:0]} */
1660 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1661 mv_hi = (rdata32>>16)&0xffff;
1662 if (mv_hi & 0x8000)
1663 mv_hi = 0x8000 - mv_hi;
1664#ifdef DEBUG_QOS
1665 pr_info(" [Picture %d Quality] MVX_L0 MAX : %d\n",
1666 pic_number, mv_hi);
1667#endif
1668#ifdef SUPPORT_NODE
1669 node->max_mv = mv_hi;
1670#endif
1671
1672 mv_lo = (rdata32>>0)&0xffff;
1673 if (mv_lo & 0x8000)
1674 mv_lo = 0x8000 - mv_lo;
1675#ifdef DEBUG_QOS
1676 pr_info(" [Picture %d Quality] MVX_L0 MIN : %d\n",
1677 pic_number, mv_lo);
1678#endif
1679#ifdef SUPPORT_NODE
1680 node->min_mv = mv_lo;
1681#endif
1682
1683 /* {mvy_L0_max, mvy_L0_min} */
1684 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1685 mv_hi = (rdata32>>16)&0xffff;
1686 if (mv_hi & 0x8000)
1687 mv_hi = 0x8000 - mv_hi;
1688#ifdef DEBUG_QOS
1689 pr_info(" [Picture %d Quality] MVY_L0 MAX : %d\n",
1690 pic_number, mv_hi);
1691#endif
1692
1693 mv_lo = (rdata32>>0)&0xffff;
1694 if (mv_lo & 0x8000)
1695 mv_lo = 0x8000 - mv_lo;
1696#ifdef DEBUG_QOS
1697 pr_info(" [Picture %d Quality] MVY_L0 MIN : %d\n",
1698 pic_number, mv_lo);
1699#endif
1700
1701 /* {mvx_L1_max, mvx_L1_min} */
1702 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1703 mv_hi = (rdata32>>16)&0xffff;
1704 if (mv_hi & 0x8000)
1705 mv_hi = 0x8000 - mv_hi;
1706#ifdef DEBUG_QOS
1707 pr_info(" [Picture %d Quality] MVX_L1 MAX : %d\n",
1708 pic_number, mv_hi);
1709#endif
1710
1711 mv_lo = (rdata32>>0)&0xffff;
1712 if (mv_lo & 0x8000)
1713 mv_lo = 0x8000 - mv_lo;
1714#ifdef DEBUG_QOS
1715 pr_info(" [Picture %d Quality] MVX_L1 MIN : %d\n",
1716 pic_number, mv_lo);
1717#endif
1718
1719 /* {mvy_L1_max, mvy_L1_min} */
1720 rdata32 = READ_VREG(VDEC_PIC_QUALITY_DATA);
1721 mv_hi = (rdata32>>16)&0xffff;
1722 if (mv_hi & 0x8000)
1723 mv_hi = 0x8000 - mv_hi;
1724#ifdef DEBUG_QOS
1725 pr_info(" [Picture %d Quality] MVY_L1 MAX : %d\n",
1726 pic_number, mv_hi);
1727#endif
1728 mv_lo = (rdata32>>0)&0xffff;
1729 if (mv_lo & 0x8000)
1730 mv_lo = 0x8000 - mv_lo;
1731#ifdef DEBUG_QOS
1732 pr_info(" [Picture %d Quality] MVY_L1 MIN : %d\n",
1733 pic_number, mv_lo);
1734#endif
1735
1736 rdata32 = READ_VREG(VDEC_PIC_QUALITY_CTRL);
1737#ifdef DEBUG_QOS
1738 pr_info(" [Picture %d Quality] After Read : VDEC_PIC_QUALITY_CTRL : 0x%x\n",
1739 pic_number, rdata32);
1740#endif
1741 /* reset all counts */
1742 WRITE_VREG(VDEC_PIC_QUALITY_CTRL, (1<<8));
1743#ifdef SUPPORT_NODE
1744 list_move(&node->list, &picture_qos_list);
1745#endif
1746}
1747
1748void search_qos_node(struct vframe_qos_s *picture_qos, uint32_t b_offset)
1749{
1750 struct h264_qos_data_node_t *node;
1751 struct h264_qos_data_node_t *tmp;
1752
1753 if (!list_empty(&picture_qos_list)) {
1754 list_for_each_entry_safe(node, tmp, &picture_qos_list, list) {
1755 if (node->b_offset == b_offset) {
1756
1757 picture_qos->avg_mv = node->avg_mv;
1758 picture_qos->min_mv = node->min_mv;
1759 picture_qos->max_mv = node->max_mv;
1760
1761 picture_qos->avg_skip = node->avg_skip;
1762 picture_qos->min_skip = node->min_skip;
1763 picture_qos->max_skip = node->max_skip;
1764
1765 picture_qos->avg_qp = node->avg_qp;
1766 picture_qos->min_qp = node->min_qp;
1767 picture_qos->max_qp = node->max_qp;
1768
1769#if 0
1770 pr_info("POC:%d, mv: max:%d, avg:%d, min:%d\n"
1771 "qp: max:%d, avg:%d, min:%d\n"
1772 "skip: max:%d, avg:%d, min:%d\n",
1773 node->poc,
1774 picture_qos->max_mv,
1775 picture_qos->avg_mv,
1776 picture_qos->min_mv,
1777 picture_qos->max_qp,
1778 picture_qos->avg_qp,
1779 picture_qos->min_qp,
1780 picture_qos->max_skip,
1781 picture_qos->avg_skip,
1782 picture_qos->min_skip);
1783#endif
1784 node->b_offset = 0xFFFFFFFF;
1785 list_move(&node->list, &free_qos_nodes_list);
1786
1787 break;
1788 }
1789 }
1790 }
1791}
1792
1793static void qos_do_work(struct work_struct *work)
1794{
1795 uint32_t poc;
1796 uint32_t bOffset;
1797
1798
1799 poc = READ_VREG(AV_SCRATCH_M);
1800 bOffset = READ_VREG(AV_SCRATCH_L);
1801/*
1802 pr_info("poc:%d, bOffset:0x%x\n", poc, bOffset);
1803*/
1804 load_qos_data(poc, bOffset);
1805
1806
1807 WRITE_VREG(AV_SCRATCH_0, 0);
1808}
1809
1810static void userdata_push_do_work(struct work_struct *work)
1811{
1812 unsigned int sei_itu35_flags;
1813 unsigned int sei_itu35_wp;
1814 unsigned int sei_itu35_data_length;
1815
1816 struct userdata_meta_info_t meta_info;
1817 u32 offset, pts;
1818 u64 pts_us64 = 0;
1819 u32 slice_type;
1820 u32 reg;
1821 u32 poc_number;
1822 u32 picture_struct;
1823
1824 memset(&meta_info, 0, sizeof(meta_info));
1825
1826 meta_info.duration = frame_dur;
1827
1828 reg = READ_VREG(AV_SCRATCH_M);
1829 poc_number = reg & 0x7FFFFFF;
1830 if ((poc_number >> 16) == 0x7FF)
1831 poc_number = (reg & 0x7FFFFFF) - 0x8000000;
1832
1833 slice_type = (reg >> 29) & 0x7;
1834 switch (slice_type) {
1835 case SLICE_TYPE_I:
1836 meta_info.flags |= 1<<7;
1837 break;
1838 case SLICE_TYPE_P:
1839 meta_info.flags |= 3<<7;
1840 break;
1841 case SLICE_TYPE_B:
1842 meta_info.flags |= 2<<7;
1843 break;
1844 }
1845 meta_info.poc_number = poc_number;
1846 picture_struct = (reg >> 27) & 0x3;
1847
1848 meta_info.flags |= (VFORMAT_H264 << 3) | (picture_struct << 12);
1849
1850
1851 offset = READ_VREG(AV_SCRATCH_L);
1852
1853 if (pts_pickout_offset_us64
1854 (PTS_TYPE_VIDEO, offset, &pts, 0, &pts_us64) != 0) {
1855 pr_info("pts pick outfailed, offset:0x%x\n", offset);
1856 pts = -1;
1857 meta_info.vpts_valid = 0;
1858 } else
1859 meta_info.vpts_valid = 1;
1860 meta_info.vpts = pts;
1861/*
1862 pr_info("offset:0x%x, vpts:0x%x, slice:%d, poc:%d\n",
1863 offset, pts, slice_type,
1864 poc_number);
1865*/
1866 sei_itu35_flags = READ_VREG(AV_SCRATCH_J);
1867 sei_itu35_wp = (sei_itu35_flags >> 16) & 0xffff;
1868 sei_itu35_data_length = sei_itu35_flags & 0x7fff;
1869
1870 if (enable_userdata_debug)
1871 udr_dump_data(sei_itu35_wp,
1872 sei_itu35_data_length,
1873 pts, poc_number);
1874
1875
1876 vh264_add_userdata(meta_info, sei_itu35_wp);
1877
1878 WRITE_VREG(AV_SCRATCH_J, 0);
1879}
1880
1881
1882static void set_frame_info(struct vframe_s *vf)
1883{
1884 vf->width = frame_width;
1885 vf->height = frame_height;
1886 vf->duration = frame_dur;
1887 vf->ratio_control =
1888 (min(h264_ar, (u32) DISP_RATIO_ASPECT_RATIO_MAX)) <<
1889 DISP_RATIO_ASPECT_RATIO_BIT;
1890 vf->orientation = vh264_rotation;
1891 vf->flag = 0;
1892
1893#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_3D_PROCESS
1894 vf->trans_fmt = 0;
1895 if ((vf->trans_fmt == TVIN_TFMT_3D_LRF) ||
1896 (vf->trans_fmt == TVIN_TFMT_3D_LA)) {
1897 vf->left_eye.start_x = 0;
1898 vf->left_eye.start_y = 0;
1899 vf->left_eye.width = frame_width / 2;
1900 vf->left_eye.height = frame_height;
1901
1902 vf->right_eye.start_x = 0;
1903 vf->right_eye.start_y = 0;
1904 vf->right_eye.width = frame_width / 2;
1905 vf->right_eye.height = frame_height;
1906 } else if ((vf->trans_fmt == TVIN_TFMT_3D_LRH_OLER) ||
1907 (vf->trans_fmt == TVIN_TFMT_3D_TB)) {
1908 vf->left_eye.start_x = 0;
1909 vf->left_eye.start_y = 0;
1910 vf->left_eye.width = frame_width / 2;
1911 vf->left_eye.height = frame_height;
1912
1913 vf->right_eye.start_x = 0;
1914 vf->right_eye.start_y = 0;
1915 vf->right_eye.width = frame_width / 2;
1916 vf->right_eye.height = frame_height;
1917 }
1918#endif
1919
1920}
1921
1922#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER
1923static void vh264_ppmgr_reset(void)
1924{
1925 vf_notify_receiver(PROVIDER_NAME, VFRAME_EVENT_PROVIDER_RESET, NULL);
1926
1927 vh264_local_init();
1928
1929 pr_info("vh264dec: vf_ppmgr_reset\n");
1930}
1931#endif
1932
1933static int get_max_dpb_size(int level_idc, int mb_width, int mb_height)
1934{
1935 int size, r;
1936
1937 switch (level_idc) {
1938 case 10:
1939 r = 1485;
1940 break;
1941 case 11:
1942 r = 3375;
1943 break;
1944 case 12:
1945 case 13:
1946 case 20:
1947 r = 8910;
1948 break;
1949 case 21:
1950 r = 17820;
1951 break;
1952 case 22:
1953 case 30:
1954 r = 30375;
1955 break;
1956 case 31:
1957 r = 67500;
1958 break;
1959 case 32:
1960 r = 76800;
1961 break;
1962 case 40:
1963 case 41:
1964 case 42:
1965 r = 122880;
1966 break;
1967 case 50:
1968 r = 414000;
1969 break;
1970 case 51:
1971 case 52:
1972 r = 691200;
1973 break;
1974 default:
1975 return 0;
1976 }
1977 size = (mb_width * mb_height +
1978 (mb_width * mb_height / 2)) * 256 * 10;
1979 r = (r * 1024 + size-1) / size;
1980 r = min(r, 16);
1981 /*pr_info("max_dpb %d size:%d\n", r, size);*/
1982 return r;
1983}
1984static void vh264_set_params(struct work_struct *work)
1985{
1986 int aspect_ratio_info_present_flag, aspect_ratio_idc;
1987 int max_dpb_size, actual_dpb_size, max_reference_size;
1988 int i, mb_mv_byte, ret;
1989 unsigned long addr;
1990 unsigned int post_canvas, buf_size, endian;
1991 unsigned int frame_mbs_only_flag;
1992 unsigned int chroma_format_idc, chroma444, video_signal;
1993 unsigned int crop_infor, crop_bottom, crop_right, level_idc;
1994 if (!atomic_read(&vh264_active))
1995 return;
1996 mutex_lock(&vh264_mutex);
1997 if (vh264_stream_switching_state == SWITCHING_STATE_ON_CMD1)
1998 vh264_stream_switching_state = SWITCHING_STATE_ON_CMD1_PENDING;
1999 post_canvas = get_post_canvas();
2000 clk_adj_frame_count = 0;
2001 /* set to max decoder clock rate at the beginning */
2002
2003 if (vdec_is_support_4k())
2004 vdec_source_changed(VFORMAT_H264, 3840, 2160, 60);
2005 else
2006 vdec_source_changed(VFORMAT_H264, 1920, 1080, 29);
2007
2008 timing_info_present_flag = 0;
2009 mb_width = READ_VREG(AV_SCRATCH_1);
2010 seq_info = READ_VREG(AV_SCRATCH_2);
2011 aspect_ratio_info = READ_VREG(AV_SCRATCH_3);
2012 num_units_in_tick = READ_VREG(AV_SCRATCH_4);
2013 time_scale = READ_VREG(AV_SCRATCH_5);
2014 level_idc = READ_VREG(AV_SCRATCH_A);
2015 if (level_idc > 0)
2016 saved_idc_level = level_idc;
2017 else if (saved_idc_level > 0)
2018 level_idc = saved_idc_level;
2019 video_signal = READ_VREG(AV_SCRATCH_H);
2020 video_signal_from_vui =
2021 ((video_signal & 0xffff) << 8) |
2022 ((video_signal & 0xff0000) >> 16) |
2023 ((video_signal & 0x3f000000));
2024/*
2025 * pr_info("video_signal_type_present_flag 0x%x\n",
2026 * (video_signal_from_vui >> 29) & 1);
2027 * pr_info("video_format 0x%x\n",
2028 * (video_signal_from_vui >> 26) & 7);
2029 * pr_info("video_full_range_flag 0x%x\n",
2030 * (video_signal_from_vui >> 25) & 1);
2031 * pr_info("color_description_present_flag 0x%x\n",
2032 * (video_signal_from_vui >> 24) & 1);
2033 * pr_info("color_primaries 0x%x\n",
2034 * (video_signal_from_vui >> 16) & 0xff);
2035 * pr_info("transfer_characteristic 0x%x\n",
2036 * (video_signal_from_vui >> 8) & 0xff);
2037 * pr_info("matrix_coefficient 0x%x\n",
2038 * video_signal_from_vui & 0xff);
2039 */
2040
2041 mb_total = (mb_width >> 8) & 0xffff;
2042 max_reference_size = (mb_width >> 24) & 0x7f;
2043 mb_mv_byte = (mb_width & 0x80000000) ? 24 : 96;
2044 if (ucode_type == UCODE_IP_ONLY_PARAM)
2045 mb_mv_byte = 96;
2046 mb_width = mb_width & 0xff;
2047 if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB) {
2048 if (!mb_width && mb_total)
2049 mb_width = 256;
2050 }
2051 if (mb_width)
2052 mb_height = mb_total / mb_width;
2053 last_duration = 0;
2054 /* AV_SCRATCH_2
2055 * bit 15: frame_mbs_only_flag
2056 * bit 13-14: chroma_format_idc
2057 */
2058 frame_mbs_only_flag = (seq_info >> 15) & 0x01;
2059 chroma_format_idc = (seq_info >> 13) & 0x03;
2060 chroma444 = (chroma_format_idc == 3) ? 1 : 0;
2061
2062 /* @AV_SCRATCH_6.31-16 = (left << 8 | right ) << 1
2063 * @AV_SCRATCH_6.15-0 = (top << 8 | bottom ) <<
2064 * (2 - frame_mbs_only_flag)
2065 */
2066 crop_infor = READ_VREG(AV_SCRATCH_6);
2067 crop_bottom = (crop_infor & 0xff) >> (2 - frame_mbs_only_flag);
2068 crop_right = ((crop_infor >> 16) & 0xff) >> (2 - frame_mbs_only_flag);
2069
2070 /* if width or height from outside is not equal to mb, then use mb */
2071 /* add: for seeking stream with other resolution */
2072 if ((last_mb_width && (last_mb_width != mb_width))
2073 || (mb_width != ((frame_width + 15) >> 4)))
2074 frame_width = 0;
2075 if ((last_mb_height && (last_mb_height != mb_height))
2076 || (mb_height != ((frame_height + 15) >> 4)))
2077 frame_height = 0;
2078 last_mb_width = mb_width;
2079 last_mb_height = mb_height;
2080
2081 if ((frame_width == 0) || (frame_height == 0) || crop_infor) {
2082 frame_width = mb_width << 4;
2083 frame_height = mb_height << 4;
2084 if (frame_mbs_only_flag) {
2085 frame_height =
2086 frame_height - (2 >> chroma444) *
2087 min(crop_bottom,
2088 (unsigned int)((8 << chroma444) - 1));
2089 frame_width =
2090 frame_width - (2 >> chroma444) * min(crop_right,
2091 (unsigned
2092 int)((8 << chroma444) - 1));
2093 } else {
2094 frame_height =
2095 frame_height - (4 >> chroma444) *
2096 min(crop_bottom,
2097 (unsigned int)((8 << chroma444)
2098 - 1));
2099 frame_width =
2100 frame_width - (4 >> chroma444) * min(crop_right,
2101 (unsigned
2102 int)((8 <<
2103 chroma444)
2104 - 1));
2105 }
2106#if 0
2107 pr_info
2108 ("frame_mbs_only_flag %d, crop_bottom %d, frame_height %d, ",
2109 frame_mbs_only_flag, crop_bottom, frame_height);
2110 pr_info
2111 ("mb_height %d,crop_right %d, frame_width %d, mb_width %d\n",
2112 mb_height, crop_right, frame_width, mb_width);
2113#endif
2114 if (frame_height == 1088)
2115 frame_height = 1080;
2116 }
2117
2118 mb_width = (mb_width + 3) & 0xfffffffc;
2119 mb_height = (mb_height + 3) & 0xfffffffc;
2120 mb_total = mb_width * mb_height;
2121
2122 /*max_reference_size <= max_dpb_size <= actual_dpb_size*/
2123 is_4k = (mb_total > 8160) ? true:false;
2124
2125
2126 max_dpb_size = get_max_dpb_size(level_idc, mb_width, mb_height);
2127 if (max_dpb_size < max_reference_size)
2128 max_dpb_size = max_reference_size;
2129 if (max_dpb_size > 15
2130 && get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB
2131 && (codec_mm_get_total_size() < 80 * SZ_1M)) {
2132 actual_dpb_size
2133 = max_reference_size + dpb_size_adj;
2134 if (actual_dpb_size > VF_BUF_NUM)
2135 actual_dpb_size = VF_BUF_NUM;
2136 } else {
2137 actual_dpb_size = max_dpb_size + dpb_size_adj;
2138 actual_dpb_size = min(actual_dpb_size, VF_BUF_NUM);
2139 }
2140 max_reference_size++;
2141 pr_info("actual_dpb_size %d max_dpb_size %d max_ref %d\n",
2142 actual_dpb_size, max_dpb_size,
2143 max_reference_size);
2144 buf_size = mb_total * mb_mv_byte * max_reference_size;
2145
2146 ret = decoder_bmmu_box_alloc_buf_phy(mm_blk_handle, 1,
2147 buf_size, DRIVER_NAME, &addr);
2148
2149 if (ret < 0) {
2150 fatal_error_flag =
2151 DECODER_FATAL_ERROR_NO_MEM;
2152 vh264_running = 0;
2153 mutex_unlock(&vh264_mutex);
2154 return;
2155 }
2156
2157 WRITE_VREG(AV_SCRATCH_1, addr);
2158 WRITE_VREG(AV_SCRATCH_3, post_canvas);
2159 WRITE_VREG(AV_SCRATCH_4, addr + buf_size);
2160
2161 if (!(READ_VREG(AV_SCRATCH_F) & 0x1)) {
2162 for (i = 0; i < actual_dpb_size; i++) {
2163#ifdef DOUBLE_WRITE
2164 int page_count =
2165 PAGE_ALIGN((mb_total << 8) + (mb_total
2166 << 7) + (mb_total << 6) +
2167 (mb_total << 5)) / PAGE_SIZE;
2168#else
2169 int page_count =
2170 PAGE_ALIGN((mb_total << 8) +
2171 (mb_total << 7)) / PAGE_SIZE;
2172#endif
2173
2174 ret = decoder_bmmu_box_alloc_buf_phy(mm_blk_handle,
2175 VF_BUFFER_IDX(i),
2176 page_count << PAGE_SHIFT,
2177 DRIVER_NAME, &buffer_spec[i].phy_addr);
2178
2179 if (ret < 0) {
2180 buffer_spec[i].alloc_count = 0;
2181 fatal_error_flag =
2182 DECODER_FATAL_ERROR_NO_MEM;
2183 vh264_running = 0;
2184 mutex_unlock(&vh264_mutex);
2185 return;
2186 }
2187
2188 addr = buffer_spec[i].phy_addr;
2189 buffer_spec[i].alloc_count = page_count;
2190
2191 if (i <= 21) {
2192 buffer_spec[i].y_addr = addr;
2193 addr += mb_total << 8;
2194 buffer_spec[i].u_addr = addr;
2195 buffer_spec[i].v_addr = addr;
2196 addr += mb_total << 7;
2197 vfbuf_use[i] = 0;
2198
2199 buffer_spec[i].y_canvas_index = 128 + i * 2;
2200 buffer_spec[i].u_canvas_index = 128 + i * 2 + 1;
2201 buffer_spec[i].v_canvas_index = 128 + i * 2 + 1;
2202
2203 buffer_spec[i].y_canvas_width = mb_width << 4;
2204 buffer_spec[i].y_canvas_height = mb_height << 4;
2205 buffer_spec[i].u_canvas_width = mb_width << 4;
2206 buffer_spec[i].u_canvas_height = mb_height << 4;
2207 buffer_spec[i].v_canvas_width = mb_width << 4;
2208 buffer_spec[i].v_canvas_height = mb_height << 4;
2209
2210 endian = (canvas_mode == CANVAS_BLKMODE_LINEAR)?7:0;
2211 canvas_config_ex(128 + i * 2,
2212 buffer_spec[i].y_addr,
2213 mb_width << 4, mb_height << 4,
2214 CANVAS_ADDR_NOWRAP,
2215 canvas_mode, endian);
2216 canvas_config_ex(128 + i * 2 + 1,
2217 buffer_spec[i].u_addr,
2218 mb_width << 4, mb_height << 3,
2219 CANVAS_ADDR_NOWRAP,
2220 canvas_mode, endian);
2221 WRITE_VREG(ANC0_CANVAS_ADDR + i,
2222 spec2canvas(&buffer_spec[i]));
2223 } else {
2224 buffer_spec[i].y_canvas_index =
2225 2 * (i - 21) + 4;
2226 buffer_spec[i].y_addr = addr;
2227 addr += mb_total << 8;
2228 buffer_spec[i].u_canvas_index =
2229 2 * (i - 21) + 5;
2230 buffer_spec[i].v_canvas_index =
2231 2 * (i - 21) + 5;
2232 buffer_spec[i].u_addr = addr;
2233 addr += mb_total << 7;
2234 vfbuf_use[i] = 0;
2235
2236 buffer_spec[i].y_canvas_width = mb_width << 4;
2237 buffer_spec[i].y_canvas_height = mb_height << 4;
2238 buffer_spec[i].u_canvas_width = mb_width << 4;
2239 buffer_spec[i].u_canvas_height = mb_height << 4;
2240 buffer_spec[i].v_canvas_width = mb_width << 4;
2241 buffer_spec[i].v_canvas_height = mb_height << 4;
2242
2243 spec_set_canvas(&buffer_spec[i]
2244 , mb_width << 4, mb_height << 4);
2245 WRITE_VREG(ANC0_CANVAS_ADDR + i
2246 , spec2canvas(&buffer_spec[i]));
2247 }
2248 }
2249 } else {
2250 fatal_error_flag =
2251 DECODER_FATAL_ERROR_NO_MEM;
2252 vh264_running = 0;
2253 mutex_unlock(&vh264_mutex);
2254 pr_err("never be here!!\n");
2255 return;
2256 }
2257
2258 timing_info_present_flag = seq_info & 0x2;
2259 fixed_frame_rate_flag = 0;
2260 aspect_ratio_info_present_flag = seq_info & 0x1;
2261 aspect_ratio_idc = (seq_info >> 16) & 0xff;
2262
2263 if (timing_info_present_flag) {
2264 fixed_frame_rate_flag = seq_info & 0x40;
2265
2266 if (((num_units_in_tick * 120) >= time_scale
2267 && ((!sync_outside) || (!frame_dur))) &&
2268 num_units_in_tick
2269 && time_scale) {
2270 if (use_idr_framerate || !frame_dur
2271 || !duration_from_pts_done || vh264_running) {
2272 u32 frame_dur_es =
2273 div_u64(96000ULL * 2 *
2274 num_units_in_tick,
2275 time_scale);
2276
2277 /* hack to avoid use ES frame duration
2278 * when it's half of the rate from
2279 * system info
2280 */
2281 /* sometimes the encoder is given a wrong
2282 * frame rate but the system side information
2283 *is more reliable
2284 */
2285 if ((frame_dur * 2) != frame_dur_es) {
2286 frame_dur = frame_dur_es;
2287 if (fr_hint_status == VDEC_NEED_HINT) {
2288 schedule_work(&notify_work);
2289 fr_hint_status = VDEC_HINTED;
2290 }
2291 }
2292 }
2293 }
2294 } else
2295 pr_info("H.264: timing_info not present\n");
2296
2297 if (aspect_ratio_info_present_flag) {
2298 if (aspect_ratio_idc == EXTEND_SAR) {
2299 h264_ar =
2300 div_u64(256ULL * (aspect_ratio_info >> 16) *
2301 frame_height,
2302 (aspect_ratio_info & 0xffff) *
2303 frame_width);
2304 } else {
2305 /* pr_info("v264dec: aspect_ratio_idc = %d\n",
2306 * aspect_ratio_idc);
2307 */
2308
2309 switch (aspect_ratio_idc) {
2310 case 1:
2311 h264_ar = 0x100 * frame_height / frame_width;
2312 break;
2313 case 2:
2314 h264_ar = 0x100 * frame_height * 11 /
2315 (frame_width * 12);
2316 break;
2317 case 3:
2318 h264_ar = 0x100 * frame_height * 11 /
2319 (frame_width * 10);
2320 break;
2321 case 4:
2322 h264_ar = 0x100 * frame_height * 11 /
2323 (frame_width * 16);
2324 break;
2325 case 5:
2326 h264_ar = 0x100 * frame_height * 33 /
2327 (frame_width * 40);
2328 break;
2329 case 6:
2330 h264_ar = 0x100 * frame_height * 11 /
2331 (frame_width * 24);
2332 break;
2333 case 7:
2334 h264_ar = 0x100 * frame_height * 11 /
2335 (frame_width * 20);
2336 break;
2337 case 8:
2338 h264_ar = 0x100 * frame_height * 11 /
2339 (frame_width * 32);
2340 break;
2341 case 9:
2342 h264_ar = 0x100 * frame_height * 33 /
2343 (frame_width * 80);
2344 break;
2345 case 10:
2346 h264_ar = 0x100 * frame_height * 11 /
2347 (frame_width * 18);
2348 break;
2349 case 11:
2350 h264_ar = 0x100 * frame_height * 11 /
2351 (frame_width * 15);
2352 break;
2353 case 12:
2354 h264_ar = 0x100 * frame_height * 33 /
2355 (frame_width * 64);
2356 break;
2357 case 13:
2358 h264_ar = 0x100 * frame_height * 99 /
2359 (frame_width * 160);
2360 break;
2361 case 14:
2362 h264_ar = 0x100 * frame_height * 3 /
2363 (frame_width * 4);
2364 break;
2365 case 15:
2366 h264_ar = 0x100 * frame_height * 2 /
2367 (frame_width * 3);
2368 break;
2369 case 16:
2370 h264_ar = 0x100 * frame_height * 1 /
2371 (frame_width * 2);
2372 break;
2373 default:
2374 if (vh264_ratio >> 16) {
2375 h264_ar = (frame_height *
2376 (vh264_ratio & 0xffff) *
2377 0x100 +
2378 ((vh264_ratio >> 16) *
2379 frame_width / 2)) /
2380 ((vh264_ratio >> 16) *
2381 frame_width);
2382 } else {
2383 h264_ar = frame_height * 0x100 /
2384 frame_width;
2385 }
2386 break;
2387 }
2388 }
2389 } else {
2390 pr_info("v264dec: aspect_ratio not available from source\n");
2391 if (vh264_ratio >> 16) {
2392 /* high 16 bit is width, low 16 bit is height */
2393 h264_ar =
2394 ((vh264_ratio & 0xffff) * frame_height * 0x100 +
2395 (vh264_ratio >> 16) * frame_width / 2) /
2396 ((vh264_ratio >> 16) * frame_width);
2397 } else
2398 h264_ar = frame_height * 0x100 / frame_width;
2399 }
2400
2401 WRITE_VREG(AV_SCRATCH_0,
2402 (max_reference_size << 24) | (actual_dpb_size << 16) |
2403 (max_dpb_size << 8));
2404 if (vh264_stream_switching_state != SWITCHING_STATE_OFF) {
2405 vh264_stream_switching_state = SWITCHING_STATE_OFF;
2406 pr_info("Leaving switching mode.\n");
2407 }
2408 mutex_unlock(&vh264_mutex);
2409}
2410
2411static unsigned int pts_inc_by_duration(
2412 unsigned int *new_pts, unsigned int *new_pts_rem)
2413{
2414 unsigned int r, rem;
2415
2416 r = last_pts + DUR2PTS(frame_dur);
2417 rem = last_pts_remainder + DUR2PTS_REM(frame_dur);
2418
2419 if (rem >= 96) {
2420 r++;
2421 rem -= 96;
2422 }
2423
2424 if (new_pts)
2425 *new_pts = r;
2426 if (new_pts_rem)
2427 *new_pts_rem = rem;
2428
2429 return r;
2430}
2431static inline bool vh264_isr_parser(struct vframe_s *vf,
2432 unsigned int pts_valid, unsigned int buffer_index,
2433 unsigned int pts)
2434{
2435 unsigned int pts_duration = 0;
2436
2437 if (h264_first_pts_ready == 0) {
2438 if (pts_valid == 0) {
2439 vfbuf_use[buffer_index]++;
2440 vf->index = buffer_index;
2441 kfifo_put(&recycle_q,
2442 (const struct vframe_s *)vf);
2443 return false;
2444 }
2445
2446 h264pts1 = pts;
2447 h264_pts_count = 0;
2448 h264_first_pts_ready = 1;
2449 } else {
2450 if (pts < h264pts1) {
2451 if (h264_pts_count > 24) {
2452 pr_info("invalid h264pts1, reset\n");
2453 h264pts1 = pts;
2454 h264_pts_count = 0;
2455 }
2456 }
2457 if (pts_valid && (pts > h264pts1) && (h264_pts_count > 24)
2458 && (duration_from_pts_done == 0)) {
2459 unsigned int
2460 old_duration = frame_dur;
2461 h264pts2 = pts;
2462
2463 pts_duration = (h264pts2 - h264pts1) * 16 /
2464 (h264_pts_count * 15);
2465
2466 if ((pts_duration != frame_dur)
2467 && (!pts_outside)) {
2468 if (use_idr_framerate) {
2469 bool pts_c_24 = close_to(pts_duration,
2470 RATE_24_FPS,
2471 RATE_CORRECTION_THRESHOLD);
2472 bool frm_c_25 = close_to(frame_dur,
2473 RATE_25_FPS,
2474 RATE_CORRECTION_THRESHOLD);
2475 bool pts_c_25 = close_to(pts_duration,
2476 RATE_25_FPS,
2477 RATE_CORRECTION_THRESHOLD);
2478 bool frm_c_24 = close_to(frame_dur,
2479 RATE_24_FPS,
2480 RATE_CORRECTION_THRESHOLD);
2481 if ((pts_c_24 && frm_c_25)
2482 || (pts_c_25 && frm_c_24)) {
2483 pr_info
2484 ("H.264:Correct frame dur ");
2485 pr_info
2486 (" from %d to duration based ",
2487 frame_dur);
2488 pr_info
2489 ("on PTS %d ---\n",
2490 pts_duration);
2491 frame_dur = pts_duration;
2492 duration_from_pts_done = 1;
2493 } else if (((frame_dur < 96000 / 240)
2494 && (pts_duration > 96000 / 240))
2495 || (!duration_on_correcting &&
2496 !frm_c_25 && !frm_c_24)) {
2497 /* fft: if the frame rate is
2498 * not regular, use the
2499 * calculate rate insteadof.
2500 */
2501 pr_info
2502 ("H.264:Correct frame dur ");
2503 pr_info
2504 (" from %d to duration based ",
2505 frame_dur);
2506 pr_info
2507 ("on PTS %d ---\n",
2508 pts_duration);
2509 frame_dur = pts_duration;
2510 duration_on_correcting = 1;
2511 }
2512 } else {
2513 if (close_to(pts_duration,
2514 frame_dur, 2000)) {
2515 frame_dur = pts_duration;
2516 pr_info
2517 ("used calculate frame rate,");
2518 pr_info("on duration =%d\n",
2519 frame_dur);
2520 } else {
2521 pr_info
2522 ("don't use calculate frame ");
2523 pr_info
2524 ("rate pts_duration =%d\n",
2525 pts_duration);
2526 }
2527 }
2528 }
2529
2530 if (duration_from_pts_done == 0) {
2531 if (close_to
2532 (pts_duration,
2533 old_duration,
2534 RATE_CORRECTION_THRESHOLD)) {
2535 pr_info
2536 ("finished correct frame dur");
2537 pr_info
2538 (" new=%d,old_duration=%d,cnt=%d\n",
2539 pts_duration,
2540 old_duration,
2541 h264_pts_count);
2542 duration_from_pts_done = 1;
2543 } else { /*not the same,redo it. */
2544 if (!close_to(pts_duration,
2545 old_duration, 1000) &&
2546 !close_to(pts_duration,
2547 frame_dur, 1000) &&
2548 close_to(pts_duration,
2549 last_duration, 200)) {
2550 /* yangle: frame_dur must
2551 * wrong,recover it.
2552 */
2553 frame_dur = pts_duration;
2554 }
2555
2556 pr_info
2557 ("restart correct frame duration ");
2558 pr_info
2559 ("new=%d,old_duration=%d,cnt=%d\n",
2560 pts_duration,
2561 old_duration,
2562 h264_pts_count);
2563 h264pts1 = h264pts2;
2564 h264_pts_count = 0;
2565 duration_from_pts_done = 0;
2566 }
2567 }
2568 last_duration = pts_duration;
2569 }
2570 }
2571 return true;
2572}
2573#ifdef HANDLE_H264_IRQ
2574static irqreturn_t vh264_isr(int irq, void *dev_id)
2575#else
2576static void vh264_isr(void)
2577#endif
2578{
2579 unsigned int buffer_index;
2580 struct vframe_s *vf;
2581 unsigned int cpu_cmd;
2582 unsigned int pts, pts_lookup_save, pts_valid_save, pts_valid = 0;
2583 unsigned int pts_us64_valid = 0;
2584 unsigned int framesize;
2585 u64 pts_us64;
2586 bool force_interlaced_frame = false;
2587 unsigned int sei_itu35_flags;
2588
2589 static const unsigned int idr_num =
2590 FIX_FRAME_RATE_CHECK_IDRFRAME_NUM;
2591 static const unsigned int flg_1080_itl =
2592 DEC_CONTROL_FLAG_FORCE_2997_1080P_INTERLACE;
2593 static const unsigned int flg_576_itl =
2594 DEC_CONTROL_FLAG_FORCE_2500_576P_INTERLACE;
2595
2596 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
2597
2598 if (0 == (stat & STAT_VDEC_RUN)) {
2599 pr_info("decoder is not running\n");
2600#ifdef HANDLE_H264_IRQ
2601 return IRQ_HANDLED;
2602#else
2603 return;
2604#endif
2605 }
2606
2607 cpu_cmd = READ_VREG(AV_SCRATCH_0);
2608
2609#ifdef DROP_B_FRAME_FOR_1080P_50_60FPS
2610 if ((frame_dur < 2004) &&
2611 (frame_width >= 1400) &&
2612 (frame_height >= 1000) && (last_interlaced == 0))
2613 SET_VREG_MASK(AV_SCRATCH_F, 0x8);
2614#endif
2615 if ((decoder_force_reset == 1)
2616 || ((error_recovery_mode != 1)
2617 && (no_idr_error_count >= no_idr_error_max)
2618 && (ucode_type != UCODE_IP_ONLY_PARAM))) {
2619 vh264_running = 0;
2620 pr_info("force reset decoder %d!!!\n", no_idr_error_count);
2621 schedule_work(&error_wd_work);
2622 decoder_force_reset = 0;
2623 no_idr_error_count = 0;
2624 } else if ((cpu_cmd & 0xff) == 1) {
2625 if (unlikely
2626 (vh264_running
2627 && (kfifo_len(&newframe_q) != VF_POOL_SIZE))) {
2628 /* a cmd 1 sent during decoding w/o getting a cmd 3. */
2629 /* should not happen but the original code has such
2630 * case, do the same process
2631 */
2632 if ((READ_VREG(AV_SCRATCH_1) & 0xff)
2633 == 1) {/*invalid mb_width*/
2634 vh264_running = 0;
2635 fatal_error_flag = DECODER_FATAL_ERROR_UNKNOWN;
2636 /* this is fatal error, need restart */
2637 pr_info("cmd 1 fatal error happened\n");
2638 schedule_work(&error_wd_work);
2639 } else {
2640 vh264_stream_switching_state = SWITCHING_STATE_ON_CMD1;
2641 pr_info("Enter switching mode cmd1.\n");
2642 schedule_work(&stream_switching_work);
2643 }
2644 return IRQ_HANDLED;
2645 }
2646 pr_info("Enter set parameter cmd1.\n");
2647 schedule_work(&set_parameter_work);
2648 return IRQ_HANDLED;
2649 } else if ((cpu_cmd & 0xff) == 2) {
2650 int frame_mb_only, pic_struct_present, pic_struct, prog_frame,
2651 poc_sel, idr_flag, eos, error;
2652 int i, status, num_frame, b_offset;
2653 int current_error_count, slice_type;
2654
2655 vh264_running = 1;
2656 vh264_no_disp_count = 0;
2657 num_frame = (cpu_cmd >> 8) & 0xff;
2658 frame_mb_only = seq_info & 0x8000;
2659 pic_struct_present = seq_info & 0x10;
2660
2661 current_error_count = READ_VREG(AV_SCRATCH_D);
2662 if (vh264_error_count != current_error_count) {
2663 /* pr_info("decoder error happened, count %d\n",
2664 * current_error_count);
2665 */
2666 vh264_error_count = current_error_count;
2667 }
2668
2669 for (i = 0; (i < num_frame) && (!vh264_eos); i++) {
2670 status = READ_VREG(AV_SCRATCH_1 + i);
2671 buffer_index = status & 0x1f;
2672 error = status & 0x200;
2673 slice_type = (READ_VREG(AV_SCRATCH_H) >> (i * 4)) & 0xf;
2674
2675 if ((error_recovery_mode_use & 2) && error)
2676 check_pts_discontinue = true;
2677 if (ucode_type == UCODE_IP_ONLY_PARAM
2678 && iponly_early_mode)
2679 continue;
2680 if ((p_last_vf != NULL)
2681 && (p_last_vf->index == buffer_index))
2682 continue;
2683
2684 if (buffer_index >= VF_BUF_NUM)
2685 continue;
2686
2687 pic_struct = (status >> 5) & 0x7;
2688 prog_frame = status & 0x100;
2689 poc_sel = status & 0x200;
2690 idr_flag = status & 0x400;
2691 frame_packing_type = (status >> 12) & 0x7;
2692 eos = (status >> 15) & 1;
2693
2694 if (eos)
2695 vh264_eos = 1;
2696
2697 b_offset = (status >> 16) & 0xffff;
2698
2699 if (error)
2700 no_idr_error_count++;
2701 if (idr_flag ||
2702 (!error && (slice_type != SLICE_TYPE_I)))
2703 no_idr_error_count = 0;
2704
2705 if (decoder_debug_flag) {
2706 pr_info
2707 ("slice_type %x idr %x error %x count %d",
2708 slice_type, idr_flag, error,
2709 no_idr_error_count);
2710 pr_info(" prog %x pic_struct %x offset %x\n",
2711 prog_frame, pic_struct, b_offset);
2712 }
2713#ifdef DROP_B_FRAME_FOR_1080P_50_60FPS
2714 last_interlaced = prog_frame ? 0 : 1;
2715#endif
2716 if (kfifo_get(&newframe_q, &vf) == 0) {
2717 pr_info
2718 ("fatal error, no available buffer slot.");
2719 return IRQ_HANDLED;
2720 }
2721
2722 if (clk_adj_frame_count < (VDEC_CLOCK_ADJUST_FRAME + 1))
2723 clk_adj_frame_count++;
2724
2725 set_frame_info(vf);
2726
2727 switch (i) {
2728 case 0:
2729 b_offset |=
2730 (READ_VREG(AV_SCRATCH_A) & 0xffff)
2731 << 16;
2732 break;
2733 case 1:
2734 b_offset |=
2735 READ_VREG(AV_SCRATCH_A) & 0xffff0000;
2736 break;
2737 case 2:
2738 b_offset |=
2739 (READ_VREG(AV_SCRATCH_B) & 0xffff)
2740 << 16;
2741 break;
2742 case 3:
2743 b_offset |=
2744 READ_VREG(AV_SCRATCH_B) & 0xffff0000;
2745 break;
2746 case 4:
2747 b_offset |=
2748 (READ_VREG(AV_SCRATCH_C) & 0xffff)
2749 << 16;
2750 break;
2751 case 5:
2752 b_offset |=
2753 READ_VREG(AV_SCRATCH_C) & 0xffff0000;
2754 break;
2755 default:
2756 break;
2757 }
2758
2759 if (error)
2760 gvs->drop_frame_count++;
2761
2762 /* add 64bit pts us ; */
2763 if (unlikely
2764 ((b_offset == first_offset)
2765 && (first_pts_cached))) {
2766 pts = first_pts;
2767 pts_us64 = first_pts64;
2768 framesize = first_frame_size;
2769 first_pts_cached = false;
2770 pts_valid = 1;
2771 pts_us64_valid = 1;
2772#ifdef DEBUG_PTS
2773 pts_hit++;
2774#endif
2775 } else if (pts_lookup_offset_us64
2776 (PTS_TYPE_VIDEO, b_offset, &pts,
2777 &framesize, 0, &pts_us64) == 0) {
2778 pts_valid = 1;
2779 pts_us64_valid = 1;
2780#ifdef DEBUG_PTS
2781 pts_hit++;
2782#endif
2783 } else {
2784 pts_valid = 0;
2785 pts_us64_valid = 0;
2786 framesize = 0;
2787#ifdef DEBUG_PTS
2788 pts_missed++;
2789#endif
2790 }
2791
2792 if (idr_flag)
2793 s_vframe_qos.type = 4;
2794 else if (slice_type == SLICE_TYPE_I)
2795 s_vframe_qos.type = 1;
2796 else if (slice_type == SLICE_TYPE_P)
2797 s_vframe_qos.type = 2;
2798 else if (slice_type == SLICE_TYPE_B || slice_type == 8)
2799 s_vframe_qos.type = 3;
2800
2801 s_vframe_qos.size = framesize;
2802
2803 if (pts_valid)
2804 s_vframe_qos.pts = pts;
2805 else
2806 s_vframe_qos.pts = last_pts + DUR2PTS(frame_dur);
2807#ifndef ENABLE_SEI_ITU_T35
2808 if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_G12A) {
2809 u32 reg_data;
2810 if (i) {
2811 reg_data = READ_VREG(AV_SCRATCH_N);
2812 s_vframe_qos.max_mv
2813 = (reg_data >> 16) & 0xffff;
2814 s_vframe_qos.avg_mv
2815 = (reg_data >> 8) & 0xff;
2816 s_vframe_qos.min_mv
2817 = reg_data & 0xff;
2818 reg_data = READ_VREG(AV_SCRATCH_L);
2819 s_vframe_qos.max_qp
2820 = (reg_data >> 16) & 0xff;
2821 s_vframe_qos.avg_qp
2822 = (reg_data >> 8) & 0xff;
2823 s_vframe_qos.min_qp
2824 = reg_data & 0xff;
2825 reg_data = READ_VREG(AV_SCRATCH_M);
2826 s_vframe_qos.max_skip
2827 = (reg_data >> 16) & 0xff;
2828 s_vframe_qos.avg_skip
2829 = (reg_data >> 8) & 0xff;
2830 s_vframe_qos.min_skip
2831 = reg_data & 0xff;
2832 } else {
2833 reg_data = READ_VREG(AV_SCRATCH_J);
2834 s_vframe_qos.max_mv
2835 = (reg_data >> 16) & 0xffff;
2836 s_vframe_qos.avg_mv
2837 = (reg_data >> 8) & 0xff;
2838 s_vframe_qos.min_mv
2839 = reg_data & 0xff;
2840 reg_data = READ_VREG(AV_SCRATCH_I);
2841 s_vframe_qos.max_qp
2842 = (reg_data >> 16) & 0xff;
2843 s_vframe_qos.avg_qp
2844 = (reg_data >> 8) & 0xff;
2845 s_vframe_qos.min_qp
2846 = reg_data & 0xff;
2847 reg_data = READ_VREG(AV_SCRATCH_K);
2848 s_vframe_qos.max_skip
2849 = (reg_data >> 16) & 0xff;
2850 s_vframe_qos.avg_skip
2851 = (reg_data >> 8) & 0xff;
2852 s_vframe_qos.min_skip
2853 = reg_data & 0xff;
2854 }
2855 if (decoder_debug_flag&0x2) {
2856 pr_info("max_mv %d avg_mv %d min_mv %d slice_type %d offset %x i = %d\n",
2857 s_vframe_qos.max_mv,
2858 s_vframe_qos.avg_mv,
2859 s_vframe_qos.min_mv,
2860 slice_type,
2861 b_offset,
2862 i);
2863 pr_info("max_qp %d avg_qp %d min_qp %d\n",
2864 s_vframe_qos.max_qp,
2865 s_vframe_qos.avg_qp,
2866 s_vframe_qos.min_qp);
2867 pr_info("max_skip %d avg_skip %d min_skip %d\n",
2868 s_vframe_qos.max_skip,
2869 s_vframe_qos.avg_skip,
2870 s_vframe_qos.min_skip);
2871 }
2872 } else
2873 search_qos_node(&s_vframe_qos, b_offset);
2874#endif
2875 frame_count++;
2876
2877 s_vframe_qos.num = frame_count;
2878 vdec_fill_frame_info(&s_vframe_qos, 1);
2879
2880 /* on second IDR frame,check the diff between pts
2881 * compute from duration and pts from lookup ,
2882 * if large than frame_dur,we think it is uncorrect.
2883 */
2884 pts_lookup_save = pts;
2885 pts_valid_save = pts_valid;
2886 if (fixed_frame_rate_flag
2887 && (fixed_frame_rate_check_count <=
2888 idr_num)) {
2889 if (idr_flag && pts_valid) {
2890 fixed_frame_rate_check_count++;
2891 /* pr_info("diff:%d\n",
2892 * last_pts - pts_lookup_save);
2893 */
2894 if ((fixed_frame_rate_check_count ==
2895 idr_num) &&
2896 (abs(pts - (last_pts +
2897 DUR2PTS(frame_dur))) >
2898 DUR2PTS(frame_dur))) {
2899 fixed_frame_rate_flag = 0;
2900 pr_info("pts sync mode play\n");
2901 }
2902
2903 if (fixed_frame_rate_flag
2904 && (fixed_frame_rate_check_count
2905 > idr_num)) {
2906 pr_info
2907 ("fix_frame_rate mode play\n");
2908 }
2909 }
2910 }
2911
2912 if (READ_VREG(AV_SCRATCH_F) & 2) {
2913 /* for I only mode, ignore the PTS information
2914 * and only uses frame duration for each I
2915 * frame decoded
2916 */
2917 if (p_last_vf)
2918 pts_valid = 0;
2919 /* also skip frame duration calculation
2920 * based on PTS
2921 */
2922 duration_from_pts_done = 1;
2923 /* and add a default duration for 1/30 second
2924 * if there is no valid frame
2925 * duration available
2926 */
2927 if (frame_dur == 0)
2928 frame_dur = 96000 / 30;
2929 }
2930
2931 if (sync_outside == 0) {
2932 if (!vh264_isr_parser(vf,
2933 pts_valid, buffer_index, pts))
2934 continue;
2935
2936 h264_pts_count++;
2937 } else {
2938 if (!idr_flag)
2939 pts_valid = 0;
2940 }
2941
2942 if (pts_valid && !pts_discontinue) {
2943 pts_discontinue =
2944 (abs(last_pts - pts) >=
2945 tsync_vpts_discontinuity_margin());
2946 }
2947 /* if use_idr_framerate or fixed frame rate, only
2948 * use PTS for IDR frames except for pts discontinue
2949 */
2950 if (timing_info_present_flag &&
2951 frame_dur &&
2952 (use_idr_framerate ||
2953 (fixed_frame_rate_flag != 0))
2954 && pts_valid && h264_first_valid_pts_ready
2955 && (!pts_discontinue)) {
2956 pts_valid =
2957 (slice_type == SLICE_TYPE_I) ? 1 : 0;
2958 }
2959
2960 if (!h264_first_valid_pts_ready && pts_valid) {
2961 h264_first_valid_pts_ready = true;
2962 last_pts = pts - DUR2PTS(frame_dur);
2963 last_pts_remainder = 0;
2964 }
2965 /* calculate PTS of next frame and smooth
2966 * PTS for fixed rate source
2967 */
2968 if (pts_valid) {
2969 if ((fixed_frame_rate_flag) &&
2970 (!pts_discontinue) &&
2971 (abs(pts_inc_by_duration(NULL, NULL)
2972 - pts)
2973 < DUR2PTS(frame_dur))) {
2974 pts = pts_inc_by_duration(&pts,
2975 &last_pts_remainder);
2976 } else
2977 last_pts_remainder = 0;
2978
2979 } else {
2980 if (fixed_frame_rate_flag && !pts_discontinue &&
2981 (fixed_frame_rate_check_count > idr_num) &&
2982 pts_valid_save && (sync_outside == 0) &&
2983 (abs(pts_inc_by_duration(NULL, NULL) - pts)
2984 > DUR2PTS(frame_dur))) {
2985 duration_from_pts_done = 0;
2986 pr_info("recalc frame_dur\n");
2987 } else
2988 pts = pts_inc_by_duration(&pts,
2989 &last_pts_remainder);
2990 pts_valid = 1;
2991 }
2992
2993 if ((dec_control &
2994 flg_1080_itl)
2995 && (frame_width == 1920)
2996 && (frame_height >= 1080)
2997 && (vf->duration == 3203))
2998 force_interlaced_frame = true;
2999 else if ((dec_control &
3000 flg_576_itl)
3001 && (frame_width == 720)
3002 && (frame_height == 576)
3003 && (vf->duration == 3840))
3004 force_interlaced_frame = true;
3005
3006 /* for frames with PTS, check if there is PTS
3007 * discontinue based on previous frames
3008 * (including error frames),
3009 * force no VPTS discontinue reporting if we saw
3010 *errors earlier but only once.
3011 */
3012
3013 /*count info*/
3014 gvs->frame_dur = frame_dur;
3015 vdec_count_info(gvs, error, b_offset);
3016
3017 if ((pts_valid) && (check_pts_discontinue)
3018 && (!error)) {
3019 if (pts_discontinue) {
3020 vf->flag = 0;
3021 check_pts_discontinue = false;
3022 } else if ((pts - last_pts) < 90000) {
3023 vf->flag = VFRAME_FLAG_NO_DISCONTINUE;
3024 check_pts_discontinue = false;
3025 }
3026 }
3027
3028 last_pts = pts;
3029
3030 if (fixed_frame_rate_flag
3031 && (fixed_frame_rate_check_count <=
3032 idr_num)
3033 && (sync_outside == 0)
3034 && pts_valid_save)
3035 pts = pts_lookup_save;
3036
3037 if (pic_struct_present) {
3038 if ((pic_struct == PIC_TOP_BOT)
3039 || (pic_struct == PIC_BOT_TOP))
3040 prog_frame = 0;
3041 }
3042
3043 if ((!force_interlaced_frame)
3044 && (prog_frame
3045 || (pic_struct_present
3046 && pic_struct
3047 <= PIC_TRIPLE_FRAME))) {
3048 if (pic_struct_present) {
3049 if (pic_struct == PIC_TOP_BOT_TOP
3050 || pic_struct
3051 == PIC_BOT_TOP_BOT) {
3052 vf->duration +=
3053 vf->duration >> 1;
3054 } else if (pic_struct ==
3055 PIC_DOUBLE_FRAME)
3056 vf->duration += vf->duration;
3057 else if (pic_struct ==
3058 PIC_TRIPLE_FRAME) {
3059 vf->duration +=
3060 vf->duration << 1;
3061 }
3062 }
3063
3064 last_pts =
3065 last_pts + DUR2PTS(vf->duration -
3066 frame_dur);
3067
3068 vf->index = buffer_index;
3069 vf->type =
3070 VIDTYPE_PROGRESSIVE |
3071 VIDTYPE_VIU_FIELD |
3072 VIDTYPE_VIU_NV21;
3073 vf->duration_pulldown = 0;
3074 vf->signal_type = video_signal_from_vui;
3075 vf->index = buffer_index;
3076 vf->pts = (pts_valid) ? pts : 0;
3077 if (pts_us64_valid == 1)
3078 vf->pts_us64 = pts_us64;
3079 else
3080 vf->pts_us64 = div64_u64(((u64)vf->pts)*100, 9);
3081 vf->canvas0Addr = vf->canvas1Addr =
3082 spec2canvas(&buffer_spec[buffer_index]);
3083 vf->type_original = vf->type;
3084 vfbuf_use[buffer_index]++;
3085 vf->mem_handle =
3086 decoder_bmmu_box_get_mem_handle(
3087 mm_blk_handle,
3088 VF_BUFFER_IDX(buffer_index));
3089 decoder_do_frame_check(NULL, vf);
3090 if ((error_recovery_mode_use & 2) && error) {
3091 kfifo_put(&recycle_q,
3092 (const struct vframe_s *)vf);
3093 } else {
3094 p_last_vf = vf;
3095 pts_discontinue = false;
3096 kfifo_put(&delay_display_q,
3097 (const struct vframe_s *)vf);
3098 }
3099 } else {
3100 if (pic_struct_present
3101 && pic_struct == PIC_TOP_BOT)
3102 vf->type = VIDTYPE_INTERLACE_TOP;
3103 else if (pic_struct_present
3104 && pic_struct == PIC_BOT_TOP)
3105 vf->type = VIDTYPE_INTERLACE_BOTTOM;
3106 else {
3107 vf->type =
3108 poc_sel ?
3109 VIDTYPE_INTERLACE_BOTTOM :
3110 VIDTYPE_INTERLACE_TOP;
3111 }
3112 vf->type |= VIDTYPE_VIU_NV21;
3113 vf->type |= VIDTYPE_INTERLACE_FIRST;
3114
3115 high_bandwidth |=
3116 ((codec_mm_get_total_size() < 80 * SZ_1M)
3117 & ((READ_VREG(AV_SCRATCH_N) & 0xf) == 3)
3118 & ((frame_width * frame_height) >= 1920*1080));
3119 if (high_bandwidth)
3120 vf->flag |= VFRAME_FLAG_HIGH_BANDWIDTH;
3121
3122 vf->duration >>= 1;
3123 vf->duration_pulldown = 0;
3124 vf->signal_type = video_signal_from_vui;
3125 vf->index = buffer_index;
3126 vf->pts = (pts_valid) ? pts : 0;
3127 if (pts_us64_valid == 1)
3128 vf->pts_us64 = pts_us64;
3129 else
3130 vf->pts_us64 = div64_u64(((u64)vf->pts)*100, 9);
3131 vf->canvas0Addr = vf->canvas1Addr =
3132 spec2canvas(&buffer_spec[buffer_index]);
3133 vf->type_original = vf->type;
3134 vfbuf_use[buffer_index]++;
3135 vf->ready_jiffies64 = jiffies_64;
3136 vf->mem_handle =
3137 decoder_bmmu_box_get_mem_handle(
3138 mm_blk_handle,
3139 VF_BUFFER_IDX(buffer_index));
3140 decoder_do_frame_check(NULL, vf);
3141 if ((error_recovery_mode_use & 2) && error) {
3142 kfifo_put(&recycle_q,
3143 (const struct vframe_s *)vf);
3144 continue;
3145 } else {
3146 pts_discontinue = false;
3147 kfifo_put(&delay_display_q,
3148 (const struct vframe_s *)vf);
3149 }
3150
3151 if (READ_VREG(AV_SCRATCH_F) & 2)
3152 continue;
3153
3154 if (kfifo_get(&newframe_q, &vf) == 0) {
3155 pr_info
3156 ("fatal error, no avail buffer slot.");
3157 return IRQ_HANDLED;
3158 }
3159
3160 set_frame_info(vf);
3161
3162 if (pic_struct_present
3163 && pic_struct == PIC_TOP_BOT)
3164 vf->type = VIDTYPE_INTERLACE_BOTTOM;
3165 else if (pic_struct_present
3166 && pic_struct == PIC_BOT_TOP)
3167 vf->type = VIDTYPE_INTERLACE_TOP;
3168 else {
3169 vf->type =
3170 poc_sel ?
3171 VIDTYPE_INTERLACE_TOP :
3172 VIDTYPE_INTERLACE_BOTTOM;
3173 }
3174
3175 vf->type |= VIDTYPE_VIU_NV21;
3176 vf->duration >>= 1;
3177 vf->duration_pulldown = 0;
3178 vf->signal_type = video_signal_from_vui;
3179 vf->index = buffer_index;
3180 vf->pts = 0;
3181 vf->pts_us64 = 0;
3182 vf->canvas0Addr = vf->canvas1Addr =
3183 spec2canvas(&buffer_spec[buffer_index]);
3184 vf->type_original = vf->type;
3185 vfbuf_use[buffer_index]++;
3186 if (high_bandwidth)
3187 vf->flag |= VFRAME_FLAG_HIGH_BANDWIDTH;
3188
3189 p_last_vf = vf;
3190 vf->ready_jiffies64 = jiffies_64;
3191 vf->mem_handle =
3192 decoder_bmmu_box_get_mem_handle(
3193 mm_blk_handle,
3194 VF_BUFFER_IDX(buffer_index));
3195 kfifo_put(&delay_display_q,
3196 (const struct vframe_s *)vf);
3197 }
3198 }
3199
3200 WRITE_VREG(AV_SCRATCH_0, 0);
3201 } else if ((cpu_cmd & 0xff) == 3) {
3202 vh264_running = 1;
3203 vh264_stream_switching_state = SWITCHING_STATE_ON_CMD3;
3204
3205 pr_info("Enter switching mode cmd3.\n");
3206 schedule_work(&stream_switching_work);
3207
3208 } else if ((cpu_cmd & 0xff) == 4) {
3209 vh264_running = 1;
3210 /* reserved for slice group */
3211 WRITE_VREG(AV_SCRATCH_0, 0);
3212 } else if ((cpu_cmd & 0xff) == 5) {
3213 vh264_running = 1;
3214 /* reserved for slice group */
3215 WRITE_VREG(AV_SCRATCH_0, 0);
3216 } else if ((cpu_cmd & 0xff) == 6) {
3217 vh264_running = 0;
3218 fatal_error_flag = DECODER_FATAL_ERROR_UNKNOWN;
3219 /* this is fatal error, need restart */
3220 pr_info("fatal error happend\n");
3221 amvdec_stop();
3222 if (!fatal_error_reset)
3223 schedule_work(&error_wd_work);
3224 } else if ((cpu_cmd & 0xff) == 7) {
3225 vh264_running = 0;
3226 frame_width = (READ_VREG(AV_SCRATCH_1) + 1) * 16;
3227 pr_info("Over decoder supported size, width = %d\n",
3228 frame_width);
3229 fatal_error_flag = DECODER_FATAL_ERROR_SIZE_OVERFLOW;
3230 } else if ((cpu_cmd & 0xff) == 8) {
3231 vh264_running = 0;
3232 frame_height = (READ_VREG(AV_SCRATCH_1) + 1) * 16;
3233 pr_info("Over decoder supported size, height = %d\n",
3234 frame_height);
3235 fatal_error_flag = DECODER_FATAL_ERROR_SIZE_OVERFLOW;
3236 } else if ((cpu_cmd & 0xff) == 9) {
3237 first_offset = READ_VREG(AV_SCRATCH_1);
3238 if (pts_lookup_offset_us64
3239 (PTS_TYPE_VIDEO, first_offset, &first_pts,
3240 &first_frame_size, 0,
3241 &first_pts64) == 0)
3242 first_pts_cached = true;
3243 WRITE_VREG(AV_SCRATCH_0, 0);
3244 } else if ((cpu_cmd & 0xff) == 0xa) {
3245 int b_offset;
3246 unsigned int frame_size;
3247
3248 b_offset = READ_VREG(AV_SCRATCH_2);
3249 buffer_index = READ_VREG(AV_SCRATCH_1);
3250 /*pr_info("iponly output %d b_offset %x\n",
3251 * buffer_index,b_offset);
3252 */
3253 if (kfifo_get(&newframe_q, &vf) == 0) {
3254 WRITE_VREG(AV_SCRATCH_0, 0);
3255 pr_info
3256 ("fatal error, no available buffer slot.");
3257 return IRQ_HANDLED;
3258 }
3259 if (pts_lookup_offset_us64 (PTS_TYPE_VIDEO, b_offset,
3260 &pts, &frame_size,
3261 0, &pts_us64) != 0)
3262 vf->pts_us64 = vf->pts = 0;
3263 else {
3264 vf->pts_us64 = pts_us64;
3265 vf->pts = pts;
3266 }
3267 set_frame_info(vf);
3268 vf->type = VIDTYPE_PROGRESSIVE |
3269 VIDTYPE_VIU_FIELD |
3270 VIDTYPE_VIU_NV21;
3271 vf->duration_pulldown = 0;
3272 vf->signal_type = video_signal_from_vui;
3273 vf->index = buffer_index;
3274 vf->canvas0Addr = vf->canvas1Addr =
3275 spec2canvas(&buffer_spec[buffer_index]);
3276 vf->type_original = vf->type;
3277 vf->mem_handle = decoder_bmmu_box_get_mem_handle(
3278 mm_blk_handle,
3279 VF_BUFFER_IDX(buffer_index));
3280 vfbuf_use[buffer_index]++;
3281 p_last_vf = vf;
3282 pts_discontinue = false;
3283 iponly_early_mode = 1;
3284 decoder_do_frame_check(NULL, vf);
3285 kfifo_put(&delay_display_q,
3286 (const struct vframe_s *)vf);
3287 WRITE_VREG(AV_SCRATCH_0, 0);
3288 } else if ((cpu_cmd & 0xff) == 0xB) {
3289 schedule_work(&qos_work);
3290 }
3291
3292 sei_itu35_flags = READ_VREG(AV_SCRATCH_J);
3293 if (sei_itu35_flags & (1 << 15)) { /* data ready */
3294#ifdef ENABLE_SEI_ITU_T35
3295 schedule_work(&userdata_push_work);
3296#else
3297 /* necessary if enabled itu_t35 in ucode*/
3298 WRITE_VREG(AV_SCRATCH_J, 0);
3299#endif
3300 }
3301
3302#ifdef HANDLE_H264_IRQ
3303 return IRQ_HANDLED;
3304#else
3305 return;
3306#endif
3307}
3308
3309static void vh264_set_clk(struct work_struct *work)
3310{
3311 int fps = 96000 / frame_dur;
3312
3313 if (frame_dur < 10) /*dur is too small ,think it errors fps*/
3314 fps = 60;
3315 saved_resolution = frame_width * frame_height * fps;
3316 vdec_source_changed(VFORMAT_H264,
3317 frame_width, frame_height, fps);
3318}
3319
3320static void vh264_put_timer_func(unsigned long arg)
3321{
3322 struct timer_list *timer = (struct timer_list *)arg;
3323 unsigned int wait_buffer_status;
3324 unsigned int wait_i_pass_frames;
3325 unsigned int reg_val;
3326
3327 enum receviver_start_e state = RECEIVER_INACTIVE;
3328
3329 if (vh264_reset) {
3330 pr_info("operation forbidden in timer !\n");
3331 goto exit;
3332 }
3333
3334 prepare_display_q();
3335
3336 if (vf_get_receiver(PROVIDER_NAME)) {
3337 state =
3338 vf_notify_receiver(PROVIDER_NAME,
3339 VFRAME_EVENT_PROVIDER_QUREY_STATE,
3340 NULL);
3341 if ((state == RECEIVER_STATE_NULL)
3342 || (state == RECEIVER_STATE_NONE)) {
3343 /* receiver has no event_cb or receiver's
3344 * event_cb does not process this event
3345 */
3346 state = RECEIVER_INACTIVE;
3347 }
3348 } else
3349 state = RECEIVER_INACTIVE;
3350#ifndef HANDLE_H264_IRQ
3351 vh264_isr();
3352#endif
3353
3354 if (vh264_stream_switching_state != SWITCHING_STATE_OFF)
3355 wait_buffer_counter = 0;
3356 else {
3357 reg_val = READ_VREG(AV_SCRATCH_9);
3358 wait_buffer_status = reg_val & (1 << 31);
3359 wait_i_pass_frames = reg_val & 0xff;
3360 if (wait_buffer_status) {
3361 if (kfifo_is_empty(&display_q) &&
3362 kfifo_is_empty(&delay_display_q) &&
3363 kfifo_is_empty(&recycle_q) &&
3364 (state == RECEIVER_INACTIVE)) {
3365 pr_info("$$$$decoder is waiting for buffer\n");
3366 if (++wait_buffer_counter > 4) {
3367 amvdec_stop();
3368 schedule_work(&error_wd_work);
3369 }
3370 } else
3371 wait_buffer_counter = 0;
3372 } else if (wait_i_pass_frames > 1000) {
3373 pr_info("i passed frames > 1000\n");
3374 amvdec_stop();
3375 schedule_work(&error_wd_work);
3376 }
3377 }
3378
3379#if 0
3380 if (!wait_buffer_status) {
3381 if (vh264_no_disp_count++ > NO_DISP_WD_COUNT) {
3382 pr_info("$$$decoder did not send frame out\n");
3383 amvdec_stop();
3384#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER
3385 vh264_ppmgr_reset();
3386#else
3387 vf_light_unreg_provider(PROVIDER_NAME);
3388 vh264_local_init();
3389 vf_reg_provider(vh264_vf_prov);
3390#endif
3391 vh264_prot_init();
3392 amvdec_start();
3393
3394 vh264_no_disp_count = 0;
3395 vh264_no_disp_wd_count++;
3396 }
3397 }
3398#endif
3399
3400 while (!kfifo_is_empty(&recycle_q) &&
3401 ((READ_VREG(AV_SCRATCH_7) == 0)
3402 || (READ_VREG(AV_SCRATCH_8) == 0))
3403 && (vh264_stream_switching_state == SWITCHING_STATE_OFF)) {
3404 struct vframe_s *vf;
3405
3406 if (kfifo_get(&recycle_q, &vf)) {
3407 if (vf->index < VF_BUF_NUM) {
3408 if (--vfbuf_use[vf->index] == 0) {
3409 if (READ_VREG(AV_SCRATCH_7) == 0) {
3410 WRITE_VREG(AV_SCRATCH_7,
3411 vf->index + 1);
3412 } else {
3413 WRITE_VREG(AV_SCRATCH_8,
3414 vf->index + 1);
3415 }
3416 }
3417
3418 vf->index = VF_BUF_NUM;
3419 kfifo_put(&newframe_q,
3420 (const struct vframe_s *)vf);
3421 }
3422 }
3423 }
3424
3425 if (vh264_stream_switching_state != SWITCHING_STATE_OFF) {
3426 while (!kfifo_is_empty(&recycle_q)) {
3427 struct vframe_s *vf;
3428
3429 if (kfifo_get(&recycle_q, &vf)) {
3430 if (vf->index < VF_BUF_NUM) {
3431 vf->index = VF_BUF_NUM;
3432 kfifo_put(&newframe_q,
3433 (const struct vframe_s *)vf);
3434 }
3435 }
3436 }
3437
3438 WRITE_VREG(AV_SCRATCH_7, 0);
3439 WRITE_VREG(AV_SCRATCH_8, 0);
3440
3441 if (kfifo_len(&newframe_q) == VF_POOL_SIZE)
3442 stream_switching_done();
3443 }
3444
3445 if (ucode_type != UCODE_IP_ONLY_PARAM &&
3446 (clk_adj_frame_count > VDEC_CLOCK_ADJUST_FRAME) &&
3447 frame_dur > 0 && saved_resolution !=
3448 frame_width * frame_height * (96000 / frame_dur))
3449 schedule_work(&set_clk_work);
3450
3451exit:
3452 timer->expires = jiffies + PUT_INTERVAL;
3453
3454 add_timer(timer);
3455}
3456
3457int vh264_dec_status(struct vdec_s *vdec, struct vdec_info *vstatus)
3458{
3459 u32 ratio_control;
3460 u32 ar;
3461
3462 if (!(stat & STAT_VDEC_RUN))
3463 return -1;
3464
3465 vstatus->frame_width = frame_width;
3466 vstatus->frame_height = frame_height;
3467 if (frame_dur != 0)
3468 vstatus->frame_rate = 96000 / frame_dur;
3469 else
3470 vstatus->frame_rate = -1;
3471 vstatus->error_count = READ_VREG(AV_SCRATCH_D);
3472 vstatus->status = stat;
3473 if (fatal_error_reset)
3474 vstatus->status |= fatal_error_flag;
3475 vstatus->bit_rate = gvs->bit_rate;
3476 vstatus->frame_dur = frame_dur;
3477 vstatus->frame_data = gvs->frame_data;
3478 vstatus->total_data = gvs->total_data;
3479 vstatus->frame_count = gvs->frame_count;
3480 vstatus->error_frame_count = gvs->error_frame_count;
3481 vstatus->drop_frame_count = gvs->drop_frame_count;
3482 vstatus->total_data = gvs->total_data;
3483 vstatus->samp_cnt = gvs->samp_cnt;
3484 vstatus->offset = gvs->offset;
3485 ar = min_t(u32,
3486 h264_ar,
3487 DISP_RATIO_ASPECT_RATIO_MAX);
3488 ratio_control =
3489 ar << DISP_RATIO_ASPECT_RATIO_BIT;
3490 vstatus->ratio_control = ratio_control;
3491
3492 snprintf(vstatus->vdec_name, sizeof(vstatus->vdec_name),
3493 "%s", DRIVER_NAME);
3494
3495 return 0;
3496}
3497
3498static int vh264_vdec_info_init(void)
3499{
3500 gvs = kzalloc(sizeof(struct vdec_info), GFP_KERNEL);
3501 if (NULL == gvs) {
3502 pr_info("the struct of vdec status malloc failed.\n");
3503 return -ENOMEM;
3504 }
3505 return 0;
3506}
3507
3508int vh264_set_trickmode(struct vdec_s *vdec, unsigned long trickmode)
3509{
3510 if (trickmode == TRICKMODE_I) {
3511 WRITE_VREG(AV_SCRATCH_F,
3512 (READ_VREG(AV_SCRATCH_F) & 0xfffffffc) | 2);
3513 trickmode_i = 1;
3514 } else if (trickmode == TRICKMODE_NONE) {
3515 WRITE_VREG(AV_SCRATCH_F, READ_VREG(AV_SCRATCH_F) & 0xfffffffc);
3516 trickmode_i = 0;
3517 }
3518
3519 return 0;
3520}
3521
3522int vh264_set_isreset(struct vdec_s *vdec, int isreset)
3523{
3524 is_reset = isreset;
3525 return 0;
3526}
3527
3528static void vh264_prot_init(void)
3529{
3530 ulong timeout = jiffies + HZ;
3531
3532 while (READ_VREG(DCAC_DMA_CTRL) & 0x8000) {
3533 if (time_after(jiffies, timeout)) {
3534 pr_info("%s DCAC_DMA_CTRL time out\n", __func__);
3535 break;
3536 }
3537 }
3538
3539 timeout = jiffies + HZ;
3540 while (READ_VREG(LMEM_DMA_CTRL) & 0x8000) {
3541 if (time_after(jiffies, timeout)) {
3542 pr_info("%s LMEM_DMA_CTRL time out\n", __func__);
3543 break;
3544 }
3545 }
3546
3547#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */
3548 WRITE_VREG(DOS_SW_RESET0, (1 << 7) | (1 << 6) | (1 << 4));
3549 WRITE_VREG(DOS_SW_RESET0, 0);
3550
3551 READ_VREG(DOS_SW_RESET0);
3552 READ_VREG(DOS_SW_RESET0);
3553 READ_VREG(DOS_SW_RESET0);
3554
3555 WRITE_VREG(DOS_SW_RESET0, (1 << 7) | (1 << 6) | (1 << 4));
3556 WRITE_VREG(DOS_SW_RESET0, 0);
3557
3558 WRITE_VREG(DOS_SW_RESET0, (1 << 9) | (1 << 8));
3559 WRITE_VREG(DOS_SW_RESET0, 0);
3560
3561 READ_VREG(DOS_SW_RESET0);
3562 READ_VREG(DOS_SW_RESET0);
3563 READ_VREG(DOS_SW_RESET0);
3564
3565#else
3566 WRITE_RESET_REG(RESET0_REGISTER,
3567 RESET_IQIDCT | RESET_MC | RESET_VLD_PART);
3568 READ_RESET_REG(RESET0_REGISTER);
3569 WRITE_RESET_REG(RESET0_REGISTER,
3570 RESET_IQIDCT | RESET_MC | RESET_VLD_PART);
3571
3572 WRITE_RESET_REG(RESET2_REGISTER, RESET_PIC_DC | RESET_DBLK);
3573#endif
3574
3575 WRITE_VREG(POWER_CTL_VLD,
3576 READ_VREG(POWER_CTL_VLD) |
3577 (0 << 10) | (1 << 9) | (1 << 6));
3578
3579 /* disable PSCALE for hardware sharing */
3580 WRITE_VREG(PSCALE_CTRL, 0);
3581
3582 WRITE_VREG(AV_SCRATCH_0, 0);
3583 WRITE_VREG(AV_SCRATCH_1, buf_offset);
3584 if (!tee_enabled())
3585 WRITE_VREG(AV_SCRATCH_G, mc_dma_handle);
3586 WRITE_VREG(AV_SCRATCH_7, 0);
3587 WRITE_VREG(AV_SCRATCH_8, 0);
3588 WRITE_VREG(AV_SCRATCH_9, 0);
3589 WRITE_VREG(AV_SCRATCH_N, 0);
3590
3591#ifdef SUPPORT_BAD_MACRO_BLOCK_REDUNDANCY
3592 if (bad_block_scale > 128)
3593 bad_block_scale = 128;
3594 WRITE_VREG(AV_SCRATCH_A, bad_block_scale);
3595#endif
3596
3597 error_recovery_mode_use =
3598 (error_recovery_mode !=
3599 0) ? error_recovery_mode : error_recovery_mode_in;
3600 WRITE_VREG(AV_SCRATCH_F,
3601 (READ_VREG(AV_SCRATCH_F) & 0xffffffc3) |
3602 (READ_VREG(AV_SCRATCH_F) & 0xffffff43) |
3603 ((error_recovery_mode_use & 0x1) << 4));
3604 if (dec_control & DEC_CONTROL_FLAG_DISABLE_FAST_POC)
3605 SET_VREG_MASK(AV_SCRATCH_F, 1 << 7);
3606 /* clear mailbox interrupt */
3607 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
3608
3609 /* enable mailbox interrupt */
3610 WRITE_VREG(ASSIST_MBOX1_MASK, 1);
3611
3612 SET_VREG_MASK(MDEC_PIC_DC_CTRL, 1 << 17);
3613 if (ucode_type == UCODE_IP_ONLY_PARAM)
3614 SET_VREG_MASK(AV_SCRATCH_F, 1 << 6);
3615 else
3616 CLEAR_VREG_MASK(AV_SCRATCH_F, 1 << 6);
3617
3618 WRITE_VREG(AV_SCRATCH_I, (u32)(sei_data_buffer_phys - buf_offset));
3619 WRITE_VREG(AV_SCRATCH_J, 0);
3620 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
3621 if ((get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) && !is_meson_mtvd_cpu()) {
3622 /* pr_info("vh264 meson8 prot init\n"); */
3623 WRITE_VREG(MDEC_PIC_DC_THRESH, 0x404038aa);
3624 }
3625 /* #endif */
3626}
3627
3628static int vh264_local_init(void)
3629{
3630 int i, ret;
3631 u32 size;
3632 unsigned long buf_start;
3633 vh264_ratio = vh264_amstream_dec_info.ratio;
3634 /* vh264_ratio = 0x100; */
3635
3636 vh264_rotation = (((unsigned long) vh264_amstream_dec_info.param)
3637 >> 16) & 0xffff;
3638
3639 frame_prog = 0;
3640 frame_width = vh264_amstream_dec_info.width;
3641 frame_height = vh264_amstream_dec_info.height;
3642 frame_dur = vh264_amstream_dec_info.rate;
3643 pts_outside = ((unsigned long) vh264_amstream_dec_info.param) & 0x01;
3644 sync_outside = ((unsigned long) vh264_amstream_dec_info.param & 0x02)
3645 >> 1;
3646 use_idr_framerate = ((unsigned long) vh264_amstream_dec_info.param
3647 & 0x04) >> 2;
3648 max_refer_buf = !(((unsigned long) vh264_amstream_dec_info.param
3649 & 0x10) >> 4);
3650 if (!vh264_reset) {
3651 if (mm_blk_handle) {
3652 decoder_bmmu_box_free(mm_blk_handle);
3653 mm_blk_handle = NULL;
3654 }
3655
3656 mm_blk_handle = decoder_bmmu_box_alloc_box(
3657 DRIVER_NAME,
3658 0,
3659 MAX_BLK_BUFFERS,
3660 4 + PAGE_SHIFT,
3661 CODEC_MM_FLAGS_CMA_CLEAR |
3662 CODEC_MM_FLAGS_FOR_VDECODER |
3663 tvp_flag);
3664 }
3665 pr_info
3666 ("H264 sysinfo: %dx%d duration=%d, pts_outside=%d \n",
3667 frame_width, frame_height, frame_dur, pts_outside);
3668 pr_debug("sync_outside=%d, use_idr_framerate=%d\n",
3669 sync_outside, use_idr_framerate);
3670
3671 if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB)
3672 size = V_BUF_ADDR_OFFSET_NEW;
3673 else
3674 size = V_BUF_ADDR_OFFSET;
3675
3676 ret = decoder_bmmu_box_alloc_buf_phy(mm_blk_handle, 0,
3677 size, DRIVER_NAME, &buf_start);
3678 if (ret < 0)
3679 return ret;
3680
3681 buf_offset = buf_start - DEF_BUF_START_ADDR;
3682
3683 if ((unsigned long) vh264_amstream_dec_info.param & 0x08)
3684 ucode_type = UCODE_IP_ONLY_PARAM;
3685 else
3686 ucode_type = 0;
3687
3688 if ((unsigned long) vh264_amstream_dec_info.param & 0x20)
3689 error_recovery_mode_in = 1;
3690 else
3691 error_recovery_mode_in = 3;
3692
3693 if (!vh264_running) {
3694 last_mb_width = 0;
3695 last_mb_height = 0;
3696 }
3697
3698 for (i = 0; i < VF_BUF_NUM; i++)
3699 vfbuf_use[i] = 0;
3700
3701 INIT_KFIFO(display_q);
3702 INIT_KFIFO(delay_display_q);
3703 INIT_KFIFO(recycle_q);
3704 INIT_KFIFO(newframe_q);
3705
3706 for (i = 0; i < VF_POOL_SIZE; i++) {
3707 const struct vframe_s *vf = &vfpool[i];
3708
3709 vfpool[i].index = VF_BUF_NUM;
3710 vfpool[i].bufWidth = 1920;
3711 kfifo_put(&newframe_q, vf);
3712 }
3713
3714#ifdef DROP_B_FRAME_FOR_1080P_50_60FPS
3715 last_interlaced = 1;
3716#endif
3717 h264_first_pts_ready = 0;
3718 h264_first_valid_pts_ready = false;
3719 h264pts1 = 0;
3720 h264pts2 = 0;
3721 h264_pts_count = 0;
3722 duration_from_pts_done = 0;
3723 vh264_error_count = READ_VREG(AV_SCRATCH_D);
3724
3725 p_last_vf = NULL;
3726 check_pts_discontinue = false;
3727 last_pts = 0;
3728 wait_buffer_counter = 0;
3729 vh264_no_disp_count = 0;
3730 fatal_error_flag = 0;
3731 high_bandwidth = 0;
3732 vh264_stream_switching_state = SWITCHING_STATE_OFF;
3733#ifdef DEBUG_PTS
3734 pts_missed = 0;
3735 pts_hit = 0;
3736#endif
3737 pts_discontinue = false;
3738 no_idr_error_count = 0;
3739
3740 vh264_reset_userdata_fifo(vdec_h264, 1);
3741 h264_reset_qos_mgr();
3742
3743 if (enable_switch_fense) {
3744 for (i = 0; i < ARRAY_SIZE(fense_buffer_spec); i++) {
3745 struct buffer_spec_s *s = &fense_buffer_spec[i];
3746 s->alloc_count = 3 * SZ_1M / PAGE_SIZE;
3747 ret = decoder_bmmu_box_alloc_buf_phy(mm_blk_handle,
3748 FENSE_BUFFER_IDX(i),
3749 3 * SZ_1M, DRIVER_NAME, &s->phy_addr);
3750
3751 if (ret < 0) {
3752 fatal_error_flag =
3753 DECODER_FATAL_ERROR_NO_MEM;
3754 vh264_running = 0;
3755 return ret;
3756 }
3757 s->y_canvas_index = 2 * i;
3758 s->u_canvas_index = 2 * i + 1;
3759 s->v_canvas_index = 2 * i + 1;
3760 }
3761 }
3762 return 0;
3763}
3764
3765static s32 vh264_init(void)
3766{
3767 int ret = 0;
3768 int trickmode_fffb = 0;
3769 int firmwareloaded = 0;
3770
3771 /* pr_info("\nvh264_init\n"); */
3772 init_timer(&recycle_timer);
3773
3774 stat |= STAT_TIMER_INIT;
3775
3776 vh264_running = 0;/* init here to reset last_mb_width&last_mb_height */
3777 vh264_eos = 0;
3778 duration_on_correcting = 0;
3779 first_pts = 0;
3780 first_pts64 = 0;
3781 first_offset = 0;
3782 first_pts_cached = false;
3783 fixed_frame_rate_check_count = 0;
3784 fr_hint_status = VDEC_NO_NEED_HINT;
3785 saved_resolution = 0;
3786 iponly_early_mode = 0;
3787 saved_idc_level = 0;
3788
3789 frame_count = 0;
3790 memset(&s_vframe_qos, 0, sizeof(s_vframe_qos));
3791 /*init vdec status*/
3792 ret = vh264_vdec_info_init();
3793 if (0 != ret)
3794 return -ret;
3795
3796 ret = vh264_local_init();
3797 if (ret < 0)
3798 return ret;
3799 query_video_status(0, &trickmode_fffb);
3800
3801 amvdec_enable();
3802 if (!firmwareloaded && tee_enabled()) {
3803 ret = amvdec_loadmc_ex(VFORMAT_H264, NULL, NULL);
3804 if (ret < 0) {
3805 amvdec_disable();
3806 pr_err("H264: the %s fw loading failed, err: %x\n",
3807 tee_enabled() ? "TEE" : "local", ret);
3808 return ret;
3809 }
3810 } else {
3811 /* -- ucode loading (amrisc and swap code) */
3812 mc_cpu_addr =
3813 dma_alloc_coherent(amports_get_dma_device(), MC_TOTAL_SIZE,
3814 &mc_dma_handle, GFP_KERNEL);
3815 if (!mc_cpu_addr) {
3816 amvdec_disable();
3817 del_timer_sync(&recycle_timer);
3818 pr_err("vh264_init: Can not allocate mc memory.\n");
3819 return -ENOMEM;
3820 }
3821
3822 pr_debug("264 ucode swap area: phyaddr %p, cpu vaddr %p\n",
3823 (void *)mc_dma_handle, mc_cpu_addr);
3824 if (debugfirmware) {
3825 int r0, r1, r2, r3, r4, r5;
3826 char firmwarename[32];
3827
3828 pr_debug("start load debug %d firmware ...\n", debugfirmware);
3829
3830 snprintf(firmwarename, 32, "%s%d", "vh264_mc", debugfirmware);
3831 r0 = amvdec_loadmc_ex(VFORMAT_H264, firmwarename, NULL);
3832
3833#define DEBUGGET_FW(t, name, buf, size, ret)\
3834 do {\
3835 snprintf(firmwarename, 32, "%s%d", name,\
3836 debugfirmware);\
3837 ret = get_decoder_firmware_data(t,\
3838 firmwarename, buf, size);\
3839 } while (0)
3840 /*memcpy((u8 *) mc_cpu_addr + MC_OFFSET_HEADER, vh264_header_mc,
3841 *MC_SWAP_SIZE);
3842 */
3843 DEBUGGET_FW(VFORMAT_H264, "vh264_header_mc",
3844 (u8 *) mc_cpu_addr + MC_OFFSET_HEADER,
3845 MC_SWAP_SIZE, r1);
3846
3847 /*memcpy((u8 *) mc_cpu_addr + MC_OFFSET_DATA, vh264_data_mc,
3848 *MC_SWAP_SIZE);
3849 */
3850 DEBUGGET_FW(VFORMAT_H264, "vh264_data_mc",
3851 (u8 *) mc_cpu_addr + MC_OFFSET_DATA, MC_SWAP_SIZE, r2);
3852 /*memcpy((u8 *) mc_cpu_addr + MC_OFFSET_MMCO, vh264_mmco_mc,
3853 *MC_SWAP_SIZE);
3854 */
3855 DEBUGGET_FW(VFORMAT_H264, "vh264_mmco_mc",
3856 (u8 *) mc_cpu_addr + MC_OFFSET_MMCO, MC_SWAP_SIZE, r3);
3857 /*memcpy((u8 *) mc_cpu_addr + MC_OFFSET_LIST, vh264_list_mc,
3858 *MC_SWAP_SIZE);
3859 */
3860 DEBUGGET_FW(VFORMAT_H264, "vh264_list_mc",
3861 (u8 *) mc_cpu_addr + MC_OFFSET_LIST, MC_SWAP_SIZE, r4);
3862 /*memcpy((u8 *) mc_cpu_addr + MC_OFFSET_SLICE, vh264_slice_mc,
3863 *MC_SWAP_SIZE);
3864 */
3865 DEBUGGET_FW(VFORMAT_H264, "vh264_slice_mc",
3866 (u8 *) mc_cpu_addr + MC_OFFSET_SLICE, MC_SWAP_SIZE, r5);
3867
3868 if (r0 < 0 || r1 < 0 || r2 < 0 || r3 < 0 || r4 < 0 || r5 < 0) {
3869 pr_err("264 load debugfirmware err %d,%d,%d,%d,%d,%d\n",
3870 r0, r1, r2, r3, r4, r5);
3871 amvdec_disable();
3872 if (mc_cpu_addr) {
3873 dma_free_coherent(amports_get_dma_device(),
3874 MC_TOTAL_SIZE, mc_cpu_addr,
3875 mc_dma_handle);
3876 mc_cpu_addr = NULL;
3877 }
3878 return -EBUSY;
3879 }
3880 firmwareloaded = 1;
3881 } else {
3882 int ret = -1;
3883 char *buf = vmalloc(0x1000 * 16);
3884
3885 if (IS_ERR_OR_NULL(buf))
3886 return -ENOMEM;
3887
3888 if (get_firmware_data(VIDEO_DEC_H264, buf) < 0) {
3889 pr_err("get firmware fail.");
3890 vfree(buf);
3891 return -1;
3892 }
3893
3894 ret = amvdec_loadmc_ex(VFORMAT_H264, NULL, buf);
3895 memcpy((u8 *) mc_cpu_addr + MC_OFFSET_HEADER,
3896 buf + 0x4000, MC_SWAP_SIZE);
3897 memcpy((u8 *) mc_cpu_addr + MC_OFFSET_DATA,
3898 buf + 0x2000, MC_SWAP_SIZE);
3899 memcpy((u8 *) mc_cpu_addr + MC_OFFSET_MMCO,
3900 buf + 0x6000, MC_SWAP_SIZE);
3901 memcpy((u8 *) mc_cpu_addr + MC_OFFSET_LIST,
3902 buf + 0x3000, MC_SWAP_SIZE);
3903 memcpy((u8 *) mc_cpu_addr + MC_OFFSET_SLICE,
3904 buf + 0x5000, MC_SWAP_SIZE);
3905
3906 vfree(buf);
3907
3908 if (ret < 0) {
3909 amvdec_disable();
3910 if (mc_cpu_addr) {
3911 dma_free_coherent(amports_get_dma_device(),
3912 MC_TOTAL_SIZE, mc_cpu_addr,
3913 mc_dma_handle);
3914 mc_cpu_addr = NULL;
3915 }
3916 pr_err("H264: the %s fw loading failed, err: %x\n",
3917 tee_enabled() ? "TEE" : "local", ret);
3918 return -EBUSY;
3919 }
3920 }
3921 }
3922
3923 stat |= STAT_MC_LOAD;
3924
3925 /* enable AMRISC side protocol */
3926 vh264_prot_init();
3927
3928#ifdef HANDLE_H264_IRQ
3929 /*TODO irq */
3930
3931 if (vdec_request_irq(VDEC_IRQ_1, vh264_isr,
3932 "vh264-irq", (void *)vh264_dec_id)) {
3933 pr_err("vh264 irq register error.\n");
3934 amvdec_disable();
3935 return -ENOENT;
3936 }
3937#endif
3938
3939 stat |= STAT_ISR_REG;
3940
3941#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER
3942 vf_provider_init(&vh264_vf_prov, PROVIDER_NAME, &vh264_vf_provider_ops,
3943 NULL);
3944 vf_reg_provider(&vh264_vf_prov);
3945 vf_notify_receiver(PROVIDER_NAME, VFRAME_EVENT_PROVIDER_START, NULL);
3946#else
3947 vf_provider_init(&vh264_vf_prov, PROVIDER_NAME, &vh264_vf_provider_ops,
3948 NULL);
3949 vf_reg_provider(&vh264_vf_prov);
3950#endif
3951
3952 if (frame_dur != 0) {
3953 if (!is_reset) {
3954 vf_notify_receiver(PROVIDER_NAME,
3955 VFRAME_EVENT_PROVIDER_FR_HINT,
3956 (void *)((unsigned long)frame_dur));
3957 fr_hint_status = VDEC_HINTED;
3958 }
3959 } else
3960 fr_hint_status = VDEC_NEED_HINT;
3961
3962 stat |= STAT_VF_HOOK;
3963
3964 recycle_timer.data = (ulong) &recycle_timer;
3965 recycle_timer.function = vh264_put_timer_func;
3966 recycle_timer.expires = jiffies + PUT_INTERVAL;
3967
3968 add_timer(&recycle_timer);
3969
3970 stat |= STAT_TIMER_ARM;
3971
3972 vh264_stream_switching_state = SWITCHING_STATE_OFF;
3973
3974 stat |= STAT_VDEC_RUN;
3975 wmb(); /* Ensure fetchbuf contents visible */
3976
3977 /* -- start decoder */
3978 amvdec_start();
3979
3980 init_userdata_fifo();
3981
3982 return 0;
3983}
3984
3985static int vh264_stop(int mode)
3986{
3987
3988
3989 if (stat & STAT_VDEC_RUN) {
3990 amvdec_stop();
3991 stat &= ~STAT_VDEC_RUN;
3992 }
3993
3994 if (stat & STAT_ISR_REG) {
3995 WRITE_VREG(ASSIST_MBOX1_MASK, 0);
3996 /*TODO irq */
3997
3998 vdec_free_irq(VDEC_IRQ_1, (void *)vh264_dec_id);
3999
4000 stat &= ~STAT_ISR_REG;
4001 }
4002
4003 if (stat & STAT_TIMER_ARM) {
4004 del_timer_sync(&recycle_timer);
4005 stat &= ~STAT_TIMER_ARM;
4006 }
4007
4008 if (stat & STAT_VF_HOOK) {
4009 if (mode == MODE_FULL) {
4010 if (fr_hint_status == VDEC_HINTED)
4011 vf_notify_receiver(PROVIDER_NAME,
4012 VFRAME_EVENT_PROVIDER_FR_END_HINT,
4013 NULL);
4014 fr_hint_status = VDEC_NO_NEED_HINT;
4015 }
4016
4017 vf_unreg_provider(&vh264_vf_prov);
4018 stat &= ~STAT_VF_HOOK;
4019 }
4020
4021 if (stat & STAT_MC_LOAD) {
4022 if (mc_cpu_addr != NULL) {
4023 dma_free_coherent(amports_get_dma_device(),
4024 MC_TOTAL_SIZE, mc_cpu_addr,
4025 mc_dma_handle);
4026 mc_cpu_addr = NULL;
4027 }
4028 }
4029 if (sei_data_buffer != NULL) {
4030 dma_free_coherent(
4031 amports_get_dma_device(),
4032 USER_DATA_RUND_SIZE,
4033 sei_data_buffer,
4034 sei_data_buffer_phys);
4035 sei_data_buffer = NULL;
4036 sei_data_buffer_phys = 0;
4037 }
4038 amvdec_disable();
4039 if (mm_blk_handle) {
4040 decoder_bmmu_box_free(mm_blk_handle);
4041 mm_blk_handle = NULL;
4042 }
4043 memset(&fense_buffer_spec, 0, sizeof(fense_buffer_spec));
4044 memset(&buffer_spec, 0, sizeof(buffer_spec));
4045 return 0;
4046}
4047
4048static void wait_vh264_search_done(void)
4049{
4050 u32 vld_rp = READ_VREG(VLD_MEM_VIFIFO_RP);
4051 int count = 0;
4052 do {
4053 usleep_range(100, 500);
4054 if (vld_rp == READ_VREG(VLD_MEM_VIFIFO_RP))
4055 break;
4056 if (count > 2000) {
4057 pr_info("%s, timeout count %d vld_rp 0x%x VLD_MEM_VIFIFO_RP 0x%x\n",
4058 __func__, count, vld_rp, READ_VREG(VLD_MEM_VIFIFO_RP));
4059 break;
4060 } else
4061 vld_rp = READ_VREG(VLD_MEM_VIFIFO_RP);
4062 count++;
4063 } while (1);
4064}
4065
4066
4067static void error_do_work(struct work_struct *work)
4068{
4069
4070 /*
4071 * we need to lock vh264_stop/vh264_init.
4072 * because we will call amvdec_h264_remove on this step;
4073 * then we may call more than once on
4074 * free_irq/deltimer/..and some other.
4075 */
4076 if (atomic_read(&vh264_active)) {
4077 amvdec_stop();
4078 do {
4079 msleep(50);
4080 } while (vh264_stream_switching_state != SWITCHING_STATE_OFF);
4081 wait_vh264_search_done();
4082 vh264_reset = 1;
4083#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER
4084 vh264_ppmgr_reset();
4085#else
4086 vf_light_unreg_provider(&vh264_vf_prov);
4087
4088 vh264_local_init();
4089
4090 vf_reg_provider(&vh264_vf_prov);
4091#endif
4092 vh264_prot_init();
4093 amvdec_start();
4094 vh264_reset = 0;
4095 }
4096}
4097
4098static void stream_switching_done(void)
4099{
4100 int state = vh264_stream_switching_state;
4101
4102 WRITE_VREG(AV_SCRATCH_7, 0);
4103 WRITE_VREG(AV_SCRATCH_8, 0);
4104 WRITE_VREG(AV_SCRATCH_9, 0);
4105
4106 if (state == SWITCHING_STATE_ON_CMD1) {
4107 pr_info("Enter set parameter cmd1 switching_state %x.\n",
4108 vh264_stream_switching_state);
4109 schedule_work(&set_parameter_work);
4110 return;
4111 } else if (state == SWITCHING_STATE_ON_CMD1_PENDING)
4112 return;
4113
4114 vh264_stream_switching_state = SWITCHING_STATE_OFF;
4115
4116 wmb(); /* Ensure fetchbuf contents visible */
4117
4118 if (state == SWITCHING_STATE_ON_CMD3)
4119 WRITE_VREG(AV_SCRATCH_0, 0);
4120
4121 pr_info("Leaving switching mode.\n");
4122}
4123
4124/* construt a new frame as a copy of last frame so frame receiver can
4125 * release all buffer resources to decoder.
4126 */
4127static void stream_switching_do(struct work_struct *work)
4128{
4129 int mb_total_num, mb_width_num, mb_height_num, i = 0;
4130 struct vframe_s *vf = NULL;
4131 u32 y_index, u_index, src_index, des_index, y_desindex, u_desindex;
4132 struct canvas_s csy, csu, cyd;
4133 unsigned long flags;
4134 bool delay = true;
4135
4136 if (!atomic_read(&vh264_active))
4137 return;
4138
4139 if (vh264_stream_switching_state == SWITCHING_STATE_OFF)
4140 return;
4141
4142 spin_lock_irqsave(&prepare_lock, flags);
4143
4144 block_display_q = true;
4145
4146 spin_unlock_irqrestore(&prepare_lock, flags);
4147
4148 mb_total_num = mb_total;
4149 mb_width_num = mb_width;
4150 mb_height_num = mb_height;
4151
4152 while (is_4k || kfifo_len(&delay_display_q) > 2) {
4153 if (kfifo_get(&delay_display_q, &vf)) {
4154 kfifo_put(&display_q,
4155 (const struct vframe_s *)vf);
4156 ATRACE_COUNTER(MODULE_NAME, vf->pts);
4157 vf_notify_receiver(PROVIDER_NAME,
4158 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
4159 } else
4160 break;
4161 }
4162
4163 if (!kfifo_get(&delay_display_q, &vf)) {
4164 vf = p_last_vf;
4165 delay = false;
4166 }
4167
4168 while (vf) {
4169 int buffer_index;
4170
4171 buffer_index = vf->index & 0xff;
4172
4173 /* construct a clone of the frame from last frame */
4174
4175#if 0
4176
4177 pr_info("src yaddr[0x%x] index[%d] width[%d] heigth[%d]\n",
4178 buffer_spec[buffer_index].y_addr,
4179 buffer_spec[buffer_index].y_canvas_index,
4180 buffer_spec[buffer_index].y_canvas_width,
4181 buffer_spec[buffer_index].y_canvas_height);
4182
4183 pr_info("src uaddr[0x%x] index[%d] width[%d] heigth[%d]\n",
4184 buffer_spec[buffer_index].u_addr,
4185 buffer_spec[buffer_index].u_canvas_index,
4186 buffer_spec[buffer_index].u_canvas_width,
4187 buffer_spec[buffer_index].u_canvas_height);
4188#endif
4189 if (EN_SWITCH_FENCE()) {
4190 y_index = buffer_spec[buffer_index].y_canvas_index;
4191 u_index = buffer_spec[buffer_index].u_canvas_index;
4192
4193 canvas_read(y_index, &csy);
4194 canvas_read(u_index, &csu);
4195
4196 canvas_config(fense_buffer_spec[i].y_canvas_index,
4197 fense_buffer_spec[i].phy_addr,
4198 mb_width_num << 4, mb_height_num << 4,
4199 CANVAS_ADDR_NOWRAP,
4200 CANVAS_BLKMODE_LINEAR);
4201 canvas_config(fense_buffer_spec[i].u_canvas_index,
4202 fense_buffer_spec[i].phy_addr +
4203 (mb_total_num << 8),
4204 mb_width_num << 4, mb_height_num << 3,
4205 CANVAS_ADDR_NOWRAP,
4206 CANVAS_BLKMODE_LINEAR);
4207
4208 y_desindex = fense_buffer_spec[i].y_canvas_index;
4209 u_desindex = fense_buffer_spec[i].u_canvas_index;
4210
4211 canvas_read(y_desindex, &cyd);
4212
4213 src_index = ((y_index & 0xff) |
4214 ((u_index << 8) & 0x0000ff00));
4215 des_index = ((y_desindex & 0xff) |
4216 ((u_desindex << 8) & 0x0000ff00));
4217
4218 ge2d_canvas_dup(&csy, &csu, &cyd,
4219 GE2D_FORMAT_M24_NV21,
4220 src_index,
4221 des_index);
4222 }
4223 vf->mem_handle = decoder_bmmu_box_get_mem_handle(
4224 mm_blk_handle,
4225 FENSE_BUFFER_IDX(i));
4226 fense_vf[i] = *vf;
4227 fense_vf[i].index = -1;
4228
4229 if (EN_SWITCH_FENCE())
4230 fense_vf[i].canvas0Addr =
4231 spec2canvas(&fense_buffer_spec[i]);
4232 else
4233 fense_vf[i].flag |= VFRAME_FLAG_SWITCHING_FENSE;
4234
4235 /* send clone to receiver */
4236 kfifo_put(&display_q,
4237 (const struct vframe_s *)&fense_vf[i]);
4238 ATRACE_COUNTER(MODULE_NAME, fense_vf[i].pts);
4239 /* early recycle frames for last session */
4240 if (delay)
4241 vh264_vf_put(vf, NULL);
4242
4243 vf_notify_receiver(PROVIDER_NAME,
4244 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
4245
4246 i++;
4247
4248 if (!kfifo_get(&delay_display_q, &vf))
4249 break;
4250 }
4251
4252 block_display_q = false;
4253
4254 pr_info("Switching fense frame post\n");
4255}
4256
4257static int amvdec_h264_probe(struct platform_device *pdev)
4258{
4259 struct vdec_s *pdata = *(struct vdec_s **)pdev->dev.platform_data;
4260
4261 mutex_lock(&vh264_mutex);
4262
4263 if (pdata == NULL) {
4264 pr_info("\namvdec_h264 memory resource undefined.\n");
4265 mutex_unlock(&vh264_mutex);
4266 return -EFAULT;
4267 }
4268 canvas_mode = pdata->canvas_mode;
4269 tvp_flag = vdec_secure(pdata) ? CODEC_MM_FLAGS_TVP : 0;
4270 if (pdata->sys_info)
4271 vh264_amstream_dec_info = *pdata->sys_info;
4272 if (sei_data_buffer == NULL) {
4273 sei_data_buffer =
4274 dma_alloc_coherent(amports_get_dma_device(),
4275 USER_DATA_RUND_SIZE,
4276 &sei_data_buffer_phys, GFP_KERNEL);
4277 if (!sei_data_buffer) {
4278 pr_info("%s: Can not allocate sei_data_buffer\n",
4279 __func__);
4280 mutex_unlock(&vh264_mutex);
4281 return -ENOMEM;
4282 }
4283 /* pr_info("buffer 0x%x, phys 0x%x, remap 0x%x\n",
4284 * sei_data_buffer, sei_data_buffer_phys,
4285 * (u32)sei_data_buffer_remap);
4286 */
4287 }
4288 pdata->dec_status = vh264_dec_status;
4289 pdata->set_trickmode = vh264_set_trickmode;
4290 pdata->set_isreset = vh264_set_isreset;
4291
4292 pdata->user_data_read = vh264_user_data_read;
4293 pdata->reset_userdata_fifo = vh264_reset_userdata_fifo;
4294 pdata->wakeup_userdata_poll = vh264_wakeup_userdata_poll;
4295
4296 is_reset = 0;
4297 clk_adj_frame_count = 0;
4298 if (vh264_init() < 0) {
4299 pr_info("\namvdec_h264 init failed.\n");
4300 kfree(gvs);
4301 gvs = NULL;
4302 pdata->dec_status = NULL;
4303 mutex_unlock(&vh264_mutex);
4304 return -ENODEV;
4305 }
4306 vdec_h264 = pdata;
4307 vh264_crate_userdata_manager(sei_data_buffer, USER_DATA_SIZE);
4308 vh264_reset_userdata_fifo(vdec_h264, 1);
4309
4310#ifdef DUMP_USER_DATA
4311 vh264_init_userdata_dump();
4312 vh264_reset_user_data_buf();
4313#endif
4314
4315 INIT_WORK(&error_wd_work, error_do_work);
4316 INIT_WORK(&stream_switching_work, stream_switching_do);
4317 INIT_WORK(&set_parameter_work, vh264_set_params);
4318 INIT_WORK(&notify_work, vh264_notify_work);
4319 INIT_WORK(&set_clk_work, vh264_set_clk);
4320 INIT_WORK(&userdata_push_work, userdata_push_do_work);
4321 INIT_WORK(&qos_work, qos_do_work);
4322
4323
4324
4325 atomic_set(&vh264_active, 1);
4326
4327 mutex_unlock(&vh264_mutex);
4328
4329 return 0;
4330}
4331
4332static int amvdec_h264_remove(struct platform_device *pdev)
4333{
4334 atomic_set(&vh264_active, 0);
4335 cancel_work_sync(&set_parameter_work);
4336 cancel_work_sync(&error_wd_work);
4337 cancel_work_sync(&stream_switching_work);
4338 cancel_work_sync(&notify_work);
4339 cancel_work_sync(&userdata_push_work);
4340 cancel_work_sync(&qos_work);
4341
4342
4343 vh264_stop(MODE_FULL);
4344 wait_vh264_search_done();
4345 vdec_source_changed(VFORMAT_H264, 0, 0, 0);
4346#ifdef DUMP_USER_DATA
4347 vh264_dump_userdata();
4348#endif
4349 vh264_destroy_userdata_manager();
4350 atomic_set(&vh264_active, 0);
4351#ifdef DEBUG_PTS
4352 pr_info
4353 ("pts missed %ld, pts hit %ld, pts_outside %d, duration %d, ",
4354 pts_missed, pts_hit, pts_outside, frame_dur);
4355 pr_info("sync_outside %d, use_idr_framerate %d\n",
4356 sync_outside, use_idr_framerate);
4357#endif
4358 kfree(gvs);
4359 gvs = NULL;
4360 cancel_work_sync(&set_clk_work);
4361 mutex_unlock(&vh264_mutex);
4362 return 0;
4363}
4364
4365/****************************************/
4366#ifdef CONFIG_PM
4367static int h264_suspend(struct device *dev)
4368{
4369 amvdec_suspend(to_platform_device(dev), dev->power.power_state);
4370 return 0;
4371}
4372
4373static int h264_resume(struct device *dev)
4374{
4375 amvdec_resume(to_platform_device(dev));
4376 return 0;
4377}
4378
4379static const struct dev_pm_ops h264_pm_ops = {
4380 SET_SYSTEM_SLEEP_PM_OPS(h264_suspend, h264_resume)
4381};
4382#endif
4383
4384static struct platform_driver amvdec_h264_driver = {
4385 .probe = amvdec_h264_probe,
4386 .remove = amvdec_h264_remove,
4387 .driver = {
4388 .name = DRIVER_NAME,
4389#ifdef CONFIG_PM
4390 .pm = &h264_pm_ops,
4391#endif
4392 }
4393};
4394
4395static struct codec_profile_t amvdec_h264_profile = {
4396 .name = "h264",
4397 .profile = ""
4398};
4399
4400
4401static struct mconfig h264_configs[] = {
4402 MC_PU32("stat", &stat),
4403 MC_PU32("error_recovery_mode", &error_recovery_mode),
4404 MC_PU32("sync_outside", &sync_outside),
4405 MC_PU32("dec_control", &dec_control),
4406 MC_PU32("fatal_error_reset", &fatal_error_reset),
4407 MC_PU32("max_refer_buf", &max_refer_buf),
4408 MC_PU32("ucode_type", &ucode_type),
4409 MC_PU32("debugfirmware", &debugfirmware),
4410 MC_PU32("fixed_frame_rate_flag", &fixed_frame_rate_flag),
4411 MC_PU32("decoder_debug_flag", &decoder_debug_flag),
4412 MC_PU32("dpb_size_adj", &dpb_size_adj),
4413 MC_PU32("decoder_force_reset", &decoder_force_reset),
4414 MC_PU32("no_idr_error_max", &no_idr_error_max),
4415 MC_PU32("enable_switch_fense", &enable_switch_fense),
4416};
4417static struct mconfig_node h264_node;
4418
4419
4420static int __init amvdec_h264_driver_init_module(void)
4421{
4422 pr_debug("amvdec_h264 module init\n");
4423
4424 ge2d_videoh264task_init();
4425
4426 if (platform_driver_register(&amvdec_h264_driver)) {
4427 pr_err("failed to register amvdec_h264 driver\n");
4428 return -ENODEV;
4429 }
4430 if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB
4431 && (codec_mm_get_total_size() > 80 * SZ_1M)) {
4432 amvdec_h264_profile.profile = "4k";
4433 }
4434 vcodec_profile_register(&amvdec_h264_profile);
4435 INIT_REG_NODE_CONFIGS("media.decoder", &h264_node,
4436 "h264", h264_configs, CONFIG_FOR_RW);
4437 return 0;
4438}
4439
4440static void __exit amvdec_h264_driver_remove_module(void)
4441{
4442 pr_debug("amvdec_h264 module remove.\n");
4443
4444 platform_driver_unregister(&amvdec_h264_driver);
4445
4446 ge2d_videoh264task_release();
4447}
4448
4449/****************************************/
4450
4451module_param(stat, uint, 0664);
4452MODULE_PARM_DESC(stat, "\n amvdec_h264 stat\n");
4453module_param(error_recovery_mode, uint, 0664);
4454MODULE_PARM_DESC(error_recovery_mode, "\n amvdec_h264 error_recovery_mode\n");
4455module_param(sync_outside, uint, 0664);
4456MODULE_PARM_DESC(sync_outside, "\n amvdec_h264 sync_outside\n");
4457module_param(dec_control, uint, 0664);
4458MODULE_PARM_DESC(dec_control, "\n amvdec_h264 decoder control\n");
4459module_param(frame_count, uint, 0664);
4460MODULE_PARM_DESC(frame_count,
4461 "\n amvdec_h264 decoded total count\n");
4462module_param(fatal_error_reset, uint, 0664);
4463MODULE_PARM_DESC(fatal_error_reset,
4464 "\n amvdec_h264 decoder reset when fatal error happens\n");
4465module_param(max_refer_buf, uint, 0664);
4466MODULE_PARM_DESC(max_refer_buf,
4467 "\n amvdec_h264 dec buffering or not for reference frame\n");
4468module_param(ucode_type, uint, 0664);
4469MODULE_PARM_DESC(ucode_type,
4470 "\n amvdec_h264 dec buffering or not for reference frame\n");
4471module_param(debugfirmware, uint, 0664);
4472MODULE_PARM_DESC(debugfirmware, "\n amvdec_h264 debug load firmware\n");
4473module_param(fixed_frame_rate_flag, uint, 0664);
4474MODULE_PARM_DESC(fixed_frame_rate_flag,
4475 "\n amvdec_h264 fixed_frame_rate_flag\n");
4476module_param(decoder_debug_flag, uint, 0664);
4477MODULE_PARM_DESC(decoder_debug_flag,
4478 "\n amvdec_h264 decoder_debug_flag\n");
4479
4480module_param(dpb_size_adj, uint, 0664);
4481MODULE_PARM_DESC(dpb_size_adj,
4482 "\n amvdec_h264 dpb_size_adj\n");
4483
4484
4485module_param(decoder_force_reset, uint, 0664);
4486MODULE_PARM_DESC(decoder_force_reset,
4487 "\n amvdec_h264 decoder force reset\n");
4488module_param(no_idr_error_max, uint, 0664);
4489MODULE_PARM_DESC(no_idr_error_max,
4490 "\n print no_idr_error_max\n");
4491module_param(enable_switch_fense, uint, 0664);
4492MODULE_PARM_DESC(enable_switch_fense,
4493 "\n enable switch fense\n");
4494
4495#ifdef SUPPORT_BAD_MACRO_BLOCK_REDUNDANCY
4496module_param(bad_block_scale, uint, 0664);
4497MODULE_PARM_DESC(bad_block_scale,
4498 "\n print bad_block_scale\n");
4499#endif
4500
4501module_param(enable_userdata_debug, uint, 0664);
4502MODULE_PARM_DESC(enable_userdata_debug,
4503 "\n enable_userdata_debug\n");
4504
4505
4506module_init(amvdec_h264_driver_init_module);
4507module_exit(amvdec_h264_driver_remove_module);
4508
4509MODULE_DESCRIPTION("AMLOGIC H264 Video Decoder Driver");
4510MODULE_LICENSE("GPL");
4511MODULE_AUTHOR("Chen Zhang <chen.zhang@amlogic.com>");
4512
generated by cgit at 2024-05-19 18:05:16 (GMT)