blob: 247d188f5346f7885a29cb617d533d7ea37d4a8f
1 | /* |
2 | * drivers/amlogic/amports/vmjpeg.c |
3 | * |
4 | * Copyright (C) 2015 Amlogic, Inc. All rights reserved. |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or |
9 | * (at your option) any later version. |
10 | * |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
14 | * more details. |
15 | * |
16 | */ |
17 | |
18 | #include <linux/kernel.h> |
19 | #include <linux/types.h> |
20 | #include <linux/errno.h> |
21 | #include <linux/interrupt.h> |
22 | #include <linux/timer.h> |
23 | #include <linux/kfifo.h> |
24 | #include <linux/platform_device.h> |
25 | #include <linux/delay.h> |
26 | #include <linux/amlogic/media/frame_sync/ptsserv.h> |
27 | #include <linux/amlogic/media/utils/amstream.h> |
28 | #include <linux/amlogic/media/canvas/canvas.h> |
29 | #include <linux/amlogic/media/vfm/vframe.h> |
30 | #include <linux/amlogic/media/vfm/vframe_provider.h> |
31 | #include <linux/amlogic/media/vfm/vframe_receiver.h> |
32 | #include <linux/amlogic/tee.h> |
33 | |
34 | #include <linux/amlogic/media/utils/vdec_reg.h> |
35 | #include <linux/amlogic/media/registers/register.h> |
36 | #include "../../../stream_input/amports/amports_priv.h" |
37 | |
38 | #include "../utils/vdec_input.h" |
39 | #include "../utils/vdec.h" |
40 | #include "../utils/amvdec.h" |
41 | #include "../utils/decoder_mmu_box.h" |
42 | #include "../utils/decoder_bmmu_box.h" |
43 | #include <linux/amlogic/media/codec_mm/codec_mm.h> |
44 | #include <linux/amlogic/media/codec_mm/configs.h> |
45 | #include "../utils/firmware.h" |
46 | #include "../utils/vdec_v4l2_buffer_ops.h" |
47 | #include "../utils/config_parser.h" |
48 | |
49 | #define MEM_NAME "codec_mmjpeg" |
50 | |
51 | #define DRIVER_NAME "ammvdec_mjpeg" |
52 | #define MODULE_NAME "ammvdec_mjpeg" |
53 | #define CHECK_INTERVAL (HZ/100) |
54 | |
55 | /* protocol register usage |
56 | * AV_SCRATCH_4 : decode buffer spec |
57 | * AV_SCRATCH_5 : decode buffer index |
58 | */ |
59 | |
60 | #define MREG_DECODE_PARAM AV_SCRATCH_2 /* bit 0-3: pico_addr_mode */ |
61 | /* bit 15-4: reference height */ |
62 | #define MREG_TO_AMRISC AV_SCRATCH_8 |
63 | #define MREG_FROM_AMRISC AV_SCRATCH_9 |
64 | #define MREG_FRAME_OFFSET AV_SCRATCH_A |
65 | #define DEC_STATUS_REG AV_SCRATCH_F |
66 | #define MREG_PIC_WIDTH AV_SCRATCH_B |
67 | #define MREG_PIC_HEIGHT AV_SCRATCH_C |
68 | #define DECODE_STOP_POS AV_SCRATCH_K |
69 | |
70 | #define PICINFO_BUF_IDX_MASK 0x0007 |
71 | #define PICINFO_AVI1 0x0080 |
72 | #define PICINFO_INTERLACE 0x0020 |
73 | #define PICINFO_INTERLACE_AVI1_BOT 0x0010 |
74 | #define PICINFO_INTERLACE_FIRST 0x0010 |
75 | |
76 | #define VF_POOL_SIZE 64 |
77 | #define DECODE_BUFFER_NUM_MAX 16 |
78 | #define DECODE_BUFFER_NUM_DEF 4 |
79 | #define MAX_BMMU_BUFFER_NUM DECODE_BUFFER_NUM_MAX |
80 | |
81 | #define DEFAULT_MEM_SIZE (32*SZ_1M) |
82 | static int debug_enable; |
83 | static u32 udebug_flag; |
84 | #define DECODE_ID(hw) (hw_to_vdec(hw)->id) |
85 | |
86 | static unsigned int radr; |
87 | static unsigned int rval; |
88 | #define VMJPEG_DEV_NUM 9 |
89 | static unsigned int max_decode_instance_num = VMJPEG_DEV_NUM; |
90 | static unsigned int max_process_time[VMJPEG_DEV_NUM]; |
91 | static unsigned int decode_timeout_val = 200; |
92 | static struct vframe_s *vmjpeg_vf_peek(void *); |
93 | static struct vframe_s *vmjpeg_vf_get(void *); |
94 | static void vmjpeg_vf_put(struct vframe_s *, void *); |
95 | static int vmjpeg_vf_states(struct vframe_states *states, void *); |
96 | static int vmjpeg_event_cb(int type, void *data, void *private_data); |
97 | static void vmjpeg_work(struct work_struct *work); |
98 | static int pre_decode_buf_level = 0x800; |
99 | static int start_decode_buf_level = 0x2000; |
100 | static u32 without_display_mode; |
101 | static u32 dynamic_buf_num_margin; |
102 | #undef pr_info |
103 | #define pr_info printk |
104 | unsigned int mmjpeg_debug_mask = 0xff; |
105 | #define PRINT_FLAG_ERROR 0x0 |
106 | #define PRINT_FLAG_RUN_FLOW 0X0001 |
107 | #define PRINT_FLAG_TIMEINFO 0x0002 |
108 | #define PRINT_FLAG_UCODE_DETAIL 0x0004 |
109 | #define PRINT_FLAG_VLD_DETAIL 0x0008 |
110 | #define PRINT_FLAG_DEC_DETAIL 0x0010 |
111 | #define PRINT_FLAG_BUFFER_DETAIL 0x0020 |
112 | #define PRINT_FLAG_RESTORE 0x0040 |
113 | #define PRINT_FRAME_NUM 0x0080 |
114 | #define PRINT_FLAG_FORCE_DONE 0x0100 |
115 | #define PRINT_FRAMEBASE_DATA 0x0400 |
116 | #define PRINT_FLAG_TIMEOUT_STATUS 0x1000 |
117 | #define PRINT_FLAG_V4L_DETAIL 0x8000 |
118 | #define IGNORE_PARAM_FROM_CONFIG 0x8000000 |
119 | |
120 | int mmjpeg_debug_print(int index, int debug_flag, const char *fmt, ...) |
121 | { |
122 | if (((debug_enable & debug_flag) && |
123 | ((1 << index) & mmjpeg_debug_mask)) |
124 | || (debug_flag == PRINT_FLAG_ERROR)) { |
125 | unsigned char buf[512]; |
126 | int len = 0; |
127 | va_list args; |
128 | va_start(args, fmt); |
129 | len = sprintf(buf, "%d: ", index); |
130 | vsnprintf(buf + len, 512-len, fmt, args); |
131 | pr_info("%s", buf); |
132 | va_end(args); |
133 | } |
134 | return 0; |
135 | } |
136 | |
137 | static const char vmjpeg_dec_id[] = "vmmjpeg-dev"; |
138 | |
139 | #define PROVIDER_NAME "vdec.mjpeg" |
140 | static const struct vframe_operations_s vf_provider_ops = { |
141 | .peek = vmjpeg_vf_peek, |
142 | .get = vmjpeg_vf_get, |
143 | .put = vmjpeg_vf_put, |
144 | .event_cb = vmjpeg_event_cb, |
145 | .vf_states = vmjpeg_vf_states, |
146 | }; |
147 | |
148 | #define DEC_RESULT_NONE 0 |
149 | #define DEC_RESULT_DONE 1 |
150 | #define DEC_RESULT_AGAIN 2 |
151 | #define DEC_RESULT_ERROR 3 |
152 | #define DEC_RESULT_FORCE_EXIT 4 |
153 | #define DEC_RESULT_EOS 5 |
154 | #define DEC_DECODE_TIMEOUT 0x21 |
155 | |
156 | |
157 | struct buffer_spec_s { |
158 | unsigned int y_addr; |
159 | unsigned int u_addr; |
160 | unsigned int v_addr; |
161 | |
162 | int y_canvas_index; |
163 | int u_canvas_index; |
164 | int v_canvas_index; |
165 | |
166 | struct canvas_config_s canvas_config[3]; |
167 | unsigned long cma_alloc_addr; |
168 | int cma_alloc_count; |
169 | unsigned int buf_adr; |
170 | ulong v4l_ref_buf_addr; |
171 | }; |
172 | |
173 | #define spec2canvas(x) \ |
174 | (((x)->v_canvas_index << 16) | \ |
175 | ((x)->u_canvas_index << 8) | \ |
176 | ((x)->y_canvas_index << 0)) |
177 | |
178 | struct vdec_mjpeg_hw_s { |
179 | spinlock_t lock; |
180 | struct mutex vmjpeg_mutex; |
181 | |
182 | struct platform_device *platform_dev; |
183 | DECLARE_KFIFO(newframe_q, struct vframe_s *, VF_POOL_SIZE); |
184 | DECLARE_KFIFO(display_q, struct vframe_s *, VF_POOL_SIZE); |
185 | |
186 | struct vframe_s vfpool[VF_POOL_SIZE]; |
187 | struct buffer_spec_s buffer_spec[DECODE_BUFFER_NUM_MAX]; |
188 | s32 vfbuf_use[DECODE_BUFFER_NUM_MAX]; |
189 | |
190 | u32 frame_width; |
191 | u32 frame_height; |
192 | u32 frame_dur; |
193 | u32 saved_resolution; |
194 | u8 init_flag; |
195 | u32 stat; |
196 | u32 dec_result; |
197 | unsigned long buf_start; |
198 | u32 buf_size; |
199 | void *mm_blk_handle; |
200 | struct dec_sysinfo vmjpeg_amstream_dec_info; |
201 | |
202 | struct vframe_chunk_s *chunk; |
203 | struct work_struct work; |
204 | void (*vdec_cb)(struct vdec_s *, void *); |
205 | void *vdec_cb_arg; |
206 | struct firmware_s *fw; |
207 | struct timer_list check_timer; |
208 | u32 decode_timeout_count; |
209 | unsigned long int start_process_time; |
210 | u32 last_vld_level; |
211 | u8 eos; |
212 | u32 frame_num; |
213 | u32 put_num; |
214 | u32 run_count; |
215 | u32 not_run_ready; |
216 | u32 buffer_not_ready; |
217 | u32 input_empty; |
218 | u32 peek_num; |
219 | u32 get_num; |
220 | bool is_used_v4l; |
221 | void *v4l2_ctx; |
222 | bool v4l_params_parsed; |
223 | int buf_num; |
224 | int dynamic_buf_num_margin; |
225 | }; |
226 | |
227 | static void reset_process_time(struct vdec_mjpeg_hw_s *hw); |
228 | static void set_frame_info(struct vdec_mjpeg_hw_s *hw, struct vframe_s *vf) |
229 | { |
230 | u32 temp; |
231 | temp = READ_VREG(MREG_PIC_WIDTH); |
232 | if (temp > 1920) |
233 | vf->width = hw->frame_width = 1920; |
234 | else if (temp > 0) |
235 | vf->width = hw->frame_width = temp; |
236 | temp = READ_VREG(MREG_PIC_HEIGHT); |
237 | if (temp > 1088) |
238 | vf->height = hw->frame_height = 1088; |
239 | else if (temp > 0) |
240 | vf->height = hw->frame_height = temp; |
241 | vf->duration = hw->frame_dur; |
242 | vf->ratio_control = 0; |
243 | vf->duration_pulldown = 0; |
244 | vf->flag = 0; |
245 | |
246 | vf->canvas0Addr = vf->canvas1Addr = -1; |
247 | vf->plane_num = 3; |
248 | |
249 | vf->canvas0_config[0] = hw->buffer_spec[vf->index].canvas_config[0]; |
250 | vf->canvas0_config[1] = hw->buffer_spec[vf->index].canvas_config[1]; |
251 | vf->canvas0_config[2] = hw->buffer_spec[vf->index].canvas_config[2]; |
252 | |
253 | vf->canvas1_config[0] = hw->buffer_spec[vf->index].canvas_config[0]; |
254 | vf->canvas1_config[1] = hw->buffer_spec[vf->index].canvas_config[1]; |
255 | vf->canvas1_config[2] = hw->buffer_spec[vf->index].canvas_config[2]; |
256 | } |
257 | |
258 | static irqreturn_t vmjpeg_isr(struct vdec_s *vdec, int irq) |
259 | { |
260 | struct vdec_mjpeg_hw_s *hw = (struct vdec_mjpeg_hw_s *)(vdec->private); |
261 | u32 reg; |
262 | struct vframe_s *vf = NULL; |
263 | u32 index, offset = 0, pts; |
264 | u64 pts_us64; |
265 | u32 frame_size; |
266 | |
267 | if (!hw) |
268 | return IRQ_HANDLED; |
269 | |
270 | if (hw->eos) |
271 | return IRQ_HANDLED; |
272 | reset_process_time(hw); |
273 | WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1); |
274 | if (READ_VREG(AV_SCRATCH_D) != 0 && |
275 | (debug_enable & PRINT_FLAG_UCODE_DETAIL)) { |
276 | pr_info("dbg%x: %x\n", READ_VREG(AV_SCRATCH_D), |
277 | READ_VREG(AV_SCRATCH_E)); |
278 | WRITE_VREG(AV_SCRATCH_D, 0); |
279 | return IRQ_HANDLED; |
280 | } |
281 | |
282 | reg = READ_VREG(MREG_FROM_AMRISC); |
283 | index = READ_VREG(AV_SCRATCH_5); |
284 | |
285 | if (index >= hw->buf_num) { |
286 | pr_err("fatal error, invalid buffer index."); |
287 | return IRQ_HANDLED; |
288 | } |
289 | |
290 | if (kfifo_get(&hw->newframe_q, &vf) == 0) { |
291 | pr_info( |
292 | "fatal error, no available buffer slot."); |
293 | return IRQ_HANDLED; |
294 | } |
295 | |
296 | if (hw->is_used_v4l) { |
297 | struct aml_vcodec_ctx *ctx = |
298 | (struct aml_vcodec_ctx *)(hw->v4l2_ctx); |
299 | |
300 | if (ctx->param_sets_from_ucode && !hw->v4l_params_parsed) { |
301 | struct aml_vdec_ps_infos ps; |
302 | |
303 | ps.visible_width = hw->frame_width; |
304 | ps.visible_height = hw->frame_height; |
305 | ps.coded_width = ALIGN(hw->frame_width, 64); |
306 | ps.coded_height = ALIGN(hw->frame_height, 64); |
307 | ps.dpb_size = hw->buf_num; |
308 | hw->v4l_params_parsed = true; |
309 | vdec_v4l_set_ps_infos(ctx, &ps); |
310 | } |
311 | |
312 | if (!ctx->v4l_codec_ready) |
313 | return IRQ_HANDLED; |
314 | } |
315 | |
316 | if (hw->is_used_v4l) { |
317 | vf->v4l_mem_handle |
318 | = hw->buffer_spec[index].v4l_ref_buf_addr; |
319 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL, |
320 | "[%d] %s(), v4l mem handle: 0x%lx\n", |
321 | ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id, |
322 | __func__, vf->v4l_mem_handle); |
323 | } |
324 | |
325 | vf->index = index; |
326 | set_frame_info(hw, vf); |
327 | |
328 | vf->type = VIDTYPE_PROGRESSIVE | VIDTYPE_VIU_FIELD; |
329 | /* vf->pts = (pts_valid) ? pts : 0; */ |
330 | /* vf->pts_us64 = (pts_valid) ? pts_us64 : 0; */ |
331 | |
332 | if (hw->chunk) { |
333 | vf->pts = hw->chunk->pts; |
334 | vf->pts_us64 = hw->chunk->pts64; |
335 | } else { |
336 | offset = READ_VREG(MREG_FRAME_OFFSET); |
337 | if (pts_lookup_offset_us64 |
338 | (PTS_TYPE_VIDEO, offset, &pts, |
339 | &frame_size, 3000, |
340 | &pts_us64) == 0) { |
341 | vf->pts = pts; |
342 | vf->pts_us64 = pts_us64; |
343 | } else { |
344 | vf->pts = 0; |
345 | vf->pts_us64 = 0; |
346 | } |
347 | } |
348 | vf->orientation = 0; |
349 | hw->vfbuf_use[index]++; |
350 | |
351 | vf->mem_handle = |
352 | decoder_bmmu_box_get_mem_handle( |
353 | hw->mm_blk_handle, index); |
354 | kfifo_put(&hw->display_q, (const struct vframe_s *)vf); |
355 | ATRACE_COUNTER(MODULE_NAME, vf->pts); |
356 | hw->frame_num++; |
357 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM, |
358 | "%s:frame num:%d,pts=%d,pts64=%lld. dur=%d\n", |
359 | __func__, hw->frame_num, |
360 | vf->pts, vf->pts_us64, vf->duration); |
361 | vdec->vdec_fps_detec(vdec->id); |
362 | if (without_display_mode == 0) { |
363 | vf_notify_receiver(vdec->vf_provider_name, |
364 | VFRAME_EVENT_PROVIDER_VFRAME_READY, |
365 | NULL); |
366 | } else |
367 | vmjpeg_vf_put(vmjpeg_vf_get(vdec), vdec); |
368 | |
369 | hw->dec_result = DEC_RESULT_DONE; |
370 | |
371 | vdec_schedule_work(&hw->work); |
372 | |
373 | return IRQ_HANDLED; |
374 | } |
375 | |
376 | static struct vframe_s *vmjpeg_vf_peek(void *op_arg) |
377 | { |
378 | struct vframe_s *vf; |
379 | struct vdec_s *vdec = op_arg; |
380 | struct vdec_mjpeg_hw_s *hw = (struct vdec_mjpeg_hw_s *)vdec->private; |
381 | |
382 | if (!hw) |
383 | return NULL; |
384 | hw->peek_num++; |
385 | if (kfifo_peek(&hw->display_q, &vf)) |
386 | return vf; |
387 | |
388 | return NULL; |
389 | } |
390 | |
391 | static struct vframe_s *vmjpeg_vf_get(void *op_arg) |
392 | { |
393 | struct vframe_s *vf; |
394 | struct vdec_s *vdec = op_arg; |
395 | struct vdec_mjpeg_hw_s *hw = (struct vdec_mjpeg_hw_s *)vdec->private; |
396 | |
397 | if (!hw) |
398 | return NULL; |
399 | hw->get_num++; |
400 | if (kfifo_get(&hw->display_q, &vf)) |
401 | return vf; |
402 | |
403 | return NULL; |
404 | } |
405 | |
406 | static void vmjpeg_vf_put(struct vframe_s *vf, void *op_arg) |
407 | { |
408 | struct vdec_s *vdec = op_arg; |
409 | struct vdec_mjpeg_hw_s *hw = (struct vdec_mjpeg_hw_s *)vdec->private; |
410 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM, |
411 | "%s:put_num:%d\n", __func__, hw->put_num); |
412 | hw->vfbuf_use[vf->index]--; |
413 | kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf); |
414 | hw->put_num++; |
415 | } |
416 | |
417 | static int vmjpeg_event_cb(int type, void *data, void *private_data) |
418 | { |
419 | return 0; |
420 | } |
421 | |
422 | static int vmjpeg_vf_states(struct vframe_states *states, void *op_arg) |
423 | { |
424 | unsigned long flags; |
425 | struct vdec_s *vdec = op_arg; |
426 | struct vdec_mjpeg_hw_s *hw = (struct vdec_mjpeg_hw_s *)vdec->private; |
427 | |
428 | spin_lock_irqsave(&hw->lock, flags); |
429 | |
430 | states->vf_pool_size = VF_POOL_SIZE; |
431 | states->buf_free_num = kfifo_len(&hw->newframe_q); |
432 | states->buf_avail_num = kfifo_len(&hw->display_q); |
433 | states->buf_recycle_num = 0; |
434 | |
435 | spin_unlock_irqrestore(&hw->lock, flags); |
436 | |
437 | return 0; |
438 | } |
439 | |
440 | static int vmjpeg_dec_status(struct vdec_s *vdec, struct vdec_info *vstatus) |
441 | { |
442 | struct vdec_mjpeg_hw_s *hw = (struct vdec_mjpeg_hw_s *)vdec->private; |
443 | |
444 | if (!hw) |
445 | return -1; |
446 | |
447 | vstatus->frame_width = hw->frame_width; |
448 | vstatus->frame_height = hw->frame_height; |
449 | if (0 != hw->frame_dur) |
450 | vstatus->frame_rate = 96000 / hw->frame_dur; |
451 | else |
452 | vstatus->frame_rate = 96000; |
453 | vstatus->error_count = 0; |
454 | vstatus->status = hw->stat; |
455 | |
456 | return 0; |
457 | } |
458 | |
459 | /****************************************/ |
460 | static void vmjpeg_canvas_init(struct vdec_mjpeg_hw_s *hw) |
461 | { |
462 | int i, ret; |
463 | u32 canvas_width, canvas_height; |
464 | u32 decbuf_size, decbuf_y_size, decbuf_uv_size; |
465 | unsigned long buf_start, addr; |
466 | struct vdec_s *vdec = hw_to_vdec(hw); |
467 | |
468 | canvas_width = 1920; |
469 | canvas_height = 1088; |
470 | decbuf_y_size = 0x200000; |
471 | decbuf_uv_size = 0x80000; |
472 | decbuf_size = 0x300000; |
473 | |
474 | for (i = 0; i < hw->buf_num; i++) { |
475 | int canvas; |
476 | |
477 | if (hw->is_used_v4l) { |
478 | continue; |
479 | } else { |
480 | ret = decoder_bmmu_box_alloc_buf_phy(hw->mm_blk_handle, i, |
481 | decbuf_size, DRIVER_NAME, &buf_start); |
482 | if (ret < 0) { |
483 | pr_err("CMA alloc failed! size 0x%d idx %d\n", |
484 | decbuf_size, i); |
485 | return; |
486 | } |
487 | } |
488 | |
489 | hw->buffer_spec[i].buf_adr = buf_start; |
490 | addr = hw->buffer_spec[i].buf_adr; |
491 | |
492 | hw->buffer_spec[i].y_addr = addr; |
493 | addr += decbuf_y_size; |
494 | hw->buffer_spec[i].u_addr = addr; |
495 | addr += decbuf_uv_size; |
496 | hw->buffer_spec[i].v_addr = addr; |
497 | |
498 | if (vdec->parallel_dec == 1) { |
499 | if (hw->buffer_spec[i].y_canvas_index == -1) |
500 | hw->buffer_spec[i].y_canvas_index = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
501 | if (hw->buffer_spec[i].u_canvas_index == -1) |
502 | hw->buffer_spec[i].u_canvas_index = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
503 | if (hw->buffer_spec[i].v_canvas_index == -1) |
504 | hw->buffer_spec[i].v_canvas_index = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
505 | } else { |
506 | canvas = vdec->get_canvas(i, 3); |
507 | hw->buffer_spec[i].y_canvas_index = canvas_y(canvas); |
508 | hw->buffer_spec[i].u_canvas_index = canvas_u(canvas); |
509 | hw->buffer_spec[i].v_canvas_index = canvas_v(canvas); |
510 | } |
511 | |
512 | canvas_config(hw->buffer_spec[i].y_canvas_index, |
513 | hw->buffer_spec[i].y_addr, |
514 | canvas_width, |
515 | canvas_height, |
516 | CANVAS_ADDR_NOWRAP, |
517 | CANVAS_BLKMODE_LINEAR); |
518 | hw->buffer_spec[i].canvas_config[0].phy_addr = |
519 | hw->buffer_spec[i].y_addr; |
520 | hw->buffer_spec[i].canvas_config[0].width = |
521 | canvas_width; |
522 | hw->buffer_spec[i].canvas_config[0].height = |
523 | canvas_height; |
524 | hw->buffer_spec[i].canvas_config[0].block_mode = |
525 | CANVAS_BLKMODE_LINEAR; |
526 | |
527 | canvas_config(hw->buffer_spec[i].u_canvas_index, |
528 | hw->buffer_spec[i].u_addr, |
529 | canvas_width / 2, |
530 | canvas_height / 2, |
531 | CANVAS_ADDR_NOWRAP, |
532 | CANVAS_BLKMODE_LINEAR); |
533 | hw->buffer_spec[i].canvas_config[1].phy_addr = |
534 | hw->buffer_spec[i].u_addr; |
535 | hw->buffer_spec[i].canvas_config[1].width = |
536 | canvas_width / 2; |
537 | hw->buffer_spec[i].canvas_config[1].height = |
538 | canvas_height / 2; |
539 | hw->buffer_spec[i].canvas_config[1].block_mode = |
540 | CANVAS_BLKMODE_LINEAR; |
541 | |
542 | canvas_config(hw->buffer_spec[i].v_canvas_index, |
543 | hw->buffer_spec[i].v_addr, |
544 | canvas_width / 2, |
545 | canvas_height / 2, |
546 | CANVAS_ADDR_NOWRAP, |
547 | CANVAS_BLKMODE_LINEAR); |
548 | hw->buffer_spec[i].canvas_config[2].phy_addr = |
549 | hw->buffer_spec[i].v_addr; |
550 | hw->buffer_spec[i].canvas_config[2].width = |
551 | canvas_width / 2; |
552 | hw->buffer_spec[i].canvas_config[2].height = |
553 | canvas_height / 2; |
554 | hw->buffer_spec[i].canvas_config[2].block_mode = |
555 | CANVAS_BLKMODE_LINEAR; |
556 | } |
557 | } |
558 | |
559 | static void init_scaler(void) |
560 | { |
561 | /* 4 point triangle */ |
562 | const unsigned int filt_coef[] = { |
563 | 0x20402000, 0x20402000, 0x1f3f2101, 0x1f3f2101, |
564 | 0x1e3e2202, 0x1e3e2202, 0x1d3d2303, 0x1d3d2303, |
565 | 0x1c3c2404, 0x1c3c2404, 0x1b3b2505, 0x1b3b2505, |
566 | 0x1a3a2606, 0x1a3a2606, 0x19392707, 0x19392707, |
567 | 0x18382808, 0x18382808, 0x17372909, 0x17372909, |
568 | 0x16362a0a, 0x16362a0a, 0x15352b0b, 0x15352b0b, |
569 | 0x14342c0c, 0x14342c0c, 0x13332d0d, 0x13332d0d, |
570 | 0x12322e0e, 0x12322e0e, 0x11312f0f, 0x11312f0f, |
571 | 0x10303010 |
572 | }; |
573 | int i; |
574 | |
575 | /* pscale enable, PSCALE cbus bmem enable */ |
576 | WRITE_VREG(PSCALE_CTRL, 0xc000); |
577 | |
578 | /* write filter coefs */ |
579 | WRITE_VREG(PSCALE_BMEM_ADDR, 0); |
580 | for (i = 0; i < 33; i++) { |
581 | WRITE_VREG(PSCALE_BMEM_DAT, 0); |
582 | WRITE_VREG(PSCALE_BMEM_DAT, filt_coef[i]); |
583 | } |
584 | |
585 | /* Y horizontal initial info */ |
586 | WRITE_VREG(PSCALE_BMEM_ADDR, 37 * 2); |
587 | /* [35]: buf repeat pix0, |
588 | * [34:29] => buf receive num, |
589 | * [28:16] => buf blk x, |
590 | * [15:0] => buf phase |
591 | */ |
592 | WRITE_VREG(PSCALE_BMEM_DAT, 0x0008); |
593 | WRITE_VREG(PSCALE_BMEM_DAT, 0x60000000); |
594 | |
595 | /* C horizontal initial info */ |
596 | WRITE_VREG(PSCALE_BMEM_ADDR, 41 * 2); |
597 | WRITE_VREG(PSCALE_BMEM_DAT, 0x0008); |
598 | WRITE_VREG(PSCALE_BMEM_DAT, 0x60000000); |
599 | |
600 | /* Y vertical initial info */ |
601 | WRITE_VREG(PSCALE_BMEM_ADDR, 39 * 2); |
602 | WRITE_VREG(PSCALE_BMEM_DAT, 0x0008); |
603 | WRITE_VREG(PSCALE_BMEM_DAT, 0x60000000); |
604 | |
605 | /* C vertical initial info */ |
606 | WRITE_VREG(PSCALE_BMEM_ADDR, 43 * 2); |
607 | WRITE_VREG(PSCALE_BMEM_DAT, 0x0008); |
608 | WRITE_VREG(PSCALE_BMEM_DAT, 0x60000000); |
609 | |
610 | /* Y horizontal phase step */ |
611 | WRITE_VREG(PSCALE_BMEM_ADDR, 36 * 2 + 1); |
612 | /* [19:0] => Y horizontal phase step */ |
613 | WRITE_VREG(PSCALE_BMEM_DAT, 0x10000); |
614 | /* C horizontal phase step */ |
615 | WRITE_VREG(PSCALE_BMEM_ADDR, 40 * 2 + 1); |
616 | /* [19:0] => C horizontal phase step */ |
617 | WRITE_VREG(PSCALE_BMEM_DAT, 0x10000); |
618 | |
619 | /* Y vertical phase step */ |
620 | WRITE_VREG(PSCALE_BMEM_ADDR, 38 * 2 + 1); |
621 | /* [19:0] => Y vertical phase step */ |
622 | WRITE_VREG(PSCALE_BMEM_DAT, 0x10000); |
623 | /* C vertical phase step */ |
624 | WRITE_VREG(PSCALE_BMEM_ADDR, 42 * 2 + 1); |
625 | /* [19:0] => C horizontal phase step */ |
626 | WRITE_VREG(PSCALE_BMEM_DAT, 0x10000); |
627 | |
628 | /* reset pscaler */ |
629 | #if 1/*MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6*/ |
630 | WRITE_VREG(DOS_SW_RESET0, (1 << 10)); |
631 | WRITE_VREG(DOS_SW_RESET0, 0); |
632 | #else |
633 | WRITE_RESET_REG(RESET2_REGISTER, RESET_PSCALE); |
634 | #endif |
635 | READ_RESET_REG(RESET2_REGISTER); |
636 | READ_RESET_REG(RESET2_REGISTER); |
637 | READ_RESET_REG(RESET2_REGISTER); |
638 | |
639 | WRITE_VREG(PSCALE_RST, 0x7); |
640 | WRITE_VREG(PSCALE_RST, 0x0); |
641 | } |
642 | |
643 | static void vmjpeg_dump_state(struct vdec_s *vdec) |
644 | { |
645 | struct vdec_mjpeg_hw_s *hw = |
646 | (struct vdec_mjpeg_hw_s *)(vdec->private); |
647 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
648 | "====== %s\n", __func__); |
649 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
650 | "width/height (%d/%d) buf_num %d\n", |
651 | hw->frame_width, |
652 | hw->frame_height, |
653 | hw->buf_num |
654 | ); |
655 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
656 | "is_framebase(%d), eos %d, state 0x%x, dec_result 0x%x dec_frm %d put_frm %d run %d not_run_ready %d input_empty %d\n", |
657 | input_frame_based(vdec), |
658 | hw->eos, |
659 | hw->stat, |
660 | hw->dec_result, |
661 | hw->frame_num, |
662 | hw->put_num, |
663 | hw->run_count, |
664 | hw->not_run_ready, |
665 | hw->input_empty |
666 | ); |
667 | if (vf_get_receiver(vdec->vf_provider_name)) { |
668 | enum receviver_start_e state = |
669 | vf_notify_receiver(vdec->vf_provider_name, |
670 | VFRAME_EVENT_PROVIDER_QUREY_STATE, |
671 | NULL); |
672 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
673 | "\nreceiver(%s) state %d\n", |
674 | vdec->vf_provider_name, |
675 | state); |
676 | } |
677 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
678 | "%s, newq(%d/%d), dispq(%d/%d) vf peek/get/put (%d/%d/%d)\n", |
679 | __func__, |
680 | kfifo_len(&hw->newframe_q), |
681 | VF_POOL_SIZE, |
682 | kfifo_len(&hw->display_q), |
683 | VF_POOL_SIZE, |
684 | hw->peek_num, |
685 | hw->get_num, |
686 | hw->put_num |
687 | ); |
688 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
689 | "VIFF_BIT_CNT=0x%x\n", |
690 | READ_VREG(VIFF_BIT_CNT)); |
691 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
692 | "VLD_MEM_VIFIFO_LEVEL=0x%x\n", |
693 | READ_VREG(VLD_MEM_VIFIFO_LEVEL)); |
694 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
695 | "VLD_MEM_VIFIFO_WP=0x%x\n", |
696 | READ_VREG(VLD_MEM_VIFIFO_WP)); |
697 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
698 | "VLD_MEM_VIFIFO_RP=0x%x\n", |
699 | READ_VREG(VLD_MEM_VIFIFO_RP)); |
700 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
701 | "PARSER_VIDEO_RP=0x%x\n", |
702 | READ_PARSER_REG(PARSER_VIDEO_RP)); |
703 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
704 | "PARSER_VIDEO_WP=0x%x\n", |
705 | READ_PARSER_REG(PARSER_VIDEO_WP)); |
706 | if (input_frame_based(vdec) && |
707 | debug_enable & PRINT_FRAMEBASE_DATA |
708 | ) { |
709 | int jj; |
710 | if (hw->chunk && hw->chunk->block && |
711 | hw->chunk->size > 0) { |
712 | u8 *data = NULL; |
713 | |
714 | if (!hw->chunk->block->is_mapped) |
715 | data = codec_mm_vmap(hw->chunk->block->start + |
716 | hw->chunk->offset, hw->chunk->size); |
717 | else |
718 | data = ((u8 *)hw->chunk->block->start_virt) + |
719 | hw->chunk->offset; |
720 | |
721 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
722 | "frame data size 0x%x\n", |
723 | hw->chunk->size); |
724 | for (jj = 0; jj < hw->chunk->size; jj++) { |
725 | if ((jj & 0xf) == 0) |
726 | mmjpeg_debug_print(DECODE_ID(hw), |
727 | PRINT_FRAMEBASE_DATA, |
728 | "%06x:", jj); |
729 | mmjpeg_debug_print(DECODE_ID(hw), |
730 | PRINT_FRAMEBASE_DATA, |
731 | "%02x ", data[jj]); |
732 | if (((jj + 1) & 0xf) == 0) |
733 | mmjpeg_debug_print(DECODE_ID(hw), |
734 | PRINT_FRAMEBASE_DATA, |
735 | "\n"); |
736 | } |
737 | |
738 | if (!hw->chunk->block->is_mapped) |
739 | codec_mm_unmap_phyaddr(data); |
740 | } |
741 | } |
742 | } |
743 | static void reset_process_time(struct vdec_mjpeg_hw_s *hw) |
744 | { |
745 | if (hw->start_process_time) { |
746 | unsigned process_time = |
747 | 1000 * (jiffies - hw->start_process_time) / HZ; |
748 | hw->start_process_time = 0; |
749 | if (process_time > max_process_time[DECODE_ID(hw)]) |
750 | max_process_time[DECODE_ID(hw)] = process_time; |
751 | } |
752 | } |
753 | |
754 | static void start_process_time(struct vdec_mjpeg_hw_s *hw) |
755 | { |
756 | hw->decode_timeout_count = 2; |
757 | hw->start_process_time = jiffies; |
758 | } |
759 | |
760 | static void timeout_process(struct vdec_mjpeg_hw_s *hw) |
761 | { |
762 | amvdec_stop(); |
763 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR, |
764 | "%s decoder timeout\n", __func__); |
765 | hw->dec_result = DEC_RESULT_DONE; |
766 | reset_process_time(hw); |
767 | vdec_schedule_work(&hw->work); |
768 | } |
769 | |
770 | static void check_timer_func(unsigned long arg) |
771 | { |
772 | struct vdec_mjpeg_hw_s *hw = (struct vdec_mjpeg_hw_s *)arg; |
773 | struct vdec_s *vdec = hw_to_vdec(hw); |
774 | int timeout_val = decode_timeout_val; |
775 | |
776 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FLAG_VLD_DETAIL, |
777 | "%s: status:nstatus=%d:%d\n", |
778 | __func__, vdec->status, vdec->next_status); |
779 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FLAG_VLD_DETAIL, |
780 | "%s: %d,buftl=%x:%x:%x:%x\n", |
781 | __func__, __LINE__, |
782 | READ_VREG(VLD_MEM_VIFIFO_BUF_CNTL), |
783 | READ_PARSER_REG(PARSER_VIDEO_WP), |
784 | READ_VREG(VLD_MEM_VIFIFO_LEVEL), |
785 | READ_VREG(VLD_MEM_VIFIFO_WP)); |
786 | |
787 | if (radr != 0) { |
788 | if (rval != 0) { |
789 | WRITE_VREG(radr, rval); |
790 | pr_info("WRITE_VREG(%x,%x)\n", radr, rval); |
791 | } else |
792 | pr_info("READ_VREG(%x)=%x\n", radr, READ_VREG(radr)); |
793 | rval = 0; |
794 | radr = 0; |
795 | } |
796 | |
797 | if (((debug_enable & PRINT_FLAG_TIMEOUT_STATUS) == 0) && |
798 | (input_frame_based(vdec) || |
799 | ((u32)READ_VREG(VLD_MEM_VIFIFO_LEVEL) > 0x100)) && |
800 | (timeout_val > 0) && |
801 | (hw->start_process_time > 0) && |
802 | ((1000 * (jiffies - hw->start_process_time) / HZ) |
803 | > timeout_val)) { |
804 | if (hw->last_vld_level == READ_VREG(VLD_MEM_VIFIFO_LEVEL)) { |
805 | if (hw->decode_timeout_count > 0) |
806 | hw->decode_timeout_count--; |
807 | if (hw->decode_timeout_count == 0) |
808 | timeout_process(hw); |
809 | } |
810 | hw->last_vld_level = READ_VREG(VLD_MEM_VIFIFO_LEVEL); |
811 | } |
812 | |
813 | if (READ_VREG(DEC_STATUS_REG) == DEC_DECODE_TIMEOUT) { |
814 | pr_info("ucode DEC_DECODE_TIMEOUT\n"); |
815 | if (hw->decode_timeout_count > 0) |
816 | hw->decode_timeout_count--; |
817 | if (hw->decode_timeout_count == 0) |
818 | timeout_process(hw); |
819 | WRITE_VREG(DEC_STATUS_REG, 0); |
820 | } |
821 | |
822 | if (vdec->next_status == VDEC_STATUS_DISCONNECTED) { |
823 | hw->dec_result = DEC_RESULT_FORCE_EXIT; |
824 | vdec_schedule_work(&hw->work); |
825 | pr_info("vdec requested to be disconnected\n"); |
826 | return; |
827 | } |
828 | mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL); |
829 | } |
830 | |
831 | static int vmjpeg_v4l_alloc_buff_config_canvas(struct vdec_mjpeg_hw_s *hw, int i) |
832 | { |
833 | int ret; |
834 | u32 canvas; |
835 | ulong decbuf_start = 0, addr; |
836 | int decbuf_y_size = 0, decbuf_uv_size = 0; |
837 | u32 canvas_width = 0, canvas_height = 0; |
838 | struct vdec_s *vdec = hw_to_vdec(hw); |
839 | struct vdec_v4l2_buffer *fb = NULL; |
840 | |
841 | if (hw->buffer_spec[i].v4l_ref_buf_addr) |
842 | return 0; |
843 | |
844 | ret = vdec_v4l_get_buffer(hw->v4l2_ctx, &fb); |
845 | if (ret < 0) { |
846 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
847 | "[%d] get fb fail.\n", |
848 | ((struct aml_vcodec_ctx *) |
849 | (hw->v4l2_ctx))->id); |
850 | return ret; |
851 | } |
852 | |
853 | hw->buffer_spec[i].v4l_ref_buf_addr = (ulong)fb; |
854 | if (fb->num_planes == 1) { |
855 | decbuf_start = fb->m.mem[0].addr; |
856 | decbuf_y_size = fb->m.mem[0].offset; |
857 | decbuf_uv_size = fb->m.mem[0].size - fb->m.mem[0].offset; |
858 | canvas_width = ALIGN(hw->frame_width, 16); |
859 | canvas_height = ALIGN(hw->frame_height, 16); |
860 | fb->m.mem[0].bytes_used = fb->m.mem[0].size; |
861 | } else if (fb->num_planes == 2) { |
862 | decbuf_start = fb->m.mem[0].addr; |
863 | decbuf_y_size = fb->m.mem[0].size; |
864 | decbuf_uv_size = fb->m.mem[1].size << 1; |
865 | canvas_width = ALIGN(hw->frame_width, 16); |
866 | canvas_height = ALIGN(hw->frame_height, 16); |
867 | fb->m.mem[0].bytes_used = decbuf_y_size; |
868 | fb->m.mem[1].bytes_used = decbuf_uv_size >> 1; |
869 | } |
870 | |
871 | hw->buffer_spec[i].buf_adr = decbuf_start; |
872 | addr = hw->buffer_spec[i].buf_adr; |
873 | hw->buffer_spec[i].y_addr = addr; |
874 | addr += decbuf_y_size; |
875 | hw->buffer_spec[i].u_addr = addr; |
876 | addr += decbuf_uv_size; |
877 | hw->buffer_spec[i].v_addr = addr; |
878 | |
879 | mmjpeg_debug_print(DECODE_ID(hw), 0, "[%d] %s(), v4l ref buf addr: 0x%x\n", |
880 | ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id, __func__, fb); |
881 | |
882 | if (vdec->parallel_dec == 1) { |
883 | if (hw->buffer_spec[i].y_canvas_index == -1) |
884 | hw->buffer_spec[i].y_canvas_index = |
885 | vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
886 | if (hw->buffer_spec[i].u_canvas_index == -1) |
887 | hw->buffer_spec[i].u_canvas_index = |
888 | vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
889 | if (hw->buffer_spec[i].v_canvas_index == -1) |
890 | hw->buffer_spec[i].v_canvas_index = |
891 | vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
892 | } else { |
893 | canvas = vdec->get_canvas(i, 3); |
894 | hw->buffer_spec[i].y_canvas_index = canvas_y(canvas); |
895 | hw->buffer_spec[i].u_canvas_index = canvas_u(canvas); |
896 | hw->buffer_spec[i].v_canvas_index = canvas_v(canvas); |
897 | } |
898 | |
899 | canvas_config(hw->buffer_spec[i].y_canvas_index, |
900 | hw->buffer_spec[i].y_addr, |
901 | canvas_width, |
902 | canvas_height, |
903 | CANVAS_ADDR_NOWRAP, |
904 | CANVAS_BLKMODE_LINEAR); |
905 | hw->buffer_spec[i].canvas_config[0].phy_addr = |
906 | hw->buffer_spec[i].y_addr; |
907 | hw->buffer_spec[i].canvas_config[0].width = |
908 | canvas_width; |
909 | hw->buffer_spec[i].canvas_config[0].height = |
910 | canvas_height; |
911 | hw->buffer_spec[i].canvas_config[0].block_mode = |
912 | CANVAS_BLKMODE_LINEAR; |
913 | |
914 | canvas_config(hw->buffer_spec[i].u_canvas_index, |
915 | hw->buffer_spec[i].u_addr, |
916 | canvas_width / 2, |
917 | canvas_height / 2, |
918 | CANVAS_ADDR_NOWRAP, |
919 | CANVAS_BLKMODE_LINEAR); |
920 | hw->buffer_spec[i].canvas_config[1].phy_addr = |
921 | hw->buffer_spec[i].u_addr; |
922 | hw->buffer_spec[i].canvas_config[1].width = |
923 | canvas_width / 2; |
924 | hw->buffer_spec[i].canvas_config[1].height = |
925 | canvas_height / 2; |
926 | hw->buffer_spec[i].canvas_config[1].block_mode = |
927 | CANVAS_BLKMODE_LINEAR; |
928 | |
929 | canvas_config(hw->buffer_spec[i].v_canvas_index, |
930 | hw->buffer_spec[i].v_addr, |
931 | canvas_width / 2, |
932 | canvas_height / 2, |
933 | CANVAS_ADDR_NOWRAP, |
934 | CANVAS_BLKMODE_LINEAR); |
935 | hw->buffer_spec[i].canvas_config[2].phy_addr = |
936 | hw->buffer_spec[i].v_addr; |
937 | hw->buffer_spec[i].canvas_config[2].width = |
938 | canvas_width / 2; |
939 | hw->buffer_spec[i].canvas_config[2].height = |
940 | canvas_height / 2; |
941 | hw->buffer_spec[i].canvas_config[2].block_mode = |
942 | CANVAS_BLKMODE_LINEAR; |
943 | |
944 | return 0; |
945 | } |
946 | |
947 | static int vmjpeg_get_buf_num(struct vdec_mjpeg_hw_s *hw) |
948 | { |
949 | int buf_num = DECODE_BUFFER_NUM_DEF; |
950 | |
951 | buf_num += hw->dynamic_buf_num_margin; |
952 | |
953 | if (buf_num > DECODE_BUFFER_NUM_MAX) |
954 | buf_num = DECODE_BUFFER_NUM_MAX; |
955 | |
956 | return buf_num; |
957 | } |
958 | |
959 | static bool is_enough_free_buffer(struct vdec_mjpeg_hw_s *hw) |
960 | { |
961 | int i; |
962 | |
963 | for (i = 0; i < hw->buf_num; i++) { |
964 | if (hw->vfbuf_use[i] == 0) |
965 | break; |
966 | } |
967 | |
968 | return i == hw->buf_num ? false : true; |
969 | } |
970 | |
971 | static int find_free_buffer(struct vdec_mjpeg_hw_s *hw) |
972 | { |
973 | int i; |
974 | |
975 | for (i = 0; i < hw->buf_num; i++) { |
976 | if (hw->vfbuf_use[i] == 0) |
977 | break; |
978 | } |
979 | |
980 | if (i == hw->buf_num) |
981 | return -1; |
982 | |
983 | if (hw->is_used_v4l) |
984 | if (vmjpeg_v4l_alloc_buff_config_canvas(hw, i)) |
985 | return -1; |
986 | |
987 | return i; |
988 | } |
989 | |
990 | static int vmjpeg_hw_ctx_restore(struct vdec_mjpeg_hw_s *hw) |
991 | { |
992 | struct buffer_spec_s *buff_spec; |
993 | int index, i; |
994 | |
995 | index = find_free_buffer(hw); |
996 | if (index < 0) |
997 | return -1; |
998 | |
999 | WRITE_VREG(DOS_SW_RESET0, (1 << 7) | (1 << 6)); |
1000 | WRITE_VREG(DOS_SW_RESET0, 0); |
1001 | |
1002 | if (!hw->init_flag) { |
1003 | vmjpeg_canvas_init(hw); |
1004 | } else { |
1005 | if (!hw->is_used_v4l) { |
1006 | for (i = 0; i < hw->buf_num; i++) { |
1007 | buff_spec = &hw->buffer_spec[i]; |
1008 | canvas_config_config(buff_spec->y_canvas_index, |
1009 | &buff_spec->canvas_config[0]); |
1010 | canvas_config_config(buff_spec->u_canvas_index, |
1011 | &buff_spec->canvas_config[1]); |
1012 | canvas_config_config(buff_spec->v_canvas_index, |
1013 | &buff_spec->canvas_config[2]); |
1014 | } |
1015 | } |
1016 | } |
1017 | |
1018 | /* find next decode buffer index */ |
1019 | WRITE_VREG(AV_SCRATCH_4, spec2canvas(&hw->buffer_spec[index])); |
1020 | WRITE_VREG(AV_SCRATCH_5, index); |
1021 | |
1022 | init_scaler(); |
1023 | |
1024 | /* clear buffer IN/OUT registers */ |
1025 | WRITE_VREG(MREG_TO_AMRISC, 0); |
1026 | WRITE_VREG(MREG_FROM_AMRISC, 0); |
1027 | |
1028 | WRITE_VREG(MCPU_INTR_MSK, 0xffff); |
1029 | WRITE_VREG(MREG_DECODE_PARAM, (hw->frame_height << 4) | 0x8000); |
1030 | |
1031 | /* clear mailbox interrupt */ |
1032 | WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1); |
1033 | /* enable mailbox interrupt */ |
1034 | WRITE_VREG(ASSIST_MBOX1_MASK, 1); |
1035 | /* set interrupt mapping for vld */ |
1036 | WRITE_VREG(ASSIST_AMR1_INT8, 8); |
1037 | #if 1/*MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6*/ |
1038 | CLEAR_VREG_MASK(MDEC_PIC_DC_CTRL, 1 << 17); |
1039 | #endif |
1040 | return 0; |
1041 | } |
1042 | |
1043 | static s32 vmjpeg_init(struct vdec_s *vdec) |
1044 | { |
1045 | int i; |
1046 | int size = -1, fw_size = 0x1000 * 16; |
1047 | struct firmware_s *fw = NULL; |
1048 | struct vdec_mjpeg_hw_s *hw = |
1049 | (struct vdec_mjpeg_hw_s *)vdec->private; |
1050 | |
1051 | fw = vmalloc(sizeof(struct firmware_s) + fw_size); |
1052 | if (IS_ERR_OR_NULL(fw)) |
1053 | return -ENOMEM; |
1054 | |
1055 | size = get_firmware_data(VIDEO_DEC_MJPEG_MULTI, fw->data); |
1056 | if (size < 0) { |
1057 | pr_err("get firmware fail."); |
1058 | vfree(fw); |
1059 | return -1; |
1060 | } |
1061 | |
1062 | fw->len = size; |
1063 | hw->fw = fw; |
1064 | |
1065 | hw->frame_width = hw->vmjpeg_amstream_dec_info.width; |
1066 | hw->frame_height = hw->vmjpeg_amstream_dec_info.height; |
1067 | hw->frame_dur = ((hw->vmjpeg_amstream_dec_info.rate) ? |
1068 | hw->vmjpeg_amstream_dec_info.rate : 3840); |
1069 | hw->saved_resolution = 0; |
1070 | hw->eos = 0; |
1071 | hw->init_flag = 0; |
1072 | hw->frame_num = 0; |
1073 | hw->put_num = 0; |
1074 | hw->run_count = 0; |
1075 | hw->not_run_ready = 0; |
1076 | hw->input_empty = 0; |
1077 | hw->peek_num = 0; |
1078 | hw->get_num = 0; |
1079 | for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) |
1080 | hw->vfbuf_use[i] = 0; |
1081 | |
1082 | INIT_KFIFO(hw->display_q); |
1083 | INIT_KFIFO(hw->newframe_q); |
1084 | |
1085 | for (i = 0; i < VF_POOL_SIZE; i++) { |
1086 | const struct vframe_s *vf = &hw->vfpool[i]; |
1087 | |
1088 | hw->vfpool[i].index = -1; |
1089 | kfifo_put(&hw->newframe_q, vf); |
1090 | } |
1091 | |
1092 | if (hw->mm_blk_handle) { |
1093 | decoder_bmmu_box_free(hw->mm_blk_handle); |
1094 | hw->mm_blk_handle = NULL; |
1095 | } |
1096 | |
1097 | hw->mm_blk_handle = decoder_bmmu_box_alloc_box( |
1098 | DRIVER_NAME, |
1099 | 0, |
1100 | MAX_BMMU_BUFFER_NUM, |
1101 | 4 + PAGE_SHIFT, |
1102 | CODEC_MM_FLAGS_CMA_CLEAR | |
1103 | CODEC_MM_FLAGS_FOR_VDECODER); |
1104 | |
1105 | init_timer(&hw->check_timer); |
1106 | |
1107 | hw->check_timer.data = (unsigned long)hw; |
1108 | hw->check_timer.function = check_timer_func; |
1109 | hw->check_timer.expires = jiffies + CHECK_INTERVAL; |
1110 | /*add_timer(&hw->check_timer);*/ |
1111 | hw->stat |= STAT_TIMER_ARM; |
1112 | hw->stat |= STAT_ISR_REG; |
1113 | |
1114 | WRITE_VREG(DECODE_STOP_POS, udebug_flag); |
1115 | INIT_WORK(&hw->work, vmjpeg_work); |
1116 | pr_info("w:h=%d:%d\n", hw->frame_width, hw->frame_height); |
1117 | return 0; |
1118 | } |
1119 | |
1120 | static unsigned long run_ready(struct vdec_s *vdec, |
1121 | unsigned long mask) |
1122 | { |
1123 | struct vdec_mjpeg_hw_s *hw = |
1124 | (struct vdec_mjpeg_hw_s *)vdec->private; |
1125 | hw->not_run_ready++; |
1126 | if (hw->eos) |
1127 | return 0; |
1128 | if (vdec_stream_based(vdec) && (hw->init_flag == 0) |
1129 | && pre_decode_buf_level != 0) { |
1130 | u32 rp, wp, level; |
1131 | |
1132 | rp = READ_PARSER_REG(PARSER_VIDEO_RP); |
1133 | wp = READ_PARSER_REG(PARSER_VIDEO_WP); |
1134 | if (wp < rp) |
1135 | level = vdec->input.size + wp - rp; |
1136 | else |
1137 | level = wp - rp; |
1138 | |
1139 | if (level < pre_decode_buf_level) |
1140 | return 0; |
1141 | } |
1142 | |
1143 | if (!is_enough_free_buffer(hw)) { |
1144 | hw->buffer_not_ready++; |
1145 | return 0; |
1146 | } |
1147 | |
1148 | hw->not_run_ready = 0; |
1149 | hw->buffer_not_ready = 0; |
1150 | if (vdec->parallel_dec == 1) |
1151 | return CORE_MASK_VDEC_1; |
1152 | else |
1153 | return CORE_MASK_VDEC_1 | CORE_MASK_HEVC; |
1154 | } |
1155 | |
1156 | static void run(struct vdec_s *vdec, unsigned long mask, |
1157 | void (*callback)(struct vdec_s *, void *), void *arg) |
1158 | { |
1159 | struct vdec_mjpeg_hw_s *hw = |
1160 | (struct vdec_mjpeg_hw_s *)vdec->private; |
1161 | int i, ret; |
1162 | |
1163 | hw->vdec_cb_arg = arg; |
1164 | hw->vdec_cb = callback; |
1165 | |
1166 | hw->run_count++; |
1167 | vdec_reset_core(vdec); |
1168 | for (i = 0; i < hw->buf_num; i++) { |
1169 | if (hw->vfbuf_use[i] == 0) |
1170 | break; |
1171 | } |
1172 | |
1173 | if (i == hw->buf_num) { |
1174 | hw->dec_result = DEC_RESULT_AGAIN; |
1175 | vdec_schedule_work(&hw->work); |
1176 | return; |
1177 | } |
1178 | |
1179 | ret = vdec_prepare_input(vdec, &hw->chunk); |
1180 | if (ret <= 0) { |
1181 | hw->input_empty++; |
1182 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW, |
1183 | "%s: %d,r=%d,buftl=%x:%x:%x\n", |
1184 | __func__, __LINE__, ret, |
1185 | READ_VREG(VLD_MEM_VIFIFO_BUF_CNTL), |
1186 | READ_PARSER_REG(PARSER_VIDEO_WP), |
1187 | READ_VREG(VLD_MEM_VIFIFO_WP)); |
1188 | |
1189 | hw->dec_result = DEC_RESULT_AGAIN; |
1190 | vdec_schedule_work(&hw->work); |
1191 | return; |
1192 | } |
1193 | hw->input_empty = 0; |
1194 | hw->dec_result = DEC_RESULT_NONE; |
1195 | if (vdec->mc_loaded) { |
1196 | /*firmware have load before, |
1197 | and not changes to another. |
1198 | ignore reload. |
1199 | */ |
1200 | } else { |
1201 | ret = amvdec_vdec_loadmc_ex(VFORMAT_MJPEG, "mmjpeg", vdec, hw->fw->data); |
1202 | if (ret < 0) { |
1203 | pr_err("[%d] MMJPEG: the %s fw loading failed, err: %x\n", |
1204 | vdec->id, tee_enabled() ? "TEE" : "local", ret); |
1205 | hw->dec_result = DEC_RESULT_FORCE_EXIT; |
1206 | vdec_schedule_work(&hw->work); |
1207 | return; |
1208 | } |
1209 | vdec->mc_loaded = 1; |
1210 | vdec->mc_type = VFORMAT_MJPEG; |
1211 | } |
1212 | /* if (amvdec_vdec_loadmc_buf_ex(vdec, hw->fw->data, hw->fw->len) < 0) { |
1213 | pr_err("%s: Error amvdec_loadmc fail\n", __func__); |
1214 | return; |
1215 | }*/ |
1216 | |
1217 | if (vmjpeg_hw_ctx_restore(hw) < 0) { |
1218 | hw->dec_result = DEC_RESULT_ERROR; |
1219 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
1220 | "amvdec_mmjpeg: error HW context restore\n"); |
1221 | vdec_schedule_work(&hw->work); |
1222 | return; |
1223 | } |
1224 | #if 0 |
1225 | vdec_enable_input(vdec); |
1226 | mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL); |
1227 | #endif |
1228 | hw->stat |= STAT_MC_LOAD; |
1229 | start_process_time(hw); |
1230 | hw->last_vld_level = 0; |
1231 | mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL); |
1232 | amvdec_start(); |
1233 | vdec_enable_input(vdec); |
1234 | hw->stat |= STAT_VDEC_RUN; |
1235 | hw->init_flag = 1; |
1236 | |
1237 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW, |
1238 | "%s (0x%x 0x%x 0x%x) vldcrl 0x%x bitcnt 0x%x powerctl 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", |
1239 | __func__, |
1240 | READ_VREG(VLD_MEM_VIFIFO_LEVEL), |
1241 | READ_VREG(VLD_MEM_VIFIFO_WP), |
1242 | READ_VREG(VLD_MEM_VIFIFO_RP), |
1243 | READ_VREG(VLD_DECODE_CONTROL), |
1244 | READ_VREG(VIFF_BIT_CNT), |
1245 | READ_VREG(POWER_CTL_VLD), |
1246 | READ_VREG(VLD_MEM_VIFIFO_START_PTR), |
1247 | READ_VREG(VLD_MEM_VIFIFO_CURR_PTR), |
1248 | READ_VREG(VLD_MEM_VIFIFO_CONTROL), |
1249 | READ_VREG(VLD_MEM_VIFIFO_BUF_CNTL), |
1250 | READ_VREG(VLD_MEM_VIFIFO_END_PTR)); |
1251 | } |
1252 | static void wait_vmjpeg_search_done(struct vdec_mjpeg_hw_s *hw) |
1253 | { |
1254 | u32 vld_rp = READ_VREG(VLD_MEM_VIFIFO_RP); |
1255 | int count = 0; |
1256 | |
1257 | do { |
1258 | usleep_range(100, 500); |
1259 | if (vld_rp == READ_VREG(VLD_MEM_VIFIFO_RP)) |
1260 | break; |
1261 | if (count > 1000) { |
1262 | mmjpeg_debug_print(DECODE_ID(hw), 0, |
1263 | "%s, count %d vld_rp 0x%x VLD_MEM_VIFIFO_RP 0x%x\n", |
1264 | __func__, count, vld_rp, READ_VREG(VLD_MEM_VIFIFO_RP)); |
1265 | break; |
1266 | } else |
1267 | vld_rp = READ_VREG(VLD_MEM_VIFIFO_RP); |
1268 | count++; |
1269 | } while (1); |
1270 | } |
1271 | |
1272 | static int notify_v4l_eos(struct vdec_s *vdec) |
1273 | { |
1274 | struct vdec_mjpeg_hw_s *hw = (struct vdec_mjpeg_hw_s *)vdec->private; |
1275 | struct aml_vcodec_ctx *ctx = (struct aml_vcodec_ctx *)(hw->v4l2_ctx); |
1276 | struct vframe_s *vf = NULL; |
1277 | struct vdec_v4l2_buffer *fb = NULL; |
1278 | |
1279 | if (hw->is_used_v4l && hw->eos) { |
1280 | if (kfifo_get(&hw->newframe_q, &vf) == 0 || vf == NULL) { |
1281 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR, |
1282 | "%s fatal error, no available buffer slot.\n", |
1283 | __func__); |
1284 | return -1; |
1285 | } |
1286 | |
1287 | if (vdec_v4l_get_buffer(hw->v4l2_ctx, &fb)) { |
1288 | pr_err("[%d] get fb fail.\n", ctx->id); |
1289 | return -1; |
1290 | } |
1291 | |
1292 | vf->timestamp = ULONG_MAX; |
1293 | vf->v4l_mem_handle = (unsigned long)fb; |
1294 | vf->flag = VFRAME_FLAG_EMPTY_FRAME_V4L; |
1295 | |
1296 | kfifo_put(&hw->display_q, (const struct vframe_s *)vf); |
1297 | vf_notify_receiver(vdec->vf_provider_name, |
1298 | VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL); |
1299 | |
1300 | pr_info("[%d] mpeg12 EOS notify.\n", ctx->id); |
1301 | } |
1302 | |
1303 | return 0; |
1304 | } |
1305 | |
1306 | static void vmjpeg_work(struct work_struct *work) |
1307 | { |
1308 | struct vdec_mjpeg_hw_s *hw = container_of(work, |
1309 | struct vdec_mjpeg_hw_s, work); |
1310 | struct vdec_s *vdec = hw_to_vdec(hw); |
1311 | |
1312 | mmjpeg_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL, |
1313 | "%s: result=%d,len=%d:%d\n", |
1314 | __func__, hw->dec_result, |
1315 | kfifo_len(&hw->newframe_q), |
1316 | kfifo_len(&hw->display_q)); |
1317 | if (hw->dec_result == DEC_RESULT_DONE) { |
1318 | vdec_vframe_dirty(hw_to_vdec(hw), hw->chunk); |
1319 | hw->chunk = NULL; |
1320 | } else if (hw->dec_result == DEC_RESULT_AGAIN) { |
1321 | /* |
1322 | stream base: stream buf empty or timeout |
1323 | frame base: vdec_prepare_input fail |
1324 | */ |
1325 | if (!vdec_has_more_input(hw_to_vdec(hw))) { |
1326 | hw->dec_result = DEC_RESULT_EOS; |
1327 | vdec_schedule_work(&hw->work); |
1328 | /*pr_info("%s: return\n", |
1329 | __func__);*/ |
1330 | return; |
1331 | } |
1332 | } else if (hw->dec_result == DEC_RESULT_FORCE_EXIT) { |
1333 | pr_info("%s: force exit\n", __func__); |
1334 | if (hw->stat & STAT_ISR_REG) { |
1335 | amvdec_stop(); |
1336 | vdec_free_irq(VDEC_IRQ_1, (void *)hw); |
1337 | hw->stat &= ~STAT_ISR_REG; |
1338 | } |
1339 | } else if (hw->dec_result == DEC_RESULT_EOS) { |
1340 | pr_info("%s: end of stream\n", __func__); |
1341 | if (hw->stat & STAT_VDEC_RUN) { |
1342 | amvdec_stop(); |
1343 | hw->stat &= ~STAT_VDEC_RUN; |
1344 | } |
1345 | hw->eos = 1; |
1346 | if (hw->is_used_v4l) |
1347 | notify_v4l_eos(vdec); |
1348 | |
1349 | vdec_vframe_dirty(hw_to_vdec(hw), hw->chunk); |
1350 | hw->chunk = NULL; |
1351 | vdec_clean_input(hw_to_vdec(hw)); |
1352 | } |
1353 | if (hw->stat & STAT_VDEC_RUN) { |
1354 | amvdec_stop(); |
1355 | hw->stat &= ~STAT_VDEC_RUN; |
1356 | } |
1357 | /*disable mbox interrupt */ |
1358 | WRITE_VREG(ASSIST_MBOX1_MASK, 0); |
1359 | wait_vmjpeg_search_done(hw); |
1360 | /* mark itself has all HW resource released and input released */ |
1361 | if (vdec->parallel_dec == 1) |
1362 | vdec_core_finish_run(hw_to_vdec(hw), CORE_MASK_VDEC_1); |
1363 | else { |
1364 | vdec_core_finish_run(hw_to_vdec(hw), CORE_MASK_VDEC_1 |
1365 | | CORE_MASK_HEVC); |
1366 | } |
1367 | del_timer_sync(&hw->check_timer); |
1368 | hw->stat &= ~STAT_TIMER_ARM; |
1369 | |
1370 | if (hw->vdec_cb) |
1371 | hw->vdec_cb(hw_to_vdec(hw), hw->vdec_cb_arg); |
1372 | } |
1373 | |
1374 | static int vmjpeg_stop(struct vdec_mjpeg_hw_s *hw) |
1375 | { |
1376 | pr_info("%s ...count = %d\n", __func__, hw->frame_num); |
1377 | |
1378 | if (hw->stat & STAT_VDEC_RUN) { |
1379 | amvdec_stop(); |
1380 | pr_info("%s amvdec_stop\n", __func__); |
1381 | hw->stat &= ~STAT_VDEC_RUN; |
1382 | } |
1383 | |
1384 | if (hw->stat & STAT_ISR_REG) { |
1385 | vdec_free_irq(VDEC_IRQ_1, (void *)hw); |
1386 | hw->stat &= ~STAT_ISR_REG; |
1387 | } |
1388 | |
1389 | if (hw->stat & STAT_TIMER_ARM) { |
1390 | del_timer_sync(&hw->check_timer); |
1391 | hw->stat &= ~STAT_TIMER_ARM; |
1392 | } |
1393 | cancel_work_sync(&hw->work); |
1394 | hw->init_flag = 0; |
1395 | |
1396 | if (hw->mm_blk_handle) { |
1397 | decoder_bmmu_box_free(hw->mm_blk_handle); |
1398 | hw->mm_blk_handle = NULL; |
1399 | } |
1400 | |
1401 | if (hw->fw) { |
1402 | vfree(hw->fw); |
1403 | hw->fw = NULL; |
1404 | } |
1405 | |
1406 | return 0; |
1407 | } |
1408 | |
1409 | static int ammvdec_mjpeg_probe(struct platform_device *pdev) |
1410 | { |
1411 | struct vdec_s *pdata = *(struct vdec_s **)pdev->dev.platform_data; |
1412 | struct vdec_mjpeg_hw_s *hw = NULL; |
1413 | int config_val = 0; |
1414 | |
1415 | if (pdata == NULL) { |
1416 | pr_info("ammvdec_mjpeg memory resource undefined.\n"); |
1417 | return -EFAULT; |
1418 | } |
1419 | |
1420 | hw = vzalloc(sizeof(struct vdec_mjpeg_hw_s)); |
1421 | if (hw == NULL) { |
1422 | pr_info("\nammvdec_mjpeg device data allocation failed\n"); |
1423 | return -ENOMEM; |
1424 | } |
1425 | |
1426 | /* the ctx from v4l2 driver. */ |
1427 | hw->v4l2_ctx = pdata->private; |
1428 | |
1429 | pdata->private = hw; |
1430 | pdata->dec_status = vmjpeg_dec_status; |
1431 | |
1432 | pdata->run = run; |
1433 | pdata->run_ready = run_ready; |
1434 | pdata->irq_handler = vmjpeg_isr; |
1435 | pdata->dump_state = vmjpeg_dump_state; |
1436 | |
1437 | if (pdata->parallel_dec == 1) { |
1438 | int i; |
1439 | for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) { |
1440 | hw->buffer_spec[i].y_canvas_index = -1; |
1441 | hw->buffer_spec[i].u_canvas_index = -1; |
1442 | hw->buffer_spec[i].v_canvas_index = -1; |
1443 | } |
1444 | } |
1445 | |
1446 | if (pdata->use_vfm_path) |
1447 | snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE, |
1448 | VFM_DEC_PROVIDER_NAME); |
1449 | else |
1450 | snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE, |
1451 | PROVIDER_NAME ".%02x", pdev->id & 0xff); |
1452 | |
1453 | platform_set_drvdata(pdev, pdata); |
1454 | hw->platform_dev = pdev; |
1455 | |
1456 | if (((debug_enable & IGNORE_PARAM_FROM_CONFIG) == 0) && pdata->config_len) { |
1457 | mmjpeg_debug_print(DECODE_ID(hw), 0, "pdata->config: %s\n", pdata->config); |
1458 | if (get_config_int(pdata->config, "parm_v4l_buffer_margin", |
1459 | &config_val) == 0) |
1460 | hw->dynamic_buf_num_margin = config_val; |
1461 | else |
1462 | hw->dynamic_buf_num_margin = dynamic_buf_num_margin; |
1463 | } else { |
1464 | hw->dynamic_buf_num_margin = dynamic_buf_num_margin; |
1465 | } |
1466 | |
1467 | hw->buf_num = vmjpeg_get_buf_num(hw); |
1468 | |
1469 | vf_provider_init(&pdata->vframe_provider, pdata->vf_provider_name, |
1470 | &vf_provider_ops, pdata); |
1471 | |
1472 | if (pdata->sys_info) { |
1473 | hw->vmjpeg_amstream_dec_info = *pdata->sys_info; |
1474 | hw->is_used_v4l = (((unsigned long) |
1475 | hw->vmjpeg_amstream_dec_info.param & 0x80) >> 7); |
1476 | } |
1477 | |
1478 | vdec_source_changed(VFORMAT_MJPEG, |
1479 | 1920, 1080, 60); |
1480 | if (vmjpeg_init(pdata) < 0) { |
1481 | pr_info("ammvdec_mjpeg init failed.\n"); |
1482 | if (hw) { |
1483 | vfree(hw); |
1484 | hw = NULL; |
1485 | } |
1486 | pdata->dec_status = NULL; |
1487 | return -ENODEV; |
1488 | } |
1489 | vdec_set_prepare_level(pdata, start_decode_buf_level); |
1490 | |
1491 | if (pdata->parallel_dec == 1) |
1492 | vdec_core_request(pdata, CORE_MASK_VDEC_1); |
1493 | else { |
1494 | vdec_core_request(pdata, CORE_MASK_VDEC_1 | CORE_MASK_HEVC |
1495 | | CORE_MASK_COMBINE); |
1496 | } |
1497 | |
1498 | return 0; |
1499 | } |
1500 | |
1501 | static int ammvdec_mjpeg_remove(struct platform_device *pdev) |
1502 | { |
1503 | struct vdec_mjpeg_hw_s *hw = |
1504 | (struct vdec_mjpeg_hw_s *) |
1505 | (((struct vdec_s *)(platform_get_drvdata(pdev)))->private); |
1506 | struct vdec_s *vdec = hw_to_vdec(hw); |
1507 | int i; |
1508 | |
1509 | vmjpeg_stop(hw); |
1510 | |
1511 | if (vdec->parallel_dec == 1) |
1512 | vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1); |
1513 | else |
1514 | vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1 | CORE_MASK_HEVC); |
1515 | vdec_set_status(hw_to_vdec(hw), VDEC_STATUS_DISCONNECTED); |
1516 | if (vdec->parallel_dec == 1) { |
1517 | for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) { |
1518 | vdec->free_canvas_ex(hw->buffer_spec[i].y_canvas_index, vdec->id); |
1519 | vdec->free_canvas_ex(hw->buffer_spec[i].u_canvas_index, vdec->id); |
1520 | vdec->free_canvas_ex(hw->buffer_spec[i].v_canvas_index, vdec->id); |
1521 | } |
1522 | } |
1523 | if (hw) { |
1524 | vfree(hw); |
1525 | hw = NULL; |
1526 | } |
1527 | pr_info("%s\n", __func__); |
1528 | return 0; |
1529 | } |
1530 | |
1531 | /****************************************/ |
1532 | #ifdef CONFIG_PM |
1533 | static int mmjpeg_suspend(struct device *dev) |
1534 | { |
1535 | amvdec_suspend(to_platform_device(dev), dev->power.power_state); |
1536 | return 0; |
1537 | } |
1538 | |
1539 | static int mmjpeg_resume(struct device *dev) |
1540 | { |
1541 | amvdec_resume(to_platform_device(dev)); |
1542 | return 0; |
1543 | } |
1544 | |
1545 | static const struct dev_pm_ops mmjpeg_pm_ops = { |
1546 | SET_SYSTEM_SLEEP_PM_OPS(mmjpeg_suspend, mmjpeg_resume) |
1547 | }; |
1548 | #endif |
1549 | |
1550 | static struct platform_driver ammvdec_mjpeg_driver = { |
1551 | .probe = ammvdec_mjpeg_probe, |
1552 | .remove = ammvdec_mjpeg_remove, |
1553 | .driver = { |
1554 | .name = DRIVER_NAME, |
1555 | #ifdef CONFIG_PM |
1556 | .pm = &mmjpeg_pm_ops, |
1557 | #endif |
1558 | } |
1559 | }; |
1560 | |
1561 | static struct codec_profile_t ammvdec_mjpeg_profile = { |
1562 | .name = "mmjpeg", |
1563 | .profile = "" |
1564 | }; |
1565 | |
1566 | static int __init ammvdec_mjpeg_driver_init_module(void) |
1567 | { |
1568 | if (platform_driver_register(&ammvdec_mjpeg_driver)) { |
1569 | pr_err("failed to register ammvdec_mjpeg driver\n"); |
1570 | return -ENODEV; |
1571 | } |
1572 | vcodec_profile_register(&ammvdec_mjpeg_profile); |
1573 | return 0; |
1574 | } |
1575 | |
1576 | static void __exit ammvdec_mjpeg_driver_remove_module(void) |
1577 | { |
1578 | platform_driver_unregister(&ammvdec_mjpeg_driver); |
1579 | } |
1580 | |
1581 | /****************************************/ |
1582 | module_param(debug_enable, uint, 0664); |
1583 | MODULE_PARM_DESC(debug_enable, "\n debug enable\n"); |
1584 | module_param(pre_decode_buf_level, int, 0664); |
1585 | MODULE_PARM_DESC(pre_decode_buf_level, |
1586 | "\n ammvdec_h264 pre_decode_buf_level\n"); |
1587 | module_param(udebug_flag, uint, 0664); |
1588 | MODULE_PARM_DESC(udebug_flag, "\n amvdec_mmpeg12 udebug_flag\n"); |
1589 | |
1590 | module_param(dynamic_buf_num_margin, uint, 0664); |
1591 | MODULE_PARM_DESC(dynamic_buf_num_margin, "\n dynamic_buf_num_margin\n"); |
1592 | |
1593 | module_param(decode_timeout_val, uint, 0664); |
1594 | MODULE_PARM_DESC(decode_timeout_val, "\n ammvdec_mjpeg decode_timeout_val\n"); |
1595 | |
1596 | module_param_array(max_process_time, uint, &max_decode_instance_num, 0664); |
1597 | |
1598 | module_param(radr, uint, 0664); |
1599 | MODULE_PARM_DESC(radr, "\nradr\n"); |
1600 | |
1601 | module_param(start_decode_buf_level, uint, 0664); |
1602 | MODULE_PARM_DESC(start_decode_buf_level, "\nstart_decode_buf_level\n"); |
1603 | |
1604 | module_param(rval, uint, 0664); |
1605 | MODULE_PARM_DESC(rval, "\nrval\n"); |
1606 | |
1607 | module_param(without_display_mode, uint, 0664); |
1608 | MODULE_PARM_DESC(without_display_mode, "\n without_display_mode\n"); |
1609 | |
1610 | module_init(ammvdec_mjpeg_driver_init_module); |
1611 | module_exit(ammvdec_mjpeg_driver_remove_module); |
1612 | |
1613 | MODULE_DESCRIPTION("AMLOGIC MJMPEG Video Decoder Driver"); |
1614 | MODULE_LICENSE("GPL"); |
1615 | MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>"); |
1616 |