blob: aa736132fdce9a21a95450705eef84162ad983d4
1 | /* |
2 | * drivers/amlogic/amports/vmpeg4.c |
3 | * |
4 | * Copyright (C) 2015 Amlogic, Inc. All rights reserved. |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or |
9 | * (at your option) any later version. |
10 | * |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
14 | * more details. |
15 | * |
16 | */ |
17 | |
18 | #include <linux/kernel.h> |
19 | #include <linux/module.h> |
20 | #include <linux/types.h> |
21 | #include <linux/errno.h> |
22 | #include <linux/interrupt.h> |
23 | #include <linux/timer.h> |
24 | #include <linux/kfifo.h> |
25 | #include <linux/platform_device.h> |
26 | #include <linux/dma-mapping.h> |
27 | #include <linux/amlogic/media/utils/amstream.h> |
28 | #include <linux/amlogic/media/frame_sync/ptsserv.h> |
29 | |
30 | #include <linux/amlogic/media/vfm/vframe.h> |
31 | #include <linux/amlogic/media/vfm/vframe_provider.h> |
32 | #include <linux/amlogic/media/vfm/vframe_receiver.h> |
33 | #include <linux/amlogic/media/canvas/canvas.h> |
34 | #include <linux/amlogic/media/codec_mm/codec_mm.h> |
35 | #include <linux/amlogic/tee.h> |
36 | #include <linux/amlogic/media/utils/vdec_reg.h> |
37 | #include <linux/amlogic/media/registers/register.h> |
38 | #include "../../../stream_input/amports/amports_priv.h" |
39 | |
40 | #include "../utils/amvdec.h" |
41 | #include "../utils/vdec_input.h" |
42 | #include "../utils/vdec.h" |
43 | #include "../utils/firmware.h" |
44 | #include "../utils/decoder_mmu_box.h" |
45 | #include "../utils/decoder_bmmu_box.h" |
46 | #include <linux/amlogic/media/codec_mm/configs.h> |
47 | #include "../utils/firmware.h" |
48 | #include "../utils/vdec_v4l2_buffer_ops.h" |
49 | #include "../utils/config_parser.h" |
50 | |
51 | #define DRIVER_NAME "ammvdec_mpeg4" |
52 | #define MODULE_NAME "ammvdec_mpeg4" |
53 | |
54 | #define MEM_NAME "codec_mmpeg4" |
55 | |
56 | #define DEBUG_PTS |
57 | |
58 | #define NV21 |
59 | #define I_PICTURE 0 |
60 | #define P_PICTURE 1 |
61 | #define B_PICTURE 2 |
62 | #define GET_PIC_TYPE(type) ("IPB####"[type&0x3]) |
63 | |
64 | #define ORI_BUFFER_START_ADDR 0x01000000 |
65 | #define DEFAULT_MEM_SIZE (32*SZ_1M) |
66 | |
67 | #define INTERLACE_FLAG 0x80 |
68 | #define TOP_FIELD_FIRST_FLAG 0x40 |
69 | |
70 | /* protocol registers */ |
71 | #define MREG_REF0 AV_SCRATCH_1 |
72 | #define MREG_REF1 AV_SCRATCH_2 |
73 | #define MP4_PIC_RATIO AV_SCRATCH_5 |
74 | #define MP4_RATE AV_SCRATCH_3 |
75 | #define MP4_ERR_COUNT AV_SCRATCH_6 |
76 | #define MP4_PIC_WH AV_SCRATCH_7 |
77 | #define MREG_INPUT AV_SCRATCH_8 |
78 | #define MREG_BUFFEROUT AV_SCRATCH_9 |
79 | #define MP4_NOT_CODED_CNT AV_SCRATCH_A |
80 | #define MP4_VOP_TIME_INC AV_SCRATCH_B |
81 | #define MP4_OFFSET_REG AV_SCRATCH_C |
82 | #define MP4_SYS_RATE AV_SCRATCH_E |
83 | #define MEM_OFFSET_REG AV_SCRATCH_F |
84 | |
85 | #define PARC_FORBIDDEN 0 |
86 | #define PARC_SQUARE 1 |
87 | #define PARC_CIF 2 |
88 | #define PARC_10_11 3 |
89 | #define PARC_16_11 4 |
90 | #define PARC_40_33 5 |
91 | #define PARC_RESERVED 6 |
92 | /* values between 6 and 14 are reserved */ |
93 | #define PARC_EXTENDED 15 |
94 | |
95 | #define VF_POOL_SIZE 64 |
96 | #define DECODE_BUFFER_NUM_MAX 16 |
97 | #define DECODE_BUFFER_NUM_DEF 8 |
98 | #define PUT_INTERVAL (HZ/100) |
99 | #define MAX_BMMU_BUFFER_NUM (DECODE_BUFFER_NUM_MAX + 1) |
100 | #define WORKSPACE_SIZE (12*SZ_64K) |
101 | static u32 buf_size = 32 * 1024 * 1024; |
102 | |
103 | #define CTX_LMEM_SWAP_OFFSET 0 |
104 | #define CTX_QUANT_MATRIX_OFFSET 0x800 |
105 | /* dcac buffer must align at 4k boundary */ |
106 | #define CTX_DCAC_BUF_OFFSET 0x1000 |
107 | #define CTX_DECBUF_OFFSET (0x0c0000 + 0x1000) |
108 | |
109 | #define RATE_DETECT_COUNT 5 |
110 | #define DURATION_UNIT 96000 |
111 | #define PTS_UNIT 90000 |
112 | #define CHECK_INTERVAL (HZ/100) |
113 | |
114 | #define DUR2PTS(x) ((x) - ((x) >> 4)) |
115 | |
116 | /* 96000/(60fps* 2field) = 800, 96000/10fps = 9600 */ |
117 | #define MPEG4_VALID_DUR(x) ((x < 9600) && (x > 799)) |
118 | |
119 | #define MAX_MPEG4_SUPPORT_SIZE (1920*1088) |
120 | |
121 | #define DEC_RESULT_NONE 0 |
122 | #define DEC_RESULT_DONE 1 |
123 | #define DEC_RESULT_AGAIN 2 |
124 | #define DEC_RESULT_ERROR 3 |
125 | #define DEC_RESULT_FORCE_EXIT 4 |
126 | #define DEC_RESULT_EOS 5 |
127 | #define DEC_RESULT_UNFINISH 6 |
128 | |
129 | #define DEC_DECODE_TIMEOUT 0x21 |
130 | #define DECODE_ID(hw) (hw_to_vdec(hw)->id) |
131 | #define DECODE_STOP_POS AV_SCRATCH_K |
132 | static u32 udebug_flag; |
133 | |
134 | static struct vframe_s *vmpeg_vf_peek(void *); |
135 | static struct vframe_s *vmpeg_vf_get(void *); |
136 | static void vmpeg_vf_put(struct vframe_s *, void *); |
137 | static int vmpeg_vf_states(struct vframe_states *states, void *); |
138 | static int vmpeg_event_cb(int type, void *data, void *private_data); |
139 | static int pre_decode_buf_level = 0x800; |
140 | static int start_decode_buf_level = 0x4000; |
141 | static int debug_enable; |
142 | static unsigned int radr; |
143 | static unsigned int rval; |
144 | /* 0x40bit = 8byte */ |
145 | static unsigned int frmbase_cont_bitlevel = 0x40; |
146 | static unsigned int dynamic_buf_num_margin; |
147 | |
148 | #define VMPEG4_DEV_NUM 9 |
149 | static unsigned int max_decode_instance_num = VMPEG4_DEV_NUM; |
150 | static unsigned int max_process_time[VMPEG4_DEV_NUM]; |
151 | static unsigned int decode_timeout_val = 200; |
152 | |
153 | static u32 without_display_mode; |
154 | |
155 | #undef pr_info |
156 | #define pr_info printk |
157 | unsigned int mpeg4_debug_mask = 0xff; |
158 | |
159 | #define PRINT_FLAG_ERROR 0x0 |
160 | #define PRINT_FLAG_RUN_FLOW 0X0001 |
161 | #define PRINT_FLAG_TIMEINFO 0x0002 |
162 | #define PRINT_FLAG_UCODE_DETAIL 0x0004 |
163 | #define PRINT_FLAG_VLD_DETAIL 0x0008 |
164 | #define PRINT_FLAG_DEC_DETAIL 0x0010 |
165 | #define PRINT_FLAG_BUFFER_DETAIL 0x0020 |
166 | #define PRINT_FLAG_RESTORE 0x0040 |
167 | #define PRINT_FRAME_NUM 0x0080 |
168 | #define PRINT_FLAG_FORCE_DONE 0x0100 |
169 | #define PRINT_FLAG_COUNTER 0X0200 |
170 | #define PRINT_FRAMEBASE_DATA 0x0400 |
171 | #define PRINT_FLAG_VDEC_STATUS 0x0800 |
172 | #define PRINT_FLAG_TIMEOUT_STATUS 0x1000 |
173 | #define PRINT_FLAG_V4L_DETAIL 0x8000 |
174 | #define IGNORE_PARAM_FROM_CONFIG 0x8000000 |
175 | |
176 | int mmpeg4_debug_print(int index, int debug_flag, const char *fmt, ...) |
177 | { |
178 | if (((debug_enable & debug_flag) && |
179 | ((1 << index) & mpeg4_debug_mask)) |
180 | || (debug_flag == PRINT_FLAG_ERROR)) { |
181 | unsigned char buf[512]; |
182 | int len = 0; |
183 | va_list args; |
184 | va_start(args, fmt); |
185 | len = sprintf(buf, "%d: ", index); |
186 | vsnprintf(buf + len, 512-len, fmt, args); |
187 | pr_info("%s", buf); |
188 | va_end(args); |
189 | } |
190 | return 0; |
191 | } |
192 | |
193 | struct pic_info_t { |
194 | int index; |
195 | u32 pic_type; |
196 | u32 pic_info; |
197 | u32 pts; |
198 | u64 pts64; |
199 | bool pts_valid; |
200 | u32 duration; |
201 | u32 repeat_cnt; |
202 | ulong v4l_ref_buf_addr; |
203 | u32 hw_decode_time; |
204 | u32 frame_size; // For frame base mode; |
205 | }; |
206 | |
207 | struct vdec_mpeg4_hw_s { |
208 | spinlock_t lock; |
209 | struct platform_device *platform_dev; |
210 | /* struct device *cma_dev; */ |
211 | |
212 | DECLARE_KFIFO(newframe_q, struct vframe_s *, VF_POOL_SIZE); |
213 | DECLARE_KFIFO(display_q, struct vframe_s *, VF_POOL_SIZE); |
214 | struct vframe_s vfpool[VF_POOL_SIZE]; |
215 | |
216 | s32 vfbuf_use[DECODE_BUFFER_NUM_MAX]; |
217 | u32 frame_width; |
218 | u32 frame_height; |
219 | u32 frame_dur; |
220 | u32 frame_prog; |
221 | |
222 | u32 ctx_valid; |
223 | u32 reg_vcop_ctrl_reg; |
224 | u32 reg_pic_head_info; |
225 | u32 reg_mpeg1_2_reg; |
226 | u32 reg_slice_qp; |
227 | u32 reg_mp4_pic_wh; |
228 | u32 reg_mp4_rate; |
229 | u32 reg_mb_info; |
230 | u32 reg_dc_ac_ctrl; |
231 | u32 reg_iqidct_control; |
232 | u32 reg_resync_marker_length; |
233 | u32 reg_rv_ai_mb_count; |
234 | struct timer_list check_timer; |
235 | u32 decode_timeout_count; |
236 | u32 timeout_cnt; |
237 | unsigned long int start_process_time; |
238 | |
239 | u32 last_vld_level; |
240 | u8 init_flag; |
241 | u32 eos; |
242 | void *mm_blk_handle; |
243 | |
244 | struct vframe_chunk_s *chunk; |
245 | u32 chunk_offset; |
246 | u32 chunk_size; |
247 | u32 chunk_frame_count; |
248 | u32 stat; |
249 | unsigned long buf_start; |
250 | u32 buf_size; |
251 | /* |
252 | unsigned long cma_alloc_addr; |
253 | int cma_alloc_count; |
254 | */ |
255 | u32 vmpeg4_ratio; |
256 | u64 vmpeg4_ratio64; |
257 | u32 rate_detect; |
258 | u32 vmpeg4_rotation; |
259 | u32 total_frame; |
260 | u32 last_vop_time_inc; |
261 | u32 last_duration; |
262 | u32 last_anch_pts; |
263 | u32 vop_time_inc_since_last_anch; |
264 | u32 frame_num_since_last_anch; |
265 | u64 last_anch_pts_us64; |
266 | |
267 | u32 last_pts; |
268 | u64 last_pts64; |
269 | u32 pts_hit; |
270 | u32 pts_missed; |
271 | u32 pts_i_hit; |
272 | u32 pts_i_missed; |
273 | struct pic_info_t pic[DECODE_BUFFER_NUM_MAX]; |
274 | u32 canvas_spec[DECODE_BUFFER_NUM_MAX]; |
275 | #ifdef NV21 |
276 | struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][2]; |
277 | #else |
278 | struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][3]; |
279 | #endif |
280 | struct dec_sysinfo vmpeg4_amstream_dec_info; |
281 | |
282 | s32 refs[2]; |
283 | int dec_result; |
284 | struct work_struct work; |
285 | |
286 | void (*vdec_cb)(struct vdec_s *, void *); |
287 | void *vdec_cb_arg; |
288 | u32 frame_num; |
289 | u32 put_num; |
290 | u32 sys_mp4_rate; |
291 | u32 run_count; |
292 | u32 not_run_ready; |
293 | u32 buffer_not_ready; |
294 | u32 input_empty; |
295 | u32 peek_num; |
296 | u32 get_num; |
297 | u32 first_i_frame_ready; |
298 | u32 drop_frame_count; |
299 | u32 unstable_pts; |
300 | u32 last_dec_pts; |
301 | |
302 | struct firmware_s *fw; |
303 | u32 blkmode; |
304 | wait_queue_head_t wait_q; |
305 | bool is_used_v4l; |
306 | void *v4l2_ctx; |
307 | bool v4l_params_parsed; |
308 | u32 buf_num; |
309 | u32 dynamic_buf_num_margin; |
310 | u32 i_only; |
311 | }; |
312 | static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw); |
313 | static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw); |
314 | static unsigned char |
315 | get_data_check_sum(struct vdec_mpeg4_hw_s *hw, int size); |
316 | |
317 | #define PROVIDER_NAME "vdec.mpeg4" |
318 | |
319 | /* |
320 | *int query_video_status(int type, int *value); |
321 | */ |
322 | static const struct vframe_operations_s vf_provider_ops = { |
323 | .peek = vmpeg_vf_peek, |
324 | .get = vmpeg_vf_get, |
325 | .put = vmpeg_vf_put, |
326 | .event_cb = vmpeg_event_cb, |
327 | .vf_states = vmpeg_vf_states, |
328 | }; |
329 | |
330 | static unsigned char aspect_ratio_table[16] = { |
331 | PARC_FORBIDDEN, |
332 | PARC_SQUARE, |
333 | PARC_CIF, |
334 | PARC_10_11, |
335 | PARC_16_11, |
336 | PARC_40_33, |
337 | PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, |
338 | PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, |
339 | PARC_RESERVED, PARC_EXTENDED |
340 | }; |
341 | |
342 | static void reset_process_time(struct vdec_mpeg4_hw_s *hw); |
343 | |
344 | |
345 | static int vmpeg4_get_buf_num(struct vdec_mpeg4_hw_s *hw) |
346 | { |
347 | int buf_num = DECODE_BUFFER_NUM_DEF; |
348 | |
349 | buf_num += hw->dynamic_buf_num_margin; |
350 | if (buf_num > DECODE_BUFFER_NUM_MAX) |
351 | buf_num = DECODE_BUFFER_NUM_MAX; |
352 | |
353 | return buf_num; |
354 | } |
355 | |
356 | static int vmpeg4_v4l_alloc_buff_config_canvas(struct vdec_mpeg4_hw_s *hw, int i) |
357 | { |
358 | int ret; |
359 | u32 canvas; |
360 | ulong decbuf_start = 0; |
361 | int decbuf_y_size = 0; |
362 | u32 canvas_width = 0, canvas_height = 0; |
363 | struct vdec_s *vdec = hw_to_vdec(hw); |
364 | struct vdec_v4l2_buffer *fb = NULL; |
365 | |
366 | if (hw->pic[i].v4l_ref_buf_addr) |
367 | return 0; |
368 | |
369 | ret = vdec_v4l_get_buffer(hw->v4l2_ctx, &fb); |
370 | if (ret < 0) { |
371 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
372 | "[%d] get fb fail.\n", |
373 | ((struct aml_vcodec_ctx *) |
374 | (hw->v4l2_ctx))->id); |
375 | return ret; |
376 | } |
377 | |
378 | hw->pic[i].v4l_ref_buf_addr = (ulong)fb; |
379 | if (fb->num_planes == 1) { |
380 | decbuf_start = fb->m.mem[0].addr; |
381 | decbuf_y_size = fb->m.mem[0].offset; |
382 | canvas_width = ALIGN(hw->frame_width, 64); |
383 | canvas_height = ALIGN(hw->frame_height, 32); |
384 | fb->m.mem[0].bytes_used = fb->m.mem[0].size; |
385 | } else if (fb->num_planes == 2) { |
386 | decbuf_start = fb->m.mem[0].addr; |
387 | decbuf_y_size = fb->m.mem[0].size; |
388 | canvas_width = ALIGN(hw->frame_width, 64); |
389 | canvas_height = ALIGN(hw->frame_height, 32); |
390 | fb->m.mem[0].bytes_used = decbuf_y_size; |
391 | fb->m.mem[1].bytes_used = decbuf_y_size << 1; |
392 | } |
393 | |
394 | mmpeg4_debug_print(DECODE_ID(hw), 0, "[%d] %s(), v4l ref buf addr: 0x%x\n", |
395 | ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id, __func__, fb); |
396 | |
397 | if (vdec->parallel_dec == 1) { |
398 | u32 tmp; |
399 | if (canvas_y(hw->canvas_spec[i]) == 0xff) { |
400 | tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
401 | hw->canvas_spec[i] &= ~0xff; |
402 | hw->canvas_spec[i] |= tmp; |
403 | } |
404 | if (canvas_u(hw->canvas_spec[i]) == 0xff) { |
405 | tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
406 | hw->canvas_spec[i] &= ~(0xffff << 8); |
407 | hw->canvas_spec[i] |= tmp << 8; |
408 | hw->canvas_spec[i] |= tmp << 16; |
409 | } |
410 | canvas = hw->canvas_spec[i]; |
411 | } else { |
412 | canvas = vdec->get_canvas(i, 2); |
413 | hw->canvas_spec[i] = canvas; |
414 | } |
415 | |
416 | hw->canvas_config[i][0].phy_addr = decbuf_start; |
417 | hw->canvas_config[i][0].width = canvas_width; |
418 | hw->canvas_config[i][0].height = canvas_height; |
419 | hw->canvas_config[i][0].block_mode = hw->blkmode; |
420 | if (hw->blkmode == CANVAS_BLKMODE_LINEAR) |
421 | hw->canvas_config[i][0].endian = 7; |
422 | else |
423 | hw->canvas_config[i][0].endian = 0; |
424 | canvas_config_config(canvas_y(canvas), |
425 | &hw->canvas_config[i][0]); |
426 | |
427 | hw->canvas_config[i][1].phy_addr = |
428 | decbuf_start + decbuf_y_size; |
429 | hw->canvas_config[i][1].width = canvas_width; |
430 | hw->canvas_config[i][1].height = (canvas_height >> 1); |
431 | hw->canvas_config[i][1].block_mode = hw->blkmode; |
432 | if (hw->blkmode == CANVAS_BLKMODE_LINEAR) |
433 | hw->canvas_config[i][1].endian = 7; |
434 | else |
435 | hw->canvas_config[i][1].endian = 0; |
436 | canvas_config_config(canvas_u(canvas), |
437 | &hw->canvas_config[i][1]); |
438 | |
439 | return 0; |
440 | } |
441 | |
442 | static bool is_enough_free_buffer(struct vdec_mpeg4_hw_s *hw) |
443 | { |
444 | int i; |
445 | |
446 | for (i = 0; i < hw->buf_num; i++) { |
447 | if (hw->vfbuf_use[i] == 0) |
448 | break; |
449 | } |
450 | |
451 | return i == hw->buf_num ? false : true; |
452 | } |
453 | |
454 | static int find_free_buffer(struct vdec_mpeg4_hw_s *hw) |
455 | { |
456 | int i; |
457 | |
458 | for (i = 0; i < hw->buf_num; i++) { |
459 | if (hw->vfbuf_use[i] == 0) |
460 | break; |
461 | } |
462 | |
463 | if (i == hw->buf_num) |
464 | return -1; |
465 | |
466 | if (hw->is_used_v4l) |
467 | if (vmpeg4_v4l_alloc_buff_config_canvas(hw, i)) |
468 | return -1; |
469 | |
470 | return i; |
471 | } |
472 | |
473 | static int spec_to_index(struct vdec_mpeg4_hw_s *hw, u32 spec) |
474 | { |
475 | int i; |
476 | |
477 | for (i = 0; i < hw->buf_num; i++) { |
478 | if (hw->canvas_spec[i] == spec) |
479 | return i; |
480 | } |
481 | |
482 | return -1; |
483 | } |
484 | |
485 | static void set_frame_info(struct vdec_mpeg4_hw_s *hw, struct vframe_s *vf, |
486 | int buffer_index) |
487 | { |
488 | int ar = 0; |
489 | unsigned int num = 0; |
490 | unsigned int den = 0; |
491 | unsigned int pixel_ratio = READ_VREG(MP4_PIC_RATIO); |
492 | |
493 | if (hw->vmpeg4_ratio64 != 0) { |
494 | num = hw->vmpeg4_ratio64>>32; |
495 | den = hw->vmpeg4_ratio64 & 0xffffffff; |
496 | } else { |
497 | num = hw->vmpeg4_ratio>>16; |
498 | den = hw->vmpeg4_ratio & 0xffff; |
499 | |
500 | } |
501 | if ((num == 0) || (den == 0)) { |
502 | num = 1; |
503 | den = 1; |
504 | } |
505 | |
506 | if (hw->vmpeg4_ratio == 0) { |
507 | vf->ratio_control |= (0x90 << DISP_RATIO_ASPECT_RATIO_BIT); |
508 | /* always stretch to 16:9 */ |
509 | } else if (pixel_ratio > 0x0f) { |
510 | num = (pixel_ratio >> 8) * |
511 | hw->frame_width * num; |
512 | ar = div_u64((pixel_ratio & 0xff) * |
513 | hw->frame_height * den * 0x100ULL + |
514 | (num >> 1), num); |
515 | } else { |
516 | switch (aspect_ratio_table[pixel_ratio]) { |
517 | case 0: |
518 | num = hw->frame_width * num; |
519 | ar = (hw->frame_height * den * |
520 | 0x100 + (num >> 1)) / num; |
521 | break; |
522 | case 1: |
523 | num = vf->width * num; |
524 | ar = (vf->height * den * 0x100 + (num >> 1)) / num; |
525 | break; |
526 | case 2: |
527 | num = (vf->width * 12) * num; |
528 | ar = (vf->height * den * 0x100 * 11 + |
529 | ((num) >> 1)) / num; |
530 | break; |
531 | case 3: |
532 | num = (vf->width * 10) * num; |
533 | ar = (vf->height * den * 0x100 * 11 + (num >> 1)) / |
534 | num; |
535 | break; |
536 | case 4: |
537 | num = (vf->width * 16) * num; |
538 | ar = (vf->height * den * 0x100 * 11 + (num >> 1)) / |
539 | num; |
540 | break; |
541 | case 5: |
542 | num = (vf->width * 40) * num; |
543 | ar = (vf->height * den * 0x100 * 33 + (num >> 1)) / |
544 | num; |
545 | break; |
546 | default: |
547 | num = vf->width * num; |
548 | ar = (vf->height * den * 0x100 + (num >> 1)) / num; |
549 | break; |
550 | } |
551 | } |
552 | |
553 | ar = min(ar, DISP_RATIO_ASPECT_RATIO_MAX); |
554 | |
555 | vf->signal_type = 0; |
556 | vf->type_original = vf->type; |
557 | vf->ratio_control = (ar << DISP_RATIO_ASPECT_RATIO_BIT); |
558 | vf->canvas0Addr = vf->canvas1Addr = -1; |
559 | #ifdef NV21 |
560 | vf->plane_num = 2; |
561 | #else |
562 | vf->plane_num = 3; |
563 | #endif |
564 | vf->canvas0_config[0] = hw->canvas_config[buffer_index][0]; |
565 | vf->canvas0_config[1] = hw->canvas_config[buffer_index][1]; |
566 | #ifndef NV21 |
567 | vf->canvas0_config[2] = hw->canvas_config[buffer_index][2]; |
568 | #endif |
569 | vf->canvas1_config[0] = hw->canvas_config[buffer_index][0]; |
570 | vf->canvas1_config[1] = hw->canvas_config[buffer_index][1]; |
571 | #ifndef NV21 |
572 | vf->canvas1_config[2] = hw->canvas_config[buffer_index][2]; |
573 | #endif |
574 | } |
575 | |
576 | static inline void vmpeg4_save_hw_context(struct vdec_mpeg4_hw_s *hw) |
577 | { |
578 | hw->reg_mpeg1_2_reg = READ_VREG(MPEG1_2_REG); |
579 | hw->reg_vcop_ctrl_reg = READ_VREG(VCOP_CTRL_REG); |
580 | hw->reg_pic_head_info = READ_VREG(PIC_HEAD_INFO); |
581 | hw->reg_slice_qp = READ_VREG(SLICE_QP); |
582 | hw->reg_mp4_pic_wh = READ_VREG(MP4_PIC_WH); |
583 | hw->reg_mp4_rate = READ_VREG(MP4_RATE); |
584 | hw->reg_mb_info = READ_VREG(MB_INFO); |
585 | hw->reg_dc_ac_ctrl = READ_VREG(DC_AC_CTRL); |
586 | hw->reg_iqidct_control = READ_VREG(IQIDCT_CONTROL); |
587 | hw->reg_resync_marker_length = READ_VREG(RESYNC_MARKER_LENGTH); |
588 | hw->reg_rv_ai_mb_count = READ_VREG(RV_AI_MB_COUNT); |
589 | } |
590 | |
591 | static int update_ref(struct vdec_mpeg4_hw_s *hw, int index) |
592 | { |
593 | hw->vfbuf_use[index]++; |
594 | |
595 | if (hw->refs[1] == -1) { |
596 | hw->refs[1] = index; |
597 | index = -1; |
598 | } else if (hw->refs[0] == -1) { |
599 | hw->refs[0] = hw->refs[1]; |
600 | hw->refs[1] = index; |
601 | index = hw->refs[0]; |
602 | } else { |
603 | hw->vfbuf_use[hw->refs[0]]--; |
604 | hw->refs[0] = hw->refs[1]; |
605 | hw->refs[1] = index; |
606 | index = hw->refs[0]; |
607 | } |
608 | |
609 | return index; |
610 | } |
611 | |
612 | static int prepare_display_buf(struct vdec_mpeg4_hw_s * hw, |
613 | struct pic_info_t *pic) |
614 | { |
615 | struct vframe_s *vf = NULL; |
616 | struct vdec_s *vdec = hw_to_vdec(hw); |
617 | struct aml_vcodec_ctx * v4l2_ctx = hw->v4l2_ctx; |
618 | ulong nv_order = VIDTYPE_VIU_NV21; |
619 | int index = pic->index; |
620 | bool pb_skip = false; |
621 | |
622 | /* swap uv */ |
623 | if (hw->is_used_v4l) { |
624 | if ((v4l2_ctx->cap_pix_fmt == V4L2_PIX_FMT_NV12) || |
625 | (v4l2_ctx->cap_pix_fmt == V4L2_PIX_FMT_NV12M)) |
626 | nv_order = VIDTYPE_VIU_NV12; |
627 | } |
628 | |
629 | if (hw->i_only) |
630 | pb_skip = 1; |
631 | |
632 | if (pic->pic_info & INTERLACE_FLAG) { |
633 | if (kfifo_get(&hw->newframe_q, &vf) == 0) { |
634 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
635 | "fatal error, no available buffer slot."); |
636 | return -1; |
637 | } |
638 | |
639 | if (hw->is_used_v4l) { |
640 | vf->v4l_mem_handle |
641 | = hw->pic[index].v4l_ref_buf_addr; |
642 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL, |
643 | "[%d] %s(), v4l mem handle: 0x%lx\n", |
644 | ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id, |
645 | __func__, vf->v4l_mem_handle); |
646 | } |
647 | |
648 | vf->index = pic->index; |
649 | vf->width = hw->frame_width; |
650 | vf->height = hw->frame_height; |
651 | vf->bufWidth = 1920; |
652 | vf->flag = 0; |
653 | vf->orientation = hw->vmpeg4_rotation; |
654 | vf->pts = pic->pts; |
655 | vf->pts_us64 = pic->pts64; |
656 | vf->duration = pic->duration >> 1; |
657 | vf->duration_pulldown = 0; |
658 | vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ? |
659 | VIDTYPE_INTERLACE_TOP : VIDTYPE_INTERLACE_BOTTOM; |
660 | #ifdef NV21 |
661 | vf->type |= nv_order; |
662 | #endif |
663 | set_frame_info(hw, vf, pic->index); |
664 | |
665 | hw->vfbuf_use[pic->index]++; |
666 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO, |
667 | "field0: pts %d, pts64 %lld, w %d, h %d, dur %d\n", |
668 | vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration); |
669 | |
670 | if (((hw->first_i_frame_ready == 0) || pb_skip) |
671 | && (pic->pic_type != I_PICTURE)) { |
672 | hw->drop_frame_count++; |
673 | hw->vfbuf_use[index]--; |
674 | kfifo_put(&hw->newframe_q, |
675 | (const struct vframe_s *)vf); |
676 | return 0; |
677 | } else { |
678 | vf->mem_handle = |
679 | decoder_bmmu_box_get_mem_handle( |
680 | hw->mm_blk_handle, index); |
681 | kfifo_put(&hw->display_q, |
682 | (const struct vframe_s *)vf); |
683 | ATRACE_COUNTER(MODULE_NAME, vf->pts); |
684 | vdec->vdec_fps_detec(vdec->id); |
685 | hw->frame_num++; |
686 | if (without_display_mode == 0) { |
687 | vf_notify_receiver(vdec->vf_provider_name, |
688 | VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL); |
689 | } else |
690 | vmpeg_vf_put(vmpeg_vf_get(vdec), vdec); |
691 | } |
692 | |
693 | if (kfifo_get(&hw->newframe_q, &vf) == 0) { |
694 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
695 | "error, no available buf.\n"); |
696 | hw->dec_result = DEC_RESULT_ERROR; |
697 | return -1; |
698 | } |
699 | |
700 | vf->index = pic->index; |
701 | vf->width = hw->frame_width; |
702 | vf->height = hw->frame_height; |
703 | vf->bufWidth = 1920; |
704 | vf->flag = 0; |
705 | vf->orientation = hw->vmpeg4_rotation; |
706 | vf->pts = 0; |
707 | vf->pts_us64 = 0; |
708 | vf->duration = pic->duration >> 1; |
709 | vf->duration_pulldown = 0; |
710 | vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ? |
711 | VIDTYPE_INTERLACE_BOTTOM : VIDTYPE_INTERLACE_TOP; |
712 | #ifdef NV21 |
713 | vf->type |= nv_order; |
714 | #endif |
715 | set_frame_info(hw, vf, pic->index); |
716 | |
717 | hw->vfbuf_use[pic->index]++; |
718 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO, |
719 | "filed1: pts %d, pts64 %lld, w %d, h %d, dur: %d\n", |
720 | vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration); |
721 | if (((hw->first_i_frame_ready == 0) || pb_skip) |
722 | && (pic->pic_type != I_PICTURE)) { |
723 | hw->drop_frame_count++; |
724 | hw->vfbuf_use[index]--; |
725 | kfifo_put(&hw->newframe_q, |
726 | (const struct vframe_s *)vf); |
727 | } else { |
728 | vf->mem_handle = |
729 | decoder_bmmu_box_get_mem_handle( |
730 | hw->mm_blk_handle, index); |
731 | kfifo_put(&hw->display_q, |
732 | (const struct vframe_s *)vf); |
733 | ATRACE_COUNTER(MODULE_NAME, vf->pts); |
734 | vdec->vdec_fps_detec(vdec->id); |
735 | decoder_do_frame_check(vdec, vf); |
736 | hw->frame_num++; |
737 | if (without_display_mode == 0) { |
738 | vf_notify_receiver(vdec->vf_provider_name, |
739 | VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL); |
740 | } else |
741 | vmpeg_vf_put(vmpeg_vf_get(vdec), vdec); |
742 | } |
743 | } else { |
744 | /* progressive */ |
745 | if (kfifo_get(&hw->newframe_q, &vf) == 0) { |
746 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
747 | "error, no available buf\n"); |
748 | hw->dec_result = DEC_RESULT_ERROR; |
749 | return -1; |
750 | } |
751 | |
752 | if (hw->is_used_v4l) { |
753 | vf->v4l_mem_handle |
754 | = hw->pic[index].v4l_ref_buf_addr; |
755 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL, |
756 | "[%d] %s(), v4l mem handle: 0x%lx\n", |
757 | ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id, |
758 | __func__, vf->v4l_mem_handle); |
759 | } |
760 | |
761 | vf->index = index; |
762 | vf->width = hw->frame_width; |
763 | vf->height = hw->frame_height; |
764 | vf->bufWidth = 1920; |
765 | vf->flag = 0; |
766 | vf->orientation = hw->vmpeg4_rotation; |
767 | vf->pts = pic->pts; |
768 | vf->pts_us64 = pic->pts64; |
769 | vf->duration = pic->duration; |
770 | vf->duration_pulldown = pic->repeat_cnt * |
771 | pic->duration; |
772 | #ifdef NV21 |
773 | vf->type = VIDTYPE_PROGRESSIVE | |
774 | VIDTYPE_VIU_FIELD | nv_order; |
775 | #else |
776 | vf->type = VIDTYPE_PROGRESSIVE | |
777 | VIDTYPE_VIU_FIELD; |
778 | #endif |
779 | set_frame_info(hw, vf, index); |
780 | |
781 | hw->vfbuf_use[index]++; |
782 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO, |
783 | "prog: pts %d, pts64 %lld, w %d, h %d, dur %d\n", |
784 | vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration); |
785 | |
786 | if (((hw->first_i_frame_ready == 0) || pb_skip) |
787 | && (pic->pic_type != I_PICTURE)) { |
788 | hw->drop_frame_count++; |
789 | hw->vfbuf_use[index]--; |
790 | kfifo_put(&hw->newframe_q, |
791 | (const struct vframe_s *)vf); |
792 | } else { |
793 | struct vdec_info vinfo; |
794 | |
795 | vf->mem_handle = |
796 | decoder_bmmu_box_get_mem_handle( |
797 | hw->mm_blk_handle, index); |
798 | kfifo_put(&hw->display_q, |
799 | (const struct vframe_s *)vf); |
800 | ATRACE_COUNTER(MODULE_NAME, vf->pts); |
801 | vdec->vdec_fps_detec(vdec->id); |
802 | decoder_do_frame_check(vdec, vf); |
803 | hw->frame_num++; |
804 | |
805 | vdec->dec_status(vdec, &vinfo); |
806 | vdec_fill_vdec_frame(vdec, NULL, |
807 | &vinfo, vf, pic->hw_decode_time); |
808 | if (without_display_mode == 0) { |
809 | vf_notify_receiver(vdec->vf_provider_name, |
810 | VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL); |
811 | } else |
812 | vmpeg_vf_put(vmpeg_vf_get(vdec), vdec); |
813 | } |
814 | |
815 | } |
816 | return 0; |
817 | } |
818 | |
819 | static void vmpeg4_prepare_input(struct vdec_mpeg4_hw_s *hw) |
820 | { |
821 | struct vdec_s *vdec = hw_to_vdec(hw); |
822 | struct vdec_input_s *input = &vdec->input; |
823 | struct vframe_block_list_s *block = NULL; |
824 | struct vframe_chunk_s *chunk = hw->chunk; |
825 | int dummy; |
826 | |
827 | if (chunk == NULL) |
828 | return; |
829 | |
830 | /* full reset to HW input */ |
831 | WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0); |
832 | |
833 | /* reset VLD fifo for all vdec */ |
834 | WRITE_VREG(DOS_SW_RESET0, (1<<5) | (1<<4) | (1<<3)); |
835 | WRITE_VREG(DOS_SW_RESET0, 0); |
836 | |
837 | dummy = READ_RESET_REG(RESET0_REGISTER); |
838 | WRITE_VREG(POWER_CTL_VLD, 1 << 4); |
839 | |
840 | /* |
841 | *setup HW decoder input buffer (VLD context) |
842 | * based on input->type and input->target |
843 | */ |
844 | if (input_frame_based(input)) { |
845 | block = chunk->block; |
846 | |
847 | WRITE_VREG(VLD_MEM_VIFIFO_START_PTR, block->start); |
848 | WRITE_VREG(VLD_MEM_VIFIFO_END_PTR, block->start + |
849 | block->size - 8); |
850 | WRITE_VREG(VLD_MEM_VIFIFO_CURR_PTR, |
851 | round_down(block->start + hw->chunk_offset, |
852 | VDEC_FIFO_ALIGN)); |
853 | |
854 | WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 1); |
855 | WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0); |
856 | |
857 | /* set to manual mode */ |
858 | WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2); |
859 | WRITE_VREG(VLD_MEM_VIFIFO_RP, |
860 | round_down(block->start + hw->chunk_offset, |
861 | VDEC_FIFO_ALIGN)); |
862 | dummy = hw->chunk_offset + hw->chunk_size + |
863 | VLD_PADDING_SIZE; |
864 | if (dummy >= block->size) |
865 | dummy -= block->size; |
866 | WRITE_VREG(VLD_MEM_VIFIFO_WP, |
867 | round_down(block->start + dummy, |
868 | VDEC_FIFO_ALIGN)); |
869 | |
870 | WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 3); |
871 | WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2); |
872 | |
873 | WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, |
874 | (0x11 << 16) | (1<<10) | (7<<3)); |
875 | |
876 | } |
877 | } |
878 | |
879 | static irqreturn_t vmpeg4_isr_thread_fn(struct vdec_s *vdec, int irq) |
880 | { |
881 | u32 reg; |
882 | u32 picture_type; |
883 | int index; |
884 | u32 pts, offset = 0; |
885 | u64 pts_us64 = 0; |
886 | u32 frame_size, dec_w, dec_h; |
887 | u32 time_increment_resolution, fixed_vop_rate, vop_time_inc; |
888 | u32 repeat_cnt, duration = 3200; |
889 | struct pic_info_t *dec_pic, *disp_pic; |
890 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)(vdec->private); |
891 | |
892 | if (hw->eos) |
893 | return IRQ_HANDLED; |
894 | |
895 | WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1); |
896 | if (READ_VREG(AV_SCRATCH_M) != 0 && |
897 | (debug_enable & PRINT_FLAG_UCODE_DETAIL)) { |
898 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_UCODE_DETAIL, |
899 | "dbg %x: %x, level %x, wp %x, rp %x, cnt %x\n", |
900 | READ_VREG(AV_SCRATCH_M), READ_VREG(AV_SCRATCH_N), |
901 | READ_VREG(VLD_MEM_VIFIFO_LEVEL), |
902 | READ_VREG(VLD_MEM_VIFIFO_WP), |
903 | READ_VREG(VLD_MEM_VIFIFO_RP), |
904 | READ_VREG(VIFF_BIT_CNT)); |
905 | WRITE_VREG(AV_SCRATCH_M, 0); |
906 | return IRQ_HANDLED; |
907 | } |
908 | reg = READ_VREG(MREG_BUFFEROUT); |
909 | |
910 | time_increment_resolution = READ_VREG(MP4_RATE); |
911 | fixed_vop_rate = time_increment_resolution >> 16; |
912 | time_increment_resolution &= 0xffff; |
913 | if (time_increment_resolution > 0 && |
914 | fixed_vop_rate == 0) |
915 | hw->sys_mp4_rate = time_increment_resolution; |
916 | |
917 | if (hw->vmpeg4_amstream_dec_info.rate == 0) { |
918 | if ((fixed_vop_rate != 0) && |
919 | (time_increment_resolution != 0)) { |
920 | hw->vmpeg4_amstream_dec_info.rate = fixed_vop_rate * |
921 | DURATION_UNIT / time_increment_resolution; |
922 | } else if (time_increment_resolution == 0 |
923 | && hw->sys_mp4_rate > 0) |
924 | time_increment_resolution = hw->sys_mp4_rate; |
925 | } |
926 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL, |
927 | "time_inc_res = %d, fixed_vop_rate = %d, rate = %d\n", |
928 | time_increment_resolution, fixed_vop_rate, |
929 | hw->vmpeg4_amstream_dec_info.rate); |
930 | |
931 | if (reg == 2) { |
932 | /* timeout when decoding next frame */ |
933 | |
934 | /* for frame based case, insufficient result may happen |
935 | * at the beginning when only VOL head is available save |
936 | * HW context also, such as for the QTable from VCOP register |
937 | */ |
938 | mmpeg4_debug_print(DECODE_ID(hw), |
939 | PRINT_FLAG_VLD_DETAIL, |
940 | "%s, level = %x, vfifo_ctrl = %x, bitcnt = %d\n", |
941 | __func__, |
942 | READ_VREG(VLD_MEM_VIFIFO_LEVEL), |
943 | READ_VREG(VLD_MEM_VIFIFO_CONTROL), |
944 | READ_VREG(VIFF_BIT_CNT)); |
945 | |
946 | if (vdec_frame_based(vdec)) { |
947 | vmpeg4_save_hw_context(hw); |
948 | hw->dec_result = DEC_RESULT_DONE; |
949 | vdec_schedule_work(&hw->work); |
950 | } else { |
951 | reset_process_time(hw); |
952 | hw->dec_result = DEC_RESULT_AGAIN; |
953 | vdec_schedule_work(&hw->work); |
954 | } |
955 | return IRQ_HANDLED; |
956 | } else { |
957 | reset_process_time(hw); |
958 | picture_type = (reg >> 3) & 7; |
959 | repeat_cnt = READ_VREG(MP4_NOT_CODED_CNT); |
960 | vop_time_inc = READ_VREG(MP4_VOP_TIME_INC); |
961 | |
962 | index = spec_to_index(hw, READ_VREG(REC_CANVAS_ADDR)); |
963 | if (index < 0) { |
964 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
965 | "invalid buffer index %d. rec = %x\n", |
966 | index, READ_VREG(REC_CANVAS_ADDR)); |
967 | hw->dec_result = DEC_RESULT_ERROR; |
968 | vdec_schedule_work(&hw->work); |
969 | return IRQ_HANDLED; |
970 | } |
971 | hw->dec_result = DEC_RESULT_DONE; |
972 | dec_pic = &hw->pic[index]; |
973 | if (vdec->mvfrm) { |
974 | dec_pic->frame_size = vdec->mvfrm->frame_size; |
975 | dec_pic->hw_decode_time = |
976 | local_clock() - vdec->mvfrm->hw_decode_start; |
977 | } |
978 | dec_pic->pts_valid = false; |
979 | dec_pic->pts = 0; |
980 | dec_pic->pts64 = 0; |
981 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL, |
982 | "new pic: index=%d, used=%d, repeat=%d, time_inc=%d\n", |
983 | index, hw->vfbuf_use[index], repeat_cnt, vop_time_inc); |
984 | |
985 | dec_w = READ_VREG(MP4_PIC_WH)>> 16; |
986 | dec_h = READ_VREG(MP4_PIC_WH) & 0xffff; |
987 | if (dec_w != 0) |
988 | hw->frame_width = dec_w; |
989 | if (dec_h != 0) |
990 | hw->frame_height = dec_h; |
991 | |
992 | if (hw->is_used_v4l) { |
993 | struct aml_vcodec_ctx *ctx = |
994 | (struct aml_vcodec_ctx *)(hw->v4l2_ctx); |
995 | |
996 | if (ctx->param_sets_from_ucode && !hw->v4l_params_parsed) { |
997 | struct aml_vdec_ps_infos ps; |
998 | |
999 | ps.visible_width = hw->frame_width; |
1000 | ps.visible_height = hw->frame_height; |
1001 | ps.coded_width = ALIGN(hw->frame_width, 64); |
1002 | ps.coded_height = ALIGN(hw->frame_height, 64); |
1003 | ps.dpb_size = hw->buf_num; |
1004 | hw->v4l_params_parsed = true; |
1005 | vdec_v4l_set_ps_infos(ctx, &ps); |
1006 | } |
1007 | } |
1008 | |
1009 | if (hw->vmpeg4_amstream_dec_info.rate == 0) { |
1010 | if (vop_time_inc < hw->last_vop_time_inc) { |
1011 | duration = vop_time_inc + |
1012 | time_increment_resolution - |
1013 | hw->last_vop_time_inc; |
1014 | } else { |
1015 | duration = vop_time_inc - |
1016 | hw->last_vop_time_inc; |
1017 | } |
1018 | |
1019 | if (duration == hw->last_duration) { |
1020 | hw->rate_detect++; |
1021 | if ((hw->rate_detect >= RATE_DETECT_COUNT) && |
1022 | (time_increment_resolution != 0)) { |
1023 | hw->vmpeg4_amstream_dec_info.rate = |
1024 | duration * DURATION_UNIT / |
1025 | time_increment_resolution; |
1026 | duration = |
1027 | hw->vmpeg4_amstream_dec_info.rate; |
1028 | } |
1029 | } else { |
1030 | hw->rate_detect = 0; |
1031 | hw->last_duration = duration; |
1032 | } |
1033 | if (MPEG4_VALID_DUR(duration)) { |
1034 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO, |
1035 | "warn: duration %x, set 0\n", duration); |
1036 | duration = 0; |
1037 | } |
1038 | } else { |
1039 | duration = hw->vmpeg4_amstream_dec_info.rate; |
1040 | #if 0 |
1041 | pr_info("info rate = %d, ucode rate = 0x%x:0x%x\n", |
1042 | hw->vmpeg4_amstream_dec_info.rate, |
1043 | READ_VREG(MP4_RATE), vop_time_inc); |
1044 | #endif |
1045 | } |
1046 | |
1047 | /* frame mode with unstable pts */ |
1048 | if (hw->unstable_pts && hw->chunk) { |
1049 | dec_pic->pts_valid = hw->chunk->pts_valid; |
1050 | dec_pic->pts = hw->chunk->pts; |
1051 | dec_pic->pts64 = hw->chunk->pts64; |
1052 | if ((B_PICTURE == picture_type) || |
1053 | (hw->last_dec_pts == dec_pic->pts)) |
1054 | dec_pic->pts_valid = 0; |
1055 | |
1056 | hw->last_dec_pts = dec_pic->pts; |
1057 | } else if ((I_PICTURE == picture_type) || |
1058 | (P_PICTURE == picture_type)) { |
1059 | offset = READ_VREG(MP4_OFFSET_REG); |
1060 | if (hw->chunk) { |
1061 | dec_pic->pts_valid = hw->chunk->pts_valid; |
1062 | dec_pic->pts = hw->chunk->pts; |
1063 | dec_pic->pts64 = hw->chunk->pts64; |
1064 | } else { |
1065 | if (pts_lookup_offset_us64(PTS_TYPE_VIDEO, offset, |
1066 | &pts, &frame_size, 3000, &pts_us64) == 0) { |
1067 | dec_pic->pts_valid = true; |
1068 | dec_pic->pts = pts; |
1069 | dec_pic->pts64 = pts_us64; |
1070 | hw->pts_hit++; |
1071 | } else { |
1072 | dec_pic->pts_valid = false; |
1073 | hw->pts_missed++; |
1074 | } |
1075 | } |
1076 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO, |
1077 | "%c, offset=0x%x, pts=0x%x(%d), index=%d, used=%d\n", |
1078 | GET_PIC_TYPE(picture_type), offset, dec_pic->pts, |
1079 | dec_pic->pts_valid, index, hw->vfbuf_use[index]); |
1080 | } |
1081 | |
1082 | dec_pic->index = index; |
1083 | dec_pic->pic_info = reg; |
1084 | dec_pic->pic_type = picture_type; |
1085 | dec_pic->duration = duration; |
1086 | hw->vfbuf_use[index] = 0; |
1087 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW, |
1088 | "mmpeg4: pic_num: %d, index %d, type %c, pts %x\n", |
1089 | hw->frame_num, index, |
1090 | GET_PIC_TYPE(picture_type), |
1091 | dec_pic->pts); |
1092 | |
1093 | /* buffer management */ |
1094 | if ((picture_type == I_PICTURE) || |
1095 | (picture_type == P_PICTURE)) { |
1096 | index = update_ref(hw, index); |
1097 | } else { |
1098 | /* drop B frame or disp immediately. |
1099 | * depend on if there are two ref frames |
1100 | */ |
1101 | if (hw->refs[1] == -1) |
1102 | index = -1; |
1103 | } |
1104 | vmpeg4_save_hw_context(hw); |
1105 | if (index < 0) { |
1106 | vdec_schedule_work(&hw->work); |
1107 | return IRQ_HANDLED; |
1108 | } |
1109 | disp_pic = &hw->pic[index]; |
1110 | if ((hw->first_i_frame_ready == 0) && |
1111 | (I_PICTURE == disp_pic->pic_type)) |
1112 | hw->first_i_frame_ready = 1; |
1113 | |
1114 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW, |
1115 | "disp: index=%d, pts=%x(%d), used=%d, picout=%c(dec=%c)\n", |
1116 | index, disp_pic->pts, disp_pic->pts_valid, |
1117 | hw->vfbuf_use[index], |
1118 | GET_PIC_TYPE(disp_pic->pic_type), |
1119 | GET_PIC_TYPE(picture_type)); |
1120 | |
1121 | if (disp_pic->pts_valid) { |
1122 | hw->last_anch_pts = disp_pic->pts; |
1123 | hw->last_anch_pts_us64 = disp_pic->pts64; |
1124 | hw->frame_num_since_last_anch = 0; |
1125 | hw->vop_time_inc_since_last_anch = 0; |
1126 | } else if (vdec_stream_based(vdec)) { |
1127 | disp_pic->pts = hw->last_anch_pts; |
1128 | disp_pic->pts64 = hw->last_anch_pts_us64; |
1129 | |
1130 | if ((time_increment_resolution != 0) && |
1131 | (fixed_vop_rate == 0) && |
1132 | (hw->vmpeg4_amstream_dec_info.rate == 0)) { |
1133 | /* variable PTS rate */ |
1134 | /*bug on variable pts calc, |
1135 | *do as dixed vop first if we |
1136 | *have rate setting before. |
1137 | */ |
1138 | if (vop_time_inc > hw->last_vop_time_inc) { |
1139 | duration = vop_time_inc - |
1140 | hw->last_vop_time_inc; |
1141 | } else { |
1142 | duration = vop_time_inc + |
1143 | time_increment_resolution - |
1144 | hw->last_vop_time_inc; |
1145 | } |
1146 | |
1147 | hw->vop_time_inc_since_last_anch += duration; |
1148 | |
1149 | disp_pic->pts += hw->vop_time_inc_since_last_anch * |
1150 | PTS_UNIT / time_increment_resolution; |
1151 | disp_pic->pts64 += (hw->vop_time_inc_since_last_anch * |
1152 | PTS_UNIT / time_increment_resolution) * |
1153 | 100 / 9; |
1154 | |
1155 | if (hw->vop_time_inc_since_last_anch > |
1156 | (1 << 14)) { |
1157 | /* avoid overflow */ |
1158 | hw->last_anch_pts = disp_pic->pts; |
1159 | hw->last_anch_pts_us64 = disp_pic->pts64; |
1160 | hw->vop_time_inc_since_last_anch = 0; |
1161 | } |
1162 | } else { |
1163 | /* fixed VOP rate */ |
1164 | hw->frame_num_since_last_anch++; |
1165 | disp_pic->pts += DUR2PTS(hw->frame_num_since_last_anch * |
1166 | hw->vmpeg4_amstream_dec_info.rate); |
1167 | disp_pic->pts64 += DUR2PTS( |
1168 | hw->frame_num_since_last_anch * |
1169 | hw->vmpeg4_amstream_dec_info.rate) * 100 / 9; |
1170 | |
1171 | if (hw->frame_num_since_last_anch > (1 << 15)) { |
1172 | /* avoid overflow */ |
1173 | hw->last_anch_pts = disp_pic->pts; |
1174 | hw->last_anch_pts_us64 = disp_pic->pts64; |
1175 | hw->frame_num_since_last_anch = 0; |
1176 | } |
1177 | } |
1178 | } else if (hw->unstable_pts && hw->chunk && |
1179 | MPEG4_VALID_DUR(duration)) { |
1180 | /* invalid pts calc */ |
1181 | hw->frame_num_since_last_anch = hw->chunk_frame_count; |
1182 | disp_pic->pts = hw->last_anch_pts + |
1183 | DUR2PTS(hw->frame_num_since_last_anch * |
1184 | duration); |
1185 | disp_pic->pts64 = hw->last_anch_pts_us64 + |
1186 | DUR2PTS(hw->frame_num_since_last_anch * |
1187 | duration) * 100 / 9; |
1188 | |
1189 | if (hw->frame_num_since_last_anch > (1 << 15)) { |
1190 | /* avoid overflow */ |
1191 | hw->last_anch_pts = disp_pic->pts; |
1192 | hw->last_anch_pts_us64 = disp_pic->pts64; |
1193 | hw->frame_num_since_last_anch = 0; |
1194 | } else |
1195 | disp_pic->pts_valid = 1; |
1196 | } |
1197 | |
1198 | if (vdec_frame_based(vdec) && |
1199 | (hw->unstable_pts) && |
1200 | MPEG4_VALID_DUR(duration)) { |
1201 | |
1202 | u32 threshold = DUR2PTS(duration) >> 3; |
1203 | |
1204 | if (disp_pic->pts <= (hw->last_pts + threshold)) { |
1205 | disp_pic->pts = hw->last_pts + DUR2PTS(duration); |
1206 | disp_pic->pts64 = hw->last_pts64 + |
1207 | (DUR2PTS(duration)*100/9); |
1208 | } |
1209 | if (!disp_pic->pts_valid) { |
1210 | disp_pic->pts = 0; |
1211 | disp_pic->pts64 = 0; |
1212 | } |
1213 | } |
1214 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO, |
1215 | "disp: pic_type %c, pts %d(%lld), diff %d, cnt %d\n", |
1216 | GET_PIC_TYPE(disp_pic->pic_type), |
1217 | disp_pic->pts, |
1218 | disp_pic->pts64, |
1219 | disp_pic->pts - hw->last_pts, |
1220 | hw->chunk_frame_count); |
1221 | hw->last_pts = disp_pic->pts; |
1222 | hw->last_pts64 = disp_pic->pts64; |
1223 | hw->frame_dur = duration; |
1224 | disp_pic->duration = duration; |
1225 | disp_pic->repeat_cnt = repeat_cnt; |
1226 | |
1227 | prepare_display_buf(hw, disp_pic); |
1228 | |
1229 | hw->total_frame += repeat_cnt + 1; |
1230 | hw->last_vop_time_inc = vop_time_inc; |
1231 | |
1232 | if (vdec_frame_based(vdec) && |
1233 | (frmbase_cont_bitlevel != 0) && |
1234 | (hw->first_i_frame_ready)) { |
1235 | u32 consume_byte, res_byte, bitcnt; |
1236 | |
1237 | bitcnt = READ_VREG(VIFF_BIT_CNT); |
1238 | res_byte = bitcnt >> 3; |
1239 | |
1240 | if (hw->chunk_size > res_byte) { |
1241 | if (bitcnt > frmbase_cont_bitlevel) { |
1242 | consume_byte = hw->chunk_size - res_byte; |
1243 | |
1244 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW, |
1245 | "%s, size %d, consume %d, res %d\n", __func__, |
1246 | hw->chunk_size, consume_byte, res_byte); |
1247 | |
1248 | if (consume_byte > VDEC_FIFO_ALIGN) { |
1249 | consume_byte -= VDEC_FIFO_ALIGN; |
1250 | res_byte += VDEC_FIFO_ALIGN; |
1251 | } |
1252 | hw->chunk_offset += consume_byte; |
1253 | hw->chunk_size = res_byte; |
1254 | hw->dec_result = DEC_RESULT_UNFINISH; |
1255 | hw->chunk_frame_count++; |
1256 | hw->unstable_pts = 1; |
1257 | } else { |
1258 | hw->chunk_size = 0; |
1259 | hw->chunk_offset = 0; |
1260 | } |
1261 | } else { |
1262 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR, |
1263 | "error: bitbyte %d hw->chunk_size %d\n", res_byte, hw->chunk_size); |
1264 | hw->chunk_size = 0; |
1265 | hw->chunk_offset = 0; |
1266 | } |
1267 | } |
1268 | vdec_schedule_work(&hw->work); |
1269 | } |
1270 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM, |
1271 | "%s: frame num:%d\n", __func__, hw->frame_num); |
1272 | |
1273 | return IRQ_HANDLED; |
1274 | } |
1275 | |
1276 | static irqreturn_t vmpeg4_isr(struct vdec_s *vdec, int irq) |
1277 | { |
1278 | struct vdec_mpeg4_hw_s *hw = |
1279 | (struct vdec_mpeg4_hw_s *)(vdec->private); |
1280 | |
1281 | if (hw->eos) |
1282 | return IRQ_HANDLED; |
1283 | |
1284 | return IRQ_WAKE_THREAD; |
1285 | } |
1286 | |
1287 | static void flush_output(struct vdec_mpeg4_hw_s * hw) |
1288 | { |
1289 | struct pic_info_t *pic; |
1290 | |
1291 | if (hw->vfbuf_use[hw->refs[1]] > 0) { |
1292 | pic = &hw->pic[hw->refs[1]]; |
1293 | prepare_display_buf(hw, pic); |
1294 | } |
1295 | } |
1296 | |
1297 | static int notify_v4l_eos(struct vdec_s *vdec) |
1298 | { |
1299 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private; |
1300 | struct aml_vcodec_ctx *ctx = (struct aml_vcodec_ctx *)(hw->v4l2_ctx); |
1301 | struct vframe_s *vf = NULL; |
1302 | struct vdec_v4l2_buffer *fb = NULL; |
1303 | |
1304 | if (hw->is_used_v4l && hw->eos) { |
1305 | if (kfifo_get(&hw->newframe_q, &vf) == 0 || vf == NULL) { |
1306 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR, |
1307 | "%s fatal error, no available buffer slot.\n", |
1308 | __func__); |
1309 | return -1; |
1310 | } |
1311 | |
1312 | if (vdec_v4l_get_buffer(hw->v4l2_ctx, &fb)) { |
1313 | pr_err("[%d] get fb fail.\n", ctx->id); |
1314 | return -1; |
1315 | } |
1316 | |
1317 | vf->timestamp = ULONG_MAX; |
1318 | vf->v4l_mem_handle = (unsigned long)fb; |
1319 | vf->flag = VFRAME_FLAG_EMPTY_FRAME_V4L; |
1320 | |
1321 | kfifo_put(&hw->display_q, (const struct vframe_s *)vf); |
1322 | vf_notify_receiver(vdec->vf_provider_name, |
1323 | VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL); |
1324 | |
1325 | pr_info("[%d] mpeg4 EOS notify.\n", ctx->id); |
1326 | } |
1327 | |
1328 | return 0; |
1329 | } |
1330 | |
1331 | static void vmpeg4_work(struct work_struct *work) |
1332 | { |
1333 | struct vdec_mpeg4_hw_s *hw = |
1334 | container_of(work, struct vdec_mpeg4_hw_s, work); |
1335 | struct vdec_s *vdec = hw_to_vdec(hw); |
1336 | |
1337 | /* finished decoding one frame or error, |
1338 | * notify vdec core to switch context |
1339 | */ |
1340 | if (hw->dec_result != DEC_RESULT_DONE) |
1341 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW, |
1342 | "vmpeg4_work: result=%d,status=%d\n", |
1343 | hw->dec_result, hw_to_vdec(hw)->next_status); |
1344 | |
1345 | if (hw->dec_result == DEC_RESULT_UNFINISH) { |
1346 | if (!hw->ctx_valid) |
1347 | hw->ctx_valid = 1; |
1348 | |
1349 | } else if ((hw->dec_result == DEC_RESULT_DONE) || |
1350 | ((input_frame_based(&vdec->input)) && hw->chunk)) { |
1351 | if (!hw->ctx_valid) |
1352 | hw->ctx_valid = 1; |
1353 | |
1354 | vdec_vframe_dirty(vdec, hw->chunk); |
1355 | hw->chunk = NULL; |
1356 | } else if (hw->dec_result == DEC_RESULT_AGAIN |
1357 | && (vdec->next_status != VDEC_STATUS_DISCONNECTED)) { |
1358 | /* |
1359 | stream base: stream buf empty or timeout |
1360 | frame base: vdec_prepare_input fail |
1361 | */ |
1362 | if (!vdec_has_more_input(vdec)) { |
1363 | hw->dec_result = DEC_RESULT_EOS; |
1364 | vdec_schedule_work(&hw->work); |
1365 | return; |
1366 | } |
1367 | } else if (hw->dec_result == DEC_RESULT_FORCE_EXIT) { |
1368 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR, |
1369 | "%s: force exit\n", __func__); |
1370 | if (hw->stat & STAT_ISR_REG) { |
1371 | amvdec_stop(); |
1372 | vdec_free_irq(VDEC_IRQ_1, (void *)hw); |
1373 | hw->stat &= ~STAT_ISR_REG; |
1374 | } |
1375 | } else if (hw->dec_result == DEC_RESULT_EOS) { |
1376 | hw->eos = 1; |
1377 | if (hw->stat & STAT_VDEC_RUN) { |
1378 | amvdec_stop(); |
1379 | hw->stat &= ~STAT_VDEC_RUN; |
1380 | } |
1381 | vdec_vframe_dirty(vdec, hw->chunk); |
1382 | hw->chunk = NULL; |
1383 | vdec_clean_input(vdec); |
1384 | flush_output(hw); |
1385 | |
1386 | if (hw->is_used_v4l) |
1387 | notify_v4l_eos(vdec); |
1388 | |
1389 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1390 | "%s: eos flushed, frame_num %d\n", |
1391 | __func__, hw->frame_num); |
1392 | } |
1393 | |
1394 | if (hw->stat & STAT_VDEC_RUN) { |
1395 | amvdec_stop(); |
1396 | hw->stat &= ~STAT_VDEC_RUN; |
1397 | } |
1398 | /*disable mbox interrupt */ |
1399 | WRITE_VREG(ASSIST_MBOX1_MASK, 0); |
1400 | del_timer_sync(&hw->check_timer); |
1401 | hw->stat &= ~STAT_TIMER_ARM; |
1402 | |
1403 | /* mark itself has all HW resource released and input released */ |
1404 | if (vdec->parallel_dec == 1) |
1405 | vdec_core_finish_run(vdec, CORE_MASK_VDEC_1); |
1406 | else |
1407 | vdec_core_finish_run(vdec, CORE_MASK_VDEC_1 | CORE_MASK_HEVC); |
1408 | |
1409 | wake_up_interruptible(&hw->wait_q); |
1410 | if (hw->vdec_cb) |
1411 | hw->vdec_cb(vdec, hw->vdec_cb_arg); |
1412 | } |
1413 | |
1414 | static struct vframe_s *vmpeg_vf_peek(void *op_arg) |
1415 | { |
1416 | struct vframe_s *vf; |
1417 | struct vdec_s *vdec = op_arg; |
1418 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private; |
1419 | |
1420 | if (!hw) |
1421 | return NULL; |
1422 | hw->peek_num++; |
1423 | if (kfifo_peek(&hw->display_q, &vf)) |
1424 | return vf; |
1425 | |
1426 | return NULL; |
1427 | } |
1428 | |
1429 | static struct vframe_s *vmpeg_vf_get(void *op_arg) |
1430 | { |
1431 | struct vframe_s *vf; |
1432 | struct vdec_s *vdec = op_arg; |
1433 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private; |
1434 | hw->get_num++; |
1435 | if (kfifo_get(&hw->display_q, &vf)) |
1436 | return vf; |
1437 | |
1438 | return NULL; |
1439 | } |
1440 | |
1441 | static void vmpeg_vf_put(struct vframe_s *vf, void *op_arg) |
1442 | { |
1443 | struct vdec_s *vdec = op_arg; |
1444 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private; |
1445 | |
1446 | hw->vfbuf_use[vf->index]--; |
1447 | hw->put_num++; |
1448 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM, |
1449 | "%s: put num:%d\n",__func__, hw->put_num); |
1450 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL, |
1451 | "index=%d, used=%d\n", vf->index, hw->vfbuf_use[vf->index]); |
1452 | kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf); |
1453 | } |
1454 | |
1455 | static int vmpeg_event_cb(int type, void *data, void *private_data) |
1456 | { |
1457 | return 0; |
1458 | } |
1459 | |
1460 | static int vmpeg_vf_states(struct vframe_states *states, void *op_arg) |
1461 | { |
1462 | unsigned long flags; |
1463 | struct vdec_s *vdec = op_arg; |
1464 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private; |
1465 | |
1466 | spin_lock_irqsave(&hw->lock, flags); |
1467 | |
1468 | states->vf_pool_size = VF_POOL_SIZE; |
1469 | states->buf_free_num = kfifo_len(&hw->newframe_q); |
1470 | states->buf_avail_num = kfifo_len(&hw->display_q); |
1471 | states->buf_recycle_num = 0; |
1472 | |
1473 | spin_unlock_irqrestore(&hw->lock, flags); |
1474 | |
1475 | return 0; |
1476 | } |
1477 | |
1478 | |
1479 | static int dec_status(struct vdec_s *vdec, struct vdec_info *vstatus) |
1480 | { |
1481 | struct vdec_mpeg4_hw_s *hw = |
1482 | (struct vdec_mpeg4_hw_s *)vdec->private; |
1483 | |
1484 | if (!hw) |
1485 | return -1; |
1486 | |
1487 | vstatus->frame_width = hw->frame_width; |
1488 | vstatus->frame_height = hw->frame_height; |
1489 | if (0 != hw->vmpeg4_amstream_dec_info.rate) |
1490 | vstatus->frame_rate = DURATION_UNIT / |
1491 | hw->vmpeg4_amstream_dec_info.rate; |
1492 | else |
1493 | vstatus->frame_rate = DURATION_UNIT; |
1494 | vstatus->error_count = READ_VREG(MP4_ERR_COUNT); |
1495 | vstatus->status = hw->stat; |
1496 | vstatus->frame_dur = hw->frame_dur; |
1497 | snprintf(vstatus->vdec_name, sizeof(vstatus->vdec_name), |
1498 | "%s", DRIVER_NAME); |
1499 | |
1500 | return 0; |
1501 | } |
1502 | |
1503 | /****************************************/ |
1504 | static int vmpeg4_canvas_init(struct vdec_mpeg4_hw_s *hw) |
1505 | { |
1506 | int i, ret; |
1507 | u32 canvas_width, canvas_height; |
1508 | u32 decbuf_size, decbuf_y_size; |
1509 | struct vdec_s *vdec = hw_to_vdec(hw); |
1510 | unsigned long decbuf_start; |
1511 | |
1512 | if (buf_size <= 0x00400000) { |
1513 | /* SD only */ |
1514 | canvas_width = 768; |
1515 | canvas_height = 576; |
1516 | decbuf_y_size = 0x80000; |
1517 | decbuf_size = 0x100000; |
1518 | } else { |
1519 | int w = 1920; |
1520 | int h = 1088; |
1521 | int align_w, align_h; |
1522 | int max, min; |
1523 | |
1524 | align_w = ALIGN(w, 64); |
1525 | align_h = ALIGN(h, 64); |
1526 | if (align_w > align_h) { |
1527 | max = align_w; |
1528 | min = align_h; |
1529 | } else { |
1530 | max = align_h; |
1531 | min = align_w; |
1532 | } |
1533 | /* HD & SD */ |
1534 | if ((max > 1920 || min > 1088) && |
1535 | ALIGN(align_w * align_h * 3/2, SZ_64K) * 9 <= |
1536 | buf_size) { |
1537 | canvas_width = align_w; |
1538 | canvas_height = align_h; |
1539 | decbuf_y_size = |
1540 | ALIGN(align_w * align_h, SZ_64K); |
1541 | decbuf_size = |
1542 | ALIGN(align_w * align_h * 3/2, SZ_64K); |
1543 | } else { /*1080p*/ |
1544 | canvas_width = 1920; |
1545 | canvas_height = 1088; |
1546 | decbuf_y_size = 0x200000; |
1547 | decbuf_size = 0x300000; |
1548 | } |
1549 | } |
1550 | |
1551 | for (i = 0; i < hw->buf_num + 1; i++) { |
1552 | |
1553 | unsigned canvas; |
1554 | |
1555 | if (i == hw->buf_num) |
1556 | decbuf_size = WORKSPACE_SIZE; |
1557 | |
1558 | if (hw->is_used_v4l && !(i == hw->buf_num)) { |
1559 | continue; |
1560 | } else { |
1561 | ret = decoder_bmmu_box_alloc_buf_phy(hw->mm_blk_handle, i, |
1562 | decbuf_size, DRIVER_NAME, &decbuf_start); |
1563 | if (ret < 0) { |
1564 | pr_err("mmu alloc failed! size %d idx %d\n", |
1565 | decbuf_size, i); |
1566 | return ret; |
1567 | } |
1568 | } |
1569 | |
1570 | if (i == hw->buf_num) { |
1571 | hw->buf_start = decbuf_start; |
1572 | } else { |
1573 | if (vdec->parallel_dec == 1) { |
1574 | unsigned tmp; |
1575 | if (canvas_y(hw->canvas_spec[i]) == 0xff) { |
1576 | tmp = |
1577 | vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
1578 | hw->canvas_spec[i] &= ~0xff; |
1579 | hw->canvas_spec[i] |= tmp; |
1580 | } |
1581 | if (canvas_u(hw->canvas_spec[i]) == 0xff) { |
1582 | tmp = |
1583 | vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id); |
1584 | hw->canvas_spec[i] &= ~(0xffff << 8); |
1585 | hw->canvas_spec[i] |= tmp << 8; |
1586 | hw->canvas_spec[i] |= tmp << 16; |
1587 | } |
1588 | canvas = hw->canvas_spec[i]; |
1589 | } else { |
1590 | canvas = vdec->get_canvas(i, 2); |
1591 | hw->canvas_spec[i] = canvas; |
1592 | } |
1593 | |
1594 | hw->canvas_config[i][0].phy_addr = decbuf_start; |
1595 | hw->canvas_config[i][0].width = canvas_width; |
1596 | hw->canvas_config[i][0].height = canvas_height; |
1597 | hw->canvas_config[i][0].block_mode = hw->blkmode; |
1598 | if (hw->blkmode == CANVAS_BLKMODE_LINEAR) |
1599 | hw->canvas_config[i][0].endian = 7; |
1600 | else |
1601 | hw->canvas_config[i][0].endian = 0; |
1602 | canvas_config_config(canvas_y(canvas), |
1603 | &hw->canvas_config[i][0]); |
1604 | |
1605 | hw->canvas_config[i][1].phy_addr = |
1606 | decbuf_start + decbuf_y_size; |
1607 | hw->canvas_config[i][1].width = canvas_width; |
1608 | hw->canvas_config[i][1].height = (canvas_height >> 1); |
1609 | hw->canvas_config[i][1].block_mode = hw->blkmode; |
1610 | if (hw->blkmode == CANVAS_BLKMODE_LINEAR) |
1611 | hw->canvas_config[i][1].endian = 7; |
1612 | else |
1613 | hw->canvas_config[i][1].endian = 0; |
1614 | canvas_config_config(canvas_u(canvas), |
1615 | &hw->canvas_config[i][1]); |
1616 | } |
1617 | } |
1618 | |
1619 | return 0; |
1620 | } |
1621 | |
1622 | static void vmpeg4_dump_state(struct vdec_s *vdec) |
1623 | { |
1624 | struct vdec_mpeg4_hw_s *hw = |
1625 | (struct vdec_mpeg4_hw_s *)(vdec->private); |
1626 | u32 i; |
1627 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1628 | "====== %s\n", __func__); |
1629 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1630 | "width/height (%d/%d), i_fram:%d, buffer_not_ready %d, buf_num %d\n", |
1631 | hw->frame_width, |
1632 | hw->frame_height, |
1633 | hw->first_i_frame_ready, |
1634 | hw->buffer_not_ready, |
1635 | hw->buf_num |
1636 | ); |
1637 | for (i = 0; i < hw->buf_num; i++) { |
1638 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1639 | "index %d, used %d\n", i, hw->vfbuf_use[i]); |
1640 | } |
1641 | |
1642 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1643 | "is_framebase(%d), eos %d, state 0x%x, dec_result 0x%x dec_frm %d\n", |
1644 | vdec_frame_based(vdec), |
1645 | hw->eos, |
1646 | hw->stat, |
1647 | hw->dec_result, |
1648 | hw->frame_num |
1649 | ); |
1650 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1651 | "is_framebase(%d), put_frm %d run %d not_run_ready %d input_empty %d,drop %d\n", |
1652 | vdec_frame_based(vdec), |
1653 | hw->put_num, |
1654 | hw->run_count, |
1655 | hw->not_run_ready, |
1656 | hw->input_empty, |
1657 | hw->drop_frame_count |
1658 | ); |
1659 | |
1660 | if (vf_get_receiver(vdec->vf_provider_name)) { |
1661 | enum receviver_start_e state = |
1662 | vf_notify_receiver(vdec->vf_provider_name, |
1663 | VFRAME_EVENT_PROVIDER_QUREY_STATE, |
1664 | NULL); |
1665 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1666 | "\nreceiver(%s) state %d\n", |
1667 | vdec->vf_provider_name, |
1668 | state); |
1669 | } |
1670 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1671 | "%s, newq(%d/%d), dispq(%d/%d) vf peek/get/put (%d/%d/%d)\n", |
1672 | __func__, |
1673 | kfifo_len(&hw->newframe_q), VF_POOL_SIZE, |
1674 | kfifo_len(&hw->display_q), VF_POOL_SIZE, |
1675 | hw->peek_num, hw->get_num, hw->put_num |
1676 | ); |
1677 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1678 | "VIFF_BIT_CNT=0x%x\n", |
1679 | READ_VREG(VIFF_BIT_CNT)); |
1680 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1681 | "VLD_MEM_VIFIFO_LEVEL=0x%x\n", |
1682 | READ_VREG(VLD_MEM_VIFIFO_LEVEL)); |
1683 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1684 | "VLD_MEM_VIFIFO_WP=0x%x\n", |
1685 | READ_VREG(VLD_MEM_VIFIFO_WP)); |
1686 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1687 | "VLD_MEM_VIFIFO_RP=0x%x\n", |
1688 | READ_VREG(VLD_MEM_VIFIFO_RP)); |
1689 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1690 | "PARSER_VIDEO_RP=0x%x\n", |
1691 | READ_PARSER_REG(PARSER_VIDEO_RP)); |
1692 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1693 | "PARSER_VIDEO_WP=0x%x\n", |
1694 | READ_PARSER_REG(PARSER_VIDEO_WP)); |
1695 | if (vdec_frame_based(vdec) && |
1696 | debug_enable & PRINT_FRAMEBASE_DATA) { |
1697 | int jj; |
1698 | if (hw->chunk && hw->chunk->block && |
1699 | hw->chunk->size > 0) { |
1700 | u8 *data = NULL; |
1701 | |
1702 | if (!hw->chunk->block->is_mapped) |
1703 | data = codec_mm_vmap(hw->chunk->block->start + |
1704 | hw->chunk->offset, hw->chunk->size); |
1705 | else |
1706 | data = ((u8 *)hw->chunk->block->start_virt) + |
1707 | hw->chunk->offset; |
1708 | |
1709 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1710 | "frame data size 0x%x\n", |
1711 | hw->chunk->size); |
1712 | for (jj = 0; jj < hw->chunk->size; jj++) { |
1713 | if ((jj & 0xf) == 0) |
1714 | mmpeg4_debug_print(DECODE_ID(hw), |
1715 | PRINT_FRAMEBASE_DATA, |
1716 | "%06x:", jj); |
1717 | mmpeg4_debug_print(DECODE_ID(hw), |
1718 | PRINT_FRAMEBASE_DATA, |
1719 | "%02x ", data[jj]); |
1720 | if (((jj + 1) & 0xf) == 0) |
1721 | mmpeg4_debug_print(DECODE_ID(hw), |
1722 | PRINT_FRAMEBASE_DATA, |
1723 | "\n"); |
1724 | } |
1725 | |
1726 | if (!hw->chunk->block->is_mapped) |
1727 | codec_mm_unmap_phyaddr(data); |
1728 | } |
1729 | } |
1730 | } |
1731 | |
1732 | static void reset_process_time(struct vdec_mpeg4_hw_s *hw) |
1733 | { |
1734 | if (hw->start_process_time) { |
1735 | unsigned process_time = |
1736 | 1000 * (jiffies - hw->start_process_time) / HZ; |
1737 | hw->start_process_time = 0; |
1738 | if (process_time > max_process_time[DECODE_ID(hw)]) |
1739 | max_process_time[DECODE_ID(hw)] = process_time; |
1740 | } |
1741 | } |
1742 | static void start_process_time(struct vdec_mpeg4_hw_s *hw) |
1743 | { |
1744 | hw->decode_timeout_count = 2; |
1745 | hw->start_process_time = jiffies; |
1746 | } |
1747 | |
1748 | static void timeout_process(struct vdec_mpeg4_hw_s *hw) |
1749 | { |
1750 | if (hw->stat & STAT_VDEC_RUN) { |
1751 | amvdec_stop(); |
1752 | hw->stat &= ~STAT_VDEC_RUN; |
1753 | } |
1754 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1755 | "%s decoder timeout %d\n", __func__, hw->timeout_cnt); |
1756 | if (vdec_frame_based((hw_to_vdec(hw)))) { |
1757 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1758 | "%s frame_num %d, chunk size 0x%x, chksum 0x%x\n", |
1759 | __func__, |
1760 | hw->frame_num, |
1761 | hw->chunk->size, |
1762 | get_data_check_sum(hw, hw->chunk->size)); |
1763 | } |
1764 | hw->timeout_cnt++; |
1765 | /* timeout: data droped, frame_num inaccurate*/ |
1766 | hw->frame_num++; |
1767 | reset_process_time(hw); |
1768 | hw->first_i_frame_ready = 0; |
1769 | hw->dec_result = DEC_RESULT_DONE; |
1770 | vdec_schedule_work(&hw->work); |
1771 | } |
1772 | |
1773 | |
1774 | static void check_timer_func(unsigned long arg) |
1775 | { |
1776 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)arg; |
1777 | struct vdec_s *vdec = hw_to_vdec(hw); |
1778 | unsigned int timeout_val = decode_timeout_val; |
1779 | |
1780 | if (radr != 0) { |
1781 | if (rval != 0) { |
1782 | WRITE_VREG(radr, rval); |
1783 | pr_info("WRITE_VREG(%x,%x)\n", radr, rval); |
1784 | } else |
1785 | pr_info("READ_VREG(%x)=%x\n", radr, READ_VREG(radr)); |
1786 | rval = 0; |
1787 | radr = 0; |
1788 | } |
1789 | |
1790 | if (((debug_enable & PRINT_FLAG_TIMEOUT_STATUS) == 0) && |
1791 | (timeout_val > 0) && |
1792 | (hw->start_process_time > 0) && |
1793 | ((1000 * (jiffies - hw->start_process_time) / HZ) |
1794 | > timeout_val)) { |
1795 | if (hw->last_vld_level == READ_VREG(VLD_MEM_VIFIFO_LEVEL)) { |
1796 | if (hw->decode_timeout_count > 0) |
1797 | hw->decode_timeout_count--; |
1798 | if (hw->decode_timeout_count == 0) |
1799 | timeout_process(hw); |
1800 | } |
1801 | hw->last_vld_level = READ_VREG(VLD_MEM_VIFIFO_LEVEL); |
1802 | } |
1803 | |
1804 | if (vdec->next_status == VDEC_STATUS_DISCONNECTED) { |
1805 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR, |
1806 | "vdec requested to be disconnected\n"); |
1807 | hw->dec_result = DEC_RESULT_FORCE_EXIT; |
1808 | vdec_schedule_work(&hw->work); |
1809 | return; |
1810 | } |
1811 | |
1812 | mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL); |
1813 | } |
1814 | |
1815 | static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw) |
1816 | { |
1817 | int index, i; |
1818 | void *workspace_buf = NULL; |
1819 | |
1820 | index = find_free_buffer(hw); |
1821 | if (index < 0) |
1822 | return -1; |
1823 | |
1824 | if (!hw->init_flag) { |
1825 | if (vmpeg4_canvas_init(hw) < 0) |
1826 | return -1; |
1827 | } else { |
1828 | if (!hw->is_used_v4l) { |
1829 | for (i = 0; i < hw->buf_num; i++) { |
1830 | canvas_config_config(canvas_y(hw->canvas_spec[i]), |
1831 | &hw->canvas_config[i][0]); |
1832 | canvas_config_config(canvas_u(hw->canvas_spec[i]), |
1833 | &hw->canvas_config[i][1]); |
1834 | } |
1835 | } |
1836 | } |
1837 | /* prepare REF0 & REF1 |
1838 | * points to the past two IP buffers |
1839 | * prepare REC_CANVAS_ADDR and ANC2_CANVAS_ADDR |
1840 | * points to the output buffer |
1841 | */ |
1842 | if (hw->refs[0] == -1) { |
1843 | WRITE_VREG(MREG_REF0, (hw->refs[1] == -1) ? 0xffffffff : |
1844 | hw->canvas_spec[hw->refs[1]]); |
1845 | } else { |
1846 | WRITE_VREG(MREG_REF0, (hw->refs[0] == -1) ? 0xffffffff : |
1847 | hw->canvas_spec[hw->refs[0]]); |
1848 | } |
1849 | WRITE_VREG(MREG_REF1, (hw->refs[1] == -1) ? 0xffffffff : |
1850 | hw->canvas_spec[hw->refs[1]]); |
1851 | |
1852 | WRITE_VREG(REC_CANVAS_ADDR, hw->canvas_spec[index]); |
1853 | WRITE_VREG(ANC2_CANVAS_ADDR, hw->canvas_spec[index]); |
1854 | |
1855 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RESTORE, |
1856 | "restore ref0=0x%x, ref1=0x%x, rec=0x%x, ctx_valid=%d,index=%d\n", |
1857 | READ_VREG(MREG_REF0), |
1858 | READ_VREG(MREG_REF1), |
1859 | READ_VREG(REC_CANVAS_ADDR), |
1860 | hw->ctx_valid, index); |
1861 | |
1862 | /* notify ucode the buffer start address */ |
1863 | workspace_buf = codec_mm_vmap(hw->buf_start, WORKSPACE_SIZE); |
1864 | if (workspace_buf) { |
1865 | /* clear to fix decoder timeout at first time */ |
1866 | if (!hw->init_flag) |
1867 | memset(workspace_buf, 0, WORKSPACE_SIZE); |
1868 | codec_mm_dma_flush(workspace_buf, |
1869 | WORKSPACE_SIZE, DMA_TO_DEVICE); |
1870 | codec_mm_unmap_phyaddr(workspace_buf); |
1871 | } |
1872 | WRITE_VREG(MEM_OFFSET_REG, hw->buf_start); |
1873 | |
1874 | /* disable PSCALE for hardware sharing */ |
1875 | WRITE_VREG(PSCALE_CTRL, 0); |
1876 | |
1877 | WRITE_VREG(MREG_BUFFEROUT, 0); |
1878 | |
1879 | /* clear mailbox interrupt */ |
1880 | WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1); |
1881 | |
1882 | /* enable mailbox interrupt */ |
1883 | WRITE_VREG(ASSIST_MBOX1_MASK, 1); |
1884 | |
1885 | /* clear repeat count */ |
1886 | WRITE_VREG(MP4_NOT_CODED_CNT, 0); |
1887 | |
1888 | #ifdef NV21 |
1889 | SET_VREG_MASK(MDEC_PIC_DC_CTRL, 1 << 17); |
1890 | #endif |
1891 | |
1892 | #if 1/* /MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */ |
1893 | WRITE_VREG(MDEC_PIC_DC_THRESH, 0x404038aa); |
1894 | #endif |
1895 | |
1896 | WRITE_VREG(MP4_PIC_WH, (hw->ctx_valid) ? |
1897 | hw->reg_mp4_pic_wh : |
1898 | ((hw->frame_width << 16) | hw->frame_height)); |
1899 | WRITE_VREG(MP4_SYS_RATE, hw->vmpeg4_amstream_dec_info.rate); |
1900 | |
1901 | if (hw->ctx_valid) { |
1902 | WRITE_VREG(DC_AC_CTRL, hw->reg_dc_ac_ctrl); |
1903 | WRITE_VREG(IQIDCT_CONTROL, hw->reg_iqidct_control); |
1904 | WRITE_VREG(RESYNC_MARKER_LENGTH, hw->reg_resync_marker_length); |
1905 | WRITE_VREG(RV_AI_MB_COUNT, hw->reg_rv_ai_mb_count); |
1906 | } |
1907 | WRITE_VREG(MPEG1_2_REG, (hw->ctx_valid) ? hw->reg_mpeg1_2_reg : 1); |
1908 | WRITE_VREG(VCOP_CTRL_REG, hw->reg_vcop_ctrl_reg); |
1909 | WRITE_VREG(PIC_HEAD_INFO, hw->reg_pic_head_info); |
1910 | WRITE_VREG(SLICE_QP, hw->reg_slice_qp); |
1911 | WRITE_VREG(MB_INFO, hw->reg_mb_info); |
1912 | |
1913 | if (vdec_frame_based(hw_to_vdec(hw)) && hw->chunk) { |
1914 | /* frame based input */ |
1915 | WRITE_VREG(MREG_INPUT, (hw->chunk->offset & 7) | (1<<7) | |
1916 | (hw->ctx_valid<<6)); |
1917 | } else { |
1918 | /* stream based input */ |
1919 | WRITE_VREG(MREG_INPUT, (hw->ctx_valid<<6)); |
1920 | } |
1921 | |
1922 | return 0; |
1923 | } |
1924 | |
1925 | static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw) |
1926 | { |
1927 | int i; |
1928 | |
1929 | hw->vmpeg4_ratio = hw->vmpeg4_amstream_dec_info.ratio; |
1930 | |
1931 | hw->vmpeg4_ratio64 = hw->vmpeg4_amstream_dec_info.ratio64; |
1932 | |
1933 | hw->vmpeg4_rotation = |
1934 | (((unsigned long)hw->vmpeg4_amstream_dec_info.param) >> 16) & 0xffff; |
1935 | hw->sys_mp4_rate = hw->vmpeg4_amstream_dec_info.rate; |
1936 | hw->frame_width = hw->vmpeg4_amstream_dec_info.width; |
1937 | hw->frame_height = hw->vmpeg4_amstream_dec_info.height; |
1938 | hw->frame_dur = 0; |
1939 | hw->frame_prog = 0; |
1940 | hw->unstable_pts = |
1941 | (((unsigned long) hw->vmpeg4_amstream_dec_info.param & 0x40) >> 6); |
1942 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
1943 | "param = 0x%x unstable_pts = %d\n", |
1944 | hw->vmpeg4_amstream_dec_info.param, |
1945 | hw->unstable_pts); |
1946 | hw->last_dec_pts = -1; |
1947 | |
1948 | hw->total_frame = 0; |
1949 | |
1950 | hw->last_anch_pts = 0; |
1951 | |
1952 | hw->last_anch_pts_us64 = 0; |
1953 | |
1954 | hw->last_vop_time_inc = hw->last_duration = 0; |
1955 | |
1956 | hw->vop_time_inc_since_last_anch = 0; |
1957 | hw->last_pts = 0; |
1958 | hw->last_pts64 = 0; |
1959 | hw->frame_num_since_last_anch = 0; |
1960 | hw->frame_num = 0; |
1961 | hw->put_num = 0; |
1962 | hw->run_count = 0; |
1963 | hw->not_run_ready = 0; |
1964 | hw->input_empty = 0; |
1965 | hw->peek_num = 0; |
1966 | hw->get_num = 0; |
1967 | |
1968 | hw->pts_hit = hw->pts_missed = hw->pts_i_hit = hw->pts_i_missed = 0; |
1969 | hw->refs[0] = -1; |
1970 | hw->refs[1] = -1; |
1971 | hw->first_i_frame_ready = 0; |
1972 | hw->drop_frame_count = 0; |
1973 | hw->buffer_not_ready = 0; |
1974 | hw->init_flag = 0; |
1975 | hw->dec_result = DEC_RESULT_NONE; |
1976 | hw->timeout_cnt = 0; |
1977 | |
1978 | for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) |
1979 | hw->vfbuf_use[i] = 0; |
1980 | |
1981 | INIT_KFIFO(hw->display_q); |
1982 | INIT_KFIFO(hw->newframe_q); |
1983 | |
1984 | for (i = 0; i < VF_POOL_SIZE; i++) { |
1985 | const struct vframe_s *vf = &hw->vfpool[i]; |
1986 | |
1987 | hw->vfpool[i].index = DECODE_BUFFER_NUM_MAX; |
1988 | kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf); |
1989 | } |
1990 | if (hw->mm_blk_handle) { |
1991 | decoder_bmmu_box_free(hw->mm_blk_handle); |
1992 | hw->mm_blk_handle = NULL; |
1993 | } |
1994 | hw->mm_blk_handle = decoder_bmmu_box_alloc_box( |
1995 | DRIVER_NAME, |
1996 | 0, |
1997 | MAX_BMMU_BUFFER_NUM, |
1998 | 4 + PAGE_SHIFT, |
1999 | CODEC_MM_FLAGS_CMA_CLEAR | |
2000 | CODEC_MM_FLAGS_FOR_VDECODER); |
2001 | INIT_WORK(&hw->work, vmpeg4_work); |
2002 | |
2003 | init_waitqueue_head(&hw->wait_q); |
2004 | } |
2005 | |
2006 | static s32 vmmpeg4_init(struct vdec_mpeg4_hw_s *hw) |
2007 | { |
2008 | int trickmode_fffb = 0; |
2009 | int size = -1, fw_size = 0x1000 * 16; |
2010 | struct firmware_s *fw = NULL; |
2011 | |
2012 | fw = vmalloc(sizeof(struct firmware_s) + fw_size); |
2013 | if (IS_ERR_OR_NULL(fw)) |
2014 | return -ENOMEM; |
2015 | |
2016 | if (hw->vmpeg4_amstream_dec_info.format == |
2017 | VIDEO_DEC_FORMAT_MPEG4_5) { |
2018 | size = get_firmware_data(VIDEO_DEC_MPEG4_5_MULTI, fw->data); |
2019 | strncpy(fw->name, "mmpeg4_mc_5", sizeof(fw->name)); |
2020 | } else if (hw->vmpeg4_amstream_dec_info.format == |
2021 | VIDEO_DEC_FORMAT_H263) { |
2022 | size = get_firmware_data(VIDEO_DEC_H263_MULTI, fw->data); |
2023 | strncpy(fw->name, "mh263_mc", sizeof(fw->name)); |
2024 | } else |
2025 | pr_err("unsupport mpeg4 sub format %d\n", |
2026 | hw->vmpeg4_amstream_dec_info.format); |
2027 | pr_info("mmpeg4 get fw %s, size %x\n", fw->name, size); |
2028 | if (size < 0) { |
2029 | pr_err("get firmware failed."); |
2030 | vfree(fw); |
2031 | return -1; |
2032 | } |
2033 | |
2034 | fw->len = size; |
2035 | hw->fw = fw; |
2036 | |
2037 | query_video_status(0, &trickmode_fffb); |
2038 | |
2039 | pr_info("%s\n", __func__); |
2040 | |
2041 | amvdec_enable(); |
2042 | |
2043 | init_timer(&hw->check_timer); |
2044 | hw->check_timer.data = (unsigned long)hw; |
2045 | hw->check_timer.function = check_timer_func; |
2046 | hw->check_timer.expires = jiffies + CHECK_INTERVAL; |
2047 | hw->stat |= STAT_TIMER_ARM; |
2048 | hw->eos = 0; |
2049 | WRITE_VREG(DECODE_STOP_POS, udebug_flag); |
2050 | |
2051 | vmpeg4_local_init(hw); |
2052 | wmb(); |
2053 | |
2054 | return 0; |
2055 | } |
2056 | |
2057 | static unsigned long run_ready(struct vdec_s *vdec, unsigned long mask) |
2058 | { |
2059 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private; |
2060 | |
2061 | if (hw->eos) |
2062 | return 0; |
2063 | if (vdec_stream_based(vdec) && (hw->init_flag == 0) |
2064 | && pre_decode_buf_level != 0) { |
2065 | u32 rp, wp, level; |
2066 | |
2067 | rp = READ_PARSER_REG(PARSER_VIDEO_RP); |
2068 | wp = READ_PARSER_REG(PARSER_VIDEO_WP); |
2069 | if (wp < rp) |
2070 | level = vdec->input.size + wp - rp; |
2071 | else |
2072 | level = wp - rp; |
2073 | if (level < pre_decode_buf_level) { |
2074 | hw->not_run_ready++; |
2075 | return 0; |
2076 | } |
2077 | } |
2078 | |
2079 | if (!is_enough_free_buffer(hw)) { |
2080 | hw->buffer_not_ready++; |
2081 | return 0; |
2082 | } |
2083 | |
2084 | hw->not_run_ready = 0; |
2085 | hw->buffer_not_ready = 0; |
2086 | if (vdec->parallel_dec == 1) |
2087 | return (unsigned long)(CORE_MASK_VDEC_1); |
2088 | else |
2089 | return (unsigned long)(CORE_MASK_VDEC_1 | CORE_MASK_HEVC); |
2090 | } |
2091 | |
2092 | static unsigned char get_data_check_sum |
2093 | (struct vdec_mpeg4_hw_s *hw, int size) |
2094 | { |
2095 | int jj; |
2096 | int sum = 0; |
2097 | u8 *data = NULL; |
2098 | |
2099 | if (!hw->chunk->block->is_mapped) |
2100 | data = codec_mm_vmap(hw->chunk->block->start + |
2101 | hw->chunk->offset, size); |
2102 | else |
2103 | data = ((u8 *)hw->chunk->block->start_virt) + |
2104 | hw->chunk->offset; |
2105 | |
2106 | for (jj = 0; jj < size; jj++) |
2107 | sum += data[jj]; |
2108 | |
2109 | if (!hw->chunk->block->is_mapped) |
2110 | codec_mm_unmap_phyaddr(data); |
2111 | return sum; |
2112 | } |
2113 | |
2114 | static void run(struct vdec_s *vdec, unsigned long mask, |
2115 | void (*callback)(struct vdec_s *, void *), void *arg) |
2116 | { |
2117 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private; |
2118 | int size = 0, ret = 0; |
2119 | |
2120 | hw->run_count++; |
2121 | hw->vdec_cb_arg = arg; |
2122 | hw->vdec_cb = callback; |
2123 | vdec_reset_core(vdec); |
2124 | |
2125 | if ((vdec_frame_based(vdec)) && |
2126 | (hw->dec_result == DEC_RESULT_UNFINISH)) { |
2127 | vmpeg4_prepare_input(hw); |
2128 | size = hw->chunk_size; |
2129 | } else { |
2130 | size = vdec_prepare_input(vdec, &hw->chunk); |
2131 | if (size < 4) { /*less than start code size 00 00 01 xx*/ |
2132 | hw->input_empty++; |
2133 | hw->dec_result = DEC_RESULT_AGAIN; |
2134 | vdec_schedule_work(&hw->work); |
2135 | return; |
2136 | } |
2137 | if ((vdec_frame_based(vdec)) && |
2138 | (hw->chunk != NULL)) { |
2139 | hw->chunk_offset = hw->chunk->offset; |
2140 | hw->chunk_size = hw->chunk->size; |
2141 | hw->chunk_frame_count = 0; |
2142 | } |
2143 | } |
2144 | if (vdec_frame_based(vdec) && |
2145 | (debug_enable & 0xc00)) { |
2146 | u8 *data = NULL; |
2147 | |
2148 | if (!hw->chunk->block->is_mapped) |
2149 | data = codec_mm_vmap(hw->chunk->block->start + |
2150 | hw->chunk->offset, size); |
2151 | else |
2152 | data = ((u8 *)hw->chunk->block->start_virt) + |
2153 | hw->chunk->offset; |
2154 | |
2155 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS, |
2156 | "%s: size 0x%x sum 0x%x %02x %02x %02x %02x %02x %02x .. %02x %02x %02x %02x\n", |
2157 | __func__, size, get_data_check_sum(hw, size), |
2158 | data[0], data[1], data[2], data[3], |
2159 | data[4], data[5], data[size - 4], |
2160 | data[size - 3], data[size - 2], |
2161 | data[size - 1]); |
2162 | |
2163 | if (debug_enable & PRINT_FRAMEBASE_DATA) { |
2164 | int jj; |
2165 | |
2166 | for (jj = 0; jj < size; jj++) { |
2167 | if ((jj & 0xf) == 0) |
2168 | mmpeg4_debug_print(DECODE_ID(hw), |
2169 | PRINT_FRAMEBASE_DATA, |
2170 | "%06x:", jj); |
2171 | mmpeg4_debug_print(DECODE_ID(hw), |
2172 | PRINT_FRAMEBASE_DATA, |
2173 | "%02x ", data[jj]); |
2174 | if (((jj + 1) & 0xf) == 0) |
2175 | mmpeg4_debug_print(DECODE_ID(hw), |
2176 | PRINT_FRAMEBASE_DATA, |
2177 | "\n"); |
2178 | } |
2179 | } |
2180 | |
2181 | if (!hw->chunk->block->is_mapped) |
2182 | codec_mm_unmap_phyaddr(data); |
2183 | } |
2184 | |
2185 | mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW, |
2186 | "%s, size=%d, %x %x %x %x %x\n", |
2187 | __func__, size, |
2188 | READ_VREG(VLD_MEM_VIFIFO_LEVEL), |
2189 | READ_VREG(VLD_MEM_VIFIFO_WP), |
2190 | READ_VREG(VLD_MEM_VIFIFO_RP), |
2191 | READ_PARSER_REG(PARSER_VIDEO_RP), |
2192 | READ_PARSER_REG(PARSER_VIDEO_WP)); |
2193 | |
2194 | hw->dec_result = DEC_RESULT_NONE; |
2195 | if (vdec->mc_loaded) { |
2196 | /*firmware have load before, |
2197 | and not changes to another. |
2198 | ignore reload. |
2199 | */ |
2200 | } else { |
2201 | ret = amvdec_vdec_loadmc_buf_ex(VFORMAT_MPEG4,hw->fw->name, vdec, |
2202 | hw->fw->data, hw->fw->len); |
2203 | if (ret < 0) { |
2204 | pr_err("[%d] %s: the %s fw loading failed, err: %x\n", vdec->id, |
2205 | hw->fw->name, tee_enabled() ? "TEE" : "local", ret); |
2206 | hw->dec_result = DEC_RESULT_FORCE_EXIT; |
2207 | vdec_schedule_work(&hw->work); |
2208 | return; |
2209 | } |
2210 | vdec->mc_loaded = 1; |
2211 | vdec->mc_type = VFORMAT_MPEG4; |
2212 | } |
2213 | if (vmpeg4_hw_ctx_restore(hw) < 0) { |
2214 | hw->dec_result = DEC_RESULT_ERROR; |
2215 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
2216 | "amvdec_mpeg4: error HW context restore\n"); |
2217 | vdec_schedule_work(&hw->work); |
2218 | return; |
2219 | } |
2220 | if (vdec_frame_based(vdec)) { |
2221 | size = hw->chunk_size + |
2222 | (hw->chunk_offset & (VDEC_FIFO_ALIGN - 1)); |
2223 | WRITE_VREG(VIFF_BIT_CNT, size * 8); |
2224 | if (vdec->mvfrm) |
2225 | vdec->mvfrm->frame_size = hw->chunk->size; |
2226 | } |
2227 | hw->input_empty = 0; |
2228 | hw->last_vld_level = 0; |
2229 | start_process_time(hw); |
2230 | vdec_enable_input(vdec); |
2231 | /* wmb before ISR is handled */ |
2232 | wmb(); |
2233 | |
2234 | if (vdec->mvfrm) |
2235 | vdec->mvfrm->hw_decode_start = local_clock(); |
2236 | amvdec_start(); |
2237 | hw->stat |= STAT_VDEC_RUN; |
2238 | hw->init_flag = 1; |
2239 | mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL); |
2240 | } |
2241 | |
2242 | static int vmpeg4_stop(struct vdec_mpeg4_hw_s *hw) |
2243 | { |
2244 | cancel_work_sync(&hw->work); |
2245 | |
2246 | if (hw->mm_blk_handle) { |
2247 | decoder_bmmu_box_free(hw->mm_blk_handle); |
2248 | hw->mm_blk_handle = NULL; |
2249 | } |
2250 | |
2251 | if (hw->stat & STAT_TIMER_ARM) { |
2252 | del_timer_sync(&hw->check_timer); |
2253 | hw->stat &= ~STAT_TIMER_ARM; |
2254 | } |
2255 | |
2256 | if (hw->fw) { |
2257 | vfree(hw->fw); |
2258 | hw->fw = NULL; |
2259 | } |
2260 | return 0; |
2261 | } |
2262 | static void reset(struct vdec_s *vdec) |
2263 | { |
2264 | struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private; |
2265 | |
2266 | pr_info("amvdec_mmpeg4: reset.\n"); |
2267 | |
2268 | vmpeg4_local_init(hw); |
2269 | |
2270 | hw->ctx_valid = 0; |
2271 | } |
2272 | |
2273 | static int vmpeg4_set_trickmode(struct vdec_s *vdec, unsigned long trickmode) |
2274 | { |
2275 | struct vdec_mpeg4_hw_s *hw = |
2276 | (struct vdec_mpeg4_hw_s *)vdec->private; |
2277 | if (!hw) |
2278 | return 0; |
2279 | |
2280 | if (trickmode == TRICKMODE_I) { |
2281 | hw->i_only = 0x3; |
2282 | trickmode_i = 1; |
2283 | } else if (trickmode == TRICKMODE_NONE) { |
2284 | hw->i_only = 0x0; |
2285 | trickmode_i = 0; |
2286 | } |
2287 | return 0; |
2288 | } |
2289 | |
2290 | static int ammvdec_mpeg4_probe(struct platform_device *pdev) |
2291 | { |
2292 | struct vdec_s *pdata = *(struct vdec_s **)pdev->dev.platform_data; |
2293 | struct vdec_mpeg4_hw_s *hw = NULL; |
2294 | int config_val = 0; |
2295 | |
2296 | if (pdata == NULL) { |
2297 | pr_err("%s memory resource undefined.\n", __func__); |
2298 | return -EFAULT; |
2299 | } |
2300 | |
2301 | hw = vmalloc(sizeof(struct vdec_mpeg4_hw_s)); |
2302 | if (hw == NULL) { |
2303 | pr_err("\namvdec_mpeg4 decoder driver alloc failed\n"); |
2304 | return -ENOMEM; |
2305 | } |
2306 | memset(hw, 0, sizeof(struct vdec_mpeg4_hw_s)); |
2307 | |
2308 | /* the ctx from v4l2 driver. */ |
2309 | hw->v4l2_ctx = pdata->private; |
2310 | |
2311 | pdata->private = hw; |
2312 | pdata->dec_status = dec_status; |
2313 | /* pdata->set_trickmode = set_trickmode; */ |
2314 | pdata->set_trickmode = vmpeg4_set_trickmode; |
2315 | pdata->run_ready = run_ready; |
2316 | pdata->run = run; |
2317 | pdata->reset = reset; |
2318 | pdata->irq_handler = vmpeg4_isr; |
2319 | pdata->threaded_irq_handler = vmpeg4_isr_thread_fn; |
2320 | pdata->dump_state = vmpeg4_dump_state; |
2321 | |
2322 | if (pdata->use_vfm_path) |
2323 | snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE, |
2324 | VFM_DEC_PROVIDER_NAME); |
2325 | else |
2326 | snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE, |
2327 | PROVIDER_NAME ".%02x", pdev->id & 0xff); |
2328 | |
2329 | |
2330 | if (((debug_enable & IGNORE_PARAM_FROM_CONFIG) == 0) && pdata->config_len) { |
2331 | mmpeg4_debug_print(DECODE_ID(hw), 0, "pdata->config: %s\n", pdata->config); |
2332 | if (get_config_int(pdata->config, "parm_v4l_buffer_margin", |
2333 | &config_val) == 0) |
2334 | hw->dynamic_buf_num_margin = config_val; |
2335 | else |
2336 | hw->dynamic_buf_num_margin = dynamic_buf_num_margin; |
2337 | } else { |
2338 | hw->dynamic_buf_num_margin = dynamic_buf_num_margin; |
2339 | } |
2340 | hw->buf_num = vmpeg4_get_buf_num(hw); |
2341 | |
2342 | if (pdata->parallel_dec == 1) { |
2343 | int i; |
2344 | for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) |
2345 | hw->canvas_spec[i] = 0xffffff; |
2346 | } |
2347 | |
2348 | vf_provider_init(&pdata->vframe_provider, |
2349 | pdata->vf_provider_name, &vf_provider_ops, pdata); |
2350 | |
2351 | platform_set_drvdata(pdev, pdata); |
2352 | hw->platform_dev = pdev; |
2353 | hw->blkmode = pdata->canvas_mode; |
2354 | |
2355 | if (pdata->sys_info) { |
2356 | hw->vmpeg4_amstream_dec_info = *pdata->sys_info; |
2357 | if ((hw->vmpeg4_amstream_dec_info.height != 0) && |
2358 | (hw->vmpeg4_amstream_dec_info.width > |
2359 | (MAX_MPEG4_SUPPORT_SIZE/hw->vmpeg4_amstream_dec_info.height))) { |
2360 | pr_info("ammvdec_mpeg4: oversize, unsupport: %d*%d\n", |
2361 | hw->vmpeg4_amstream_dec_info.width, |
2362 | hw->vmpeg4_amstream_dec_info.height); |
2363 | pdata->dec_status = NULL; |
2364 | vfree((void *)hw); |
2365 | hw = NULL; |
2366 | return -EFAULT; |
2367 | } |
2368 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
2369 | "sysinfo: %d x %d, rate: %d\n", |
2370 | hw->vmpeg4_amstream_dec_info.width, |
2371 | hw->vmpeg4_amstream_dec_info.height, |
2372 | hw->vmpeg4_amstream_dec_info.rate); |
2373 | hw->is_used_v4l = (((unsigned long) |
2374 | hw->vmpeg4_amstream_dec_info.param & 0x80) >> 7); |
2375 | } |
2376 | |
2377 | if (vmmpeg4_init(hw) < 0) { |
2378 | pr_err("%s init failed.\n", __func__); |
2379 | |
2380 | if (hw) { |
2381 | vfree((void *)hw); |
2382 | hw = NULL; |
2383 | } |
2384 | pdata->dec_status = NULL; |
2385 | return -ENODEV; |
2386 | } |
2387 | vdec_set_prepare_level(pdata, start_decode_buf_level); |
2388 | |
2389 | vdec_set_vframe_comm(pdata, DRIVER_NAME); |
2390 | |
2391 | if (pdata->parallel_dec == 1) |
2392 | vdec_core_request(pdata, CORE_MASK_VDEC_1); |
2393 | else { |
2394 | vdec_core_request(pdata, CORE_MASK_VDEC_1 | CORE_MASK_HEVC |
2395 | | CORE_MASK_COMBINE); |
2396 | } |
2397 | |
2398 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
2399 | "%s end.\n", __func__); |
2400 | return 0; |
2401 | } |
2402 | |
2403 | static int ammvdec_mpeg4_remove(struct platform_device *pdev) |
2404 | { |
2405 | struct vdec_mpeg4_hw_s *hw = |
2406 | (struct vdec_mpeg4_hw_s *) |
2407 | (((struct vdec_s *)(platform_get_drvdata(pdev)))->private); |
2408 | struct vdec_s *vdec = hw_to_vdec(hw); |
2409 | int i; |
2410 | |
2411 | if (vdec->next_status == VDEC_STATUS_DISCONNECTED |
2412 | && (vdec->status == VDEC_STATUS_ACTIVE)) { |
2413 | mmpeg4_debug_print(DECODE_ID(hw), 0, |
2414 | "%s force exit %d\n", __func__, __LINE__); |
2415 | hw->dec_result = DEC_RESULT_FORCE_EXIT; |
2416 | vdec_schedule_work(&hw->work); |
2417 | wait_event_interruptible_timeout(hw->wait_q, |
2418 | (vdec->status == VDEC_STATUS_CONNECTED), |
2419 | msecs_to_jiffies(1000)); /* wait for work done */ |
2420 | } |
2421 | |
2422 | vmpeg4_stop(hw); |
2423 | |
2424 | if (vdec->parallel_dec == 1) |
2425 | vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1); |
2426 | else |
2427 | vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1 | CORE_MASK_HEVC); |
2428 | vdec_set_status(hw_to_vdec(hw), VDEC_STATUS_DISCONNECTED); |
2429 | |
2430 | if (vdec->parallel_dec == 1) { |
2431 | for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) { |
2432 | vdec->free_canvas_ex(canvas_y(hw->canvas_spec[i]), vdec->id); |
2433 | vdec->free_canvas_ex(canvas_u(hw->canvas_spec[i]), vdec->id); |
2434 | } |
2435 | } |
2436 | |
2437 | mmpeg4_debug_print(DECODE_ID(hw), 0, "%s\n", __func__); |
2438 | vfree((void *)hw); |
2439 | hw = NULL; |
2440 | |
2441 | return 0; |
2442 | } |
2443 | |
2444 | /****************************************/ |
2445 | #ifdef CONFIG_PM |
2446 | static int mmpeg4_suspend(struct device *dev) |
2447 | { |
2448 | amvdec_suspend(to_platform_device(dev), dev->power.power_state); |
2449 | return 0; |
2450 | } |
2451 | |
2452 | static int mmpeg4_resume(struct device *dev) |
2453 | { |
2454 | amvdec_resume(to_platform_device(dev)); |
2455 | return 0; |
2456 | } |
2457 | |
2458 | static const struct dev_pm_ops mmpeg4_pm_ops = { |
2459 | SET_SYSTEM_SLEEP_PM_OPS(mmpeg4_suspend, mmpeg4_resume) |
2460 | }; |
2461 | #endif |
2462 | |
2463 | static struct platform_driver ammvdec_mpeg4_driver = { |
2464 | .probe = ammvdec_mpeg4_probe, |
2465 | .remove = ammvdec_mpeg4_remove, |
2466 | .driver = { |
2467 | .name = DRIVER_NAME, |
2468 | #ifdef CONFIG_PM |
2469 | .pm = &mmpeg4_pm_ops, |
2470 | #endif |
2471 | } |
2472 | }; |
2473 | |
2474 | static struct codec_profile_t amvdec_mpeg4_profile = { |
2475 | .name = "mmpeg4", |
2476 | .profile = "" |
2477 | }; |
2478 | |
2479 | static int __init ammvdec_mpeg4_driver_init_module(void) |
2480 | { |
2481 | pr_info("%s \n", __func__); |
2482 | |
2483 | if (platform_driver_register(&ammvdec_mpeg4_driver)) { |
2484 | pr_err("failed to register ammvdec_mpeg4 driver\n"); |
2485 | return -ENODEV; |
2486 | } |
2487 | vcodec_profile_register(&amvdec_mpeg4_profile); |
2488 | return 0; |
2489 | } |
2490 | |
2491 | static void __exit ammvdec_mpeg4_driver_remove_module(void) |
2492 | { |
2493 | pr_info("ammvdec_mpeg4 module remove.\n"); |
2494 | |
2495 | platform_driver_unregister(&ammvdec_mpeg4_driver); |
2496 | } |
2497 | |
2498 | /****************************************/ |
2499 | module_param(debug_enable, uint, 0664); |
2500 | MODULE_PARM_DESC(debug_enable, |
2501 | "\n ammvdec_mpeg4 debug enable\n"); |
2502 | |
2503 | module_param(frmbase_cont_bitlevel, uint, 0664); |
2504 | MODULE_PARM_DESC(frmbase_cont_bitlevel, "\nfrmbase_cont_bitlevel\n"); |
2505 | |
2506 | module_param(dynamic_buf_num_margin, uint, 0664); |
2507 | MODULE_PARM_DESC(dynamic_buf_num_margin, "\n dynamic_buf_num_margin\n"); |
2508 | |
2509 | module_param(radr, uint, 0664); |
2510 | MODULE_PARM_DESC(radr, "\nradr\n"); |
2511 | |
2512 | module_param(rval, uint, 0664); |
2513 | MODULE_PARM_DESC(rval, "\nrval\n"); |
2514 | |
2515 | module_param(decode_timeout_val, uint, 0664); |
2516 | MODULE_PARM_DESC(decode_timeout_val, "\n ammvdec_mpeg4 decode_timeout_val\n"); |
2517 | |
2518 | module_param_array(max_process_time, uint, &max_decode_instance_num, 0664); |
2519 | |
2520 | module_param(pre_decode_buf_level, int, 0664); |
2521 | MODULE_PARM_DESC(pre_decode_buf_level, |
2522 | "\n ammvdec_mpeg4 pre_decode_buf_level\n"); |
2523 | |
2524 | module_param(start_decode_buf_level, int, 0664); |
2525 | MODULE_PARM_DESC(start_decode_buf_level, |
2526 | "\n ammvdec_mpeg4 start_decode_buf_level\n"); |
2527 | |
2528 | module_param(udebug_flag, uint, 0664); |
2529 | MODULE_PARM_DESC(udebug_flag, "\n ammvdec_mpeg4 udebug_flag\n"); |
2530 | |
2531 | module_param(without_display_mode, uint, 0664); |
2532 | MODULE_PARM_DESC(without_display_mode, "\n ammvdec_mpeg4 without_display_mode\n"); |
2533 | |
2534 | module_init(ammvdec_mpeg4_driver_init_module); |
2535 | module_exit(ammvdec_mpeg4_driver_remove_module); |
2536 | |
2537 | MODULE_DESCRIPTION("AMLOGIC MPEG4 Video Decoder Driver"); |
2538 | MODULE_LICENSE("GPL"); |
2539 | MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>"); |
2540 | |
2541 |