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path: root/drivers/frame_provider/decoder/utils/vdec_v4l2_buffer_ops.c (plain)
blob: e133b937eef5c94d9c8dc1dd845ff2f8e9ee6ca3
1#include "vdec_v4l2_buffer_ops.h"
2#include <media/v4l2-mem2mem.h>
3#include <linux/printk.h>
4
5int vdec_v4l_get_buffer(struct aml_vcodec_ctx *ctx,
6 struct vdec_v4l2_buffer **out)
7{
8 int ret = -1;
9
10 if (ctx->drv_handle == 0)
11 return -EIO;
12
13 ret = ctx->dec_if->get_param(ctx->drv_handle,
14 GET_PARAM_FREE_FRAME_BUFFER, out);
15
16 return ret;
17}
18EXPORT_SYMBOL(vdec_v4l_get_buffer);
19
20int vdec_v4l_get_pic_info(struct aml_vcodec_ctx *ctx,
21 struct vdec_pic_info *pic)
22{
23 int ret = 0;
24
25 if (ctx->drv_handle == 0)
26 return -EIO;
27
28 ret = ctx->dec_if->get_param(ctx->drv_handle,
29 GET_PARAM_PIC_INFO, pic);
30
31 return ret;
32}
33EXPORT_SYMBOL(vdec_v4l_get_pic_info);
34
35int vdec_v4l_set_ps_infos(struct aml_vcodec_ctx *ctx,
36 struct aml_vdec_ps_infos *ps)
37{
38 int ret = 0;
39
40 if (ctx->drv_handle == 0)
41 return -EIO;
42
43 ret = ctx->dec_if->set_param(ctx->drv_handle,
44 SET_PARAM_PS_INFO, ps);
45
46 return ret;
47}
48EXPORT_SYMBOL(vdec_v4l_set_ps_infos);
49
50int vdec_v4l_set_hdr_infos(struct aml_vcodec_ctx *ctx,
51 struct aml_vdec_hdr_infos *hdr)
52{
53 int ret = 0;
54
55 if (ctx->drv_handle == 0)
56 return -EIO;
57
58 ret = ctx->dec_if->set_param(ctx->drv_handle,
59 SET_PARAM_HDR_INFO, hdr);
60
61 return ret;
62}
63EXPORT_SYMBOL(vdec_v4l_set_hdr_infos);
64
65static void aml_wait_dpb_ready(struct aml_vcodec_ctx *ctx)
66{
67 ulong expires;
68
69 expires = jiffies + msecs_to_jiffies(1000);
70 while (!ctx->v4l_codec_dpb_ready) {
71 u32 ready_num = 0;
72
73 if (time_after(jiffies, expires)) {
74 pr_err("the DPB state has not ready.\n");
75 break;
76 }
77
78 ready_num = v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx);
79 if ((ready_num + ctx->buf_used_count) >= ctx->dpb_size)
80 ctx->v4l_codec_dpb_ready = true;
81 }
82}
83
84void aml_vdec_pic_info_update(struct aml_vcodec_ctx *ctx)
85{
86 unsigned int dpbsize = 0;
87 int ret;
88
89 if (ctx->dec_if->get_param(ctx->drv_handle, GET_PARAM_PIC_INFO, &ctx->last_decoded_picinfo)) {
90 pr_err("Cannot get param : GET_PARAM_PICTURE_INFO ERR\n");
91 return;
92 }
93
94 if (ctx->last_decoded_picinfo.visible_width == 0 ||
95 ctx->last_decoded_picinfo.visible_height == 0 ||
96 ctx->last_decoded_picinfo.coded_width == 0 ||
97 ctx->last_decoded_picinfo.coded_height == 0) {
98 pr_err("Cannot get correct pic info\n");
99 return;
100 }
101
102 ret = ctx->dec_if->get_param(ctx->drv_handle, GET_PARAM_DPB_SIZE, &dpbsize);
103 if (dpbsize == 0)
104 pr_err("Incorrect dpb size, ret=%d\n", ret);
105
106 /* update picture information */
107 ctx->dpb_size = dpbsize;
108 ctx->picinfo = ctx->last_decoded_picinfo;
109}
110
111int vdec_v4l_post_evet(struct aml_vcodec_ctx *ctx, u32 event)
112{
113 int ret = 0;
114
115 if (ctx->drv_handle == 0)
116 return -EIO;
117 if (event == 1)
118 ctx->reset_flag = 2;
119 ret = ctx->dec_if->set_param(ctx->drv_handle,
120 SET_PARAM_POST_EVENT, &event);
121
122 return ret;
123}
124EXPORT_SYMBOL(vdec_v4l_post_evet);
125
126int vdec_v4l_res_ch_event(struct aml_vcodec_ctx *ctx)
127{
128 int ret = 0;
129 struct aml_vcodec_dev *dev = ctx->dev;
130
131 if (ctx->drv_handle == 0)
132 return -EIO;
133
134 /* wait the DPB state to be ready. */
135 aml_wait_dpb_ready(ctx);
136
137 aml_vdec_pic_info_update(ctx);
138
139 mutex_lock(&ctx->state_lock);
140
141 ctx->state = AML_STATE_FLUSHING;/*prepare flushing*/
142
143 pr_info("[%d]: vcodec state (AML_STATE_FLUSHING-RESCHG)\n", ctx->id);
144
145 mutex_unlock(&ctx->state_lock);
146
147 ctx->q_data[AML_Q_DATA_SRC].resolution_changed = true;
148 v4l2_m2m_job_pause(dev->m2m_dev_dec, ctx->m2m_ctx);
149
150 return ret;
151}
152EXPORT_SYMBOL(vdec_v4l_res_ch_event);
153
154
155int vdec_v4l_write_frame_sync(struct aml_vcodec_ctx *ctx)
156{
157 int ret = 0;
158
159 if (ctx->drv_handle == 0)
160 return -EIO;
161
162 ret = ctx->dec_if->set_param(ctx->drv_handle,
163 SET_PARAM_WRITE_FRAME_SYNC, NULL);
164
165 return ret;
166}
167EXPORT_SYMBOL(vdec_v4l_write_frame_sync);
168
169