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path: root/drivers/stream_input/tv_frontend/atv_demod/atvdemod_func.c (plain)
blob: f5a086e8e93262550f732095181cd97ed9a98c0b
1/*
2 * Silicon labs amlogic Atvdemod Device Driver
3 *
4 * Author: dezhi kong <dezhi.kong@amlogic.com>
5 *
6 *
7 * Copyright (C) 2014 Amlogic Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14/* Standard Liniux Headers */
15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/delay.h>
18#include <linux/timer.h>
19#include <linux/mutex.h>
20#include <linux/interrupt.h>
21#include <linux/time.h>
22
23#include "atvdemod_func.h"
24#include "../aml_dvb_reg.h"
25
26static int broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC;
27module_param(broad_std, int, 0644);
28MODULE_PARM_DESC(broad_std, "\n broad_std\n");
29
30static unsigned long over_threshold = 0xffff;
31module_param(over_threshold, ulong, 0644);
32MODULE_PARM_DESC(over_threshold, "\n over_threshold\n");
33
34static unsigned long input_amplitude = 0xffff;
35module_param(input_amplitude, ulong, 0644);
36MODULE_PARM_DESC(input_amplitude, "\n input_amplitude\n");
37
38static bool audio_det_en;
39module_param(audio_det_en, bool, 0644);
40MODULE_PARM_DESC(audio_det_en, "\n audio_det_en\n");
41
42static bool non_std_en;
43module_param(non_std_en, bool, 0644);
44MODULE_PARM_DESC(non_std__en, "\n non_std_en\n");
45
46static int atv_video_gain;
47module_param(atv_video_gain, int, 0644);
48MODULE_PARM_DESC(atv_video_gain, "\n atv_video_gain\n");
49
50static int audio_det_mode = AUDIO_AUTO_DETECT;
51module_param(audio_det_mode, int, 0644);
52MODULE_PARM_DESC(audio_det_mode, "\n audio_det_mode\n");
53
54static int aud_dmd_jilinTV;
55module_param(aud_dmd_jilinTV, int, 0644);
56MODULE_PARM_DESC(aud_dmd_jilinTV, "\naud dmodulation setting for jilin TV\n");
57
58static unsigned int if_freq = 4250000; /*PAL-DK:3250000;NTSC-M:4250000*/
59module_param(if_freq, uint, 0644);
60MODULE_PARM_DESC(if_freq, "\n if_freq\n");
61
62static int if_inv;
63module_param(if_inv, int, 0644);
64MODULE_PARM_DESC(if_inv, "\n if_inv\n");
65
66static int afc_default = CARR_AFC_DEFAULT_VAL;
67module_param(afc_default, int, 0644);
68MODULE_PARM_DESC(afc_default, "\n afc_default\n");
69
70/*GDE_Curve
71 * 0: CURVE-M
72 * 1: CURVE-A
73 * 2: CURVE-B
74 * 3: CURVE-CHINA
75 * 4: BYPASS
76 *BG --> CURVE-B(BYPASS)
77 *DK --> CURVE-CHINA
78 *NM --> CURVE-M
79 *I --> BYPASS
80 *SECAM --> BYPASS
81 */
82static int gde_curve;
83module_param(gde_curve, int, 0644);
84MODULE_PARM_DESC(gde_curve, "\n gde_curve\n");
85
86static int sound_format;
87module_param(sound_format, int, 0644);
88MODULE_PARM_DESC(sound_format, "\n sound_format\n");
89
90static unsigned int freq_hz_cvrt = AML_ATV_DEMOD_FREQ_60HZ_VERT;
91module_param(freq_hz_cvrt, int, 0644);
92MODULE_PARM_DESC(freq_hz_cvrt, "\n freq_hz\n");
93
94int atvdemod_debug_en;
95module_param(atvdemod_debug_en, int, 0644);
96MODULE_PARM_DESC(atvdemod_debug_en, "\n atvdemod_debug_en\n");
97
98/*1:gpio mode output low;2:pwm mode*/
99static unsigned int atvdemod_agc_pinmux = 2;
100module_param(atvdemod_agc_pinmux, int, 0644);
101MODULE_PARM_DESC(atvdemod_agc_pinmux, "\n atvdemod_agc_pinmux\n");
102
103static unsigned int atvdemod_afc_range = 5;
104module_param(atvdemod_afc_range, uint, 0644);
105MODULE_PARM_DESC(atvdemod_afc_range, "\n atvdemod_afc_range\n");
106
107static unsigned int atvdemod_afc_offset = 500;
108module_param(atvdemod_afc_offset, uint, 0644);
109MODULE_PARM_DESC(atvdemod_afc_offset, "\n atvdemod_afc_offset\n");
110
111static unsigned int atvdemod_timer_en = 1;
112module_param(atvdemod_timer_en, uint, 0644);
113MODULE_PARM_DESC(atvdemod_timer_en, "\n atvdemod_timer_en\n");
114
115static unsigned int atvdemod_afc_en;
116module_param(atvdemod_afc_en, uint, 0644);
117MODULE_PARM_DESC(atvdemod_afc_en, "\n atvdemod_afc_en\n");
118
119static unsigned int atvdemod_monitor_en;
120module_param(atvdemod_monitor_en, uint, 0644);
121MODULE_PARM_DESC(atvdemod_monitor_en, "\n atvdemod_monitor_en\n");
122
123static unsigned int atvdemod_det_snr_en = 1;
124module_param(atvdemod_det_snr_en, uint, 0644);
125MODULE_PARM_DESC(atvdemod_det_snr_en, "\n atvdemod_det_snr_en\n");
126
127static unsigned int pwm_kp = 0x19;
128module_param(pwm_kp, uint, 0644);
129MODULE_PARM_DESC(pwm_kp, "\n pwm_kp\n");
130
131static unsigned int reg_dbg_en;
132module_param(reg_dbg_en, uint, 0644);
133MODULE_PARM_DESC(reg_dbg_en, "\n reg_dbg_en\n");
134
135static unsigned int audio_gain_val = 512;
136module_param(audio_gain_val, uint, 0644);
137MODULE_PARM_DESC(audio_gain_val, "\n audio_gain_val\n");
138
139enum AUDIO_SCAN_ID {
140 ID_PAL_I = 0,
141 ID_PAL_M,
142 ID_PAL_DK,
143 ID_PAL_BG,
144 ID_MAX,
145};
146
147static unsigned int mix1_freq;
148static unsigned int timer_init_flag;
149struct timer_list atvdemod_timer;
150static int snr_val;
151int broad_std_except_pal_m;
152
153int get_atvdemod_snr_val(void)
154{
155 return snr_val;
156}
157EXPORT_SYMBOL(get_atvdemod_snr_val);
158
159void amlatvdemod_set_std(int val)
160{
161 broad_std = val;
162}
163EXPORT_SYMBOL(amlatvdemod_set_std);
164
165void atv_dmd_wr_reg(unsigned char block, unsigned char reg, unsigned long data)
166{
167 /* unsigned long data_tmp; */
168 unsigned long reg_addr = (block<<8) + reg * 4;
169
170 amlatvdemod_reg_write(reg_addr, data);
171}
172
173unsigned long atv_dmd_rd_reg(unsigned char block, unsigned char reg)
174{
175 unsigned long data = 0;
176 unsigned long reg_addr = (block<<8) + reg * 4;
177
178 amlatvdemod_reg_read(reg_addr, (unsigned int *)&data);
179 return data;
180}
181
182unsigned long atv_dmd_rd_byte(unsigned long block_addr, unsigned long reg_addr)
183{
184 unsigned long data;
185
186 data = atv_dmd_rd_long(block_addr, reg_addr);
187 /*R_APB_REG((((block_addr & 0xff) <<6) + ((reg_addr & 0xff) >>2)) << 2);
188 *((volatile unsigned long *) (ATV_DMD_APB_BASE_ADDR+
189 ((((block_addr & 0xff) <<6) + ((reg_addr & 0xff) >>2)) << 2)));
190 */
191 if ((reg_addr & 0x3) == 0)
192 data = data >> 24;
193 else if ((reg_addr & 0x3) == 1)
194 data = (data >> 16 & 0xff);
195 else if ((reg_addr & 0x3) == 2)
196 data = (data >> 8 & 0xff);
197 else if ((reg_addr & 0x3) == 3)
198 data = (data >> 0 & 0xff);
199 return data;
200}
201
202unsigned long atv_dmd_rd_word(unsigned long block_addr, unsigned long reg_addr)
203{
204 unsigned long data;
205
206 data = atv_dmd_rd_long(block_addr, reg_addr);
207 /*R_APB_REG((((block_addr & 0xff) <<6) + ((reg_addr & 0xff) >>2)) << 2);
208 *((volatile unsigned long *) (ATV_DMD_APB_BASE_ADDR+
209 ((((block_addr & 0xff) <<6) + ((reg_addr & 0xff) >>2)) << 2)));
210 */
211 if ((reg_addr & 0x3) == 0)
212 data = data >> 16;
213 else if ((reg_addr & 0x3) == 1)
214 data = (data >> 8 & 0xffff);
215 else if ((reg_addr & 0x3) == 2)
216 data = (data >> 0 & 0xffff);
217 else if ((reg_addr & 0x3) == 3)
218 data = (((data & 0xff) << 8) | ((data >> 24) & 0xff));
219 return data;
220}
221
222unsigned long atv_dmd_rd_long(unsigned long block_addr, unsigned long reg_addr)
223{
224 unsigned long data;
225 /*data = *((volatile unsigned long *) (ATV_DMD_APB_BASE_ADDR+
226 *((((block_addr & 0xff) <<6) + ((reg_addr & 0xff) >>2)) << 2)));
227 */
228 data =
229 R_ATVDEMOD_REG((((block_addr & 0xff) << 6) +
230 ((reg_addr & 0xff) >> 2)) << 2);
231
232 return data;
233}
234EXPORT_SYMBOL(atv_dmd_rd_long);
235
236void atv_dmd_wr_long(unsigned long block_addr, unsigned long reg_addr,
237 unsigned long data)
238{
239 W_ATVDEMOD_REG((((block_addr & 0xff) << 6) +
240 ((reg_addr & 0xff) >> 2)) << 2, data);
241 if (reg_dbg_en)
242 pr_dbg("block_addr:0x%x,reg_addr:0x%x;data:0x%x\n",
243 (unsigned int)block_addr, (unsigned int)reg_addr,
244 (unsigned int)data);
245 /**((volatile unsigned long *)
246 * (ATV_DMD_APB_BASE_ADDR+((((block_addr & 0xff) << 6) +
247 * ((reg_addr & 0xff) >> 2)) << 2))) = data;
248 */
249
250}
251EXPORT_SYMBOL(atv_dmd_wr_long);
252
253void atv_dmd_wr_word(unsigned long block_addr, unsigned long reg_addr,
254 unsigned long data)
255{
256 unsigned long data_tmp;
257
258 data_tmp = atv_dmd_rd_long(block_addr, reg_addr);
259 data = data & 0xffff;
260 if ((reg_addr & 0x3) == 0)
261 data = (data << 16 | (data_tmp & 0xffff));
262 else if ((reg_addr & 0x3) == 1)
263 data =
264 ((data_tmp & 0xff000000) | (data << 8) | (data_tmp & 0xff));
265 else if ((reg_addr & 0x3) == 2)
266 data = (data | (data_tmp & 0xffff0000));
267 else if ((reg_addr & 0x3) == 3)
268 data =
269 (((data & 0xff) << 24) | ((data_tmp & 0xffff0000) >> 8) |
270 ((data & 0xff00) >> 8));
271
272 /**((volatile unsigned long *) (ATV_DMD_APB_BASE_ADDR+
273 *((((block_addr & 0xff) <<6) + ((reg_addr & 0xff) >>2)) << 2))) = data;
274 */
275 atv_dmd_wr_long(block_addr, reg_addr, data);
276 /*W_ATVDEMOD_REG(((((block_addr & 0xff) <<6) +
277 *((reg_addr & 0xff) >>2)) << 2), data);
278 */
279
280}
281
282void atv_dmd_wr_byte(unsigned long block_addr, unsigned long reg_addr,
283 unsigned long data)
284{
285 unsigned long data_tmp;
286
287 data_tmp = atv_dmd_rd_long(block_addr, reg_addr);
288
289 /*pr_info("atv demod wr byte, read block addr %lx\n",block_addr);*/
290 /*pr_info("atv demod wr byte, read reg addr %lx\n", reg_addr);*/
291 /*pr_info("atv demod wr byte, wr data %lx\n",data);*/
292 /*pr_info("atv demod wr byte, read data out %lx\n",data_tmp);*/
293
294 data = data & 0xff;
295 /*pr_info("atv demod wr byte, data & 0xff %lx\n",data);*/
296 if ((reg_addr & 0x3) == 0) {
297 data = (data << 24 | (data_tmp & 0xffffff));
298 /*pr_info("atv demod wr byte, reg_addr & 0x3 == 0,
299 *wr data %lx\n",data);
300 */
301 } else if ((reg_addr & 0x3) == 1)
302 data =
303 ((data_tmp & 0xff000000) | (data << 16) |
304 (data_tmp & 0xffff));
305 else if ((reg_addr & 0x3) == 2)
306 data =
307 ((data_tmp & 0xffff0000) | (data << 8) | (data_tmp & 0xff));
308 else if ((reg_addr & 0x3) == 3)
309 data = ((data_tmp & 0xffffff00) | (data & 0xff));
310
311 /*pr_info("atv demod wr byte, wr data %lx\n",data);*/
312
313 /**((volatile unsigned long *) (ATV_DMD_APB_BASE_ADDR+
314 *((((block_addr & 0xff) <<6) + ((reg_addr & 0xff) >>2)) << 2))) = data;
315 */
316 atv_dmd_wr_long(block_addr, reg_addr, data);
317 /*W_ATVDEMOD_REG(((((block_addr & 0xff) <<6) +
318 *((reg_addr & 0xff) >>2)) << 2), data);
319 */
320}
321
322void set_audio_gain_val(int val)
323{
324 audio_gain_val = val;
325}
326
327void set_video_gain_val(int val)
328{
329 atv_video_gain = val;
330}
331
332void atv_dmd_soft_reset(void)
333{
334 atv_dmd_wr_long(0x1d, 0x0, 0x1035);/* disable dac */
335 atv_dmd_wr_byte(APB_BLOCK_ADDR_SYSTEM_MGT, 0x0, 0x0);
336 atv_dmd_wr_byte(APB_BLOCK_ADDR_SYSTEM_MGT, 0x0, 0x1);
337 atv_dmd_wr_long(0x1d, 0x0, 0x1037);/* enable dac */
338}
339
340void atv_dmd_input_clk_32m(void)
341{
342 atv_dmd_wr_byte(APB_BLOCK_ADDR_ADC_MGR, 0x2, 0x1);
343}
344
345void read_version_register(void)
346{
347 unsigned long data, Byte1, Byte2, Word;
348
349 pr_info("ATV-DMD read version register\n");
350 Byte1 = atv_dmd_rd_byte(APB_BLOCK_ADDR_VERS_REGISTER, 0x0);
351 Byte2 = atv_dmd_rd_byte(APB_BLOCK_ADDR_VERS_REGISTER, 0x1);
352 Word = atv_dmd_rd_word(APB_BLOCK_ADDR_VERS_REGISTER, 0x2);
353 data = atv_dmd_rd_long(APB_BLOCK_ADDR_VERS_REGISTER, 0x0);
354
355 pr_info("atv demod read version register data out %lx\n", data);
356
357 if ((data != 0x516EAB13)
358 || (((Byte1 << 24) | (Byte2 << 16) | Word) != 0x516EAB13))
359 pr_info("atv demod read version reg failed\n");
360}
361
362void check_communication_interface(void)
363{
364 unsigned long data_tmp;
365
366 pr_info("ATV-DMD check communication intf\n");
367 atv_dmd_wr_long(APB_BLOCK_ADDR_VERS_REGISTER, 0x0, 0xA1B2C3D4);
368 atv_dmd_wr_byte(APB_BLOCK_ADDR_VERS_REGISTER, 0x1, 0x34);
369 atv_dmd_wr_word(APB_BLOCK_ADDR_VERS_REGISTER, 0x2, 0xBCDE);
370 data_tmp = atv_dmd_rd_long(APB_BLOCK_ADDR_VERS_REGISTER, 0x0);
371 pr_info("atv demod check communication intf data out %lx\n", data_tmp);
372
373 if (data_tmp != 0xa134bcde)
374 pr_info("atv demod check communication intf failed\n");
375 atv_dmd_wr_long(APB_BLOCK_ADDR_VERS_REGISTER, 0x0, 0x516EAB13);
376}
377
378void power_on_receiver(void)
379{
380 atv_dmd_wr_byte(APB_BLOCK_ADDR_ADC_MGR, 0x2, 0x11);
381}
382
383void atv_dmd_misc(void)
384{
385 atv_dmd_wr_byte(APB_BLOCK_ADDR_AGC_PWM, 0x08, 0x38); /*zhuangwei*/
386 /*cpu.write_byte(8'h1A,8'h0E,8'h06);//zhuangwei*/
387 /*cpu.write_byte(8'h19,8'h01,8'h7f);//zhuangwei*/
388 atv_dmd_wr_byte(0x0f, 0x45, 0x90); /*zhuangwei*/
389
390 atv_dmd_wr_long(0x0f, 0x44, 0x5c8808c1);/*zhuangwei*/
391 if (amlatvdemod_devp->parm.tuner_id == AM_TUNER_R840) {
392 atv_dmd_wr_long(0x0f, 0x3c, reg_23cf);/*zhuangwei*/
393 /*guanzhong@20150804a*/
394 atv_dmd_wr_byte(APB_BLOCK_ADDR_SIF_STG_2, 0x00, 0x1);
395 atv_dmd_wr_long(APB_BLOCK_ADDR_AGC_PWM, 0x08, 0x60180200);
396 /*dezhi@20150610a 0x1a maybe better?!*/
397 /* atv_dmd_wr_byte(APB_BLOCK_ADDR_AGC_PWM, 0x09, 0x19); */
398 } else {
399 atv_dmd_wr_long(0x0f, 0x3c, 0x88188832);/*zhuangwei*/
400 atv_dmd_wr_long(APB_BLOCK_ADDR_AGC_PWM, 0x08, 0x46170200);
401 }
402
403 if (amlatvdemod_devp->parm.tuner_id == AM_TUNER_MXL661) {
404 atv_dmd_wr_long(0x0c, 0x04, 0xbffa0000) ;/*test in sky*/
405 atv_dmd_wr_long(0x0c, 0x00, 0x5a4000);/*test in sky*/
406 /*guanzhong@20151013 fix nonstd def is:0x0c010301;0x0c020601*/
407 atv_dmd_wr_long(APB_BLOCK_ADDR_CARR_RCVY, 0x24, 0x0c030901);
408 } else {
409 /*zhuangwei 0xdafa0000*/
410 atv_dmd_wr_long(0x0c, 0x04, 0xc8fa0000);
411 atv_dmd_wr_long(0x0c, 0x00, 0x554000);/*zhuangwei*/
412 }
413 atv_dmd_wr_long(0x19, 0x04, 0xdafa0000);/*zhuangwei*/
414 atv_dmd_wr_long(0x19, 0x00, 0x4a4000);/*zhuangwei*/
415 /*atv_dmd_wr_byte(0x0c,0x01,0x28);//pwd-out gain*/
416 /*atv_dmd_wr_byte(0x0c,0x04,0xc0);//pwd-out offset*/
417
418 aml_audio_valume_gain_set(audio_gain_val);
419 /* 20160121 fix audio demodulation over */
420 atv_dmd_wr_long(0x09, 0x00, 0x1030501);
421 atv_dmd_wr_long(0x09, 0x04, 0x1900000);
422 if (aud_dmd_jilinTV)
423 atv_dmd_wr_long(0x09, 0x00, 0x2030503);
424 if (non_std_en == 1) {
425 atv_dmd_wr_long(0x09, 0x00, 0x2030503);
426 atv_dmd_wr_long(0x0f, 0x44, 0x7c8808c1);
427 atv_dmd_wr_long(0x06, 0x24, 0x0c010801);
428 } else {
429 atv_dmd_wr_long(0x09, 0x00, 0x1030501);
430 if (atv_video_gain)
431 atv_dmd_wr_long(0x0f, 0x44, atv_video_gain);
432 else
433 atv_dmd_wr_long(0x0f, 0x44, 0xfc0808c1);
434 atv_dmd_wr_long(0x06, 0x24, 0xc030901);
435 }
436
437}
438
439/*Broadcast_Standard*/
440/* 0: NTSC*/
441/* 1: NTSC-J*/
442/* 2: PAL-M,*/
443/* 3: PAL-BG*/
444/* 4: DTV*/
445/* 5: SECAM- DK2*/
446/* 6: SECAM -DK3*/
447/* 7: PAL-BG, NICAM*/
448/* 8: PAL-DK-CHINA*/
449/* 9: SECAM-L / SECAM-DK3*/
450/* 10: PAL-I*/
451/* 11: PAL-DK1*/
452/*GDE_Curve*/
453/* 0: CURVE-M*/
454/* 1: CURVE-A*/
455/* 2: CURVE-B*/
456/* 3: CURVE-CHINA*/
457/* 4: BYPASS*/
458/*sound format 0: MONO;1:NICAM*/
459void configure_receiver(int Broadcast_Standard, unsigned int Tuner_IF_Frequency,
460 int Tuner_Input_IF_inverted, int GDE_Curve,
461 int sound_format)
462{
463 int tmp_int;
464 int mixer1 = 0;
465 int mixer3 = 0;
466 int mixer3_bypass = 0;
467 int cv = 0;
468 /*int if_freq = 0;*/
469
470 int i = 0;
471 int super_coef0 = 0;
472 int super_coef1 = 0;
473 int super_coef2 = 0;
474 int gp_coeff_1[37];
475 int gp_coeff_2[37];
476 int gp_cv_g1 = 0;
477 int gp_cv_g2 = 0;
478 int crvy_reg_1 = 0;
479 int crvy_reg_2 = 0;
480 int sif_co_mx = 0;
481 int sif_fi_mx = 0;
482 int sif_ic_bw = 0;
483 int sif_bb_bw = 0;
484 int sif_deemp = 0;
485 int sif_cfg_demod = 0;
486 int sif_fm_gain = 0;
487 int gd_coeff[6];
488 int gd_bypass;
489
490 pr_info("ATV-DMD configure receiver register\n");
491
492 if ((Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC) ||
493 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_J) ||
494 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M) ||
495 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_DK) ||
496 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_BG) ||
497 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_I)) {
498 gp_coeff_1[0] = 0x57777;
499 gp_coeff_1[1] = 0xdd777;
500 gp_coeff_1[2] = 0x7d777;
501 gp_coeff_1[3] = 0x75777;
502 gp_coeff_1[4] = 0x75777;
503 gp_coeff_1[5] = 0x7c777;
504 gp_coeff_1[6] = 0x5c777;
505 gp_coeff_1[7] = 0x44777;
506 gp_coeff_1[8] = 0x54777;
507 gp_coeff_1[9] = 0x47d77;
508 gp_coeff_1[10] = 0x55d77;
509 gp_coeff_1[11] = 0x55577;
510 gp_coeff_1[12] = 0x77577;
511 gp_coeff_1[13] = 0xc4c77;
512 gp_coeff_1[14] = 0xd7d77;
513 gp_coeff_1[15] = 0x75477;
514 gp_coeff_1[16] = 0xcc477;
515 gp_coeff_1[17] = 0x575d7;
516 gp_coeff_1[18] = 0xc4c77;
517 gp_coeff_1[19] = 0xdd757;
518 gp_coeff_1[20] = 0xdd477;
519 gp_coeff_1[21] = 0x77dd7;
520 gp_coeff_1[22] = 0x5dc77;
521 gp_coeff_1[23] = 0x47c47;
522 gp_coeff_1[24] = 0x57477;
523 gp_coeff_1[25] = 0x5c7c7;
524 gp_coeff_1[26] = 0xccc77;
525 gp_coeff_1[27] = 0x5ddd5;
526 gp_coeff_1[28] = 0x54477;
527 gp_coeff_1[29] = 0x7757d;
528 gp_coeff_1[30] = 0x755d7;
529 gp_coeff_1[31] = 0x47cc4;
530 gp_coeff_1[32] = 0x57d57;
531 gp_coeff_1[33] = 0x554cc;
532 gp_coeff_1[34] = 0x755d7;
533 gp_coeff_1[35] = 0x7d3b2;
534 gp_coeff_1[36] = 0x73a91;
535 gp_coeff_2[0] = 0xd5777;
536 gp_coeff_2[1] = 0x77777;
537 gp_coeff_2[2] = 0x7c777;
538 gp_coeff_2[3] = 0xcc777;
539 gp_coeff_2[4] = 0xc7777;
540 gp_coeff_2[5] = 0xdd777;
541 gp_coeff_2[6] = 0x44c77;
542 gp_coeff_2[7] = 0x54c77;
543 gp_coeff_2[8] = 0xdd777;
544 gp_coeff_2[9] = 0x7c777;
545 gp_coeff_2[10] = 0xc7c77;
546 gp_coeff_2[11] = 0x75c77;
547 gp_coeff_2[12] = 0xdd577;
548 gp_coeff_2[13] = 0x44777;
549 gp_coeff_2[14] = 0xd5c77;
550 gp_coeff_2[15] = 0xdc777;
551 gp_coeff_2[16] = 0xd7757;
552 gp_coeff_2[17] = 0x4c757;
553 gp_coeff_2[18] = 0x7d777;
554 gp_coeff_2[19] = 0x75477;
555 gp_coeff_2[20] = 0x57547;
556 gp_coeff_2[21] = 0xdc747;
557 gp_coeff_2[22] = 0x74777;
558 gp_coeff_2[23] = 0x75757;
559 gp_coeff_2[24] = 0x4cc75;
560 gp_coeff_2[25] = 0xd4747;
561 gp_coeff_2[26] = 0x7d7d7;
562 gp_coeff_2[27] = 0xd5577;
563 gp_coeff_2[28] = 0xc4c75;
564 gp_coeff_2[29] = 0xcc477;
565 gp_coeff_2[30] = 0xdd54c;
566 gp_coeff_2[31] = 0x7547d;
567 gp_coeff_2[32] = 0x55547;
568 gp_coeff_2[33] = 0x5575c;
569 gp_coeff_2[34] = 0xd543a;
570 gp_coeff_2[35] = 0x57b3a;
571 gp_coeff_2[36] = 0x77777;
572 gp_cv_g1 = 0x2b062d;
573 gp_cv_g2 = 0x40fa2d;
574 } else if ((Broadcast_Standard ==
575 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG) ||
576 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_DK2) ||
577 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_DK3) ||
578 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG_NICAM)) {
579 gp_coeff_1[0] = 0x75777;
580 gp_coeff_1[1] = 0x57777;
581 gp_coeff_1[2] = 0x7d777;
582 gp_coeff_1[3] = 0x75777;
583 gp_coeff_1[4] = 0x75777;
584 gp_coeff_1[5] = 0x7c777;
585 gp_coeff_1[6] = 0x47777;
586 gp_coeff_1[7] = 0x74777;
587 gp_coeff_1[8] = 0xd5d77;
588 gp_coeff_1[9] = 0xc7777;
589 gp_coeff_1[10] = 0x77577;
590 gp_coeff_1[11] = 0xd7d77;
591 gp_coeff_1[12] = 0x75d77;
592 gp_coeff_1[13] = 0xdd477;
593 gp_coeff_1[14] = 0x77d77;
594 gp_coeff_1[15] = 0x75c77;
595 gp_coeff_1[16] = 0xc4477;
596 gp_coeff_1[17] = 0x4c777;
597 gp_coeff_1[18] = 0x5d5d7;
598 gp_coeff_1[19] = 0xd7d57;
599 gp_coeff_1[20] = 0x47577;
600 gp_coeff_1[21] = 0xd7dd7;
601 gp_coeff_1[22] = 0xd7d57;
602 gp_coeff_1[23] = 0xdd757;
603 gp_coeff_1[24] = 0xc75c7;
604 gp_coeff_1[25] = 0x7d477;
605 gp_coeff_1[26] = 0x5d747;
606 gp_coeff_1[27] = 0x7ddc7;
607 gp_coeff_1[28] = 0xc4c77;
608 gp_coeff_1[29] = 0xd4c75;
609 gp_coeff_1[30] = 0xc755d;
610 gp_coeff_1[31] = 0x47cc7;
611 gp_coeff_1[32] = 0xdd7d4;
612 gp_coeff_1[33] = 0x4c75d;
613 gp_coeff_1[34] = 0xc7dcc;
614 gp_coeff_1[35] = 0xd52a2;
615 gp_coeff_1[36] = 0x555a1;
616 gp_coeff_2[0] = 0x5d777;
617 gp_coeff_2[1] = 0x47777;
618 gp_coeff_2[2] = 0x7d777;
619 gp_coeff_2[3] = 0xcc777;
620 gp_coeff_2[4] = 0xd7777;
621 gp_coeff_2[5] = 0x7c777;
622 gp_coeff_2[6] = 0x7dd77;
623 gp_coeff_2[7] = 0xdd777;
624 gp_coeff_2[8] = 0x7c777;
625 gp_coeff_2[9] = 0x57c77;
626 gp_coeff_2[10] = 0x7c777;
627 gp_coeff_2[11] = 0xd5777;
628 gp_coeff_2[12] = 0xd7c77;
629 gp_coeff_2[13] = 0xdd777;
630 gp_coeff_2[14] = 0x77477;
631 gp_coeff_2[15] = 0xc7d77;
632 gp_coeff_2[16] = 0xc4777;
633 gp_coeff_2[17] = 0x57557;
634 gp_coeff_2[18] = 0xd5577;
635 gp_coeff_2[19] = 0xd5577;
636 gp_coeff_2[20] = 0x7d547;
637 gp_coeff_2[21] = 0x74757;
638 gp_coeff_2[22] = 0xc7577;
639 gp_coeff_2[23] = 0xcc7d5;
640 gp_coeff_2[24] = 0x4c747;
641 gp_coeff_2[25] = 0xddc77;
642 gp_coeff_2[26] = 0x54447;
643 gp_coeff_2[27] = 0xcc447;
644 gp_coeff_2[28] = 0x5755d;
645 gp_coeff_2[29] = 0x5dd57;
646 gp_coeff_2[30] = 0x54747;
647 gp_coeff_2[31] = 0x5747c;
648 gp_coeff_2[32] = 0xc77dd;
649 gp_coeff_2[33] = 0x47557;
650 gp_coeff_2[34] = 0x7a22a;
651 gp_coeff_2[35] = 0xc73aa;
652 gp_coeff_2[36] = 0x77777;
653 gp_cv_g1 = 0x2b2834;
654 gp_cv_g2 = 0x3f6c2e;
655 } else if ((Broadcast_Standard ==
656 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK) ||
657 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_DK3)) {
658 gp_coeff_1[0] = 0x47777;
659 gp_coeff_1[1] = 0x77777;
660 gp_coeff_1[2] = 0x5d777;
661 gp_coeff_1[3] = 0x47777;
662 gp_coeff_1[4] = 0x75777;
663 gp_coeff_1[5] = 0x5c777;
664 gp_coeff_1[6] = 0x57777;
665 gp_coeff_1[7] = 0x44777;
666 gp_coeff_1[8] = 0x55d77;
667 gp_coeff_1[9] = 0x7d777;
668 gp_coeff_1[10] = 0x55577;
669 gp_coeff_1[11] = 0xd5d77;
670 gp_coeff_1[12] = 0xd7d77;
671 gp_coeff_1[13] = 0x47477;
672 gp_coeff_1[14] = 0xdc777;
673 gp_coeff_1[15] = 0x4cc77;
674 gp_coeff_1[16] = 0x77d57;
675 gp_coeff_1[17] = 0xc4777;
676 gp_coeff_1[18] = 0xdd7d7;
677 gp_coeff_1[19] = 0x7c757;
678 gp_coeff_1[20] = 0xd4477;
679 gp_coeff_1[21] = 0x755c7;
680 gp_coeff_1[22] = 0x47d57;
681 gp_coeff_1[23] = 0xd7c47;
682 gp_coeff_1[24] = 0xd4cc7;
683 gp_coeff_1[25] = 0x47577;
684 gp_coeff_1[26] = 0x5c7d5;
685 gp_coeff_1[27] = 0x4c75d;
686 gp_coeff_1[28] = 0xd57d7;
687 gp_coeff_1[29] = 0x44755;
688 gp_coeff_1[30] = 0x7557d;
689 gp_coeff_1[31] = 0xc477d;
690 gp_coeff_1[32] = 0xd5d44;
691 gp_coeff_1[33] = 0xdd77d;
692 gp_coeff_1[34] = 0x5d75b;
693 gp_coeff_1[35] = 0x74332;
694 gp_coeff_1[36] = 0xd4311;
695 gp_coeff_2[0] = 0xd7777;
696 gp_coeff_2[1] = 0x77777;
697 gp_coeff_2[2] = 0xdd777;
698 gp_coeff_2[3] = 0xdc777;
699 gp_coeff_2[4] = 0xc7777;
700 gp_coeff_2[5] = 0xdd777;
701 gp_coeff_2[6] = 0x77d77;
702 gp_coeff_2[7] = 0x77777;
703 gp_coeff_2[8] = 0x55777;
704 gp_coeff_2[9] = 0xc7d77;
705 gp_coeff_2[10] = 0xd4777;
706 gp_coeff_2[11] = 0xc7477;
707 gp_coeff_2[12] = 0x7c777;
708 gp_coeff_2[13] = 0xd5577;
709 gp_coeff_2[14] = 0xdd557;
710 gp_coeff_2[15] = 0x47577;
711 gp_coeff_2[16] = 0xd7477;
712 gp_coeff_2[17] = 0x55747;
713 gp_coeff_2[18] = 0xdd757;
714 gp_coeff_2[19] = 0xd7477;
715 gp_coeff_2[20] = 0x7d7d5;
716 gp_coeff_2[21] = 0xddd47;
717 gp_coeff_2[22] = 0xdd777;
718 gp_coeff_2[23] = 0x575d5;
719 gp_coeff_2[24] = 0x47547;
720 gp_coeff_2[25] = 0x555c7;
721 gp_coeff_2[26] = 0x7d447;
722 gp_coeff_2[27] = 0xd7447;
723 gp_coeff_2[28] = 0x757dd;
724 gp_coeff_2[29] = 0x7dc77;
725 gp_coeff_2[30] = 0x54747;
726 gp_coeff_2[31] = 0xc743b;
727 gp_coeff_2[32] = 0xd7c7c;
728 gp_coeff_2[33] = 0xd7557;
729 gp_coeff_2[34] = 0x55c7a;
730 gp_coeff_2[35] = 0x4cc29;
731 gp_coeff_2[36] = 0x77777;
732 gp_cv_g1 = 0x20682b;
733 gp_cv_g2 = 0x29322f;
734 } else if (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I) {
735 gp_coeff_1[0] = 0x77777;
736 gp_coeff_1[1] = 0x75777;
737 gp_coeff_1[2] = 0x7d777;
738 gp_coeff_1[3] = 0xd7777;
739 gp_coeff_1[4] = 0x74777;
740 gp_coeff_1[5] = 0xcc777;
741 gp_coeff_1[6] = 0x57777;
742 gp_coeff_1[7] = 0x5d577;
743 gp_coeff_1[8] = 0x5dd77;
744 gp_coeff_1[9] = 0x74777;
745 gp_coeff_1[10] = 0x77577;
746 gp_coeff_1[11] = 0x77c77;
747 gp_coeff_1[12] = 0xdc477;
748 gp_coeff_1[13] = 0x5d577;
749 gp_coeff_1[14] = 0x575d7;
750 gp_coeff_1[15] = 0xc7d57;
751 gp_coeff_1[16] = 0x77777;
752 gp_coeff_1[17] = 0x557d7;
753 gp_coeff_1[18] = 0xc7557;
754 gp_coeff_1[19] = 0x75c77;
755 gp_coeff_1[20] = 0x477d7;
756 gp_coeff_1[21] = 0xcc747;
757 gp_coeff_1[22] = 0x47dd7;
758 gp_coeff_1[23] = 0x775d7;
759 gp_coeff_1[24] = 0x47447;
760 gp_coeff_1[25] = 0x75cc7;
761 gp_coeff_1[26] = 0xc7777;
762 gp_coeff_1[27] = 0xc75d5;
763 gp_coeff_1[28] = 0x44c7d;
764 gp_coeff_1[29] = 0x74c47;
765 gp_coeff_1[30] = 0x47d75;
766 gp_coeff_1[31] = 0x7d57c;
767 gp_coeff_1[32] = 0xd5dc4;
768 gp_coeff_1[33] = 0xdd575;
769 gp_coeff_1[34] = 0xdb3bb;
770 gp_coeff_1[35] = 0x5c752;
771 gp_coeff_1[36] = 0x90880;
772 gp_coeff_2[0] = 0x5d777;
773 gp_coeff_2[1] = 0xd7777;
774 gp_coeff_2[2] = 0x77777;
775 gp_coeff_2[3] = 0xd5d77;
776 gp_coeff_2[4] = 0xc7777;
777 gp_coeff_2[5] = 0xd7777;
778 gp_coeff_2[6] = 0xddd77;
779 gp_coeff_2[7] = 0x55777;
780 gp_coeff_2[8] = 0x57777;
781 gp_coeff_2[9] = 0x54c77;
782 gp_coeff_2[10] = 0x4c477;
783 gp_coeff_2[11] = 0x74777;
784 gp_coeff_2[12] = 0xd5d77;
785 gp_coeff_2[13] = 0x47757;
786 gp_coeff_2[14] = 0x75577;
787 gp_coeff_2[15] = 0xc7577;
788 gp_coeff_2[16] = 0x4c747;
789 gp_coeff_2[17] = 0x7d477;
790 gp_coeff_2[18] = 0x7c757;
791 gp_coeff_2[19] = 0x55dd5;
792 gp_coeff_2[20] = 0x57577;
793 gp_coeff_2[21] = 0x44c47;
794 gp_coeff_2[22] = 0x5cc75;
795 gp_coeff_2[23] = 0x4cc77;
796 gp_coeff_2[24] = 0x47547;
797 gp_coeff_2[25] = 0x777d5;
798 gp_coeff_2[26] = 0xcccc7;
799 gp_coeff_2[27] = 0x57447;
800 gp_coeff_2[28] = 0xdc757;
801 gp_coeff_2[29] = 0x5755c;
802 gp_coeff_2[30] = 0x44747;
803 gp_coeff_2[31] = 0x5d5dd;
804 gp_coeff_2[32] = 0x5747b;
805 gp_coeff_2[33] = 0x77557;
806 gp_coeff_2[34] = 0xdcb2a;
807 gp_coeff_2[35] = 0xd5779;
808 gp_coeff_2[36] = 0x77777;
809 gp_cv_g1 = 0x72242f;
810 gp_cv_g2 = 0x28822a;
811 }
812
813 if ((Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC) ||
814 (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_J)) {
815 sif_co_mx = 0xb8;
816 sif_fi_mx = 0x0;
817 sif_ic_bw = 0x1;
818 sif_bb_bw = 0x1;
819 sif_deemp = 0x1;
820 sif_cfg_demod = (sound_format == 0) ? 0x0:0x2;
821 sif_fm_gain = 0x4;
822 } else if ((Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG)
823 || (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_BG)) {
824 sif_co_mx = 0xa6;
825 sif_fi_mx = 0x10;
826 sif_ic_bw = 0x2;
827 sif_bb_bw = 0x0;
828 sif_deemp = 0x2;
829 sif_cfg_demod = (sound_format == 0) ? 0x0:0x2;
830 sif_fm_gain = 0x3;
831 } else if (Broadcast_Standard ==
832 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK1) {
833 sif_co_mx = 154;
834 sif_fi_mx = 240;
835 sif_ic_bw = 2;
836 sif_bb_bw = 0;
837 sif_deemp = 2;
838 sif_cfg_demod = (sound_format == 0) ? 0:2;
839 sif_fm_gain = 3;
840 } else if (Broadcast_Standard ==
841 AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_DK2) {
842 sif_co_mx = 150;
843 sif_fi_mx = 16;
844 sif_ic_bw = 2;
845 sif_bb_bw = 0;
846 sif_deemp = 2;
847 sif_cfg_demod = (sound_format == 0) ? 0:2;
848 sif_fm_gain = 3;
849 } else if (Broadcast_Standard ==
850 AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_DK3) {
851 sif_co_mx = 158;
852 sif_fi_mx = 208;
853 sif_ic_bw = 3;
854 sif_bb_bw = 0;
855 sif_deemp = 2;
856 sif_cfg_demod = (sound_format == 0) ? 0:2;
857 sif_fm_gain = 3;
858 } else if ((Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I)
859 || (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_I)) {
860 sif_co_mx = 153;
861 sif_fi_mx = 56;
862 sif_ic_bw = 3;
863 sif_bb_bw = 0;
864 sif_deemp = 2;
865 sif_cfg_demod = (sound_format == 0) ? 0:2;
866 sif_fm_gain = 3;
867 } else if (Broadcast_Standard ==
868 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG_NICAM) {
869 sif_co_mx = 163;
870 sif_fi_mx = 40;
871 sif_ic_bw = 0;
872 sif_bb_bw = 0;
873 sif_deemp = 2;
874 sif_cfg_demod = (sound_format == 0) ? 0:2;
875 sif_fm_gain = 3;
876 } else if (Broadcast_Standard ==
877 AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_L) {
878 sif_co_mx = 159;
879 sif_fi_mx = 200;
880 sif_ic_bw = 3;
881 sif_bb_bw = 0;
882 sif_deemp = 0;
883 sif_cfg_demod = (sound_format == 0) ? 1:2;
884 sif_fm_gain = 5;
885 } else if ((Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK)
886 || (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_DK)) {
887 sif_co_mx = 159;
888 sif_fi_mx = 200;
889 sif_ic_bw = 3;
890 sif_bb_bw = 0;
891 sif_deemp = 2;
892 sif_cfg_demod = (sound_format == 0) ? 0:2;
893 sif_fm_gain = 3;
894 } else if (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M) {
895 sif_co_mx = 182;
896 sif_fi_mx = 16;
897 sif_ic_bw = 1;
898 sif_bb_bw = 0;
899 sif_deemp = 1;
900 sif_cfg_demod = (sound_format == 0) ? 0:2;
901 sif_fm_gain = 3;
902 }
903 sif_fm_gain -= 2; /*avoid sound overflow@guanzhong*/
904 /*FE PATH*/
905 pr_info("ATV-DMD configure mixer\n");
906 if (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_DTV) {
907 tmp_int = (Tuner_IF_Frequency/125000);
908 if (Tuner_Input_IF_inverted == 0x0)
909 mixer1 = -tmp_int;
910 else
911 mixer1 = tmp_int;
912
913 mixer3 = 0;
914 mixer3_bypass = 0;
915 } else {
916 tmp_int = (Tuner_IF_Frequency/125000);
917 pr_info("ATV-DMD configure mixer 1\n");
918
919 if (Tuner_Input_IF_inverted == 0x0)
920 mixer1 = 0xe8 - tmp_int;
921 else
922 mixer1 = tmp_int - 0x18;
923
924 pr_info("ATV-DMD configure mixer 2\n");
925 mixer3 = 0x30;
926 mixer3_bypass = 0x1;
927 }
928
929 pr_info("ATV-DMD configure mixer 3\n");
930 atv_dmd_wr_byte(APB_BLOCK_ADDR_MIXER_1, 0x0, mixer1);
931 atv_dmd_wr_word(APB_BLOCK_ADDR_MIXER_3, 0x0,
932 (((mixer3 & 0xff) << 8) | (mixer3_bypass & 0xff)));
933
934 if (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_L)
935 atv_dmd_wr_long(APB_BLOCK_ADDR_ADC_SE, 0x0, 0x03180e0f);
936 else
937 atv_dmd_wr_long(APB_BLOCK_ADDR_ADC_SE, 0x0, 0x03150e0f);
938 if (amlatvdemod_devp->parm.tuner_id == AM_TUNER_R840) {
939 /*config pwm for tuner r840*/
940 atv_dmd_wr_byte(APB_BLOCK_ADDR_ADC_SE, 1, 0xf);
941 }
942
943 /*GP Filter*/
944 pr_info("ATV-DMD configure GP_filter\n");
945 if (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_DTV) {
946 cv = gp_cv_g1;
947 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0x0,
948 (0x08000000 | (cv & 0x7fffff)));
949 atv_dmd_wr_byte(APB_BLOCK_ADDR_GP_VD_FLT, 0x4, 0x04);
950 for (i = 0; i < 9; i = i + 1) {
951 /*super_coef = {gp_coeff_1[i*4],gp_coeff_1[i*4+1],
952 *gp_coeff_1[i*4+2],gp_coeff_1[i*4+3]};
953 */
954 super_coef0 =
955 (((gp_coeff_1[i * 4 + 2] & 0xfff) << 20) |
956 (gp_coeff_1[i * 4 + 3] & 0xfffff));
957 super_coef1 =
958 (((gp_coeff_1[i * 4] & 0xf) << 28) |
959 ((gp_coeff_1[i * 4 + 1] & 0xfffff) << 8) |
960 ((gp_coeff_1[i * 4 + 2] >> 12) & 0xff));
961 super_coef2 = ((gp_coeff_1[i * 4] >> 4) & 0xffff);
962
963 /*atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT,
964 *0x8,super_coef[79:48]);
965 */
966 /*atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT,
967 *0xC,super_coef[47:16]);
968 */
969 /*atv_dmd_wr_word(APB_BLOCK_ADDR_GP_VD_FLT,
970 *0x10,super_coef[15:0]);
971 */
972 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0x8,
973 (((super_coef2 & 0xffff) << 16) |
974 ((super_coef1 & 0xffff0000) >> 16)));
975 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0xC,
976 (((super_coef1 & 0xffff) << 16) |
977 ((super_coef0 & 0xffff0000) >> 16)));
978 atv_dmd_wr_word(APB_BLOCK_ADDR_GP_VD_FLT, 0x10,
979 (super_coef0 & 0xffff));
980 atv_dmd_wr_byte(APB_BLOCK_ADDR_GP_VD_FLT, 0x05, i);
981 }
982 /*atv_dmd_wr_long
983 *(APB_BLOCK_ADDR_GP_VD_FLT,0x8,{gp_coeff_1[36],12'd0});
984 */
985 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0x8,
986 ((gp_coeff_1[36] & 0xfffff) << 12));
987 atv_dmd_wr_byte(APB_BLOCK_ADDR_GP_VD_FLT, 0x05, 0x09);
988
989 } else {
990 cv = gp_cv_g1 - gp_cv_g2;
991 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0x0, cv & 0x7fffff);
992 atv_dmd_wr_byte(APB_BLOCK_ADDR_GP_VD_FLT, 0x4, 0x00);
993 for (i = 0; i < 9; i = i + 1) {
994 /*super_coef = {gp_coeff_1[i*4],gp_coeff_1[i*4+1],
995 *gp_coeff_1[i*4+2],gp_coeff_1[i*4+3]};
996 */
997 super_coef0 =
998 (((gp_coeff_1[i * 4 + 2] & 0xfff) << 20) |
999 (gp_coeff_1[i * 4 + 3] & 0xfffff));
1000 super_coef1 =
1001 (((gp_coeff_1[i * 4] & 0xf) << 28) |
1002 ((gp_coeff_1[i * 4 + 1] & 0xfffff) << 8) |
1003 ((gp_coeff_1[i * 4 + 2] >> 12) & 0xff));
1004 super_coef2 = ((gp_coeff_1[i * 4] >> 4) & 0xffff);
1005
1006 /*atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT,
1007 *0x8,super_coef[79:48]);
1008 */
1009 /*atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT,
1010 *0xC,super_coef[47:16]);
1011 */
1012 /*atv_dmd_wr_word(APB_BLOCK_ADDR_GP_VD_FLT,
1013 *0x10,super_coef[15:0]);
1014 */
1015 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0x8,
1016 (((super_coef2 & 0xffff) << 16) |
1017 ((super_coef1 & 0xffff0000) >> 16)));
1018 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0xC,
1019 (((super_coef1 & 0xffff) << 16) |
1020 ((super_coef0 & 0xffff0000) >> 16)));
1021 atv_dmd_wr_word(APB_BLOCK_ADDR_GP_VD_FLT, 0x10,
1022 (super_coef0 & 0xffff));
1023 atv_dmd_wr_byte(APB_BLOCK_ADDR_GP_VD_FLT, 0x05, i);
1024
1025 /*atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT,
1026 *0x8,{gp_coeff_1[36],12'd0});
1027 */
1028 }
1029 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0x8,
1030 ((gp_coeff_1[36] & 0xfffff) << 12));
1031 atv_dmd_wr_byte(APB_BLOCK_ADDR_GP_VD_FLT, 0x05, 9);
1032 atv_dmd_wr_byte(APB_BLOCK_ADDR_GP_VD_FLT, 0x4, 0x01);
1033
1034 for (i = 0; i < 9; i = i + 1) {
1035 /*super_coef = {gp_coeff_2[i*4],gp_coeff_2[i*4+1],
1036 *gp_coeff_2[i*4+2],gp_coeff_2[i*4+3]};
1037 */
1038 super_coef0 =
1039 (((gp_coeff_2[i * 4 + 2] & 0xfff) << 20) |
1040 (gp_coeff_2[i * 4 + 3] & 0xfffff));
1041 super_coef1 =
1042 (((gp_coeff_2[i * 4] & 0xf) << 28) |
1043 ((gp_coeff_2[i * 4 + 1] & 0xfffff) << 8) |
1044 ((gp_coeff_2[i * 4 + 2] >> 12) & 0xff));
1045 super_coef2 = ((gp_coeff_2[i * 4] >> 4) & 0xffff);
1046
1047 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0x8,
1048 (((super_coef2 & 0xffff) << 16) |
1049 ((super_coef1 & 0xffff0000) >> 16)));
1050 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0xC,
1051 (((super_coef1 & 0xffff) << 16) |
1052 ((super_coef0 & 0xffff0000) >> 16)));
1053 atv_dmd_wr_word(APB_BLOCK_ADDR_GP_VD_FLT, 0x10,
1054 (super_coef0 & 0xffff));
1055 atv_dmd_wr_byte(APB_BLOCK_ADDR_GP_VD_FLT, 0x05, i);
1056 }
1057
1058 atv_dmd_wr_long(APB_BLOCK_ADDR_GP_VD_FLT, 0x8,
1059 ((gp_coeff_2[36] & 0xfffff) << 12));
1060 atv_dmd_wr_byte(APB_BLOCK_ADDR_GP_VD_FLT, 0x05, 0x09);
1061 }
1062
1063 /*CRVY*/
1064 pr_info("ATV-DMD configure CRVY\n");
1065 if (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_DTV) {
1066 crvy_reg_1 = 0xFF;
1067 crvy_reg_2 = 0x00;
1068 } else {
1069 crvy_reg_1 = 0x04;
1070 crvy_reg_2 = 0x01;
1071 }
1072
1073 atv_dmd_wr_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x29, crvy_reg_1);
1074 pr_info("ATV-DMD configure rcvy 2\n");
1075 pr_info("ATV-DMD configure rcvy, crvy_reg_2 = %x\n", crvy_reg_2);
1076 atv_dmd_wr_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x20, crvy_reg_2);
1077
1078 /*SOUND SUPPRESS*/
1079 pr_info("ATV-DMD configure sound suppress\n");
1080
1081 if ((Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_DTV) ||
1082 (sound_format == 0))
1083 atv_dmd_wr_byte(APB_BLOCK_ADDR_SIF_VD_IF, 0x02, 0x01);
1084 else
1085 atv_dmd_wr_byte(APB_BLOCK_ADDR_SIF_VD_IF, 0x02, 0x00);
1086
1087 /*SIF*/
1088 pr_info("ATV-DMD configure sif\n");
1089 if (!(Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_DTV)) {
1090 atv_dmd_wr_byte(APB_BLOCK_ADDR_SIF_IC_STD, 0x03, sif_ic_bw);
1091 atv_dmd_wr_byte(APB_BLOCK_ADDR_SIF_IC_STD, 0x01, sif_fi_mx);
1092 atv_dmd_wr_byte(APB_BLOCK_ADDR_SIF_IC_STD, 0x02, sif_co_mx);
1093
1094 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2, 0x00,
1095 (((sif_bb_bw & 0xff) << 24) |
1096 ((sif_deemp & 0xff) << 16) | 0x0500 |
1097 sif_fm_gain));
1098 atv_dmd_wr_byte(APB_BLOCK_ADDR_SIF_STG_2, 0x06, sif_cfg_demod);
1099 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2, 0x24,
1100 (((sif_bb_bw & 0xff) << 24) |
1101 0xfffff));
1102 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2, 0x1c, 0x1f000);
1103 }
1104
1105 if (Broadcast_Standard != AML_ATV_DEMOD_VIDEO_MODE_PROP_DTV) {
1106 if (sound_format == 0) {
1107 tmp_int = 0;
1108 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_3, 0x00,
1109 (0x01000000 | (tmp_int & 0xffffff)));
1110 } else {
1111 tmp_int = (256 - sif_co_mx) << 13;
1112 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_3, 0x00,
1113 (tmp_int & 0xffffff));
1114 }
1115 }
1116
1117 if (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_DTV) {
1118 atv_dmd_wr_long(APB_BLOCK_ADDR_IC_AGC, 0x00, 0x02040E0A);
1119 atv_dmd_wr_word(APB_BLOCK_ADDR_IC_AGC, 0x04, 0x0F0D);
1120 } else if (sound_format == 0)
1121 atv_dmd_wr_byte(APB_BLOCK_ADDR_IC_AGC, 0x00, 0x04);
1122 else if (Broadcast_Standard ==
1123 AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_L) {
1124 atv_dmd_wr_long(APB_BLOCK_ADDR_IC_AGC, 0x00, 0x0003140A);
1125 atv_dmd_wr_word(APB_BLOCK_ADDR_IC_AGC, 0x04, 0x1244);
1126 } else {
1127 atv_dmd_wr_long(APB_BLOCK_ADDR_IC_AGC, 0x00, 0x00040E0A);
1128 atv_dmd_wr_word(APB_BLOCK_ADDR_IC_AGC, 0x04, 0x0D68);
1129 }
1130
1131 /*VAGC*/
1132 pr_info("ATV-DMD configure vagc\n");
1133 atv_dmd_wr_long(APB_BLOCK_ADDR_VDAGC, 0x48, 0x9B6F2C00);
1134 /*bw select mode*/
1135 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x37, 0x1C);
1136 /*disable prefilter*/
1137
1138 if (Broadcast_Standard == AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_L) {
1139 atv_dmd_wr_word(APB_BLOCK_ADDR_VDAGC, 0x44, 0x4450);
1140 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x46, 0x44);
1141 atv_dmd_wr_long(APB_BLOCK_ADDR_VDAGC, 0x4, 0x3E04FC);
1142 atv_dmd_wr_word(APB_BLOCK_ADDR_VDAGC, 0x3C, 0x4848);
1143 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x3E, 0x48);
1144 } else {
1145 atv_dmd_wr_word(APB_BLOCK_ADDR_VDAGC, 0x44, 0xB800);
1146 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x46, 0x08);
1147 atv_dmd_wr_long(APB_BLOCK_ADDR_VDAGC, 0x4, 0x3C04FC);
1148 atv_dmd_wr_word(APB_BLOCK_ADDR_VDAGC, 0x3C, 0x1818);
1149 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x3E, 0x10);
1150 }
1151
1152 /*tmp_real = $itor(Hz_Freq)/0.23841858; //TODO*/
1153 /*tmp_int = $rtoi(tmp_real); //TODO*/
1154 /*tmp_int = Hz_Freq/0.23841858; //TODO*/
1155 /*tmp_int_2 = ((unsigned long)15625)*10000/23841858;*/
1156 /*tmp_int_2 = ((unsigned long)Hz_Freq)*10000/23841858;*/
1157 atv_dmd_wr_word(APB_BLOCK_ADDR_VDAGC, 0x10,
1158 (freq_hz_cvrt >> 8) & 0xffff);
1159 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x12, (freq_hz_cvrt & 0xff));
1160
1161 /*OUTPUT STAGE*/
1162 pr_info("ATV-DMD configure output stage\n");
1163 if (Broadcast_Standard != AML_ATV_DEMOD_VIDEO_MODE_PROP_DTV) {
1164 atv_dmd_wr_byte(APB_BLOCK_ADDR_DAC_UPS, 0x0, 0x00);
1165 atv_dmd_wr_byte(APB_BLOCK_ADDR_DAC_UPS, 0x1, 0x40);
1166 atv_dmd_wr_byte(APB_BLOCK_ADDR_DAC_UPS, 0x2, 0x40);
1167 atv_dmd_wr_byte(APB_BLOCK_ADDR_DAC_UPS, 0x4, 0xFA);
1168 atv_dmd_wr_byte(APB_BLOCK_ADDR_DAC_UPS, 0x5, 0xFA);
1169 }
1170
1171 /*GDE FILTER*/
1172 pr_info("ATV-DMD configure gde filter\n");
1173 if (GDE_Curve == 0) {
1174 gd_coeff[0] = 0x020; /*12'sd32;*/
1175 gd_coeff[1] = 0xf5f; /*-12'sd161;*/
1176 gd_coeff[2] = 0x1fe; /*12'sd510;*/
1177 gd_coeff[3] = 0xc0b; /*-12'sd1013;*/
1178 gd_coeff[4] = 0x536; /*12'sd1334;*/
1179 gd_coeff[5] = 0xb34; /*-12'sd1228;*/
1180 gd_bypass = 0x1;
1181 } else if (GDE_Curve == 1) {
1182 gd_coeff[0] = 0x8; /*12'sd8;*/
1183 gd_coeff[1] = 0xfd5; /*-12'sd43;*/
1184 gd_coeff[2] = 0x8d; /*12'sd141;*/
1185 gd_coeff[3] = 0xe69; /*-12'sd407;*/
1186 gd_coeff[4] = 0x1f1; /*12'sd497;*/
1187 gd_coeff[5] = 0xe7e; /*-12'sd386;*/
1188 gd_bypass = 0x1;
1189 } else if (GDE_Curve == 2) {
1190 gd_coeff[0] = 0x35; /*12'sd53;*/
1191 gd_coeff[1] = 0xf41; /*-12'sd191;*/
1192 gd_coeff[2] = 0x68; /*12'sd104;*/
1193 gd_coeff[3] = 0xea5; /*-12'sd347;*/
1194 gd_coeff[4] = 0x322; /*12'sd802;*/
1195 gd_coeff[5] = 0x1bb; /*12'sd443;*/
1196 gd_bypass = 0x1;
1197 } else if (GDE_Curve == 3) {
1198 gd_coeff[0] = 0xf; /*12'sd15;*/
1199 gd_coeff[1] = 0xfb5; /*-12'sd75;*/
1200 gd_coeff[2] = 0xcc; /*12'sd204;*/
1201 gd_coeff[3] = 0xe51;
1202 gd_coeff[4] = 0x226; /*12'sd550;*/
1203 gd_coeff[5] = 0xd02;
1204 gd_bypass = 0x1;
1205 } else
1206 gd_bypass = 0x0;
1207
1208 if (gd_bypass == 0x0)
1209 atv_dmd_wr_byte(APB_BLOCK_ADDR_GDE_EQUAL, 0x0D, gd_bypass);
1210 else {
1211 for (i = 0; i < 6; i = i + 1)
1212 atv_dmd_wr_word(APB_BLOCK_ADDR_GDE_EQUAL, i << 1,
1213 gd_coeff[i]);
1214 atv_dmd_wr_byte(APB_BLOCK_ADDR_GDE_EQUAL, 0x0C, 0x01);
1215 atv_dmd_wr_byte(APB_BLOCK_ADDR_GDE_EQUAL, 0x0D, gd_bypass);
1216 }
1217
1218 /*PWM*/
1219 pr_info("ATV-DMD configure pwm\n");
1220 atv_dmd_wr_long(APB_BLOCK_ADDR_AGC_PWM, 0x00, 0x1f40); /*4KHz*/
1221 atv_dmd_wr_long(APB_BLOCK_ADDR_AGC_PWM, 0x04, 0xc8);
1222 /*26 dB dynamic range*/
1223 atv_dmd_wr_byte(APB_BLOCK_ADDR_AGC_PWM, 0x09, 0xa);
1224 if (amlatvdemod_devp->parm.tuner_id == AM_TUNER_R840) {
1225 /*config pwm for tuner r840*/
1226 atv_dmd_wr_long(APB_BLOCK_ADDR_AGC_PWM, 0, 0xc80);
1227 /* guanzhong for Tuner AGC shock */
1228 atv_dmd_wr_long(APB_BLOCK_ADDR_AGC_PWM, 0x08, 0x46180200);
1229 /* atv_dmd_wr_byte(APB_BLOCK_ADDR_ADC_SE,1,0xf);//Kd = 0xf */
1230 }
1231}
1232
1233void retrieve_adc_power(int *adc_level)
1234{
1235 *adc_level = atv_dmd_rd_long(APB_BLOCK_ADDR_ADC_SE, 0x0c);
1236 /*adc_level = adc_level/32768*100;*/
1237 *adc_level = (*adc_level) * 100 / 32768;
1238}
1239
1240void retrieve_vpll_carrier_lock(int *lock)
1241{
1242 unsigned int data;
1243
1244 data = atv_dmd_rd_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x43);
1245 *lock = (data & 0x1);
1246}
1247int retrieve_vpll_carrier_afc(void)
1248{
1249 int data_ret, pll_lock, field_lock, line_lock, line_lock_strong;
1250 unsigned int data_h, data_l, data_exg = 0;
1251
1252 pll_lock = atv_dmd_rd_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x43)&0x1;
1253 field_lock = atv_dmd_rd_byte(APB_BLOCK_ADDR_VDAGC, 0x4f)&0x4;
1254 line_lock = atv_dmd_rd_byte(APB_BLOCK_ADDR_VDAGC, 0x4f)&0x10;
1255 line_lock_strong = atv_dmd_rd_byte(APB_BLOCK_ADDR_VDAGC, 0x4f)&0x8;
1256 /* if((atv_dmd_rd_byte(APB_BLOCK_ADDR_CARR_RCVY,0x43)&0x1) == 1){ */
1257 if ((pll_lock == 1) || (line_lock == 0x10)) {
1258 /*if pll unlock, afc is invalid*/
1259 data_ret = 0xffff;/* 500; */
1260 return data_ret;
1261 }
1262 data_h = atv_dmd_rd_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x40);
1263 data_l = atv_dmd_rd_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x41);
1264 data_exg = ((data_h&0x7) << 8) | data_l;
1265 if (data_h&0x8) {
1266 data_ret = (((~data_exg)&0x7ff) - 1);
1267 data_ret = data_ret*488*(-1)/1000;
1268 } else {
1269 data_ret = data_exg;
1270 data_ret = data_ret*488/1000;
1271 }
1272 if ((abs(data_ret) < 50) && (line_lock_strong == 0x8) &&
1273 (field_lock == 0x4)) {
1274 data_ret = 100;
1275 return data_ret;
1276 }
1277 return data_ret;
1278}
1279void set_pll_lpf(unsigned int lock)
1280{
1281 atv_dmd_wr_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x24, lock);
1282}
1283
1284void retrieve_frequency_offset(int *freq_offset)
1285{
1286 /*unsigned int data;
1287 *data = atv_dmd_rd_word(APB_BLOCK_ADDR_CARR_RCVY,0x40);
1288 **freq_offset = (int)data;
1289 */
1290 unsigned int data_h, data_l, data_exg;
1291 int data_ret;
1292
1293 data_h = atv_dmd_rd_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x40);
1294 data_l = atv_dmd_rd_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x41);
1295 data_exg = ((data_h&0x7)<<8) | data_l;
1296 if (data_h&0x8) {
1297 data_ret = (((~data_exg) & 0x7ff) - 1);
1298 data_ret = data_ret*(-1);
1299 /* data_ret = data_ret*488*(-1) /1000; */
1300 } else
1301 data_ret = data_exg;/* data_ret = data_ret*488/100; */
1302 *freq_offset = data_ret;
1303}
1304EXPORT_SYMBOL(retrieve_frequency_offset);
1305void retrieve_video_lock(int *lock)
1306{
1307 unsigned int data, wlock, slock;
1308
1309 data = atv_dmd_rd_byte(APB_BLOCK_ADDR_VDAGC, 0x4f);
1310 wlock = data & 0x10;
1311 slock = data & 0x80;
1312 *lock = wlock & slock;
1313}
1314
1315void retrieve_fh_frequency(int *fh)
1316{
1317 unsigned long data1, data2;
1318
1319 data1 = atv_dmd_rd_word(APB_BLOCK_ADDR_VDAGC, 0x58);
1320 data2 = atv_dmd_rd_long(APB_BLOCK_ADDR_VDAGC, 0x10);
1321 data1 = data1 >> 11;
1322 data2 = data2 >> 3;
1323 *fh = data1 + data2;
1324}
1325/*tune mix to adapt afc*/
1326void atvdemod_afc_tune(void)
1327{
1328 /* int adc_level,lock,freq_offset,fh; */
1329 int freq_offset, lock, mix1_freq_cur, delta_mix1_freq;
1330
1331 /* retrieve_adc_power(&adc_level); */
1332 /* pr_info("adc_level: 0x%x\n",adc_level); */
1333 retrieve_vpll_carrier_lock(&lock);
1334 mix1_freq_cur = atv_dmd_rd_byte(APB_BLOCK_ADDR_MIXER_1, 0x0);
1335 delta_mix1_freq = abs(mix1_freq_cur - mix1_freq);
1336 if ((lock&0x1) == 0)
1337 pr_info("%s visual carrier lock:locked\n", __func__);
1338 else
1339 pr_info("%s visual carrier lock:unlocked\n", __func__);
1340 /* set_pll_lpf(lock); */
1341 retrieve_frequency_offset(&freq_offset);
1342 freq_offset = freq_offset*488/1000;
1343 /* pr_info("visual carrier offset:%d Hz\n",
1344 *freq_offset*48828125/100000);
1345 */
1346 /* retrieve_video_lock(&lock); */
1347 if ((lock&0x1) == 1) {
1348 if (delta_mix1_freq == atvdemod_afc_range)
1349 atv_dmd_wr_byte(APB_BLOCK_ADDR_MIXER_1, 0x0, mix1_freq);
1350 else if ((freq_offset >= atvdemod_afc_offset) &&
1351 (delta_mix1_freq < atvdemod_afc_range))
1352 atv_dmd_wr_byte(APB_BLOCK_ADDR_MIXER_1, 0x0,
1353 mix1_freq_cur-1);
1354 else if ((freq_offset <= (-1)*atvdemod_afc_offset) &&
1355 (delta_mix1_freq < atvdemod_afc_range-1))
1356 atv_dmd_wr_byte(APB_BLOCK_ADDR_MIXER_1, 0x0,
1357 mix1_freq_cur+1);
1358 /* pr_info("video lock:locked\n"); */
1359 }
1360 /* retrieve_fh_frequency(&fh); */
1361 /* pr_info("horizontal frequency:%d Hz\n",fh*190735/100000); */
1362}
1363static enum amlatvdemod_snr_level_e aml_atvdemod_get_snr_level(void)
1364{
1365 unsigned int snr_val, i, snr_d[8];
1366 enum amlatvdemod_snr_level_e ret;
1367 unsigned long fsnr;
1368
1369 snr_val = atv_dmd_rd_long(APB_BLOCK_ADDR_VDAGC, 0x50)>>8;
1370 fsnr = snr_val;
1371 for (i = 1; i < 8; i++) {
1372 snr_d[i] = snr_d[i-1];
1373 fsnr = fsnr + snr_d[i];
1374 }
1375 snr_d[0] = snr_val;
1376 fsnr = fsnr >> 3;
1377 if (fsnr < 316)
1378 ret = high;
1379 else if (fsnr < 31600)
1380 ret = ok_plus;
1381 else if (fsnr < 158000)
1382 ret = ok_minus;
1383 else if (fsnr < 700000)
1384 ret = low;
1385 else
1386 ret = very_low;
1387 return ret;
1388}
1389
1390void atvdemod_monitor_serice(void)
1391{
1392 enum amlatvdemod_snr_level_e snr_level;
1393 unsigned int vagc_bw_typ, vagc_bw_fast, vpll_kptrack, vpll_kitrack;
1394 unsigned int agc_register, vfmat_reg, agc_pll_kptrack, agc_pll_kitrack;
1395 /*1.get current snr*/
1396 snr_level = aml_atvdemod_get_snr_level();
1397 /*2.*/
1398 if (snr_level > very_low) {
1399 vagc_bw_typ = 0x1818;
1400 vagc_bw_fast = (snr_level == low) ? 0x18:0x10;
1401 vpll_kptrack = 0x05;
1402 vpll_kitrack = 0x0c;
1403 agc_pll_kptrack = 0x6;
1404 agc_pll_kitrack = 0xc;
1405 } else {
1406 vagc_bw_typ = 0x6f6f;
1407 vagc_bw_fast = 0x6f;
1408 vpll_kptrack = 0x06;
1409 vpll_kitrack = 0x0e;
1410 agc_pll_kptrack = 0x8;
1411 agc_pll_kitrack = 0xf;
1412 }
1413 atv_dmd_wr_word(APB_BLOCK_ADDR_VDAGC, 0x3c, vagc_bw_typ);
1414 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x3e, vagc_bw_fast);
1415 atv_dmd_wr_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x23, vpll_kptrack);
1416 atv_dmd_wr_byte(APB_BLOCK_ADDR_CARR_RCVY, 0x24, vpll_kitrack);
1417 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x0c,
1418 ((atv_dmd_rd_byte(APB_BLOCK_ADDR_VDAGC, 0x0c) & 0xf0)|
1419 agc_pll_kptrack));
1420 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x0d,
1421 ((atv_dmd_rd_byte(APB_BLOCK_ADDR_VDAGC, 0x0d) & 0xf0)|
1422 agc_pll_kitrack));
1423 /*3.*/
1424 agc_register = atv_dmd_rd_long(APB_BLOCK_ADDR_VDAGC, 0x28);
1425 if (snr_level < low) {
1426 agc_register = ((agc_register&0xff80fe03) | (25 << 16) |
1427 (15 << 2));
1428 atv_dmd_wr_long(APB_BLOCK_ADDR_VDAGC, 0x28, agc_register);
1429 } else if (snr_level > low) {
1430 agc_register = ((agc_register&0xff80fe03) | (38 << 16) |
1431 (30 << 2));
1432 atv_dmd_wr_long(APB_BLOCK_ADDR_VDAGC, 0x28, agc_register);
1433 }
1434 /*4.*/
1435 if (snr_level < ok_minus)
1436 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x47,
1437 (atv_dmd_rd_byte(APB_BLOCK_ADDR_VDAGC, 0x47) & 0x7f));
1438 else
1439 atv_dmd_wr_byte(APB_BLOCK_ADDR_VDAGC, 0x47,
1440 (atv_dmd_rd_byte(APB_BLOCK_ADDR_VDAGC, 0x47) | 0x80));
1441 /*5.vformat*/
1442 if (snr_level < ok_minus) {
1443 if (atv_dmd_rd_byte(APB_BLOCK_ADDR_VFORMAT, 0xe) != 0xf)
1444 atv_dmd_wr_byte(APB_BLOCK_ADDR_VFORMAT, 0xe, 0xf);
1445 } else if (snr_level > ok_minus) {
1446 vfmat_reg = atv_dmd_rd_word(APB_BLOCK_ADDR_VFORMAT, 0x16);
1447 if ((vfmat_reg << 4) < 0xf000) {
1448 if (atv_dmd_rd_byte(APB_BLOCK_ADDR_VFORMAT, 0xe) ==
1449 0x0f)
1450 atv_dmd_wr_byte(APB_BLOCK_ADDR_VFORMAT, 0xe,
1451 0x6);
1452 else
1453 atv_dmd_wr_byte(APB_BLOCK_ADDR_VFORMAT, 0xe,
1454 0x6);
1455 }
1456 } else {
1457 if (atv_dmd_rd_byte(APB_BLOCK_ADDR_VFORMAT, 0xe) == 0x0f)
1458 atv_dmd_wr_byte(APB_BLOCK_ADDR_VFORMAT, 0xe, 0xe);
1459 else
1460 atv_dmd_wr_byte(APB_BLOCK_ADDR_VFORMAT, 0xe, 0xe);
1461 }
1462}
1463
1464static int atvdemod_get_snr(struct dvb_frontend *fe)
1465{
1466 unsigned int snr_val = 0;
1467 int ret = 0;
1468
1469 snr_val = atv_dmd_rd_long(APB_BLOCK_ADDR_VDAGC, 0x50) >> 8;
1470 /* snr_val:900000~0xffffff,ret:5~15 */
1471 if (snr_val > 900000)
1472 ret = 15 - (snr_val - 900000)*10/(0xffffff - 900000);
1473 /* snr_val:158000~900000,ret:15~30 */
1474 else if (snr_val > 158000)
1475 ret = 30 - (snr_val - 158000)*15/(900000 - 158000);
1476 /* snr_val:31600~158000,ret:30~50 */
1477 else if (snr_val > 31600)
1478 ret = 50 - (snr_val - 31600)*20/(158000 - 31600);
1479 /* snr_val:316~31600,ret:50~80 */
1480 else if (snr_val > 316)
1481 ret = 80 - (snr_val - 316)*30/(31600 - 316);
1482 /* snr_val:0~316,ret:80~100 */
1483 else
1484 ret = 100 - (316 - snr_val)*20/316;
1485 return ret;
1486}
1487
1488void atvdemod_det_snr_serice(void)
1489{
1490 snr_val = atvdemod_get_snr(NULL);
1491}
1492
1493void atvdemod_timer_handler(unsigned long arg)
1494{
1495 if (atvdemod_timer_en == 0)
1496 return;
1497 atvdemod_timer.expires = jiffies + ATVDEMOD_INTERVAL*10;/*100ms timer*/
1498 add_timer(&atvdemod_timer);
1499 if (atvdemod_afc_en)
1500 atvdemod_afc_tune();
1501 if (atvdemod_monitor_en)
1502 atvdemod_monitor_serice();
1503 if (audio_det_en)
1504 aml_atvdemod_overmodule_det();
1505 if (atvdemod_det_snr_en)
1506 atvdemod_det_snr_serice();
1507}
1508
1509int atvdemod_clk_init(void)
1510{
1511 /* clocks_set_hdtv (); */
1512 /* 1.set system clock */
1513#if 0 /* now set pll in tvafe_general.c */
1514 if (is_meson_txl_cpu()) {
1515 amlatvdemod_hiu_reg_write(HHI_VDAC_CNTL0, 0x6e0201);
1516 amlatvdemod_hiu_reg_write(HHI_VDAC_CNTL1, 0x8);
1517 /* for TXL(T962) */
1518 pr_err("%s in TXL\n", __func__);
1519
1520 /* W_HIU_REG(HHI_ADC_PLL_CNTL, 0x30c54260); */
1521 #if 0
1522 W_HIU_REG(HHI_ADC_PLL_CNTL, 0x30f14250);
1523 W_HIU_REG(HHI_ADC_PLL_CNTL1, 0x22000442);
1524 W_HIU_REG(HHI_ADC_PLL_CNTL2, 0x5ba00380);
1525 W_HIU_REG(HHI_ADC_PLL_CNTL3, 0xac6a2114);
1526 W_HIU_REG(HHI_ADC_PLL_CNTL4, 0x02953004);
1527 W_HIU_REG(HHI_ADC_PLL_CNTL5, 0x00030a00);
1528 W_HIU_REG(HHI_ADC_PLL_CNTL6, 0x00005000);
1529 W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x2c6a2114);
1530 #else /* get from feijun 2015/07/19 */
1531 W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a6a2110);
1532 W_HIU_REG(HHI_ADC_PLL_CNTL, 0x30f14250);
1533 W_HIU_REG(HHI_ADC_PLL_CNTL1, 0x22000442);
1534 /*0x5ba00380 from pll;0x5ba00384 clk
1535 *form crystal
1536 */
1537 W_HIU_REG(HHI_ADC_PLL_CNTL2, 0x5ba00384);
1538 W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a6a2110);
1539 W_HIU_REG(HHI_ADC_PLL_CNTL4, 0x02913004);
1540 W_HIU_REG(HHI_ADC_PLL_CNTL5, 0x00034a00);
1541 W_HIU_REG(HHI_ADC_PLL_CNTL6, 0x00005000);
1542 W_HIU_REG(HHI_ADC_PLL_CNTL3, 0xca6a2110);
1543 W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a6a2110);
1544 #endif
1545 W_HIU_REG(HHI_DADC_CNTL, 0x00102038);
1546 W_HIU_REG(HHI_DADC_CNTL2, 0x00000406);
1547 W_HIU_REG(HHI_DADC_CNTL3, 0x00082183);
1548
1549 } else {
1550 W_HIU_REG(HHI_ADC_PLL_CNTL3, 0xca2a2110);
1551 W_HIU_REG(HHI_ADC_PLL_CNTL4, 0x2933800);
1552 W_HIU_REG(HHI_ADC_PLL_CNTL, 0xe0644220);
1553 W_HIU_REG(HHI_ADC_PLL_CNTL2, 0x34e0bf84);
1554 W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a2a2110);
1555
1556 W_HIU_REG(HHI_ATV_DMD_SYS_CLK_CNTL, 0x80);
1557 /* TVFE reset */
1558 W_HIU_BIT(RESET1_REGISTER, 1, 7, 1);
1559 }
1560#endif
1561 W_HIU_REG(HHI_ATV_DMD_SYS_CLK_CNTL, 0x80);
1562
1563 /* read_version_register(); */
1564
1565 /*2.set atv demod top page control register*/
1566 atv_dmd_input_clk_32m();
1567 atv_dmd_wr_long(APB_BLOCK_ADDR_TOP, ATV_DMD_TOP_CTRL, 0x1037);
1568 atv_dmd_wr_long(APB_BLOCK_ADDR_TOP, (ATV_DMD_TOP_CTRL1 << 2), 0x1f);
1569
1570 /*3.configure atv demod*/
1571 check_communication_interface();
1572 power_on_receiver();
1573 pr_err("%s done\n", __func__);
1574
1575 return 0;
1576}
1577
1578int atvdemod_init(void)
1579{
1580 /* unsigned long data32; */
1581 if (atvdemod_timer_en == 1) {
1582 if (timer_init_flag == 1) {
1583 del_timer_sync(&atvdemod_timer);
1584 timer_init_flag = 0;
1585 }
1586 }
1587
1588 /* 1.set system clock when atv enter*/
1589
1590 configure_receiver(broad_std, if_freq, if_inv, gde_curve, sound_format);
1591 atv_dmd_misc();
1592 /*4.software reset*/
1593 atv_dmd_soft_reset();
1594 atv_dmd_soft_reset();
1595 atv_dmd_soft_reset();
1596 atv_dmd_soft_reset();
1597
1598 /* ?????
1599 *while (!all_lock) {
1600 * data32 = atv_dmd_rd_long(APB_BLOCK_ADDR_VDAGC,0x13<<2);
1601 * if ((data32 & 0x1c) == 0x0) {
1602 * all_lock = 1;
1603 * }
1604 * delay_us(400);
1605 *}
1606 */
1607 #if 1/* temp mark */
1608 if (atvdemod_timer_en == 1) {
1609 /*atvdemod timer handler*/
1610 init_timer(&atvdemod_timer);
1611 /* atvdemod_timer.data = (ulong) devp; */
1612 atvdemod_timer.function = atvdemod_timer_handler;
1613 /* after 3s enable demod auto detect */
1614 atvdemod_timer.expires = jiffies + ATVDEMOD_INTERVAL*300;
1615 add_timer(&atvdemod_timer);
1616 mix1_freq = atv_dmd_rd_byte(APB_BLOCK_ADDR_MIXER_1, 0x0);
1617 timer_init_flag = 1;
1618 }
1619 #endif
1620 pr_info("%s done\n", __func__);
1621 return 0;
1622}
1623void atvdemod_uninit(void)
1624{
1625 /* del the timer */
1626 if (atvdemod_timer_en == 1) {
1627 if (timer_init_flag == 1) {
1628 del_timer_sync(&atvdemod_timer);
1629 timer_init_flag = 0;
1630 }
1631 }
1632}
1633
1634void atv_dmd_set_std(void)
1635{
1636 v4l2_std_id ptstd = amlatvdemod_devp->parm.std;
1637 /* set broad standard of tuner*/
1638 if ((ptstd & V4L2_COLOR_STD_PAL) && ((ptstd & V4L2_STD_B) ||
1639 (ptstd & V4L2_STD_G))) {
1640 amlatvdemod_devp->fre_offset = 2250000;
1641 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_50HZ_VERT;
1642 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG;
1643 if_freq = 3250000;
1644 gde_curve = 2;
1645 } else if ((ptstd & V4L2_COLOR_STD_PAL) && (ptstd & V4L2_STD_DK)) {
1646 amlatvdemod_devp->fre_offset = 2250000;
1647 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_50HZ_VERT;
1648 if_freq = 3250000;
1649 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK;
1650 gde_curve = 3;
1651 } else if ((ptstd & V4L2_COLOR_STD_PAL) && (ptstd & V4L2_STD_PAL_M)) {
1652 amlatvdemod_devp->fre_offset = 2250000;
1653 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_60HZ_VERT;
1654 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M;
1655 if_freq = 4250000;
1656 gde_curve = 0;
1657 } else if ((ptstd & V4L2_COLOR_STD_NTSC) && (ptstd & V4L2_STD_NTSC_M)) {
1658 amlatvdemod_devp->fre_offset = 1750000;
1659 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_60HZ_VERT;
1660 if_freq = 4250000;
1661 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC;
1662 gde_curve = 0;
1663 } else if ((ptstd & V4L2_COLOR_STD_NTSC) && (ptstd & V4L2_STD_DK)) {
1664 amlatvdemod_devp->fre_offset = 1750000;
1665 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_60HZ_VERT;
1666 if_freq = 4250000;
1667 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_DK;
1668 gde_curve = 0;
1669 } else if ((ptstd & V4L2_COLOR_STD_NTSC) && (ptstd & V4L2_STD_BG)) {
1670 amlatvdemod_devp->fre_offset = 1750000;
1671 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_60HZ_VERT;
1672 if_freq = 4250000;
1673 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_BG;
1674 gde_curve = 0;
1675 } else if ((ptstd & V4L2_COLOR_STD_NTSC) && (ptstd & V4L2_STD_PAL_I)) {
1676 amlatvdemod_devp->fre_offset = 1750000;
1677 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_60HZ_VERT;
1678 if_freq = 4250000;
1679 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_I;
1680 gde_curve = 0;
1681 } else if ((ptstd & V4L2_COLOR_STD_NTSC) &&
1682 (ptstd & V4L2_STD_NTSC_M_JP)) {
1683 amlatvdemod_devp->fre_offset = 1750000;
1684 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_50HZ_VERT;
1685 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_J;
1686 if_freq = 4250000;
1687 gde_curve = 0;
1688 } else if ((ptstd & V4L2_COLOR_STD_PAL) && (ptstd & V4L2_STD_PAL_I)) {
1689 amlatvdemod_devp->fre_offset = 2750000;
1690 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_50HZ_VERT;
1691 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I;
1692 if_freq = 3250000;
1693 gde_curve = 4;
1694 } else if (ptstd & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC)) {
1695 amlatvdemod_devp->fre_offset = 2750000;
1696 freq_hz_cvrt = AML_ATV_DEMOD_FREQ_50HZ_VERT;
1697 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_L;
1698 gde_curve = 4;
1699 }
1700 if (amlatvdemod_devp->parm.tuner_id == AM_TUNER_R840) {
1701 if_freq = amlatvdemod_devp->parm.if_freq;
1702 if_inv = amlatvdemod_devp->parm.if_inv;
1703 } else if (amlatvdemod_devp->parm.tuner_id == AM_TUNER_MXL661) {
1704 if_freq = amlatvdemod_devp->parm.if_freq;
1705 if_inv = amlatvdemod_devp->parm.if_inv;
1706 } else if (amlatvdemod_devp->parm.tuner_id == AM_TUNER_SI2151) {
1707 if_freq = amlatvdemod_devp->parm.if_freq;
1708 if_inv = amlatvdemod_devp->parm.if_inv;
1709 }
1710 pr_info
1711 ("[atvdemod..]%s: broad_std %d,freq_hz_cvrt:0x%x,fre_offset:%d.\n",
1712 __func__, broad_std, freq_hz_cvrt, amlatvdemod_devp->fre_offset);
1713 if (atvdemod_init())
1714 pr_info("[atvdemod..]%s: atv restart error.\n", __func__);
1715}
1716
1717int aml_audiomode_autodet(struct dvb_frontend *fe)
1718{
1719 unsigned long carrier_power = 0;
1720 unsigned long carrier_power_max = 0;
1721 unsigned long carrier_power_average_max = 0;
1722 unsigned long carrier_power_average[4] = {0};
1723 unsigned long reg_addr = 0x03, temp_data;
1724 int carrier_lock_count = 0;
1725 int lock = 0;
1726 int broad_std_final = 0;
1727 int num = 0, i = 0, final_id = 0;
1728 int delay_ms = 10, delay_ms_default = 10;
1729 int cur_std = ID_PAL_DK;
1730 struct dtv_frontend_properties
1731 *p = fe != NULL ? &fe->dtv_property_cache:NULL;
1732#if 0
1733 temp_data = atv_dmd_rd_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
1734 temp_data = temp_data | 0x80;/* 0x40 */
1735 atv_dmd_wr_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data);
1736#endif
1737
1738 switch (broad_std) {
1739 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK:
1740 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I:
1741 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG:
1742 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M:
1743 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M;
1744 break;
1745 case AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_DK:
1746 case AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_I:
1747 case AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_BG:
1748 case AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_M:
1749 case AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC:
1750
1751 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_M;
1752 atvdemod_init();
1753 temp_data = atv_dmd_rd_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
1754 temp_data = temp_data & (~0x80); /* 0xbf; */
1755 atv_dmd_wr_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data);
1756 /* pr_err("%s, SECAM ,audio set SECAM_L\n", __func__); */
1757 return broad_std;
1758
1759 case AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_L:
1760 case AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_DK2:
1761 case AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_DK3:
1762 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_L;
1763 atvdemod_init();
1764 temp_data = atv_dmd_rd_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
1765
1766 temp_data = temp_data & (~0x80); /* 0xbf; */
1767
1768 atv_dmd_wr_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data);
1769 /* pr_err("%s, SECAM ,audio set SECAM_L\n", __func__); */
1770 return broad_std;
1771 default:
1772 pr_err("unsupport broadcast_standard!!!\n");
1773 temp_data = atv_dmd_rd_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
1774 temp_data = temp_data & (~0x80); /* 0xbf; */
1775 atv_dmd_wr_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data);
1776 return broad_std;
1777 }
1778 /* ----------------read carrier_power--------------------- */
1779 /* SIF_STG_2[0x09],address 0x03 */
1780 while (1) {
1781 if (num >= 4) {
1782 temp_data =
1783 atv_dmd_rd_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
1784 temp_data = temp_data & (~0x80);
1785 atv_dmd_wr_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02,
1786 temp_data);
1787 carrier_power_max = carrier_power_average[0];
1788 for (i = 0; i < ID_MAX; i++) {
1789 if (carrier_power_max
1790 < carrier_power_average[i]) {
1791 carrier_power_max =
1792 carrier_power_average[i];
1793 final_id = i;
1794 }
1795 }
1796 switch (final_id) {
1797 case ID_PAL_I:
1798 broad_std_final =
1799 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I;
1800 break;
1801 case ID_PAL_BG:
1802 broad_std_final =
1803 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG;
1804 break;
1805 case ID_PAL_M:
1806 broad_std_final =
1807 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M;
1808 break;
1809 case ID_PAL_DK:
1810 broad_std_final =
1811 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK;
1812 break;
1813 }
1814 carrier_power_average_max = carrier_power_max;
1815 broad_std = broad_std_final;
1816 pr_err("%s:broad_std:%d,carrier_power_average_max:%lu\n",
1817 __func__, broad_std, carrier_power_average_max);
1818 if (carrier_power_average_max < 150)
1819 pr_err("%s,carrier too low error\n", __func__);
1820 if (broad_std == AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M) {
1821 /*the max except palm*/
1822 carrier_power_average[final_id] = 0;
1823 final_id = 0;
1824 carrier_power_max = carrier_power_average[0];
1825 for (i = 0; i < ID_MAX; i++) {
1826 if (carrier_power_max
1827 < carrier_power_average[i]) {
1828 carrier_power_max =
1829 carrier_power_average[i];
1830 final_id = i;
1831 }
1832 }
1833 switch (final_id) {
1834 case ID_PAL_I:
1835 broad_std_except_pal_m =
1836 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I;
1837 break;
1838 case ID_PAL_BG:
1839 broad_std_except_pal_m =
1840 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG;
1841 break;
1842 case ID_PAL_DK:
1843 broad_std_except_pal_m =
1844 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK;
1845 break;
1846 }
1847 }
1848 if (p != NULL) {
1849 p->analog.std = V4L2_COLOR_STD_PAL;
1850 switch (broad_std) {
1851 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK:
1852 p->analog.std |= V4L2_STD_PAL_DK;
1853 p->analog.audmode = V4L2_STD_PAL_DK;
1854 break;
1855 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I:
1856 p->analog.std |= V4L2_STD_PAL_I;
1857 p->analog.audmode = V4L2_STD_PAL_I;
1858 break;
1859 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG:
1860 p->analog.std |= V4L2_STD_PAL_BG;
1861 p->analog.audmode = V4L2_STD_PAL_BG;
1862 break;
1863 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M:
1864 p->analog.std |= V4L2_STD_PAL_M;
1865 p->analog.audmode = V4L2_STD_PAL_M;
1866 break;
1867 default:
1868 p->analog.std |= V4L2_STD_PAL_DK;
1869 p->analog.audmode = V4L2_STD_PAL_DK;
1870 }
1871 p->frequency += 1;
1872 fe->ops.set_frontend(fe);
1873 }
1874 return broad_std;
1875 }
1876 switch (broad_std) {
1877 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK:
1878 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I;
1879 cur_std = ID_PAL_I;
1880 if (p != NULL) {
1881 p->analog.std =
1882 V4L2_COLOR_STD_PAL | V4L2_STD_PAL_I;
1883 p->frequency += 1;
1884 p->analog.audmode = V4L2_STD_PAL_I;
1885 }
1886 delay_ms = delay_ms_default;
1887 break;
1888 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I:
1889 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG;
1890 cur_std = ID_PAL_BG;
1891 if (p != NULL) {
1892 p->analog.std =
1893 V4L2_COLOR_STD_PAL | V4L2_STD_PAL_BG;
1894 p->frequency += 1;
1895 p->analog.audmode = V4L2_STD_PAL_BG;
1896 }
1897 delay_ms = delay_ms_default;
1898 break;
1899 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG:
1900 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M;
1901 cur_std = ID_PAL_M;
1902 if (p != NULL) {
1903 p->analog.std =
1904 V4L2_COLOR_STD_PAL | V4L2_STD_PAL_M;
1905 p->frequency += 1;
1906 p->analog.audmode = V4L2_STD_PAL_M;
1907 }
1908 delay_ms = delay_ms_default;
1909 break;
1910 case AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M:
1911 broad_std = AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK;
1912 cur_std = ID_PAL_DK;
1913 if (p != NULL) {
1914 p->analog.std =
1915 V4L2_COLOR_STD_PAL | V4L2_STD_PAL_DK;
1916 p->frequency += 1;
1917 p->analog.audmode = V4L2_STD_PAL_DK;
1918 }
1919 delay_ms = delay_ms_default;
1920 break;
1921
1922 default:
1923 pr_err("unsupport broadcast_standard!!!\n");
1924 break;
1925 }
1926 if (p != NULL)
1927 fe->ops.set_frontend(fe);
1928 /* atvdemod_init(); //set_frontend has already been called it */
1929
1930 /* enable audio detect function */
1931 temp_data = atv_dmd_rd_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
1932 temp_data = temp_data | 0x80;/* 0x40 */
1933 atv_dmd_wr_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data);
1934
1935 usleep_range(delay_ms*1000, delay_ms*1000+100);
1936
1937 carrier_lock_count = 0;
1938 i = 4;
1939 while (i--) {
1940 retrieve_vpll_carrier_lock(&lock);
1941 if (lock == 0)
1942 break;
1943 carrier_lock_count++;
1944 if (carrier_lock_count >= 20) {
1945 pr_err("%s step2, retrieve_vpll_carrier_lock failed\n",
1946 __func__);
1947 /* return broad_std; */
1948 }
1949 usleep_range(6000, 9000);
1950 }
1951 /* ----------------read carrier_power--------------------- */
1952 for (i = 0; i < 100; i++) {
1953 carrier_power =
1954 atv_dmd_rd_reg(APB_BLOCK_ADDR_SIF_STG_2,
1955 reg_addr);
1956 carrier_power_max += carrier_power;
1957 }
1958 carrier_power = carrier_power_max/i;
1959 carrier_power_max = 0;
1960 pr_err("[amlatvdemod.. %d,std:%d ]%s: atvdemo audio carrier power report:%lu. @@@@@@@@@@\n",
1961 num, broad_std, __func__, carrier_power);
1962 carrier_power_average[cur_std] += carrier_power;
1963 num++;
1964 }
1965
1966 return broad_std;
1967}
1968
1969void aml_audio_valume_gain_set(unsigned int audio_gain)
1970{
1971 unsigned long audio_gain_data, temp_data;
1972
1973 if (audio_gain > 0xfff) {
1974 pr_err("Error: atv in gain max 7.998, min 0.002! gain = value/512\n");
1975 pr_err("value (0~0xfff)\n");
1976 return;
1977 }
1978 audio_gain_data = audio_gain & 0xfff;
1979 temp_data = atv_dmd_rd_word(APB_BLOCK_ADDR_MONO_PROC, 0x52);
1980 temp_data = (temp_data & 0xf000) | audio_gain_data;
1981 atv_dmd_wr_word(APB_BLOCK_ADDR_MONO_PROC, 0x52, temp_data);
1982}
1983
1984unsigned int aml_audio_valume_gain_get(void)
1985{
1986 unsigned long audio_gain_data;
1987
1988 audio_gain_data = atv_dmd_rd_word(APB_BLOCK_ADDR_MONO_PROC, 0x52);
1989 audio_gain_data = audio_gain_data & 0xfff;
1990 return audio_gain_data;
1991}
1992
1993void aml_atvdemod_overmodule_det(void)
1994{
1995 unsigned long temp_data, temp_data2;/* , temp_data3 , temp_data4; */
1996 unsigned long counter_report;
1997 int carrier_lock_count = 0;
1998 int vlock = 0;
1999
2000 switch (audio_det_mode) {
2001 case AUDIO_AUTO_DETECT:
2002 aml_audiomode_autodet(NULL);
2003 return;
2004#if 0
2005 while (1) {
2006 retrieve_vpll_carrier_lock(&vlock);
2007 if (vlock)
2008 break;
2009 carrier_lock_count++;
2010 if (carrier_lock_count >= 1000)
2011 return;
2012 /* ------------whether need timer delays between the detect lock---- */
2013 }
2014 /* -----------------enable auto_adjust_en------------- */
2015 temp_data = atv_dmd_rd_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
2016 temp_data = temp_data | 0x100;
2017 /* set the bit 9 of the temp_data to 1 */
2018 atv_dmd_wr_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data);
2019 /* -----------------enable auto_adjust_en end----------------- */
2020 /* -----------------begain to set ov_cnt_en enable------------- */
2021 temp_data2 = atv_dmd_rd_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
2022 temp_data2 = temp_data2 | 0x80;
2023 /* set the bit 8 of the temp_data to 1 */
2024 atv_dmd_wr_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data2);
2025 /* ------------------set ov_cnt_en enable end---------------- */
2026 udelay(1000);/* timer delay needed , */
2027 /* ------------------------------------------------------------ */
2028 /* -----------------disable auto_adjust_en------------- */
2029 temp_data3 = atv_dmd_rd_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
2030 temp_data3 = temp_data3 & 0xfeff;
2031 /* set the bit 9 of the temp_data to 0 */
2032 atv_dmd_wr_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data3);
2033 /* -----------------disable auto_adjust_en end------------ */
2034 /* -----------------begain to set ov_cnt_en disable------------- */
2035 temp_data4 = atv_dmd_rd_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
2036 temp_data4 = temp_data4 & 0xff7f;
2037 /* set the bit 8 of the temp_data to 0 */
2038 atv_dmd_wr_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data4);
2039 break;
2040 /* ------------------set ov_cnt_en disable end------ */
2041#endif
2042 case AUDIO_MANUAL_DETECT:
2043 while (1) {
2044 retrieve_vpll_carrier_lock(&vlock);
2045 if (vlock)
2046 break;
2047 carrier_lock_count++;
2048 if (carrier_lock_count >= 1000)
2049 return;
2050 }
2051
2052 /* -----------------begain to set ov_cnt_en enable---- */
2053 temp_data = atv_dmd_rd_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
2054 temp_data = temp_data | 0x80;
2055 /* set the bit 8 of the temp_data to 1 */
2056 atv_dmd_wr_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data);
2057 /* ------------------set ov_cnt_en enable end--------------- */
2058 /* -----------------disable auto_adjust_en------------- */
2059 temp_data2 = atv_dmd_rd_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
2060 temp_data2 = temp_data2 & 0xfeff;
2061 /* set the bit 9 of the temp_data to 0 */
2062 atv_dmd_wr_word(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data2);
2063 /* -----------------disable auto_adjust_en end------------ */
2064 udelay(1000);/* timer delay needed , */
2065 /* ------------------------------------------------------- */
2066 counter_report =
2067 atv_dmd_rd_word(APB_BLOCK_ADDR_SIF_STG_2, 0x04);
2068
2069 while (counter_report > over_threshold) {
2070 unsigned long shift_gain, shift_gain_report;
2071
2072 temp_data2 = atv_dmd_rd_byte(
2073 APB_BLOCK_ADDR_SIF_STG_2, 0x00);
2074 shift_gain = temp_data2 & 0x07;
2075 shift_gain--;
2076 temp_data2 = (temp_data2 & 0xf8) | shift_gain;
2077 atv_dmd_wr_byte(APB_BLOCK_ADDR_SIF_STG_2, 0x00,
2078 temp_data2);
2079 shift_gain_report = (
2080 (atv_dmd_rd_long(APB_BLOCK_ADDR_SIF_STG_2, 0x04)
2081 & 0x00070000) >> 16);
2082 if (shift_gain_report != shift_gain)
2083 pr_info("[atvdemo...]:set shift_gain error\n");
2084 /* ------------------timer delay needed- */
2085 udelay(1000);/* timer delay needed , */
2086 /* ----------------------- */
2087 counter_report =
2088 atv_dmd_rd_word(APB_BLOCK_ADDR_SIF_STG_2, 0x04);
2089 }
2090 break;
2091 default:
2092 pr_info("invalid over_module_det mode!!!\n");
2093 break;
2094 }
2095}
2096
2097void aml_fix_PWM_adjust(int enable)
2098{
2099 unsigned long temp_data;
2100 /*
2101 *temp_data = atv_dmd_rd_byte(APB_BLOCK_ADDR_AGC_PWM, 0x08);
2102 *temp_data = temp_data | 0x01;
2103 *atv_dmd_wr_byte(APB_BLOCK_ADDR_AGC_PWM, 0x08, temp_data);
2104 */
2105 temp_data = atv_dmd_rd_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02);
2106 if (enable)
2107 temp_data = temp_data & ~((0x3)<<8);
2108 else
2109 temp_data = temp_data & ~((0x1)<<9);
2110
2111 atv_dmd_wr_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data);
2112 if (enable) {
2113 temp_data = temp_data | ((0x3)<<8);
2114 atv_dmd_wr_reg(APB_BLOCK_ADDR_SIF_STG_2, 0x02, temp_data);
2115 }
2116}
2117
2118void aml_audio_overmodulation(int enable)
2119{
2120 static int ov_flag;
2121 unsigned long tmp_v;
2122 unsigned long tmp_v1;
2123 u32 Broadcast_Standard = broad_std;
2124
2125 if (enable && Broadcast_Standard ==
2126 AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK) {
2127 tmp_v = atv_dmd_rd_long(APB_BLOCK_ADDR_SIF_STG_2, 0x28);
2128 tmp_v = tmp_v&0xffff;
2129 if (tmp_v >= 0x10 && ov_flag == 0) {
2130 tmp_v1 =
2131 atv_dmd_rd_long(APB_BLOCK_ADDR_SIF_STG_2, 0);
2132 tmp_v1 = (tmp_v1&0xffffff)|(1<<24);
2133 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2, 0, tmp_v1);
2134 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2,
2135 0x14, 0x8000015);
2136 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2,
2137 0x1c, 0x0f000);
2138 } else if (tmp_v >= 0x2500 && ov_flag == 0) {
2139 tmp_v1 = atv_dmd_rd_long(APB_BLOCK_ADDR_SIF_STG_2, 0);
2140 tmp_v1 = (tmp_v1&0xffffff)|(1<<24);
2141 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2, 0, tmp_v1);
2142 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2,
2143 0x14, 0xf400015);
2144 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2,
2145 0x18, 0xc000);
2146 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2,
2147 0x1c, 0x0f000);
2148 ov_flag = 1;
2149 } else if (tmp_v <= 0x10 && ov_flag == 1) {
2150 tmp_v1 = atv_dmd_rd_long(APB_BLOCK_ADDR_SIF_STG_2, 0);
2151 tmp_v1 = (tmp_v1&0xffffff)|(0<<24);
2152 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2, 0, tmp_v1);
2153 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2,
2154 0x14, 0xf400000);
2155 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2,
2156 0x18, 0xc000);
2157 atv_dmd_wr_long(APB_BLOCK_ADDR_SIF_STG_2,
2158 0x1c, 0x1f000);
2159 ov_flag = 0;
2160 }
2161 }
2162}
2163
2164
generated by cgit at 2024-05-19 20:29:16 (GMT)