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path: root/drivers/stream_input/tv_frontend/atv_demod/atvdemod_func.h (plain)
blob: 807239206f8fb1eb95d5c8b4794cc0c5e907aab5
1/*
2 * ATVDEMOD Device Driver
3 *
4 * Author: dezhi kong <dezhi.kong@amlogic.com>
5 *
6 *
7 * Copyright (C) 2014 Amlogic Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ATVDEMOD_FUN_H
15#define __ATVDEMOD_FUN_H
16
17/*#include "../aml_fe.h"*/
18#include <linux/amlogic/tvin/tvin.h>
19#include "../aml_fe.h"
20#include <linux/amlogic/iomap.h>
21
22/*#define TVFE_APB_BASE_ADDR 0xd0046000*/
23#define ATV_DMD_APB_BASE_ADDR 0xc8008000
24#define ATV_DMD_APB_BASE_ADDR_GXTVBB 0xc8840000
25
26#define HHI_ATV_DMD_SYS_CLK_CNTL 0x10f3
27
28extern int atvdemod_debug_en;
29extern struct amlatvdemod_device_s *amlatvdemod_devp;
30extern unsigned int reg_23cf; /* IIR filter */
31extern int broad_std_except_pal_m;
32#undef pr_info
33#define pr_info(args...)\
34 do {\
35 if (atvdemod_debug_en)\
36 printk(args);\
37 } while (0)
38#undef pr_dbg
39#define pr_dbg(a...) \
40 do {\
41 if (1)\
42 printk(a);\
43 } while (0)
44
45#define ATVDEMOD_INTERVAL (HZ/100) /*10ms, #define HZ 100*/
46
47extern int amlatvdemod_reg_read(unsigned int reg, unsigned int *val);
48extern int amlatvdemod_reg_write(unsigned int reg, unsigned int val);
49extern int amlatvdemod_hiu_reg_read(unsigned int reg, unsigned int *val);
50extern int amlatvdemod_hiu_reg_write(unsigned int reg, unsigned int val);
51
52static inline uint32_t R_ATVDEMOD_REG(uint32_t reg)
53{
54 unsigned int val;
55
56 amlatvdemod_reg_read(reg, &val);
57 return val;
58}
59
60static inline void W_ATVDEMOD_REG(uint32_t reg,
61 const uint32_t val)
62{
63 amlatvdemod_reg_write(reg, val);
64}
65
66static inline void W_ATVDEMOD_BIT(uint32_t reg,
67 const uint32_t value,
68 const uint32_t start,
69 const uint32_t len)
70{
71 W_ATVDEMOD_REG(reg, ((R_ATVDEMOD_REG(reg) &
72 ~(((1L << (len)) - 1) << (start))) |
73 (((value) & ((1L << (len)) - 1)) << (start))));
74}
75
76static inline uint32_t R_ATVDEMOD_BIT(uint32_t reg,
77 const uint32_t start,
78 const uint32_t len)
79{
80 uint32_t val;
81
82 val = ((R_ATVDEMOD_REG(reg) >> (start)) & ((1L << (len)) - 1));
83
84 return val;
85}
86
87static inline uint32_t R_HIU_REG(uint32_t reg)
88{
89 unsigned int val;
90
91 amlatvdemod_hiu_reg_read(reg, &val);
92 return val;
93}
94
95static inline void W_HIU_REG(uint32_t reg,
96 const uint32_t val)
97{
98 amlatvdemod_hiu_reg_write(reg, val);
99}
100
101static inline void W_HIU_BIT(uint32_t reg,
102 const uint32_t value,
103 const uint32_t start,
104 const uint32_t len)
105{
106 W_HIU_REG(reg, ((R_HIU_REG(reg) &
107 ~(((1L << (len)) - 1) << (start))) |
108 (((value) & ((1L << (len)) - 1)) << (start))));
109}
110
111static inline uint32_t R_HIU_BIT(uint32_t reg,
112 const uint32_t start,
113 const uint32_t len)
114{
115 uint32_t val;
116
117 val = ((R_HIU_REG(reg) >> (start)) & ((1L << (len)) - 1));
118
119 return val;
120}
121
122enum broadcast_standard_e {
123 ATVDEMOD_STD_NTSC = 0,
124 ATVDEMOD_STD_NTSC_J,
125 ATVDEMOD_STD_PAL_M,
126 ATVDEMOD_STD_PAL_BG,
127 ATVDEMOD_STD_DTV,
128 ATVDEMOD_STD_SECAM_DK2,
129 ATVDEMOD_STD_SECAM_DK3,
130 ATVDEMOD_STD_PAL_BG_NICAM,
131 ATVDEMOD_STD_PAL_DK_CHINA,
132 ATVDEMOD_STD_SECAM_L,
133 ATVDEMOD_STD_PAL_I,
134 ATVDEMOD_STD_PAL_DK1,
135 ATVDEMOD_STD_MAX,
136};
137enum gde_curve_e {
138 ATVDEMOD_CURVE_M = 0,
139 ATVDEMOD_CURVE_A,
140 ATVDEMOD_CURVE_B,
141 ATVDEMOD_CURVE_CHINA,
142 ATVDEMOD_CURVE_MAX,
143};
144enum sound_format_e {
145 ATVDEMOD_SOUND_STD_MONO = 0,
146 ATVDEMOD_SOUND_STD_NICAM,
147 ATVDEMOD_SOUND_STD_MAX,
148};
149extern void atv_dmd_wr_reg(unsigned char block, unsigned char reg,
150 unsigned long data);
151extern unsigned long atv_dmd_rd_reg(unsigned char block, unsigned char reg);
152extern unsigned long atv_dmd_rd_byte(unsigned long block_address,
153 unsigned long reg_addr);
154extern unsigned long atv_dmd_rd_word(unsigned long block_address,
155 unsigned long reg_addr);
156extern unsigned long atv_dmd_rd_long(unsigned long block_address,
157 unsigned long reg_addr);
158extern void atv_dmd_wr_long(unsigned long block_address,
159 unsigned long reg_addr,
160 unsigned long data);
161extern void atv_dmd_wr_word(unsigned long block_address,
162 unsigned long reg_addr,
163 unsigned long data);
164extern void atv_dmd_wr_byte(unsigned long block_address,
165 unsigned long reg_addr,
166 unsigned long data);
167extern void set_audio_gain_val(int val);
168extern void set_video_gain_val(int val);
169extern void atv_dmd_soft_reset(void);
170extern void atv_dmd_input_clk_32m(void);
171extern void read_version_register(void);
172extern void check_communication_interface(void);
173extern void power_on_receiver(void);
174extern void atv_dmd_misc(void);
175extern void configure_receiver(int Broadcast_Standard,
176 unsigned int Tuner_IF_Frequency,
177 int Tuner_Input_IF_inverted, int GDE_Curve,
178 int sound_format);
179extern int atvdemod_clk_init(void);
180extern int atvdemod_init(void);
181extern void atvdemod_uninit(void);
182extern void atv_dmd_set_std(void);
183extern void retrieve_vpll_carrier_lock(int *lock);
184extern void retrieve_video_lock(int *lock);
185extern int retrieve_vpll_carrier_afc(void);
186
187extern int get_atvdemod_snr_val(void);
188extern int aml_atvdemod_get_snr(struct dvb_frontend *fe);
189
190/*atv demod block address*/
191/*address interval is 4, because it's 32bit interface,
192 * but the address is in byte
193 */
194#define ATV_DMD_TOP_CTRL 0x0
195#define ATV_DMD_TOP_CTRL1 0x4
196#define ATV_DMD_RST_CTRL 0x8
197
198#define APB_BLOCK_ADDR_SYSTEM_MGT 0x0
199#define APB_BLOCK_ADDR_AA_LP_NOTCH 0x1
200#define APB_BLOCK_ADDR_MIXER_1 0x2
201#define APB_BLOCK_ADDR_MIXER_3 0x3
202#define APB_BLOCK_ADDR_ADC_SE 0x4
203#define APB_BLOCK_ADDR_PWR_ANL 0x5
204#define APB_BLOCK_ADDR_CARR_RCVY 0x6
205#define APB_BLOCK_ADDR_FE_DROOP_MDF 0x7
206#define APB_BLOCK_ADDR_SIF_IC_STD 0x8
207#define APB_BLOCK_ADDR_SIF_STG_2 0x9
208#define APB_BLOCK_ADDR_SIF_STG_3 0xa
209#define APB_BLOCK_ADDR_IC_AGC 0xb
210#define APB_BLOCK_ADDR_DAC_UPS 0xc
211#define APB_BLOCK_ADDR_GDE_EQUAL 0xd
212#define APB_BLOCK_ADDR_VFORMAT 0xe
213#define APB_BLOCK_ADDR_VDAGC 0xf
214#define APB_BLOCK_ADDR_VERS_REGISTER 0x10
215#define APB_BLOCK_ADDR_INTERPT_MGT 0x11
216#define APB_BLOCK_ADDR_ADC_MGR 0x12
217#define APB_BLOCK_ADDR_GP_VD_FLT 0x13
218#define APB_BLOCK_ADDR_CARR_DMD 0x14
219#define APB_BLOCK_ADDR_SIF_VD_IF 0x15
220#define APB_BLOCK_ADDR_VD_PKING 0x16
221#define APB_BLOCK_ADDR_FE_DR_SMOOTH 0x17
222#define APB_BLOCK_ADDR_AGC_PWM 0x18
223#define APB_BLOCK_ADDR_DAC_UPS_24M 0x19
224#define APB_BLOCK_ADDR_VFORMAT_DP 0x1a
225#define APB_BLOCK_ADDR_VD_PKING_DAC 0x1b
226#define APB_BLOCK_ADDR_MONO_PROC 0x1c
227#define APB_BLOCK_ADDR_TOP 0x1d
228
229#define SLAVE_BLOCKS_NUMBER 0x1d /*indeed totals 0x1e, adding top*/
230
231/*Broadcast_Standard*/
232/* 0: NTSC*/
233/* 1: NTSC-J*/
234/* 2: PAL-M,*/
235/* 3: PAL-BG*/
236/* 4: DTV*/
237/* 5: SECAM- DK2*/
238/* 6: SECAM -DK3*/
239/* 7: PAL-BG, NICAM*/
240/* 8: PAL-DK-CHINA*/
241/* 9: SECAM-L / SECAM-DK3*/
242/* 10: PAL-I*/
243/* 11: PAL-DK1*/
244#define AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC 0
245#define AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_J 1
246#define AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_M 2
247#define AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG 3
248#define AML_ATV_DEMOD_VIDEO_MODE_PROP_DTV 4
249#define AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_DK2 5
250#define AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_DK3 6
251#define AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_BG_NICAM 7
252#define AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK 8
253#define AML_ATV_DEMOD_VIDEO_MODE_PROP_SECAM_L 9
254#define AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_I 10
255#define AML_ATV_DEMOD_VIDEO_MODE_PROP_PAL_DK1 11
256/* new add @20150813 begin */
257#define AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_DK 12
258#define AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_BG 13
259#define AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_I 14
260#define AML_ATV_DEMOD_VIDEO_MODE_PROP_NTSC_M 15
261/* new add @20150813 end */
262
263/*GDE_Curve*/
264/* 0: CURVE-M*/
265/* 1: CURVE-A*/
266/* 2: CURVE-B*/
267/* 3: CURVE-CHINA*/
268/* 4: BYPASS*/
269#define AML_ATV_DEMOD_VIDEO_MODE_PROP_CURVE_M 0
270#define AML_ATV_DEMOD_VIDEO_MODE_PROP_CURVE_A 1
271#define AML_ATV_DEMOD_VIDEO_MODE_PROP_CURVE_B 2
272#define AML_ATV_DEMOD_VIDEO_MODE_PROP_CURVE_CHINA 3
273#define AML_ATV_DEMOD_VIDEO_MODE_PROP_CURVE_BYPASS 4
274
275/*sound format 0: MONO;1:NICAM*/
276#define AML_ATV_DEMOD_SOUND_MODE_PROP_MONO 0
277#define AML_ATV_DEMOD_SOUND_MODE_PROP_NICAM 1
278/**
279 *freq_hz:hs_freq
280 *freq_hz_cvrt=hs_freq/0.23841858
281 *vs_freq==50,freq_hz=15625;freq_hz_cvrt=0xffff
282 *vs_freq==60,freq_hz=15734,freq_hz_cvrt=0x101c9
283 **
284 */
285#define AML_ATV_DEMOD_FREQ_50HZ_VERT 0xffff /*65535*/
286#define AML_ATV_DEMOD_FREQ_60HZ_VERT 0x101c9 /*65993*/
287
288#define CARR_AFC_DEFAULT_VAL 0xffff
289
290enum amlatvdemod_snr_level_e {
291 very_low = 1,
292 low,
293 ok_minus,
294 ok_plus,
295 high,
296};
297
298enum audio_detect_mode {
299 AUDIO_AUTO_DETECT = 0,
300 AUDIO_MANUAL_DETECT,
301};
302
303struct amlatvdemod_device_s {
304 struct class *clsp;
305 struct device *dev;
306 struct analog_parameters parm;
307 int fre_offset;
308 struct pinctrl *pin;
309 const char *pin_name;
310};
311
312extern void aml_audio_overmodulation(int enable);
313extern void amlatvdemod_set_std(int val);
314extern struct amlatvdemod_device_s *amlatvdemod_devp;
315extern void aml_fix_PWM_adjust(int enable);
316extern void aml_audio_valume_gain_set(unsigned int audio_gain);
317extern unsigned int aml_audio_valume_gain_get(void);
318extern void aml_atvdemod_overmodule_det(void);
319extern int aml_audiomode_autodet(struct dvb_frontend *fe);
320extern void retrieve_frequency_offset(int *freq_offset);
321extern int aml_atvdemod_get_snr_ex(void);
322
323#endif /* __ATVDEMOD_FUN_H */
324
generated by cgit at 2024-05-19 21:22:37 (GMT)