| author | Cheng Tong <cheng.tong@amlogic.com> | 2018-04-03 08:15:59 (GMT) |
|---|---|---|
| committer | Xindong Xu <xindong.xu@amlogic.com> | 2018-05-02 02:09:56 (GMT) |
| commit | 29b92fb3e7d4f508d0467f3c8889321bb1218414 (patch) | |
| tree | 9a577001336cf61cd306084ac1e75433e28aa2d5 | |
| parent | 3fe8e6d944e7271ac13b56b725c654325ff38d64 (diff) | |
| download | common-29b92fb3e7d4f508d0467f3c8889321bb1218414.zip common-29b92fb3e7d4f508d0467f3c8889321bb1218414.tar.gz common-29b92fb3e7d4f508d0467f3c8889321bb1218414.tar.bz2 | |
dts: p230 add dvb module
PD#163384: dts: p230 add dvb module
Change-Id: I0345718b0469218cb88a1f65aabdfe26a81f898f
Signed-off-by: Cheng Tong <cheng.tong@amlogic.com>
| -rw-r--r-- | arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts | 88 |
1 files changed, 47 insertions, 41 deletions
diff --git a/arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts b/arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts index b2c7933..0662a1d 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts @@ -1219,47 +1219,47 @@ key-permit = "read","write","del"; }; };//End unifykey -// dvb { -// compatible = "amlogic, dvb"; -// dev_name = "dvb"; -// ts0 = "parallel"; -// ts0_control = <0>; -// ts0_invert = <0>; -// interrupts = <0 23 1 -// 0 5 1 -// 0 53 1 -// 0 19 1 -// 0 25 1 -// 0 18 1 -// 0 24 1>; -// interrupt-names = "demux0_irq", -// "demux1_irq", -// "demux2_irq", -// "dvr0_irq", -// "dvr1_irq", -// "dvrfill0_fill", -// "dvrfill1_flush"; -// pinctrl-names = "p_ts0", "s_ts0"; -// pinctrl-0 = <&dvb_p_ts0_pins>; -// pinctrl-1 = <&dvb_s_ts0_pins>; -// clocks = <&clkc CLKID_DEMUX -// &clkc CLKID_ASYNC_FIFO -// &clkc CLKID_AHB_ARB0 -// &clkc CLKID_HIU_IFACE>; -// clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop"; -// }; -// dvbfe { -// compatible = "amlogic, dvbfe"; -// dev_name = "dvbfe"; -// dtv_demod0 = "Avl6211"; -// dtv_demod0_i2c_adap_id = <2>; -// dtv_demod0_i2c_addr = <0xc6>; -// dtv_demod0_reset_value = <0>; -// dtv_demod0_reset_gpio = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH>; -// fe0_dtv_demod = <0>; -// fe0_ts = <0>; -// fe0_dev = <0>; -// }; + dvb { + compatible = "amlogic, dvb"; + dev_name = "dvb"; + ts0 = "parallel"; + ts0_control = <0>; + ts0_invert = <0>; + interrupts = <0 23 1 + 0 5 1 + 0 21 1 + 0 19 1 + 0 25 1 + 0 18 1 + 0 24 1>; + interrupt-names = "demux0_irq", + "demux1_irq", + "demux2_irq", + "dvr0_irq", + "dvr1_irq", + "dvrfill0_fill", + "dvrfill1_flush"; + pinctrl-names = "p_ts0", "s_ts0"; + pinctrl-0 = <&dvb_p_ts0_pins>; + pinctrl-1 = <&dvb_s_ts0_pins>; + clocks = <&clkc CLKID_DEMUX + &clkc CLKID_ASYNC_FIFO + &clkc CLKID_AHB_ARB0 + &clkc CLKID_HIU_IFACE>; + clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop"; + }; + dvbfe { + compatible = "amlogic, dvbfe"; + dev_name = "dvbfe"; + dtv_demod0 = "Atbm8881"; + dtv_demod0_i2c_adap = <&i2c1>; + dtv_demod0_i2c_addr = <0xc0>; + dtv_demod0_reset_value = <0>; + dtv_demod0_reset_gpio = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH>; + fe0_dtv_demod = <0>; + fe0_ts = <0>; + fe0_dev = <0>; + }; }; &efuse { status = "ok"; @@ -1284,6 +1284,12 @@ // pinctrl-0=<&c_i2c_master_pin1>; //}; +&i2c1 { + status = "okay"; + clock-frequency = <300000>; + pinctrl-names="default"; + pinctrl-0=<&b_i2c_master>; +}; &pinctrl_periphs { hdmirx_ext_pins: hdmirx_ext_pins { mux { |