| author | Shuide Chen <shuide.chen@amlogic.com> | 2018-11-13 06:50:02 (GMT) |
|---|---|---|
| committer | Gerrit Code Review <gituser@droid04> | 2018-11-13 06:50:02 (GMT) |
| commit | 5af4c47875a6eb38e73f2daa1363955aa242d311 (patch) | |
| tree | ed553a627b4da0f726ac9a612462d02ac8dc21d2 | |
| parent | ec3e6a15094fb513d117c8d029618178896b053b (diff) | |
| parent | b3381238429e5b93c6ddf58807f49b8fee6bdd9d (diff) | |
| download | common-5af4c47875a6eb38e73f2daa1363955aa242d311.zip common-5af4c47875a6eb38e73f2daa1363955aa242d311.tar.gz common-5af4c47875a6eb38e73f2daa1363955aa242d311.tar.bz2 | |
Merge "amvecm: fix sr debanding issue" into p-amlogic
| -rw-r--r-- | drivers/amlogic/media/enhancement/amvecm/amvecm.c | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/drivers/amlogic/media/enhancement/amvecm/amvecm.c b/drivers/amlogic/media/enhancement/amvecm/amvecm.c index ffab8d0..514a9fe 100644 --- a/drivers/amlogic/media/enhancement/amvecm/amvecm.c +++ b/drivers/amlogic/media/enhancement/amvecm/amvecm.c @@ -72,7 +72,7 @@ #define AMVECM_MODULE_NAME "amvecm" #define AMVECM_DEVICE_NAME "amvecm" #define AMVECM_CLASS_NAME "amvecm" -#define AMVECM_VER "Ref.2018/07/03" +#define AMVECM_VER "Ref.2018/11/07" struct amvecm_dev_s { @@ -3138,6 +3138,17 @@ void pc_mode_process(void) VSYNC_WR_MPEG_REG_BITS(SRSHARP1_SR3_DERING_CTRL, 1, 28, 3); } + if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXLX)) { + VSYNC_WR_MPEG_REG_BITS(SRSHARP0_DB_FLT_CTRL, 0, 4, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP0_DB_FLT_CTRL, 0, 5, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP0_DB_FLT_CTRL, 0, 22, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP0_DB_FLT_CTRL, 0, 23, 1); + + VSYNC_WR_MPEG_REG_BITS(SRSHARP1_DB_FLT_CTRL, 0, 4, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP1_DB_FLT_CTRL, 0, 5, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP1_DB_FLT_CTRL, 0, 22, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP1_DB_FLT_CTRL, 0, 23, 1); + } VSYNC_WR_MPEG_REG(VPP_VADJ_CTRL, 0xd); pc_mode_last = pc_mode; } else if ((pc_mode == 0) && (pc_mode != pc_mode_last)) { @@ -3186,6 +3197,17 @@ void pc_mode_process(void) VSYNC_WR_MPEG_REG_BITS(SRSHARP1_SR3_DERING_CTRL, 0, 28, 3); } + if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXLX)) { + VSYNC_WR_MPEG_REG_BITS(SRSHARP0_DB_FLT_CTRL, 0, 4, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP0_DB_FLT_CTRL, 0, 5, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP0_DB_FLT_CTRL, 0, 22, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP0_DB_FLT_CTRL, 0, 23, 1); + + VSYNC_WR_MPEG_REG_BITS(SRSHARP1_DB_FLT_CTRL, 0, 4, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP1_DB_FLT_CTRL, 0, 5, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP1_DB_FLT_CTRL, 0, 22, 1); + VSYNC_WR_MPEG_REG_BITS(SRSHARP1_DB_FLT_CTRL, 0, 23, 1); + } VSYNC_WR_MPEG_REG(VPP_VADJ_CTRL, 0x0); pc_mode_last = pc_mode; } |