| author | Shuai Li <shuai.li@amlogic.com> | 2019-04-03 12:30:47 (GMT) |
|---|---|---|
| committer | Tao Zeng <tao.zeng@amlogic.com> | 2019-05-08 05:24:19 (GMT) |
| commit | 953435dc6b885096fd6d13386024d3aa41adb3e7 (patch) | |
| tree | e7a213e0723d2ff9032d165a43ece097ede5b430 | |
| parent | f24b329024174d3cc2645e15340916789769866c (diff) | |
| download | common-953435dc6b885096fd6d13386024d3aa41adb3e7.zip common-953435dc6b885096fd6d13386024d3aa41adb3e7.tar.gz common-953435dc6b885096fd6d13386024d3aa41adb3e7.tar.bz2 | |
audio: fix TDMOUT channel map error [1/1]
PD#SWPL-6427
Problem:
ALSA tdmout buffer frequently underrun.
This will cause the tdmout channel map error.
And the other channels data go into the spk.
Solution:
1)Adjust the sequence of starting and stopping.
2)reserved frddrA for EQ/DRC module
Verify:
Test more that 1 hour and pass.
Need more stress test.
Change-Id: Ib9b6897f0b6c32652c611a8c2c367aa76b9f1e3f
Signed-off-by: Shuai Li <shuai.li@amlogic.com>
Signed-off-by: Zhe Wang <Zhe.Wang@amlogic.com>
24 files changed, 1181 insertions, 188 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index c024b0d..ad3dd1f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13804,6 +13804,7 @@ F: arch/arm/boot/dts/amlogic> ANLOGIC AUDIO DRIVER M: Xing Wang <xing.wang@amlogic.com> M: Zhe Wang <Zhe.Wang@amlogic.com> +M: Shuai Li <shuai.li@amlogic.com> F: arch/arm64/boot/dts/amlogic/* F: arch/arm/boot/dts/amlogic/* F: arch/arm64/configs/meson64_defconfig diff --git a/sound/soc/amlogic/auge/audio_aed_reg_list.h b/sound/soc/amlogic/auge/audio_aed_reg_list.h new file mode 100644 index 0000000..3f27902 --- a/dev/null +++ b/sound/soc/amlogic/auge/audio_aed_reg_list.h @@ -0,0 +1,159 @@ +/* + * sound/soc/amlogic/auge/audio_aed_reg_list.h + * + * Copyright (C) 2017 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#ifndef __AML_AUDIO_AED_REG_H_ +#define __AML_AUDIO_AED_REG_H_ + +#include "regs.h" + +static const struct register_table aed_register_table[] = { +{"AED_COEF_RAM_CNTL ", 0x00}, +{"AED_COEF_RAM_DATA ", 0x01}, +{"AED_EQ_EN ", 0x02}, +{"AED_EQ_TAP_CNTL ", 0x03}, +{"AED_EQ_VOLUME ", 0x04}, +{"AED_EQ_VOLUME_SLEW_CNT ", 0x05}, +{"AED_MUTE ", 0x06}, +{"AED_DRC_CNTL ", 0x07}, +{"AED_DRC_RMS_COEF0 ", 0x08}, +{"AED_DRC_RMS_COEF1 ", 0x09}, +{"AED_DRC_THD0 ", 0x0a}, +{"AED_DRC_THD1 ", 0x0b}, +{"AED_DRC_THD2 ", 0x0c}, +{"AED_DRC_THD3 ", 0x0d}, +{"AED_DRC_THD4 ", 0x0e}, +{"AED_DRC_K0 ", 0x0f}, +{"AED_DRC_K1 ", 0x10}, +{"AED_DRC_K2 ", 0x11}, +{"AED_DRC_K3 ", 0x12}, +{"AED_DRC_K4 ", 0x13}, +{"AED_DRC_K5 ", 0x14}, +{"AED_DRC_THD_OUT0 ", 0x15}, +{"AED_DRC_THD_OUT1 ", 0x16}, +{"AED_DRC_THD_OUT2 ", 0x17}, +{"AED_DRC_THD_OUT3 ", 0x18}, +{"AED_DRC_OFFSET ", 0x19}, +{"AED_DRC_RELEASE_COEF00 ", 0x1a}, +{"AED_DRC_RELEASE_COEF01 ", 0x1b}, +{"AED_DRC_RELEASE_COEF10 ", 0x1c}, +{"AED_DRC_RELEASE_COEF11 ", 0x1d}, +{"AED_DRC_RELEASE_COEF20 ", 0x1e}, +{"AED_DRC_RELEASE_COEF21 ", 0x1f}, +{"AED_DRC_RELEASE_COEF30 ", 0x20}, +{"AED_DRC_RELEASE_COEF31 ", 0x21}, +{"AED_DRC_RELEASE_COEF40 ", 0x22}, +{"AED_DRC_RELEASE_COEF41 ", 0x23}, +{"AED_DRC_RELEASE_COEF50 ", 0x24}, +{"AED_DRC_RELEASE_COEF51 ", 0x25}, +{"AED_DRC_ATTACK_COEF00 ", 0x26}, +{"AED_DRC_ATTACK_COEF01 ", 0x27}, +{"AED_DRC_ATTACK_COEF10 ", 0x28}, +{"AED_DRC_ATTACK_COEF11 ", 0x29}, +{"AED_DRC_ATTACK_COEF20 ", 0x2a}, +{"AED_DRC_ATTACK_COEF21 ", 0x2b}, +{"AED_DRC_ATTACK_COEF30 ", 0x2c}, +{"AED_DRC_ATTACK_COEF31 ", 0x2d}, +{"AED_DRC_ATTACK_COEF40 ", 0x2e}, +{"AED_DRC_ATTACK_COEF41 ", 0x2f}, +{"AED_DRC_ATTACK_COEF50 ", 0x30}, +{"AED_DRC_ATTACK_COEF51 ", 0x31}, +{"AED_DRC_LOOPBACK_CNTL ", 0x32}, +{"AED_MDRC_CNTL ", 0x33}, +{"AED_MDRC_RMS_COEF00 ", 0x34}, +{"AED_MDRC_RMS_COEF01 ", 0x35}, +{"AED_MDRC_RELEASE_COEF00 ", 0x36}, +{"AED_MDRC_RELEASE_COEF01 ", 0x37}, +{"AED_MDRC_ATTACK_COEF00 ", 0x38}, +{"AED_MDRC_ATTACK_COEF01 ", 0x39}, +{"AED_MDRC_THD0 ", 0x3a}, +{"AED_MDRC_K0 ", 0x3b}, +{"AED_MDRC_LOW_GAIN ", 0x3c}, +{"AED_MDRC_OFFSET0 ", 0x3d}, +{"AED_MDRC_RMS_COEF10 ", 0x3e}, +{"AED_MDRC_RMS_COEF11 ", 0x3f}, +{"AED_MDRC_RELEASE_COEF10 ", 0x40}, +{"AED_MDRC_RELEASE_COEF11 ", 0x41}, +{"AED_MDRC_ATTACK_COEF10 ", 0x42}, +{"AED_MDRC_ATTACK_COEF11 ", 0x43}, +{"AED_MDRC_THD1 ", 0x44}, +{"AED_MDRC_K1 ", 0x45}, +{"AED_MDRC_OFFSET1 ", 0x46}, +{"AED_MDRC_MID_GAIN ", 0x47}, +{"AED_MDRC_RMS_COEF20 ", 0x48}, +{"AED_MDRC_RMS_COEF21 ", 0x49}, +{"AED_MDRC_RELEASE_COEF20 ", 0x4a}, +{"AED_MDRC_RELEASE_COEF21 ", 0x4b}, +{"AED_MDRC_ATTACK_COEF20 ", 0x4c}, +{"AED_MDRC_ATTACK_COEF21 ", 0x4d}, +{"AED_MDRC_THD2 ", 0x4e}, +{"AED_MDRC_K2 ", 0x4f}, +{"AED_MDRC_OFFSET2 ", 0x50}, +{"AED_MDRC_HIGH_GAIN ", 0x51}, +{"AED_ED_CNTL ", 0x52}, +{"AED_DC_EN ", 0x53}, +{"AED_ND_LOW_THD ", 0x54}, +{"AED_ND_HIGH_THD ", 0x55}, +{"AED_ND_CNT_THD ", 0x56}, +{"AED_ND_SUM_NUM ", 0x57}, +{"AED_ND_CZ_NUM ", 0x58}, +{"AED_ND_SUM_THD0 ", 0x59}, +{"AED_ND_SUM_THD1 ", 0x5a}, +{"AED_ND_CZ_THD0 ", 0x5b}, +{"AED_ND_CZ_THD1 ", 0x5c}, +{"AED_ND_COND_CNTL ", 0x5d}, +{"AED_ND_RELEASE_COEF0 ", 0x5e}, +{"AED_ND_RELEASE_COEF1 ", 0x5f}, +{"AED_ND_ATTACK_COEF0 ", 0x60}, +{"AED_ND_ATTACK_COEF1 ", 0x61}, +{"AED_ND_CNTL ", 0x62}, +{"AED_MIX0_LL ", 0x63}, +{"AED_MIX0_RL ", 0x64}, +{"AED_MIX0_LR ", 0x65}, +{"AED_MIX0_RR ", 0x66}, +{"AED_CLIP_THD ", 0x67}, +{"AED_CH1_ND_SUM_OUT ", 0x68}, +{"AED_CH2_ND_SUM_OUT ", 0x69}, +{"AED_CH1_ND_CZ_OUT ", 0x6a}, +{"AED_CH2_ND_CZ_OUT ", 0x6b}, +{"AED_NOISE_STATUS ", 0x6c}, +{"AED_POW_CURRENT_S0 ", 0x6d}, +{"AED_POW_CURRENT_S1 ", 0x6e}, +{"AED_POW_CURRENT_S2 ", 0x6f}, +{"AED_POW_OUT0 ", 0x70}, +{"AED_POW_OUT1 ", 0x71}, +{"AED_POW_OUT2 ", 0x72}, +{"AED_POW_ADJ_INDEX0 ", 0x73}, +{"AED_POW_ADJ_INDEX1 ", 0x74}, +{"AED_POW_ADJ_INDEX2 ", 0x75}, +{"AED_DRC_GAIN_INDEX0 ", 0x76}, +{"AED_DRC_GAIN_INDEX1 ", 0x77}, +{"AED_DRC_GAIN_INDEX2 ", 0x78}, +{"AED_CH1_VOLUME_STATE ", 0x79}, +{"AED_CH2_VOLUME_STATE ", 0x7a}, +{"AED_CH1_VOLUME_GAIN ", 0x7b}, +{"AED_CH2_VOLUME_GAIN ", 0x7c}, +{"AED_FULL_POW_CURRENT ", 0x7d}, +{"AED_FULL_POW_OUT ", 0x7e}, +{"AED_FULL_POW_ADJ ", 0x7f}, +{"AED_FULL_DRC_GAIN ", 0x80}, +{"AED_MASTER_VOLUME_STATE ", 0x81}, +{"AED_MASTER_VOLUME_GAIN ", 0x82}, +{"AED_TOP_CTL ", 0x83}, +{"AED_TOP_REQ_CTL ", 0x84}, +}; + +#endif diff --git a/sound/soc/amlogic/auge/audio_controller.c b/sound/soc/amlogic/auge/audio_controller.c index 04845c5..9a175aa 100644 --- a/sound/soc/amlogic/auge/audio_controller.c +++ b/sound/soc/amlogic/auge/audio_controller.c @@ -15,6 +15,9 @@ * */ + +/*#define DEBUG*/ + #include <linux/device.h> #include <linux/module.h> #include <linux/moduleparam.h> @@ -28,6 +31,8 @@ #include "audio_io.h" #include "regs.h" +#include "audio_aed_reg_list.h" +#include "audio_top_reg_list.h" #define DRV_NAME "aml-audio-controller" @@ -46,7 +51,10 @@ static int aml_audio_mmio_write(struct aml_audio_controller *actrlr, unsigned int reg, unsigned int value) { struct regmap *regmap = actrlr->regmap; - + pr_debug("audio top reg:[%s] addr: [%#x] val: [%#x]\n", + top_register_table[reg].name, + top_register_table[reg].addr, + value); return regmap_write(regmap, (reg << 2), value); } @@ -54,7 +62,10 @@ static int aml_audio_mmio_update_bits(struct aml_audio_controller *actrlr, unsigned int reg, unsigned int mask, unsigned int value) { struct regmap *regmap = actrlr->regmap; - + pr_debug("audio top reg:[%s] addr: [%#x] mask: [%#x] val: [%#x]\n", + top_register_table[reg].name, + top_register_table[reg].addr, + mask, value); return regmap_update_bits(regmap, (reg << 2), mask, value); } diff --git a/sound/soc/amlogic/auge/audio_top_reg_list.h b/sound/soc/amlogic/auge/audio_top_reg_list.h new file mode 100644 index 0000000..916f747 --- a/dev/null +++ b/sound/soc/amlogic/auge/audio_top_reg_list.h @@ -0,0 +1,599 @@ +/* + * sound/soc/amlogic/auge/audio_top_reg_list.h + * + * Copyright (C) 2017 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#ifndef __AML_AUDIO_TOP_REG_H_ +#define __AML_AUDIO_TOP_REG_H_ + +#include "regs.h" + +static const struct register_table top_register_table[] = { +{"AUDIO_CLK_GATE_EN0 ", 0x00}, +{"AUDIO_CLK_GATE_EN1 ", 0x01}, +{"AUDIO_MCLK_A_CTRL ", 0x02}, +{"AUDIO_MCLK_B_CTRL ", 0x03}, +{"AUDIO_MCLK_C_CTRL ", 0x04}, +{"AUDIO_MCLK_D_CTRL ", 0x05}, +{"AUDIO_MCLK_E_CTRL ", 0x06}, +{"AUDIO_MCLK_F_CTRL ", 0x07}, +{"AUDIO_PAD_CTRL0 ", 0x08}, +{"AUDIO_PAD_CTRL1 ", 0x09}, +{"AUDIO_SW_RESET0 ", 0x0a}, +{"AUDIO_SW_RESET1 ", 0x0b}, +{"AUDIO_CLK81_CTRL ", 0x0c}, +{"AUDIO_CLK81_EN ", 0x0d}, +{"AUDIO_RESV_ADDR_0xe ", 0x0e}, +{"AUDIO_RESV_ADDR_0xf ", 0x0f}, +{"AUDIO_MST_A_SCLK_CTRL0 ", 0x10}, +{"AUDIO_MST_A_SCLK_CTRL1 ", 0x11}, +{"AUDIO_MST_B_SCLK_CTRL0 ", 0x12}, +{"AUDIO_MST_B_SCLK_CTRL1 ", 0x13}, +{"AUDIO_MST_C_SCLK_CTRL0 ", 0x14}, +{"AUDIO_MST_C_SCLK_CTRL1 ", 0x15}, +{"AUDIO_MST_D_SCLK_CTRL0 ", 0x16}, +{"AUDIO_MST_D_SCLK_CTRL1 ", 0x17}, +{"AUDIO_MST_E_SCLK_CTRL0 ", 0x18}, +{"AUDIO_MST_E_SCLK_CTRL1 ", 0x19}, +{"AUDIO_MST_F_SCLK_CTRL0 ", 0x1a}, +{"AUDIO_MST_F_SCLK_CTRL1 ", 0x1b}, +{"AUDIO_RESV_ADDR_0x1c ", 0x1c}, +{"AUDIO_RESV_ADDR_0x1d ", 0x1d}, +{"AUDIO_RESV_ADDR_0x1e ", 0x1e}, +{"AUDIO_RESV_ADDR_0x1f ", 0x1f}, +{"AUDIO_CLK_TDMIN_A_CTRL ", 0x20}, +{"AUDIO_CLK_TDMIN_B_CTRL ", 0x21}, +{"AUDIO_CLK_TDMIN_C_CTRL ", 0x22}, +{"AUDIO_CLK_TDMIN_LB_CTRL ", 0x23}, +{"AUDIO_CLK_TDMOUT_A_CTRL ", 0x24}, +{"AUDIO_CLK_TDMOUT_B_CTRL ", 0x25}, +{"AUDIO_CLK_TDMOUT_C_CTRL ", 0x26}, +{"AUDIO_CLK_SPDIFIN_CTRL ", 0x27}, +{"AUDIO_CLK_SPDIFOUT_CTRL ", 0x28}, +{"AUDIO_CLK_RESAMPLEA_CTRL ", 0x29}, +{"AUDIO_CLK_LOCKER_CTRL ", 0x2a}, +{"AUDIO_CLK_PDMIN_CTRL0 ", 0x2b}, +{"AUDIO_CLK_PDMIN_CTRL1 ", 0x2c}, +{"AUDIO_CLK_SPDIFOUT_B_CTRL ", 0x2d}, +{"AUDIO_CLK_RESAMPLEB_CTRL ", 0x2e}, +{"AUDIO_CLK_SPDIFIN_LB_CTRL ", 0x2f}, +{"AUDIO_CLK_EQDRC_CTRL0 ", 0x30}, +{"AUDIO_VAD_CLK_CTRL ", 0x31}, +{"AUDIO_RESV_ADDR_0x32 ", 0x32}, +{"AUDIO_RESV_ADDR_0x33 ", 0x33}, +{"AUDIO_RESV_ADDR_0x34 ", 0x34}, +{"AUDIO_RESV_ADDR_0x35 ", 0x35}, +{"AUDIO_RESV_ADDR_0x36 ", 0x36}, +{"AUDIO_RESV_ADDR_0x37 ", 0x37}, +{"AUDIO_RESV_ADDR_0x38 ", 0x38}, +{"AUDIO_RESV_ADDR_0x39 ", 0x39}, +{"AUDIO_RESV_ADDR_0x3a ", 0x3a}, +{"AUDIO_RESV_ADDR_0x3b ", 0x3b}, +{"AUDIO_RESV_ADDR_0x3c ", 0x3c}, +{"AUDIO_RESV_ADDR_0x3d ", 0x3d}, +{"AUDIO_RESV_ADDR_0x3e ", 0x3e}, +{"AUDIO_RESV_ADDR_0x3f ", 0x3f}, +{"AUDIO_TODDR_A_CTRL0 ", 0x40}, +{"AUDIO_TODDR_A_CTRL1 ", 0x41}, +{"AUDIO_TODDR_A_START_ADDR ", 0x42}, +{"AUDIO_TODDR_A_FINISH_ADDR ", 0x43}, +{"AUDIO_TODDR_A_INT_ADDR ", 0x44}, +{"AUDIO_TODDR_A_STATUS1 ", 0x45}, +{"AUDIO_TODDR_A_STATUS2 ", 0x46}, +{"AUDIO_TODDR_A_START_ADDRB ", 0x47}, +{"AUDIO_TODDR_A_FINISH_ADDRB", 0x48}, +{"AUDIO_TODDR_A_INIT_ADDR ", 0x49}, +{"AUDIO_TODDR_A_CTRL2 ", 0x4a}, +{"AUDIO_RESV_ADDR_0x4b ", 0x4b}, +{"AUDIO_RESV_ADDR_0x4c ", 0x4c}, +{"AUDIO_RESV_ADDR_0x4d ", 0x4d}, +{"AUDIO_RESV_ADDR_0x4e ", 0x4e}, +{"AUDIO_RESV_ADDR_0x4f ", 0x4f}, +{"AUDIO_TODDR_B_CTRL0 ", 0x50}, +{"AUDIO_TODDR_B_CTRL1 ", 0x51}, +{"AUDIO_TODDR_B_START_ADDR ", 0x52}, +{"AUDIO_TODDR_B_FINISH_ADDR ", 0x53}, +{"AUDIO_TODDR_B_INT_ADDR ", 0x54}, +{"AUDIO_TODDR_B_STATUS1 ", 0x55}, +{"AUDIO_TODDR_B_STATUS2 ", 0x56}, +{"AUDIO_TODDR_B_START_ADDRB ", 0x57}, +{"AUDIO_TODDR_B_FINISH_ADDRB", 0x58}, +{"AUDIO_TODDR_B_INIT_ADDR ", 0x59}, +{"AUDIO_TODDR_B_CTRL2 ", 0x5a}, +{"AUDIO_RESV_ADDR_0x5b ", 0x5b}, +{"AUDIO_RESV_ADDR_0x5c ", 0x5c}, +{"AUDIO_RESV_ADDR_0x5d ", 0x5d}, +{"AUDIO_RESV_ADDR_0x5e ", 0x5e}, +{"AUDIO_RESV_ADDR_0x5f ", 0x5f}, +{"AUDIO_TODDR_C_CTRL0 ", 0x60}, +{"AUDIO_TODDR_C_CTRL1 ", 0x61}, +{"AUDIO_TODDR_C_START_ADDR ", 0x62}, +{"AUDIO_TODDR_C_FINISH_ADDR ", 0x63}, +{"AUDIO_TODDR_C_INT_ADDR ", 0x64}, +{"AUDIO_TODDR_C_STATUS1 ", 0x65}, +{"AUDIO_TODDR_C_STATUS2 ", 0x66}, +{"AUDIO_TODDR_C_START_ADDRB ", 0x67}, +{"AUDIO_TODDR_C_FINISH_ADDRB", 0x68}, +{"AUDIO_TODDR_C_INIT_ADDR ", 0x69}, +{"AUDIO_TODDR_C_CTRL2 ", 0x6a}, +{"AUDIO_RESV_ADDR_0x6b ", 0x6b}, +{"AUDIO_RESV_ADDR_0x6c ", 0x6c}, +{"AUDIO_RESV_ADDR_0x6d ", 0x6d}, +{"AUDIO_RESV_ADDR_0x6e ", 0x6e}, +{"AUDIO_RESV_ADDR_0x6f ", 0x6f}, +{"AUDIO_FRDDR_A_CTRL0 ", 0x70}, +{"AUDIO_FRDDR_A_CTRL1 ", 0x71}, +{"AUDIO_FRDDR_A_START_ADDR ", 0x72}, +{"AUDIO_FRDDR_A_FINISH_ADDR ", 0x73}, +{"AUDIO_FRDDR_A_INT_ADDR ", 0x74}, +{"AUDIO_FRDDR_A_STATUS1 ", 0x75}, +{"AUDIO_FRDDR_A_STATUS2 ", 0x76}, +{"AUDIO_FRDDR_A_START_ADDRB ", 0x77}, +{"AUDIO_FRDDR_A_FINISH_ADDRB", 0x78}, +{"AUDIO_FRDDR_A_INIT_ADDR ", 0x79}, +{"AUDIO_FRDDR_A_CTRL2 ", 0x7a}, +{"AUDIO_RESV_ADDR_0x7b ", 0x7b}, +{"AUDIO_RESV_ADDR_0x7c ", 0x7c}, +{"AUDIO_RESV_ADDR_0x7d ", 0x7d}, +{"AUDIO_RESV_ADDR_0x7e ", 0x7e}, +{"AUDIO_RESV_ADDR_0x7f ", 0x7f}, +{"AUDIO_FRDDR_B_CTRL0 ", 0x80}, +{"AUDIO_FRDDR_B_CTRL1 ", 0x81}, +{"AUDIO_FRDDR_B_START_ADDR ", 0x82}, +{"AUDIO_FRDDR_B_FINISH_ADDR ", 0x83}, +{"AUDIO_FRDDR_B_INT_ADDR ", 0x84}, +{"AUDIO_FRDDR_B_STATUS1 ", 0x85}, +{"AUDIO_FRDDR_B_STATUS2 ", 0x86}, +{"AUDIO_FRDDR_B_START_ADDRB ", 0x87}, +{"AUDIO_FRDDR_B_FINISH_ADDRB", 0x88}, +{"AUDIO_FRDDR_B_INIT_ADDR ", 0x89}, +{"AUDIO_FRDDR_B_CTRL2 ", 0x8a}, +{"AUDIO_RESV_ADDR_0x8b ", 0x8b}, +{"AUDIO_RESV_ADDR_0x8c ", 0x8c}, +{"AUDIO_RESV_ADDR_0x8d ", 0x8d}, +{"AUDIO_RESV_ADDR_0x8e ", 0x8e}, +{"AUDIO_RESV_ADDR_0x8f ", 0x8f}, +{"AUDIO_FRDDR_C_CTRL0 ", 0x90}, +{"AUDIO_FRDDR_C_CTRL1 ", 0x91}, +{"AUDIO_FRDDR_C_START_ADDR ", 0x92}, +{"AUDIO_FRDDR_C_FINISH_ADDR ", 0x93}, +{"AUDIO_FRDDR_C_INT_ADDR ", 0x94}, +{"AUDIO_FRDDR_C_STATUS1 ", 0x95}, +{"AUDIO_FRDDR_C_STATUS2 ", 0x96}, +{"AUDIO_FRDDR_C_START_ADDRB ", 0x97}, +{"AUDIO_FRDDR_C_FINISH_ADDRB", 0x98}, +{"AUDIO_FRDDR_C_INIT_ADDR ", 0x99}, +{"AUDIO_FRDDR_C_CTRL2 ", 0x9a}, +{"AUDIO_RESV_ADDR_0x9b ", 0x9b}, +{"AUDIO_RESV_ADDR_0x9c ", 0x9c}, +{"AUDIO_RESV_ADDR_0x9d ", 0x9d}, +{"AUDIO_RESV_ADDR_0x9e ", 0x9e}, +{"AUDIO_RESV_ADDR_0x9f ", 0x9f}, +{"AUDIO_ARB_CTRL ", 0xa0}, +{"AUDIO_RESV_ADDR_0xa1 ", 0xa1}, +{"AUDIO_RESV_ADDR_0xa2 ", 0xa2}, +{"AUDIO_RESV_ADDR_0xa3 ", 0xa3}, +{"AUDIO_RESV_ADDR_0xa4 ", 0xa4}, +{"AUDIO_RESV_ADDR_0xa5 ", 0xa5}, +{"AUDIO_RESV_ADDR_0xa6 ", 0xa6}, +{"AUDIO_RESV_ADDR_0xa7 ", 0xa7}, +{"AUDIO_RESV_ADDR_0xa8 ", 0xa8}, +{"AUDIO_RESV_ADDR_0xa9 ", 0xa9}, +{"AUDIO_RESV_ADDR_0xaa ", 0xaa}, +{"AUDIO_RESV_ADDR_0xab ", 0xab}, +{"AUDIO_RESV_ADDR_0xac ", 0xac}, +{"AUDIO_RESV_ADDR_0xad ", 0xad}, +{"AUDIO_RESV_ADDR_0xae ", 0xae}, +{"AUDIO_RESV_ADDR_0xaf ", 0xaf}, +{"AUDIO_LB_A_CTRL0 ", 0xb0}, +{"AUDIO_LB_A_CTRL1 ", 0xb1}, +{"AUDIO_LB_A_CTRL2 ", 0xb2}, +{"AUDIO_LB_A_CTRL3 ", 0xb3}, +{"AUDIO_LB_A_DAT_CH_ID0 ", 0xb4}, +{"AUDIO_LB_A_DAT_CH_ID1 ", 0xb5}, +{"AUDIO_LB_A_DAT_CH_ID2 ", 0xb6}, +{"AUDIO_LB_A_DAT_CH_ID3 ", 0xb7}, +{"AUDIO_LB_A_LB_CH_ID0 ", 0xb8}, +{"AUDIO_LB_A_LB_CH_ID1 ", 0xb9}, +{"AUDIO_LB_A_LB_CH_ID2 ", 0xba}, +{"AUDIO_LB_A_LB_CH_ID3 ", 0xbb}, +{"AUDIO_LB_A_STS ", 0xbc}, +{"AUDIO_RESV_ADDR_0xbd ", 0xbd}, +{"AUDIO_RESV_ADDR_0xbe ", 0xbe}, +{"AUDIO_RESV_ADDR_0xbf ", 0xbf}, +{"AUDIO_TDMIN_A_CTRL ", 0xc0}, +{"AUDIO_TDMIN_A_SWAP ", 0xc1}, +{"AUDIO_TDMIN_A_MASK0 ", 0xc2}, +{"AUDIO_TDMIN_A_MASK1 ", 0xc3}, +{"AUDIO_TDMIN_A_MASK2 ", 0xc4}, +{"AUDIO_TDMIN_A_MASK3 ", 0xc5}, +{"AUDIO_TDMIN_A_STAT ", 0xc6}, +{"AUDIO_TDMIN_A_MUTE_VAL ", 0xc7}, +{"AUDIO_TDMIN_A_MUTE0 ", 0xc8}, +{"AUDIO_TDMIN_A_MUTE1 ", 0xc9}, +{"AUDIO_TDMIN_A_MUTE2 ", 0xca}, +{"AUDIO_TDMIN_A_MUTE3 ", 0xcb}, +{"AUDIO_RESV_ADDR_0xcc ", 0xcc}, +{"AUDIO_RESV_ADDR_0xcd ", 0xcd}, +{"AUDIO_RESV_ADDR_0xce ", 0xce}, +{"AUDIO_RESV_ADDR_0xcf ", 0xcf}, +{"AUDIO_TDMIN_B_CTRL ", 0xd0}, +{"AUDIO_TDMIN_B_SWAP ", 0xd1}, +{"AUDIO_TDMIN_B_MASK0 ", 0xd2}, +{"AUDIO_TDMIN_B_MASK1 ", 0xd3}, +{"AUDIO_TDMIN_B_MASK2 ", 0xd4}, +{"AUDIO_TDMIN_B_MASK3 ", 0xd5}, +{"AUDIO_TDMIN_B_STAT ", 0xd6}, +{"AUDIO_TDMIN_B_MUTE_VAL ", 0xd7}, +{"AUDIO_TDMIN_B_MUTE0 ", 0xd8}, +{"AUDIO_TDMIN_B_MUTE1 ", 0xd9}, +{"AUDIO_TDMIN_B_MUTE2 ", 0xda}, +{"AUDIO_TDMIN_B_MUTE3 ", 0xdb}, +{"AUDIO_RESV_ADDR_0xdc ", 0xdc}, +{"AUDIO_RESV_ADDR_0xdd ", 0xdd}, +{"AUDIO_RESV_ADDR_0xde ", 0xde}, +{"AUDIO_RESV_ADDR_0xdf ", 0xdf}, +{"AUDIO_TDMIN_C_CTRL ", 0xe0}, +{"AUDIO_TDMIN_C_SWAP ", 0xe1}, +{"AUDIO_TDMIN_C_MASK0 ", 0xe2}, +{"AUDIO_TDMIN_C_MASK1 ", 0xe3}, +{"AUDIO_TDMIN_C_MASK2 ", 0xe4}, +{"AUDIO_TDMIN_C_MASK3 ", 0xe5}, +{"AUDIO_TDMIN_C_STAT ", 0xe6}, +{"AUDIO_TDMIN_C_MUTE_VAL ", 0xe7}, +{"AUDIO_TDMIN_C_MUTE0 ", 0xe8}, +{"AUDIO_TDMIN_C_MUTE1 ", 0xe9}, +{"AUDIO_TDMIN_C_MUTE2 ", 0xea}, +{"AUDIO_TDMIN_C_MUTE3 ", 0xeb}, +{"AUDIO_RESV_ADDR_0xec ", 0xec}, +{"AUDIO_RESV_ADDR_0xed ", 0xed}, +{"AUDIO_RESV_ADDR_0xee ", 0xee}, +{"AUDIO_RESV_ADDR_0xef ", 0xef}, +{"AUDIO_TDMIN_LB_CTRL ", 0xf0}, +{"AUDIO_TDMIN_LB_SWAP ", 0xf1}, +{"AUDIO_TDMIN_LB_MASK0 ", 0xf2}, +{"AUDIO_TDMIN_LB_MASK1 ", 0xf3}, +{"AUDIO_TDMIN_LB_MASK2 ", 0xf4}, +{"AUDIO_TDMIN_LB_MASK3 ", 0xf5}, +{"AUDIO_TDMIN_LB_STAT ", 0xf6}, +{"AUDIO_TDMIN_LB_MUTE_VAL ", 0xf7}, +{"AUDIO_TDMIN_LB_MUTE0 ", 0xf8}, +{"AUDIO_TDMIN_LB_MUTE1 ", 0xf9}, +{"AUDIO_TDMIN_LB_MUTE2 ", 0xfa}, +{"AUDIO_TDMIN_LB_MUTE3 ", 0xfb}, +{"AUDIO_RESV_ADDR_0xfc ", 0xfc}, +{"AUDIO_RESV_ADDR_0xfd ", 0xfd}, +{"AUDIO_RESV_ADDR_0xfe ", 0xfe}, +{"AUDIO_RESV_ADDR_0xff ", 0xff}, +{"AUDIO_SPDIFIN_CTRL0 ", 0x100}, +{"AUDIO_SPDIFIN_CTRL1 ", 0x101}, +{"AUDIO_SPDIFIN_CTRL2 ", 0x102}, +{"AUDIO_SPDIFIN_CTRL3 ", 0x103}, +{"AUDIO_SPDIFIN_CTRL4 ", 0x104}, +{"AUDIO_SPDIFIN_CTRL5 ", 0x105}, +{"AUDIO_SPDIFIN_CTRL6 ", 0x106}, +{"AUDIO_SPDIFIN_STAT0 ", 0x107}, +{"AUDIO_SPDIFIN_STAT1 ", 0x108}, +{"AUDIO_SPDIFIN_STAT2 ", 0x109}, +{"AUDIO_SPDIFIN_MUTE_VAL ", 0x10a}, +{"AUDIO_RESV_ADDR_0x10b ", 0x10b}, +{"AUDIO_RESV_ADDR_0x10c ", 0x10c}, +{"AUDIO_RESV_ADDR_0x10d ", 0x10d}, +{"AUDIO_RESV_ADDR_0x10e ", 0x10e}, +{"AUDIO_RESV_ADDR_0x10f ", 0x10f}, +{"AUDIO_RESAMPLEA_CTRL0 ", 0x110}, +{"AUDIO_RESAMPLEA_CTRL1 ", 0x111}, +{"AUDIO_RESAMPLEA_CTRL2 ", 0x112}, +{"AUDIO_RESAMPLEA_CTRL3 ", 0x113}, +{"AUDIO_RESAMPLEA_COEF0 ", 0x114}, +{"AUDIO_RESAMPLEA_COEF1 ", 0x115}, +{"AUDIO_RESAMPLEA_COEF2 ", 0x116}, +{"AUDIO_RESAMPLEA_COEF3 ", 0x117}, +{"AUDIO_RESAMPLEA_COEF4 ", 0x118}, +{"AUDIO_RESAMPLEA_STATUS1 ", 0x119}, +{"AUDIO_RESV_ADDR_0x11a ", 0x11a}, +{"AUDIO_RESV_ADDR_0x11b ", 0x11b}, +{"AUDIO_RESV_ADDR_0x11c ", 0x11c}, +{"AUDIO_RESV_ADDR_0x11d ", 0x11d}, +{"AUDIO_RESV_ADDR_0x11e ", 0x11e}, +{"AUDIO_RESV_ADDR_0x11f ", 0x11f}, +{"AUDIO_SPDIFOUT_STAT ", 0x120}, +{"AUDIO_SPDIFOUT_GAIN0 ", 0x121}, +{"AUDIO_SPDIFOUT_GAIN1 ", 0x122}, +{"AUDIO_SPDIFOUT_CTRL0 ", 0x123}, +{"AUDIO_SPDIFOUT_CTRL1 ", 0x124}, +{"AUDIO_SPDIFOUT_PREAMB ", 0x125}, +{"AUDIO_SPDIFOUT_SWAP ", 0x126}, +{"AUDIO_SPDIFOUT_CHSTS0 ", 0x127}, +{"AUDIO_SPDIFOUT_CHSTS1 ", 0x128}, +{"AUDIO_SPDIFOUT_CHSTS2 ", 0x129}, +{"AUDIO_SPDIFOUT_CHSTS3 ", 0x12a}, +{"AUDIO_SPDIFOUT_CHSTS4 ", 0x12b}, +{"AUDIO_SPDIFOUT_CHSTS5 ", 0x12c}, +{"AUDIO_SPDIFOUT_CHSTS6 ", 0x12d}, +{"AUDIO_SPDIFOUT_CHSTS7 ", 0x12e}, +{"AUDIO_SPDIFOUT_CHSTS8 ", 0x12f}, +{"AUDIO_SPDIFOUT_CHSTS9 ", 0x130}, +{"AUDIO_SPDIFOUT_CHSTSA ", 0x131}, +{"AUDIO_SPDIFOUT_CHSTSB ", 0x132}, +{"AUDIO_SPDIFOUT_MUTE_VAL ", 0x133}, +{"AUDIO_RESV_ADDR_0x134 ", 0x134}, +{"AUDIO_RESV_ADDR_0x135 ", 0x135}, +{"AUDIO_RESV_ADDR_0x136 ", 0x136}, +{"AUDIO_RESV_ADDR_0x137 ", 0x137}, +{"AUDIO_RESV_ADDR_0x138 ", 0x138}, +{"AUDIO_RESV_ADDR_0x139 ", 0x139}, +{"AUDIO_RESV_ADDR_0x13a ", 0x13a}, +{"AUDIO_RESV_ADDR_0x13b ", 0x13b}, +{"AUDIO_RESV_ADDR_0x13c ", 0x13c}, +{"AUDIO_RESV_ADDR_0x13d ", 0x13d}, +{"AUDIO_RESV_ADDR_0x13e ", 0x13e}, +{"AUDIO_RESV_ADDR_0x13f ", 0x13f}, +{"AUDIO_TDMOUT_A_CTRL0 ", 0x140}, +{"AUDIO_TDMOUT_A_CTRL1 ", 0x141}, +{"AUDIO_TDMOUT_A_SWAP ", 0x142}, +{"AUDIO_TDMOUT_A_MASK0 ", 0x143}, +{"AUDIO_TDMOUT_A_MASK1 ", 0x144}, +{"AUDIO_TDMOUT_A_MASK2 ", 0x145}, +{"AUDIO_TDMOUT_A_MASK3 ", 0x146}, +{"AUDIO_TDMOUT_A_STAT ", 0x147}, +{"AUDIO_TDMOUT_A_GAIN0 ", 0x148}, +{"AUDIO_TDMOUT_A_GAIN1 ", 0x149}, +{"AUDIO_TDMOUT_A_MUTE_VAL ", 0x14a}, +{"AUDIO_TDMOUT_A_MUTE0 ", 0x14b}, +{"AUDIO_TDMOUT_A_MUTE1 ", 0x14c}, +{"AUDIO_TDMOUT_A_MUTE2 ", 0x14d}, +{"AUDIO_TDMOUT_A_MUTE3 ", 0x14e}, +{"AUDIO_TDMOUT_A_MASK_VAL ", 0x14f}, +{"AUDIO_TDMOUT_B_CTRL0 ", 0x150}, +{"AUDIO_TDMOUT_B_CTRL1 ", 0x151}, +{"AUDIO_TDMOUT_B_SWAP ", 0x152}, +{"AUDIO_TDMOUT_B_MASK0 ", 0x153}, +{"AUDIO_TDMOUT_B_MASK1 ", 0x154}, +{"AUDIO_TDMOUT_B_MASK2 ", 0x155}, +{"AUDIO_TDMOUT_B_MASK3 ", 0x156}, +{"AUDIO_TDMOUT_B_STAT ", 0x157}, +{"AUDIO_TDMOUT_B_GAIN0 ", 0x158}, +{"AUDIO_TDMOUT_B_GAIN1 ", 0x159}, +{"AUDIO_TDMOUT_B_MUTE_VAL ", 0x15a}, +{"AUDIO_TDMOUT_B_MUTE0 ", 0x15b}, +{"AUDIO_TDMOUT_B_MUTE1 ", 0x15c}, +{"AUDIO_TDMOUT_B_MUTE2 ", 0x15d}, +{"AUDIO_TDMOUT_B_MUTE3 ", 0x15e}, +{"AUDIO_TDMOUT_B_MASK_VAL ", 0x15f}, +{"AUDIO_TDMOUT_C_CTRL0 ", 0x160}, +{"AUDIO_TDMOUT_C_CTRL1 ", 0x161}, +{"AUDIO_TDMOUT_C_SWAP ", 0x162}, +{"AUDIO_TDMOUT_C_MASK0 ", 0x163}, +{"AUDIO_TDMOUT_C_MASK1 ", 0x164}, +{"AUDIO_TDMOUT_C_MASK2 ", 0x165}, +{"AUDIO_TDMOUT_C_MASK3 ", 0x166}, +{"AUDIO_TDMOUT_C_STAT ", 0x167}, +{"AUDIO_TDMOUT_C_GAIN0 ", 0x168}, +{"AUDIO_TDMOUT_C_GAIN1 ", 0x169}, +{"AUDIO_TDMOUT_C_MUTE_VAL ", 0x16a}, +{"AUDIO_TDMOUT_C_MUTE0 ", 0x16b}, +{"AUDIO_TDMOUT_C_MUTE1 ", 0x16c}, +{"AUDIO_TDMOUT_C_MUTE2 ", 0x16d}, +{"AUDIO_TDMOUT_C_MUTE3 ", 0x16e}, +{"AUDIO_TDMOUT_C_MASK_VAL ", 0x16f}, +{"AUDIO_RESV_ADDR_0x170 ", 0x170}, +{"AUDIO_RESV_ADDR_0x171 ", 0x171}, +{"AUDIO_RESV_ADDR_0x172 ", 0x172}, +{"AUDIO_RESV_ADDR_0x173 ", 0x173}, +{"AUDIO_RESV_ADDR_0x174 ", 0x174}, +{"AUDIO_RESV_ADDR_0x175 ", 0x175}, +{"AUDIO_RESV_ADDR_0x176 ", 0x176}, +{"AUDIO_RESV_ADDR_0x177 ", 0x177}, +{"AUDIO_RESV_ADDR_0x178 ", 0x178}, +{"AUDIO_RESV_ADDR_0x179 ", 0x179}, +{"AUDIO_RESV_ADDR_0x17a ", 0x17a}, +{"AUDIO_RESV_ADDR_0x17b ", 0x17b}, +{"AUDIO_RESV_ADDR_0x17c ", 0x17c}, +{"AUDIO_RESV_ADDR_0x17d ", 0x17d}, +{"AUDIO_RESV_ADDR_0x17e ", 0x17e}, +{"AUDIO_RESV_ADDR_0x17f ", 0x17f}, +{"AUDIO_RESV_ADDR_0x180 ", 0x180}, +{"AUDIO_RESV_ADDR_0x181 ", 0x181}, +{"AUDIO_RESV_ADDR_0x182 ", 0x182}, +{"AUDIO_RESV_ADDR_0x183 ", 0x183}, +{"AUDIO_RESV_ADDR_0x184 ", 0x184}, +{"AUDIO_RESV_ADDR_0x185 ", 0x185}, +{"AUDIO_RESV_ADDR_0x186 ", 0x186}, +{"AUDIO_RESV_ADDR_0x187 ", 0x187}, +{"AUDIO_RESV_ADDR_0x188 ", 0x188}, +{"AUDIO_RESV_ADDR_0x189 ", 0x189}, +{"AUDIO_RESV_ADDR_0x18a ", 0x18a}, +{"AUDIO_RESV_ADDR_0x18b ", 0x18b}, +{"AUDIO_RESV_ADDR_0x18c ", 0x18c}, +{"AUDIO_RESV_ADDR_0x18d ", 0x18d}, +{"AUDIO_RESV_ADDR_0x18e ", 0x18e}, +{"AUDIO_RESV_ADDR_0x18f ", 0x18f}, +{"AUDIO_SECURITY_CTRL0 ", 0x190}, +{"AUDIO_SECURITY_CTRL1 ", 0x191}, +{"AUDIO_RESV_ADDR_0x192 ", 0x192}, +{"AUDIO_RESV_ADDR_0x193 ", 0x193}, +{"AUDIO_RESV_ADDR_0x194 ", 0x194}, +{"AUDIO_RESV_ADDR_0x195 ", 0x195}, +{"AUDIO_RESV_ADDR_0x196 ", 0x196}, +{"AUDIO_RESV_ADDR_0x197 ", 0x197}, +{"AUDIO_RESV_ADDR_0x198 ", 0x198}, +{"AUDIO_RESV_ADDR_0x199 ", 0x199}, +{"AUDIO_RESV_ADDR_0x19a ", 0x19a}, +{"AUDIO_RESV_ADDR_0x19b ", 0x19b}, +{"AUDIO_RESV_ADDR_0x19c ", 0x19c}, +{"AUDIO_RESV_ADDR_0x19d ", 0x19d}, +{"AUDIO_RESV_ADDR_0x19e ", 0x19e}, +{"AUDIO_RESV_ADDR_0x19f ", 0x19f}, +{"AUDIO_SPDIFOUT_B_STAT ", 0x1a0}, +{"AUDIO_SPDIFOUT_B_GAIN0 ", 0x1a1}, +{"AUDIO_SPDIFOUT_B_GAIN1 ", 0x1a2}, +{"AUDIO_SPDIFOUT_B_CTRL0 ", 0x1a3}, +{"AUDIO_SPDIFOUT_B_CTRL1 ", 0x1a4}, +{"AUDIO_SPDIFOUT_B_PREAMB ", 0x1a5}, +{"AUDIO_SPDIFOUT_B_SWAP ", 0x1a6}, +{"AUDIO_SPDIFOUT_B_CHSTS0 ", 0x1a7}, +{"AUDIO_SPDIFOUT_B_CHSTS1 ", 0x1a8}, +{"AUDIO_SPDIFOUT_B_CHSTS2 ", 0x1a9}, +{"AUDIO_SPDIFOUT_B_CHSTS3 ", 0x1aa}, +{"AUDIO_SPDIFOUT_B_CHSTS4 ", 0x1ab}, +{"AUDIO_SPDIFOUT_B_CHSTS5 ", 0x1ac}, +{"AUDIO_SPDIFOUT_B_CHSTS6 ", 0x1ad}, +{"AUDIO_SPDIFOUT_B_CHSTS7 ", 0x1ae}, +{"AUDIO_SPDIFOUT_B_CHSTS8 ", 0x1af}, +{"AUDIO_SPDIFOUT_B_CHSTS9 ", 0x1b0}, +{"AUDIO_SPDIFOUT_B_CHSTSA ", 0x1b1}, +{"AUDIO_SPDIFOUT_B_CHSTSB ", 0x1b2}, +{"AUDIO_SPDIFOUT_B_MUTE_VAL ", 0x1b3}, +{"AUDIO_RESV_ADDR_0x1b4 ", 0x1b4}, +{"AUDIO_RESV_ADDR_0x1b5 ", 0x1b5}, +{"AUDIO_RESV_ADDR_0x1b6 ", 0x1b6}, +{"AUDIO_RESV_ADDR_0x1b7 ", 0x1b7}, +{"AUDIO_RESV_ADDR_0x1b8 ", 0x1b8}, +{"AUDIO_RESV_ADDR_0x1b9 ", 0x1b9}, +{"AUDIO_RESV_ADDR_0x1ba ", 0x1ba}, +{"AUDIO_RESV_ADDR_0x1bb ", 0x1bb}, +{"AUDIO_RESV_ADDR_0x1bc ", 0x1bc}, +{"AUDIO_RESV_ADDR_0x1bd ", 0x1bd}, +{"AUDIO_RESV_ADDR_0x1be ", 0x1be}, +{"AUDIO_RESV_ADDR_0x1bf ", 0x1bf}, +{"AUDIO_TORAM_CTRL0 ", 0x1c0}, +{"AUDIO_TORAM_CTRL1 ", 0x1c1}, +{"AUDIO_TORAM_START_ADDR ", 0x1c2}, +{"AUDIO_TORAM_FINISH_ADDR ", 0x1c3}, +{"AUDIO_TORAM_INT_ADDR ", 0x1c4}, +{"AUDIO_TORAM_STATUS1 ", 0x1c5}, +{"AUDIO_TORAM_STATUS2 ", 0x1c6}, +{"AUDIO_TORAM_INIT_ADDR ", 0x1c7}, +{"AUDIO_RESV_ADDR_0x1c8 ", 0x1c8}, +{"AUDIO_RESV_ADDR_0x1c9 ", 0x1c9}, +{"AUDIO_RESV_ADDR_0x1ca ", 0x1ca}, +{"AUDIO_RESV_ADDR_0x1cb ", 0x1cb}, +{"AUDIO_RESV_ADDR_0x1cc ", 0x1cc}, +{"AUDIO_RESV_ADDR_0x1cd ", 0x1cd}, +{"AUDIO_RESV_ADDR_0x1ce ", 0x1ce}, +{"AUDIO_RESV_ADDR_0x1cf ", 0x1cf}, +{"AUDIO_TOACODEC_CTRL0 ", 0x1d0}, +{"AUDIO_TOHDMITX_CTRL0 ", 0x1d1}, +{"AUDIO_TOVAD_CTRL0 ", 0x1d2}, +{"AUDIO_FRATV_CTRL0 ", 0x1d3}, +{"AUDIO_RESV_ADDR_0x1d4 ", 0x1d4}, +{"AUDIO_RESV_ADDR_0x1d5 ", 0x1d5}, +{"AUDIO_RESV_ADDR_0x1d6 ", 0x1d6}, +{"AUDIO_RESV_ADDR_0x1d7 ", 0x1d7}, +{"AUDIO_RESV_ADDR_0x1d8 ", 0x1d8}, +{"AUDIO_RESV_ADDR_0x1d9 ", 0x1d9}, +{"AUDIO_RESV_ADDR_0x1da ", 0x1da}, +{"AUDIO_RESV_ADDR_0x1db ", 0x1db}, +{"AUDIO_RESV_ADDR_0x1dc ", 0x1dc}, +{"AUDIO_RESV_ADDR_0x1dd ", 0x1dd}, +{"AUDIO_RESV_ADDR_0x1de ", 0x1de}, +{"AUDIO_RESV_ADDR_0x1df ", 0x1df}, +{"AUDIO_RESAMPLEB_CTRL0 ", 0x1e0}, +{"AUDIO_RESAMPLEB_CTRL1 ", 0x1e1}, +{"AUDIO_RESAMPLEB_CTRL2 ", 0x1e2}, +{"AUDIO_RESAMPLEB_CTRL3 ", 0x1e3}, +{"AUDIO_RESAMPLEB_COEF0 ", 0x1e4}, +{"AUDIO_RESAMPLEB_COEF1 ", 0x1e5}, +{"AUDIO_RESAMPLEB_COEF2 ", 0x1e6}, +{"AUDIO_RESAMPLEB_COEF3 ", 0x1e7}, +{"AUDIO_RESAMPLEB_COEF4 ", 0x1e8}, +{"AUDIO_RESAMPLEB_STATUS1 ", 0x1e9}, +{"AUDIO_RESV_ADDR_0x1ea ", 0x1ea}, +{"AUDIO_RESV_ADDR_0x1eb ", 0x1eb}, +{"AUDIO_RESV_ADDR_0x1ec ", 0x1ec}, +{"AUDIO_RESV_ADDR_0x1ed ", 0x1ed}, +{"AUDIO_RESV_ADDR_0x1ee ", 0x1ee}, +{"AUDIO_RESV_ADDR_0x1ef ", 0x1ef}, +{"AUDIO_SPDIFIN_LB_CTRL0 ", 0x1f0}, +{"AUDIO_SPDIFIN_LB_CTRL1 ", 0x1f1}, +{"AUDIO_RESV_ADDR_0x1f2 ", 0x1f2}, +{"AUDIO_RESV_ADDR_0x1f3 ", 0x1f3}, +{"AUDIO_RESV_ADDR_0x1f4 ", 0x1f4}, +{"AUDIO_RESV_ADDR_0x1f5 ", 0x1f5}, +{"AUDIO_SPDIFIN_LB_CTRL6 ", 0x1f6}, +{"AUDIO_SPDIFIN_LB_STAT0 ", 0x1f7}, +{"AUDIO_SPDIFIN_LB_STAT1 ", 0x1f8}, +{"AUDIO_RESV_ADDR_0x1f9 ", 0x1f9}, +{"AUDIO_SPDIFIN_LB_MUTE_VAL ", 0x1fa}, +{"AUDIO_RESV_ADDR_0x1fb ", 0x1fb}, +{"AUDIO_RESV_ADDR_0x1fc ", 0x1fc}, +{"AUDIO_RESV_ADDR_0x1fd ", 0x1fd}, +{"AUDIO_RESV_ADDR_0x1fe ", 0x1fe}, +{"AUDIO_RESV_ADDR_0x1ff ", 0x1ff}, +{"AUDIO_FRHDMIRX_CTRL0 ", 0x200}, +{"AUDIO_FRHDMIRX_CTRL1 ", 0x201}, +{"AUDIO_FRHDMIRX_CTRL2 ", 0x202}, +{"AUDIO_FRHDMIRX_CTRL3 ", 0x203}, +{"AUDIO_FRHDMIRX_CTRL4 ", 0x204}, +{"AUDIO_FRHDMIRX_CTRL5 ", 0x205}, +{"AUDIO_RESV_ADDR_0x206 ", 0x206}, +{"AUDIO_RESV_ADDR_0x207 ", 0x207}, +{"AUDIO_RESV_ADDR_0x208 ", 0x208}, +{"AUDIO_RESV_ADDR_0x209 ", 0x209}, +{"AUDIO_FRHDMIRX_STAT0 ", 0x20a}, +{"AUDIO_FRHDMIRX_STAT1 ", 0x20b}, +{"AUDIO_RESV_ADDR_0x20c ", 0x20c}, +{"AUDIO_RESV_ADDR_0x20d ", 0x20d}, +{"AUDIO_RESV_ADDR_0x20e ", 0x20e}, +{"AUDIO_RESV_ADDR_0x20f ", 0x20f}, +{"AUDIO_TODDR_D_CTRL0 ", 0x210}, +{"AUDIO_TODDR_D_CTRL1 ", 0x211}, +{"AUDIO_TODDR_D_START_ADDR ", 0x212}, +{"AUDIO_TODDR_D_FINISH_ADDR ", 0x213}, +{"AUDIO_TODDR_D_INT_ADDR ", 0x214}, +{"AUDIO_TODDR_D_STATUS1 ", 0x215}, +{"AUDIO_TODDR_D_STATUS2 ", 0x216}, +{"AUDIO_TODDR_D_START_ADDRB ", 0x217}, +{"AUDIO_TODDR_D_FINISH_ADDRB", 0x218}, +{"AUDIO_TODDR_D_INIT_ADDR ", 0x219}, +{"AUDIO_TODDR_D_CTRL2 ", 0x21a}, +{"AUDIO_RESV_ADDR_0x21b ", 0x21b}, +{"AUDIO_RESV_ADDR_0x21c ", 0x21c}, +{"AUDIO_RESV_ADDR_0x21d ", 0x21d}, +{"AUDIO_RESV_ADDR_0x21e ", 0x21e}, +{"AUDIO_RESV_ADDR_0x21f ", 0x21f}, +{"AUDIO_FRDDR_D_CTRL0 ", 0x220}, +{"AUDIO_FRDDR_D_CTRL1 ", 0x221}, +{"AUDIO_FRDDR_D_START_ADDR ", 0x222}, +{"AUDIO_FRDDR_D_FINISH_ADDR ", 0x223}, +{"AUDIO_FRDDR_D_INT_ADDR ", 0x224}, +{"AUDIO_FRDDR_D_STATUS1 ", 0x225}, +{"AUDIO_FRDDR_D_STATUS2 ", 0x226}, +{"AUDIO_FRDDR_D_START_ADDRB ", 0x227}, +{"AUDIO_FRDDR_D_FINISH_ADDRB", 0x228}, +{"AUDIO_FRDDR_D_INIT_ADDR ", 0x229}, +{"AUDIO_FRDDR_D_CTRL2 ", 0x22a}, +{"AUDIO_RESV_ADDR_0x22b ", 0x22b}, +{"AUDIO_RESV_ADDR_0x22c ", 0x22c}, +{"AUDIO_RESV_ADDR_0x22d ", 0x22d}, +{"AUDIO_RESV_ADDR_0x22e ", 0x22e}, +{"AUDIO_RESV_ADDR_0x22f ", 0x22f}, +{"AUDIO_LB_B_CTRL0 ", 0x230}, +{"AUDIO_LB_B_CTRL1 ", 0x231}, +{"AUDIO_LB_B_CTRL2 ", 0x232}, +{"AUDIO_LB_B_CTRL3 ", 0x233}, +{"AUDIO_LB_B_DAT_CH_ID0 ", 0x234}, +{"AUDIO_LB_B_DAT_CH_ID1 ", 0x235}, +{"AUDIO_LB_B_DAT_CH_ID2 ", 0x236}, +{"AUDIO_LB_B_DAT_CH_ID3 ", 0x237}, +{"AUDIO_LB_B_LB_CH_ID0 ", 0x238}, +{"AUDIO_LB_B_LB_CH_ID1 ", 0x239}, +{"AUDIO_LB_B_LB_CH_ID2 ", 0x23a}, +{"AUDIO_LB_B_LB_CH_ID3 ", 0x23b}, +{"AUDIO_LB_B_STS ", 0x23c}, +}; + +#endif diff --git a/sound/soc/amlogic/auge/ddr_mngr.c b/sound/soc/amlogic/auge/ddr_mngr.c index 5d20f72..752d1be 100644 --- a/sound/soc/amlogic/auge/ddr_mngr.c +++ b/sound/soc/amlogic/auge/ddr_mngr.c @@ -63,8 +63,6 @@ static void aml_check_vad(struct toddr *to, bool enable); /* Audio EQ DRC */ static struct frddr_attach attach_aed; -static void aml_check_aed(bool enable, int dst); -static bool aml_check_aed_module(int dst); static irqreturn_t aml_ddr_isr(int irq, void *devid) { @@ -870,15 +868,22 @@ static void aml_check_vad(struct toddr *to, bool enable) /* from DDRS */ static struct frddr *register_frddr_l(struct device *dev, struct aml_audio_controller *actrl, - irq_handler_t handler, void *data) + irq_handler_t handler, void *data, bool rvd_dst) { struct frddr *from; unsigned int mask_bit; int i, ret; - /* lookup unused frddr */ for (i = 0; i < DDRMAX; i++) { - if (!frddrs[i].in_use) + /* lookup reserved frddr */ + if (frddrs[i].in_use == false && + frddrs[i].reserved == true && + rvd_dst == true) + break; + /* lookup unused frddr */ + if (frddrs[i].in_use == false && + frddrs[i].reserved == false && + rvd_dst == false) break; } @@ -978,12 +983,12 @@ struct frddr *fetch_frddr_by_src(int frddr_src) struct frddr *aml_audio_register_frddr(struct device *dev, struct aml_audio_controller *actrl, - irq_handler_t handler, void *data) + irq_handler_t handler, void *data, bool rvd_dst) { struct frddr *fr = NULL; mutex_lock(&ddr_mutex); - fr = register_frddr_l(dev, actrl, handler, data); + fr = register_frddr_l(dev, actrl, handler, data, rvd_dst); mutex_unlock(&ddr_mutex); return fr; } @@ -1066,11 +1071,6 @@ static void frddr_set_sharebuffer_enable( sel); break; } - s_m |= 0xff << 24; - if (enable) - s_v |= (fr->channels - 1) << 24; - else - s_v |= 0x0 << 24; } else { reg = calc_frddr_address(EE_AUDIO_FRDDR_A_CTRL0, reg_base); @@ -1202,10 +1202,6 @@ void aml_frddr_enable(struct frddr *fr, bool enable) aml_audiobus_write(actrl, reg, 0x0); } } - - /* check for Audio EQ/DRC */ - if (aml_check_aed_module(fr->dest)) - aml_check_aed(enable, fr->dest); } void aml_frddr_select_dst(struct frddr *fr, enum frddr_dest dst) @@ -1220,6 +1216,9 @@ void aml_frddr_select_dst(struct frddr *fr, enum frddr_dest dst) && fr->chipinfo->src_sel_ctrl) { reg = calc_frddr_address(EE_AUDIO_FRDDR_A_CTRL2, reg_base); src_sel_en = 4; + /*update frddr channel*/ + aml_audiobus_update_bits(actrl, reg, + 0xff << 24, (fr->channels - 1) << 24); } else { reg = calc_frddr_address(EE_AUDIO_FRDDR_A_CTRL0, reg_base); src_sel_en = 3; @@ -1254,9 +1253,10 @@ void aml_frddr_select_dst_ss(struct frddr *fr, /* same source en */ if (fr->chipinfo && fr->chipinfo->same_src_fn - && ss_valid - ) - frddr_set_sharebuffer_enable(fr, dst, sel, enable); + && ss_valid) { + frddr_set_sharebuffer_enable(fr, + dst, sel, enable); + } } void aml_frddr_set_fifos(struct frddr *fr, @@ -1302,12 +1302,18 @@ static void aml_aed_enable(struct frddr_attach *p_attach_aed, bool enable) unsigned int reg; reg = calc_frddr_address(EE_AUDIO_FRDDR_A_CTRL2, reg_base); - aml_audiobus_update_bits(actrl, - reg, 0x1 << 3, enable << 3); - - aed_set_ctrl(enable, 0, p_attach_aed->attach_module); - aed_set_format(fr->msb, fr->type, fr->fifo_id); - aed_enable(enable); + if (enable) { + aml_audiobus_update_bits(actrl, + reg, 0x1 << 3, enable << 3); + aed_set_ctrl(enable, 0, p_attach_aed->attach_module); + aed_set_format(fr->msb, fr->type, fr->fifo_id); + aed_enable(enable); + } else { + aed_enable(enable); + aed_set_ctrl(enable, 0, p_attach_aed->attach_module); + aml_audiobus_update_bits(actrl, + reg, 0x1 << 3, enable << 3); + } } else { if (enable) { /* frddr type and bit depth for AED */ @@ -1317,66 +1323,98 @@ static void aml_aed_enable(struct frddr_attach *p_attach_aed, bool enable) } } -void aml_set_aed(bool enable, int aed_module) +static bool aml_check_aed_module(int dst) { - bool update_running = false; - - /* when try to enable AED, if frddr is not in used, - * set AED status as ready - */ - attach_aed.enable = enable; - attach_aed.attach_module = aed_module; + bool is_module_aed = false; - if (enable) { - if ((attach_aed.status == DISABLED) - || (attach_aed.status == READY)) { - struct frddr *fr = fetch_frddr_by_src(aed_module); + if (attach_aed.enable + && (dst == attach_aed.attach_module)) + is_module_aed = true; - if (!fr) { - attach_aed.status = READY; - } else { - attach_aed.status = RUNNING; - update_running = true; - pr_info("Playback with AED\n"); - } - } - } else { - if (attach_aed.status == RUNNING) - update_running = true; + return is_module_aed; +} - attach_aed.status = DISABLED; - } +void aml_set_aed(bool enable, int aed_module) +{ + attach_aed.enable = enable; + attach_aed.attach_module = aed_module; +} - if (update_running) +void aml_aed_top_enable(struct frddr *fr, bool enable) +{ + if (aml_check_aed_module(fr->dest)) aml_aed_enable(&attach_aed, enable); } -static bool aml_check_aed_module(int dst) +void aml_aed_set_frddr_reserved(void) { - bool is_module_aed = false; + frddrs[DDR_A].reserved = true; +} - if (attach_aed.enable - && (dst == attach_aed.attach_module)) - is_module_aed = true; +void aml_frddr_check(struct frddr *fr) +{ + unsigned int tmp, tmp1, i = 0; + struct aml_audio_controller *actrl = fr->actrl; + unsigned int reg_base = fr->reg_base; + unsigned int reg; - return is_module_aed; + /*max 200us delay*/ + for (i = 0; i < 200; i++) { + reg = calc_frddr_address(EE_AUDIO_FRDDR_A_CTRL1, reg_base); + aml_audiobus_update_bits(actrl, reg, 0xf << 8, 0x0 << 8); + reg = calc_frddr_address(EE_AUDIO_FRDDR_A_STATUS2, reg_base); + tmp = aml_audiobus_read(actrl, reg); + + reg = calc_frddr_address(EE_AUDIO_FRDDR_A_CTRL1, reg_base); + aml_audiobus_update_bits(actrl, reg, 0xf << 8, 0x2 << 8); + reg = calc_frddr_address(EE_AUDIO_FRDDR_A_STATUS2, reg_base); + tmp1 = aml_audiobus_read(actrl, reg); + + if (tmp == tmp1) + return; + + udelay(1); + pr_debug("delay:[%dus]; FRDDR_STATUS2: [0x%x] [0x%x]\n", + i, tmp, tmp1); + } + pr_err("Error: 200us time out, FRDDR_STATUS2: [0x%x] [0x%x]\n", + tmp, tmp1); + return; } -static void aml_check_aed(bool enable, int dst) +void aml_frddr_reset(struct frddr *fr, int offset) { - /* check effect module is sync with crruent frddr dst */ - if (attach_aed.attach_module != dst) + unsigned int reg = 0, val = 0; + + if (fr == NULL) { + pr_err("%s(), frddr NULL pointer\n", __func__); return; + } - /* AED in enable */ - if (attach_aed.enable) { - if (enable) - attach_aed.status = RUNNING; - else - attach_aed.status = DISABLED; + if ((offset != 0) && (offset != 1)) { + pr_err("%s(), invalid offset = %d\n", __func__, offset); + return; + } - aml_aed_enable(&attach_aed, enable); + if (fr->fifo_id == 0) { + reg = EE_AUDIO_SW_RESET0(offset); + val = REG_BIT_RESET_FRDDRA; + } else if (fr->fifo_id == 1) { + reg = EE_AUDIO_SW_RESET0(offset); + val = REG_BIT_RESET_FRDDRB; + } else if (fr->fifo_id == 2) { + reg = EE_AUDIO_SW_RESET0(offset); + val = REG_BIT_RESET_FRDDRC; + } else if (fr->fifo_id == 3) { + reg = EE_AUDIO_SW_RESET1; + val = REG_BIT_RESET_FRDDRD; + } else { + pr_err("invalid frddr id %d\n", fr->fifo_id); + return; } + + audiobus_update_bits(reg, val, val); + audiobus_update_bits(reg, val, 0); } void frddr_init_without_mngr(unsigned int frddr_index, unsigned int src0_sel) diff --git a/sound/soc/amlogic/auge/ddr_mngr.h b/sound/soc/amlogic/auge/ddr_mngr.h index dc7dca2..c9e2203 100644 --- a/sound/soc/amlogic/auge/ddr_mngr.h +++ b/sound/soc/amlogic/auge/ddr_mngr.h @@ -226,6 +226,8 @@ struct frddr { int irq; bool in_use; struct ddr_chipinfo *chipinfo; + + bool reserved; }; /* to ddrs */ @@ -272,7 +274,7 @@ struct frddr *fetch_frddr_by_src(int frddr_src); struct frddr *aml_audio_register_frddr(struct device *dev, struct aml_audio_controller *actrl, - irq_handler_t handler, void *data); + irq_handler_t handler, void *data, bool rvd_dst); int aml_audio_unregister_frddr(struct device *dev, void *data); int aml_frddr_set_buf(struct frddr *fr, unsigned int start, unsigned int end); @@ -292,8 +294,12 @@ void aml_frddr_set_format(struct frddr *fr, unsigned int chnum, unsigned int msb, unsigned int frddr_type); + +void aml_frddr_reset(struct frddr *fr, int offset); + /* audio eq drc */ void aml_set_aed(bool enable, int aed_module); +void aml_aed_top_enable(struct frddr *fr, bool enable); void frddr_init_without_mngr(unsigned int frddr_index, unsigned int src0_sel); void frddr_deinit_without_mngr(unsigned int frddr_index); @@ -308,5 +314,8 @@ int card_add_ddr_kcontrols(struct snd_soc_card *card); void pm_audio_set_suspend(bool is_suspend); bool pm_audio_is_suspend(void); +void aml_frddr_check(struct frddr *fr); +void aml_aed_set_frddr_reserved(void); + #endif diff --git a/sound/soc/amlogic/auge/earc.c b/sound/soc/amlogic/auge/earc.c index 30b5f30..c284417 100644 --- a/sound/soc/amlogic/auge/earc.c +++ b/sound/soc/amlogic/auge/earc.c @@ -144,7 +144,7 @@ static int earc_open(struct snd_pcm_substream *substream) if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { p_earc->fddr = aml_audio_register_frddr(dev, p_earc->actrl, - earc_ddr_isr, substream); + earc_ddr_isr, substream, false); if (p_earc->fddr == NULL) { dev_err(dev, "failed to claim from ddr\n"); return -ENXIO; diff --git a/sound/soc/amlogic/auge/effects_hw_v2.c b/sound/soc/amlogic/auge/effects_hw_v2.c index b5db9d6..fcf3ce2 100644 --- a/sound/soc/amlogic/auge/effects_hw_v2.c +++ b/sound/soc/amlogic/auge/effects_hw_v2.c @@ -280,19 +280,26 @@ void aed_set_format(int msb, enum ddr_types frddr_type, enum ddr_num source) void aed_enable(bool enable) { + /*don't change this flow*/ if (enable) { eqdrc_write(AED_ED_CNTL, 0x1); - eqdrc_write(AED_ED_CNTL, 0x0); - - eqdrc_update_bits(AED_TOP_CTL, 0x1 << 1, 0x1 << 1); - eqdrc_update_bits(AED_TOP_CTL, 0x1 << 2, 0x1 << 2); - } else - eqdrc_update_bits(AED_TOP_CTL, 0x3 << 1, 0x0 << 1); - - eqdrc_update_bits(AED_TOP_CTL, 0x1 << 0, enable << 0); + eqdrc_write(AED_ED_CNTL, 0x1); - /* start en */ - if (enable) + eqdrc_update_bits(AED_TOP_CTL, 0x3 << 1, 0x3 << 1); + eqdrc_update_bits(AED_TOP_CTL, 0x1 << 0, 0x1 << 0); eqdrc_update_bits(AED_TOP_CTL, 0x1 << 31, 0x1 << 31); + } else { + eqdrc_update_bits(AED_TOP_CTL, 0x1 << 0, 0x0 << 0); + eqdrc_write(AED_ED_CNTL, 0x1); + eqdrc_write(AED_ED_CNTL, 0x1); + eqdrc_update_bits(AED_TOP_CTL, 0x3 << 1, 0x0 << 1); + } } +void aed_module_reset(int offset) +{ + audiobus_update_bits(EE_AUDIO_SW_RESET0(offset), + REG_BIT_RESET_EQDRC, REG_BIT_RESET_EQDRC); + audiobus_update_bits(EE_AUDIO_SW_RESET0(offset), + REG_BIT_RESET_EQDRC, 0); +} diff --git a/sound/soc/amlogic/auge/effects_hw_v2.h b/sound/soc/amlogic/auge/effects_hw_v2.h index cfa8e0fa..b7e65c5 100644 --- a/sound/soc/amlogic/auge/effects_hw_v2.h +++ b/sound/soc/amlogic/auge/effects_hw_v2.h @@ -40,5 +40,6 @@ void aed_set_mixer_params(void); void aed_eq_taps(unsigned int eq1_taps); void aed_set_multiband_drc_param(void); void aed_set_fullband_drc_param(int tap); +void aed_module_reset(int offset); #endif diff --git a/sound/soc/amlogic/auge/effects_v2.c b/sound/soc/amlogic/auge/effects_v2.c index 86a696b..d03f846 100644 --- a/sound/soc/amlogic/auge/effects_v2.c +++ b/sound/soc/amlogic/auge/effects_v2.c @@ -51,6 +51,7 @@ struct effect_chipinfo { * v2 is for tl1 */ bool v2; + bool reserved_frddr; }; struct audioeffect { @@ -65,12 +66,6 @@ struct audioeffect { struct effect_chipinfo *chipinfo; - bool dc_en; - bool nd_en; - bool eq_en; - bool multiband_drc_en; - bool fullband_drc_en; - int lane_mask; int ch_mask; @@ -90,6 +85,16 @@ static struct audioeffect *get_audioeffects(void) return s_effect; } +int get_aed_dst(void) +{ + struct audioeffect *p_effect = get_audioeffects(); + + if (!p_effect) + return -1; + else + return p_effect->effect_module; +} + bool check_aed_v2(void) { struct audioeffect *p_effect = get_audioeffects(); @@ -411,52 +416,6 @@ static int mixer_set_fullband_DRC_params(struct snd_kcontrol *kcontrol, return 0; } -/* aed module - * check to sync with enum frddr_dest in ddr_mngr.h - */ -static const char *const aed_module_texts[] = { - "TDMOUT_A", - "TDMOUT_B", - "TDMOUT_C", - "SPDIFOUT_A", - "SPDIFOUT_B", -}; - -static const struct soc_enum aed_module_enum = - SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, ARRAY_SIZE(aed_module_texts), - aed_module_texts); - -static int aed_module_get_enum( - struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct audioeffect *p_effect = snd_kcontrol_chip(kcontrol); - - if (!p_effect) - return -EINVAL; - - ucontrol->value.enumerated.item[0] = p_effect->effect_module; - - return 0; -} - -static int aed_module_set_enum( - struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct audioeffect *p_effect = snd_kcontrol_chip(kcontrol); - - if (!p_effect) - return -EINVAL; - - p_effect->effect_module = ucontrol->value.enumerated.item[0]; - - /* update info to ddr and modules */ - aml_set_aed(1, p_effect->effect_module); - - return 0; -} - static void aed_set_filter_data(void) { int *p; @@ -534,11 +493,6 @@ static const struct snd_kcontrol_new snd_effect_controls[] = { mixer_get_fullband_DRC_params, mixer_set_fullband_DRC_params), - SOC_ENUM_EXT("AED module", - aed_module_enum, - aed_module_get_enum, - aed_module_set_enum), - SOC_SINGLE_EXT_TLV("AED Lch volume", AED_EQ_VOLUME, 0, 0xFF, 1, mixer_aed_read, mixer_aed_write, @@ -578,6 +532,7 @@ int card_add_effect_v2_kcontrols(struct snd_soc_card *card) static struct effect_chipinfo tl1_effect_chipinfo = { .v2 = true, + .reserved_frddr = true, }; static const struct of_device_id effect_device_id[] = { @@ -601,9 +556,6 @@ static int effect_platform_probe(struct platform_device *pdev) struct audioeffect *p_effect; struct device *dev = &pdev->dev; struct effect_chipinfo *p_chipinfo; - bool eq_enable = false; - bool multiband_drc_enable = false; - bool fullband_drc_enable = false; int lane_mask = -1, channel_mask = -1, eqdrc_module = -1; int ret; @@ -694,9 +646,6 @@ static int effect_platform_probe(struct platform_device *pdev) ); /* config from dts */ - p_effect->eq_en = eq_enable; - p_effect->multiband_drc_en = multiband_drc_enable; - p_effect->fullband_drc_en = fullband_drc_enable; p_effect->lane_mask = lane_mask; p_effect->ch_mask = channel_mask; p_effect->effect_module = eqdrc_module; @@ -724,6 +673,11 @@ static int effect_platform_probe(struct platform_device *pdev) s_effect = p_effect; dev_set_drvdata(&pdev->dev, p_effect); + if (p_effect->chipinfo && + p_effect->chipinfo->reserved_frddr) { + aml_aed_set_frddr_reserved(); + } + return 0; } diff --git a/sound/soc/amlogic/auge/effects_v2.h b/sound/soc/amlogic/auge/effects_v2.h index 9c5051a..30576b7 100644 --- a/sound/soc/amlogic/auge/effects_v2.h +++ b/sound/soc/amlogic/auge/effects_v2.h @@ -19,5 +19,6 @@ extern bool check_aed_v2(void); extern int card_add_effect_v2_kcontrols(struct snd_soc_card *card); +extern int get_aed_dst(void); #endif diff --git a/sound/soc/amlogic/auge/extn.c b/sound/soc/amlogic/auge/extn.c index 78ec04f..681e67d 100644 --- a/sound/soc/amlogic/auge/extn.c +++ b/sound/soc/amlogic/auge/extn.c @@ -191,7 +191,7 @@ static int extn_open(struct snd_pcm_substream *substream) if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { p_extn->fddr = aml_audio_register_frddr(dev, p_extn->actrl, - extn_ddr_isr, substream); + extn_ddr_isr, substream, false); if (p_extn->fddr == NULL) { dev_err(dev, "failed to claim from ddr\n"); return -ENXIO; diff --git a/sound/soc/amlogic/auge/iomap.c b/sound/soc/amlogic/auge/iomap.c index e196591..3ee30b7 100644 --- a/sound/soc/amlogic/auge/iomap.c +++ b/sound/soc/amlogic/auge/iomap.c @@ -15,17 +15,35 @@ * */ +/*#define DEBUG*/ + #include <linux/of.h> #include <linux/io.h> #include <linux/of_address.h> #include <linux/platform_device.h> #include "iomap.h" +#include "audio_aed_reg_list.h" +#include "audio_top_reg_list.h" #define DEV_NAME "auge_snd_iomap" static void __iomem *aml_snd_reg_map[IO_MAX]; +#ifdef DEBUG +static void register_debug(u32 base_type, unsigned int reg, unsigned int val) +{ + if (base_type == IO_AUDIO_BUS) { + pr_debug("audio top reg:[%s] addr: [%#x] val: [%#x]\n", + top_register_table[reg].name, + top_register_table[reg].addr, val); + } else if (base_type == IO_EQDRC_BUS) { + pr_debug("audio aed reg:[%s] addr: [%#x] val: [%#x]\n", + aed_register_table[reg].name, + aed_register_table[reg].addr, val); + } +} +#endif static int aml_snd_read(u32 base_type, unsigned int reg, unsigned int *val) { @@ -43,7 +61,9 @@ static void aml_snd_write(u32 base_type, unsigned int reg, unsigned int val) if (base_type < IO_MAX) { writel(val, (aml_snd_reg_map[base_type] + (reg << 2))); - +#ifdef DEBUG + register_debug(base_type, reg, val); +#endif return; } diff --git a/sound/soc/amlogic/auge/regs.h b/sound/soc/amlogic/auge/regs.h index 70705ec..cbecb17 100644 --- a/sound/soc/amlogic/auge/regs.h +++ b/sound/soc/amlogic/auge/regs.h @@ -37,6 +37,11 @@ enum clk_sel { SLAVE_J }; +struct register_table { + char *name; + unsigned int addr; +}; + #define AUD_ADDR_OFFSET(addr) ((addr) << 2) /* @@ -71,7 +76,46 @@ enum clk_sel { #define EE_AUDIO_MCLK_F_CTRL(offset) (0x006 + offset) #define EE_AUDIO_MST_PAD_CTRL0(offset) (0x007 + offset) #define EE_AUDIO_MST_PAD_CTRL1(offset) (0x008 + offset) + +#define REG_BIT_RESET_PDM (1) +#define REG_BIT_RESET_TDMINA (1 << 1) +#define REG_BIT_RESET_TDMINB (1 << 2) +#define REG_BIT_RESET_TDMINC (1 << 3) +#define REG_BIT_RESET_TDMIN_LB (1 << 4) +#define REG_BIT_RESET_LOOPBACK (1 << 5) +#define REG_BIT_RESET_TODDRA (1 << 6) +#define REG_BIT_RESET_TODDRB (1 << 7) +#define REG_BIT_RESET_TODDRC (1 << 8) +#define REG_BIT_RESET_FRDDRA (1 << 9) +#define REG_BIT_RESET_FRDDRB (1 << 10) +#define REG_BIT_RESET_FRDDRC (1 << 11) +#define REG_BIT_RESET_TDMOUTA (1 << 12) +#define REG_BIT_RESET_TDMOUTB (1 << 13) +#define REG_BIT_RESET_TDMOUTC (1 << 14) +#define REG_BIT_RESET_SPDIFOUTA (1 << 15) +#define REG_BIT_RESET_SPDIFOUTB (1 << 16) +#define REG_BIT_RESET_SPDIFIN (1 << 17) +#define REG_BIT_RESET_EQDRC (1 << 18) +#define REG_BIT_RESET_RESAMPLE (1 << 19) +#define REG_BIT_RESET_DDRARB (1 << 20) +#define REG_BIT_RESET_POWDET (1 << 21) +#define REG_BIT_RESET_TORAM (1 << 22) +#define REG_BIT_RESET_TOACODEC (1 << 23) +#define REG_BIT_RESET_TOHDMITX (1 << 24) +#define REG_BIT_RESET_CLKTREE (1 << 25) +#define REG_BIT_RESET_RESAMPLEB (1 << 26) +#define REG_BIT_RESET_TOVAD (1 << 27) +#define REG_BIT_RESET_LOCKER (1 << 28) +#define REG_BIT_RESET_SPDIFIN_LB (1 << 29) +#define REG_BIT_RESET_FRATV (1 << 30) +#define REG_BIT_RESET_FRHDMIRX (1 << 31) + #define EE_AUDIO_SW_RESET0(offset) (0x009 + offset) + +#define REG_BIT_RESET_FRDDRD (1) +#define REG_BIT_RESET_TODDRD (1 << 1) +#define REG_BIT_RESET_LOOPBACKB (1 << 2) + #define EE_AUDIO_SW_RESET1 0x00b #define EE_AUDIO_CLK81_CTRL 0x00c #define EE_AUDIO_CLK81_EN 0x00d diff --git a/sound/soc/amlogic/auge/sharebuffer.c b/sound/soc/amlogic/auge/sharebuffer.c index 1a740c4..9c0f4bd 100644 --- a/sound/soc/amlogic/auge/sharebuffer.c +++ b/sound/soc/amlogic/auge/sharebuffer.c @@ -83,7 +83,7 @@ void sharebuffer_enable(int sel, bool enable, bool reenable) } int sharebuffer_prepare(struct snd_pcm_substream *substream, - void *pfrddr, int samesource_sel, int lane_i2s) + void *pfrddr, int samesource_sel, int lane_i2s, int offset) { struct frddr *fr = (struct frddr *)pfrddr; diff --git a/sound/soc/amlogic/auge/sharebuffer.h b/sound/soc/amlogic/auge/sharebuffer.h index c8e39c5..6455bfe 100644 --- a/sound/soc/amlogic/auge/sharebuffer.h +++ b/sound/soc/amlogic/auge/sharebuffer.h @@ -18,7 +18,7 @@ #define __AML_AUDIO_SHAREBUFFER_H__ extern int sharebuffer_prepare(struct snd_pcm_substream *substream, - void *pfrddr, int samesource_sel, int lane_i2s); + void *pfrddr, int samesource_sel, int lane_i2s, int offset); extern int sharebuffer_free(struct snd_pcm_substream *substream, void *pfrddr, int samesource_sel); extern int sharebuffer_trigger(int cmd, int samesource_sel, bool reenable); diff --git a/sound/soc/amlogic/auge/spdif.c b/sound/soc/amlogic/auge/spdif.c index eccb28a..61a4dc9 100644 --- a/sound/soc/amlogic/auge/spdif.c +++ b/sound/soc/amlogic/auge/spdif.c @@ -748,7 +748,7 @@ static int aml_spdif_open(struct snd_pcm_substream *substream) if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { p_spdif->fddr = aml_audio_register_frddr(dev, p_spdif->actrl, - aml_spdif_ddr_isr, substream); + aml_spdif_ddr_isr, substream, false); if (p_spdif->fddr == NULL) { dev_err(dev, "failed to claim from ddr\n"); return -ENXIO; @@ -1219,6 +1219,8 @@ static int aml_dai_spdif_trigger(struct snd_pcm_substream *substream, int cmd, if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { dev_info(substream->pcm->card->dev, "S/PDIF Playback enable\n"); + aml_spdif_enable(p_spdif->actrl, + substream->stream, p_spdif->id, true); aml_frddr_enable(p_spdif->fddr, 1); udelay(100); aml_spdif_mute(p_spdif->actrl, @@ -1226,32 +1228,38 @@ static int aml_dai_spdif_trigger(struct snd_pcm_substream *substream, int cmd, } else { dev_info(substream->pcm->card->dev, "S/PDIF Capture enable\n"); aml_toddr_enable(p_spdif->tddr, 1); + aml_spdif_enable(p_spdif->actrl, + substream->stream, p_spdif->id, true); } - aml_spdif_enable(p_spdif->actrl, - substream->stream, p_spdif->id, true); - break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { dev_info(substream->pcm->card->dev, "S/PDIF Playback disable\n"); + /* continuous-clock, spdif out is not disable, + * only mute, ensure spdif outputs zero data. + */ + if (p_spdif->clk_cont) { + aml_spdif_mute(p_spdif->actrl, + substream->stream, p_spdif->id, true); + } else { + aml_spdif_enable(p_spdif->actrl, + substream->stream, p_spdif->id, false); + } + + if (p_spdif->chipinfo && + p_spdif->chipinfo->async_fifo) + aml_frddr_check(p_spdif->fddr); aml_frddr_enable(p_spdif->fddr, 0); } else { dev_info(substream->pcm->card->dev, "S/PDIF Capture disable\n"); aml_toddr_enable(p_spdif->tddr, 0); - } - /* continuous-clock, spdif out is not disable, - * only mute, ensure spdif outputs zero data. - */ - if (p_spdif->clk_cont - && (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)) - aml_spdif_mute(p_spdif->actrl, - substream->stream, p_spdif->id, true); - else aml_spdif_enable(p_spdif->actrl, - substream->stream, p_spdif->id, false); + substream->stream, p_spdif->id, false); + } + break; default: return -EINVAL; diff --git a/sound/soc/amlogic/auge/spdif_hw.c b/sound/soc/amlogic/auge/spdif_hw.c index 971d29b..d7f1c2e 100644 --- a/sound/soc/amlogic/auge/spdif_hw.c +++ b/sound/soc/amlogic/auge/spdif_hw.c @@ -694,3 +694,28 @@ void spdifout_play_with_zerodata_free(unsigned int spdif_id) /* free frddr, then frddr in mngr */ frddr_deinit_without_mngr(spdif_id); } + +void aml_spdif_out_reset(unsigned int spdif_id, int offset) +{ + unsigned int reg = 0, val = 0; + + if ((offset != 0) && (offset != 1)) { + pr_err("%s(), invalid offset = %d\n", __func__, offset); + return; + } + + if (spdif_id == 0) { + reg = EE_AUDIO_SW_RESET0(offset); + val = REG_BIT_RESET_SPDIFOUTA; + } else if (spdif_id == 1) { + reg = EE_AUDIO_SW_RESET0(offset); + val = REG_BIT_RESET_SPDIFOUTB; + } else { + pr_err("invalid spdif id %d\n", spdif_id); + return; + } + + audiobus_update_bits(reg, val, val); + audiobus_update_bits(reg, val, 0); +} + diff --git a/sound/soc/amlogic/auge/spdif_hw.h b/sound/soc/amlogic/auge/spdif_hw.h index e15efa3..fb4c2a1 100644 --- a/sound/soc/amlogic/auge/spdif_hw.h +++ b/sound/soc/amlogic/auge/spdif_hw.h @@ -93,4 +93,6 @@ extern void spdif_set_channel_status_info( extern void spdifout_play_with_zerodata(unsigned int spdif_id, bool reenable); extern void spdifout_play_with_zerodata_free(unsigned int spdif_id); extern void spdifin_set_src(int src); +void aml_spdif_out_reset(unsigned int spdif_id, int offset); + #endif diff --git a/sound/soc/amlogic/auge/spdif_match_table.c b/sound/soc/amlogic/auge/spdif_match_table.c index c88929e..5f6734f 100644 --- a/sound/soc/amlogic/auge/spdif_match_table.c +++ b/sound/soc/amlogic/auge/spdif_match_table.c @@ -39,6 +39,8 @@ struct spdif_chipinfo { bool pcpd_separated; /* same source, spdif re-enable */ bool same_src_spdif_reen; + /* async fifo */ + bool async_fifo; }; struct spdif_chipinfo axg_spdif_chipinfo = { @@ -69,6 +71,7 @@ struct spdif_chipinfo tl1_spdif_a_chipinfo = { .chnum_en = true, .hold_start = true, .eq_drc_en = true, + .async_fifo = true, }; struct spdif_chipinfo tl1_spdif_b_chipinfo = { @@ -76,6 +79,7 @@ struct spdif_chipinfo tl1_spdif_b_chipinfo = { .chnum_en = true, .hold_start = true, .eq_drc_en = true, + .async_fifo = true, }; struct spdif_chipinfo sm1_spdif_a_chipinfo = { @@ -83,6 +87,7 @@ struct spdif_chipinfo sm1_spdif_a_chipinfo = { .chnum_en = true, .hold_start = true, .eq_drc_en = true, + .async_fifo = true, }; struct spdif_chipinfo sm1_spdif_b_chipinfo = { @@ -90,6 +95,7 @@ struct spdif_chipinfo sm1_spdif_b_chipinfo = { .chnum_en = true, .hold_start = true, .eq_drc_en = true, + .async_fifo = true, }; struct spdif_chipinfo tm2_spdif_a_chipinfo = { @@ -97,6 +103,7 @@ struct spdif_chipinfo tm2_spdif_a_chipinfo = { .chnum_en = true, .hold_start = true, .eq_drc_en = true, + .async_fifo = true, }; struct spdif_chipinfo tm2_spdif_b_chipinfo = { @@ -104,6 +111,7 @@ struct spdif_chipinfo tm2_spdif_b_chipinfo = { .chnum_en = true, .hold_start = true, .eq_drc_en = true, + .async_fifo = true, }; static const struct of_device_id aml_spdif_device_id[] = { diff --git a/sound/soc/amlogic/auge/tdm.c b/sound/soc/amlogic/auge/tdm.c index 1495181..7a2f5f8 100644 --- a/sound/soc/amlogic/auge/tdm.c +++ b/sound/soc/amlogic/auge/tdm.c @@ -41,8 +41,8 @@ #include "sharebuffer.h" #include "vad.h" #include "spdif_hw.h" - #include "tdm_match_table.c" +#include "effects_v2.h" /*#define __PTM_TDM_CLK__*/ @@ -315,13 +315,20 @@ static int aml_tdm_open(struct snd_pcm_substream *substream) struct device *dev = rtd->platform->dev; struct aml_tdm *p_tdm; + pr_info("%s\n", __func__); p_tdm = (struct aml_tdm *)dev_get_drvdata(dev); snd_soc_set_runtime_hwparams(substream, &aml_tdm_hardware); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + int dst_id = get_aed_dst(); + bool aed_dst_status = false; + + if (dst_id == p_tdm->id) + aed_dst_status = true; p_tdm->fddr = aml_audio_register_frddr(dev, - p_tdm->actrl, aml_tdm_ddr_isr, substream); + p_tdm->actrl, aml_tdm_ddr_isr, + substream, aed_dst_status); if (p_tdm->fddr == NULL) { dev_err(dev, "failed to claim from ddr\n"); return -ENXIO; @@ -379,6 +386,21 @@ static int aml_tdm_prepare(struct snd_pcm_substream *substream) if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { struct frddr *fr = p_tdm->fddr; + if (p_tdm->chipinfo && p_tdm->chipinfo->async_fifo) { + int offset = p_tdm->chipinfo->reset_reg_offset; + + pr_debug("%s(), reset fddr\n", __func__); + aml_frddr_reset(p_tdm->fddr, offset); + aml_tdm_out_reset(p_tdm->id, offset); + + if (p_tdm->chipinfo->same_src_fn + && (p_tdm->samesource_sel >= 0) + && (aml_check_sharebuffer_valid(p_tdm->fddr, + p_tdm->samesource_sel)) + && p_tdm->en_share) + aml_spdif_out_reset(p_tdm->samesource_sel - 3, + offset); + } aml_frddr_set_buf(fr, start_addr, end_addr); aml_frddr_set_intrpt(fr, int_addr); } else { @@ -461,11 +483,12 @@ static int aml_dai_tdm_prepare(struct snd_pcm_substream *substream, p_tdm->chipinfo->same_src_fn && (p_tdm->samesource_sel >= 0) && (aml_check_sharebuffer_valid(p_tdm->fddr, - p_tdm->samesource_sel)) + p_tdm->samesource_sel)) && p_tdm->en_share) { sharebuffer_prepare(substream, fr, p_tdm->samesource_sel, - p_tdm->lane_ss); + p_tdm->lane_ss, + p_tdm->chipinfo->reset_reg_offset); } /* i2s source to hdmix */ @@ -529,7 +552,7 @@ static int aml_dai_tdm_prepare(struct snd_pcm_substream *substream, return -EINVAL; } - dev_info(substream->pcm->card->dev, "tdm prepare----capture\n"); + dev_info(substream->pcm->card->dev, "tdm prepare capture\n"); switch (p_tdm->id) { case 0: src = TDMIN_A; @@ -586,18 +609,6 @@ static int aml_dai_tdm_trigger(struct snd_pcm_substream *substream, int cmd, { struct aml_tdm *p_tdm = snd_soc_dai_get_drvdata(cpu_dai); - /* share buffer trigger */ - if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - && p_tdm->chipinfo - && p_tdm->chipinfo->same_src_fn - && (p_tdm->samesource_sel >= 0) - && (aml_check_sharebuffer_valid(p_tdm->fddr, - p_tdm->samesource_sel)) - && p_tdm->en_share) - sharebuffer_trigger(cmd, - p_tdm->samesource_sel, - p_tdm->chipinfo->same_src_spdif_reen); - switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: @@ -618,13 +629,31 @@ static int aml_dai_tdm_trigger(struct snd_pcm_substream *substream, int cmd, aml_tdm_fifo_reset(p_tdm->actrl, substream->stream, p_tdm->id); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + /* output START sequence: + * 1. Frddr/TDMOUT/SPDIF reset(may cause the AVR mute) + * 2. ctrl0 set to 0 + * 3. TDMOUT enable + * 4. SPDIFOUT enable + * 5. FRDDR enable + */ dev_info(substream->pcm->card->dev, "tdm playback enable\n"); - aml_frddr_enable(p_tdm->fddr, 1); + /*don't change this flow*/ + aml_aed_top_enable(p_tdm->fddr, true); aml_tdm_enable(p_tdm->actrl, substream->stream, p_tdm->id, true); + if (p_tdm->chipinfo + && p_tdm->chipinfo->same_src_fn + && (p_tdm->samesource_sel >= 0) + && (aml_check_sharebuffer_valid(p_tdm->fddr, + p_tdm->samesource_sel)) + && p_tdm->en_share) + sharebuffer_trigger(cmd, + p_tdm->samesource_sel, + p_tdm->chipinfo->same_src_spdif_reen); + + aml_frddr_enable(p_tdm->fddr, true); udelay(100); - aml_tdm_mute_playback(p_tdm->actrl, p_tdm->id, - false, p_tdm->lane_cnt); + aml_tdmout_enable_gain(p_tdm->id, false); if (p_tdm->chipinfo && p_tdm->chipinfo->same_src_fn && (p_tdm->samesource_sel >= 0) @@ -652,10 +681,15 @@ static int aml_dai_tdm_trigger(struct snd_pcm_substream *substream, int cmd, } if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + /* output STOP sequence: + * 1. TDMOUT->muteval + * 2. SPDIFOUT->muteval + * 3. TDMOUT/SPDIF Disable + * 4. FRDDR Disable + */ dev_info(substream->pcm->card->dev, "tdm playback stop\n"); - aml_frddr_enable(p_tdm->fddr, 0); - aml_tdm_mute_playback(p_tdm->actrl, p_tdm->id, - true, p_tdm->lane_cnt); + /*don't change this flow*/ + aml_tdmout_enable_gain(p_tdm->id, true); if (p_tdm->chipinfo && p_tdm->chipinfo->same_src_fn && (p_tdm->samesource_sel >= 0) @@ -664,12 +698,30 @@ static int aml_dai_tdm_trigger(struct snd_pcm_substream *substream, int cmd, && p_tdm->en_share) { aml_spdifout_mute_without_actrl(0, true); } + aml_aed_top_enable(p_tdm->fddr, false); + aml_tdm_enable(p_tdm->actrl, + substream->stream, p_tdm->id, false); + if (p_tdm->chipinfo && p_tdm->chipinfo->same_src_fn + && (p_tdm->samesource_sel >= 0) + && (aml_check_sharebuffer_valid(p_tdm->fddr, + p_tdm->samesource_sel)) + && p_tdm->en_share) + sharebuffer_trigger(cmd, + p_tdm->samesource_sel, + p_tdm->chipinfo->same_src_spdif_reen); + + if (p_tdm->chipinfo && + p_tdm->chipinfo->async_fifo) + aml_frddr_check(p_tdm->fddr); + + aml_frddr_enable(p_tdm->fddr, false); } else { dev_info(substream->pcm->card->dev, "tdm capture stop\n"); - aml_toddr_enable(p_tdm->tddr, 0); + aml_toddr_enable(p_tdm->tddr, false); + aml_tdm_enable(p_tdm->actrl, + substream->stream, p_tdm->id, false); } - aml_tdm_enable(p_tdm->actrl, - substream->stream, p_tdm->id, false); + break; default: return -EINVAL; @@ -1625,6 +1677,7 @@ static int aml_tdm_platform_probe(struct platform_device *pdev) p_tdm->dev = dev; /* For debug to disable share buffer */ p_tdm->en_share = 1; + pr_info("%s(), share en = %d", __func__, p_tdm->en_share); dev_set_drvdata(dev, p_tdm); /* spdif same source with i2s */ diff --git a/sound/soc/amlogic/auge/tdm_hw.c b/sound/soc/amlogic/auge/tdm_hw.c index 08cc846..15016a4 100644 --- a/sound/soc/amlogic/auge/tdm_hw.c +++ b/sound/soc/amlogic/auge/tdm_hw.c @@ -808,3 +808,28 @@ void aml_tdm_mute_capture( } } +void aml_tdm_out_reset(unsigned int tdm_id, int offset) +{ + unsigned int reg = 0, val = 0; + + if ((offset != 0) && (offset != 1)) { + pr_err("%s(), invalid offset = %d\n", __func__, offset); + return; + } + + if (tdm_id == 0) { + reg = EE_AUDIO_SW_RESET0(offset); + val = REG_BIT_RESET_TDMOUTA; + } else if (tdm_id == 1) { + reg = EE_AUDIO_SW_RESET0(offset); + val = REG_BIT_RESET_TDMOUTB; + } else if (tdm_id == 2) { + reg = EE_AUDIO_SW_RESET0(offset); + val = REG_BIT_RESET_TDMOUTC; + } else { + pr_err("invalid tdmout id %d\n", tdm_id); + return; + } + audiobus_update_bits(reg, val, val); + audiobus_update_bits(reg, val, 0); +} diff --git a/sound/soc/amlogic/auge/tdm_hw.h b/sound/soc/amlogic/auge/tdm_hw.h index 9d93dc3..6a4b5a8 100644 --- a/sound/soc/amlogic/auge/tdm_hw.h +++ b/sound/soc/amlogic/auge/tdm_hw.h @@ -163,4 +163,5 @@ void aml_tdm_mute_capture( int tdm_index, bool mute, int lane_cnt); +void aml_tdm_out_reset(unsigned int tdm_id, int offset); #endif diff --git a/sound/soc/amlogic/auge/tdm_match_table.c b/sound/soc/amlogic/auge/tdm_match_table.c index 7b45f00..957bb1e 100644 --- a/sound/soc/amlogic/auge/tdm_match_table.c +++ b/sound/soc/amlogic/auge/tdm_match_table.c @@ -42,6 +42,12 @@ struct tdm_chipinfo { /* mclk pad offset */ bool mclkpad_no_offset; + + /* offset config for SW_RESET in reg.h */ + int reset_reg_offset; + + /* async fifo */ + bool async_fifo; }; @@ -103,6 +109,8 @@ struct tdm_chipinfo tl1_tdma_chipinfo = { .oe_fn = true, .same_src_fn = true, .adc_fn = true, + .reset_reg_offset = 1, + .async_fifo = true, }; struct tdm_chipinfo tl1_tdmb_chipinfo = { @@ -111,6 +119,8 @@ struct tdm_chipinfo tl1_tdmb_chipinfo = { .oe_fn = true, .same_src_fn = true, .adc_fn = true, + .reset_reg_offset = 1, + .async_fifo = true, }; struct tdm_chipinfo tl1_tdmc_chipinfo = { @@ -119,6 +129,8 @@ struct tdm_chipinfo tl1_tdmc_chipinfo = { .oe_fn = true, .same_src_fn = true, .adc_fn = true, + .reset_reg_offset = 1, + .async_fifo = true, }; struct tdm_chipinfo tl1_tdminlb_chipinfo = { @@ -127,6 +139,7 @@ struct tdm_chipinfo tl1_tdminlb_chipinfo = { .oe_fn = true, .same_src_fn = true, .adc_fn = true, + .async_fifo = true, }; struct tdm_chipinfo sm1_tdma_chipinfo = { @@ -135,6 +148,8 @@ struct tdm_chipinfo sm1_tdma_chipinfo = { .oe_fn = true, .same_src_fn = true, .lane_cnt = LANE_MAX0, + .reset_reg_offset = 1, + .async_fifo = true, }; struct tdm_chipinfo sm1_tdmb_chipinfo = { @@ -143,6 +158,8 @@ struct tdm_chipinfo sm1_tdmb_chipinfo = { .oe_fn = true, .same_src_fn = true, .lane_cnt = LANE_MAX3, + .reset_reg_offset = 1, + .async_fifo = true, }; struct tdm_chipinfo sm1_tdmc_chipinfo = { @@ -151,6 +168,8 @@ struct tdm_chipinfo sm1_tdmc_chipinfo = { .oe_fn = true, .same_src_fn = true, .lane_cnt = LANE_MAX1, + .reset_reg_offset = 1, + .async_fifo = true, }; struct tdm_chipinfo sm1_tdminlb_chipinfo = { @@ -159,6 +178,7 @@ struct tdm_chipinfo sm1_tdminlb_chipinfo = { .oe_fn = true, .same_src_fn = true, .lane_cnt = LANE_MAX3, + .async_fifo = true, }; struct tdm_chipinfo tm2_tdma_chipinfo = { @@ -168,6 +188,8 @@ struct tdm_chipinfo tm2_tdma_chipinfo = { .same_src_fn = true, .adc_fn = true, .lane_cnt = LANE_MAX3, + .reset_reg_offset = 1, + .async_fifo = true, }; struct tdm_chipinfo tm2_tdmb_chipinfo = { @@ -177,6 +199,8 @@ struct tdm_chipinfo tm2_tdmb_chipinfo = { .same_src_fn = true, .adc_fn = true, .lane_cnt = LANE_MAX1, + .reset_reg_offset = 1, + .async_fifo = true, }; struct tdm_chipinfo tm2_tdmc_chipinfo = { @@ -186,6 +210,8 @@ struct tdm_chipinfo tm2_tdmc_chipinfo = { .same_src_fn = true, .adc_fn = true, .lane_cnt = LANE_MAX1, + .reset_reg_offset = 1, + .async_fifo = true, }; struct tdm_chipinfo tm2_tdminlb_chipinfo = { @@ -194,6 +220,7 @@ struct tdm_chipinfo tm2_tdminlb_chipinfo = { .oe_fn = true, .same_src_fn = true, .lane_cnt = LANE_MAX3, + .async_fifo = true, }; static const struct of_device_id aml_tdm_device_id[] = { |