hdr: optimize osd sdr2hdr color/luminance [1/1]

PD#SWPL-17683

Problem:
1. osd sdr2hdr color is different with video
2. osd sdr2hdr luminance is too high with astro pattern

Solution:
1. osd sdr2hdr matrix set 709 to 2020
2. osd sdr2hdr max luminance set 330

Verify:
verify on p212

Change-Id: Ib3507a817dfdadb151634e757a1d98c2c70eb38a
Signed-off-by: MingLiang Dong <mingliang.dong@amlogic.com>

9 files changed, 61 insertions, 14 deletions

diff --git a/arch/arm/boot/dts/amlogic/gxl_p212_1g.dts b/arch/arm/boot/dts/amlogic/gxl_p212_1g.dts
index cf986ab..c4dbfc8 100644
--- a/arch/arm/boot/dts/amlogic/gxl_p212_1g.dts
+++ b/arch/arm/boot/dts/amlogic/gxl_p212_1g.dts
@@ -1086,7 +1086,7 @@
 		wb_en = <0>;/*1:enabel ;0:disable*/
 		cm_en = <0>;/*1:enabel ;0:disable*/
 		/*1:enabel osd lut 100 table;0:disable*/
-		cfg_en_osd_100 = <0>;
+		cfg_en_osd_100 = <3>;
 		/*0: 709/601  1: bt2020*/
 		tx_op_color_primary = <1>;
 	};
diff --git a/arch/arm/boot/dts/amlogic/gxl_p212_2g.dts b/arch/arm/boot/dts/amlogic/gxl_p212_2g.dts
index c115ba3..0cdeba0 100644
--- a/arch/arm/boot/dts/amlogic/gxl_p212_2g.dts
+++ b/arch/arm/boot/dts/amlogic/gxl_p212_2g.dts
@@ -1093,7 +1093,7 @@
 		wb_en = <0>;/*1:enabel ;0:disable*/
 		cm_en = <0>;/*1:enabel ;0:disable*/
 		/*1:enabel osd lut 100 table;0:disable*/
-		cfg_en_osd_100 = <0>;
+		cfg_en_osd_100 = <3>;
 		/*0: 709/601  1: bt2020*/
 		tx_op_color_primary = <1>;
 	};
diff --git a/arch/arm/boot/dts/amlogic/gxl_p241_1g.dts b/arch/arm/boot/dts/amlogic/gxl_p241_1g.dts
index b0c788f..e45848d 100644
--- a/arch/arm/boot/dts/amlogic/gxl_p241_1g.dts
+++ b/arch/arm/boot/dts/amlogic/gxl_p241_1g.dts
@@ -1157,7 +1157,7 @@
 		wb_en = <0>;/*1:enabel ;0:disable*/
 		cm_en = <0>;/*1:enabel ;0:disable*/
 		/*1:enabel osd lut 100 table;0:disable*/
-		cfg_en_osd_100 = <0>;
+		cfg_en_osd_100 = <3>;
 		/*0: 709/601  1: bt2020*/
 		tx_op_color_primary = <1>;
 	};
diff --git a/arch/arm/boot/dts/amlogic/gxl_p241_v2-1g.dts b/arch/arm/boot/dts/amlogic/gxl_p241_v2-1g.dts
index cad90bc..6970a13 100644
--- a/arch/arm/boot/dts/amlogic/gxl_p241_v2-1g.dts
+++ b/arch/arm/boot/dts/amlogic/gxl_p241_v2-1g.dts
@@ -1157,7 +1157,7 @@
 		wb_en = <0>;/*1:enabel ;0:disable*/
 		cm_en = <0>;/*1:enabel ;0:disable*/
 		/*1:enabel osd lut 100 table;0:disable*/
-		cfg_en_osd_100 = <0>;
+		cfg_en_osd_100 = <3>;
 		/*0: 709/601  1: bt2020*/
 		tx_op_color_primary = <1>;
 	};
diff --git a/arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts b/arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts
index 7da773b..351723e 100644
--- a/arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts
+++ b/arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts
@@ -1082,7 +1082,7 @@
 		wb_en = <0>;/*1:enabel ;0:disable*/
 		cm_en = <0>;/*1:enabel ;0:disable*/
 		/*1:enabel osd lut 100 table;0:disable*/
-		cfg_en_osd_100 = <0>;
+		cfg_en_osd_100 = <3>;
 		/*0: 709/601  1: bt2020*/
 		tx_op_color_primary = <1>;
 	};
diff --git a/arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts b/arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts
index 18ab4b0..14e2b82 100644
--- a/arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts
+++ b/arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts
@@ -1092,7 +1092,7 @@
 		wb_en = <0>;/*1:enabel ;0:disable*/
 		cm_en = <0>;/*1:enabel ;0:disable*/
 		/*1:enabel osd lut 100 table;0:disable*/
-		cfg_en_osd_100 = <0>;
+		cfg_en_osd_100 = <3>;
 		/*0: 709/601  1: bt2020*/
 		tx_op_color_primary = <1>;
 	};
diff --git a/arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts b/arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts
index b6a8778..2666660 100644
--- a/arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts
+++ b/arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts
@@ -1153,7 +1153,7 @@
 		wb_en = <0>;/*1:enabel ;0:disable*/
 		cm_en = <0>;/*1:enabel ;0:disable*/
 		/*1:enabel osd lut 100 table;0:disable*/
-		cfg_en_osd_100 = <0>;
+		cfg_en_osd_100 = <3>;
 		/*0: 709/601  1: bt2020*/
 		tx_op_color_primary = <1>;
 	};
diff --git a/arch/arm64/boot/dts/amlogic/gxl_p241_v2-1g.dts b/arch/arm64/boot/dts/amlogic/gxl_p241_v2-1g.dts
index 2fb939b..ab978a1 100644
--- a/arch/arm64/boot/dts/amlogic/gxl_p241_v2-1g.dts
+++ b/arch/arm64/boot/dts/amlogic/gxl_p241_v2-1g.dts
@@ -1154,7 +1154,7 @@
 		wb_en = <0>;/*1:enabel ;0:disable*/
 		cm_en = <0>;/*1:enabel ;0:disable*/
 		/*1:enabel osd lut 100 table;0:disable*/
-		cfg_en_osd_100 = <0>;
+		cfg_en_osd_100 = <3>;
 		/*0: 709/601  1: bt2020*/
 		tx_op_color_primary = <1>;
 	};
diff --git a/drivers/amlogic/media/enhancement/amvecm/amcsc.c b/drivers/amlogic/media/enhancement/amvecm/amcsc.c
index 08953cc..b75320b 100644
--- a/drivers/amlogic/media/enhancement/amvecm/amcsc.c
+++ b/drivers/amlogic/media/enhancement/amvecm/amcsc.c
@@ -1611,6 +1611,24 @@ static unsigned int osd_oetf_41_2084_mapping_290[OSD_OETF_LUT_SIZE] = {
 	 596
 };
 
+static unsigned int osd_eotf_33_709_mapping_330[EOTF_LUT_SIZE] = {
+	    0,     8,    37,    90,   169,   276,   412,   579,
+	  776,  1006,  1268,  1564,  1894,  2258,  2658,  3094,
+	 3566,  4075,  4621,  5204,  5826,  6486,  7185,  7923,
+	 8701,  9518, 10376, 11274, 12213, 13194, 14215, 15279,
+	16384
+};
+
+/* osd oetf lut: 2084 from baozheng */
+static unsigned int osd_oetf_41_2084_mapping_330[OSD_OETF_LUT_SIZE] = {
+	   0,  166,  207,  233,  254,  270,  284,  296,
+	 307,  366,  402,  429,  451,  469,  484,  498,
+	 509,  520,  530,  539,  547,  555,  562,  569,
+	 576,  582,  588,  593,  598,  603,  608,  613,
+	 617,  621,  625,  629,  633,  637,  640,  644,
+	 647
+};
+
 /* osd eotf lut: sdr->hlg */
 static unsigned int osd_eotf_33_sdr2hlg_mapping[EOTF_LUT_SIZE] = {
 	    0,   512,  1024,  1536,  2048,  2560,  3072,  3584,
@@ -4392,8 +4410,8 @@ static int hdr_process(
 		/* for OSD */
 		if (get_cpu_type() > MESON_CPU_MAJOR_ID_GXTVBB)
 			prepare_customer_matrix(
-				&master_info->primaries,
-				&master_info->white_point,
+				&bt2020_primaries,
+				&bt2020_white_point,
 				vinfo, &osd_m, 1);
 		need_adjust_contrast_saturation |= 1;
 	} else {
@@ -4431,12 +4449,19 @@ static int hdr_process(
 				osd_eotf_33_709_mapping_100, /* G */
 				osd_eotf_33_709_mapping_100, /* B */
 				CSC_ON);
-		} else if ((is_hdr_cfg_osd_100() == 2)) {
+		} else if (is_hdr_cfg_osd_100() == 2) {
 			set_vpp_lut(VPP_LUT_OSD_EOTF,
 				osd_eotf_33_709_mapping_290, /* R */
 				osd_eotf_33_709_mapping_290, /* G */
 				osd_eotf_33_709_mapping_290, /* B */
 				CSC_ON);
+		} else if (is_hdr_cfg_osd_100() == 3) {
+			set_vpp_lut(
+				VPP_LUT_OSD_EOTF,
+				osd_eotf_33_709_mapping_330, /* R */
+				osd_eotf_33_709_mapping_330, /* G */
+				osd_eotf_33_709_mapping_330, /* B */
+				CSC_ON);
 		} else {
 			set_vpp_lut(VPP_LUT_OSD_EOTF,
 				osd_eotf_33_709_mapping, /* R */
@@ -4471,6 +4496,13 @@ static int hdr_process(
 				osd_oetf_41_2084_mapping_290, /* G */
 				osd_oetf_41_2084_mapping_290, /* B */
 				CSC_ON);
+		} else if (is_hdr_cfg_osd_100() == 3) {
+			set_vpp_lut(
+				VPP_LUT_OSD_OETF,
+				osd_oetf_41_2084_mapping_330, /* R */
+				osd_oetf_41_2084_mapping_330, /* G */
+				osd_oetf_41_2084_mapping_330, /* B */
+				CSC_ON);
 		} else {
 			set_vpp_lut(VPP_LUT_OSD_OETF,
 				osd_oetf_41_2084_mapping, /* R */
@@ -4886,8 +4918,16 @@ static void bypass_hdr_process(
 						osd_eotf_33_709_mapping_290,
 						osd_eotf_33_709_mapping_290,
 						CSC_ON);
+				} else if (is_hdr_cfg_osd_100() == 3) {
+					set_vpp_lut(
+						VPP_LUT_OSD_EOTF,
+						osd_eotf_33_709_mapping_330,
+						osd_eotf_33_709_mapping_330,
+						osd_eotf_33_709_mapping_330,
+						CSC_ON);
 				} else {
-					set_vpp_lut(VPP_LUT_OSD_EOTF,
+					set_vpp_lut(
+						VPP_LUT_OSD_EOTF,
 						osd_eotf_33_709_mapping, /*R*/
 						osd_eotf_33_709_mapping, /*G*/
 						osd_eotf_33_709_mapping, /*B*/
@@ -4899,8 +4939,8 @@ static void bypass_hdr_process(
 				pr_csc("\tMaster_display_colour available.\n");
 				print_primaries_info(master_info);
 				prepare_customer_matrix(
-					&master_info->primaries,
-					&master_info->white_point,
+					&bt2020_primaries,
+					&bt2020_white_point,
 					vinfo, &osd_m, 1);
 			} else {
 				pr_csc("\tNo master_display_colour.\n");
@@ -4945,6 +4985,13 @@ static void bypass_hdr_process(
 						osd_oetf_41_2084_mapping_290,
 						osd_oetf_41_2084_mapping_290,
 						CSC_ON);
+				} else if (is_hdr_cfg_osd_100() == 3) {
+					set_vpp_lut(
+						VPP_LUT_OSD_OETF,
+						osd_oetf_41_2084_mapping_330,
+						osd_oetf_41_2084_mapping_330,
+						osd_oetf_41_2084_mapping_330,
+						CSC_ON);
 				} else {
 					set_vpp_lut(VPP_LUT_OSD_OETF,
 						osd_oetf_41_2084_mapping,