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authorTao Zeng <tao.zeng@amlogic.com>2019-09-12 08:46:06 (GMT)
committer Jianxin Pan <jianxin.pan@amlogic.com>2019-09-20 02:45:53 (GMT)
commitbd353a10b37e494ae7e2275134db8ded1a4b646a (patch)
treec0974cd72b70ac7abc0a76cbe617334d0ae4834e
parent86e4b1053c2d6a02f886776df166bdabc2486daf (diff)
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event: restore watch point after cpu pm event [1/1]
PD#TV-9668 Problem: After cpu idle enabled, watch point event register will be cleared if cpu exit pm(idle). This will cause watch point can't work. Solution: re-enable watch point after cpu exit pm(idle) Verify: TL1 Change-Id: I4fc2002eaabecd4c5e60a5916bc29e0107882bec Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
Diffstat
-rw-r--r--arch/arm/include/asm/hw_breakpoint.h4
-rw-r--r--arch/arm/kernel/hw_breakpoint.c21
2 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hw_breakpoint.h b/arch/arm/include/asm/hw_breakpoint.h
index afcaf8b..704f3ad 100644
--- a/arch/arm/include/asm/hw_breakpoint.h
+++ b/arch/arm/include/asm/hw_breakpoint.h
@@ -52,6 +52,10 @@ static inline void decode_ctrl_reg(u32 reg,
#define ARM_DEBUG_ARCH_V7_MM 4
#define ARM_DEBUG_ARCH_V7_1 5
#define ARM_DEBUG_ARCH_V8 6
+#ifdef CONFIG_AMLOGIC_MODIFY
+/* for cortex-a55 */
+#define ARM_DEBUG_ARCH_V8_1 8
+#endif
/* Breakpoint */
#define ARM_BREAKPOINT_EXECUTE 0
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index bc8f9b1..5026945 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -261,6 +261,9 @@ static int enable_monitor_mode(void)
case ARM_DEBUG_ARCH_V7_ECP14:
case ARM_DEBUG_ARCH_V7_1:
case ARM_DEBUG_ARCH_V8:
+#ifdef CONFIG_AMLOGIC_MODIFY
+ case ARM_DEBUG_ARCH_V8_1:
+#endif
ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN));
isb();
break;
@@ -1041,8 +1044,26 @@ static struct notifier_block dbg_reset_nb = {
static int dbg_cpu_pm_notify(struct notifier_block *self, unsigned long action,
void *v)
{
+#ifdef CONFIG_AMLOGIC_MODIFY
+ struct perf_event *wp, **slots;
+ int i;
+
+ if (action == CPU_PM_EXIT) {
+ reset_ctrl_regs(NULL);
+ /* reinstall already installed wp after exit pm */
+ slots = this_cpu_ptr(wp_on_reg);
+ for (i = 0; i < core_num_wrps; ++i) {
+ wp = slots[i];
+ if (wp) {
+ slots[i] = NULL;
+ arch_install_hw_breakpoint(wp);
+ }
+ }
+ }
+#else
if (action == CPU_PM_EXIT)
reset_ctrl_regs(NULL);
+#endif
return NOTIFY_OK;
}