osd: fix osd display half sceen issue [1/1]

PD#SWPL-25200

Problem:
sometime osd rdma write reg error

Solution:
1. add osd rdma write protect(ref SWPL-11936, SWPL-16839)
2. add freescale update patch(ref SWPL-17309, SWPL-19237)
3. add osd rdma recovery patch(ref SWPL-21602)

Verify:
on g12a

Change-Id: I08fdb54aa96df3cd3b51b706a0f324fabe67e82d
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>

2 files changed, 66 insertions, 31 deletions

diff --git a/drivers/amlogic/media/osd/osd_backup.c b/drivers/amlogic/media/osd/osd_backup.c
index 64d9cd9..692af85 100644
--- a/drivers/amlogic/media/osd/osd_backup.c
+++ b/drivers/amlogic/media/osd/osd_backup.c
@@ -648,7 +648,7 @@ static struct reg_item osd3_afbcd_recovery_table_g12a[] = {
 		0x0, 0x0000ffff, 1
 	},
 	{
-		VPU_MAFBC_PREFETCH_CFG_S1, 0x0, 3, 1
+		VPU_MAFBC_PREFETCH_CFG_S2, 0x0, 3, 1
 	}
 };
 
@@ -764,14 +764,12 @@ static void recovery_regs_init_g12a(void)
 	gRecovery[i].table =
 		(struct reg_item *)&osd12_recovery_table_g12a[0];
 
-	if ((osd_hw.osd_meson_dev.viu1_osd_count - 1) == DEV_OSD3) {
-		i++;
-		gRecovery[i].base_addr = VIU_OSD3_CTRL_STAT;
-		gRecovery[i].size = sizeof(osd3_recovery_table_g12a)
-			/ sizeof(struct reg_item);
-		gRecovery[i].table =
-			(struct reg_item *)&osd3_recovery_table_g12a[0];
-	}
+	i++;
+	gRecovery[i].base_addr = VIU_OSD3_CTRL_STAT;
+	gRecovery[i].size = sizeof(osd3_recovery_table_g12a)
+		/ sizeof(struct reg_item);
+	gRecovery[i].table =
+		(struct reg_item *)&osd3_recovery_table_g12a[0];
 
 	i++;
 	gRecovery[i].base_addr = VPP_OSD_VSC_PHASE_STEP;
@@ -787,14 +785,12 @@ static void recovery_regs_init_g12a(void)
 	gRecovery[i].table =
 		(struct reg_item *)&osd2_sc_recovery_table_g12a[0];
 
-	if ((osd_hw.osd_meson_dev.viu1_osd_count - 1) == DEV_OSD3) {
-		i++;
-		gRecovery[i].base_addr = OSD34_SCALE_COEF_IDX;
-		gRecovery[i].size = sizeof(osd3_sc_recovery_table_g12a)
-			/ sizeof(struct reg_item);
-		gRecovery[i].table =
-			(struct reg_item *)&osd3_sc_recovery_table_g12a[0];
-	}
+	i++;
+	gRecovery[i].base_addr = OSD34_SCALE_COEF_IDX;
+	gRecovery[i].size = sizeof(osd3_sc_recovery_table_g12a)
+		/ sizeof(struct reg_item);
+	gRecovery[i].table =
+		(struct reg_item *)&osd3_sc_recovery_table_g12a[0];
 
 	i++;
 	gRecovery[i].base_addr = VPU_MAFBC_BLOCK_ID;
diff --git a/drivers/amlogic/media/osd/osd_hw.c b/drivers/amlogic/media/osd/osd_hw.c
index eaa1736..7f145c2 100644
--- a/drivers/amlogic/media/osd/osd_hw.c
+++ b/drivers/amlogic/media/osd/osd_hw.c
@@ -94,6 +94,7 @@
 
 #define osd_tprintk(...)
 
+#define WAIT_CNT_MAX            20
 #define OSD_CALC    14
 #define FREE_SCALE_MAX_WIDTH    1920
 struct hw_para_s osd_hw;
@@ -691,6 +692,35 @@ static bool osd_hdr_on;
 #endif
 
 #ifdef CONFIG_AMLOGIC_MEDIA_FB_OSD_SYNC_FENCE
+static int get_active_begin_line(void)
+{
+	int active_line_begin = 0;
+	u32 viu;
+
+	viu = osd_reg_read(VPU_VIU_VENC_MUX_CTRL) & 0x3;
+
+	switch (viu) {
+	case 0:
+		active_line_begin =
+			osd_reg_read(ENCL_VIDEO_VAVON_BLINE);
+		break;
+	case 1:
+		active_line_begin =
+			osd_reg_read(ENCI_VFIFO2VD_LINE_TOP_START);
+		break;
+	case 2:
+		active_line_begin =
+			osd_reg_read(ENCP_VIDEO_VAVON_BLINE);
+		break;
+	case 3:
+		active_line_begin =
+			osd_reg_read(ENCT_VIDEO_VAVON_BLINE);
+		break;
+	}
+
+	return active_line_begin;
+}
+
 static int get_encp_line(void)
 {
 	int enc_line = 0;
@@ -720,7 +750,7 @@ static int get_encp_line(void)
 		break;
 	}
 	enc_line = (reg >> 16) & 0x1fff;
-	enc_line -= active_line_begin;
+	/* enc_line -= active_line_begin; */
 	return enc_line;
 }
 #endif
@@ -5715,6 +5745,7 @@ static void generate_blend_din_table(struct hw_osd_blending_s *blending)
 		blending->din_reoder_sel;
 }
 #endif
+#if 0
 static bool is_freescale_para_changed(u32 index)
 {
 	static int first[HW_OSD_COUNT - 1] = {1};
@@ -5739,7 +5770,7 @@ static bool is_freescale_para_changed(u32 index)
 	first[index] = 0;
 	return freescale_update;
 }
-
+#endif
 static int osd_setting_blending_scope(u32 index)
 {
 	u32 bld_osd_h_start, bld_osd_h_end;
@@ -7345,11 +7376,12 @@ static int osd_setting_order(void)
 	struct layer_blend_reg_s *blend_reg;
 	struct hw_osd_blending_s *blending;
 	u32 osd_count = osd_hw.osd_meson_dev.viu1_osd_count;
-	bool update = false;
 	int line1;
 	int line2;
 	int vinfo_height;
 	u32 val;
+	int active_begin_line;
+	u32 wait_cnt = 0;
 
 	blending = &osd_blending;
 	blend_reg = &(blending->blend_reg);
@@ -7382,15 +7414,23 @@ static int osd_setting_order(void)
 
 	/* set blend path */
 	set_blend_path(blending);
+	active_begin_line = get_active_begin_line();
 	line1 = get_enter_encp_line();
-	vinfo_height = osd_hw.field_out_en ?
-		(osd_hw.vinfo_height * 2) : osd_hw.vinfo_height;
 	/* if nearly vsync signal, wait vsync here */
-	if (line1 >= vinfo_height * line_threshold / 100) {
+	vinfo_height = osd_hw.field_out_en ?
+		(osd_hw.vinfo_height * 2) :
+		osd_hw.vinfo_height;
+	while (line1 >= vinfo_height + active_begin_line *
+			(100 - line_threshold) / 100 ||
+			line1 <= active_begin_line * line_threshold / 100) {
 		osd_log_dbg(MODULE_RENDER,
 			"enter osd_setting_order:encp line=%d\n",
 			line1);
-		osd_wait_vsync_hw();
+		/* 0.5ms */
+		usleep_range(500, 600);
+		wait_cnt++;
+		if (wait_cnt >= WAIT_CNT_MAX)
+			break;
 		line1 = get_enter_encp_line();
 	}
 	spin_lock_irqsave(&osd_lock, lock_flags);
@@ -7400,7 +7440,7 @@ static int osd_setting_order(void)
 		if (osd_hw.enable[i]) {
 			struct hw_osd_reg_s *osd_reg = &hw_osd_reg_array[i];
 
-			update = is_freescale_para_changed(i);
+			/* update = is_freescale_para_changed(i); */
 			if (!osd_hw.osd_afbcd[i].enable)
 				canvas_config(osd_hw.fb_gem[i].canvas_idx,
 					osd_hw.fb_gem[i].addr,
@@ -7434,13 +7474,12 @@ static int osd_setting_order(void)
 			}
 			osd_hw.reg[DISP_GEOMETRY].update_func(i);
 			osd_hw.reg[OSD_GBL_ALPHA].update_func(i);
-			if (update || osd_update_window_axis) {
-				osd_set_scan_mode(i);
-				osd_hw.reg
-					[OSD_FREESCALE_COEF].update_func(i);
-				osd_hw.reg[DISP_FREESCALE_ENABLE]
+			osd_set_scan_mode(i);
+			osd_hw.reg[OSD_FREESCALE_COEF].update_func(i);
+			osd_hw.reg[DISP_FREESCALE_ENABLE]
 				.update_func(i);
-			}
+			if (osd_update_window_axis)
+				osd_update_window_axis = false;
 			if (osd_hw.premult_en[i])
 				VSYNCOSD_WR_MPEG_REG_BITS(
 				osd_reg->osd_mali_unpack_ctrl, 0x1, 28, 1);