summaryrefslogtreecommitdiff
authorzhiqiang liang <zhiqiang.liang@amlogic.com>2019-03-11 11:46:30 (GMT)
committer Zhiqiang Liang <zhiqiang.liang@amlogic.com>2019-03-29 11:00:40 (GMT)
commitf9690587c49e69bac2e3545f3463d4a6060629c9 (patch)
tree588a5ba226616b955dec5318222e42aa306f0ca3
parentb3690fb7a586f157736a4526f21a19a28663db04 (diff)
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dts: commit dts for SM1 bringup [1/1]
PD#SWPL-5865 Problem: SM1 bring up Solution: commit dts for SM1 bringup Verify: PxP Change-Id: Id117d7ff130c67feb8ca04657d8a4ad463793fed Signed-off-by: zhiqiang liang <zhiqiang.liang@amlogic.com> Signed-off-by: Jianxiong Pan <jianxiong.pan@amlogic.com>
Diffstat
-rw-r--r--MAINTAINERS26
-rw-r--r--arch/arm/boot/dts/amlogic/mesonsm1-bifrost.dtsi128
-rw-r--r--arch/arm/boot/dts/amlogic/mesonsm1.dtsi2590
-rw-r--r--arch/arm/boot/dts/amlogic/sm1_pxp.dts729
-rw-r--r--arch/arm64/boot/dts/amlogic/mesongsm1-bifrost.dtsi128
-rw-r--r--arch/arm64/boot/dts/amlogic/mesongsm1.dtsi2590
-rw-r--r--arch/arm64/boot/dts/amlogic/sm1_pxp.dts729
-rw-r--r--[-rwxr-xr-x]scripts/amlogic/mk_dtb_gx.sh2
8 files changed, 6914 insertions, 8 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index b9217c6..c6dd1c1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13796,7 +13796,6 @@ F: arch/arm/boot/dts/amlogic>
ANLOGIC AUDIO
M: Xing Wang <xing.wang@amlogic.com>
-M: Zhe Wang <Zhe.Wang@amlogic.com>
F: arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts
F: arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts
F: arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts
@@ -14053,6 +14052,13 @@ AMLOGIC AXG ADD AO CLK
M: Yun Cai <yun.cai@amlogic.com>
F: drivers/amlogic/clk/axg/axg_ao.c
+AMLOGIC Irblaster driver
+M: Zan Peng <zan.peng@amlogic.com>
+F: drivers/amlogic/irblaster/irblaster.c
+F: drivers/amlogic/irblaster/irblaster.h
+F: drivers/amlogic/irblaster/Kconfig
+F: drivers/amlogic/irblaster/Makefile
+
AMLOGIC AXG ADD CLKMSR INTERFACE
M: wang xing <xing.wang@amlogic.com>
F: include/linux/amlogic/clk_measure.h
@@ -14408,9 +14414,9 @@ F: drivers/amlogic/cpufreq/meson-cpufreq.c
F: drivers/amlogic/clk/clk-cpu-fclk-composite.c
AMLOGIC Irblaster driver
-M: Bichao.Zheng <bichao.zheng@amlogic.com>
-F: drivers/amlogic/irblaster/*
-F: include/linux/amlogic/irblaster*
+M: yu.tu <yu.tu@amlogic.com>
+F: drivers/amlogic/irblaster/meson-irblaster.c
+F: drivers/amlogic/irblaster/meson-irblaster.h
AMLOGIC THERMAL DRIVER
M: Huan Biao <huan.biao@amlogic.com>
@@ -14505,7 +14511,6 @@ F: drivers/amlogic/defendkey/*
AMLOGIC DEBUG
M: Jianxin Pan <jianxin.pan@amlogic.com>
-M: Tao Guo <tao.guo@amlogic.com>
F: drivers/amlogic/debug/*
AMLOGIC G12A spdif channel status
@@ -14804,6 +14809,11 @@ F: arch/arm/boot/dts/amlogic/axg_s400_v03sbr.dts
F: sound/soc/codecs/amlogic/tas5782m.c
F: sound/soc/codecs/amlogic/tas5782m.h
-AMLOGIC TL1 VAD
-M: Wenbiao Zhang <wenbiao.zhang@amlogic.com>
-F: include/linux/amlogic/vad_api.h
+AMLOGIC SM1 DTS
+M: Zhiqiang Liang <Zhiqiang.Liang@amlogic.com>
+F: arch/arm64/boot/dts/amlogic/mesongsm1-bifrost.dtsi
+F: arch/arm64/boot/dts/amlogic/mesongsm1.dtsi
+F: arch/arm64/boot/dts/amlogic/sm1_pxp.dts
+F: arch/arm/boot/dts/amlogic/mesongsm1-bifrost.dtsi
+F: arch/arm/boot/dts/amlogic/mesongsm1.dtsi
+F: arch/arm/boot/dts/amlogic/sm1_pxp.dts
diff --git a/arch/arm/boot/dts/amlogic/mesonsm1-bifrost.dtsi b/arch/arm/boot/dts/amlogic/mesonsm1-bifrost.dtsi
new file mode 100644
index 0000000..5875d72
--- a/dev/null
+++ b/arch/arm/boot/dts/amlogic/mesonsm1-bifrost.dtsi
@@ -0,0 +1,128 @@
+/*
+ * arch/arm64/boot/dts/amlogic/mesonsm1-bifrost.dtsi
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/ {
+
+ gpu:bifrost {
+ compatible = "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
+ #cooling-cells = <2>; /* min followed by max */
+ reg = <0xFFE40000 0x04000>, /*mali APB bus base address*/
+ <0xFFD01000 0x01000>, /*reset register*/
+ <0xFF800000 0x01000>, /*aobus for gpu pmu domain*/
+ <0xFF63c000 0x01000>, /*hiubus for gpu clk cntl*/
+ <0xFFD01000 0x01000>; /*reset register*/
+ interrupt-parent = <&gic>;
+ interrupts = <0 160 4>, <0 161 4>, <0 162 4>;
+ interrupt-names = "GPU", "MMU", "JOB";
+ /* ACE-Lite = 0; ACE = 1; No-coherency = 31; */
+ /* system-coherency = <31>; */
+
+ num_of_pp = <2>;
+ sc_mpp = <1>; /* number of shader cores used most of time. */
+ clocks = <&clkc CLKID_GPU_MUX &clkc CLKID_GP0_PLL>;
+ clock-names = "gpu_mux","gp0_pll";
+
+
+ tbl = <&dvfs285_cfg
+ &dvfs400_cfg
+ &dvfs500_cfg
+ &dvfs666_cfg
+ &dvfs850_cfg
+ &dvfs850_cfg>;
+
+ dvfs125_cfg:clk125_cfg {
+ clk_freq = <125000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ clk_reg = <0xA03>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <30 120>;
+ };
+
+ dvfs250_cfg:dvfs250_cfg {
+ clk_freq = <250000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ clk_reg = <0xA01>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <80 170>;
+ };
+
+ dvfs285_cfg:dvfs285_cfg {
+ clk_freq = <285714285>;
+ clk_parent = "fclk_div7";
+ clkp_freq = <285714285>;
+ clk_reg = <0xE00>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <100 190>;
+ };
+
+ dvfs400_cfg:dvfs400_cfg {
+ clk_freq = <400000000>;
+ clk_parent = "fclk_div5";
+ clkp_freq = <400000000>;
+ clk_reg = <0xC00>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <152 207>;
+ };
+
+ dvfs500_cfg:dvfs500_cfg {
+ clk_freq = <500000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ clk_reg = <0xA00>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <180 220>;
+ };
+
+ dvfs666_cfg:dvfs666_cfg {
+ clk_freq = <666666666>;
+ clk_parent = "fclk_div3";
+ clkp_freq = <666666666>;
+ clk_reg = <0x800>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <210 236>;
+ };
+
+ dvfs800_cfg:dvfs800_cfg {
+ clk_freq = <800000000>;
+ clk_parent = "fclk_div2p5";
+ clkp_freq = <800000000>;
+ clk_reg = <0x600>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <230 255>;
+ };
+
+ dvfs850_cfg:dvfs850_cfg {
+ clk_freq = <846000000>;
+ clk_parent = "gp0_pll";
+ clkp_freq = <846000000>;
+ clk_reg = <0x200>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <230 255>;
+ };
+ };
+
+};/* end of / */
diff --git a/arch/arm/boot/dts/amlogic/mesonsm1.dtsi b/arch/arm/boot/dts/amlogic/mesonsm1.dtsi
new file mode 100644
index 0000000..745d380
--- a/dev/null
+++ b/arch/arm/boot/dts/amlogic/mesonsm1.dtsi
@@ -0,0 +1,2590 @@
+/*
+ * arch/arm/boot/dts/amlogic/mesonsm1.dtsi
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/amlogic,g12a-clkc.h>
+#include <dt-bindings/clock/amlogic,g12a-audio-clk.h>
+#include <dt-bindings/iio/adc/amlogic-saradc.h>
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/meson_rc.h>
+#include <dt-bindings/phy/phy-amlogic-pcie.h>
+#include "mesonsm1-bifrost.dtsi"
+
+/ {
+ cpus:cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0:cluster0 {
+ core0 {
+ cpu = <&CPU0>;
+ };
+ core1 {
+ cpu = <&CPU1>;
+ };
+ core2 {
+ cpu = <&CPU2>;
+ };
+ core3 {
+ cpu = <&CPU3>;
+ };
+ };
+ };
+
+ CPU0:cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU1:cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x1>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU2:cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x2>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU3:cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x3>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ idle-states {
+ entry-method = "arm,psci-0.2";
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0010000>;
+ local-timer-stop;
+ entry-latency-us = <5000>;
+ exit-latency-us = <5000>;
+ min-residency-us = <15000>;
+ };
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 0xff08>,
+ <GIC_PPI 14 0xff08>,
+ <GIC_PPI 11 0xff08>,
+ <GIC_PPI 10 0xff08>;
+ };
+
+ timer_bc {
+ compatible = "arm, meson-bc-timer";
+ reg= <0xffd0f190 0x4 0xffd0f194 0x4>;
+ timer_name = "Meson TimerF";
+ clockevent-rating=<300>;
+ clockevent-shift=<20>;
+ clockevent-features=<0x23>;
+ interrupts = <0 60 1>;
+ bit_enable=<16>;
+ bit_mode=<12>;
+ bit_resolution=<0>;
+ };
+
+ arm_pmu {
+ compatible = "arm,cortex-a15-pmu";
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xff634680 0x4>;
+ cpumasks = <0xf>;
+ /* default 10ms */
+ relax-timer-ns = <10000000>;
+ /* default 10000us */
+ max-wait-cnt = <10000>;
+ };
+
+ gic: interrupt-controller@2c001000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0xffc01000 0x1000>,
+ <0xffc02000 0x0100>;
+ interrupts = <GIC_PPI 9 0xf04>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ meson_suspend:pm {
+ compatible = "amlogic, pm";
+ status = "okay";
+ device_name = "aml_pm";
+ reg = <0xff8000a8 0x4>,
+ <0xff80023c 0x4>;
+ };
+
+ secmon {
+ compatible = "amlogic, secmon";
+ memory-region = <&secmon_reserved>;
+ in_base_func = <0x82000020>;
+ out_base_func = <0x82000021>;
+ reserve_mem_size = <0x00300000>;
+ };
+
+ securitykey {
+ compatible = "aml, securitykey";
+ storage_query = <0x82000060>;
+ storage_read = <0x82000061>;
+ storage_write = <0x82000062>;
+ storage_tell = <0x82000063>;
+ storage_verify = <0x82000064>;
+ storage_status = <0x82000065>;
+ storage_list = <0x82000067>;
+ storage_remove = <0x82000068>;
+ storage_in_func = <0x82000023>;
+ storage_out_func = <0x82000024>;
+ storage_block_func = <0x82000025>;
+ storage_size_func = <0x82000027>;
+ storage_set_enctype = <0x8200006A>;
+ storage_get_enctype = <0x8200006B>;
+ storage_version = <0x8200006C>;
+ };
+
+ mailbox: mhu@c883c400 {
+ compatible = "amlogic, meson_mhu";
+ reg = <0xff63c400 0x4c>, /* MHU registers */
+ <0xfffe7000 0x800>; /* Payload area */
+ interrupts = <0 209 1>, /* low priority interrupt */
+ <0 210 1>; /* high priority interrupt */
+ #mbox-cells = <1>;
+ mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
+ mboxes = <&mailbox 0 &mailbox 1>;
+ };
+
+ cpu_iomap {
+ compatible = "amlogic, iomap";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base {
+ reg = <0xffd00000 0x26000>;
+ };
+ io_apb_base {
+ reg = <0xffe01000 0x7f000>;
+ };
+ io_aobus_base {
+ reg = <0xff800000 0xb000>;
+ };
+ io_vapb_base {
+ reg = <0xff900000 0x50000>;
+ };
+ io_hiu_base {
+ reg = <0xff63c000 0x2000>;
+ };
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+
+ rtc{
+ compatible = "amlogic, aml_vrtc";
+ alarm_reg_addr = <0xff8000a8>;
+ timer_e_addr = <0xffd0f188>;
+ init_date = "2015/01/01";
+ status = "okay";
+ };
+
+ cpu_info {
+ compatible = "amlogic, cpuinfo";
+ status = "okay";
+ cpuinfo_cmd = <0x82000044>;
+ };
+
+ aml_reboot{
+ compatible = "aml, reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+ };
+
+ vpu {
+ compatible = "amlogic, vpu-g12a";
+ dev_name = "vpu";
+ status = "okay";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_VPU_INTR>,
+ <&clkc CLKID_VPU_P0_COMP>,
+ <&clkc CLKID_VPU_P1_COMP>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "vapb_clk",
+ "vpu_intr_gate",
+ "vpu_clk0",
+ "vpu_clk1",
+ "vpu_clk";
+ clk_level = <7>;
+ /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
+ /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
+ };
+
+ ethmac: ethernet@ff3f0000 {
+ compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
+ reg = <0xff3f0000 0x10000
+ 0xff634540 0x8
+ 0xff64c000 0xa0>;
+ reg-names = "eth_base", "eth_cfg", "eth_pll";
+ interrupts = <0 8 1>;
+ interrupt-names = "macirq";
+ status = "disabled";
+ clocks = <&clkc CLKID_ETH_CORE>;
+ clock-names = "ethclk81";
+ pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>;
+ analog_val = <0x20200000 0x0000c000 0x00000023>;
+ };
+
+ pinctrl_aobus: pinctrl@ff800014{
+ compatible = "amlogic,meson-g12a-aobus-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio_ao: ao-bank@ff800014{
+ reg = <0xff800014 0x8>,
+ <0xff800024 0x14>,
+ <0xff80001c 0x8>;
+ reg-names = "mux","gpio", "drive-strength";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ pinctrl_periphs: pinctrl@ff634480{
+ compatible = "amlogic,meson-g12a-periphs-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio: banks@ff6346c0{
+ reg = <0xff6346c0 0x40>,
+ <0xff6344e8 0x18>,
+ <0xff634520 0x18>,
+ <0xff634440 0x4c>,
+ <0xff634740 0x1c>;
+ reg-names = "mux",
+ "pull",
+ "pull-enable",
+ "gpio",
+ "drive-strength";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ audio_data: audio_data {
+ compatible = "amlogic, audio_data";
+ query_licence_cmd = <0x82000050>;
+ status = "disabled";
+ };
+
+ dwc3: dwc3@ff500000 {
+ compatible = "synopsys, dwc3";
+ status = "disable";
+ reg = <0xff500000 0x100000>;
+ interrupts = <0 30 4>;
+ usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>;
+ cpu-type = "gxl";
+ clock-src = "usb3.0";
+ clocks = <&clkc CLKID_USB_GENERAL>;
+ clock-names = "dwc_general";
+ };
+
+ usb2_phy_v2: usb2phy@ffe09000 {
+ compatible = "amlogic, amlogic-new-usb2-v2";
+ status = "disable";
+ reg = <0xffe09000 0x80
+ 0xffd01008 0x100
+ 0xff636000 0x2000
+ 0xff63a000 0x2000>;
+ pll-setting-1 = <0x09400414>;
+ pll-setting-2 = <0x927E0000>;
+ pll-setting-3 = <0xac5f49e5>;
+ pll-setting-4 = <0xfe18>;
+ pll-setting-5 = <0x8000fff>;
+ pll-setting-6 = <0x78000>;
+ pll-setting-7 = <0xe0004>;
+ pll-setting-8 = <0xe000c>;
+ };
+
+ usb3_phy_v2: usb3phy@ffe09080 {
+ compatible = "amlogic, amlogic-new-usb3-v2";
+ status = "disable";
+ reg = <0xffe09080 0x20>;
+ phy-reg = <0xff646000>;
+ phy-reg-size = <0x2000>;
+ usb2-phy-reg = <0xffe09000>;
+ usb2-phy-reg-size = <0x80>;
+ interrupts = <0 16 4>;
+ clocks = <&clkc CLKID_PCIE_PLL>;
+ clock-names = "pcie_refpll";
+ };
+
+ dwc2_a: dwc2_a@ff400000 {
+ compatible = "amlogic, dwc2";
+ status = "disable";
+ device_name = "dwc2_a";
+ reg = <0xff400000 0x40000>;
+ interrupts = <0 31 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+ port-dma = <0>;
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "v2";
+ phy-reg = <0xffe09000>;
+ phy-reg-size = <0xa0>;
+ /** phy-interface: 0x0: amlogic phy, 0x1: synopsys phy **/
+ phy-interface = <0x0>;
+ clocks = <&clkc CLKID_USB_GENERAL
+ &clkc CLKID_USB1_TO_DDR>;
+ clock-names = "usb_general",
+ "usb1";
+ };
+
+ wdt: watchdog@0xffd0f0d0 {
+ compatible = "amlogic, meson-wdt";
+ status = "okay";
+ default_timeout=<10>;
+ reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
+ reset_watchdog_time=<2>;
+ shutdown_timeout=<10>;
+ firmware_timeout=<6>;
+ suspend_timeout=<6>;
+ reg = <0xffd0f0d0 0x10>;
+ clock-names = "xtal";
+ clocks = <&xtal>;
+ };
+
+ ram-dump {
+ compatible = "amlogic, ram_dump";
+ status = "okay";
+ reg = <0xFF6345E0 4>;
+ reg-names = "PREG_STICKY_REG8";
+ };
+
+ jtag {
+ compatible = "amlogic, jtag";
+ status = "okay";
+ select = "disable"; /* disable/apao/apee */
+ pinctrl-names="jtag_apao_pins", "jtag_apee_pins";
+ pinctrl-0=<&jtag_apao_pins>;
+ pinctrl-1=<&jtag_apee_pins>;
+ };
+
+ saradc:saradc {
+ compatible = "amlogic,meson-g12a-saradc";
+ status = "okay";
+ #io-channel-cells = <1>;
+ clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
+ clock-names = "xtal", "saradc_clk";
+ interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
+ reg = <0xff809000 0x48>;
+ };
+
+ p_tsensor: p_tsensor@ff634594 {
+ compatible = "amlogic, r1p1-tsensor";
+ device_name = "meson-pthermal";
+ status = "okay";
+ reg = <0xff634800 0x50>,
+ <0xff800268 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 35 0>;
+ clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ d_tsensor: d_tsensor@ff800228 {
+ compatible = "amlogic, r1p1-tsensor";
+ device_name = "meson-dthermal";
+ status = "okay";
+ reg = <0xff634c00 0x50>,
+ <0xff800230 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 36 0>;
+ clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ cbus: cbus@ffd00000 {
+ compatible = "simple-bus";
+ reg = <0xffd00000 0x26000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xffd00000 0x26000>;
+
+ gpio_intc: interrupt-controller@f080 {
+ compatible = "amlogic,meson-gpio-intc",
+ "amlogic,meson-g12a-gpio-intc";
+ reg = <0xf080 0x10>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ amlogic,channel-interrupts =
+ <64 65 66 67 68 69 70 71>;
+ status = "okay";
+ };
+
+ meson_clk_msr {
+ compatible = "amlogic, gxl_measure";
+ reg = <0x18004 0x4
+ 0x1800c 0x4>;
+ ringctrl = <0xff6345fc>;
+ };
+
+ pwm_ab: pwm@1b000 {
+ compatible = "amlogic,g12a-ee-pwm";
+ reg = <0x1b000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ /* default xtal 24m clkin0-clkin2 and
+ * clkin1-clkin3 should be set the same
+ */
+ status = "disabled";
+ };
+
+ pwm_cd: pwm@1a000 {
+ compatible = "amlogic,g12a-ee-pwm";
+ reg = <0x1a000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ pwm_ef: pwm@19000 {
+ compatible = "amlogic,g12a-ee-pwm";
+ reg = <0x19000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ i2c0: i2c@1f000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x1f000 0x20>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 91 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c1: i2c@1e000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x1e000 0x20>;
+ interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c2: i2c@1d000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x1d000 0x20>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 94 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c3: i2c@1c000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x1c000 0x20>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ spicc0: spi@13000 {
+ compatible = "amlogic,meson-g12a-spicc";
+ reg = <0x13000 0x44>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC0>,
+ <&clkc CLKID_SPICC0_COMP>;
+ clock-names = "core", "comp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spicc1: spi@15000 {
+ compatible = "amlogic,meson-g12a-spicc";
+ reg = <0x15000 0x44>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC1>,
+ <&clkc CLKID_SPICC1_COMP>;
+ clock-names = "core", "comp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ }; /* end of cbus */
+
+ aobus: aobus@ff800000 {
+ compatible = "simple-bus";
+ reg = <0xff800000 0xb000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff800000 0xb000>;
+
+ cpu_version {
+ reg=<0x220 0x4>;
+ };
+
+ aoclkc: clock-controller@0 {
+ compatible = "amlogic,g12a-aoclkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x320>;
+ };
+
+ pwm_AO_ab: pwm@7000 {
+ compatible = "amlogic,g12a-ao-pwm";
+ reg = <0x7000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ pwm_AO_cd: pwm@2000 {
+ compatible = "amlogic,g12a-ao-pwm";
+ reg = <0x2000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ i2c_AO: i2c@5000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x05000 0x20>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c_AO_slave:i2c_slave@6000 {
+ compatible = "amlogic, meson-i2c-slave";
+ status = "disabled";
+ reg = <0x6000 0x20>;
+ interrupts = <0 194 1>;
+ pinctrl-names="default";
+ pinctrl-0=<&ao_i2c_slave_pins>;
+ };
+
+ uart_AO: serial@3000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x3000 0x18>;
+ interrupts = <0 193 1>;
+ status = "okay";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ xtal_tick_en = <2>;
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ /*pinctrl-0 = <&ao_uart_pins>;*/
+ support-sysrq = <0>; /* 0 not support*/
+ };
+
+ uart_AO_B: serial@4000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x4000 0x18>;
+ interrupts = <0 197 1>;
+ status = "disabled";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_b_uart_pins>;
+ };
+ };/* end of aobus */
+
+ periphs: periphs@ff634400 {
+ compatible = "simple-bus";
+ reg = <0xff634400 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff634400 0x400>;
+
+ };/* end of periphs */
+
+ hiubus: hiubus@ff63c000 {
+ compatible = "simple-bus";
+ reg = <0xff63c000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff63c000 0x2000>;
+
+ clkc: clock-controller@0 {
+ compatible = "amlogic,g12a-clkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x320>;
+ };
+ };/* end of hiubus*/
+
+ ion_dev {
+ compatible = "amlogic, ion_dev";
+ memory-region = <&ion_cma_reserved>;
+ };/* end of ion_dev*/
+
+ audiobus: audiobus@0xff642000 {
+ compatible = "amlogic, audio-controller", "simple-bus";
+ reg = <0xff642000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff642000 0x2000>;
+ clkaudio: audio_clocks {
+ compatible = "amlogic, g12a-audio-clocks";
+ #clock-cells = <1>;
+ reg = <0x0 0xb0>;
+ };
+ ddr_manager {
+ compatible = "amlogic, g12a-audio-ddr-manager";
+ interrupts = <
+ GIC_SPI 148 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 149 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 150 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 152 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 153 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 154 IRQ_TYPE_EDGE_RISING
+ >;
+ interrupt-names =
+ "toddr_a", "toddr_b", "toddr_c",
+ "frddr_a", "frddr_b", "frddr_c";
+ };
+ };/* end of audiobus*/
+
+ }; /* end of soc*/
+
+ remote:rc@0xff808040 {
+ compatible = "amlogic, aml_remote";
+ dev_name = "meson-remote";
+ reg = <0xff808040 0x44>, /*Multi-format IR controller*/
+ <0xff808000 0x20>; /*Legacy IR controller*/
+ status = "okay";
+ protocol = <REMOTE_TYPE_NEC>;
+ led_blink = <1>;
+ led_blink_frq = <100>;
+ interrupts = <0 196 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&remote_pins>;
+ map = <&custom_maps>;
+ max_frame_time = <200>; /*set software decoder max frame time*/
+ };
+
+ custom_maps:custom_maps {
+ mapnum = <3>;
+ map0 = <&map_0>;
+ map1 = <&map_1>;
+ map2 = <&map_2>;
+ map_0: map_0{
+ mapname = "amlogic-remote-1";
+ customcode = <0xfb04>;
+ release_delay = <80>;
+ size = <50>; /*keymap size*/
+ keymap = <REMOTE_KEY(0x47, KEY_0)
+ REMOTE_KEY(0x13, KEY_1)
+ REMOTE_KEY(0x10, KEY_2)
+ REMOTE_KEY(0x11, KEY_3)
+ REMOTE_KEY(0x0F, KEY_4)
+ REMOTE_KEY(0x0C, KEY_5)
+ REMOTE_KEY(0x0D, KEY_6)
+ REMOTE_KEY(0x0B, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x5C, KEY_RIGHTCTRL)
+ REMOTE_KEY(0x51, KEY_F3)
+ REMOTE_KEY(0x50, KEY_F4)
+ REMOTE_KEY(0x40, KEY_F5)
+ REMOTE_KEY(0x4d, KEY_F6)
+ REMOTE_KEY(0x43, KEY_F7)
+ REMOTE_KEY(0x17, KEY_F8)
+ REMOTE_KEY(0x00, KEY_F9)
+ REMOTE_KEY(0x01, KEY_F10)
+ REMOTE_KEY(0x16, KEY_F11)
+ REMOTE_KEY(0x49, KEY_BACKSPACE)
+ REMOTE_KEY(0x06, KEY_PROPS)
+ REMOTE_KEY(0x14, KEY_UNDO)
+ REMOTE_KEY(0x44, KEY_UP)
+ REMOTE_KEY(0x1D, KEY_DOWN)
+ REMOTE_KEY(0x1C, KEY_LEFT)
+ REMOTE_KEY(0x48, KEY_RIGHT)
+ REMOTE_KEY(0x53, KEY_LEFTMETA)
+ REMOTE_KEY(0x45, KEY_PAGEUP)
+ REMOTE_KEY(0x19, KEY_PAGEDOWN)
+ REMOTE_KEY(0x52, KEY_PAUSE)
+ REMOTE_KEY(0x05, KEY_HANGEUL)
+ REMOTE_KEY(0x59, KEY_HANJA)
+ REMOTE_KEY(0x1b, KEY_SCALE)
+ REMOTE_KEY(0x04, KEY_KPCOMMA)
+ REMOTE_KEY(0x1A, KEY_POWER)
+ REMOTE_KEY(0x0A, KEY_TAB)
+ REMOTE_KEY(0x0e, KEY_MUTE)
+ REMOTE_KEY(0x1F, KEY_HOME)
+ REMOTE_KEY(0x1e, KEY_FRONT)
+ REMOTE_KEY(0x07, KEY_COPY)
+ REMOTE_KEY(0x12, KEY_OPEN)
+ REMOTE_KEY(0x54, KEY_PASTE)
+ REMOTE_KEY(0x02, KEY_FIND)
+ REMOTE_KEY(0x4f, KEY_A)
+ REMOTE_KEY(0x42, KEY_B)
+ REMOTE_KEY(0x5d, KEY_C)
+ REMOTE_KEY(0x4c, KEY_D)
+ REMOTE_KEY(0x58, KEY_CUT)
+ REMOTE_KEY(0x55, KEY_CALC)>;
+ };
+ map_1: map_1{
+ mapname = "amlogic-remote-2";
+ customcode = <0xfe01>;
+ release_delay = <80>;
+ size = <53>;
+ keymap = <REMOTE_KEY(0x01, KEY_1)
+ REMOTE_KEY(0x02, KEY_2)
+ REMOTE_KEY(0x03, KEY_3)
+ REMOTE_KEY(0x04, KEY_4)
+ REMOTE_KEY(0x05, KEY_5)
+ REMOTE_KEY(0x06, KEY_6)
+ REMOTE_KEY(0x07, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x0a, KEY_0)
+ REMOTE_KEY(0x1F, KEY_FN_F1)
+ REMOTE_KEY(0x15, KEY_MENU)
+ REMOTE_KEY(0x16, KEY_TAB)
+ REMOTE_KEY(0x0c, KEY_CHANNELUP)
+ REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+ REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+ REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+ REMOTE_KEY(0x11, KEY_HOME)
+ REMOTE_KEY(0x1c, KEY_RIGHT)
+ REMOTE_KEY(0x1b, KEY_LEFT)
+ REMOTE_KEY(0x19, KEY_UP)
+ REMOTE_KEY(0x1a, KEY_DOWN)
+ REMOTE_KEY(0x1d, KEY_ENTER)
+ REMOTE_KEY(0x17, KEY_MUTE)
+ REMOTE_KEY(0x49, KEY_FINANCE)
+ REMOTE_KEY(0x43, KEY_BACK)
+ REMOTE_KEY(0x12, KEY_FN_F4)
+ REMOTE_KEY(0x14, KEY_FN_F5)
+ REMOTE_KEY(0x18, KEY_FN_F6)
+ REMOTE_KEY(0x59, KEY_INFO)
+ REMOTE_KEY(0x5a, KEY_STOPCD)
+ REMOTE_KEY(0x10, KEY_POWER)
+ REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+ REMOTE_KEY(0x44, KEY_NEXTSONG)
+ REMOTE_KEY(0x1e, KEY_REWIND)
+ REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+ REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+ REMOTE_KEY(0x46, KEY_PROPS)
+ REMOTE_KEY(0x40, KEY_UNDO)
+ REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+ REMOTE_KEY(0x57, KEY_FN)
+ REMOTE_KEY(0x5b, KEY_FN_ESC)
+ REMOTE_KEY(0x54, KEY_RED)
+ REMOTE_KEY(0x4c, KEY_GREEN)
+ REMOTE_KEY(0x4e, KEY_YELLOW)
+ REMOTE_KEY(0x55, KEY_BLUE)
+ REMOTE_KEY(0x53, KEY_BLUETOOTH)
+ REMOTE_KEY(0x52, KEY_WLAN)
+ REMOTE_KEY(0x39, KEY_CAMERA)
+ REMOTE_KEY(0x41, KEY_SOUND)
+ REMOTE_KEY(0x0b, KEY_QUESTION)
+ REMOTE_KEY(0x00, KEY_CHAT)
+ REMOTE_KEY(0x13, KEY_SEARCH)>;
+ };
+ map_2: map_2{
+ mapname = "amlogic-remote-3";
+ customcode = <0xbd02>;
+ release_delay = <80>;
+ size = <17>;
+ keymap = <REMOTE_KEY(0xca,103)
+ REMOTE_KEY(0xd2,108)
+ REMOTE_KEY(0x99,105)
+ REMOTE_KEY(0xc1,106)
+ REMOTE_KEY(0xce,97)
+ REMOTE_KEY(0x45,116)
+ REMOTE_KEY(0xc5,133)
+ REMOTE_KEY(0x80,113)
+ REMOTE_KEY(0xd0,15)
+ REMOTE_KEY(0xd6,125)
+ REMOTE_KEY(0x95,102)
+ REMOTE_KEY(0xdd,104)
+ REMOTE_KEY(0x8c,109)
+ REMOTE_KEY(0x89,131)
+ REMOTE_KEY(0x9c,130)
+ REMOTE_KEY(0x9a,120)
+ REMOTE_KEY(0xcd,121)>;
+ };
+ };
+
+ uart_A: serial@ffd24000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xffd24000 0x18>;
+ interrupts = <0 26 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART0>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 128 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins>;
+ };
+
+ uart_B: serial@ffd23000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xffd23000 0x18>;
+ interrupts = <0 75 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&b_uart_pins>;
+ };
+
+ uart_C: serial@ffd22000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xffd22000 0x18>;
+ interrupts = <0 93 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins>;
+ };
+
+
+ pcie_A: pcieA@fc000000 {
+ compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
+ reg = <0xfc000000 0x400000
+ 0xff648000 0x2000
+ 0xfc400000 0x200000
+ 0xff646000 0x2000
+ 0xffd01080 0x10>;
+ reg-names = "elbi", "cfg", "config", "phy", "reset";
+ interrupts = <0 221 0>;
+ #interrupt-cells = <1>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_EDGE_RISING>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0xfc600000 0x0 0x100000
+ /* downstream I/O */
+ 0x82000000 0xfc700000 0x0 0xfc700000 0 0x1900000>;
+ /* non-prefetchable memory */
+ num-lanes = <1>;
+ pcie-num = <1>;
+
+ clocks = <&clkc CLKID_PCIE_PLL
+ &clkc CLKID_PCIE_COMB
+ &clkc CLKID_PCIE_PHY>;
+ clock-names = "pcie_refpll",
+ "pcie",
+ "pcie_phy";
+ /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/
+ gpio-type = <2>;
+ pcie-apb-rst-bit = <15>;
+ pcie-phy-rst-bit = <14>;
+ pcie-ctrl-a-rst-bit = <12>;
+ status = "disabled";
+ };
+
+ amhdmitx: amhdmitx{
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "okay";
+ vend-data = <&vend_data>;
+ pinctrl-names="default", "hdmitx_i2c";
+ pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+ pinctrl-1=<&hdmitx_hpd_gpio &i2c3_master_pins1>;
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_VAPB_MUX
+ &clkc CLKID_VPU_MUX>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "hdmi_vapb_clk",
+ "hdmi_vpu_clk";
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ * 10:G12A
+ */
+ ic_type = <10>;
+ vend_data: vend_data{ /* Should modified by Customer */
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* standards.ieee.org/develop/regauth/oui/oui.txt */
+ vendor_id = <0x000000>;
+ };
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-g12a";
+ device_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "G12A"; /* Max Chars: 16 */
+ cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
+ cec_version = <5>;/*5:1.4;6:2.0*/
+ port_num = <1>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 203 1
+ 0 199 1>; /*0:snps 1:ts*/
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&eecec_a>;
+ pinctrl-1=<&eecec_b>;
+ pinctrl-2=<&eecec_b>;
+ reg = <0xFF80023c 0x4
+ 0xFF800000 0x400
+ 0xFF634400 0x26>;
+ reg-names = "ao_exit","ao","periphs";
+ };
+
+ /*if you want to use vdin just modify status to "ok"*/
+ vdin0: vdin0 {
+ compatible = "amlogic, vdin";
+ dev_name = "vdin0";
+ status = "disabled";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;2:cma alone*/
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ /*cma_size = <16>;*/
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <0>;
+ };
+ vdin1: vdin1 {
+ compatible = "amlogic, vdin";
+ dev_name = "vdin1";
+ status = "disabled";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ };
+
+ vout2 {
+ compatible = "amlogic, vout2";
+ dev_name = "vout";
+ status = "okay";
+ clocks = <&clkc CLKID_VPU_CLKC_P0_COMP>,
+ <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc0",
+ "vpu_clkc";
+ };
+
+ vdac {
+ compatible = "amlogic, vdac-g12a";
+ status = "okay";
+ };
+
+ canvas: canvas{
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "okay";
+ reg = <0xff638000 0x2000>;
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-g12a";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 146 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0xff940000 0x10000>;
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+ codec_io: codec_io {
+ compatible = "amlogic, codec_io";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base{
+ reg = <0xffd00000 0x100000>;
+ };
+ io_dos_base{
+ reg = <0xff620000 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0xff63c000 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0xff800000 0x10000>;
+ };
+ io_vcbus_base{
+ reg = <0xff900000 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0xff638000 0x2000>;
+ };
+ io_efuse_base{
+ reg = <0xff630000 0x2000>;
+ };
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS_PARSER
+ &clkc CLKID_DEMUX
+ &clkc CLKID_AHB_ARB0
+ &clkc CLKID_DOS
+ &clkc CLKID_CLK81
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVC_MUX
+ &clkc CLKID_HEVCF_MUX>;
+ clock-names = "parser_top",
+ "demux",
+ "ahbarb0",
+ "vdec",
+ "clk_81",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevc_mux",
+ "clk_hevcb_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ vcodec_dec {
+ compatible = "amlogic, vcodec-dec";
+ dev_name = "aml-vcodec-dec";
+ status = "okay";
+ };
+
+ amvenc_avc{
+ compatible = "amlogic, amvenc_avc";
+ dev_name = "amvenc_avc";
+ status = "okay";
+ interrupts = <0 45 1>;
+ interrupt-names = "mailbox_2";
+ };
+
+ hevc_enc{
+ compatible = "cnm, HevcEnc";
+ //memory-region = <&hevc_enc_reserved>;
+ dev_name = "HevcEnc";
+ status = "okay";
+ interrupts = <0 187 1>;
+ interrupt-names = "wave420l_irq";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_reg_base{
+ reg = <0xff610000 0x4000>;
+ };
+ };
+
+ rdma{
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "okay";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ meson_fb: meson-fb {
+ compatible = "amlogic, meson-g12a";
+ memory-region = <&logo_reserved>;
+ dev_name = "meson-fb";
+ status = "disable";
+ interrupts = <0 3 1
+ 0 56 1
+ 0 89 1>;
+ interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ scale_mode = <1>;
+ /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ display_size_default = <1920 1080 1920 2160 32>;
+ /*1920*1080*4*3 = 0x17BB000*/
+ clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc";
+ };
+ irblaster: meson-irblaster {
+ compatible = "amlogic, meson_irblaster";
+ reg = <0xff80014c 0x10>,
+ <0xff800040 0x4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&irblaster_pins>;
+ interrupts = <0 198 1>;
+ status = "okay";
+ };
+
+ sd_emmc_c: emmc@ffe07000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0xffe07000 0x800>;
+ interrupts = <0 191 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ /* mmc-ddr-1_8v; */
+ /* mmc-hs200-1_8v; */
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ /*caps defined in dts*/
+ tx_delay = <0>;
+ co_phase = <3>;
+ calc_f = <1>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_12 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b1:sd1@ffe05000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0xffe05000 0x800>;
+ interrupts = <0 190 1>;
+
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "sd_to_ao_jtag_pins",
+ "ao_to_sd_jtag_pins";
+
+ pinctrl-0 = <&sd_all_pins>;
+ pinctrl-1 = <&sd_clk_cmd_pins>;
+ pinctrl-2 = <&sd_1bit_pins>;
+ pinctrl-3 = <&sd_to_ao_uart_clr_pins
+ &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-6 = <&sd_to_ao_uart_clr_pins
+ &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-8 = <&sd_to_ao_uart_clr_pins
+ &ao_to_sd_uart_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+
+ sd_emmc_b2:sd2@ffe05000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0xffe05000 0x800>;
+ interrupts = <0 190 4>;
+
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "sd_to_ao_jtag_pins",
+ "ao_to_sd_jtag_pins",
+ "sdio_noclr_all_pins",
+ "sdio_noclr_clk_cmd_pins",
+ "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_x_clr_pins &sd_all_pins>;
+ pinctrl-1 = <&sdio_x_clr_pins &sd_clk_cmd_pins>;
+ pinctrl-2 = <&sdio_x_clr_pins &sd_1bit_pins>;
+ pinctrl-3 = <&sdio_x_clr_pins &sd_to_ao_uart_clr_pins
+ &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sdio_x_clr_pins &sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sdio_x_clr_pins
+ &sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-6 = <&sdio_x_en_pins &sd_to_ao_uart_clr_pins
+ &sd_clr_noall_pins &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sdio_x_en_pins
+ &sd_clr_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-8 = <&sdio_x_en_pins &sd_to_ao_uart_clr_pins
+ &sd_clr_noall_pins &ao_to_sd_uart_pins>;
+ pinctrl-9 = <&sd_clr_noall_pins
+ &sdio_x_en_pins &sdio_x_all_pins>;
+ pinctrl-10 = <&sd_clr_noall_pins
+ &sdio_x_en_pins &sdio_x_clk_cmd_pins>;
+ pinctrl-11 = <&sd_clr_all_pins
+ &sdio_x_en_pins &sdio_x_all_pins>;
+ pinctrl-12 = <&sd_clr_all_pins
+ &sdio_x_en_pins &sdio_x_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 5:NON sdio device(means sd/mmc card)
+ */
+ };
+
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 5:NON sdio device(means sd/mmc card)
+ */
+ };
+ };
+
+ sd_emmc_a:sdio@ffe03000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0xffe03000 0x800>;
+ interrupts = <0 189 4>;
+
+ pinctrl-names = "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_all_pins>;
+ pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_A>,
+ <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ /* max_req_size = <0x20000>; */ /**128KB*/
+ max_req_size = <0x400>;
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ dmode = "pio";
+ };
+ };
+
+ nand: nfc@0 {
+ compatible = "amlogic, aml_mtd_nand";
+ dev_name = "mtdnand";
+ status = "disabled";
+ reg = <0xFFE07800 0x200>;
+ interrupts = <0 34 1>;
+
+ pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&all_nand_pins>;
+ pinctrl-2 = <&nand_cs_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>;
+ clock-names = "core", "clkin";
+
+ device_id = <0>;
+ /*fip/tpl configurations, must be same
+ * with uboot if bl_mode was set as 1
+ * bl_mode: 0 compact mode; 1 descrete mode
+ * if bl_mode was set as 1, fip configuration will work
+ */
+ bl_mode = <1>;
+ /*copy count of fip*/
+ fip_copies = <4>;
+ /*size of each fip copy */
+ fip_size = <0x200000>;
+ nand_clk_ctrl = <0xFFE07000>;
+ /*partions defined in dts */
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "disabled";
+ compatible = "amlogic, meson-cooldev";
+ device_name = "mcooldev";
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <115>;
+ cluster_id = <0>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <358>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpufreq_cool0";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "gpucore_cool0";
+ device_type = "gpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpufreq_cool0:gpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore_cool0:gpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+ /*meson cooling devices end*/
+
+ thermal-zones {
+ soc_thermal: soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <1460>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ pswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ phot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ pcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpucore_cool0 0 3>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ gpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpucore_cool0 0 2>;
+ contribution = <1024>;
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <2150>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dhot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ dcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ };
+ };
+ /*thermal zone end*/
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, snd-iomap";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ pdm_bus {
+ reg = <0xFF640000 0x2000>;
+ };
+ audiobus_base {
+ reg = <0xFF642000 0x2000>;
+ };
+ audiolocker_base {
+ reg = <0xFF64A000 0x2000>;
+ };
+ eqdrc_base {
+ reg = <0xFF642800 0x1800>;
+ };
+ reset_base {
+ reg = <0xFFD01000 0x1000>;
+ };
+ };
+
+ vddcpu0: pwmao_d-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm_AO_cd MESON_PWM_1 1250 0>;
+ regulator-name = "vddcpu0";
+ regulator-min-microvolt = <721000>;
+ regulator-max-microvolt = <1022000>;
+ regulator-always-on;
+ max-duty-cycle = <1250>;
+ /* Voltage Duty-Cycle */
+ voltage-table = <1022000 0>,
+ <1011000 3>,
+ <1001000 6>,
+ <991000 10>,
+ <981000 13>,
+ <971000 16>,
+ <961000 20>,
+ <951000 23>,
+ <941000 26>,
+ <931000 30>,
+ <921000 33>,
+ <911000 36>,
+ <901000 40>,
+ <891000 43>,
+ <881000 46>,
+ <871000 50>,
+ <861000 53>,
+ <851000 56>,
+ <841000 60>,
+ <831000 63>,
+ <821000 67>,
+ <811000 70>,
+ <801000 73>,
+ <791000 76>,
+ <781000 80>,
+ <771000 83>,
+ <761000 86>,
+ <751000 90>,
+ <741000 93>,
+ <731000 96>,
+ <721000 100>;
+ status = "okay";
+ };
+
+ ddr_bandwidth {
+ compatible = "amlogic, ddr-bandwidth";
+ status = "okay";
+ reg = <0xff638000 0x100
+ 0xff638c00 0x100>;
+ interrupts = <0 52 1>;
+ interrupt-names = "ddr_bandwidth";
+ };
+ dmc_monitor {
+ compatible = "amlogic, dmc_monitor";
+ status = "okay";
+ reg_base = <0xff639000>;
+ interrupts = <0 51 1>;
+ };
+
+ defendkey: defendkey {
+ compatible = "amlogic, defendkey";
+ reg = <0xff630218 0x4>; /*RNG_USR_DATA*/
+ mem_size = <0 0x100000>;
+ status = "okay";
+ };
+
+ aml_dma {
+ compatible = "amlogic,aml_txlx_dma";
+ reg = <0xff63e000 0x48>;
+ interrupts = <0 180 1>;
+
+ aml_aes {
+ compatible = "amlogic,aes_g12a_dma";
+ dev_name = "aml_aes_dma";
+ status = "okay";
+ };
+
+ aml_sha {
+ compatible = "amlogic,sha_dma";
+ dev_name = "aml_sha_dma";
+ status = "okay";
+ };
+ };
+
+ rng {
+ compatible = "amlogic,meson-rng";
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0xff630218 0x4>;
+ quality = /bits/ 16 <1000>;
+ };
+
+ efuse: efuse{
+ compatible = "amlogic, efuse";
+ read_cmd = <0x82000030>;
+ write_cmd = <0x82000031>;
+ get_max_cmd = <0x82000033>;
+ key = <&efusekey>;
+ clocks = <&clkc CLKID_EFUSE>;
+ clock-names = "efuse_clk";
+ status = "disabled";
+ };
+
+ cpu_ver_name {
+ compatible = "amlogic, cpu-major-id-g12a";
+ };
+};/* end of / */
+
+&pinctrl_aobus {
+ sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
+ mux {
+ groups = "GPIOAO_0",
+ "GPIOAO_1";
+ function = "gpio_aobus";
+ };
+ };
+
+ sd_to_ao_uart_pins:sd_to_ao_uart_pins {
+ mux {
+ groups = "uart_ao_tx_a",
+ "uart_ao_rx_a";
+ function = "uart_ao_a";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ ao_uart_pins:ao_uart {
+ mux {
+ groups = "uart_ao_tx_a",
+ "uart_ao_rx_a";
+ function = "uart_ao_a";
+ };
+ };
+
+ ao_b_uart_pins:ao_b_uart {
+ mux {
+ groups = "uart_ao_tx_b_2",
+ "uart_ao_rx_b_3";
+ function = "uart_ao_b";
+ };
+ };
+
+ ao_i2c_master_pins1:ao_i2c_pins1 {
+ mux {
+ groups = "i2c_ao_sck",
+ "i2c_ao_sda";
+ function = "i2c_ao";
+ drive-strength = <2>;
+ };
+ };
+
+ ao_i2c_master_pins2:ao_i2c_pins2 {
+ mux {
+ groups = "i2c_ao_sck_e",
+ "i2c_ao_sda_e";
+ function = "i2c_ao";
+ drive-strength = <2>;
+ };
+ };
+
+ ao_i2c_slave_pins:ao_i2c_slave_pins {
+ mux {
+ groups = "i2c_ao_slave_sck",
+ "i2c_ao_slave_sda";
+ function = "i2c_ao_slave";
+ };
+ };
+
+ pwm_ao_a_pins: pwm_ao_a {
+ mux {
+ groups = "pwm_ao_a";
+ function = "pwm_ao_a";
+ };
+ };
+
+ pwm_ao_a_hiz_pins: pwm_ao_a_hiz {
+ mux {
+ groups = "pwm_ao_a_hiz";
+ function = "pwm_ao_a";
+ };
+ };
+
+ pwm_ao_b_pins: pwm_ao_b {
+ mux {
+ groups = "pwm_ao_b";
+ function = "pwm_ao_b";
+ };
+ };
+
+ pwm_ao_c_pins1: pwm_ao_c_pins1 {
+ mux {
+ groups = "pwm_ao_c_4";
+ function = "pwm_ao_c";
+ };
+ };
+
+ pwm_ao_c_pins2: pwm_ao_c_pins2 {
+ mux {
+ groups = "pwm_ao_c_6";
+ function = "pwm_ao_c";
+ };
+ };
+
+ pwm_ao_c_hiz_pins: pwm_ao_c_hiz {
+ mux {
+ groups = "pwm_ao_c_hiz_4";
+ function = "pwm_ao_c";
+ };
+ };
+
+ pwm_ao_d_pins1: pwm_ao_d_pins1 {
+ mux {
+ groups = "pwm_ao_d_5";
+ function = "pwm_ao_d";
+ };
+ };
+
+ pwm_ao_d_pins2: pwm_ao_d_pins2 {
+ mux {
+ groups = "pwm_ao_d_10";
+ function = "pwm_ao_d";
+ };
+ };
+
+ pwm_ao_d_pins3: pwm_ao_d_pins3 {
+ mux {
+ groups = "pwm_ao_d_e";
+ function = "pwm_ao_d";
+ };
+ };
+
+ aocec_a: ao_ceca {
+ mux {
+ groups = "cec_ao_a";
+ function = "cec_ao";
+ };
+ };
+
+ aocec_b: ao_cecb {
+ mux {
+ groups = "cec_ao_b";
+ function = "cec_ao";
+ };
+ };
+
+ jtag_apao_pins:jtag_apao_pin {
+ mux {
+ groups = "jtag_a_tdi",
+ "jtag_a_tdo",
+ "jtag_a_clk",
+ "jtag_a_tms";
+ function = "jtag_a";
+ };
+ };
+};
+
+&pinctrl_periphs {
+ /* sdemmc portC */
+ emmc_clk_cmd_pins:emmc_clk_cmd_pins {
+ mux {
+ groups = "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ emmc_conf_pull_up:emmc_conf_pull_up {
+ mux {
+ groups = "emmc_nand_d7",
+ "emmc_nand_d6",
+ "emmc_nand_d5",
+ "emmc_nand_d4",
+ "emmc_nand_d3",
+ "emmc_nand_d2",
+ "emmc_nand_d1",
+ "emmc_nand_d0",
+ "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ emmc_conf_pull_done:emmc_conf_pull_done {
+ mux {
+ groups = "emmc_nand_ds";
+ function = "emmc";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ /* sdemmc portB */
+ sd_clk_cmd_pins:sd_clk_cmd_pins {
+ mux {
+ groups = "sdcard_cmd_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "sdcard_clk_c";
+ function = "sdcard";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sd_all_pins:sd_all_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_d1_c",
+ "sdcard_d2_c",
+ "sdcard_d3_c",
+ "sdcard_cmd_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "sdcard_clk_c";
+ function = "sdcard";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sd_1bit_pins:sd_1bit_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_cmd_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "sdcard_clk_c";
+ function = "sdcard";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sd_clr_all_pins:sd_clr_all_pins {
+ mux {
+ groups = "GPIOC_0",
+ "GPIOC_1",
+ "GPIOC_2",
+ "GPIOC_3",
+ "GPIOC_5";
+ function = "gpio_periphs";
+ output-high;
+ };
+ mux1 {
+ groups = "GPIOC_4";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+ sd_clr_noall_pins:sd_clr_noall_pins {
+ mux {
+ groups = "GPIOC_0",
+ "GPIOC_1",
+ "GPIOC_4",
+ "GPIOC_5";
+ function = "gpio_periphs";
+ output-high;
+ };
+ };
+
+ ao_to_sd_uart_pins:ao_to_sd_uart_pins {
+ mux {
+ groups = "uart_ao_tx_a_c3",
+ "uart_ao_rx_a_c2";
+ function = "uart_ao_a_ee";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ /* sdemmc portA */
+ sdio_clk_cmd_pins:sdio_clk_cmd_pins {
+ mux {
+ groups = "sdio_clk",
+ "sdio_cmd";
+ function = "sdio";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+
+ sdio_all_pins:sdio_all_pins {
+ mux {
+ groups = "sdio_d0",
+ "sdio_d1",
+ "sdio_d2",
+ "sdio_d3",
+ "sdio_clk",
+ "sdio_cmd";
+ function = "sdio";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+
+ sdio_x_clk_cmd_pins:sdio_x_clk_cmd_pins {
+ mux {
+ groups = "GPIOX_5";
+ function = "gpio_periphs";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "GPIOX_4";
+ function = "gpio_periphs";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sdio_x_all_pins:sdio_x_all_pins {
+ mux {
+ groups = "GPIOX_0",
+ "GPIOX_1",
+ "GPIOX_2",
+ "GPIOX_3",
+ "GPIOX_5";
+ function = "gpio_periphs";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "GPIOX_4";
+ function = "gpio_periphs";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sdio_x_en_pins:sdio_x_en_pins {
+ mux {
+ groups = "sdio_dummy";
+ function = "sdio";
+ bias-pull-up;
+ output-high;
+ };
+ };
+
+ sdio_x_clr_pins:sdio_x_clr_pins {
+ mux {
+ groups = "GPIOV_0";
+ function = "gpio_periphs";
+ bias-pull-up;
+ output-low;
+ };
+ mux1 {
+ groups = "GPIOX_4";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+ all_nand_pins: all_nand_pins {
+ mux {
+ groups = "emmc_nand_d0",
+ "emmc_nand_d1",
+ "emmc_nand_d2",
+ "emmc_nand_d3",
+ "emmc_nand_d4",
+ "emmc_nand_d5",
+ "emmc_nand_d6",
+ "emmc_nand_d7",
+ "nand_ce0",
+ "nand_ale",
+ "nand_cle",
+ "nand_wen_clk",
+ "nand_ren_wr",
+ "nand_rb0";
+ function = "nand";
+ input-enable;
+ };
+ };
+
+ nand_cs_pins: nand_cs {
+ mux {
+ groups = "nand_ce0";
+ function = "nand";
+ };
+ };
+
+ i2c0_master_pins1:i2c0_pins1 {
+ mux {
+ groups = "i2c0_sda_c",
+ "i2c0_sck_c";
+ function = "i2c0";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c0_master_pins2:i2c0_pins2 {
+ mux {
+ groups = "i2c0_sda_z0",
+ "i2c0_sck_z1";
+ function = "i2c0";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c0_master_pins3:i2c0_pins3 {
+ mux {
+ groups = "i2c0_sda_z7",
+ "i2c0_sck_z8";
+ function = "i2c0";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c1_master_pins1:i2c1_pins1 {
+ mux {
+ groups = "i2c1_sda_x",
+ "i2c1_sck_x";
+ function = "i2c1";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c1_master_pins2:i2c1_pins2 {
+ mux {
+ groups = "i2c1_sda_h2",
+ "i2c1_sck_h3";
+ function = "i2c1";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c1_master_pins3:i2c1_pins3 {
+ mux {
+ groups = "i2c1_sda_h6",
+ "i2c1_sck_h7";
+ function = "i2c1";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c2_master_pins1:i2c2_pins1 {
+ mux {
+ groups = "i2c2_sda_x",
+ "i2c2_sck_x";
+ function = "i2c2";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c2_master_pins2:i2c2_pins2 {
+ mux {
+ groups = "i2c2_sda_z",
+ "i2c2_sck_z";
+ function = "i2c2";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c3_master_pins1:i2c3_pins1 {
+ mux {
+ groups = "i2c3_sda_h",
+ "i2c3_sck_h";
+ function = "i2c3";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c3_master_pins2:i2c3_pins2 {
+ mux {
+ groups = "i2c3_sda_a",
+ "i2c3_sck_a";
+ function = "i2c3";
+ drive-strength = <2>;
+ };
+ };
+
+ /*dvb_p_ts1_pins: dvb_p_ts1_pins {
+ * tsin_b {
+ * groups = "tsin_b_sop_z",
+ * "tsin_b_valid_z",
+ * "tsin_b_clk_z",
+ * "tsin_b_din0_z",
+ * "tsin_b_din1",
+ * "tsin_b_din2",
+ * "tsin_b_din3",
+ * "tsin_b_din4",
+ * "tsin_b_din5",
+ * "tsin_b_din6",
+ * "tsin_b_din7";
+ * function = "tsin_b";
+ * };
+ *};
+ */
+
+ pwm_a_pins: pwm_a {
+ mux {
+ groups = "pwm_a";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_b_pins1: pwm_b_pins1 {
+ mux {
+ groups = "pwm_b_x7";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins2: pwm_b_pins2 {
+ mux {
+ groups = "pwm_b_x19";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_c_pins1: pwm_c_pins1 {
+ mux {
+ groups = "pwm_c_c4";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins2: pwm_c_pins2 {
+ mux {
+ groups = "pwm_c_x5";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins3: pwm_c_pins3 {
+ mux {
+ groups = "pwm_c_x8";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_d_pins1: pwm_d_pins1 {
+ mux {
+ groups = "pwm_d_x3";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins2: pwm_d_pins2 {
+ mux {
+ groups = "pwm_d_x6";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_e_pins: pwm_e {
+ mux {
+ groups = "pwm_e";
+ function = "pwm_e";
+ };
+ };
+
+ pwm_f_pins1: pwm_f_pins1 {
+ mux {
+ groups = "pwm_f_x";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins2: pwm_f_pins2 {
+ mux {
+ groups = "pwm_f_h";
+ function = "pwm_f";
+ };
+ };
+
+ spicc0_pins_x: spicc0_pins_x {
+ mux {
+ groups = "spi0_mosi_x",
+ "spi0_miso_x",
+ //"spi0_ss0_x",
+ "spi0_clk_x";
+ function = "spi0";
+ drive-strength = <1>;
+ };
+ };
+
+ spicc0_pins_c: spicc0_pins_c {
+ mux {
+ groups = "spi0_mosi_c",
+ "spi0_miso_c",
+ "spi0_ss0_c",
+ "spi0_clk_c";
+ function = "spi0";
+ drive-strength = <1>;
+ };
+ };
+
+ spicc1_pins: spicc1_pins {
+ mux {
+ groups = "spi1_mosi",
+ "spi1_miso",
+ //"spi1_ss0",
+ "spi1_clk";
+ function = "spi1";
+ drive-strength = <1>;
+ };
+ };
+
+ a_uart_pins:a_uart {
+ mux {
+ groups = "uart_tx_a",
+ "uart_rx_a",
+ "uart_cts_a",
+ "uart_rts_a";
+ function = "uart_a";
+ };
+ };
+
+ b_uart_pins:b_uart {
+ mux {
+ groups = "uart_tx_b",
+ "uart_rx_b";
+ function = "uart_b";
+ };
+ };
+
+ c_uart_pins:c_uart {
+ mux {
+ groups = "uart_tx_c",
+ "uart_rx_c";
+ function = "uart_c";
+ };
+ };
+
+ hdmitx_hpd: hdmitx_hpd {
+ mux {
+ groups = "hdmitx_hpd_in";
+ function = "hdmitx";
+ bias-disable;
+ };
+ };
+
+ hdmitx_hpd_gpio: hdmitx_hpd_gpio {
+ mux {
+ groups = "GPIOH_1";
+ function = "gpio_periphs";
+ bias-disable;
+ };
+ };
+
+ hdmitx_ddc: hdmitx_ddc {
+ mux {
+ groups = "hdmitx_sda",
+ "hdmitx_sck";
+ function = "hdmitx";
+ bias-disable;
+ drive-strength = <3>;
+ };
+ };
+
+ eecec_a: ee_ceca {
+ mux {
+ groups = "cec_ao_a_ee";
+ function = "cec_ao_ee";
+ };
+ };
+
+ eecec_b: ee_cecb {
+ mux {
+ groups = "cec_ao_b_ee";
+ function = "cec_ao_ee";
+ };
+ };
+
+ internal_eth_pins: internal_eth_pins {
+ mux {
+ groups = "eth_link_led",
+ "eth_act_led";
+ function = "eth";
+ };
+ };
+
+ internal_gpio_pins: internal_gpio_pins {
+ mux {
+ groups = "GPIOZ_14",
+ "GPIOZ_15";
+ function = "gpio_periphs";
+ bias-disable;
+ input-enable;
+ };
+ };
+
+ external_eth_pins: external_eth_pins {
+ mux {
+ groups = "eth_mdio",
+ "eth_mdc",
+ "eth_rgmii_rx_clk",
+ "eth_rx_dv",
+ "eth_rxd0",
+ "eth_rxd1",
+ "eth_rxd2_rgmii",
+ "eth_rxd3_rgmii",
+ "eth_rgmii_tx_clk",
+ "eth_txen",
+ "eth_txd0",
+ "eth_txd1",
+ "eth_txd2_rgmii",
+ "eth_txd3_rgmii";
+ function = "eth";
+ drive-strength = <3>;
+ };
+ };
+
+ jtag_apee_pins:jtag_apee_pin {
+ mux {
+ groups = "jtag_b_tdi",
+ "jtag_b_tdo",
+ "jtag_b_clk",
+ "jtag_b_tms";
+ function = "jtag_b";
+ };
+ };
+};
+
+&pinctrl_aobus {
+ remote_pins:remote_pin {
+ mux {
+ groups = "remote_input_ao";
+ function = "remote_input_ao";
+ };
+ };
+
+ irblaster_pins:irblaster_pin {
+ mux {
+ groups = "remote_out_ao";
+ function = "remote_out_ao";
+ };
+ };
+}; /* end of pinctrl_aobus */
diff --git a/arch/arm/boot/dts/amlogic/sm1_pxp.dts b/arch/arm/boot/dts/amlogic/sm1_pxp.dts
new file mode 100644
index 0000000..78cdd87
--- a/dev/null
+++ b/arch/arm/boot/dts/amlogic/sm1_pxp.dts
@@ -0,0 +1,729 @@
+/*
+ * arch/arm/boot/dts/amlogic/sm1_pxp.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesonsm1.dtsi"
+
+/ {
+ model = "Amlogic";
+ compatible = "amlogic, g12a";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ serial0 = &uart_AO;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c_AO;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x400000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x05000000 0x400000>;
+ };
+
+ secos_reserved:linux,secos {
+ status = "disable";
+ compatible = "amlogic, aml_secos_memory";
+ reg = <0x05300000 0x2000000>;
+ no-map;
+ };
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x3f800000 0x800000>;
+ };
+ ion_cma_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x8000000>;
+ alignment = <0x400000>;
+ };
+
+ //di_reserved:linux,di {
+ //compatible = "amlogic, di-mem";
+ /* buffer_size = 3621952(yuv422 8bit) */
+ /* 4179008(yuv422 10bit full pack mode) */
+ /** 10x3621952=34.6M(0x23) support 8bit **/
+ /** 10x4736064=45.2M(0x2e) support 12bit **/
+ /** 10x4179008=40M(0x28) support 10bit **/
+ //size = <0x2800000>;
+ //no-map;
+ //};
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4074560(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4074560=40M(0x28) support 10bit
+ */
+ size = <0x02800000>;
+ alignment = <0x400000>;
+ };
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x13400000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ };
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+ /* vdin0 CMA pool */
+ vdin0_cma_reserved:linux,vdin0_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16+4 M */
+ size = <0x04000000>;
+ alignment = <0x400000>;
+ };
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16 M */
+ size = <0x04000000>;
+ alignment = <0x400000>;
+ };
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-g12a";
+ dev_name = "cvbsout";
+ status = "okay";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+ clk_path = <0>;
+
+ /* performance: reg_address, reg_value */
+ /* g12a */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ performance_sarft = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x0
+ 0x1b05 0x9
+ 0x1c59 0xfc48
+ 0xffff 0x0>; /* ending flag */
+ performance_revB_telecom = <0x1bf0 0x9
+ 0x1b56 0x546
+ 0x1b12 0x8080
+ 0x1b05 0x9
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 40 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>;
+ clock-names = "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite";
+ clock-range = <334 667>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <1>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ };
+
+ efusekey:efusekey{
+ keynum = <4>;
+ key0 = <&key_0>;
+ key1 = <&key_1>;
+ key2 = <&key_2>;
+ key3 = <&key_3>;
+ key_0:key_0{
+ keyname = "mac";
+ offset = <0>;
+ size = <6>;
+ };
+ key_1:key_1{
+ keyname = "mac_bt";
+ offset = <6>;
+ size = <6>;
+ };
+ key_2:key_2{
+ keyname = "mac_wifi";
+ offset = <12>;
+ size = <6>;
+ };
+ key_3:key_3{
+ keyname = "usid";
+ offset = <18>;
+ size = <16>;
+ };
+ };//End efusekey
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <0>;/*1:enabel ;0:disable*/
+ wb_en = <0>;/*1:enabel ;0:disable*/
+ cm_en = <0>;/*1:enabel ;0:disable*/
+ /*0: 709/601 1: bt2020*/
+ tx_op_color_primary = <0>;
+ };
+ amdolby_vision {
+ compatible = "amlogic, dolby_vision_g12a";
+ dev_name = "aml_amdolby_vision_driver";
+ status = "okay";
+ tv_mode = <0>;/*1:enabel ;0:disable*/
+ };
+
+ /* Audio Related start */
+
+ pdm_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pdm_dummy_codec";
+ status = "okay";
+ };
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+ amlogic_codec:t9015{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_codec_T9015";
+ reg = <0xFF632000 0x2000>;
+ is_auge_used = <1>; /* meson or auge chipset used */
+ tdmout_index = <0>;
+ status = "disabled";
+ };
+ auge_sound {
+ compatible = "amlogic, g12a-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ aml-audio-card,dai-link@0 {
+ format = "dsp_a";
+ mclk-fs = <512>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ //bitclock-master = <&tdmacodec>;
+ //frame-master = <&tdmacodec>;
+ tdmacpu: cpu {
+ sound-dai = <&aml_tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1 1 1 1 1 1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1 1 1 1 1 1 1>;
+ dai-tdm-slot-num = <8>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <24576000>;
+ };
+ tdmacodec: codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ bitclock-master = <&aml_tdmb>;
+ frame-master = <&aml_tdmb>;
+ cpu {
+ sound-dai = <&aml_tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ format = "i2s";
+ mclk-fs = <256>;
+ continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ bitclock-master = <&aml_tdmc>;
+ frame-master = <&aml_tdmc>;
+ cpu {
+ sound-dai = <&aml_tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ cpu {
+ sound-dai = <&aml_pdm>;
+ };
+ codec {
+ sound-dai = <&pdm_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&aml_spdif>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&aml_spdif_b>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ audiolocker: locker {
+ compatible = "amlogic, audiolocker";
+ clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT
+ &clkaudio CLKID_AUDIO_LOCKER_IN
+ &clkaudio CLKID_AUDIO_MCLK_D
+ &clkaudio CLKID_AUDIO_MCLK_E
+ &clkc CLKID_MPLL1
+ &clkc CLKID_MPLL2>;
+ clock-names = "lock_out", "lock_in", "out_src",
+ "in_src", "out_calc", "in_ref";
+ interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq";
+ frequency = <49000000>; /* pll */
+ dividor = <49>; /* locker's parent */
+ status = "disabled";
+ };
+ /* Audio Related end */
+
+ /*DCDC for MP8756GD*/
+ cpu_opp_table0: cpu_opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <731000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <731000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <731000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-microvolt = <731000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <731000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <731000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1398000000>;
+ opp-microvolt = <761000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <791000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <831000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <861000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <1908000000>;
+ opp-microvolt = <981000>;
+ };
+ };
+
+ cpufreq-meson {
+ compatible = "amlogic, cpufreq-meson";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_ao_d_pins3>;
+ status = "okay";
+ };
+
+
+}; /* end of / */
+
+&meson_fb {
+ status = "okay";
+ display_size_default = <1920 1080 1920 2160 32>;
+ mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>;
+ logo_addr = "0x7f800000";
+ mem_alloc = <1>;
+ pxp_mode = <1>; /** 0:normal mode 1:pxp mode */
+};
+
+&pwm_AO_cd {
+ status = "okay";
+ };
+
+&audiobus {
+ aml_tdma: tdma {
+ compatible = "amlogic, g12a-snd-tdma";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <1 0>;
+ dai-tdm-lane-slot-mask-out = <0 1>;
+ dai-tdm-clk-sel = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_MPLL0>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmout_a &tdmin_a>;
+ };
+
+ aml_tdmb: tdmb {
+ compatible = "amlogic, g12a-snd-tdmb";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <1 1 1 1>;
+ dai-tdm-clk-sel = <1>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmb_mclk /*&tdmout_b &tdmin_b*/>;
+ };
+
+ aml_tdmc: tdmc {
+ compatible = "amlogic, g12a-snd-tdmc";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <0 1 0 0>;
+ #dai-tdm-lane-slot-mask-out = <1 0 1 1>;
+ #dai-tdm-lane-oe-slot-mask-in = <0 0 0 0>;
+ dai-tdm-lane-oe-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <2>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmc_mclk &tdmout_c &tdmin_c>;
+ };
+
+ aml_spdif: spdif {
+ compatible = "amlogic, g12a-snd-spdif-a";
+ #sound-dai-cells = <0>;
+ clocks = <&clkc CLKID_MPLL0
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT
+ &clkaudio CLKID_AUDIO_SPDIFIN_CTRL
+ &clkaudio CLKID_AUDIO_SPDIFOUT_CTRL>;
+ clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+ interrupts =
+ <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-names = "irq_spdifin";
+ pinctrl-names = "spdif_pins";
+ pinctrl-0 = <&spdifout &spdifin>;
+ status = "okay";
+ };
+ aml_spdif_b: spdif_b {
+ compatible = "amlogic, g12a-snd-spdif-b";
+ #sound-dai-cells = <0>;
+ clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+ &clkaudio CLKID_AUDIO_SPDIFOUTB
+ &clkaudio CLKID_AUDIO_SPDIFOUTB_CTRL>;
+ clock-names = "sysclk",
+ "gate_spdifout", "clk_spdifout";
+ pinctrl-names = "spdif_pins";
+ pinctrl-0 = <&spdifout_b>;
+ status = "okay";
+ };
+ aml_pdm: pdm {
+ compatible = "amlogic, g12a-snd-pdm";
+ #sound-dai-cells = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+ filter_mode = <1>; /* mode 0~4, defalut:1 */
+ status = "okay";
+ };
+ aml_pwrdet: pwrdet {
+ compatible = "amlogic, g12a-power-detect";
+
+ interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "pwrdet_irq";
+
+ /* pwrdet source sel
+ * 7: loopback;
+ * 6: tdmin_lb;
+ * 5: reserved;
+ * 4: pdmin;
+ * 3: spdifin;
+ * 2: tdmin_c;
+ * 1: tdmin_b;
+ * 0: tdmin_a;
+ */
+ pwrdet_src = <4>;
+
+ hi_th = <0x70000>;
+ lo_th = <0x16000>;
+
+ status = "disabled";
+ };
+}; /* end of audiobus */
+
+&pinctrl_periphs {
+ tdmout_a: tdmout_a {
+ mux { /* GPIOX_11, GPIOX_10, GPIOX_8 */
+ groups = "tdma_sclk",
+ "tdma_fs",
+ "tdma_dout1";
+ function = "tdma_out";
+ };
+ };
+
+ tdmin_a: tdmin_a {
+ mux { /* GPIOX_9 */
+ groups = "tdma_din0";
+ function = "tdma_in";
+ };
+ };
+
+ tdmb_mclk: tdmb_mclk {
+ mux {
+ groups = "mclk0_a";
+ function = "mclk0";
+ };
+ };
+
+ tdmc_mclk: tdmc_mclk {
+ mux { /* GPIOZ_8 */
+ groups = "mclk1_z";
+ function = "mclk1";
+ };
+ };
+
+ tdmout_c:tdmout_c {
+ mux { /* gpioz_7, gpioz_6, GPIOZ_2, GPIOZ_4, GPIOZ_5*/
+ groups = "tdmc_sclk_z",
+ "tdmc_fs_z",
+ "tdmc_dout0_z"
+ /*,"tdmc_dout2_z",
+ *"tdmc_dout3_z"
+ */;
+ function = "tdmc_out";
+ };
+ };
+
+ tdmin_c:tdmin_c {
+ mux { /* GPIOZ_3 */
+ groups = "tdmc_din1_z";
+ function = "tdmc_in";
+ };
+ };
+
+ spdifin: spdifin {
+ mux {/* gpioa_10 */
+ groups = "spdif_in_a10";
+ function = "spdif_in";
+ };
+ };
+
+ spdifout: spdifout {
+ mux {/* gpioa_11 */
+ groups = "spdif_out_a11";
+ function = "spdif_out";
+ };
+ };
+
+ spdifout_b: spdifout_b {
+ mux { /* gpioa_13 */
+ groups = "spdif_out_a13";
+ function = "spdif_out";
+ };
+ };
+
+ pdmin: pdmin {
+ mux { /* gpioa_5, gpioa_6, gpioa_7, gpioa_8, gpioa_9*/
+ groups = "pdm_din0_a",
+ "pdm_din1_a",
+ "pdm_din2_a",
+ "pdm_din3_a",
+ "pdm_dclk_a";
+ function = "pdm";
+ };
+ };
+
+}; /* end of pinctrl_periphs */
+
+&pinctrl_aobus {
+ tdmout_b: tdmout_b {
+ mux { /* GPIOAO_7, GPIOAO_8, GPIOAO_4 */
+ groups = "tdmb_fs_ao",
+ "tdmb_fs_ao",
+ "tdmb_dout0_ao";
+ function = "tdmb_out_ao";
+ };
+ };
+
+ tdmin_b:tdmin_b {
+ mux {
+ groups = "tdmb_din2_ao";
+ function = "tdmb_in_ao";
+ };
+ };
+}; /* end of pinctrl_aobus */
+/* Audio Related End */
+
+&aobus{
+
+};
+
+&irblaster {
+ status = "disabled";
+};
+
+/*if you want to use vdin just modify status to "ok"*/
+&vdin0 {
+ memory-region = <&vdin0_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <0x15>;
+};
+&vdin1 {
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+};
+&sd_emmc_b1 {
+ status = "okay";
+ sd {
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_NONREMOVABLE"; /**ptm debug */
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+
+&defendkey {
+ status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/amlogic/mesongsm1-bifrost.dtsi b/arch/arm64/boot/dts/amlogic/mesongsm1-bifrost.dtsi
new file mode 100644
index 0000000..99fe151
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/mesongsm1-bifrost.dtsi
@@ -0,0 +1,128 @@
+/*
+ * arch/arm64/boot/dts/amlogic/mesonsm1-bifrost.dtsi
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/ {
+
+ gpu:bifrost {
+ compatible = "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
+ #cooling-cells = <2>; /* min followed by max */
+ reg = <0 0xFFE40000 0 0x04000>, /*mali APB bus base address*/
+ <0 0xFFD01000 0 0x01000>, /*reset register*/
+ <0 0xFF800000 0 0x01000>, /*aobus for gpu pmu domain*/
+ <0 0xFF63c000 0 0x01000>, /*hiubus for gpu clk cntl*/
+ <0 0xFFD01000 0 0x01000>; /*reset register*/
+ interrupt-parent = <&gic>;
+ interrupts = <0 160 4>, <0 161 4>, <0 162 4>;
+ interrupt-names = "GPU", "MMU", "JOB";
+ /* ACE-Lite = 0; ACE = 1; No-coherency = 31; */
+ /* system-coherency = <31>; */
+
+ num_of_pp = <2>;
+ sc_mpp = <1>; /* number of shader cores used most of time. */
+ clocks = <&clkc CLKID_GPU_MUX &clkc CLKID_GP0_PLL>;
+ clock-names = "gpu_mux","gp0_pll";
+
+
+ tbl = <&dvfs285_cfg
+ &dvfs400_cfg
+ &dvfs500_cfg
+ &dvfs666_cfg
+ &dvfs850_cfg
+ &dvfs850_cfg>;
+
+ dvfs125_cfg:clk125_cfg {
+ clk_freq = <125000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ clk_reg = <0xA03>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <30 120>;
+ };
+
+ dvfs250_cfg:dvfs250_cfg {
+ clk_freq = <250000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ clk_reg = <0xA01>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <80 170>;
+ };
+
+ dvfs285_cfg:dvfs285_cfg {
+ clk_freq = <285714285>;
+ clk_parent = "fclk_div7";
+ clkp_freq = <285714285>;
+ clk_reg = <0xE00>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <100 190>;
+ };
+
+ dvfs400_cfg:dvfs400_cfg {
+ clk_freq = <400000000>;
+ clk_parent = "fclk_div5";
+ clkp_freq = <400000000>;
+ clk_reg = <0xC00>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <152 207>;
+ };
+
+ dvfs500_cfg:dvfs500_cfg {
+ clk_freq = <500000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ clk_reg = <0xA00>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <180 220>;
+ };
+
+ dvfs666_cfg:dvfs666_cfg {
+ clk_freq = <666666666>;
+ clk_parent = "fclk_div3";
+ clkp_freq = <666666666>;
+ clk_reg = <0x800>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <210 236>;
+ };
+
+ dvfs800_cfg:dvfs800_cfg {
+ clk_freq = <800000000>;
+ clk_parent = "fclk_div2p5";
+ clkp_freq = <800000000>;
+ clk_reg = <0x600>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <230 255>;
+ };
+
+ dvfs850_cfg:dvfs850_cfg {
+ clk_freq = <846000000>;
+ clk_parent = "gp0_pll";
+ clkp_freq = <846000000>;
+ clk_reg = <0x200>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <230 255>;
+ };
+ };
+
+};/* end of / */
diff --git a/arch/arm64/boot/dts/amlogic/mesongsm1.dtsi b/arch/arm64/boot/dts/amlogic/mesongsm1.dtsi
new file mode 100644
index 0000000..e59ce39
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/mesongsm1.dtsi
@@ -0,0 +1,2590 @@
+/*
+ * arch/arm64/boot/dts/amlogic/mesonsm1.dtsi
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/amlogic,g12a-clkc.h>
+#include <dt-bindings/clock/amlogic,g12a-audio-clk.h>
+#include <dt-bindings/iio/adc/amlogic-saradc.h>
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/meson_rc.h>
+#include <dt-bindings/phy/phy-amlogic-pcie.h>
+#include "mesongsm1-bifrost.dtsi"
+
+/ {
+ cpus:cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0:cluster0 {
+ core0 {
+ cpu = <&CPU0>;
+ };
+ core1 {
+ cpu = <&CPU1>;
+ };
+ core2 {
+ cpu = <&CPU2>;
+ };
+ core3 {
+ cpu = <&CPU3>;
+ };
+ };
+ };
+
+ CPU0:cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU1:cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU2:cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU3:cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ idle-states {
+ entry-method = "arm,psci-0.2";
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0010000>;
+ local-timer-stop;
+ entry-latency-us = <5000>;
+ exit-latency-us = <5000>;
+ min-residency-us = <15000>;
+ };
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 0xff08>,
+ <GIC_PPI 14 0xff08>,
+ <GIC_PPI 11 0xff08>,
+ <GIC_PPI 10 0xff08>;
+ };
+
+ timer_bc {
+ compatible = "arm, meson-bc-timer";
+ reg= <0x0 0xffd0f190 0x0 0x4 0x0 0xffd0f194 0x0 0x4>;
+ timer_name = "Meson TimerF";
+ clockevent-rating=<300>;
+ clockevent-shift=<20>;
+ clockevent-features=<0x23>;
+ interrupts = <0 60 1>;
+ bit_enable=<16>;
+ bit_mode=<12>;
+ bit_resolution=<0>;
+ };
+
+ arm_pmu {
+ compatible = "arm,armv8-pmuv3";
+ /* clusterb-enabled; */
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0xff634680 0x0 0x4>;
+ cpumasks = <0xf>;
+ /* default 10ms */
+ relax-timer-ns = <10000000>;
+ /* default 10000us */
+ max-wait-cnt = <10000>;
+ };
+
+ gic: interrupt-controller@2c001000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xffc01000 0 0x1000>,
+ <0x0 0xffc02000 0 0x0100>;
+ interrupts = <GIC_PPI 9 0xf04>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ meson_suspend:pm {
+ compatible = "amlogic, pm";
+ status = "okay";
+ device_name = "aml_pm";
+ reg = <0x0 0xff8000a8 0x0 0x4>,
+ <0x0 0xff80023c 0x0 0x4>;
+ };
+
+ secmon {
+ compatible = "amlogic, secmon";
+ memory-region = <&secmon_reserved>;
+ in_base_func = <0x82000020>;
+ out_base_func = <0x82000021>;
+ reserve_mem_size = <0x00300000>;
+ };
+
+ securitykey {
+ compatible = "aml, securitykey";
+ storage_query = <0x82000060>;
+ storage_read = <0x82000061>;
+ storage_write = <0x82000062>;
+ storage_tell = <0x82000063>;
+ storage_verify = <0x82000064>;
+ storage_status = <0x82000065>;
+ storage_list = <0x82000067>;
+ storage_remove = <0x82000068>;
+ storage_in_func = <0x82000023>;
+ storage_out_func = <0x82000024>;
+ storage_block_func = <0x82000025>;
+ storage_size_func = <0x82000027>;
+ storage_set_enctype = <0x8200006A>;
+ storage_get_enctype = <0x8200006B>;
+ storage_version = <0x8200006C>;
+ };
+
+ mailbox: mhu@c883c400 {
+ compatible = "amlogic, meson_mhu";
+ reg = <0x0 0xff63c400 0x0 0x4c>, /* MHU registers */
+ <0x0 0xfffe7000 0x0 0x800>; /* Payload area */
+ interrupts = <0 209 1>, /* low priority interrupt */
+ <0 210 1>; /* high priority interrupt */
+ #mbox-cells = <1>;
+ mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
+ mboxes = <&mailbox 0 &mailbox 1>;
+ };
+
+ cpu_iomap {
+ compatible = "amlogic, iomap";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ io_cbus_base {
+ reg = <0x0 0xffd00000 0x0 0x26000>;
+ };
+ io_apb_base {
+ reg = <0x0 0xffe01000 0x0 0x7f000>;
+ };
+ io_aobus_base {
+ reg = <0x0 0xff800000 0x0 0xb000>;
+ };
+ io_vapb_base {
+ reg = <0x0 0xff900000 0x0 0x50000>;
+ };
+ io_hiu_base {
+ reg = <0x0 0xff63c000 0x0 0x2000>;
+ };
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+
+ rtc{
+ compatible = "amlogic, aml_vrtc";
+ alarm_reg_addr = <0xff8000a8>;
+ timer_e_addr = <0xffd0f188>;
+ init_date = "2015/01/01";
+ status = "okay";
+ };
+
+ cpu_info {
+ compatible = "amlogic, cpuinfo";
+ status = "okay";
+ cpuinfo_cmd = <0x82000044>;
+ };
+
+ aml_reboot{
+ compatible = "aml, reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+ };
+
+ vpu {
+ compatible = "amlogic, vpu-g12a";
+ dev_name = "vpu";
+ status = "okay";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_VPU_INTR>,
+ <&clkc CLKID_VPU_P0_COMP>,
+ <&clkc CLKID_VPU_P1_COMP>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "vapb_clk",
+ "vpu_intr_gate",
+ "vpu_clk0",
+ "vpu_clk1",
+ "vpu_clk";
+ clk_level = <7>;
+ /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
+ /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
+ };
+
+ ethmac: ethernet@ff3f0000 {
+ compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
+ reg = <0x0 0xff3f0000 0x0 0x10000
+ 0x0 0xff634540 0x0 0x8
+ 0x0 0xff64c000 0x0 0xa0>;
+ reg-names = "eth_base", "eth_cfg", "eth_pll";
+ interrupts = <0 8 1>;
+ interrupt-names = "macirq";
+ status = "disabled";
+ clocks = <&clkc CLKID_ETH_CORE>;
+ clock-names = "ethclk81";
+ pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>;
+ analog_val = <0x20200000 0x0000c000 0x00000023>;
+ };
+
+ pinctrl_aobus: pinctrl@ff800014{
+ compatible = "amlogic,meson-g12a-aobus-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio_ao: ao-bank@ff800014{
+ reg = <0x0 0xff800014 0x0 0x8>,
+ <0x0 0xff800024 0x0 0x14>,
+ <0x0 0xff80001c 0x0 0x8>;
+ reg-names = "mux","gpio", "drive-strength";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ pinctrl_periphs: pinctrl@ff634480{
+ compatible = "amlogic,meson-g12a-periphs-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio: banks@ff6346c0{
+ reg = <0x0 0xff6346c0 0x0 0x40>,
+ <0x0 0xff6344e8 0x0 0x18>,
+ <0x0 0xff634520 0x0 0x18>,
+ <0x0 0xff634440 0x0 0x4c>,
+ <0x0 0xff634740 0x0 0x1c>;
+ reg-names = "mux",
+ "pull",
+ "pull-enable",
+ "gpio",
+ "drive-strength";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ audio_data: audio_data {
+ compatible = "amlogic, audio_data";
+ query_licence_cmd = <0x82000050>;
+ status = "disabled";
+ };
+
+ dwc3: dwc3@ff500000 {
+ compatible = "synopsys, dwc3";
+ status = "disable";
+ reg = <0x0 0xff500000 0x0 0x100000>;
+ interrupts = <0 30 4>;
+ usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>;
+ cpu-type = "gxl";
+ clock-src = "usb3.0";
+ clocks = <&clkc CLKID_USB_GENERAL>;
+ clock-names = "dwc_general";
+ };
+
+ usb2_phy_v2: usb2phy@ffe09000 {
+ compatible = "amlogic, amlogic-new-usb2-v2";
+ status = "disable";
+ reg = <0x0 0xffe09000 0x0 0x80
+ 0x0 0xffd01008 0x0 0x100
+ 0x0 0xff636000 0x0 0x2000
+ 0x0 0xff63a000 0x0 0x2000>;
+ pll-setting-1 = <0x09400414>;
+ pll-setting-2 = <0x927E0000>;
+ pll-setting-3 = <0xac5f49e5>;
+ pll-setting-4 = <0xfe18>;
+ pll-setting-5 = <0x8000fff>;
+ pll-setting-6 = <0x78000>;
+ pll-setting-7 = <0xe0004>;
+ pll-setting-8 = <0xe000c>;
+ };
+
+ usb3_phy_v2: usb3phy@ffe09080 {
+ compatible = "amlogic, amlogic-new-usb3-v2";
+ status = "disable";
+ reg = <0x0 0xffe09080 0x0 0x20>;
+ phy-reg = <0xff646000>;
+ phy-reg-size = <0x2000>;
+ usb2-phy-reg = <0xffe09000>;
+ usb2-phy-reg-size = <0x80>;
+ interrupts = <0 16 4>;
+ clocks = <&clkc CLKID_PCIE_PLL>;
+ clock-names = "pcie_refpll";
+ };
+
+ dwc2_a: dwc2_a@ff400000 {
+ compatible = "amlogic, dwc2";
+ status = "disable";
+ device_name = "dwc2_a";
+ reg = <0x0 0xff400000 0x0 0x40000>;
+ interrupts = <0 31 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+ port-dma = <0>;
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "v2";
+ phy-reg = <0xffe09000>;
+ phy-reg-size = <0xa0>;
+ /** phy-interface: 0x0: amlogic phy, 0x1: synopsys phy **/
+ phy-interface = <0x0>;
+ clocks = <&clkc CLKID_USB_GENERAL
+ &clkc CLKID_USB1_TO_DDR>;
+ clock-names = "usb_general",
+ "usb1";
+ };
+
+ wdt: watchdog@0xffd0f0d0 {
+ compatible = "amlogic, meson-wdt";
+ status = "okay";
+ default_timeout=<10>;
+ reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
+ reset_watchdog_time=<2>;
+ shutdown_timeout=<10>;
+ firmware_timeout=<6>;
+ suspend_timeout=<6>;
+ reg = <0x0 0xffd0f0d0 0x0 0x10>;
+ clock-names = "xtal";
+ clocks = <&xtal>;
+ };
+
+ ram-dump {
+ compatible = "amlogic, ram_dump";
+ status = "okay";
+ reg = <0x0 0xFF6345E0 0x0 4>;
+ reg-names = "PREG_STICKY_REG8";
+ };
+
+ jtag {
+ compatible = "amlogic, jtag";
+ status = "okay";
+ select = "disable"; /* disable/apao/apee */
+ pinctrl-names="jtag_apao_pins", "jtag_apee_pins";
+ pinctrl-0=<&jtag_apao_pins>;
+ pinctrl-1=<&jtag_apee_pins>;
+ };
+
+ saradc:saradc {
+ compatible = "amlogic,meson-g12a-saradc";
+ status = "okay";
+ #io-channel-cells = <1>;
+ clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
+ clock-names = "xtal", "saradc_clk";
+ interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
+ reg = <0x0 0xff809000 0x0 0x48>;
+ };
+
+ p_tsensor: p_tsensor@ff634594 {
+ compatible = "amlogic, r1p1-tsensor";
+ device_name = "meson-pthermal";
+ status = "disabled";
+ reg = <0x0 0xff634800 0x0 0x50>,
+ <0x0 0xff800268 0x0 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 35 0>;
+ clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ d_tsensor: d_tsensor@ff800228 {
+ compatible = "amlogic, r1p1-tsensor";
+ device_name = "meson-dthermal";
+ status = "disabled";
+ reg = <0x0 0xff634c00 0x0 0x50>,
+ <0x0 0xff800230 0x0 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 36 0>;
+ clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ cbus: cbus@ffd00000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xffd00000 0x0 0x26000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x26000>;
+
+ gpio_intc: interrupt-controller@f080 {
+ compatible = "amlogic,meson-gpio-intc",
+ "amlogic,meson-g12a-gpio-intc";
+ reg = <0x0 0xf080 0x0 0x10>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ amlogic,channel-interrupts =
+ <64 65 66 67 68 69 70 71>;
+ status = "okay";
+ };
+
+ meson_clk_msr {
+ compatible = "amlogic, gxl_measure";
+ reg = <0x0 0x18004 0x0 0x4
+ 0x0 0x1800c 0x0 0x4>;
+ ringctrl = <0xff6345fc>;
+ };
+
+ pwm_ab: pwm@1b000 {
+ compatible = "amlogic,g12a-ee-pwm";
+ reg = <0x0 0x1b000 0x0 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ /* default xtal 24m clkin0-clkin2 and
+ * clkin1-clkin3 should be set the same
+ */
+ status = "disabled";
+ };
+
+ pwm_cd: pwm@1a000 {
+ compatible = "amlogic,g12a-ee-pwm";
+ reg = <0x0 0x1a000 0x0 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ pwm_ef: pwm@19000 {
+ compatible = "amlogic,g12a-ee-pwm";
+ reg = <0x0 0x19000 0x0 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ i2c0: i2c@1f000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x0 0x1f000 0x0 0x20>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 91 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c1: i2c@1e000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x0 0x1e000 0x0 0x20>;
+ interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c2: i2c@1d000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x0 0x1d000 0x0 0x20>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 94 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c3: i2c@1c000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x0 0x1c000 0x0 0x20>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ spicc0: spi@13000 {
+ compatible = "amlogic,meson-g12a-spicc";
+ reg = <0x0 0x13000 0x0 0x44>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC0>,
+ <&clkc CLKID_SPICC0_COMP>;
+ clock-names = "core", "comp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spicc1: spi@15000 {
+ compatible = "amlogic,meson-g12a-spicc";
+ reg = <0x0 0x15000 0x0 0x44>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC1>,
+ <&clkc CLKID_SPICC1_COMP>;
+ clock-names = "core", "comp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ }; /* end of cbus */
+
+ aobus: aobus@ff800000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xff800000 0x0 0xb000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xff800000 0x0 0xb000>;
+
+ cpu_version {
+ reg=<0x0 0x220 0x0 0x4>;
+ };
+
+ aoclkc: clock-controller@0 {
+ compatible = "amlogic,g12a-aoclkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x0 0x0 0x320>;
+ };
+
+ pwm_AO_ab: pwm@7000 {
+ compatible = "amlogic,g12a-ao-pwm";
+ reg = <0x0 0x7000 0x0 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ pwm_AO_cd: pwm@2000 {
+ compatible = "amlogic,g12a-ao-pwm";
+ reg = <0x0 0x2000 0x0 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ i2c_AO: i2c@5000 {
+ compatible = "amlogic,meson-g12a-i2c";
+ status = "disabled";
+ reg = <0x0 0x05000 0x0 0x20>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c_AO_slave:i2c_slave@6000 {
+ compatible = "amlogic, meson-i2c-slave";
+ status = "disabled";
+ reg = <0x0 0x6000 0x0 0x20>;
+ interrupts = <0 194 1>;
+ pinctrl-names="default";
+ pinctrl-0=<&ao_i2c_slave_pins>;
+ };
+
+ uart_AO: serial@3000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0x3000 0x0 0x18>;
+ interrupts = <0 193 1>;
+ status = "okay";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ xtal_tick_en = <2>;
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ /*pinctrl-0 = <&ao_uart_pins>;*/
+ support-sysrq = <0>; /* 0 not support*/
+ };
+
+ uart_AO_B: serial@4000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0x4000 0x0 0x18>;
+ interrupts = <0 197 1>;
+ status = "disabled";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_b_uart_pins>;
+ };
+ };/* end of aobus */
+
+ periphs: periphs@ff634400 {
+ compatible = "simple-bus";
+ reg = <0x0 0xff634400 0x0 0x400>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xff634400 0x0 0x400>;
+
+ };/* end of periphs */
+
+ hiubus: hiubus@ff63c000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xff63c000 0x0 0x2000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x2000>;
+
+ clkc: clock-controller@0 {
+ compatible = "amlogic,g12a-clkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x0 0x0 0x320>;
+ };
+ };/* end of hiubus*/
+
+ ion_dev {
+ compatible = "amlogic, ion_dev";
+ memory-region = <&ion_cma_reserved>;
+ };/* end of ion_dev*/
+
+ audiobus: audiobus@0xff642000 {
+ compatible = "amlogic, audio-controller", "simple-bus";
+ reg = <0x0 0xff642000 0x0 0x2000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>;
+ clkaudio: audio_clocks {
+ compatible = "amlogic, g12a-audio-clocks";
+ #clock-cells = <1>;
+ reg = <0x0 0x0 0x0 0xb0>;
+ };
+ ddr_manager {
+ compatible = "amlogic, g12a-audio-ddr-manager";
+ interrupts = <
+ GIC_SPI 148 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 149 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 150 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 152 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 153 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 154 IRQ_TYPE_EDGE_RISING
+ >;
+ interrupt-names =
+ "toddr_a", "toddr_b", "toddr_c",
+ "frddr_a", "frddr_b", "frddr_c";
+ };
+ };/* end of audiobus*/
+
+ }; /* end of soc*/
+
+ remote:rc@0xff808040 {
+ compatible = "amlogic, aml_remote";
+ dev_name = "meson-remote";
+ reg = <0x0 0xff808040 0x00 0x44>, /*Multi-format IR controller*/
+ <0x0 0xff808000 0x00 0x20>; /*Legacy IR controller*/
+ status = "okay";
+ protocol = <REMOTE_TYPE_NEC>;
+ led_blink = <1>;
+ led_blink_frq = <100>;
+ interrupts = <0 196 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&remote_pins>;
+ map = <&custom_maps>;
+ max_frame_time = <200>; /*set software decoder max frame time*/
+ };
+
+ custom_maps:custom_maps {
+ mapnum = <3>;
+ map0 = <&map_0>;
+ map1 = <&map_1>;
+ map2 = <&map_2>;
+ map_0: map_0{
+ mapname = "amlogic-remote-1";
+ customcode = <0xfb04>;
+ release_delay = <80>;
+ size = <50>; /*keymap size*/
+ keymap = <REMOTE_KEY(0x47, KEY_0)
+ REMOTE_KEY(0x13, KEY_1)
+ REMOTE_KEY(0x10, KEY_2)
+ REMOTE_KEY(0x11, KEY_3)
+ REMOTE_KEY(0x0F, KEY_4)
+ REMOTE_KEY(0x0C, KEY_5)
+ REMOTE_KEY(0x0D, KEY_6)
+ REMOTE_KEY(0x0B, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x5C, KEY_RIGHTCTRL)
+ REMOTE_KEY(0x51, KEY_F3)
+ REMOTE_KEY(0x50, KEY_F4)
+ REMOTE_KEY(0x40, KEY_F5)
+ REMOTE_KEY(0x4d, KEY_F6)
+ REMOTE_KEY(0x43, KEY_F7)
+ REMOTE_KEY(0x17, KEY_F8)
+ REMOTE_KEY(0x00, KEY_F9)
+ REMOTE_KEY(0x01, KEY_F10)
+ REMOTE_KEY(0x16, KEY_F11)
+ REMOTE_KEY(0x49, KEY_BACKSPACE)
+ REMOTE_KEY(0x06, KEY_PROPS)
+ REMOTE_KEY(0x14, KEY_UNDO)
+ REMOTE_KEY(0x44, KEY_UP)
+ REMOTE_KEY(0x1D, KEY_DOWN)
+ REMOTE_KEY(0x1C, KEY_LEFT)
+ REMOTE_KEY(0x48, KEY_RIGHT)
+ REMOTE_KEY(0x53, KEY_LEFTMETA)
+ REMOTE_KEY(0x45, KEY_PAGEUP)
+ REMOTE_KEY(0x19, KEY_PAGEDOWN)
+ REMOTE_KEY(0x52, KEY_PAUSE)
+ REMOTE_KEY(0x05, KEY_HANGEUL)
+ REMOTE_KEY(0x59, KEY_HANJA)
+ REMOTE_KEY(0x1b, KEY_SCALE)
+ REMOTE_KEY(0x04, KEY_KPCOMMA)
+ REMOTE_KEY(0x1A, KEY_POWER)
+ REMOTE_KEY(0x0A, KEY_TAB)
+ REMOTE_KEY(0x0e, KEY_MUTE)
+ REMOTE_KEY(0x1F, KEY_HOME)
+ REMOTE_KEY(0x1e, KEY_FRONT)
+ REMOTE_KEY(0x07, KEY_COPY)
+ REMOTE_KEY(0x12, KEY_OPEN)
+ REMOTE_KEY(0x54, KEY_PASTE)
+ REMOTE_KEY(0x02, KEY_FIND)
+ REMOTE_KEY(0x4f, KEY_A)
+ REMOTE_KEY(0x42, KEY_B)
+ REMOTE_KEY(0x5d, KEY_C)
+ REMOTE_KEY(0x4c, KEY_D)
+ REMOTE_KEY(0x58, KEY_CUT)
+ REMOTE_KEY(0x55, KEY_CALC)>;
+ };
+ map_1: map_1{
+ mapname = "amlogic-remote-2";
+ customcode = <0xfe01>;
+ release_delay = <80>;
+ size = <53>;
+ keymap = <REMOTE_KEY(0x01, KEY_1)
+ REMOTE_KEY(0x02, KEY_2)
+ REMOTE_KEY(0x03, KEY_3)
+ REMOTE_KEY(0x04, KEY_4)
+ REMOTE_KEY(0x05, KEY_5)
+ REMOTE_KEY(0x06, KEY_6)
+ REMOTE_KEY(0x07, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x0a, KEY_0)
+ REMOTE_KEY(0x1F, KEY_FN_F1)
+ REMOTE_KEY(0x15, KEY_MENU)
+ REMOTE_KEY(0x16, KEY_TAB)
+ REMOTE_KEY(0x0c, KEY_CHANNELUP)
+ REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+ REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+ REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+ REMOTE_KEY(0x11, KEY_HOME)
+ REMOTE_KEY(0x1c, KEY_RIGHT)
+ REMOTE_KEY(0x1b, KEY_LEFT)
+ REMOTE_KEY(0x19, KEY_UP)
+ REMOTE_KEY(0x1a, KEY_DOWN)
+ REMOTE_KEY(0x1d, KEY_ENTER)
+ REMOTE_KEY(0x17, KEY_MUTE)
+ REMOTE_KEY(0x49, KEY_FINANCE)
+ REMOTE_KEY(0x43, KEY_BACK)
+ REMOTE_KEY(0x12, KEY_FN_F4)
+ REMOTE_KEY(0x14, KEY_FN_F5)
+ REMOTE_KEY(0x18, KEY_FN_F6)
+ REMOTE_KEY(0x59, KEY_INFO)
+ REMOTE_KEY(0x5a, KEY_STOPCD)
+ REMOTE_KEY(0x10, KEY_POWER)
+ REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+ REMOTE_KEY(0x44, KEY_NEXTSONG)
+ REMOTE_KEY(0x1e, KEY_REWIND)
+ REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+ REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+ REMOTE_KEY(0x46, KEY_PROPS)
+ REMOTE_KEY(0x40, KEY_UNDO)
+ REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+ REMOTE_KEY(0x57, KEY_FN)
+ REMOTE_KEY(0x5b, KEY_FN_ESC)
+ REMOTE_KEY(0x54, KEY_RED)
+ REMOTE_KEY(0x4c, KEY_GREEN)
+ REMOTE_KEY(0x4e, KEY_YELLOW)
+ REMOTE_KEY(0x55, KEY_BLUE)
+ REMOTE_KEY(0x53, KEY_BLUETOOTH)
+ REMOTE_KEY(0x52, KEY_WLAN)
+ REMOTE_KEY(0x39, KEY_CAMERA)
+ REMOTE_KEY(0x41, KEY_SOUND)
+ REMOTE_KEY(0x0b, KEY_QUESTION)
+ REMOTE_KEY(0x00, KEY_CHAT)
+ REMOTE_KEY(0x13, KEY_SEARCH)>;
+ };
+ map_2: map_2{
+ mapname = "amlogic-remote-3";
+ customcode = <0xbd02>;
+ release_delay = <80>;
+ size = <17>;
+ keymap = <REMOTE_KEY(0xca,103)
+ REMOTE_KEY(0xd2,108)
+ REMOTE_KEY(0x99,105)
+ REMOTE_KEY(0xc1,106)
+ REMOTE_KEY(0xce,97)
+ REMOTE_KEY(0x45,116)
+ REMOTE_KEY(0xc5,133)
+ REMOTE_KEY(0x80,113)
+ REMOTE_KEY(0xd0,15)
+ REMOTE_KEY(0xd6,125)
+ REMOTE_KEY(0x95,102)
+ REMOTE_KEY(0xdd,104)
+ REMOTE_KEY(0x8c,109)
+ REMOTE_KEY(0x89,131)
+ REMOTE_KEY(0x9c,130)
+ REMOTE_KEY(0x9a,120)
+ REMOTE_KEY(0xcd,121)>;
+ };
+ };
+
+ uart_A: serial@ffd24000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd24000 0x0 0x18>;
+ interrupts = <0 26 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART0>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 128 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins>;
+ };
+
+ uart_B: serial@ffd23000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd23000 0x0 0x18>;
+ interrupts = <0 75 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&b_uart_pins>;
+ };
+
+ uart_C: serial@ffd22000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd22000 0x0 0x18>;
+ interrupts = <0 93 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins>;
+ };
+
+
+ pcie_A: pcieA@fc000000 {
+ compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
+ reg = <0x0 0xfc000000 0x0 0x400000
+ 0x0 0xff648000 0x0 0x2000
+ 0x0 0xfc400000 0x0 0x200000
+ 0x0 0xff646000 0x0 0x2000
+ 0x0 0xffd01080 0x0 0x10>;
+ reg-names = "elbi", "cfg", "config", "phy", "reset";
+ interrupts = <0 221 0>;
+ #interrupt-cells = <1>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_EDGE_RISING>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0 0xfc600000 0x0 0x100000
+ /* downstream I/O */
+ 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
+ /* non-prefetchable memory */
+ num-lanes = <1>;
+ pcie-num = <1>;
+
+ clocks = <&clkc CLKID_PCIE_PLL
+ &clkc CLKID_PCIE_COMB
+ &clkc CLKID_PCIE_PHY>;
+ clock-names = "pcie_refpll",
+ "pcie",
+ "pcie_phy";
+ /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/
+ gpio-type = <2>;
+ pcie-apb-rst-bit = <15>;
+ pcie-phy-rst-bit = <14>;
+ pcie-ctrl-a-rst-bit = <12>;
+ status = "disabled";
+ };
+
+ amhdmitx: amhdmitx{
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "okay";
+ vend-data = <&vend_data>;
+ pinctrl-names="default", "hdmitx_i2c";
+ pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+ pinctrl-1=<&hdmitx_hpd_gpio &i2c3_master_pins1>;
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_VAPB_MUX
+ &clkc CLKID_VPU_MUX>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "hdmi_vapb_clk",
+ "hdmi_vpu_clk";
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ * 10:G12A
+ */
+ ic_type = <10>;
+ vend_data: vend_data{ /* Should modified by Customer */
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* standards.ieee.org/develop/regauth/oui/oui.txt */
+ vendor_id = <0x000000>;
+ };
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-g12a";
+ device_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "G12A"; /* Max Chars: 16 */
+ cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
+ cec_version = <5>;/*5:1.4;6:2.0*/
+ port_num = <1>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 203 1
+ 0 199 1>; /*0:snps 1:ts*/
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&eecec_a>;
+ pinctrl-1=<&eecec_b>;
+ pinctrl-2=<&eecec_b>;
+ reg = <0x0 0xFF80023c 0x0 0x4
+ 0x0 0xFF800000 0x0 0x400
+ 0x0 0xFF634400 0x0 0x26>;
+ reg-names = "ao_exit","ao","periphs";
+ };
+
+ /*if you want to use vdin just modify status to "ok"*/
+ vdin0: vdin0 {
+ compatible = "amlogic, vdin";
+ dev_name = "vdin0";
+ status = "disabled";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;2:cma alone*/
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ /*cma_size = <16>;*/
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <0>;
+ };
+ vdin1: vdin1 {
+ compatible = "amlogic, vdin";
+ dev_name = "vdin1";
+ status = "disabled";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ };
+
+ vout2 {
+ compatible = "amlogic, vout2";
+ dev_name = "vout";
+ status = "okay";
+ clocks = <&clkc CLKID_VPU_CLKC_P0_COMP>,
+ <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc0",
+ "vpu_clkc";
+ };
+
+ vdac {
+ compatible = "amlogic, vdac-g12a";
+ status = "okay";
+ };
+
+ canvas: canvas{
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "okay";
+ reg = <0x0 0xff638000 0x0 0x2000>;
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-g12a";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 146 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0x0 0xff940000 0x0 0x10000>;
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+ codec_io: codec_io {
+ compatible = "amlogic, codec_io";
+ status = "okay";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ io_cbus_base{
+ reg = <0x0 0xffd00000 0x0 0x100000>;
+ };
+ io_dos_base{
+ reg = <0x0 0xff620000 0x0 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0x0 0xff63c000 0x0 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0x0 0xff800000 0x0 0x10000>;
+ };
+ io_vcbus_base{
+ reg = <0x0 0xff900000 0x0 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0x0 0xff638000 0x0 0x2000>;
+ };
+ io_efuse_base{
+ reg = <0x0 0xff630000 0x0 0x2000>;
+ };
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS_PARSER
+ &clkc CLKID_DEMUX
+ &clkc CLKID_AHB_ARB0
+ &clkc CLKID_DOS
+ &clkc CLKID_CLK81
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVC_MUX
+ &clkc CLKID_HEVCF_MUX>;
+ clock-names = "parser_top",
+ "demux",
+ "ahbarb0",
+ "vdec",
+ "clk_81",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevc_mux",
+ "clk_hevcb_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ vcodec_dec {
+ compatible = "amlogic, vcodec-dec";
+ dev_name = "aml-vcodec-dec";
+ status = "okay";
+ };
+
+ amvenc_avc{
+ compatible = "amlogic, amvenc_avc";
+ dev_name = "amvenc_avc";
+ status = "okay";
+ interrupts = <0 45 1>;
+ interrupt-names = "mailbox_2";
+ };
+
+ hevc_enc{
+ compatible = "cnm, HevcEnc";
+ //memory-region = <&hevc_enc_reserved>;
+ dev_name = "HevcEnc";
+ status = "okay";
+ interrupts = <0 187 1>;
+ interrupt-names = "wave420l_irq";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ io_reg_base{
+ reg = <0x0 0xff610000 0x0 0x4000>;
+ };
+ };
+
+ rdma{
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "okay";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ meson_fb: meson-fb {
+ compatible = "amlogic, meson-g12a";
+ memory-region = <&logo_reserved>;
+ dev_name = "meson-fb";
+ status = "disable";
+ interrupts = <0 3 1
+ 0 56 1
+ 0 89 1>;
+ interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ scale_mode = <1>;
+ /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ display_size_default = <1920 1080 1920 2160 32>;
+ /*1920*1080*4*3 = 0x17BB000*/
+ clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc";
+ };
+ irblaster: meson-irblaster {
+ compatible = "amlogic, meson_irblaster";
+ reg = <0x0 0xff80014c 0x0 0x10>,
+ <0x0 0xff800040 0x0 0x4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&irblaster_pins>;
+ interrupts = <0 198 1>;
+ status = "okay";
+ };
+
+ sd_emmc_c: emmc@ffe07000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe07000 0x0 0x800>;
+ interrupts = <0 191 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ /* mmc-ddr-1_8v; */
+ /* mmc-hs200-1_8v; */
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ /*caps defined in dts*/
+ tx_delay = <0>;
+ co_phase = <3>;
+ calc_f = <1>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_12 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b1:sd1@ffe05000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe05000 0x0 0x800>;
+ interrupts = <0 190 1>;
+
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "sd_to_ao_jtag_pins",
+ "ao_to_sd_jtag_pins";
+
+ pinctrl-0 = <&sd_all_pins>;
+ pinctrl-1 = <&sd_clk_cmd_pins>;
+ pinctrl-2 = <&sd_1bit_pins>;
+ pinctrl-3 = <&sd_to_ao_uart_clr_pins
+ &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-6 = <&sd_to_ao_uart_clr_pins
+ &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-8 = <&sd_to_ao_uart_clr_pins
+ &ao_to_sd_uart_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+
+ sd_emmc_b2:sd2@ffe05000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe05000 0x0 0x800>;
+ interrupts = <0 190 4>;
+
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "sd_to_ao_jtag_pins",
+ "ao_to_sd_jtag_pins",
+ "sdio_noclr_all_pins",
+ "sdio_noclr_clk_cmd_pins",
+ "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_x_clr_pins &sd_all_pins>;
+ pinctrl-1 = <&sdio_x_clr_pins &sd_clk_cmd_pins>;
+ pinctrl-2 = <&sdio_x_clr_pins &sd_1bit_pins>;
+ pinctrl-3 = <&sdio_x_clr_pins &sd_to_ao_uart_clr_pins
+ &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sdio_x_clr_pins &sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sdio_x_clr_pins
+ &sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-6 = <&sdio_x_en_pins &sd_to_ao_uart_clr_pins
+ &sd_clr_noall_pins &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sdio_x_en_pins
+ &sd_clr_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-8 = <&sdio_x_en_pins &sd_to_ao_uart_clr_pins
+ &sd_clr_noall_pins &ao_to_sd_uart_pins>;
+ pinctrl-9 = <&sd_clr_noall_pins
+ &sdio_x_en_pins &sdio_x_all_pins>;
+ pinctrl-10 = <&sd_clr_noall_pins
+ &sdio_x_en_pins &sdio_x_clk_cmd_pins>;
+ pinctrl-11 = <&sd_clr_all_pins
+ &sdio_x_en_pins &sdio_x_all_pins>;
+ pinctrl-12 = <&sd_clr_all_pins
+ &sdio_x_en_pins &sdio_x_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 5:NON sdio device(means sd/mmc card)
+ */
+ };
+
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 5:NON sdio device(means sd/mmc card)
+ */
+ };
+ };
+
+ sd_emmc_a:sdio@ffe03000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe03000 0x0 0x800>;
+ interrupts = <0 189 4>;
+
+ pinctrl-names = "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_all_pins>;
+ pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_A>,
+ <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ /* max_req_size = <0x20000>; */ /**128KB*/
+ max_req_size = <0x400>;
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ dmode = "pio";
+ };
+ };
+
+ nand: nfc@0 {
+ compatible = "amlogic, aml_mtd_nand";
+ dev_name = "mtdnand";
+ status = "disabled";
+ reg = <0x0 0xFFE07800 0x0 0x200>;
+ interrupts = <0 34 1>;
+
+ pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&all_nand_pins>;
+ pinctrl-2 = <&nand_cs_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>;
+ clock-names = "core", "clkin";
+
+ device_id = <0>;
+ /*fip/tpl configurations, must be same
+ * with uboot if bl_mode was set as 1
+ * bl_mode: 0 compact mode; 1 descrete mode
+ * if bl_mode was set as 1, fip configuration will work
+ */
+ bl_mode = <1>;
+ /*copy count of fip*/
+ fip_copies = <4>;
+ /*size of each fip copy */
+ fip_size = <0x200000>;
+ nand_clk_ctrl = <0xFFE07000>;
+ /*partions defined in dts */
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "disabled";
+ compatible = "amlogic, meson-cooldev";
+ device_name = "mcooldev";
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <115>;
+ cluster_id = <0>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <358>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpufreq_cool0";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "gpucore_cool0";
+ device_type = "gpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpufreq_cool0:gpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore_cool0:gpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+ /*meson cooling devices end*/
+
+ thermal-zones {
+ soc_thermal: soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <1460>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ pswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ phot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ pcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpucore_cool0 0 3>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ gpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpucore_cool0 0 2>;
+ contribution = <1024>;
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <2150>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dhot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ dcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ };
+ };
+ /*thermal zone end*/
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, snd-iomap";
+ status = "okay";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ pdm_bus {
+ reg = <0x0 0xFF640000 0x0 0x2000>;
+ };
+ audiobus_base {
+ reg = <0x0 0xFF642000 0x0 0x2000>;
+ };
+ audiolocker_base {
+ reg = <0x0 0xFF64A000 0x0 0x2000>;
+ };
+ eqdrc_base {
+ reg = <0x0 0xFF642800 0x0 0x1800>;
+ };
+ reset_base {
+ reg = <0x0 0xFFD01000 0x0 0x1000>;
+ };
+ };
+
+ vddcpu0: pwmao_d-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm_AO_cd MESON_PWM_1 1250 0>;
+ regulator-name = "vddcpu0";
+ regulator-min-microvolt = <721000>;
+ regulator-max-microvolt = <1022000>;
+ regulator-always-on;
+ max-duty-cycle = <1250>;
+ /* Voltage Duty-Cycle */
+ voltage-table = <1022000 0>,
+ <1011000 3>,
+ <1001000 6>,
+ <991000 10>,
+ <981000 13>,
+ <971000 16>,
+ <961000 20>,
+ <951000 23>,
+ <941000 26>,
+ <931000 30>,
+ <921000 33>,
+ <911000 36>,
+ <901000 40>,
+ <891000 43>,
+ <881000 46>,
+ <871000 50>,
+ <861000 53>,
+ <851000 56>,
+ <841000 60>,
+ <831000 63>,
+ <821000 67>,
+ <811000 70>,
+ <801000 73>,
+ <791000 76>,
+ <781000 80>,
+ <771000 83>,
+ <761000 86>,
+ <751000 90>,
+ <741000 93>,
+ <731000 96>,
+ <721000 100>;
+ status = "okay";
+ };
+
+ ddr_bandwidth {
+ compatible = "amlogic, ddr-bandwidth";
+ status = "okay";
+ reg = <0x0 0xff638000 0x0 0x100
+ 0x0 0xff638c00 0x0 0x100>;
+ interrupts = <0 52 1>;
+ interrupt-names = "ddr_bandwidth";
+ };
+ dmc_monitor {
+ compatible = "amlogic, dmc_monitor";
+ status = "okay";
+ reg_base = <0xff639000>;
+ interrupts = <0 51 1>;
+ };
+
+ defendkey: defendkey {
+ compatible = "amlogic, defendkey";
+ reg = <0x0 0xff630218 0x0 0x4>; /*RNG_USR_DATA*/
+ mem_size = <0x0 0x100000>;
+ status = "okay";
+ };
+
+ aml_dma {
+ compatible = "amlogic,aml_txlx_dma";
+ reg = <0x0 0xff63e000 0x0 0x48>;
+ interrupts = <0 180 1>;
+
+ aml_aes {
+ compatible = "amlogic,aes_g12a_dma";
+ dev_name = "aml_aes_dma";
+ status = "okay";
+ };
+
+ aml_sha {
+ compatible = "amlogic,sha_dma";
+ dev_name = "aml_sha_dma";
+ status = "okay";
+ };
+ };
+
+ rng {
+ compatible = "amlogic,meson-rng";
+ status = "okay";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0x0 0xff630218 0x0 0x4>;
+ quality = /bits/ 16 <1000>;
+ };
+
+ efuse: efuse{
+ compatible = "amlogic, efuse";
+ read_cmd = <0x82000030>;
+ write_cmd = <0x82000031>;
+ get_max_cmd = <0x82000033>;
+ key = <&efusekey>;
+ clocks = <&clkc CLKID_EFUSE>;
+ clock-names = "efuse_clk";
+ status = "disabled";
+ };
+
+ cpu_ver_name {
+ compatible = "amlogic, cpu-major-id-g12a";
+ };
+};/* end of / */
+
+&pinctrl_aobus {
+ sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
+ mux {
+ groups = "GPIOAO_0",
+ "GPIOAO_1";
+ function = "gpio_aobus";
+ };
+ };
+
+ sd_to_ao_uart_pins:sd_to_ao_uart_pins {
+ mux {
+ groups = "uart_ao_tx_a",
+ "uart_ao_rx_a";
+ function = "uart_ao_a";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ ao_uart_pins:ao_uart {
+ mux {
+ groups = "uart_ao_tx_a",
+ "uart_ao_rx_a";
+ function = "uart_ao_a";
+ };
+ };
+
+ ao_b_uart_pins:ao_b_uart {
+ mux {
+ groups = "uart_ao_tx_b_2",
+ "uart_ao_rx_b_3";
+ function = "uart_ao_b";
+ };
+ };
+
+ ao_i2c_master_pins1:ao_i2c_pins1 {
+ mux {
+ groups = "i2c_ao_sck",
+ "i2c_ao_sda";
+ function = "i2c_ao";
+ drive-strength = <2>;
+ };
+ };
+
+ ao_i2c_master_pins2:ao_i2c_pins2 {
+ mux {
+ groups = "i2c_ao_sck_e",
+ "i2c_ao_sda_e";
+ function = "i2c_ao";
+ drive-strength = <2>;
+ };
+ };
+
+ ao_i2c_slave_pins:ao_i2c_slave_pins {
+ mux {
+ groups = "i2c_ao_slave_sck",
+ "i2c_ao_slave_sda";
+ function = "i2c_ao_slave";
+ };
+ };
+
+ pwm_ao_a_pins: pwm_ao_a {
+ mux {
+ groups = "pwm_ao_a";
+ function = "pwm_ao_a";
+ };
+ };
+
+ pwm_ao_a_hiz_pins: pwm_ao_a_hiz {
+ mux {
+ groups = "pwm_ao_a_hiz";
+ function = "pwm_ao_a";
+ };
+ };
+
+ pwm_ao_b_pins: pwm_ao_b {
+ mux {
+ groups = "pwm_ao_b";
+ function = "pwm_ao_b";
+ };
+ };
+
+ pwm_ao_c_pins1: pwm_ao_c_pins1 {
+ mux {
+ groups = "pwm_ao_c_4";
+ function = "pwm_ao_c";
+ };
+ };
+
+ pwm_ao_c_pins2: pwm_ao_c_pins2 {
+ mux {
+ groups = "pwm_ao_c_6";
+ function = "pwm_ao_c";
+ };
+ };
+
+ pwm_ao_c_hiz_pins: pwm_ao_c_hiz {
+ mux {
+ groups = "pwm_ao_c_hiz_4";
+ function = "pwm_ao_c";
+ };
+ };
+
+ pwm_ao_d_pins1: pwm_ao_d_pins1 {
+ mux {
+ groups = "pwm_ao_d_5";
+ function = "pwm_ao_d";
+ };
+ };
+
+ pwm_ao_d_pins2: pwm_ao_d_pins2 {
+ mux {
+ groups = "pwm_ao_d_10";
+ function = "pwm_ao_d";
+ };
+ };
+
+ pwm_ao_d_pins3: pwm_ao_d_pins3 {
+ mux {
+ groups = "pwm_ao_d_e";
+ function = "pwm_ao_d";
+ };
+ };
+
+ aocec_a: ao_ceca {
+ mux {
+ groups = "cec_ao_a";
+ function = "cec_ao";
+ };
+ };
+
+ aocec_b: ao_cecb {
+ mux {
+ groups = "cec_ao_b";
+ function = "cec_ao";
+ };
+ };
+
+ jtag_apao_pins:jtag_apao_pin {
+ mux {
+ groups = "jtag_a_tdi",
+ "jtag_a_tdo",
+ "jtag_a_clk",
+ "jtag_a_tms";
+ function = "jtag_a";
+ };
+ };
+};
+
+&pinctrl_periphs {
+ /* sdemmc portC */
+ emmc_clk_cmd_pins:emmc_clk_cmd_pins {
+ mux {
+ groups = "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ emmc_conf_pull_up:emmc_conf_pull_up {
+ mux {
+ groups = "emmc_nand_d7",
+ "emmc_nand_d6",
+ "emmc_nand_d5",
+ "emmc_nand_d4",
+ "emmc_nand_d3",
+ "emmc_nand_d2",
+ "emmc_nand_d1",
+ "emmc_nand_d0",
+ "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ emmc_conf_pull_done:emmc_conf_pull_done {
+ mux {
+ groups = "emmc_nand_ds";
+ function = "emmc";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ /* sdemmc portB */
+ sd_clk_cmd_pins:sd_clk_cmd_pins {
+ mux {
+ groups = "sdcard_cmd_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "sdcard_clk_c";
+ function = "sdcard";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sd_all_pins:sd_all_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_d1_c",
+ "sdcard_d2_c",
+ "sdcard_d3_c",
+ "sdcard_cmd_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "sdcard_clk_c";
+ function = "sdcard";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sd_1bit_pins:sd_1bit_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_cmd_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "sdcard_clk_c";
+ function = "sdcard";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sd_clr_all_pins:sd_clr_all_pins {
+ mux {
+ groups = "GPIOC_0",
+ "GPIOC_1",
+ "GPIOC_2",
+ "GPIOC_3",
+ "GPIOC_5";
+ function = "gpio_periphs";
+ output-high;
+ };
+ mux1 {
+ groups = "GPIOC_4";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+ sd_clr_noall_pins:sd_clr_noall_pins {
+ mux {
+ groups = "GPIOC_0",
+ "GPIOC_1",
+ "GPIOC_4",
+ "GPIOC_5";
+ function = "gpio_periphs";
+ output-high;
+ };
+ };
+
+ ao_to_sd_uart_pins:ao_to_sd_uart_pins {
+ mux {
+ groups = "uart_ao_tx_a_c3",
+ "uart_ao_rx_a_c2";
+ function = "uart_ao_a_ee";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ /* sdemmc portA */
+ sdio_clk_cmd_pins:sdio_clk_cmd_pins {
+ mux {
+ groups = "sdio_clk",
+ "sdio_cmd";
+ function = "sdio";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+
+ sdio_all_pins:sdio_all_pins {
+ mux {
+ groups = "sdio_d0",
+ "sdio_d1",
+ "sdio_d2",
+ "sdio_d3",
+ "sdio_clk",
+ "sdio_cmd";
+ function = "sdio";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+
+ sdio_x_clk_cmd_pins:sdio_x_clk_cmd_pins {
+ mux {
+ groups = "GPIOX_5";
+ function = "gpio_periphs";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "GPIOX_4";
+ function = "gpio_periphs";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sdio_x_all_pins:sdio_x_all_pins {
+ mux {
+ groups = "GPIOX_0",
+ "GPIOX_1",
+ "GPIOX_2",
+ "GPIOX_3",
+ "GPIOX_5";
+ function = "gpio_periphs";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ mux1 {
+ groups = "GPIOX_4";
+ function = "gpio_periphs";
+ bias-pull-up;
+ output-high;
+ drive-strength = <3>;
+ };
+ };
+
+ sdio_x_en_pins:sdio_x_en_pins {
+ mux {
+ groups = "sdio_dummy";
+ function = "sdio";
+ bias-pull-up;
+ output-high;
+ };
+ };
+
+ sdio_x_clr_pins:sdio_x_clr_pins {
+ mux {
+ groups = "GPIOV_0";
+ function = "gpio_periphs";
+ bias-pull-up;
+ output-low;
+ };
+ mux1 {
+ groups = "GPIOX_4";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+ all_nand_pins: all_nand_pins {
+ mux {
+ groups = "emmc_nand_d0",
+ "emmc_nand_d1",
+ "emmc_nand_d2",
+ "emmc_nand_d3",
+ "emmc_nand_d4",
+ "emmc_nand_d5",
+ "emmc_nand_d6",
+ "emmc_nand_d7",
+ "nand_ce0",
+ "nand_ale",
+ "nand_cle",
+ "nand_wen_clk",
+ "nand_ren_wr",
+ "nand_rb0";
+ function = "nand";
+ input-enable;
+ };
+ };
+
+ nand_cs_pins: nand_cs {
+ mux {
+ groups = "nand_ce0";
+ function = "nand";
+ };
+ };
+
+ i2c0_master_pins1:i2c0_pins1 {
+ mux {
+ groups = "i2c0_sda_c",
+ "i2c0_sck_c";
+ function = "i2c0";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c0_master_pins2:i2c0_pins2 {
+ mux {
+ groups = "i2c0_sda_z0",
+ "i2c0_sck_z1";
+ function = "i2c0";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c0_master_pins3:i2c0_pins3 {
+ mux {
+ groups = "i2c0_sda_z7",
+ "i2c0_sck_z8";
+ function = "i2c0";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c1_master_pins1:i2c1_pins1 {
+ mux {
+ groups = "i2c1_sda_x",
+ "i2c1_sck_x";
+ function = "i2c1";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c1_master_pins2:i2c1_pins2 {
+ mux {
+ groups = "i2c1_sda_h2",
+ "i2c1_sck_h3";
+ function = "i2c1";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c1_master_pins3:i2c1_pins3 {
+ mux {
+ groups = "i2c1_sda_h6",
+ "i2c1_sck_h7";
+ function = "i2c1";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c2_master_pins1:i2c2_pins1 {
+ mux {
+ groups = "i2c2_sda_x",
+ "i2c2_sck_x";
+ function = "i2c2";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c2_master_pins2:i2c2_pins2 {
+ mux {
+ groups = "i2c2_sda_z",
+ "i2c2_sck_z";
+ function = "i2c2";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c3_master_pins1:i2c3_pins1 {
+ mux {
+ groups = "i2c3_sda_h",
+ "i2c3_sck_h";
+ function = "i2c3";
+ drive-strength = <2>;
+ };
+ };
+
+ i2c3_master_pins2:i2c3_pins2 {
+ mux {
+ groups = "i2c3_sda_a",
+ "i2c3_sck_a";
+ function = "i2c3";
+ drive-strength = <2>;
+ };
+ };
+
+ /*dvb_p_ts1_pins: dvb_p_ts1_pins {
+ * tsin_b {
+ * groups = "tsin_b_sop_z",
+ * "tsin_b_valid_z",
+ * "tsin_b_clk_z",
+ * "tsin_b_din0_z",
+ * "tsin_b_din1",
+ * "tsin_b_din2",
+ * "tsin_b_din3",
+ * "tsin_b_din4",
+ * "tsin_b_din5",
+ * "tsin_b_din6",
+ * "tsin_b_din7";
+ * function = "tsin_b";
+ * };
+ *};
+ */
+
+ pwm_a_pins: pwm_a {
+ mux {
+ groups = "pwm_a";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_b_pins1: pwm_b_pins1 {
+ mux {
+ groups = "pwm_b_x7";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins2: pwm_b_pins2 {
+ mux {
+ groups = "pwm_b_x19";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_c_pins1: pwm_c_pins1 {
+ mux {
+ groups = "pwm_c_c4";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins2: pwm_c_pins2 {
+ mux {
+ groups = "pwm_c_x5";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins3: pwm_c_pins3 {
+ mux {
+ groups = "pwm_c_x8";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_d_pins1: pwm_d_pins1 {
+ mux {
+ groups = "pwm_d_x3";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins2: pwm_d_pins2 {
+ mux {
+ groups = "pwm_d_x6";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_e_pins: pwm_e {
+ mux {
+ groups = "pwm_e";
+ function = "pwm_e";
+ };
+ };
+
+ pwm_f_pins1: pwm_f_pins1 {
+ mux {
+ groups = "pwm_f_x";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins2: pwm_f_pins2 {
+ mux {
+ groups = "pwm_f_h";
+ function = "pwm_f";
+ };
+ };
+
+ spicc0_pins_x: spicc0_pins_x {
+ mux {
+ groups = "spi0_mosi_x",
+ "spi0_miso_x",
+ //"spi0_ss0_x",
+ "spi0_clk_x";
+ function = "spi0";
+ drive-strength = <1>;
+ };
+ };
+
+ spicc0_pins_c: spicc0_pins_c {
+ mux {
+ groups = "spi0_mosi_c",
+ "spi0_miso_c",
+ "spi0_ss0_c",
+ "spi0_clk_c";
+ function = "spi0";
+ drive-strength = <1>;
+ };
+ };
+
+ spicc1_pins: spicc1_pins {
+ mux {
+ groups = "spi1_mosi",
+ "spi1_miso",
+ //"spi1_ss0",
+ "spi1_clk";
+ function = "spi1";
+ drive-strength = <1>;
+ };
+ };
+
+ a_uart_pins:a_uart {
+ mux {
+ groups = "uart_tx_a",
+ "uart_rx_a",
+ "uart_cts_a",
+ "uart_rts_a";
+ function = "uart_a";
+ };
+ };
+
+ b_uart_pins:b_uart {
+ mux {
+ groups = "uart_tx_b",
+ "uart_rx_b";
+ function = "uart_b";
+ };
+ };
+
+ c_uart_pins:c_uart {
+ mux {
+ groups = "uart_tx_c",
+ "uart_rx_c";
+ function = "uart_c";
+ };
+ };
+
+ hdmitx_hpd: hdmitx_hpd {
+ mux {
+ groups = "hdmitx_hpd_in";
+ function = "hdmitx";
+ bias-disable;
+ };
+ };
+
+ hdmitx_hpd_gpio: hdmitx_hpd_gpio {
+ mux {
+ groups = "GPIOH_1";
+ function = "gpio_periphs";
+ bias-disable;
+ };
+ };
+
+ hdmitx_ddc: hdmitx_ddc {
+ mux {
+ groups = "hdmitx_sda",
+ "hdmitx_sck";
+ function = "hdmitx";
+ bias-disable;
+ drive-strength = <3>;
+ };
+ };
+
+ eecec_a: ee_ceca {
+ mux {
+ groups = "cec_ao_a_ee";
+ function = "cec_ao_ee";
+ };
+ };
+
+ eecec_b: ee_cecb {
+ mux {
+ groups = "cec_ao_b_ee";
+ function = "cec_ao_ee";
+ };
+ };
+
+ internal_eth_pins: internal_eth_pins {
+ mux {
+ groups = "eth_link_led",
+ "eth_act_led";
+ function = "eth";
+ };
+ };
+
+ internal_gpio_pins: internal_gpio_pins {
+ mux {
+ groups = "GPIOZ_14",
+ "GPIOZ_15";
+ function = "gpio_periphs";
+ bias-disable;
+ input-enable;
+ };
+ };
+
+ external_eth_pins: external_eth_pins {
+ mux {
+ groups = "eth_mdio",
+ "eth_mdc",
+ "eth_rgmii_rx_clk",
+ "eth_rx_dv",
+ "eth_rxd0",
+ "eth_rxd1",
+ "eth_rxd2_rgmii",
+ "eth_rxd3_rgmii",
+ "eth_rgmii_tx_clk",
+ "eth_txen",
+ "eth_txd0",
+ "eth_txd1",
+ "eth_txd2_rgmii",
+ "eth_txd3_rgmii";
+ function = "eth";
+ drive-strength = <3>;
+ };
+ };
+
+ jtag_apee_pins:jtag_apee_pin {
+ mux {
+ groups = "jtag_b_tdi",
+ "jtag_b_tdo",
+ "jtag_b_clk",
+ "jtag_b_tms";
+ function = "jtag_b";
+ };
+ };
+};
+
+&pinctrl_aobus {
+ remote_pins:remote_pin {
+ mux {
+ groups = "remote_input_ao";
+ function = "remote_input_ao";
+ };
+ };
+
+ irblaster_pins:irblaster_pin {
+ mux {
+ groups = "remote_out_ao";
+ function = "remote_out_ao";
+ };
+ };
+}; /* end of pinctrl_aobus */
diff --git a/arch/arm64/boot/dts/amlogic/sm1_pxp.dts b/arch/arm64/boot/dts/amlogic/sm1_pxp.dts
new file mode 100644
index 0000000..3b74c6e
--- a/dev/null
+++ b/arch/arm64/boot/dts/amlogic/sm1_pxp.dts
@@ -0,0 +1,729 @@
+/*
+ * arch/arm64/boot/dts/amlogic/sm1_pxp.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesongsm1.dtsi"
+
+/ {
+ model = "Amlogic";
+ compatible = "amlogic, g12a";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart_AO;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c_AO;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x400000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
+ };
+
+ secos_reserved:linux,secos {
+ status = "disable";
+ compatible = "amlogic, aml_secos_memory";
+ reg = <0x0 0x05300000 0x0 0x2000000>;
+ no-map;
+ };
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x800000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x3f800000 0x0 0x800000>;
+ };
+ ion_cma_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x8000000>;
+ alignment = <0x0 0x400000>;
+ };
+
+ //di_reserved:linux,di {
+ //compatible = "amlogic, di-mem";
+ /* buffer_size = 3621952(yuv422 8bit) */
+ /* 4179008(yuv422 10bit full pack mode) */
+ /** 10x3621952=34.6M(0x23) support 8bit **/
+ /** 10x4736064=45.2M(0x2e) support 12bit **/
+ /** 10x4179008=40M(0x28) support 10bit **/
+ //size = <0x0 0x2800000>;
+ //no-map;
+ //};
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4074560(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4074560=40M(0x28) support 10bit
+ */
+ size = <0x0 0x02800000>;
+ alignment = <0x0 0x400000>;
+ };
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x0 0x13400000>;
+ alignment = <0x0 0x400000>;
+ linux,contiguous-region;
+ };
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0 0x0>;
+ alignment = <0x0 0x100000>;
+ //no-map;
+ };
+ /* vdin0 CMA pool */
+ vdin0_cma_reserved:linux,vdin0_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16+4 M */
+ size = <0x0 0x04000000>;
+ alignment = <0x0 0x400000>;
+ };
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16 M */
+ size = <0x0 0x04000000>;
+ alignment = <0x0 0x400000>;
+ };
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-g12a";
+ dev_name = "cvbsout";
+ status = "okay";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+ clk_path = <0>;
+
+ /* performance: reg_address, reg_value */
+ /* g12a */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ performance_sarft = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x0
+ 0x1b05 0x9
+ 0x1c59 0xfc48
+ 0xffff 0x0>; /* ending flag */
+ performance_revB_telecom = <0x1bf0 0x9
+ 0x1b56 0x546
+ 0x1b12 0x8080
+ 0x1b05 0x9
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 40 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>;
+ clock-names = "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite";
+ clock-range = <334 667>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <1>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ };
+
+ efusekey:efusekey{
+ keynum = <4>;
+ key0 = <&key_0>;
+ key1 = <&key_1>;
+ key2 = <&key_2>;
+ key3 = <&key_3>;
+ key_0:key_0{
+ keyname = "mac";
+ offset = <0>;
+ size = <6>;
+ };
+ key_1:key_1{
+ keyname = "mac_bt";
+ offset = <6>;
+ size = <6>;
+ };
+ key_2:key_2{
+ keyname = "mac_wifi";
+ offset = <12>;
+ size = <6>;
+ };
+ key_3:key_3{
+ keyname = "usid";
+ offset = <18>;
+ size = <16>;
+ };
+ };//End efusekey
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <0>;/*1:enabel ;0:disable*/
+ wb_en = <0>;/*1:enabel ;0:disable*/
+ cm_en = <0>;/*1:enabel ;0:disable*/
+ /*0: 709/601 1: bt2020*/
+ tx_op_color_primary = <0>;
+ };
+ amdolby_vision {
+ compatible = "amlogic, dolby_vision_g12a";
+ dev_name = "aml_amdolby_vision_driver";
+ status = "okay";
+ tv_mode = <0>;/*1:enabel ;0:disable*/
+ };
+
+ /* Audio Related start */
+
+ pdm_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pdm_dummy_codec";
+ status = "okay";
+ };
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+ amlogic_codec:t9015{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_codec_T9015";
+ reg = <0x0 0xFF632000 0x0 0x2000>;
+ is_auge_used = <1>; /* meson or auge chipset used */
+ tdmout_index = <0>;
+ status = "disabled";
+ };
+ auge_sound {
+ compatible = "amlogic, g12a-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ aml-audio-card,dai-link@0 {
+ format = "dsp_a";
+ mclk-fs = <512>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ //bitclock-master = <&tdmacodec>;
+ //frame-master = <&tdmacodec>;
+ tdmacpu: cpu {
+ sound-dai = <&aml_tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1 1 1 1 1 1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1 1 1 1 1 1 1>;
+ dai-tdm-slot-num = <8>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <24576000>;
+ };
+ tdmacodec: codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ bitclock-master = <&aml_tdmb>;
+ frame-master = <&aml_tdmb>;
+ cpu {
+ sound-dai = <&aml_tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ format = "i2s";
+ mclk-fs = <256>;
+ continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ bitclock-master = <&aml_tdmc>;
+ frame-master = <&aml_tdmc>;
+ cpu {
+ sound-dai = <&aml_tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ cpu {
+ sound-dai = <&aml_pdm>;
+ };
+ codec {
+ sound-dai = <&pdm_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&aml_spdif>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&aml_spdif_b>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ audiolocker: locker {
+ compatible = "amlogic, audiolocker";
+ clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT
+ &clkaudio CLKID_AUDIO_LOCKER_IN
+ &clkaudio CLKID_AUDIO_MCLK_D
+ &clkaudio CLKID_AUDIO_MCLK_E
+ &clkc CLKID_MPLL1
+ &clkc CLKID_MPLL2>;
+ clock-names = "lock_out", "lock_in", "out_src",
+ "in_src", "out_calc", "in_ref";
+ interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq";
+ frequency = <49000000>; /* pll */
+ dividor = <49>; /* locker's parent */
+ status = "disabled";
+ };
+ /* Audio Related end */
+
+ /*DCDC for MP8756GD*/
+ cpu_opp_table0: cpu_opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <731000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <731000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <731000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-microvolt = <731000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <731000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <731000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1398000000>;
+ opp-microvolt = <761000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <791000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <831000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <861000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <1908000000>;
+ opp-microvolt = <981000>;
+ };
+ };
+
+ cpufreq-meson {
+ compatible = "amlogic, cpufreq-meson";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_ao_d_pins3>;
+ status = "okay";
+ };
+
+
+}; /* end of / */
+
+&meson_fb {
+ status = "okay";
+ display_size_default = <1920 1080 1920 2160 32>;
+ mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>;
+ logo_addr = "0x7f800000";
+ mem_alloc = <1>;
+ pxp_mode = <1>; /** 0:normal mode 1:pxp mode */
+};
+
+&pwm_AO_cd {
+ status = "okay";
+ };
+
+&audiobus {
+ aml_tdma: tdma {
+ compatible = "amlogic, g12a-snd-tdma";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <1 0>;
+ dai-tdm-lane-slot-mask-out = <0 1>;
+ dai-tdm-clk-sel = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_MPLL0>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmout_a &tdmin_a>;
+ };
+
+ aml_tdmb: tdmb {
+ compatible = "amlogic, g12a-snd-tdmb";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <1 1 1 1>;
+ dai-tdm-clk-sel = <1>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmb_mclk /*&tdmout_b &tdmin_b*/>;
+ };
+
+ aml_tdmc: tdmc {
+ compatible = "amlogic, g12a-snd-tdmc";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <0 1 0 0>;
+ #dai-tdm-lane-slot-mask-out = <1 0 1 1>;
+ #dai-tdm-lane-oe-slot-mask-in = <0 0 0 0>;
+ dai-tdm-lane-oe-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <2>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmc_mclk &tdmout_c &tdmin_c>;
+ };
+
+ aml_spdif: spdif {
+ compatible = "amlogic, g12a-snd-spdif-a";
+ #sound-dai-cells = <0>;
+ clocks = <&clkc CLKID_MPLL0
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT
+ &clkaudio CLKID_AUDIO_SPDIFIN_CTRL
+ &clkaudio CLKID_AUDIO_SPDIFOUT_CTRL>;
+ clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+ interrupts =
+ <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-names = "irq_spdifin";
+ pinctrl-names = "spdif_pins";
+ pinctrl-0 = <&spdifout &spdifin>;
+ status = "okay";
+ };
+ aml_spdif_b: spdif_b {
+ compatible = "amlogic, g12a-snd-spdif-b";
+ #sound-dai-cells = <0>;
+ clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+ &clkaudio CLKID_AUDIO_SPDIFOUTB
+ &clkaudio CLKID_AUDIO_SPDIFOUTB_CTRL>;
+ clock-names = "sysclk",
+ "gate_spdifout", "clk_spdifout";
+ pinctrl-names = "spdif_pins";
+ pinctrl-0 = <&spdifout_b>;
+ status = "okay";
+ };
+ aml_pdm: pdm {
+ compatible = "amlogic, g12a-snd-pdm";
+ #sound-dai-cells = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+ filter_mode = <1>; /* mode 0~4, defalut:1 */
+ status = "okay";
+ };
+ aml_pwrdet: pwrdet {
+ compatible = "amlogic, g12a-power-detect";
+
+ interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "pwrdet_irq";
+
+ /* pwrdet source sel
+ * 7: loopback;
+ * 6: tdmin_lb;
+ * 5: reserved;
+ * 4: pdmin;
+ * 3: spdifin;
+ * 2: tdmin_c;
+ * 1: tdmin_b;
+ * 0: tdmin_a;
+ */
+ pwrdet_src = <4>;
+
+ hi_th = <0x70000>;
+ lo_th = <0x16000>;
+
+ status = "disabled";
+ };
+}; /* end of audiobus */
+
+&pinctrl_periphs {
+ tdmout_a: tdmout_a {
+ mux { /* GPIOX_11, GPIOX_10, GPIOX_8 */
+ groups = "tdma_sclk",
+ "tdma_fs",
+ "tdma_dout1";
+ function = "tdma_out";
+ };
+ };
+
+ tdmin_a: tdmin_a {
+ mux { /* GPIOX_9 */
+ groups = "tdma_din0";
+ function = "tdma_in";
+ };
+ };
+
+ tdmb_mclk: tdmb_mclk {
+ mux {
+ groups = "mclk0_a";
+ function = "mclk0";
+ };
+ };
+
+ tdmc_mclk: tdmc_mclk {
+ mux { /* GPIOZ_8 */
+ groups = "mclk1_z";
+ function = "mclk1";
+ };
+ };
+
+ tdmout_c:tdmout_c {
+ mux { /* gpioz_7, gpioz_6, GPIOZ_2, GPIOZ_4, GPIOZ_5*/
+ groups = "tdmc_sclk_z",
+ "tdmc_fs_z",
+ "tdmc_dout0_z"
+ /*,"tdmc_dout2_z",
+ *"tdmc_dout3_z"
+ */;
+ function = "tdmc_out";
+ };
+ };
+
+ tdmin_c:tdmin_c {
+ mux { /* GPIOZ_3 */
+ groups = "tdmc_din1_z";
+ function = "tdmc_in";
+ };
+ };
+
+ spdifin: spdifin {
+ mux {/* gpioa_10 */
+ groups = "spdif_in_a10";
+ function = "spdif_in";
+ };
+ };
+
+ spdifout: spdifout {
+ mux {/* gpioa_11 */
+ groups = "spdif_out_a11";
+ function = "spdif_out";
+ };
+ };
+
+ spdifout_b: spdifout_b {
+ mux { /* gpioa_13 */
+ groups = "spdif_out_a13";
+ function = "spdif_out";
+ };
+ };
+
+ pdmin: pdmin {
+ mux { /* gpioa_5, gpioa_6, gpioa_7, gpioa_8, gpioa_9*/
+ groups = "pdm_din0_a",
+ "pdm_din1_a",
+ "pdm_din2_a",
+ "pdm_din3_a",
+ "pdm_dclk_a";
+ function = "pdm";
+ };
+ };
+
+}; /* end of pinctrl_periphs */
+
+&pinctrl_aobus {
+ tdmout_b: tdmout_b {
+ mux { /* GPIOAO_7, GPIOAO_8, GPIOAO_4 */
+ groups = "tdmb_fs_ao",
+ "tdmb_fs_ao",
+ "tdmb_dout0_ao";
+ function = "tdmb_out_ao";
+ };
+ };
+
+ tdmin_b:tdmin_b {
+ mux {
+ groups = "tdmb_din2_ao";
+ function = "tdmb_in_ao";
+ };
+ };
+}; /* end of pinctrl_aobus */
+/* Audio Related End */
+
+&aobus{
+
+};
+
+&irblaster {
+ status = "disabled";
+};
+
+/*if you want to use vdin just modify status to "ok"*/
+&vdin0 {
+ memory-region = <&vdin0_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <0x15>;
+};
+&vdin1 {
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+};
+&sd_emmc_b1 {
+ status = "okay";
+ sd {
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_NONREMOVABLE"; /**ptm debug */
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+
+&defendkey {
+ status = "okay";
+};
+
diff --git a/scripts/amlogic/mk_dtb_gx.sh b/scripts/amlogic/mk_dtb_gx.sh
index 28fb3d5..1fc3549 100755..100644
--- a/scripts/amlogic/mk_dtb_gx.sh
+++ b/scripts/amlogic/mk_dtb_gx.sh
@@ -36,6 +36,8 @@ make ARCH=arm64 axg_s420_v03.dtb || echo "Compile dtb Fail !!"
make ARCH=arm64 g12a_pxp.dtb || echo "Compile dtb Fail!!"
+make ARCH=arm64 sm1_pxp.dtb || echo "Compile dtb Fail!!"
+
make ARCH=arm64 g12a_s905d2_skt.dtb || echo "Compile dtb Fail!!"
make ARCH=arm64 g12b_pxp.dtb || echo "Compile dtb Fail!!"
generated by cgit at 2024-05-18 09:49:47 (GMT)