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path: root/arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts (plain)
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1/*
2 * arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts
3 *
4 * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18/dts-v1/;
19
20#include "mesontl1.dtsi"
21#include "partition_mbox_normal_P_32.dtsi"
22#include "mesontl1_skt-panel.dtsi"
23
24/ {
25 model = "Amlogic TL1 T962X2 SKT";
26 amlogic-dt-id = "tl1_t962x2_skt";
27 compatible = "amlogic, tl1_t962x2_skt";
28
29 aliases {
30 serial0 = &uart_AO;
31 serial1 = &uart_A;
32 serial2 = &uart_B;
33 serial3 = &uart_C;
34 serial4 = &uart_AO_B;
35 tsensor0 = &p_tsensor;
36 tsensor1 = &d_tsensor;
37 tsensor2 = &s_tsensor;
38 i2c0 = &i2c0;
39 i2c1 = &i2c1;
40 i2c2 = &i2c2;
41 i2c3 = &i2c3;
42 i2c4 = &i2c_AO;
43 };
44
45 memory@00000000 {
46 device_type = "memory";
47 linux,usable-memory = <0x0 0x80000000>;
48 };
49
50 reserved-memory {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54 /* global autoconfigured region for contiguous allocations */
55 ramoops@0x07400000 {
56 compatible = "ramoops";
57 reg = <0x07400000 0x00100000>;
58 record-size = <0x8000>;
59 console-size = <0x8000>;
60 ftrace-size = <0x0>;
61 pmsg-size = <0x8000>;
62 };
63
64 secmon_reserved: linux,secmon {
65 compatible = "shared-dma-pool";
66 reusable;
67 size = <0x400000>;
68 alignment = <0x400000>;
69 alloc-ranges = <0x05000000 0x400000>;
70 };
71
72 codec_mm_cma:linux,codec_mm_cma {
73 compatible = "shared-dma-pool";
74 reusable;
75 /* ion_codec_mm max can alloc size 80M*/
76 size = <0x13400000>;
77 alignment = <0x400000>;
78 linux,contiguous-region;
79 alloc-ranges = <0x30000000 0x50000000>;
80 };
81
82 /* codec shared reserved */
83 codec_mm_reserved:linux,codec_mm_reserved {
84 compatible = "amlogic, codec-mm-reserved";
85 size = <0x0>;
86 alignment = <0x100000>;
87 //no-map;
88 };
89
90 logo_reserved:linux,meson-fb {
91 compatible = "shared-dma-pool";
92 reusable;
93 size = <0x800000>;
94 alignment = <0x400000>;
95 alloc-ranges = <0x7f800000 0x800000>;
96 };
97
98 ion_cma_reserved:linux,ion-dev {
99 compatible = "shared-dma-pool";
100 reusable;
101 size = <0x8000000>;
102 alignment = <0x400000>;
103 };
104
105 /* vdin0 CMA pool */
106 //vdin0_cma_reserved:linux,vdin0_cma {
107 // compatible = "shared-dma-pool";
108 // reusable;
109 /* 3840x2160x4x4 ~=128 M */
110 // size = <0xc400000>;
111 // alignment = <0x400000>;
112 //};
113
114 /* vdin1 CMA pool */
115 vdin1_cma_reserved:linux,vdin1_cma {
116 compatible = "shared-dma-pool";
117 reusable;
118 /* 1920x1080x2x4 =16 M */
119 size = <0x1400000>;
120 alignment = <0x400000>;
121 };
122
123 /*demod_reserved:linux,demod {
124 * compatible = "amlogic, demod-mem";
125 * size = <0x800000>; //8M //100m 0x6400000
126 * alloc-ranges = <0x0 0x30000000>;
127 * //multi-use;
128 * //no-map;
129 *};
130 */
131
132 demod_cma_reserved:linux,demod_cma {
133 compatible = "shared-dma-pool";
134 reusable;
135 /* 8M */
136 size = <0x0800000>;
137 alignment = <0x400000>;
138 };
139
140 /*di CMA pool */
141 di_cma_reserved:linux,di_cma {
142 compatible = "shared-dma-pool";
143 reusable;
144 /* buffer_size = 3621952(yuv422 8bit)
145 * | 4736064(yuv422 10bit)
146 * | 4074560(yuv422 10bit full pack mode)
147 * 10x3621952=34.6M(0x23) support 8bit
148 * 10x4736064=45.2M(0x2e) support 12bit
149 * 10x4074560=40M(0x28) support 10bit
150 */
151 size = <0x02800000>;
152 alignment = <0x400000>;
153 };
154
155 /* for hdmi rx emp use */
156 hdmirx_emp_cma_reserved:linux,emp_cma {
157 compatible = "shared-dma-pool";
158 /*linux,phandle = <5>;*/
159 reusable;
160 /* 4M for emp to ddr */
161 /* 32M for tmds to ddr */
162 size = <0x400000>;
163 alignment = <0x400000>;
164 /* alloc-ranges = <0x400000 0x2000000>; */
165 };
166
167 /* POST PROCESS MANAGER */
168 ppmgr_reserved:linux,ppmgr {
169 compatible = "amlogic, ppmgr_memory";
170 size = <0x0>;
171 };
172
173 picdec_cma_reserved:linux,picdec {
174 compatible = "shared-dma-pool";
175 reusable;
176 size = <0x0>;
177 alignment = <0x0>;
178 linux,contiguous-region;
179 };
180 }; /* end of reserved-memory */
181
182 codec_mm {
183 compatible = "amlogic, codec, mm";
184 status = "okay";
185 memory-region = <&codec_mm_cma &codec_mm_reserved>;
186 };
187
188 picdec {
189 compatible = "amlogic, picdec";
190 memory-region = <&picdec_cma_reserved>;
191 dev_name = "picdec";
192 status = "okay";
193 };
194
195 ppmgr {
196 compatible = "amlogic, ppmgr";
197 memory-region = <&ppmgr_reserved>;
198 status = "okay";
199 };
200
201 deinterlace {
202 compatible = "amlogic, deinterlace";
203 status = "okay";
204 /* 0:use reserved; 1:use cma; 2:use cma as reserved */
205 flag_cma = <1>;
206 //memory-region = <&di_reserved>;
207 memory-region = <&di_cma_reserved>;
208 interrupts = <0 46 1
209 0 40 1>;
210 interrupt-names = "pre_irq", "post_irq";
211 clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
212 <&clkc CLKID_VPU_CLKB_COMP>;
213 clock-names = "vpu_clkb_tmp_composite",
214 "vpu_clkb_composite";
215 clock-range = <334 667>;
216 /* buffer-size = <3621952>;(yuv422 8bit) */
217 buffer-size = <4074560>;/*yuv422 fullpack*/
218 /* reserve-iomap = "true"; */
219 /* if enable nr10bit, set nr10bit-support to 1 */
220 post-wr-support = <1>;
221 nr10bit-support = <1>;
222 nrds-enable = <1>;
223 pps-enable = <1>;
224 };
225
226 vout {
227 compatible = "amlogic, vout";
228 status = "okay";
229 fr_auto_policy = <0>;
230 };
231
232 /* Audio Related start */
233 pdm_codec:dummy {
234 #sound-dai-cells = <0>;
235 compatible = "amlogic, pdm_dummy_codec";
236 status = "okay";
237 };
238
239 dummy_codec:dummy {
240 #sound-dai-cells = <0>;
241 compatible = "amlogic, aml_dummy_codec";
242 status = "okay";
243 };
244
245 tl1_codec:codec {
246 #sound-dai-cells = <0>;
247 compatible = "amlogic, tl1_acodec";
248 status = "okay";
249 reg = <0xff632000 0x1c>;
250 tdmout_index = <0>;
251 tdmin_index = <0>;
252 };
253
254 aml_dtv_demod {
255 compatible = "amlogic, ddemod-tl1";
256 dev_name = "aml_dtv_demod";
257 status = "okay";
258
259 //pinctrl-names="dtvdemod_agc";
260 //pinctrl-0=<&dtvdemod_agc>;
261
262 clocks = <&clkc CLKID_DAC_CLK>;
263 clock-names = "vdac_clk_gate";
264
265 reg = <0xff650000 0x4000 /*dtv demod base*/
266 0xff63c000 0x2000 /*hiu reg base*/
267 0xff800000 0x1000 /*io_aobus_base*/
268 0xffd01000 0x1000 /*reset*/
269 >;
270
271 /*move from dvbfe*/
272 dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
273 spectrum = <1>;
274 cma_flag = <1>;
275 cma_mem_size = <8>;
276 memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
277 };
278
279 auge_sound {
280 compatible = "amlogic, tl1-sound-card";
281 aml-audio-card,name = "AML-AUGESOUND";
282
283 avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>;
284
285 aml-audio-card,dai-link@0 {
286 format = "i2s";
287 mclk-fs = <256>;
288 continuous-clock;
289 //bitclock-inversion;
290 //frame-inversion;
291 /* master mode */
292 bitclock-master = <&tdma>;
293 frame-master = <&tdma>;
294 /* slave mode */
295 /*
296 * bitclock-master = <&tdmacodec>;
297 * frame-master = <&tdmacodec>;
298 */
299 /* suffix-name, sync with android audio hal used for */
300 suffix-name = "alsaPORT-i2s";
301 tdmacpu: cpu {
302 sound-dai = <&tdma>;
303 dai-tdm-slot-tx-mask =
304 <1 1>;
305 dai-tdm-slot-rx-mask =
306 <1 1>;
307 dai-tdm-slot-num = <2>;
308 dai-tdm-slot-width = <32>;
309 system-clock-frequency = <12288000>;
310 };
311 tdmacodec: codec {
312 //sound-dai = <&dummy_codec>;
313 sound-dai = <&ad82584f &tl1_codec>;
314 };
315 };
316
317 aml-audio-card,dai-link@1 {
318 status = "disabled";
319
320 format = "i2s";
321 mclk-fs = <256>;
322 //continuous-clock;
323 //bitclock-inversion;
324 //frame-inversion;
325 /* master mode */
326 bitclock-master = <&tdmb>;
327 frame-master = <&tdmb>;
328 /* slave mode */
329 //bitclock-master = <&tdmbcodec>;
330 //frame-master = <&tdmbcodec>;
331 /* suffix-name, sync with android audio hal used for */
332 suffix-name = "alsaPORT-pcm";
333 cpu {
334 sound-dai = <&tdmb>;
335 dai-tdm-slot-tx-mask = <1 1>;
336 dai-tdm-slot-rx-mask = <1 1>;
337 dai-tdm-slot-num = <2>;
338 /*
339 * dai-tdm-slot-tx-mask =
340 * <1 1 1 1 1 1 1 1>;
341 * dai-tdm-slot-rx-mask =
342 * <1 1 1 1 1 1 1 1>;
343 * dai-tdm-slot-num = <8>;
344 */
345 dai-tdm-slot-width = <32>;
346 system-clock-frequency = <12288000>;
347 };
348 tdmbcodec: codec {
349 sound-dai = <&dummy_codec>;
350 };
351 };
352
353 aml-audio-card,dai-link@2 {
354 status = "disabled";
355
356 format = "i2s";
357 mclk-fs = <256>;
358 //continuous-clock;
359 //bitclock-inversion;
360 //frame-inversion;
361 /* master mode */
362 bitclock-master = <&tdmc>;
363 frame-master = <&tdmc>;
364 /* slave mode */
365 //bitclock-master = <&tdmccodec>;
366 //frame-master = <&tdmccodec>;
367 /* suffix-name, sync with android audio hal used for */
368 //suffix-name = "alsaPORT-tdm";
369 cpu {
370 sound-dai = <&tdmc>;
371 dai-tdm-slot-tx-mask = <1 1>;
372 dai-tdm-slot-rx-mask = <1 1>;
373 dai-tdm-slot-num = <2>;
374 dai-tdm-slot-width = <32>;
375 system-clock-frequency = <12288000>;
376 };
377 tdmccodec: codec {
378 sound-dai = <&dummy_codec>;
379 };
380 };
381
382 aml-audio-card,dai-link@3 {
383 mclk-fs = <64>;
384 /* suffix-name, sync with android audio hal used for */
385 suffix-name = "alsaPORT-pdm";
386 cpu {
387 sound-dai = <&pdm>;
388 };
389 codec {
390 sound-dai = <&pdm_codec>;
391 };
392 };
393
394 aml-audio-card,dai-link@4 {
395 mclk-fs = <128>;
396 /* suffix-name, sync with android audio hal used for */
397 suffix-name = "alsaPORT-spdif";
398 cpu {
399 sound-dai = <&spdifa>;
400 system-clock-frequency = <6144000>;
401 };
402 codec {
403 sound-dai = <&dummy_codec>;
404 };
405 };
406
407 aml-audio-card,dai-link@5 {
408 mclk-fs = <128>;
409 cpu {
410 sound-dai = <&spdifb>;
411 system-clock-frequency = <6144000>;
412 };
413 codec {
414 sound-dai = <&dummy_codec>;
415 };
416 };
417
418 aml-audio-card,dai-link@6 {
419 mclk-fs = <256>;
420 suffix-name = "alsaPORT-tv";
421 cpu {
422 sound-dai = <&extn>;
423 system-clock-frequency = <12288000>;
424 };
425 codec {
426 sound-dai = <&dummy_codec>;
427 };
428 };
429 };
430
431 /* Audio Related end */
432 dvb {
433 compatible = "amlogic, dvb";
434 status = "okay";
435 fe0_mode = "internal";
436 fe0_tuner = <&tuner>;
437
438 /*"parallel","serial","disable"*/
439 ts2 = "parallel";
440 ts2_control = <0>;
441 ts2_invert = <0>;
442 interrupts = <0 23 1
443 0 5 1
444 0 53 1
445 0 19 1
446 0 25 1
447 0 17 1>;
448 interrupt-names = "demux0_irq",
449 "demux1_irq",
450 "demux2_irq",
451 "dvr0_irq",
452 "dvr1_irq",
453 "dvr2_irq";
454 clocks = <&clkc CLKID_DEMUX
455 &clkc CLKID_ASYNC_FIFO
456 &clkc CLKID_AHB_ARB0
457 /*&clkc CLKID_DOS_PARSER>;*/
458 &clkc CLKID_U_PARSER>;
459 clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
460 };
461
462 tvafe_avin_detect {
463 compatible = "amlogic, tl1_tvafe_avin_detect";
464 status = "okay";
465 device_mask = <1>;/*bit0:ch1;bit1:ch2*/
466 interrupts = <0 12 1>,
467 <0 13 1>;
468 };
469
470 amlvecm {
471 compatible = "amlogic, vecm-tl1";
472 dev_name = "aml_vecm";
473 status = "okay";
474 gamma_en = <1>;/*1:enabel ;0:disable*/
475 wb_en = <1>;/*1:enabel ;0:disable*/
476 cm_en = <1>;/*1:enabel ;0:disable*/
477 wb_sel = <1>;/*1:mtx ;0:gainoff*/
478 vlock_en = <1>;/*1:enable;0:disable*/
479 vlock_mode = <0x4>;
480 /* vlock work mode:
481 *bit0:auto ENC
482 *bit1:auto PLL
483 *bit2:manual PLL
484 *bit3:manual ENC
485 *bit4:manual soft ENC
486 *bit5:manual MIX PLL ENC
487 */
488 vlock_pll_m_limit = <1>;
489 vlock_line_limit = <3>;
490 };
491
492 vdin@0 {
493 compatible = "amlogic, vdin";
494 /*memory-region = <&vdin0_cma_reserved>;*/
495 status = "okay";
496 /*bit0:(1:share with codec_mm;0:cma alone)
497 *bit8:(1:alloc in discontinus way;0:alone in continuous way)
498 */
499 flag_cma = <0x101>;
500 /*MByte, if 10bit disable: 64M(YUV422),
501 *if 10bit enable: 64*1.5 = 96M(YUV422)
502 *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
503 *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
504 *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
505 *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
506 */
507 cma_size = <190>;
508 interrupts = <0 83 1>;
509 rdma-irq = <2>;
510 clocks = <&clkc CLKID_FCLK_DIV5>,
511 <&clkc CLKID_VDIN_MEAS_COMP>;
512 clock-names = "fclk_div5", "cts_vdin_meas_clk";
513 vdin_id = <0>;
514 /*vdin write mem color depth support:
515 * bit0:support 8bit
516 * bit1:support 9bit
517 * bit2:support 10bit
518 * bit3:support 12bit
519 * bit4:support yuv422 10bit full pack mode (from txl new add)
520 * bit8:use 8bit at 4k_50/60hz_10bit
521 * bit9:use 10bit at 4k_50/60hz_10bit
522 */
523 tv_bit_mode = <0x215>;
524 /* afbce_bit_mode: (amlogic frame buff compression encoder)
525 * bit 0~3:
526 * 0 -- normal mode, not use afbce
527 * 1 -- use afbce non-mmu mode
528 * 2 -- use afbce mmu mode
529 * bit 4:
530 * 0 -- afbce compression-lossy disable
531 * 1 -- afbce compression-lossy enable
532 */
533 afbce_bit_mode = <0>;
534 };
535
536 vdin@1 {
537 compatible = "amlogic, vdin";
538 memory-region = <&vdin1_cma_reserved>;
539 status = "okay";
540 /*bit0:(1:share with codec_mm;0:cma alone)
541 *bit8:(1:alloc in discontinus way;0:alone in continuous way)
542 */
543 flag_cma = <0>;
544 interrupts = <0 85 1>;
545 rdma-irq = <4>;
546 clocks = <&clkc CLKID_FCLK_DIV5>,
547 <&clkc CLKID_VDIN_MEAS_COMP>;
548 clock-names = "fclk_div5", "cts_vdin_meas_clk";
549 vdin_id = <1>;
550 /*vdin write mem color depth support:
551 *bit0:support 8bit
552 *bit1:support 9bit
553 *bit2:support 10bit
554 *bit3:support 12bit
555 */
556 tv_bit_mode = <0x15>;
557 };
558
559 tvafe {
560 compatible = "amlogic, tvafe-tl1";
561 /*memory-region = <&tvafe_cma_reserved>;*/
562 status = "okay";
563 flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
564 cma_size = <5>;/*MByte*/
565 reg = <0xff654000 0x2000>;/*tvafe reg base*/
566 reserve-iomap = "true";
567 tvafe_id = <0>;
568 //pinctrl-names = "default";
569 /*!!particular sequence, no more and no less!!!*/
570 tvafe_pin_mux = <
571 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
572 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
573 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
574 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
575 >;
576 clocks = <&clkc CLKID_DAC_CLK>;
577 clock-names = "vdac_clk_gate";
578 };
579
580 vbi {
581 compatible = "amlogic, vbi";
582 status = "okay";
583 interrupts = <0 83 1>;
584 };
585
586 cvbsout {
587 compatible = "amlogic, cvbsout-tl1";
588 status = "disabled";
589 clocks = <&clkc CLKID_VCLK2_ENCI
590 &clkc CLKID_VCLK2_VENCI0
591 &clkc CLKID_VCLK2_VENCI1
592 &clkc CLKID_DAC_CLK>;
593 clock-names = "venci_top_gate",
594 "venci_0_gate",
595 "venci_1_gate",
596 "vdac_clk_gate";
597 /* clk path */
598 /* 0:vid_pll vid2_clk */
599 /* 1:gp0_pll vid2_clk */
600 /* 2:vid_pll vid1_clk */
601 /* 3:gp0_pll vid1_clk */
602 clk_path = <0>;
603
604 /* performance: reg_address, reg_value */
605 /* tl1 */
606 performance = <0x1bf0 0x9
607 0x1b56 0x333
608 0x1b12 0x8080
609 0x1b05 0xfd
610 0x1c59 0xf850
611 0xffff 0x0>; /* ending flag */
612 performance_sarft = <0x1bf0 0x9
613 0x1b56 0x333
614 0x1b12 0x0
615 0x1b05 0x9
616 0x1c59 0xfc48
617 0xffff 0x0>; /* ending flag */
618 performance_revB_telecom = <0x1bf0 0x9
619 0x1b56 0x546
620 0x1b12 0x8080
621 0x1b05 0x9
622 0x1c59 0xf850
623 0xffff 0x0>; /* ending flag */
624 };
625
626 adc_keypad {
627 compatible = "amlogic, adc_keypad";
628 status = "okay";
629 key_name = "vol-", "vol+", "ch+", "ch-",
630 "menu", "source", "exit";
631 key_num = <7>;
632 io-channels = <&saradc SARADC_CH2 &saradc SARADC_CH3>;
633 io-channel-names = "key-chan-2", "key-chan-3";
634 key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2
635 SARADC_CH2 SARADC_CH3 SARADC_CH3 SARADC_CH3>;
636 key_code = <114 115 192 193 139 466 174>;
637 key_val = <0 143 266 389 0 143 266>; //val=voltage/1800mV*1023
638 key_tolerance = <40 40 40 40 40 40 40>;
639 };
640
641 unifykey {
642 compatible = "amlogic, unifykey";
643 status = "okay";
644
645 unifykey-num = <21>;
646 unifykey-index-0 = <&keysn_0>;
647 unifykey-index-1 = <&keysn_1>;
648 unifykey-index-2 = <&keysn_2>;
649 unifykey-index-3 = <&keysn_3>;
650 unifykey-index-4 = <&keysn_4>;
651 unifykey-index-5 = <&keysn_5>;
652 unifykey-index-6 = <&keysn_6>;
653 unifykey-index-7 = <&keysn_7>;
654 unifykey-index-8 = <&keysn_8>;
655 unifykey-index-9 = <&keysn_9>;
656 unifykey-index-10= <&keysn_10>;
657 unifykey-index-11 = <&keysn_11>;
658 unifykey-index-12 = <&keysn_12>;
659 unifykey-index-13 = <&keysn_13>;
660 unifykey-index-14 = <&keysn_14>;
661 unifykey-index-15 = <&keysn_15>;
662 unifykey-index-16 = <&keysn_16>;
663 unifykey-index-17 = <&keysn_17>;
664 unifykey-index-18 = <&keysn_18>;
665 unifykey-index-19 = <&keysn_19>;
666 unifykey-index-20 = <&keysn_20>;
667
668 keysn_0: key_0{
669 key-name = "usid";
670 key-device = "normal";
671 key-permit = "read","write","del";
672 };
673 keysn_1:key_1{
674 key-name = "mac";
675 key-device = "normal";
676 key-permit = "read","write","del";
677 };
678 keysn_2:key_2{
679 key-name = "hdcp";
680 key-device = "secure";
681 key-type = "sha1";
682 key-permit = "read","write","del";
683 };
684 keysn_3:key_3{
685 key-name = "secure_boot_set";
686 key-device = "efuse";
687 key-permit = "write";
688 };
689 keysn_4:key_4{
690 key-name = "mac_bt";
691 key-device = "normal";
692 key-permit = "read","write","del";
693 key-type = "mac";
694 };
695 keysn_5:key_5{
696 key-name = "mac_wifi";
697 key-device = "normal";
698 key-permit = "read","write","del";
699 key-type = "mac";
700 };
701 keysn_6:key_6{
702 key-name = "hdcp2_tx";
703 key-device = "normal";
704 key-permit = "read","write","del";
705 };
706 keysn_7:key_7{
707 key-name = "hdcp2_rx";
708 key-device = "normal";
709 key-permit = "read","write","del";
710 };
711 keysn_8:key_8{
712 key-name = "widevinekeybox";
713 key-device = "secure";
714 key-type = "sha1";
715 key-permit = "read","write","del";
716 };
717 keysn_9:key_9{
718 key-name = "deviceid";
719 key-device = "normal";
720 key-permit = "read","write","del";
721 };
722 keysn_10:key_10{
723 key-name = "hdcp22_fw_private";
724 key-device = "secure";
725 key-permit = "read","write","del";
726 };
727 keysn_11:key_11{
728 key-name = "hdcp22_rx_private";
729 key-device = "secure";
730 key-permit = "read","write","del";
731 };
732 keysn_12:key_12{
733 key-name = "hdcp22_rx_fw";
734 key-device = "normal";
735 key-permit = "read","write","del";
736 };
737 keysn_13:key_13{
738 key-name = "hdcp14_rx";
739 key-device = "normal";
740 key-type = "sha1";
741 key-permit = "read","write","del";
742 };
743 keysn_14:key_14{
744 key-name = "prpubkeybox";// PlayReady
745 key-device = "secure";
746 key-permit = "read","write","del";
747 };
748 keysn_15:key_15{
749 key-name = "prprivkeybox";// PlayReady
750 key-device = "secure";
751 key-permit = "read","write","del";
752 };
753 keysn_16:key_16{
754 key-name = "lcd";
755 key-device = "normal";
756 key-permit = "read","write","del";
757 };
758 keysn_17:key_17{
759 key-name = "lcd_extern";
760 key-device = "normal";
761 key-permit = "read","write","del";
762 };
763 keysn_18:key_18{
764 key-name = "backlight";
765 key-device = "normal";
766 key-permit = "read","write","del";
767 };
768 keysn_19:key_19{
769 key-name = "lcd_tcon";
770 key-device = "normal";
771 key-permit = "read","write","del";
772 };
773 keysn_20:key_20{
774 key-name = "attestationkeybox";// attestation key
775 key-device = "secure";
776 key-permit = "read","write","del";
777 };
778 }; /* End unifykey */
779
780 hdmirx {
781 compatible = "amlogic, hdmirx_tl1";
782 #address-cells=<1>;
783 #size-cells=<1>;
784 memory-region = <&hdmirx_emp_cma_reserved>;
785 status = "okay";
786 pinctrl-names = "default";
787 pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
788 &hdmirx_c_mux>;
789 repeat = <0>;
790 interrupts = <0 41 1>;
791 clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
792 <&clkc CLKID_HDMIRX_CFG_COMP>,
793 <&clkc CLKID_HDMIRX_ACR_COMP>,
794 <&clkc CLKID_HDMIRX_METER_COMP>,
795 <&clkc CLKID_HDMIRX_AXI_COMP>,
796 <&xtal>,
797 <&clkc CLKID_FCLK_DIV5>,
798 <&clkc CLKID_FCLK_DIV7>,
799 <&clkc CLKID_HDCP22_SKP_COMP>,
800 <&clkc CLKID_HDCP22_ESM_COMP>;
801 // <&clkc CLK_AUD_PLL2FS>,
802 // <&clkc CLK_AUD_PLL4FS>,
803 // <&clkc CLK_AUD_OUT>;
804 clock-names = "hdmirx_modet_clk",
805 "hdmirx_cfg_clk",
806 "hdmirx_acr_ref_clk",
807 "cts_hdmirx_meter_clk",
808 "cts_hdmi_axi_clk",
809 "xtal",
810 "fclk_div5",
811 "fclk_div7",
812 "hdcp_rx22_skp",
813 "hdcp_rx22_esm";
814 // "hdmirx_aud_pll2fs",
815 // "hdmirx_aud_pll4f",
816 // "clk_aud_out";
817 hdmirx_id = <0>;
818 en_4k_2_2k = <0>;
819 hpd_low_cec_off = <1>;
820 /* bit4: enable feature, bit3~0: port number */
821 disable_port = <0x0>;
822 /* MAP_ADDR_MODULE_CBUS */
823 /* MAP_ADDR_MODULE_HIU */
824 /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
825 /* MAP_ADDR_MODULE_SEC_AHB */
826 /* MAP_ADDR_MODULE_SEC_AHB2 */
827 /* MAP_ADDR_MODULE_APB4 */
828 /* MAP_ADDR_MODULE_TOP */
829 reg = < 0x0 0x0
830 0xff63C000 0x2000
831 0xffe0d000 0x2000
832 0x0 0x0
833 0x0 0x0
834 0x0 0x0
835 0xff610000 0xa000>;
836 };
837
838 aocec: aocec {
839 compatible = "amlogic, aocec-tl1";
840 /*device_name = "aocec";*/
841 status = "okay";
842 vendor_name = "Amlogic"; /* Max Chars: 8 */
843 /* Refer to the following URL at:
844 * http://standards.ieee.org/develop/regauth/oui/oui.txt
845 */
846 vendor_id = <0x000000>;
847 product_desc = "TL1"; /* Max Chars: 16 */
848 cec_osd_string = "AML_TV"; /* Max Chars: 14 */
849 port_num = <3>;
850 ee_cec;
851 arc_port_mask = <0x2>;
852 interrupts = <0 205 1
853 0 199 1>;
854 interrupt-names = "hdmi_aocecb","hdmi_aocec";
855 pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
856 pinctrl-0=<&aoceca_mux>;
857 pinctrl-1=<&aocecb_mux>;
858 pinctrl-2=<&aoceca_mux>;
859 reg = <0xFF80023c 0x4
860 0xFF800000 0x400>;
861 reg-names = "ao_exit","ao";
862 };
863
864 p_tsensor: p_tsensor@ff634800 {
865 compatible = "amlogic, r1p1-tsensor";
866 status = "okay";
867 reg = <0xff634800 0x50>,
868 <0xff800268 0x4>;
869 cal_type = <0x1>;
870 cal_a = <324>;
871 cal_b = <424>;
872 cal_c = <3159>;
873 cal_d = <9411>;
874 rtemp = <115000>;
875 interrupts = <0 35 0>;
876 clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
877 clock-names = "ts_comp";
878 #thermal-sensor-cells = <1>;
879 };
880
881 d_tsensor: d_tsensor@ff634c00 {
882 compatible = "amlogic, r1p1-tsensor";
883 status = "okay";
884 reg = <0xff634c00 0x50>,
885 <0xff800230 0x4>;
886 cal_type = <0x1>;
887 cal_a = <324>;
888 cal_b = <424>;
889 cal_c = <3159>;
890 cal_d = <9411>;
891 rtemp = <115000>;
892 interrupts = <0 36 0>;
893 clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
894 clock-names = "ts_comp";
895 #thermal-sensor-cells = <1>;
896 };
897
898 s_tsensor: s_tsensor@ff635000 {
899 compatible = "amlogic, r1p1-tsensor";
900 status = "okay";
901 reg = <0xff635000 0x50>,
902 <0xff80026c 0x4>;
903 cal_type = <0x1>;
904 cal_a = <324>;
905 cal_b = <424>;
906 cal_c = <3159>;
907 cal_d = <9411>;
908 rtemp = <115000>;
909 interrupts = <0 38 0>;
910 clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
911 clock-names = "ts_comp";
912 #thermal-sensor-cells = <1>;
913 };
914
915 meson_cooldev: meson-cooldev@0 {
916 status = "okay";
917 compatible = "amlogic, meson-cooldev";
918 cooling_devices {
919 cpufreq_cool_cluster0 {
920 min_state = <1000000>;
921 dyn_coeff = <140>;
922 gpu_pp = <2>;
923 cluster_id = <0>;
924 node_name = "cpufreq_cool0";
925 device_type = "cpufreq";
926 };
927 cpucore_cool_cluster0 {
928 min_state = <1>;
929 dyn_coeff = <0>;
930 gpu_pp = <2>;
931 cluster_id = <0>;
932 node_name = "cpucore_cool0";
933 device_type = "cpucore";
934 };
935 gpufreq_cool {
936 min_state = <400>;
937 dyn_coeff = <140>;
938 gpu_pp = <2>;
939 cluster_id = <0>;
940 node_name = "gpufreq_cool0";
941 device_type = "gpufreq";
942 };
943 gpucore_cool {
944 min_state = <1>;
945 dyn_coeff = <0>;
946 gpu_pp = <2>;
947 cluster_id = <0>;
948 node_name = "gpucore_cool0";
949 device_type = "gpucore";
950 };
951 };
952 cpufreq_cool0:cpufreq_cool0 {
953 #cooling-cells = <2>; /* min followed by max */
954 };
955 cpucore_cool0:cpucore_cool0 {
956 #cooling-cells = <2>; /* min followed by max */
957 };
958 gpufreq_cool0:gpufreq_cool0 {
959 #cooling-cells = <2>; /* min followed by max */
960 };
961 gpucore_cool0:gpucore_cool0 {
962 #cooling-cells = <2>; /* min followed by max */
963 };
964 };/*meson cooling devices end*/
965
966 thermal-zones {
967 pll_thermal: pll_thermal {
968 polling-delay = <1000>;
969 polling-delay-passive = <100>;
970 sustainable-power = <1322>;
971 thermal-sensors = <&p_tsensor 0>;
972 trips {
973 pswitch_on: trip-point@0 {
974 temperature = <60000>;
975 hysteresis = <5000>;
976 type = "passive";
977 };
978 pcontrol: trip-point@1 {
979 temperature = <75000>;
980 hysteresis = <5000>;
981 type = "passive";
982 };
983 phot: trip-point@2 {
984 temperature = <85000>;
985 hysteresis = <5000>;
986 type = "hot";
987 };
988 pcritical: trip-point@3 {
989 temperature = <110000>;
990 hysteresis = <1000>;
991 type = "critical";
992 };
993 };
994 cooling-maps {
995 cpufreq_cooling_map {
996 trip = <&pcontrol>;
997 cooling-device = <&cpufreq_cool0 0 11>;
998 contribution = <1024>;
999 };
1000 cpucore_cooling_map {
1001 trip = <&pcontrol>;
1002 cooling-device = <&cpucore_cool0 0 4>;
1003 contribution = <1024>;
1004 };
1005 gpufreq_cooling_map {
1006 trip = <&pcontrol>;
1007 cooling-device = <&gpufreq_cool0 0 4>;
1008 contribution = <1024>;
1009 };
1010 };
1011 };
1012 ddr_thermal: ddr_thermal {
1013 polling-delay = <2000>;
1014 polling-delay-passive = <1000>;
1015 sustainable-power = <1322>;
1016 thermal-sensors = <&d_tsensor 1>;
1017 trips {
1018 dswitch_on: trip-point@0 {
1019 temperature = <60000>;
1020 hysteresis = <5000>;
1021 type = "passive";
1022 };
1023 dcontrol: trip-point@1 {
1024 temperature = <75000>;
1025 hysteresis = <5000>;
1026 type = "passive";
1027 };
1028 dhot: trip-point@2 {
1029 temperature = <85000>;
1030 hysteresis = <5000>;
1031 type = "hot";
1032 };
1033 dcritical: trip-point@3 {
1034 temperature = <110000>;
1035 hysteresis = <1000>;
1036 type = "critical";
1037 };
1038 };
1039 };
1040 sar_thermal: sar_thermal {
1041 polling-delay = <2000>;
1042 polling-delay-passive = <1000>;
1043 sustainable-power = <1322>;
1044 thermal-sensors = <&s_tsensor 2>;
1045 trips {
1046 sswitch_on: trip-point@0 {
1047 temperature = <60000>;
1048 hysteresis = <5000>;
1049 type = "passive";
1050 };
1051 scontrol: trip-point@1 {
1052 temperature = <75000>;
1053 hysteresis = <5000>;
1054 type = "passive";
1055 };
1056 shot: trip-point@2 {
1057 temperature = <85000>;
1058 hysteresis = <5000>;
1059 type = "hot";
1060 };
1061 scritical: trip-point@3 {
1062 temperature = <110000>;
1063 hysteresis = <1000>;
1064 type = "critical";
1065 };
1066 };
1067 };
1068 };/*thermal zone end*/
1069
1070 /*DCDC for MP8756GD*/
1071 cpu_opp_table0: cpu_opp_table0 {
1072 compatible = "operating-points-v2";
1073 opp-shared;
1074
1075 opp00 {
1076 opp-hz = /bits/ 64 <100000000>;
1077 opp-microvolt = <699000>;
1078 };
1079 opp01 {
1080 opp-hz = /bits/ 64 <250000000>;
1081 opp-microvolt = <699000>;
1082 };
1083 opp02 {
1084 opp-hz = /bits/ 64 <500000000>;
1085 opp-microvolt = <709000>;
1086 };
1087 opp03 {
1088 opp-hz = /bits/ 64 <667000000>;
1089 opp-microvolt = <719000>;
1090 };
1091 opp04 {
1092 opp-hz = /bits/ 64 <1000000000>;
1093 opp-microvolt = <729000>;
1094 };
1095 opp05 {
1096 opp-hz = /bits/ 64 <1200000000>;
1097 opp-microvolt = <749000>;
1098 };
1099 opp06 {
1100 opp-hz = /bits/ 64 <1404000000>;
1101 opp-microvolt = <769000>;
1102 };
1103 opp07 {
1104 opp-hz = /bits/ 64 <1500000000>;
1105 opp-microvolt = <779000>;
1106 };
1107 opp08 {
1108 opp-hz = /bits/ 64 <1608000000>;
1109 opp-microvolt = <789000>;
1110 };
1111 opp09 {
1112 opp-hz = /bits/ 64 <1704000000>;
1113 opp-microvolt = <829000>;
1114 };
1115 opp10 {
1116 opp-hz = /bits/ 64 <1800000000>;
1117 opp-microvolt = <879000>;
1118 };
1119 opp11 {
1120 opp-hz = /bits/ 64 <1908000000>;
1121 opp-microvolt = <929000>;
1122 };
1123 };
1124
1125 cpufreq-meson {
1126 compatible = "amlogic, cpufreq-meson";
1127 pinctrl-names = "default";
1128 pinctrl-0 = <&pwm_ao_d_pins3>;
1129 status = "okay";
1130 };
1131
1132 tuner: tuner {
1133 compatible = "amlogic, tuner";
1134 status = "okay";
1135 tuner_name = "mxl661_tuner";
1136 tuner_i2c_adap = <&i2c0>;
1137 tuner_i2c_addr = <0x60>;
1138 tuner_xtal = <0>; /* 0: 16MHz, 1: 24MHz */
1139 tuner_xtal_mode = <0>;
1140 /* NO_SHARE_XTAL(0)
1141 * SLAVE_XTAL_SHARE(3)
1142 */
1143 tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */
1144 };
1145
1146 atv-demod {
1147 compatible = "amlogic, atv-demod";
1148 status = "okay";
1149 tuner = <&tuner>;
1150 btsc_sap_mode = <1>;
1151 /* pinctrl-names="atvdemod_agc_pins"; */
1152 /* pinctrl-0=<&atvdemod_agc_pins>; */
1153 reg = <0xff656000 0x2000 /* demod reg */
1154 0xff63c000 0x2000 /* hiu reg */
1155 0xff634000 0x2000 /* periphs reg */
1156 0xff64a000 0x2000>; /* audio reg */
1157 reg_23cf = <0x88188832>;
1158 /*default:0x88188832;r840 on haier:0x48188832*/
1159 };
1160
1161 sd_emmc_b: sd@ffe05000 {
1162 status = "okay";
1163 compatible = "amlogic, meson-mmc-tl1";
1164 reg = <0xffe05000 0x800>;
1165 interrupts = <0 190 1>;
1166
1167 pinctrl-names = "sd_all_pins",
1168 "sd_clk_cmd_pins",
1169 "sd_1bit_pins";
1170 pinctrl-0 = <&sd_all_pins>;
1171 pinctrl-1 = <&sd_clk_cmd_pins>;
1172 pinctrl-2 = <&sd_1bit_pins>;
1173
1174 clocks = <&clkc CLKID_SD_EMMC_B>,
1175 <&clkc CLKID_SD_EMMC_B_P0_COMP>,
1176 <&clkc CLKID_FCLK_DIV2>,
1177 <&clkc CLKID_FCLK_DIV5>,
1178 <&xtal>;
1179 clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
1180
1181 bus-width = <4>;
1182 cap-sd-highspeed;
1183 cap-mmc-highspeed;
1184 max-frequency = <100000000>;
1185 disable-wp;
1186 sd {
1187 pinname = "sd";
1188 ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
1189 caps = "MMC_CAP_4_BIT_DATA",
1190 "MMC_CAP_MMC_HIGHSPEED",
1191 "MMC_CAP_SD_HIGHSPEED";
1192 //"MMC_CAP_NONREMOVABLE"; /**ptm debug */
1193 f_min = <400000>;
1194 f_max = <200000000>;
1195 max_req_size = <0x20000>; /**128KB*/
1196 no_sduart = <1>;
1197 gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
1198 jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
1199 gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
1200 card_type = <5>;
1201 /* 3:sdio device(ie:sdio-wifi),
1202 * 4:SD combo (IO+mem) card
1203 */
1204 };
1205 };
1206
1207}; /* end of / */
1208
1209&i2c0 {
1210 status = "okay";
1211 clock-frequency = <300000>;
1212 pinctrl-names="default";
1213 pinctrl-0=<&i2c0_dv_pins>;
1214};
1215
1216&audiobus {
1217 tdma:tdm@0 {
1218 compatible = "amlogic, tl1-snd-tdma";
1219 #sound-dai-cells = <0>;
1220
1221 dai-tdm-lane-slot-mask-in = <1 0>;
1222 dai-tdm-lane-slot-mask-out = <1 1 1 1>;
1223 dai-tdm-clk-sel = <0>;
1224
1225 clocks = <&clkaudio CLKID_AUDIO_MCLK_A
1226 &clkc CLKID_MPLL0
1227 &clkc CLKID_MPLL1
1228 &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
1229 clock-names = "mclk", "clk_srcpll",
1230 "samesource_srcpll", "samesource_clk";
1231
1232 pinctrl-names = "tdm_pins";
1233 pinctrl-0 = <&tdma_mclk &tdmout_a>;
1234
1235 /*
1236 * 0: tdmout_a;
1237 * 1: tdmout_b;
1238 * 2: tdmout_c;
1239 * 3: spdifout;
1240 * 4: spdifout_b;
1241 */
1242 samesource_sel = <3>;
1243
1244 /* In for ACODEC_ADC */
1245 acodec_adc = <1>;
1246
1247 status = "okay";
1248 };
1249
1250 tdmb:tdm@1 {
1251 compatible = "amlogic, tl1-snd-tdmb";
1252 #sound-dai-cells = <0>;
1253
1254 dai-tdm-lane-slot-mask-in = <1 0 0 0>;
1255 dai-tdm-lane-slot-mask-out = <1 0 0 0>;
1256 dai-tdm-clk-sel = <1>;
1257
1258 clocks = <&clkaudio CLKID_AUDIO_MCLK_B
1259 &clkc CLKID_MPLL1>;
1260 clock-names = "mclk", "clk_srcpll";
1261
1262 status = "okay";
1263 };
1264
1265 tdmc:tdm@2 {
1266 compatible = "amlogic, tl1-snd-tdmc";
1267 #sound-dai-cells = <0>;
1268
1269 dai-tdm-lane-slot-mask-in = <1 0 0 0>;
1270 dai-tdm-lane-slot-mask-out = <1 0 0 0>;
1271 dai-tdm-clk-sel = <2>;
1272
1273 clocks = <&clkaudio CLKID_AUDIO_MCLK_C
1274 &clkc CLKID_MPLL2>;
1275 clock-names = "mclk", "clk_srcpll";
1276
1277 pinctrl-names = "tdm_pins";
1278 pinctrl-0 = <&tdmout_c &tdmin_c>;
1279
1280 status = "okay";
1281 };
1282
1283 spdifa:spdif@0 {
1284 compatible = "amlogic, tl1-snd-spdif-a";
1285 #sound-dai-cells = <0>;
1286
1287 clocks = <&clkc CLKID_MPLL0
1288 &clkc CLKID_FCLK_DIV4
1289 &clkaudio CLKID_AUDIO_GATE_SPDIFIN
1290 &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
1291 &clkaudio CLKID_AUDIO_SPDIFIN
1292 &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
1293 clock-names = "sysclk", "fixed_clk", "gate_spdifin",
1294 "gate_spdifout", "clk_spdifin", "clk_spdifout";
1295
1296 interrupts =
1297 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
1298 interrupt-names = "irq_spdifin";
1299
1300 pinctrl-names = "spdif_pins";
1301 pinctrl-0 = <&spdifout_a &spdifin_a>;
1302
1303 /*
1304 * whether do asrc for pcm and resample a or b
1305 * if raw data, asrc is disabled automatically
1306 * 0: "Disable",
1307 * 1: "Enable:32K",
1308 * 2: "Enable:44K",
1309 * 3: "Enable:48K",
1310 * 4: "Enable:88K",
1311 * 5: "Enable:96K",
1312 * 6: "Enable:176K",
1313 * 7: "Enable:192K",
1314 */
1315 asrc_id = <0>;
1316 auto_asrc = <0>;
1317
1318 status = "okay";
1319 };
1320
1321 spdifb:spdif@1 {
1322 compatible = "amlogic, tl1-snd-spdif-b";
1323 #sound-dai-cells = <0>;
1324
1325 clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
1326 &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
1327 &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
1328 clock-names = "sysclk",
1329 "gate_spdifout", "clk_spdifout";
1330
1331 status = "okay";
1332 };
1333
1334 pdm:pdm {
1335 compatible = "amlogic, tl1-snd-pdm";
1336 #sound-dai-cells = <0>;
1337
1338 clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
1339 &clkc CLKID_FCLK_DIV3
1340 &clkc CLKID_MPLL3
1341 &clkaudio CLKID_AUDIO_PDMIN0
1342 &clkaudio CLKID_AUDIO_PDMIN1>;
1343 clock-names = "gate",
1344 "sysclk_srcpll",
1345 "dclk_srcpll",
1346 "pdm_dclk",
1347 "pdm_sysclk";
1348
1349 pinctrl-names = "pdm_pins";
1350 pinctrl-0 = <&pdmin>;
1351
1352 /* mode 0~4, defalut:1 */
1353 filter_mode = <1>;
1354
1355 status = "okay";
1356 };
1357
1358 extn:extn {
1359 compatible = "amlogic, snd-extn";
1360 #sound-dai-cells = <0>;
1361
1362 interrupts =
1363 <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
1364 interrupt-names = "irq_frhdmirx";
1365
1366 status = "okay";
1367 };
1368
1369 aed:effect {
1370 compatible = "amlogic, snd-effect-v2";
1371 #sound-dai-cells = <0>;
1372
1373 clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
1374 &clkc CLKID_FCLK_DIV5
1375 &clkaudio CLKID_AUDIO_EQDRC>;
1376 clock-names = "gate", "srcpll", "eqdrc";
1377
1378 eq_enable = <1>;
1379 multiband_drc_enable = <0>;
1380 fullband_drc_enable = <0>;
1381 /*
1382 * 0:tdmout_a
1383 * 1:tdmout_b
1384 * 2:tdmout_c
1385 * 3:spdifout
1386 * 4:spdifout_b
1387 */
1388 eqdrc_module = <0>;
1389 /* max 0xf, each bit for one lane, usually one lane */
1390 lane_mask = <0x1>;
1391 /* max 0xff, each bit for one channel */
1392 channel_mask = <0x3>;
1393
1394 status = "okay";
1395 };
1396
1397 asrca: resample@0 {
1398 compatible = "amlogic, tl1-resample-a";
1399 clocks = <&clkc CLKID_MPLL0
1400 &clkaudio CLKID_AUDIO_MCLK_A
1401 &clkaudio CLKID_AUDIO_RESAMPLE_A>;
1402 clock-names = "resample_pll", "resample_src", "resample_clk";
1403 /*same with toddr_src
1404 * TDMIN_A, 0
1405 * TDMIN_B, 1
1406 * TDMIN_C, 2
1407 * SPDIFIN, 3
1408 * PDMIN, 4
1409 * NONE,
1410 * TDMIN_LB, 6
1411 * LOOPBACK, 7
1412 */
1413 resample_module = <3>;
1414
1415 status = "okay";
1416 };
1417
1418 asrcb: resample@1 {
1419 compatible = "amlogic, tl1-resample-b";
1420
1421 clocks = <&clkc CLKID_MPLL3
1422 &clkaudio CLKID_AUDIO_MCLK_F
1423 &clkaudio CLKID_AUDIO_RESAMPLE_B>;
1424 clock-names = "resample_pll", "resample_src", "resample_clk";
1425
1426 /*same with toddr_src
1427 * TDMIN_A, 0
1428 * TDMIN_B, 1
1429 * TDMIN_C, 2
1430 * SPDIFIN, 3
1431 * PDMIN, 4
1432 * NONE,
1433 * TDMIN_LB, 6
1434 * LOOPBACK, 7
1435 */
1436 resample_module = <3>;
1437
1438 status = "disabled";
1439 };
1440
1441 vad:vad {
1442 compatible = "amlogic, snd-vad";
1443 #sound-dai-cells = <0>;
1444
1445 clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
1446 &clkc CLKID_FCLK_DIV5
1447 &clkaudio CLKID_AUDIO_VAD>;
1448 clock-names = "gate", "pll", "clk";
1449
1450 interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING
1451 GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
1452 interrupt-names = "irq_wakeup", "irq_frame_sync";
1453
1454 /*
1455 * Data src sel:
1456 * 0: tdmin_a;
1457 * 1: tdmin_b;
1458 * 2: tdmin_c;
1459 * 3: spdifin;
1460 * 4: pdmin;
1461 * 5: loopback_b;
1462 * 6: tdmin_lb;
1463 * 7: loopback_a;
1464 */
1465 src = <4>;
1466
1467 /*
1468 * deal with hot word in user space or kernel space
1469 * 0: in user space
1470 * 1: in kernel space
1471 */
1472 level = <0>;
1473
1474 status = "disabled";
1475 };
1476}; /* end of audiobus */
1477
1478&pinctrl_periphs {
1479 /* audio pin mux */
1480
1481 tdma_mclk: tdma_mclk {
1482 mux { /* GPIOZ_0 */
1483 groups = "mclk0_z";
1484 function = "mclk0";
1485 };
1486 };
1487
1488 tdmout_a: tdmout_a {
1489 mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3, GPIOZ_5, GPIOZ_6 */
1490 groups = "tdma_sclk_z",
1491 "tdma_fs_z",
1492 "tdma_dout0_z",
1493 "tdma_dout2_z",
1494 "tdma_dout3_z";
1495 function = "tdma_out";
1496 };
1497 };
1498
1499 tdmin_a: tdmin_a {
1500 mux { /* GPIOZ_9 */
1501 groups = "tdma_din2_z";
1502 function = "tdma_in";
1503 };
1504 };
1505#if 0 //verify tdm/i2s in
1506 tdmin_a: tdmin_a {
1507 mux { /* GPIOZ_7 */
1508 groups = "tdma_din0_z";
1509 function = "tdma_in";
1510 };
1511 };
1512#endif
1513 tdmout_c: tdmout_c {
1514 mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
1515 groups = "tdmc_sclk",
1516 "tdmc_fs",
1517 "tdmc_dout0";
1518 function = "tdmc_out";
1519 };
1520 };
1521
1522 tdmin_c: tdmin_c {
1523 mux { /* GPIODV_10 */
1524 groups = "tdmc_din1";
1525 function = "tdmc_in";
1526 };
1527 };
1528
1529 spdifin_a: spdifin_a {
1530 mux { /* GPIODV_5 */
1531 groups = "spdif_in";
1532 function = "spdif_in";
1533 };
1534 };
1535
1536 spdifout_a: spdifout_a {
1537 mux { /* GPIODV_4 */
1538 groups = "spdif_out_dv4";
1539 function = "spdif_out";
1540 };
1541 };
1542
1543 pdmin: pdmin {
1544 mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */
1545 groups = "pdm_dclk_z",
1546 "pdm_din0_z",
1547 "pdm_din2_z4";
1548 function = "pdm";
1549 };
1550 };
1551
1552
1553}; /* end of pinctrl_periphs */
1554
1555&pinctrl_aobus {
1556 spdifout: spdifout {
1557 mux { /* gpiao_10 */
1558 groups = "spdif_out_ao";
1559 function = "spdif_out_ao";
1560 };
1561 };
1562}; /* end of pinctrl_aobus */
1563
1564&audio_data{
1565 status = "okay";
1566};
1567
1568&i2c2 {
1569 status = "okay";
1570 pinctrl-names="default";
1571 pinctrl-0=<&i2c2_z_pins>;
1572 clock-frequency = <400000>;
1573
1574 tas5805: tas5805@36 {
1575 compatible = "ti,tas5805";
1576 #sound-dai-cells = <0>;
1577 codec_name = "tas5805";
1578 reg = <0x2d>;
1579 status = "disable";
1580 };
1581
1582 ad82584f: ad82584f@62 {
1583 compatible = "ESMT, ad82584f";
1584 #sound-dai-cells = <0>;
1585 reg = <0x31>;
1586 status = "okay";
1587 reset_pin = <&gpio_ao GPIOAO_6 0>;
1588 };
1589
1590};
1591
1592&sd_emmc_c {
1593 status = "okay";
1594 emmc {
1595 caps = "MMC_CAP_8_BIT_DATA",
1596 "MMC_CAP_MMC_HIGHSPEED",
1597 "MMC_CAP_SD_HIGHSPEED",
1598 "MMC_CAP_NONREMOVABLE",
1599 "MMC_CAP_1_8V_DDR",
1600 "MMC_CAP_HW_RESET",
1601 "MMC_CAP_ERASE",
1602 "MMC_CAP_CMD23";
1603 caps2 = "MMC_CAP2_HS200";
1604 /* "MMC_CAP2_HS400";*/
1605 f_min = <400000>;
1606 f_max = <200000000>;
1607 };
1608};
1609
1610&spifc {
1611 status = "disabled";
1612 spi-nor@0 {
1613 cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
1614 };
1615};
1616
1617&slc_nand {
1618 status = "disabled";
1619 plat-names = "bootloader", "nandnormal";
1620 plat-num = <2>;
1621 plat-part-0 = <&bootloader>;
1622 plat-part-1 = <&nandnormal>;
1623 bootloader: bootloader{
1624 enable_pad = "ce0";
1625 busy_pad = "rb0";
1626 timming_mode = "mode5";
1627 bch_mode = "bch8_1k";
1628 t_rea = <20>;
1629 t_rhoh = <15>;
1630 chip_num = <1>;
1631 part_num = <0>;
1632 rb_detect = <1>;
1633 };
1634 nandnormal: nandnormal{
1635 enable_pad = "ce0";
1636 busy_pad = "rb0";
1637 timming_mode = "mode5";
1638 bch_mode = "bch8_1k";
1639 plane_mode = "twoplane";
1640 t_rea = <20>;
1641 t_rhoh = <15>;
1642 chip_num = <2>;
1643 part_num = <3>;
1644 partition = <&nand_partitions>;
1645 rb_detect = <1>;
1646 };
1647 nand_partitions:nand_partition{
1648 /*
1649 * if bl_mode is 1, tpl size was generate by
1650 * fip_copies * fip_size which
1651 * will not skip bad when calculating
1652 * the partition size;
1653 *
1654 * if bl_mode is 0,
1655 * tpl partition must be comment out.
1656 */
1657 tpl{
1658 offset=<0x0 0x0>;
1659 size=<0x0 0x0>;
1660 };
1661 logo{
1662 offset=<0x0 0x0>;
1663 size=<0x0 0x200000>;
1664 };
1665 recovery{
1666 offset=<0x0 0x0>;
1667 size=<0x0 0x1000000>;
1668 };
1669 boot{
1670 offset=<0x0 0x0>;
1671 size=<0x0 0x1000000>;
1672 };
1673 system{
1674 offset=<0x0 0x0>;
1675 size=<0x0 0x4000000>;
1676 };
1677 data{
1678 offset=<0xffffffff 0xffffffff>;
1679 size=<0x0 0x0>;
1680 };
1681 };
1682};
1683
1684&ethmac {
1685 status = "okay";
1686 pinctrl-names = "internal_eth_pins";
1687 pinctrl-0 = <&internal_eth_pins>;
1688 mc_val = <0x4be04>;
1689
1690 internal_phy=<1>;
1691};
1692
1693&uart_A {
1694 status = "okay";
1695};
1696
1697&dwc3 {
1698 status = "okay";
1699};
1700
1701&usb2_phy_v2 {
1702 status = "okay";
1703 portnum = <3>;
1704};
1705
1706&usb3_phy_v2 {
1707 status = "okay";
1708 portnum = <0>;
1709 otg = <0>;
1710};
1711
1712&dwc2_a {
1713 status = "okay";
1714 /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
1715 controller-type = <1>;
1716};
1717
1718&spicc0 {
1719 status = "okay";
1720 pinctrl-names = "default";
1721 pinctrl-0 = <&spicc0_pins_h>;
1722 cs-gpios = <&gpio GPIOH_20 0>;
1723};
1724
1725&meson_fb {
1726 status = "okay";
1727 display_size_default = <1920 1080 1920 2160 32>;
1728 mem_size = <0x00800000 0x1980000 0x100000 0x800000>;
1729 logo_addr = "0x7f800000";
1730 mem_alloc = <0>;
1731 pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
1732};
1733
1734&pwm_AO_cd {
1735 status = "okay";
1736};
1737
1738&saradc {
1739 status = "okay";
1740};
1741
1742&i2c1 {
1743 status = "okay";
1744 clock-frequency = <300000>;
1745 pinctrl-names="default";
1746 pinctrl-0=<&i2c1_h_pins>;
1747
1748 lcd_extern_i2c0: lcd_extern_i2c@0 {
1749 compatible = "lcd_ext, i2c";
1750 dev_name = "i2c_T5800Q";
1751 reg = <0x1c>;
1752 status = "okay";
1753 };
1754
1755 lcd_extern_i2c1: lcd_extern_i2c@1 {
1756 compatible = "lcd_ext, i2c";
1757 dev_name = "i2c_ANX6862";
1758 reg = <0x20>;
1759 status = "okay";
1760 };
1761
1762 lcd_extern_i2c2: lcd_extern_i2c@2 {
1763 compatible = "lcd_ext, i2c";
1764 dev_name = "i2c_ANX7911";
1765 reg = <0x74>;
1766 status = "okay";
1767 };
1768};
1769
1770&efuse {
1771 status = "okay";
1772};
1773
generated by cgit at 2024-05-17 11:58:16 (GMT)