blob: 73621c6c44056b2eb46edcb8d9997872194577ab
1 | /* |
2 | * arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts |
3 | * |
4 | * Copyright (C) 2018 Amlogic, Inc. All rights reserved. |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or |
9 | * (at your option) any later version. |
10 | * |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
14 | * more details. |
15 | * |
16 | */ |
17 | |
18 | /dts-v1/; |
19 | |
20 | #include "mesontl1.dtsi" |
21 | #include "partition_mbox_normal_P_32.dtsi" |
22 | #include "mesontl1_t309-panel.dtsi" |
23 | |
24 | / { |
25 | model = "Amlogic TL1 T962X2 T309"; |
26 | amlogic-dt-id = "tl1_t962x2_t309"; |
27 | compatible = "amlogic, tl1_t962x2_t309"; |
28 | |
29 | aliases { |
30 | serial0 = &uart_AO; |
31 | serial1 = &uart_A; |
32 | serial2 = &uart_B; |
33 | serial3 = &uart_C; |
34 | serial4 = &uart_AO_B; |
35 | tsensor0 = &p_tsensor; |
36 | tsensor1 = &d_tsensor; |
37 | tsensor2 = &s_tsensor; |
38 | i2c0 = &i2c0; |
39 | i2c1 = &i2c1; |
40 | i2c2 = &i2c2; |
41 | i2c3 = &i2c3; |
42 | i2c4 = &i2c_AO; |
43 | }; |
44 | |
45 | memory@00000000 { |
46 | device_type = "memory"; |
47 | linux,usable-memory = <0x0 0x80000000>; |
48 | }; |
49 | |
50 | reserved-memory { |
51 | #address-cells = <1>; |
52 | #size-cells = <1>; |
53 | ranges; |
54 | /* global autoconfigured region for contiguous allocations */ |
55 | ramoops@0x07400000 { |
56 | compatible = "ramoops"; |
57 | reg = <0x07400000 0x00100000>; |
58 | record-size = <0x8000>; |
59 | console-size = <0x8000>; |
60 | ftrace-size = <0x0>; |
61 | pmsg-size = <0x8000>; |
62 | }; |
63 | |
64 | secmon_reserved: linux,secmon { |
65 | compatible = "shared-dma-pool"; |
66 | reusable; |
67 | size = <0x400000>; |
68 | alignment = <0x400000>; |
69 | alloc-ranges = <0x05000000 0x400000>; |
70 | }; |
71 | |
72 | logo_reserved:linux,meson-fb { |
73 | compatible = "shared-dma-pool"; |
74 | reusable; |
75 | size = <0x800000>; |
76 | alignment = <0x400000>; |
77 | alloc-ranges = <0x7f800000 0x800000>; |
78 | }; |
79 | |
80 | lcd_tcon_reserved:linux,lcd_tcon { |
81 | compatible = "shared-dma-pool"; |
82 | reusable; |
83 | size = <0xc00000>; |
84 | alignment = <0x400000>; |
85 | alloc-ranges = <0x7ec00000 0xc00000>; |
86 | }; |
87 | |
88 | codec_mm_cma:linux,codec_mm_cma { |
89 | compatible = "shared-dma-pool"; |
90 | reusable; |
91 | /* ion_codec_mm max can alloc size 80M*/ |
92 | size = <0x13400000>; |
93 | alignment = <0x400000>; |
94 | linux,contiguous-region; |
95 | alloc-ranges = <0x30000000 0x50000000>; |
96 | }; |
97 | |
98 | /* codec shared reserved */ |
99 | codec_mm_reserved:linux,codec_mm_reserved { |
100 | compatible = "amlogic, codec-mm-reserved"; |
101 | size = <0x0>; |
102 | alignment = <0x100000>; |
103 | //no-map; |
104 | }; |
105 | |
106 | ion_cma_reserved:linux,ion-dev { |
107 | compatible = "shared-dma-pool"; |
108 | reusable; |
109 | size = <0x8000000>; |
110 | alignment = <0x400000>; |
111 | }; |
112 | |
113 | /* vdin0 CMA pool */ |
114 | //vdin0_cma_reserved:linux,vdin0_cma { |
115 | // compatible = "shared-dma-pool"; |
116 | // reusable; |
117 | /* 3840x2160x4x4 ~=128 M */ |
118 | // size = <0xc400000>; |
119 | // alignment = <0x400000>; |
120 | //}; |
121 | |
122 | /* vdin1 CMA pool */ |
123 | vdin1_cma_reserved:linux,vdin1_cma { |
124 | compatible = "shared-dma-pool"; |
125 | reusable; |
126 | /* 1920x1080x2x4 =16 M */ |
127 | size = <0x1400000>; |
128 | alignment = <0x400000>; |
129 | }; |
130 | |
131 | /*demod_reserved:linux,demod { |
132 | * compatible = "amlogic, demod-mem"; |
133 | * size = <0x800000>; //8M //100m 0x6400000 |
134 | * alloc-ranges = <0x0 0x30000000>; |
135 | * //multi-use; |
136 | * //no-map; |
137 | *}; |
138 | */ |
139 | |
140 | demod_cma_reserved:linux,demod_cma { |
141 | compatible = "shared-dma-pool"; |
142 | reusable; |
143 | /* 8M */ |
144 | size = <0x0800000>; |
145 | alignment = <0x400000>; |
146 | }; |
147 | |
148 | /*di CMA pool */ |
149 | di_cma_reserved:linux,di_cma { |
150 | compatible = "shared-dma-pool"; |
151 | reusable; |
152 | /* buffer_size = 3621952(yuv422 8bit) |
153 | * | 4736064(yuv422 10bit) |
154 | * | 4074560(yuv422 10bit full pack mode) |
155 | * 10x3621952=34.6M(0x23) support 8bit |
156 | * 10x4736064=45.2M(0x2e) support 12bit |
157 | * 10x4074560=40M(0x28) support 10bit |
158 | */ |
159 | size = <0x02800000>; |
160 | alignment = <0x400000>; |
161 | }; |
162 | |
163 | /* for hdmi rx emp use */ |
164 | hdmirx_emp_cma_reserved:linux,emp_cma { |
165 | compatible = "shared-dma-pool"; |
166 | /*linux,phandle = <5>;*/ |
167 | reusable; |
168 | /* 4M for emp to ddr */ |
169 | /* 32M for tmds to ddr */ |
170 | size = <0x400000>; |
171 | alignment = <0x400000>; |
172 | /* alloc-ranges = <0x400000 0x2000000>; */ |
173 | }; |
174 | |
175 | /* POST PROCESS MANAGER */ |
176 | ppmgr_reserved:linux,ppmgr { |
177 | compatible = "amlogic, ppmgr_memory"; |
178 | size = <0x0>; |
179 | }; |
180 | |
181 | picdec_cma_reserved:linux,picdec { |
182 | compatible = "shared-dma-pool"; |
183 | reusable; |
184 | size = <0x0>; |
185 | alignment = <0x0>; |
186 | linux,contiguous-region; |
187 | }; |
188 | }; /* end of reserved-memory */ |
189 | |
190 | codec_mm { |
191 | compatible = "amlogic, codec, mm"; |
192 | status = "okay"; |
193 | memory-region = <&codec_mm_cma &codec_mm_reserved>; |
194 | }; |
195 | |
196 | picdec { |
197 | compatible = "amlogic, picdec"; |
198 | memory-region = <&picdec_cma_reserved>; |
199 | dev_name = "picdec"; |
200 | status = "okay"; |
201 | }; |
202 | |
203 | ppmgr { |
204 | compatible = "amlogic, ppmgr"; |
205 | memory-region = <&ppmgr_reserved>; |
206 | status = "okay"; |
207 | }; |
208 | |
209 | deinterlace { |
210 | compatible = "amlogic, deinterlace"; |
211 | status = "okay"; |
212 | /* 0:use reserved; 1:use cma; 2:use cma as reserved */ |
213 | flag_cma = <1>; |
214 | //memory-region = <&di_reserved>; |
215 | memory-region = <&di_cma_reserved>; |
216 | interrupts = <0 46 1 |
217 | 0 40 1>; |
218 | interrupt-names = "pre_irq", "post_irq"; |
219 | clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>, |
220 | <&clkc CLKID_VPU_CLKB_COMP>; |
221 | clock-names = "vpu_clkb_tmp_composite", |
222 | "vpu_clkb_composite"; |
223 | clock-range = <334 667>; |
224 | /* buffer-size = <3621952>;(yuv422 8bit) */ |
225 | buffer-size = <4074560>;/*yuv422 fullpack*/ |
226 | /* reserve-iomap = "true"; */ |
227 | /* if enable nr10bit, set nr10bit-support to 1 */ |
228 | post-wr-support = <1>; |
229 | nr10bit-support = <1>; |
230 | nrds-enable = <1>; |
231 | pps-enable = <1>; |
232 | }; |
233 | |
234 | vout { |
235 | compatible = "amlogic, vout"; |
236 | status = "okay"; |
237 | fr_auto_policy = <0>; |
238 | }; |
239 | |
240 | /* Audio Related start */ |
241 | pdm_codec:dummy { |
242 | #sound-dai-cells = <0>; |
243 | compatible = "amlogic, pdm_dummy_codec"; |
244 | status = "okay"; |
245 | }; |
246 | |
247 | dummy_codec:dummy { |
248 | #sound-dai-cells = <0>; |
249 | compatible = "amlogic, aml_dummy_codec"; |
250 | status = "okay"; |
251 | }; |
252 | |
253 | tl1_codec:codec { |
254 | #sound-dai-cells = <0>; |
255 | compatible = "amlogic, tl1_acodec"; |
256 | status = "okay"; |
257 | reg = <0xff632000 0x1c>; |
258 | tdmout_index = <0>; |
259 | tdmin_index = <0>; |
260 | dat1_ch_sel = <1>; |
261 | }; |
262 | |
263 | aml_dtv_demod { |
264 | compatible = "amlogic, ddemod-tl1"; |
265 | dev_name = "aml_dtv_demod"; |
266 | status = "okay"; |
267 | |
268 | pinctrl-names="dtvdemod_agc_pins"; |
269 | pinctrl-0=<&dtvdemod_agc_pins>; |
270 | |
271 | clocks = <&clkc CLKID_DAC_CLK>; |
272 | clock-names = "vdac_clk_gate"; |
273 | |
274 | reg = <0xff650000 0x4000 /*dtv demod base*/ |
275 | 0xff63c000 0x2000 /*hiu reg base*/ |
276 | 0xff800000 0x1000 /*io_aobus_base*/ |
277 | 0xffd01000 0x1000 /*reset*/ |
278 | >; |
279 | |
280 | dtv_demod0_mem = <0>; // need move to aml_dtv_demod ? |
281 | spectrum = <1>; |
282 | cma_flag = <1>; |
283 | cma_mem_size = <8>; |
284 | memory-region = <&demod_cma_reserved>;//<&demod_reserved>; |
285 | }; |
286 | |
287 | auge_sound { |
288 | compatible = "amlogic, tl1-sound-card"; |
289 | aml-audio-card,name = "AML-AUGESOUND"; |
290 | |
291 | avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>; |
292 | |
293 | aml-audio-card,dai-link@0 { |
294 | format = "i2s"; |
295 | mclk-fs = <256>; |
296 | continuous-clock; |
297 | //bitclock-inversion; |
298 | //frame-inversion; |
299 | /* master mode */ |
300 | bitclock-master = <&tdma>; |
301 | frame-master = <&tdma>; |
302 | /* slave mode */ |
303 | /* |
304 | * bitclock-master = <&tdmacodec>; |
305 | * frame-master = <&tdmacodec>; |
306 | */ |
307 | /* suffix-name, sync with android audio hal used for */ |
308 | suffix-name = "alsaPORT-i2s"; |
309 | tdmacpu: cpu { |
310 | sound-dai = <&tdma>; |
311 | dai-tdm-slot-tx-mask = |
312 | <1 1>; |
313 | dai-tdm-slot-rx-mask = |
314 | <1 1>; |
315 | dai-tdm-slot-num = <2>; |
316 | dai-tdm-slot-width = <32>; |
317 | system-clock-frequency = <12288000>; |
318 | }; |
319 | tdmacodec: codec { |
320 | //sound-dai = <&dummy_codec>; |
321 | sound-dai = <&ad82584f &tl1_codec>; |
322 | }; |
323 | }; |
324 | |
325 | aml-audio-card,dai-link@1 { |
326 | status = "disabled"; |
327 | |
328 | format = "i2s"; |
329 | mclk-fs = <256>; |
330 | //continuous-clock; |
331 | //bitclock-inversion; |
332 | //frame-inversion; |
333 | /* master mode */ |
334 | bitclock-master = <&tdmb>; |
335 | frame-master = <&tdmb>; |
336 | /* slave mode */ |
337 | //bitclock-master = <&tdmbcodec>; |
338 | //frame-master = <&tdmbcodec>; |
339 | /* suffix-name, sync with android audio hal used for */ |
340 | suffix-name = "alsaPORT-pcm"; |
341 | cpu { |
342 | sound-dai = <&tdmb>; |
343 | dai-tdm-slot-tx-mask = <1 1>; |
344 | dai-tdm-slot-rx-mask = <1 1>; |
345 | dai-tdm-slot-num = <2>; |
346 | /* |
347 | * dai-tdm-slot-tx-mask = |
348 | * <1 1 1 1 1 1 1 1>; |
349 | * dai-tdm-slot-rx-mask = |
350 | * <1 1 1 1 1 1 1 1>; |
351 | * dai-tdm-slot-num = <8>; |
352 | */ |
353 | dai-tdm-slot-width = <32>; |
354 | system-clock-frequency = <12288000>; |
355 | }; |
356 | tdmbcodec: codec { |
357 | sound-dai = <&dummy_codec>; |
358 | }; |
359 | }; |
360 | |
361 | aml-audio-card,dai-link@2 { |
362 | status = "disabled"; |
363 | |
364 | format = "i2s"; |
365 | mclk-fs = <256>; |
366 | //continuous-clock; |
367 | //bitclock-inversion; |
368 | //frame-inversion; |
369 | /* master mode */ |
370 | bitclock-master = <&tdmc>; |
371 | frame-master = <&tdmc>; |
372 | /* slave mode */ |
373 | //bitclock-master = <&tdmccodec>; |
374 | //frame-master = <&tdmccodec>; |
375 | /* suffix-name, sync with android audio hal used for */ |
376 | //suffix-name = "alsaPORT-tdm"; |
377 | cpu { |
378 | sound-dai = <&tdmc>; |
379 | dai-tdm-slot-tx-mask = <1 1>; |
380 | dai-tdm-slot-rx-mask = <1 1>; |
381 | dai-tdm-slot-num = <2>; |
382 | dai-tdm-slot-width = <32>; |
383 | system-clock-frequency = <12288000>; |
384 | }; |
385 | tdmccodec: codec { |
386 | sound-dai = <&dummy_codec>; |
387 | }; |
388 | }; |
389 | |
390 | aml-audio-card,dai-link@3 { |
391 | mclk-fs = <64>; |
392 | /* suffix-name, sync with android audio hal used for */ |
393 | suffix-name = "alsaPORT-pdm"; |
394 | cpu { |
395 | sound-dai = <&pdm>; |
396 | }; |
397 | codec { |
398 | sound-dai = <&pdm_codec>; |
399 | }; |
400 | }; |
401 | |
402 | aml-audio-card,dai-link@4 { |
403 | mclk-fs = <128>; |
404 | /* suffix-name, sync with android audio hal used for */ |
405 | suffix-name = "alsaPORT-spdif"; |
406 | cpu { |
407 | sound-dai = <&spdifa>; |
408 | system-clock-frequency = <6144000>; |
409 | }; |
410 | codec { |
411 | sound-dai = <&dummy_codec>; |
412 | }; |
413 | }; |
414 | |
415 | aml-audio-card,dai-link@5 { |
416 | mclk-fs = <128>; |
417 | cpu { |
418 | sound-dai = <&spdifb>; |
419 | system-clock-frequency = <6144000>; |
420 | }; |
421 | codec { |
422 | sound-dai = <&dummy_codec>; |
423 | }; |
424 | }; |
425 | |
426 | aml-audio-card,dai-link@6 { |
427 | mclk-fs = <256>; |
428 | suffix-name = "alsaPORT-tv"; |
429 | cpu { |
430 | sound-dai = <&extn>; |
431 | system-clock-frequency = <12288000>; |
432 | }; |
433 | codec { |
434 | sound-dai = <&dummy_codec>; |
435 | }; |
436 | }; |
437 | |
438 | }; |
439 | /* Audio Related end */ |
440 | |
441 | dvb { |
442 | compatible = "amlogic, dvb"; |
443 | status = "okay"; |
444 | fe0_mode = "internal"; |
445 | fe0_tuner = <&tuner>; |
446 | |
447 | /*"parallel","serial","disable"*/ |
448 | ts2 = "parallel"; |
449 | ts2_control = <0>; |
450 | ts2_invert = <0>; |
451 | interrupts = <0 23 1 |
452 | 0 5 1 |
453 | 0 53 1 |
454 | 0 19 1 |
455 | 0 25 1 |
456 | 0 17 1>; |
457 | interrupt-names = "demux0_irq", |
458 | "demux1_irq", |
459 | "demux2_irq", |
460 | "dvr0_irq", |
461 | "dvr1_irq", |
462 | "dvr2_irq"; |
463 | clocks = <&clkc CLKID_DEMUX |
464 | &clkc CLKID_ASYNC_FIFO |
465 | &clkc CLKID_AHB_ARB0 |
466 | /* &clkc CLKID_DOS_PARSER>;*/ |
467 | &clkc CLKID_U_PARSER>; |
468 | clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop"; |
469 | }; |
470 | |
471 | tvafe_avin_detect { |
472 | compatible = "amlogic, tl1_tvafe_avin_detect"; |
473 | status = "okay"; |
474 | device_mask = <1>;/*bit0:ch1;bit1:ch2*/ |
475 | interrupts = <0 12 1>, |
476 | <0 13 1>; |
477 | }; |
478 | |
479 | amlvecm { |
480 | compatible = "amlogic, vecm"; |
481 | dev_name = "aml_vecm"; |
482 | status = "okay"; |
483 | gamma_en = <1>;/*1:enabel ;0:disable*/ |
484 | wb_en = <1>;/*1:enabel ;0:disable*/ |
485 | cm_en = <1>;/*1:enabel ;0:disable*/ |
486 | wb_sel = <1>;/*1:mtx ;0:gainoff*/ |
487 | vlock_en = <1>;/*1:enable;0:disable*/ |
488 | vlock_mode = <0x4>; |
489 | /* vlock work mode: |
490 | *bit0:auto ENC |
491 | *bit1:auto PLL |
492 | *bit2:manual PLL |
493 | *bit3:manual ENC |
494 | *bit4:manual soft ENC |
495 | *bit5:manual MIX PLL ENC |
496 | */ |
497 | vlock_pll_m_limit = <1>; |
498 | vlock_line_limit = <3>; |
499 | }; |
500 | |
501 | vdin@0 { |
502 | compatible = "amlogic, vdin"; |
503 | /*memory-region = <&vdin0_cma_reserved>;*/ |
504 | status = "okay"; |
505 | /*bit0:(1:share with codec_mm;0:cma alone) |
506 | *bit8:(1:alloc in discontinus way;0:alone in continuous way) |
507 | */ |
508 | flag_cma = <0x101>; |
509 | /*MByte, if 10bit disable: 64M(YUV422), |
510 | *if 10bit enable: 64*1.5 = 96M(YUV422) |
511 | *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M |
512 | *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M |
513 | *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M |
514 | *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M |
515 | */ |
516 | cma_size = <190>; |
517 | interrupts = <0 83 1>; |
518 | rdma-irq = <2>; |
519 | clocks = <&clkc CLKID_FCLK_DIV5>, |
520 | <&clkc CLKID_VDIN_MEAS_COMP>; |
521 | clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
522 | vdin_id = <0>; |
523 | /*vdin write mem color depth support: |
524 | * bit0:support 8bit |
525 | * bit1:support 9bit |
526 | * bit2:support 10bit |
527 | * bit3:support 12bit |
528 | * bit4:support yuv422 10bit full pack mode (from txl new add) |
529 | * bit8:use 8bit at 4k_50/60hz_10bit |
530 | * bit9:use 10bit at 4k_50/60hz_10bit |
531 | */ |
532 | tv_bit_mode = <0x215>; |
533 | /* afbce_bit_mode: (amlogic frame buff compression encoder) |
534 | * bit 0~3: |
535 | * 0 -- normal mode, not use afbce |
536 | * 1 -- use afbce non-mmu mode |
537 | * 2 -- use afbce mmu mode |
538 | * bit 4: |
539 | * 0 -- afbce compression-lossy disable |
540 | * 1 -- afbce compression-lossy enable |
541 | */ |
542 | afbce_bit_mode = <0>; |
543 | }; |
544 | |
545 | vdin@1 { |
546 | compatible = "amlogic, vdin"; |
547 | memory-region = <&vdin1_cma_reserved>; |
548 | status = "okay"; |
549 | /*bit0:(1:share with codec_mm;0:cma alone) |
550 | *bit8:(1:alloc in discontinus way;0:alone in continuous way) |
551 | */ |
552 | flag_cma = <0>; |
553 | interrupts = <0 85 1>; |
554 | rdma-irq = <4>; |
555 | clocks = <&clkc CLKID_FCLK_DIV5>, |
556 | <&clkc CLKID_VDIN_MEAS_COMP>; |
557 | clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
558 | vdin_id = <1>; |
559 | /*vdin write mem color depth support: |
560 | *bit0:support 8bit |
561 | *bit1:support 9bit |
562 | *bit2:support 10bit |
563 | *bit3:support 12bit |
564 | */ |
565 | tv_bit_mode = <0x15>; |
566 | }; |
567 | |
568 | tvafe { |
569 | compatible = "amlogic, tvafe-tl1"; |
570 | /*memory-region = <&tvafe_cma_reserved>;*/ |
571 | status = "okay"; |
572 | flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/ |
573 | cma_size = <5>;/*MByte*/ |
574 | reg = <0xff654000 0x2000>;/*tvafe reg base*/ |
575 | reserve-iomap = "true"; |
576 | tvafe_id = <0>; |
577 | //pinctrl-names = "default"; |
578 | /*!!particular sequence, no more and no less!!!*/ |
579 | tvafe_pin_mux = < |
580 | 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */ |
581 | 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */ |
582 | 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */ |
583 | 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */ |
584 | >; |
585 | clocks = <&clkc CLKID_DAC_CLK>; |
586 | clock-names = "vdac_clk_gate"; |
587 | }; |
588 | |
589 | vbi { |
590 | compatible = "amlogic, vbi"; |
591 | status = "okay"; |
592 | interrupts = <0 83 1>; |
593 | }; |
594 | |
595 | cvbsout { |
596 | compatible = "amlogic, cvbsout-tl1"; |
597 | status = "disabled"; |
598 | clocks = <&clkc CLKID_VCLK2_ENCI |
599 | &clkc CLKID_VCLK2_VENCI0 |
600 | &clkc CLKID_VCLK2_VENCI1 |
601 | &clkc CLKID_DAC_CLK>; |
602 | clock-names = "venci_top_gate", |
603 | "venci_0_gate", |
604 | "venci_1_gate", |
605 | "vdac_clk_gate"; |
606 | /* clk path */ |
607 | /* 0:vid_pll vid2_clk */ |
608 | /* 1:gp0_pll vid2_clk */ |
609 | /* 2:vid_pll vid1_clk */ |
610 | /* 3:gp0_pll vid1_clk */ |
611 | clk_path = <0>; |
612 | |
613 | /* performance: reg_address, reg_value */ |
614 | /* tl1 */ |
615 | performance = <0x1bf0 0x9 |
616 | 0x1b56 0x333 |
617 | 0x1b12 0x8080 |
618 | 0x1b05 0xfd |
619 | 0x1c59 0xf850 |
620 | 0xffff 0x0>; /* ending flag */ |
621 | performance_sarft = <0x1bf0 0x9 |
622 | 0x1b56 0x333 |
623 | 0x1b12 0x0 |
624 | 0x1b05 0x9 |
625 | 0x1c59 0xfc48 |
626 | 0xffff 0x0>; /* ending flag */ |
627 | performance_revB_telecom = <0x1bf0 0x9 |
628 | 0x1b56 0x546 |
629 | 0x1b12 0x8080 |
630 | 0x1b05 0x9 |
631 | 0x1c59 0xf850 |
632 | 0xffff 0x0>; /* ending flag */ |
633 | }; |
634 | |
635 | /* for external keypad */ |
636 | adc_keypad { |
637 | compatible = "amlogic, adc_keypad"; |
638 | status = "okay"; |
639 | key_name = "power","up","down","enter","left","right","home"; |
640 | key_num = <7>; |
641 | io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>; |
642 | io-channel-names = "key-chan-2", "key-chan-3"; |
643 | key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2 |
644 | SARADC_CH2 SARADC_CH3 SARADC_CH3>; |
645 | key_code = <116 103 108 28 105 106 102>; |
646 | key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023 |
647 | key_tolerance = <40 40 40 40 40 40 40>; |
648 | }; |
649 | |
650 | unifykey { |
651 | compatible = "amlogic, unifykey"; |
652 | status = "okay"; |
653 | |
654 | unifykey-num = <21>; |
655 | unifykey-index-0 = <&keysn_0>; |
656 | unifykey-index-1 = <&keysn_1>; |
657 | unifykey-index-2 = <&keysn_2>; |
658 | unifykey-index-3 = <&keysn_3>; |
659 | unifykey-index-4 = <&keysn_4>; |
660 | unifykey-index-5 = <&keysn_5>; |
661 | unifykey-index-6 = <&keysn_6>; |
662 | unifykey-index-7 = <&keysn_7>; |
663 | unifykey-index-8 = <&keysn_8>; |
664 | unifykey-index-9 = <&keysn_9>; |
665 | unifykey-index-10= <&keysn_10>; |
666 | unifykey-index-11 = <&keysn_11>; |
667 | unifykey-index-12 = <&keysn_12>; |
668 | unifykey-index-13 = <&keysn_13>; |
669 | unifykey-index-14 = <&keysn_14>; |
670 | unifykey-index-15 = <&keysn_15>; |
671 | unifykey-index-16 = <&keysn_16>; |
672 | unifykey-index-17 = <&keysn_17>; |
673 | unifykey-index-18 = <&keysn_18>; |
674 | unifykey-index-19 = <&keysn_19>; |
675 | unifykey-index-20 = <&keysn_20>; |
676 | |
677 | keysn_0: key_0{ |
678 | key-name = "usid"; |
679 | key-device = "normal"; |
680 | key-permit = "read","write","del"; |
681 | }; |
682 | keysn_1:key_1{ |
683 | key-name = "mac"; |
684 | key-device = "normal"; |
685 | key-permit = "read","write","del"; |
686 | }; |
687 | keysn_2:key_2{ |
688 | key-name = "hdcp"; |
689 | key-device = "secure"; |
690 | key-type = "sha1"; |
691 | key-permit = "read","write","del"; |
692 | }; |
693 | keysn_3:key_3{ |
694 | key-name = "secure_boot_set"; |
695 | key-device = "efuse"; |
696 | key-permit = "write"; |
697 | }; |
698 | keysn_4:key_4{ |
699 | key-name = "mac_bt"; |
700 | key-device = "normal"; |
701 | key-permit = "read","write","del"; |
702 | key-type = "mac"; |
703 | }; |
704 | keysn_5:key_5{ |
705 | key-name = "mac_wifi"; |
706 | key-device = "normal"; |
707 | key-permit = "read","write","del"; |
708 | key-type = "mac"; |
709 | }; |
710 | keysn_6:key_6{ |
711 | key-name = "hdcp2_tx"; |
712 | key-device = "normal"; |
713 | key-permit = "read","write","del"; |
714 | }; |
715 | keysn_7:key_7{ |
716 | key-name = "hdcp2_rx"; |
717 | key-device = "normal"; |
718 | key-permit = "read","write","del"; |
719 | }; |
720 | keysn_8:key_8{ |
721 | key-name = "widevinekeybox"; |
722 | key-device = "secure"; |
723 | key-type = "sha1"; |
724 | key-permit = "read","write","del"; |
725 | }; |
726 | keysn_9:key_9{ |
727 | key-name = "deviceid"; |
728 | key-device = "normal"; |
729 | key-permit = "read","write","del"; |
730 | }; |
731 | keysn_10:key_10{ |
732 | key-name = "hdcp22_fw_private"; |
733 | key-device = "secure"; |
734 | key-permit = "read","write","del"; |
735 | }; |
736 | keysn_11:key_11{ |
737 | key-name = "hdcp22_rx_private"; |
738 | key-device = "secure"; |
739 | key-permit = "read","write","del"; |
740 | }; |
741 | keysn_12:key_12{ |
742 | key-name = "hdcp22_rx_fw"; |
743 | key-device = "normal"; |
744 | key-permit = "read","write","del"; |
745 | }; |
746 | keysn_13:key_13{ |
747 | key-name = "hdcp14_rx"; |
748 | key-device = "normal"; |
749 | key-type = "sha1"; |
750 | key-permit = "read","write","del"; |
751 | }; |
752 | keysn_14:key_14{ |
753 | key-name = "prpubkeybox";// PlayReady |
754 | key-device = "secure"; |
755 | key-permit = "read","write","del"; |
756 | }; |
757 | keysn_15:key_15{ |
758 | key-name = "prprivkeybox";// PlayReady |
759 | key-device = "secure"; |
760 | key-permit = "read","write","del"; |
761 | }; |
762 | keysn_16:key_16{ |
763 | key-name = "lcd"; |
764 | key-device = "normal"; |
765 | key-permit = "read","write","del"; |
766 | }; |
767 | keysn_17:key_17{ |
768 | key-name = "lcd_extern"; |
769 | key-device = "normal"; |
770 | key-permit = "read","write","del"; |
771 | }; |
772 | keysn_18:key_18{ |
773 | key-name = "backlight"; |
774 | key-device = "normal"; |
775 | key-permit = "read","write","del"; |
776 | }; |
777 | keysn_19:key_19{ |
778 | key-name = "lcd_tcon"; |
779 | key-device = "normal"; |
780 | key-permit = "read","write","del"; |
781 | }; |
782 | keysn_20:key_20{ |
783 | key-name = "attestationkeybox";// attestation key |
784 | key-device = "secure"; |
785 | key-permit = "read","write","del"; |
786 | }; |
787 | }; /* End unifykey */ |
788 | |
789 | hdmirx { |
790 | compatible = "amlogic, hdmirx_tl1"; |
791 | #address-cells=<1>; |
792 | #size-cells=<1>; |
793 | memory-region = <&hdmirx_emp_cma_reserved>; |
794 | status = "okay"; |
795 | pinctrl-names = "default"; |
796 | pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux |
797 | &hdmirx_c_mux>; |
798 | repeat = <0>; |
799 | interrupts = <0 41 1>; |
800 | clocks = <&clkc CLKID_HDMIRX_MODET_COMP>, |
801 | <&clkc CLKID_HDMIRX_CFG_COMP>, |
802 | <&clkc CLKID_HDMIRX_ACR_COMP>, |
803 | <&clkc CLKID_HDMIRX_METER_COMP>, |
804 | <&clkc CLKID_HDMIRX_AXI_COMP>, |
805 | <&xtal>, |
806 | <&clkc CLKID_FCLK_DIV5>, |
807 | <&clkc CLKID_FCLK_DIV7>, |
808 | <&clkc CLKID_HDCP22_SKP_COMP>, |
809 | <&clkc CLKID_HDCP22_ESM_COMP>; |
810 | // <&clkc CLK_AUD_PLL2FS>, |
811 | // <&clkc CLK_AUD_PLL4FS>, |
812 | // <&clkc CLK_AUD_OUT>; |
813 | clock-names = "hdmirx_modet_clk", |
814 | "hdmirx_cfg_clk", |
815 | "hdmirx_acr_ref_clk", |
816 | "cts_hdmirx_meter_clk", |
817 | "cts_hdmi_axi_clk", |
818 | "xtal", |
819 | "fclk_div5", |
820 | "fclk_div7", |
821 | "hdcp_rx22_skp", |
822 | "hdcp_rx22_esm"; |
823 | // "hdmirx_aud_pll2fs", |
824 | // "hdmirx_aud_pll4f", |
825 | // "clk_aud_out"; |
826 | hdmirx_id = <0>; |
827 | en_4k_2_2k = <0>; |
828 | hpd_low_cec_off = <1>; |
829 | /* bit4: enable feature, bit3~0: port number */ |
830 | disable_port = <0x0>; |
831 | /* MAP_ADDR_MODULE_CBUS */ |
832 | /* MAP_ADDR_MODULE_HIU */ |
833 | /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */ |
834 | /* MAP_ADDR_MODULE_SEC_AHB */ |
835 | /* MAP_ADDR_MODULE_SEC_AHB2 */ |
836 | /* MAP_ADDR_MODULE_APB4 */ |
837 | /* MAP_ADDR_MODULE_TOP */ |
838 | reg = < 0x0 0x0 |
839 | 0xff63C000 0x2000 |
840 | 0xffe0d000 0x2000 |
841 | 0x0 0x0 |
842 | 0x0 0x0 |
843 | 0x0 0x0 |
844 | 0xff610000 0xa000>; |
845 | }; |
846 | |
847 | aocec: aocec { |
848 | compatible = "amlogic, aocec-tl1"; |
849 | /*device_name = "aocec";*/ |
850 | status = "okay"; |
851 | vendor_name = "Amlogic"; /* Max Chars: 8 */ |
852 | /* Refer to the following URL at: |
853 | * http://standards.ieee.org/develop/regauth/oui/oui.txt |
854 | */ |
855 | vendor_id = <0x000000>; |
856 | product_desc = "TL1"; /* Max Chars: 16 */ |
857 | cec_osd_string = "AML_TV"; /* Max Chars: 14 */ |
858 | port_num = <3>; |
859 | ee_cec; |
860 | arc_port_mask = <0x2>; |
861 | interrupts = <0 205 1 |
862 | 0 199 1>; |
863 | interrupt-names = "hdmi_aocecb","hdmi_aocec"; |
864 | pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep"; |
865 | pinctrl-0=<&aoceca_mux>; |
866 | pinctrl-1=<&aocecb_mux>; |
867 | pinctrl-2=<&aoceca_mux>; |
868 | reg = <0xFF80023c 0x4 |
869 | 0xFF800000 0x400>; |
870 | reg-names = "ao_exit","ao"; |
871 | }; |
872 | |
873 | p_tsensor: p_tsensor@ff634800 { |
874 | compatible = "amlogic, r1p1-tsensor"; |
875 | status = "okay"; |
876 | reg = <0xff634800 0x50>, |
877 | <0xff800268 0x4>; |
878 | cal_type = <0x1>; |
879 | cal_a = <324>; |
880 | cal_b = <424>; |
881 | cal_c = <3159>; |
882 | cal_d = <9411>; |
883 | rtemp = <115000>; |
884 | interrupts = <0 35 0>; |
885 | clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ |
886 | clock-names = "ts_comp"; |
887 | #thermal-sensor-cells = <1>; |
888 | }; |
889 | |
890 | d_tsensor: d_tsensor@ff634c00 { |
891 | compatible = "amlogic, r1p1-tsensor"; |
892 | status = "okay"; |
893 | reg = <0xff634c00 0x50>, |
894 | <0xff800230 0x4>; |
895 | cal_type = <0x1>; |
896 | cal_a = <324>; |
897 | cal_b = <424>; |
898 | cal_c = <3159>; |
899 | cal_d = <9411>; |
900 | rtemp = <115000>; |
901 | interrupts = <0 36 0>; |
902 | clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ |
903 | clock-names = "ts_comp"; |
904 | #thermal-sensor-cells = <1>; |
905 | }; |
906 | |
907 | s_tsensor: s_tsensor@ff635000 { |
908 | compatible = "amlogic, r1p1-tsensor"; |
909 | status = "okay"; |
910 | reg = <0xff635000 0x50>, |
911 | <0xff80026c 0x4>; |
912 | cal_type = <0x1>; |
913 | cal_a = <324>; |
914 | cal_b = <424>; |
915 | cal_c = <3159>; |
916 | cal_d = <9411>; |
917 | rtemp = <115000>; |
918 | interrupts = <0 38 0>; |
919 | clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ |
920 | clock-names = "ts_comp"; |
921 | #thermal-sensor-cells = <1>; |
922 | }; |
923 | |
924 | meson_cooldev: meson-cooldev@0 { |
925 | status = "okay"; |
926 | compatible = "amlogic, meson-cooldev"; |
927 | cooling_devices { |
928 | cpufreq_cool_cluster0 { |
929 | min_state = <1000000>; |
930 | dyn_coeff = <140>; |
931 | gpu_pp = <2>; |
932 | cluster_id = <0>; |
933 | node_name = "cpufreq_cool0"; |
934 | device_type = "cpufreq"; |
935 | }; |
936 | cpucore_cool_cluster0 { |
937 | min_state = <1>; |
938 | dyn_coeff = <0>; |
939 | gpu_pp = <2>; |
940 | cluster_id = <0>; |
941 | node_name = "cpucore_cool0"; |
942 | device_type = "cpucore"; |
943 | }; |
944 | gpufreq_cool { |
945 | min_state = <400>; |
946 | dyn_coeff = <140>; |
947 | gpu_pp = <2>; |
948 | cluster_id = <0>; |
949 | node_name = "gpufreq_cool0"; |
950 | device_type = "gpufreq"; |
951 | }; |
952 | gpucore_cool { |
953 | min_state = <1>; |
954 | dyn_coeff = <0>; |
955 | gpu_pp = <2>; |
956 | cluster_id = <0>; |
957 | node_name = "gpucore_cool0"; |
958 | device_type = "gpucore"; |
959 | }; |
960 | }; |
961 | cpufreq_cool0:cpufreq_cool0 { |
962 | #cooling-cells = <2>; /* min followed by max */ |
963 | }; |
964 | cpucore_cool0:cpucore_cool0 { |
965 | #cooling-cells = <2>; /* min followed by max */ |
966 | }; |
967 | gpufreq_cool0:gpufreq_cool0 { |
968 | #cooling-cells = <2>; /* min followed by max */ |
969 | }; |
970 | gpucore_cool0:gpucore_cool0 { |
971 | #cooling-cells = <2>; /* min followed by max */ |
972 | }; |
973 | };/*meson cooling devices end*/ |
974 | |
975 | thermal-zones { |
976 | pll_thermal: pll_thermal { |
977 | polling-delay = <1000>; |
978 | polling-delay-passive = <100>; |
979 | sustainable-power = <1322>; |
980 | thermal-sensors = <&p_tsensor 0>; |
981 | trips { |
982 | pswitch_on: trip-point@0 { |
983 | temperature = <60000>; |
984 | hysteresis = <5000>; |
985 | type = "passive"; |
986 | }; |
987 | pcontrol: trip-point@1 { |
988 | temperature = <75000>; |
989 | hysteresis = <5000>; |
990 | type = "passive"; |
991 | }; |
992 | phot: trip-point@2 { |
993 | temperature = <85000>; |
994 | hysteresis = <5000>; |
995 | type = "hot"; |
996 | }; |
997 | pcritical: trip-point@3 { |
998 | temperature = <110000>; |
999 | hysteresis = <1000>; |
1000 | type = "critical"; |
1001 | }; |
1002 | }; |
1003 | cooling-maps { |
1004 | cpufreq_cooling_map { |
1005 | trip = <&pcontrol>; |
1006 | cooling-device = <&cpufreq_cool0 0 11>; |
1007 | contribution = <1024>; |
1008 | }; |
1009 | cpucore_cooling_map { |
1010 | trip = <&pcontrol>; |
1011 | cooling-device = <&cpucore_cool0 0 4>; |
1012 | contribution = <1024>; |
1013 | }; |
1014 | gpufreq_cooling_map { |
1015 | trip = <&pcontrol>; |
1016 | cooling-device = <&gpufreq_cool0 0 4>; |
1017 | contribution = <1024>; |
1018 | }; |
1019 | }; |
1020 | }; |
1021 | ddr_thermal: ddr_thermal { |
1022 | polling-delay = <2000>; |
1023 | polling-delay-passive = <1000>; |
1024 | sustainable-power = <1322>; |
1025 | thermal-sensors = <&d_tsensor 1>; |
1026 | trips { |
1027 | dswitch_on: trip-point@0 { |
1028 | temperature = <60000>; |
1029 | hysteresis = <5000>; |
1030 | type = "passive"; |
1031 | }; |
1032 | dcontrol: trip-point@1 { |
1033 | temperature = <75000>; |
1034 | hysteresis = <5000>; |
1035 | type = "passive"; |
1036 | }; |
1037 | dhot: trip-point@2 { |
1038 | temperature = <85000>; |
1039 | hysteresis = <5000>; |
1040 | type = "hot"; |
1041 | }; |
1042 | dcritical: trip-point@3 { |
1043 | temperature = <110000>; |
1044 | hysteresis = <1000>; |
1045 | type = "critical"; |
1046 | }; |
1047 | }; |
1048 | }; |
1049 | sar_thermal: sar_thermal { |
1050 | polling-delay = <2000>; |
1051 | polling-delay-passive = <1000>; |
1052 | sustainable-power = <1322>; |
1053 | thermal-sensors = <&s_tsensor 2>; |
1054 | trips { |
1055 | sswitch_on: trip-point@0 { |
1056 | temperature = <60000>; |
1057 | hysteresis = <5000>; |
1058 | type = "passive"; |
1059 | }; |
1060 | scontrol: trip-point@1 { |
1061 | temperature = <75000>; |
1062 | hysteresis = <5000>; |
1063 | type = "passive"; |
1064 | }; |
1065 | shot: trip-point@2 { |
1066 | temperature = <85000>; |
1067 | hysteresis = <5000>; |
1068 | type = "hot"; |
1069 | }; |
1070 | scritical: trip-point@3 { |
1071 | temperature = <110000>; |
1072 | hysteresis = <1000>; |
1073 | type = "critical"; |
1074 | }; |
1075 | }; |
1076 | }; |
1077 | }; /*thermal zone end*/ |
1078 | |
1079 | /*DCDC for MP8756GD*/ |
1080 | cpu_opp_table0: cpu_opp_table0 { |
1081 | compatible = "operating-points-v2"; |
1082 | opp-shared; |
1083 | |
1084 | opp00 { |
1085 | opp-hz = /bits/ 64 <100000000>; |
1086 | opp-microvolt = <699000>; |
1087 | }; |
1088 | opp01 { |
1089 | opp-hz = /bits/ 64 <250000000>; |
1090 | opp-microvolt = <699000>; |
1091 | }; |
1092 | opp02 { |
1093 | opp-hz = /bits/ 64 <500000000>; |
1094 | opp-microvolt = <709000>; |
1095 | }; |
1096 | opp03 { |
1097 | opp-hz = /bits/ 64 <667000000>; |
1098 | opp-microvolt = <719000>; |
1099 | }; |
1100 | opp04 { |
1101 | opp-hz = /bits/ 64 <1000000000>; |
1102 | opp-microvolt = <729000>; |
1103 | }; |
1104 | opp05 { |
1105 | opp-hz = /bits/ 64 <1200000000>; |
1106 | opp-microvolt = <749000>; |
1107 | }; |
1108 | opp06 { |
1109 | opp-hz = /bits/ 64 <1404000000>; |
1110 | opp-microvolt = <769000>; |
1111 | }; |
1112 | opp07 { |
1113 | opp-hz = /bits/ 64 <1500000000>; |
1114 | opp-microvolt = <779000>; |
1115 | }; |
1116 | opp08 { |
1117 | opp-hz = /bits/ 64 <1608000000>; |
1118 | opp-microvolt = <789000>; |
1119 | }; |
1120 | opp09 { |
1121 | opp-hz = /bits/ 64 <1704000000>; |
1122 | opp-microvolt = <829000>; |
1123 | }; |
1124 | opp10 { |
1125 | opp-hz = /bits/ 64 <1800000000>; |
1126 | opp-microvolt = <879000>; |
1127 | }; |
1128 | opp11 { |
1129 | opp-hz = /bits/ 64 <1908000000>; |
1130 | opp-microvolt = <929000>; |
1131 | }; |
1132 | }; |
1133 | |
1134 | cpufreq-meson { |
1135 | compatible = "amlogic, cpufreq-meson"; |
1136 | pinctrl-names = "default"; |
1137 | pinctrl-0 = <&pwm_ao_d_pins3>; |
1138 | status = "okay"; |
1139 | }; |
1140 | |
1141 | tuner: tuner { |
1142 | compatible = "amlogic, tuner"; |
1143 | status = "okay"; |
1144 | tuner_name = "r842_tuner"; |
1145 | tuner_i2c_adap = <&i2c0>; |
1146 | tuner_i2c_addr = <0xf6>; |
1147 | tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */ |
1148 | tuner_xtal_mode = <0>; |
1149 | /* NO_SHARE_XTAL(0) |
1150 | * MASTER_TO_SLAVE_XTAL_IN(1) |
1151 | * MASTER_TO_SLAVE_XTAL_OUT(2) |
1152 | * SLAVE_XTAL_OUT(3) |
1153 | */ |
1154 | tuner_xtal_cap = <38>; /* when tuner_xtal_mode = 3, set 25 */ |
1155 | }; |
1156 | |
1157 | atv-demod { |
1158 | compatible = "amlogic, atv-demod"; |
1159 | status = "okay"; |
1160 | tuner = <&tuner>; |
1161 | btsc_sap_mode = <1>; |
1162 | pinctrl-names="atvdemod_agc_pins"; |
1163 | pinctrl-0=<&atvdemod_agc_pins>; |
1164 | reg = <0xff656000 0x2000 /* demod reg */ |
1165 | 0xff63c000 0x2000 /* hiu reg */ |
1166 | 0xff634000 0x2000 /* periphs reg */ |
1167 | 0xff64a000 0x2000>; /* audio reg */ |
1168 | reg_23cf = <0x88188832>; |
1169 | /*default:0x88188832;r840 on haier:0x48188832*/ |
1170 | }; |
1171 | |
1172 | bt-dev{ |
1173 | compatible = "amlogic, bt-dev"; |
1174 | status = "okay"; |
1175 | gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>; |
1176 | }; |
1177 | |
1178 | wifi{ |
1179 | compatible = "amlogic, aml_wifi"; |
1180 | status = "okay"; |
1181 | interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>; |
1182 | irq_trigger_type = "GPIO_IRQ_LOW"; |
1183 | dhd_static_buf; //dhd_static_buf support |
1184 | power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>; |
1185 | pinctrl-names = "default"; |
1186 | pinctrl-0 = <&pwm_b_pins1>; |
1187 | pwm_config = <&wifi_pwm_conf>; |
1188 | }; |
1189 | |
1190 | wifi_pwm_conf:wifi_pwm_conf{ |
1191 | pwm_channel1_conf { |
1192 | pwms = <&pwm_ab MESON_PWM_1 30541 0>; |
1193 | duty-cycle = <15270>; |
1194 | times = <8>; |
1195 | }; |
1196 | pwm_channel2_conf { |
1197 | pwms = <&pwm_ab MESON_PWM_3 30500 0>; |
1198 | duty-cycle = <15250>; |
1199 | times = <12>; |
1200 | }; |
1201 | }; |
1202 | |
1203 | sd_emmc_b: sdio@ffe05000 { |
1204 | status = "okay"; |
1205 | compatible = "amlogic, meson-mmc-tl1"; |
1206 | reg = <0xffe05000 0x800>; |
1207 | interrupts = <0 190 4>; |
1208 | |
1209 | pinctrl-names = "sdio_all_pins", |
1210 | "sdio_clk_cmd_pins"; |
1211 | pinctrl-0 = <&sdio_all_pins>; |
1212 | pinctrl-1 = <&sdio_clk_cmd_pins>; |
1213 | |
1214 | clocks = <&clkc CLKID_SD_EMMC_B>, |
1215 | <&clkc CLKID_SD_EMMC_B_P0_COMP>, |
1216 | <&clkc CLKID_FCLK_DIV2>, |
1217 | <&clkc CLKID_FCLK_DIV5>, |
1218 | <&xtal>; |
1219 | clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal"; |
1220 | |
1221 | bus-width = <4>; |
1222 | cap-sd-highspeed; |
1223 | cap-mmc-highspeed; |
1224 | max-frequency = <100000000>; |
1225 | disable-wp; |
1226 | sdio { |
1227 | pinname = "sdio"; |
1228 | ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ |
1229 | caps = "MMC_CAP_4_BIT_DATA", |
1230 | "MMC_CAP_MMC_HIGHSPEED", |
1231 | "MMC_CAP_SD_HIGHSPEED", |
1232 | "MMC_CAP_NONREMOVABLE", /**ptm debug */ |
1233 | "MMC_CAP_UHS_SDR12", |
1234 | "MMC_CAP_UHS_SDR25", |
1235 | "MMC_CAP_UHS_SDR50", |
1236 | "MMC_CAP_UHS_SDR104", |
1237 | "MMC_PM_KEEP_POWER", |
1238 | "MMC_CAP_SDIO_IRQ"; |
1239 | f_min = <400000>; |
1240 | f_max = <200000000>; |
1241 | max_req_size = <0x20000>; /**128KB*/ |
1242 | card_type = <3>; |
1243 | /* 3:sdio device(ie:sdio-wifi), |
1244 | * 4:SD combo (IO+mem) card |
1245 | */ |
1246 | }; |
1247 | }; |
1248 | }; /* end of / */ |
1249 | |
1250 | &i2c0 { |
1251 | status = "okay"; |
1252 | clock-frequency = <300000>; |
1253 | pinctrl-names="default"; |
1254 | pinctrl-0=<&i2c0_dv_pins>; |
1255 | }; |
1256 | |
1257 | &audiobus { |
1258 | tdma:tdm@0 { |
1259 | compatible = "amlogic, tl1-snd-tdma"; |
1260 | #sound-dai-cells = <0>; |
1261 | |
1262 | dai-tdm-lane-slot-mask-in = <1 0>; |
1263 | dai-tdm-lane-slot-mask-out = <1 1 1 1>; |
1264 | dai-tdm-clk-sel = <0>; |
1265 | |
1266 | clocks = <&clkaudio CLKID_AUDIO_MCLK_A |
1267 | &clkc CLKID_MPLL0 |
1268 | &clkc CLKID_MPLL1 |
1269 | &clkaudio CLKID_AUDIO_SPDIFOUT_A>; |
1270 | clock-names = "mclk", "clk_srcpll", |
1271 | "samesource_srcpll", "samesource_clk"; |
1272 | |
1273 | pinctrl-names = "tdm_pins"; |
1274 | pinctrl-0 = <&tdma_mclk &tdmout_a>; |
1275 | |
1276 | /* |
1277 | * 0: tdmout_a; |
1278 | * 1: tdmout_b; |
1279 | * 2: tdmout_c; |
1280 | * 3: spdifout; |
1281 | * 4: spdifout_b; |
1282 | */ |
1283 | samesource_sel = <3>; |
1284 | |
1285 | /* In for ACODEC_ADC */ |
1286 | acodec_adc = <1>; |
1287 | |
1288 | status = "okay"; |
1289 | }; |
1290 | |
1291 | tdmb:tdm@1 { |
1292 | compatible = "amlogic, tl1-snd-tdmb"; |
1293 | #sound-dai-cells = <0>; |
1294 | |
1295 | dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
1296 | dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
1297 | dai-tdm-clk-sel = <1>; |
1298 | |
1299 | clocks = <&clkaudio CLKID_AUDIO_MCLK_B |
1300 | &clkc CLKID_MPLL1>; |
1301 | clock-names = "mclk", "clk_srcpll"; |
1302 | |
1303 | status = "okay"; |
1304 | }; |
1305 | |
1306 | tdmc:tdm@2 { |
1307 | compatible = "amlogic, tl1-snd-tdmc"; |
1308 | #sound-dai-cells = <0>; |
1309 | |
1310 | dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
1311 | dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
1312 | dai-tdm-clk-sel = <2>; |
1313 | |
1314 | clocks = <&clkaudio CLKID_AUDIO_MCLK_C |
1315 | &clkc CLKID_MPLL2>; |
1316 | clock-names = "mclk", "clk_srcpll"; |
1317 | |
1318 | pinctrl-names = "tdm_pins"; |
1319 | pinctrl-0 = <&tdmout_c &tdmin_c>; |
1320 | |
1321 | status = "okay"; |
1322 | }; |
1323 | |
1324 | spdifa:spdif@0 { |
1325 | compatible = "amlogic, tl1-snd-spdif-a"; |
1326 | #sound-dai-cells = <0>; |
1327 | |
1328 | clocks = <&clkc CLKID_MPLL1 |
1329 | &clkc CLKID_FCLK_DIV4 |
1330 | &clkaudio CLKID_AUDIO_GATE_SPDIFIN |
1331 | &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A |
1332 | &clkaudio CLKID_AUDIO_SPDIFIN |
1333 | &clkaudio CLKID_AUDIO_SPDIFOUT_A>; |
1334 | clock-names = "sysclk", "fixed_clk", "gate_spdifin", |
1335 | "gate_spdifout", "clk_spdifin", "clk_spdifout"; |
1336 | |
1337 | interrupts = |
1338 | <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; |
1339 | interrupt-names = "irq_spdifin"; |
1340 | |
1341 | pinctrl-names = "spdif_pins"; |
1342 | pinctrl-0 = <&spdifout_a>; |
1343 | |
1344 | /* |
1345 | * whether do asrc for pcm and resample a or b |
1346 | * if raw data, asrc is disabled automatically |
1347 | * 0: "Disable", |
1348 | * 1: "Enable:32K", |
1349 | * 2: "Enable:44K", |
1350 | * 3: "Enable:48K", |
1351 | * 4: "Enable:88K", |
1352 | * 5: "Enable:96K", |
1353 | * 6: "Enable:176K", |
1354 | * 7: "Enable:192K", |
1355 | */ |
1356 | asrc_id = <0>; |
1357 | auto_asrc = <3>; |
1358 | |
1359 | status = "okay"; |
1360 | }; |
1361 | |
1362 | spdifb:spdif@1 { |
1363 | compatible = "amlogic, tl1-snd-spdif-b"; |
1364 | #sound-dai-cells = <0>; |
1365 | |
1366 | clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/ |
1367 | &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B |
1368 | &clkaudio CLKID_AUDIO_SPDIFOUT_B>; |
1369 | clock-names = "sysclk", |
1370 | "gate_spdifout", "clk_spdifout"; |
1371 | |
1372 | status = "okay"; |
1373 | }; |
1374 | |
1375 | pdm:pdm { |
1376 | compatible = "amlogic, tl1-snd-pdm"; |
1377 | #sound-dai-cells = <0>; |
1378 | |
1379 | clocks = <&clkaudio CLKID_AUDIO_GATE_PDM |
1380 | &clkc CLKID_FCLK_DIV3 |
1381 | &clkc CLKID_MPLL3 |
1382 | &clkaudio CLKID_AUDIO_PDMIN0 |
1383 | &clkaudio CLKID_AUDIO_PDMIN1>; |
1384 | clock-names = "gate", |
1385 | "sysclk_srcpll", |
1386 | "dclk_srcpll", |
1387 | "pdm_dclk", |
1388 | "pdm_sysclk"; |
1389 | |
1390 | pinctrl-names = "pdm_pins"; |
1391 | pinctrl-0 = <&pdmin>; |
1392 | |
1393 | /* mode 0~4, defalut:1 */ |
1394 | filter_mode = <1>; |
1395 | |
1396 | status = "okay"; |
1397 | }; |
1398 | |
1399 | extn:extn { |
1400 | compatible = "amlogic, snd-extn"; |
1401 | #sound-dai-cells = <0>; |
1402 | |
1403 | interrupts = |
1404 | <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; |
1405 | interrupt-names = "irq_frhdmirx"; |
1406 | |
1407 | status = "okay"; |
1408 | }; |
1409 | |
1410 | aed:effect { |
1411 | compatible = "amlogic, snd-effect-v2"; |
1412 | #sound-dai-cells = <0>; |
1413 | |
1414 | clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC |
1415 | &clkc CLKID_FCLK_DIV5 |
1416 | &clkaudio CLKID_AUDIO_EQDRC>; |
1417 | clock-names = "gate", "srcpll", "eqdrc"; |
1418 | |
1419 | /* |
1420 | * 0:tdmout_a |
1421 | * 1:tdmout_b |
1422 | * 2:tdmout_c |
1423 | * 3:spdifout |
1424 | * 4:spdifout_b |
1425 | */ |
1426 | eqdrc_module = <0>; |
1427 | /* max 0xf, each bit for one lane, usually one lane */ |
1428 | lane_mask = <0x1>; |
1429 | /* max 0xff, each bit for one channel */ |
1430 | channel_mask = <0xff>; |
1431 | |
1432 | status = "okay"; |
1433 | }; |
1434 | |
1435 | asrca: resample@0 { |
1436 | compatible = "amlogic, tl1-resample-a"; |
1437 | clocks = <&clkc CLKID_MPLL0 |
1438 | &clkaudio CLKID_AUDIO_MCLK_A |
1439 | &clkaudio CLKID_AUDIO_RESAMPLE_A>; |
1440 | clock-names = "resample_pll", "resample_src", "resample_clk"; |
1441 | /*same with toddr_src |
1442 | * TDMIN_A, 0 |
1443 | * TDMIN_B, 1 |
1444 | * TDMIN_C, 2 |
1445 | * SPDIFIN, 3 |
1446 | * PDMIN, 4 |
1447 | * NONE, |
1448 | * TDMIN_LB, 6 |
1449 | * LOOPBACK, 7 |
1450 | */ |
1451 | resample_module = <3>; |
1452 | |
1453 | status = "okay"; |
1454 | }; |
1455 | |
1456 | asrcb: resample@1 { |
1457 | compatible = "amlogic, tl1-resample-b"; |
1458 | |
1459 | clocks = <&clkc CLKID_MPLL3 |
1460 | &clkaudio CLKID_AUDIO_MCLK_F |
1461 | &clkaudio CLKID_AUDIO_RESAMPLE_B>; |
1462 | clock-names = "resample_pll", "resample_src", "resample_clk"; |
1463 | |
1464 | /*same with toddr_src |
1465 | * TDMIN_A, 0 |
1466 | * TDMIN_B, 1 |
1467 | * TDMIN_C, 2 |
1468 | * SPDIFIN, 3 |
1469 | * PDMIN, 4 |
1470 | * NONE, |
1471 | * TDMIN_LB, 6 |
1472 | * LOOPBACK, 7 |
1473 | */ |
1474 | resample_module = <3>; |
1475 | |
1476 | status = "disabled"; |
1477 | }; |
1478 | |
1479 | }; /* end of audiobus */ |
1480 | |
1481 | &pinctrl_periphs { |
1482 | /* audio pin mux */ |
1483 | |
1484 | tdma_mclk: tdma_mclk { |
1485 | mux { /* GPIOZ_0 */ |
1486 | groups = "mclk0_z"; |
1487 | function = "mclk0"; |
1488 | }; |
1489 | }; |
1490 | |
1491 | tdmout_a: tdmout_a { |
1492 | mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */ |
1493 | groups = "tdma_sclk_z", |
1494 | "tdma_fs_z", |
1495 | "tdma_dout0_z"; |
1496 | function = "tdma_out"; |
1497 | bias-disable; |
1498 | }; |
1499 | }; |
1500 | |
1501 | tdmin_a: tdmin_a { |
1502 | mux { /* GPIOZ_9 */ |
1503 | groups = "tdma_din2_z"; |
1504 | function = "tdma_in"; |
1505 | }; |
1506 | }; |
1507 | |
1508 | tdmout_c: tdmout_c { |
1509 | mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */ |
1510 | groups = "tdmc_sclk", |
1511 | "tdmc_fs", |
1512 | "tdmc_dout0"; |
1513 | function = "tdmc_out"; |
1514 | }; |
1515 | }; |
1516 | |
1517 | tdmin_c: tdmin_c { |
1518 | mux { /* GPIODV_10 */ |
1519 | groups = "tdmc_din1"; |
1520 | function = "tdmc_in"; |
1521 | }; |
1522 | }; |
1523 | |
1524 | spdifin_a: spdifin_a { |
1525 | mux { /* GPIODV_5 */ |
1526 | groups = "spdif_in"; |
1527 | function = "spdif_in"; |
1528 | }; |
1529 | }; |
1530 | |
1531 | spdifout_a: spdifout_a { |
1532 | mux { /* GPIODV_4 */ |
1533 | groups = "spdif_out_dv4"; |
1534 | function = "spdif_out"; |
1535 | }; |
1536 | }; |
1537 | |
1538 | pdmin: pdmin { |
1539 | mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */ |
1540 | groups = "pdm_dclk_z", |
1541 | "pdm_din0_z", |
1542 | "pdm_din2_z4"; |
1543 | function = "pdm"; |
1544 | }; |
1545 | }; |
1546 | |
1547 | /*backlight*/ |
1548 | bl_pwm_vs_on_pins:bl_pwm_vs_on_pin { |
1549 | mux { |
1550 | groups = "pwm_vs_z5"; |
1551 | function = "pwm_vs"; |
1552 | }; |
1553 | }; |
1554 | bl_pwm_off_pins:bl_pwm_off_pin { |
1555 | mux { |
1556 | groups = "GPIOZ_5"; |
1557 | function = "gpio_periphs"; |
1558 | output-low; |
1559 | }; |
1560 | }; |
1561 | bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin { |
1562 | mux { |
1563 | groups = "pwm_vs_z5"; |
1564 | function = "pwm_vs"; |
1565 | }; |
1566 | }; |
1567 | bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin { |
1568 | mux { |
1569 | groups = "pwm_vs_z6"; |
1570 | function = "pwm_vs"; |
1571 | }; |
1572 | }; |
1573 | bl_pwm_combo_off_pins:bl_pwm_combo_off_pin { |
1574 | mux { |
1575 | groups = "GPIOZ_5", |
1576 | "GPIOZ_6"; |
1577 | function = "gpio_periphs"; |
1578 | output-low; |
1579 | }; |
1580 | }; |
1581 | |
1582 | }; /* end of pinctrl_periphs */ |
1583 | |
1584 | &audio_data{ |
1585 | status = "okay"; |
1586 | }; |
1587 | |
1588 | &i2c2 { |
1589 | status = "okay"; |
1590 | pinctrl-names="default"; |
1591 | pinctrl-0=<&i2c2_z_pins>; |
1592 | clock-frequency = <400000>; |
1593 | |
1594 | ad82584f: ad82584f@62 { |
1595 | compatible = "ESMT, ad82584f"; |
1596 | #sound-dai-cells = <0>; |
1597 | reg = <0x31>; |
1598 | status = "okay"; |
1599 | reset_pin = <&gpio_ao GPIOAO_6 0>; |
1600 | }; |
1601 | |
1602 | }; |
1603 | |
1604 | &sd_emmc_c { |
1605 | status = "okay"; |
1606 | emmc { |
1607 | caps = "MMC_CAP_8_BIT_DATA", |
1608 | "MMC_CAP_MMC_HIGHSPEED", |
1609 | "MMC_CAP_SD_HIGHSPEED", |
1610 | "MMC_CAP_NONREMOVABLE", |
1611 | "MMC_CAP_1_8V_DDR", |
1612 | "MMC_CAP_HW_RESET", |
1613 | "MMC_CAP_ERASE", |
1614 | "MMC_CAP_CMD23"; |
1615 | caps2 = "MMC_CAP2_HS200"; |
1616 | /* "MMC_CAP2_HS400";*/ |
1617 | f_min = <400000>; |
1618 | f_max = <200000000>; |
1619 | }; |
1620 | }; |
1621 | |
1622 | |
1623 | |
1624 | &spifc { |
1625 | status = "disabled"; |
1626 | spi-nor@0 { |
1627 | cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>; |
1628 | }; |
1629 | }; |
1630 | |
1631 | &slc_nand { |
1632 | status = "disabled"; |
1633 | plat-names = "bootloader", "nandnormal"; |
1634 | plat-num = <2>; |
1635 | plat-part-0 = <&bootloader>; |
1636 | plat-part-1 = <&nandnormal>; |
1637 | bootloader: bootloader{ |
1638 | enable_pad = "ce0"; |
1639 | busy_pad = "rb0"; |
1640 | timming_mode = "mode5"; |
1641 | bch_mode = "bch8_1k"; |
1642 | t_rea = <20>; |
1643 | t_rhoh = <15>; |
1644 | chip_num = <1>; |
1645 | part_num = <0>; |
1646 | rb_detect = <1>; |
1647 | }; |
1648 | nandnormal: nandnormal{ |
1649 | enable_pad = "ce0"; |
1650 | busy_pad = "rb0"; |
1651 | timming_mode = "mode5"; |
1652 | bch_mode = "bch8_1k"; |
1653 | plane_mode = "twoplane"; |
1654 | t_rea = <20>; |
1655 | t_rhoh = <15>; |
1656 | chip_num = <2>; |
1657 | part_num = <3>; |
1658 | partition = <&nand_partitions>; |
1659 | rb_detect = <1>; |
1660 | }; |
1661 | nand_partitions:nand_partition{ |
1662 | /* |
1663 | * if bl_mode is 1, tpl size was generate by |
1664 | * fip_copies * fip_size which |
1665 | * will not skip bad when calculating |
1666 | * the partition size; |
1667 | * |
1668 | * if bl_mode is 0, |
1669 | * tpl partition must be comment out. |
1670 | */ |
1671 | tpl{ |
1672 | offset=<0x0 0x0>; |
1673 | size=<0x0 0x0>; |
1674 | }; |
1675 | logo{ |
1676 | offset=<0x0 0x0>; |
1677 | size=<0x0 0x200000>; |
1678 | }; |
1679 | recovery{ |
1680 | offset=<0x0 0x0>; |
1681 | size=<0x0 0x1000000>; |
1682 | }; |
1683 | boot{ |
1684 | offset=<0x0 0x0>; |
1685 | size=<0x0 0x1000000>; |
1686 | }; |
1687 | system{ |
1688 | offset=<0x0 0x0>; |
1689 | size=<0x0 0x4000000>; |
1690 | }; |
1691 | data{ |
1692 | offset=<0xffffffff 0xffffffff>; |
1693 | size=<0x0 0x0>; |
1694 | }; |
1695 | }; |
1696 | }; |
1697 | |
1698 | ðmac { |
1699 | status = "okay"; |
1700 | pinctrl-names = "internal_eth_pins"; |
1701 | pinctrl-0 = <&internal_eth_pins>; |
1702 | mc_val = <0x4be04>; |
1703 | |
1704 | internal_phy=<1>; |
1705 | }; |
1706 | |
1707 | &uart_A { |
1708 | status = "okay"; |
1709 | }; |
1710 | |
1711 | &dwc3 { |
1712 | status = "okay"; |
1713 | }; |
1714 | |
1715 | &usb2_phy_v2 { |
1716 | status = "okay"; |
1717 | portnum = <3>; |
1718 | }; |
1719 | |
1720 | &usb3_phy_v2 { |
1721 | status = "okay"; |
1722 | portnum = <0>; |
1723 | otg = <0>; |
1724 | }; |
1725 | |
1726 | &dwc2_a { |
1727 | status = "okay"; |
1728 | /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ |
1729 | controller-type = <1>; |
1730 | }; |
1731 | |
1732 | &spicc0 { |
1733 | status = "okay"; |
1734 | pinctrl-names = "default"; |
1735 | pinctrl-0 = <&spicc0_pins_h>; |
1736 | cs-gpios = <&gpio GPIOH_20 0>; |
1737 | }; |
1738 | |
1739 | &meson_fb { |
1740 | status = "okay"; |
1741 | display_size_default = <1920 1080 1920 2160 32>; |
1742 | mem_size = <0x00800000 0x1980000 0x100000 0x800000>; |
1743 | logo_addr = "0x7f800000"; |
1744 | mem_alloc = <0>; |
1745 | pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ |
1746 | }; |
1747 | |
1748 | &pwm_AO_cd { |
1749 | status = "okay"; |
1750 | }; |
1751 | |
1752 | &saradc { |
1753 | status = "okay"; |
1754 | }; |
1755 | |
1756 | &i2c1 { |
1757 | status = "okay"; |
1758 | clock-frequency = <300000>; |
1759 | pinctrl-names="default"; |
1760 | pinctrl-0=<&i2c1_h_pins>; |
1761 | |
1762 | lcd_extern_i2c0: lcd_extern_i2c@0 { |
1763 | compatible = "lcd_ext, i2c"; |
1764 | dev_name = "i2c_T5800Q"; |
1765 | reg = <0x1c>; |
1766 | status = "okay"; |
1767 | }; |
1768 | |
1769 | lcd_extern_i2c1: lcd_extern_i2c@1 { |
1770 | compatible = "lcd_ext, i2c"; |
1771 | dev_name = "i2c_ANX6862"; |
1772 | reg = <0x20>; |
1773 | status = "okay"; |
1774 | }; |
1775 | |
1776 | lcd_extern_i2c2: lcd_extern_i2c@2 { |
1777 | compatible = "lcd_ext, i2c"; |
1778 | dev_name = "i2c_ANX7911"; |
1779 | reg = <0x74>; |
1780 | status = "okay"; |
1781 | }; |
1782 | }; |
1783 | |
1784 | &pwm_ab { |
1785 | status = "okay"; |
1786 | }; |
1787 | |
1788 | &pwm_cd { |
1789 | status = "okay"; |
1790 | }; |
1791 | |
1792 | &efuse { |
1793 | status = "okay"; |
1794 | }; |
1795 |