blob: 9aac226d1130079c4480f3e4ef32a35e6db35125
1 | /* |
2 | * arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts |
3 | * |
4 | * Copyright (C) 2018 Amlogic, Inc. All rights reserved. |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or |
9 | * (at your option) any later version. |
10 | * |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
14 | * more details. |
15 | * |
16 | */ |
17 | |
18 | /dts-v1/; |
19 | |
20 | #include "mesontl1.dtsi" |
21 | #include "partition_mbox_normal_P_32.dtsi" |
22 | #include "mesontl1_x301-panel.dtsi" |
23 | |
24 | / { |
25 | model = "Amlogic TL1 T962X2 X301"; |
26 | amlogic-dt-id = "tl1_t962x2_x301"; |
27 | compatible = "amlogic, tl1_t962x2_x301"; |
28 | |
29 | aliases { |
30 | serial0 = &uart_AO; |
31 | serial1 = &uart_A; |
32 | serial2 = &uart_B; |
33 | serial3 = &uart_C; |
34 | serial4 = &uart_AO_B; |
35 | tsensor0 = &p_tsensor; |
36 | tsensor1 = &d_tsensor; |
37 | tsensor2 = &s_tsensor; |
38 | i2c0 = &i2c0; |
39 | i2c1 = &i2c1; |
40 | i2c2 = &i2c2; |
41 | i2c3 = &i2c3; |
42 | i2c4 = &i2c_AO; |
43 | spi0 = &spicc0; |
44 | spi1 = &spicc1; |
45 | }; |
46 | |
47 | memory@00000000 { |
48 | device_type = "memory"; |
49 | linux,usable-memory = <0x0 0x80000000>; |
50 | }; |
51 | |
52 | reserved-memory { |
53 | #address-cells = <1>; |
54 | #size-cells = <1>; |
55 | ranges; |
56 | /* global autoconfigured region for contiguous allocations */ |
57 | ramoops@0x07400000 { |
58 | compatible = "ramoops"; |
59 | reg = <0x07400000 0x00100000>; |
60 | record-size = <0x8000>; |
61 | console-size = <0x8000>; |
62 | ftrace-size = <0x0>; |
63 | pmsg-size = <0x8000>; |
64 | }; |
65 | |
66 | secmon_reserved: linux,secmon { |
67 | compatible = "shared-dma-pool"; |
68 | reusable; |
69 | size = <0x400000>; |
70 | alignment = <0x400000>; |
71 | alloc-ranges = <0x05000000 0x400000>; |
72 | }; |
73 | |
74 | logo_reserved:linux,meson-fb { |
75 | compatible = "shared-dma-pool"; |
76 | reusable; |
77 | size = <0x800000>; |
78 | alignment = <0x400000>; |
79 | alloc-ranges = <0x7f800000 0x800000>; |
80 | }; |
81 | |
82 | lcd_tcon_reserved:linux,lcd_tcon { |
83 | compatible = "shared-dma-pool"; |
84 | reusable; |
85 | size = <0xc00000>; |
86 | alignment = <0x400000>; |
87 | alloc-ranges = <0x7ec00000 0xc00000>; |
88 | }; |
89 | |
90 | codec_mm_cma:linux,codec_mm_cma { |
91 | compatible = "shared-dma-pool"; |
92 | reusable; |
93 | /* ion_codec_mm max can alloc size 80M*/ |
94 | size = <0x13400000>; |
95 | alignment = <0x400000>; |
96 | linux,contiguous-region; |
97 | alloc-ranges = <0x30000000 0x50000000>; |
98 | }; |
99 | |
100 | /* codec shared reserved */ |
101 | codec_mm_reserved:linux,codec_mm_reserved { |
102 | compatible = "amlogic, codec-mm-reserved"; |
103 | size = <0x0>; |
104 | alignment = <0x100000>; |
105 | //no-map; |
106 | }; |
107 | |
108 | ion_cma_reserved:linux,ion-dev { |
109 | compatible = "shared-dma-pool"; |
110 | reusable; |
111 | size = <0x8000000>; |
112 | alignment = <0x400000>; |
113 | }; |
114 | |
115 | /* vdin0 CMA pool */ |
116 | //vdin0_cma_reserved:linux,vdin0_cma { |
117 | // compatible = "shared-dma-pool"; |
118 | // reusable; |
119 | /* 3840x2160x4x4 ~=128 M */ |
120 | // size = <0xc400000>; |
121 | // alignment = <0x400000>; |
122 | //}; |
123 | |
124 | /* vdin1 CMA pool */ |
125 | vdin1_cma_reserved:linux,vdin1_cma { |
126 | compatible = "shared-dma-pool"; |
127 | reusable; |
128 | /* 1920x1080x2x4 =16 M */ |
129 | size = <0x1400000>; |
130 | alignment = <0x400000>; |
131 | }; |
132 | |
133 | /*demod_reserved:linux,demod { |
134 | * compatible = "amlogic, demod-mem"; |
135 | * size = <0x800000>; //8M //100m 0x6400000 |
136 | * alloc-ranges = <0x0 0x30000000>; |
137 | * //multi-use; |
138 | * //no-map; |
139 | *}; |
140 | */ |
141 | |
142 | demod_cma_reserved:linux,demod_cma { |
143 | compatible = "shared-dma-pool"; |
144 | reusable; |
145 | /* 8M */ |
146 | size = <0x0800000>; |
147 | alignment = <0x400000>; |
148 | }; |
149 | |
150 | /*di CMA pool */ |
151 | di_cma_reserved:linux,di_cma { |
152 | compatible = "shared-dma-pool"; |
153 | reusable; |
154 | /* buffer_size = 3621952(yuv422 8bit) |
155 | * | 4736064(yuv422 10bit) |
156 | * | 4074560(yuv422 10bit full pack mode) |
157 | * 10x3621952=34.6M(0x23) support 8bit |
158 | * 10x4736064=45.2M(0x2e) support 12bit |
159 | * 10x4074560=40M(0x28) support 10bit |
160 | */ |
161 | size = <0x02800000>; |
162 | alignment = <0x400000>; |
163 | }; |
164 | |
165 | /* for hdmi rx emp use */ |
166 | hdmirx_emp_cma_reserved:linux,emp_cma { |
167 | compatible = "shared-dma-pool"; |
168 | /*linux,phandle = <5>;*/ |
169 | reusable; |
170 | /* 4M for emp to ddr */ |
171 | /* 32M for tmds to ddr */ |
172 | size = <0x400000>; |
173 | alignment = <0x400000>; |
174 | /* alloc-ranges = <0x400000 0x2000000>; */ |
175 | }; |
176 | |
177 | /* POST PROCESS MANAGER */ |
178 | ppmgr_reserved:linux,ppmgr { |
179 | compatible = "amlogic, ppmgr_memory"; |
180 | size = <0x0>; |
181 | }; |
182 | |
183 | picdec_cma_reserved:linux,picdec { |
184 | compatible = "shared-dma-pool"; |
185 | reusable; |
186 | size = <0x0>; |
187 | alignment = <0x0>; |
188 | linux,contiguous-region; |
189 | }; |
190 | }; /* end of reserved-memory */ |
191 | |
192 | codec_mm { |
193 | compatible = "amlogic, codec, mm"; |
194 | status = "okay"; |
195 | memory-region = <&codec_mm_cma &codec_mm_reserved>; |
196 | }; |
197 | |
198 | picdec { |
199 | compatible = "amlogic, picdec"; |
200 | memory-region = <&picdec_cma_reserved>; |
201 | dev_name = "picdec"; |
202 | status = "okay"; |
203 | }; |
204 | |
205 | ppmgr { |
206 | compatible = "amlogic, ppmgr"; |
207 | memory-region = <&ppmgr_reserved>; |
208 | status = "okay"; |
209 | }; |
210 | |
211 | deinterlace { |
212 | compatible = "amlogic, deinterlace"; |
213 | status = "okay"; |
214 | /* 0:use reserved; 1:use cma; 2:use cma as reserved */ |
215 | flag_cma = <1>; |
216 | //memory-region = <&di_reserved>; |
217 | memory-region = <&di_cma_reserved>; |
218 | interrupts = <0 46 1 |
219 | 0 40 1>; |
220 | interrupt-names = "pre_irq", "post_irq"; |
221 | clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>, |
222 | <&clkc CLKID_VPU_CLKB_COMP>; |
223 | clock-names = "vpu_clkb_tmp_composite", |
224 | "vpu_clkb_composite"; |
225 | clock-range = <334 667>; |
226 | /* buffer-size = <3621952>;(yuv422 8bit) */ |
227 | buffer-size = <4074560>;/*yuv422 fullpack*/ |
228 | /* reserve-iomap = "true"; */ |
229 | /* if enable nr10bit, set nr10bit-support to 1 */ |
230 | post-wr-support = <1>; |
231 | nr10bit-support = <1>; |
232 | nrds-enable = <1>; |
233 | pps-enable = <1>; |
234 | }; |
235 | |
236 | vout { |
237 | compatible = "amlogic, vout"; |
238 | status = "okay"; |
239 | fr_auto_policy = <0>; |
240 | }; |
241 | |
242 | /* Audio Related start */ |
243 | pdm_codec:dummy { |
244 | #sound-dai-cells = <0>; |
245 | compatible = "amlogic, pdm_dummy_codec"; |
246 | status = "okay"; |
247 | }; |
248 | |
249 | dummy_codec:dummy { |
250 | #sound-dai-cells = <0>; |
251 | compatible = "amlogic, aml_dummy_codec"; |
252 | status = "okay"; |
253 | }; |
254 | |
255 | tl1_codec:codec { |
256 | #sound-dai-cells = <0>; |
257 | compatible = "amlogic, tl1_acodec"; |
258 | status = "okay"; |
259 | reg = <0xff632000 0x1c>; |
260 | tdmout_index = <0>; |
261 | tdmin_index = <0>; |
262 | dat1_ch_sel = <1>; |
263 | }; |
264 | |
265 | aml_dtv_demod { |
266 | compatible = "amlogic, ddemod-tl1"; |
267 | dev_name = "aml_dtv_demod"; |
268 | status = "okay"; |
269 | |
270 | //pinctrl-names="dtvdemod_agc"; |
271 | //pinctrl-0=<&dtvdemod_agc>; |
272 | |
273 | clocks = <&clkc CLKID_DAC_CLK>; |
274 | clock-names = "vdac_clk_gate"; |
275 | |
276 | reg = <0xff650000 0x4000 /*dtv demod base*/ |
277 | 0xff63c000 0x2000 /*hiu reg base*/ |
278 | 0xff800000 0x1000 /*io_aobus_base*/ |
279 | 0xffd01000 0x1000 /*reset*/ |
280 | >; |
281 | |
282 | dtv_demod0_mem = <0>; // need move to aml_dtv_demod ? |
283 | spectrum = <1>; |
284 | cma_flag = <1>; |
285 | cma_mem_size = <8>; |
286 | memory-region = <&demod_cma_reserved>;//<&demod_reserved>; |
287 | }; |
288 | |
289 | auge_sound { |
290 | compatible = "amlogic, tl1-sound-card"; |
291 | aml-audio-card,name = "AML-AUGESOUND"; |
292 | |
293 | avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>; |
294 | |
295 | aml-audio-card,dai-link@0 { |
296 | format = "i2s"; |
297 | mclk-fs = <256>; |
298 | continuous-clock; |
299 | //bitclock-inversion; |
300 | //frame-inversion; |
301 | /* master mode */ |
302 | bitclock-master = <&tdma>; |
303 | frame-master = <&tdma>; |
304 | /* slave mode */ |
305 | /* |
306 | * bitclock-master = <&tdmacodec>; |
307 | * frame-master = <&tdmacodec>; |
308 | */ |
309 | /* suffix-name, sync with android audio hal used for */ |
310 | suffix-name = "alsaPORT-i2s"; |
311 | tdmacpu: cpu { |
312 | sound-dai = <&tdma>; |
313 | dai-tdm-slot-tx-mask = |
314 | <1 1>; |
315 | dai-tdm-slot-rx-mask = |
316 | <1 1>; |
317 | dai-tdm-slot-num = <2>; |
318 | dai-tdm-slot-width = <32>; |
319 | system-clock-frequency = <12288000>; |
320 | }; |
321 | tdmacodec: codec { |
322 | //sound-dai = <&dummy_codec>; |
323 | sound-dai = <&ad82584f &tl1_codec>; |
324 | }; |
325 | }; |
326 | |
327 | aml-audio-card,dai-link@1 { |
328 | status = "disabled"; |
329 | |
330 | format = "i2s"; |
331 | mclk-fs = <256>; |
332 | //continuous-clock; |
333 | //bitclock-inversion; |
334 | //frame-inversion; |
335 | /* master mode */ |
336 | bitclock-master = <&tdmb>; |
337 | frame-master = <&tdmb>; |
338 | /* slave mode */ |
339 | //bitclock-master = <&tdmbcodec>; |
340 | //frame-master = <&tdmbcodec>; |
341 | /* suffix-name, sync with android audio hal used for */ |
342 | suffix-name = "alsaPORT-pcm"; |
343 | cpu { |
344 | sound-dai = <&tdmb>; |
345 | dai-tdm-slot-tx-mask = <1 1>; |
346 | dai-tdm-slot-rx-mask = <1 1>; |
347 | dai-tdm-slot-num = <2>; |
348 | /* |
349 | * dai-tdm-slot-tx-mask = |
350 | * <1 1 1 1 1 1 1 1>; |
351 | * dai-tdm-slot-rx-mask = |
352 | * <1 1 1 1 1 1 1 1>; |
353 | * dai-tdm-slot-num = <8>; |
354 | */ |
355 | dai-tdm-slot-width = <32>; |
356 | system-clock-frequency = <12288000>; |
357 | }; |
358 | tdmbcodec: codec { |
359 | sound-dai = <&dummy_codec>; |
360 | }; |
361 | }; |
362 | |
363 | aml-audio-card,dai-link@2 { |
364 | status = "disabled"; |
365 | |
366 | format = "i2s"; |
367 | mclk-fs = <256>; |
368 | //continuous-clock; |
369 | //bitclock-inversion; |
370 | //frame-inversion; |
371 | /* master mode */ |
372 | bitclock-master = <&tdmc>; |
373 | frame-master = <&tdmc>; |
374 | /* slave mode */ |
375 | //bitclock-master = <&tdmccodec>; |
376 | //frame-master = <&tdmccodec>; |
377 | /* suffix-name, sync with android audio hal used for */ |
378 | //suffix-name = "alsaPORT-tdm"; |
379 | cpu { |
380 | sound-dai = <&tdmc>; |
381 | dai-tdm-slot-tx-mask = <1 1>; |
382 | dai-tdm-slot-rx-mask = <1 1>; |
383 | dai-tdm-slot-num = <2>; |
384 | dai-tdm-slot-width = <32>; |
385 | system-clock-frequency = <12288000>; |
386 | }; |
387 | tdmccodec: codec { |
388 | sound-dai = <&dummy_codec>; |
389 | }; |
390 | }; |
391 | |
392 | aml-audio-card,dai-link@3 { |
393 | mclk-fs = <64>; |
394 | /* suffix-name, sync with android audio hal used for */ |
395 | suffix-name = "alsaPORT-pdm"; |
396 | cpu { |
397 | sound-dai = <&pdm>; |
398 | }; |
399 | codec { |
400 | sound-dai = <&pdm_codec>; |
401 | }; |
402 | }; |
403 | |
404 | aml-audio-card,dai-link@4 { |
405 | mclk-fs = <128>; |
406 | continuous-clock; |
407 | /* suffix-name, sync with android audio hal used for */ |
408 | suffix-name = "alsaPORT-spdif"; |
409 | cpu { |
410 | sound-dai = <&spdifa>; |
411 | system-clock-frequency = <6144000>; |
412 | }; |
413 | codec { |
414 | sound-dai = <&dummy_codec>; |
415 | }; |
416 | }; |
417 | |
418 | aml-audio-card,dai-link@5 { |
419 | mclk-fs = <128>; |
420 | cpu { |
421 | sound-dai = <&spdifb>; |
422 | system-clock-frequency = <6144000>; |
423 | }; |
424 | codec { |
425 | sound-dai = <&dummy_codec>; |
426 | }; |
427 | }; |
428 | |
429 | aml-audio-card,dai-link@6 { |
430 | mclk-fs = <256>; |
431 | suffix-name = "alsaPORT-tv"; |
432 | cpu { |
433 | sound-dai = <&extn>; |
434 | system-clock-frequency = <12288000>; |
435 | }; |
436 | codec { |
437 | sound-dai = <&dummy_codec>; |
438 | }; |
439 | }; |
440 | |
441 | }; |
442 | /* Audio Related end */ |
443 | |
444 | dvb { |
445 | compatible = "amlogic, dvb"; |
446 | status = "okay"; |
447 | fe0_mode = "internal"; |
448 | fe0_tuner = <&tuner>; |
449 | |
450 | /*"parallel","serial","disable"*/ |
451 | ts2 = "parallel"; |
452 | ts2_control = <0>; |
453 | ts2_invert = <0>; |
454 | interrupts = <0 23 1 |
455 | 0 5 1 |
456 | 0 53 1 |
457 | 0 19 1 |
458 | 0 25 1 |
459 | 0 17 1>; |
460 | interrupt-names = "demux0_irq", |
461 | "demux1_irq", |
462 | "demux2_irq", |
463 | "dvr0_irq", |
464 | "dvr1_irq", |
465 | "dvr2_irq"; |
466 | clocks = <&clkc CLKID_DEMUX |
467 | &clkc CLKID_ASYNC_FIFO |
468 | &clkc CLKID_AHB_ARB0 |
469 | /* &clkc CLKID_DOS_PARSER>;*/ |
470 | &clkc CLKID_U_PARSER>; |
471 | clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop"; |
472 | }; |
473 | |
474 | tvafe_avin_detect { |
475 | compatible = "amlogic, tl1_tvafe_avin_detect"; |
476 | status = "okay"; |
477 | device_mask = <1>;/*bit0:ch1;bit1:ch2*/ |
478 | interrupts = <0 12 1>, |
479 | <0 13 1>; |
480 | }; |
481 | |
482 | amlvecm { |
483 | compatible = "amlogic, vecm-tl1"; |
484 | dev_name = "aml_vecm"; |
485 | status = "okay"; |
486 | gamma_en = <1>;/*1:enabel ;0:disable*/ |
487 | wb_en = <1>;/*1:enabel ;0:disable*/ |
488 | cm_en = <1>;/*1:enabel ;0:disable*/ |
489 | wb_sel = <1>;/*1:mtx ;0:gainoff*/ |
490 | vlock_en = <1>;/*1:enable;0:disable*/ |
491 | vlock_mode = <0x4>; |
492 | /* vlock work mode: |
493 | *bit0:auto ENC |
494 | *bit1:auto PLL |
495 | *bit2:manual PLL |
496 | *bit3:manual ENC |
497 | *bit4:manual soft ENC |
498 | *bit5:manual MIX PLL ENC |
499 | */ |
500 | vlock_pll_m_limit = <1>; |
501 | vlock_line_limit = <3>; |
502 | }; |
503 | |
504 | vdin@0 { |
505 | compatible = "amlogic, vdin"; |
506 | /*memory-region = <&vdin0_cma_reserved>;*/ |
507 | status = "okay"; |
508 | /*bit0:(1:share with codec_mm;0:cma alone) |
509 | *bit8:(1:alloc in discontinus way;0:alone in continuous way) |
510 | */ |
511 | flag_cma = <0x101>; |
512 | /*MByte, if 10bit disable: 64M(YUV422), |
513 | *if 10bit enable: 64*1.5 = 96M(YUV422) |
514 | *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M |
515 | *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M |
516 | *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M |
517 | *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M |
518 | */ |
519 | cma_size = <190>; |
520 | interrupts = <0 83 1>; |
521 | rdma-irq = <2>; |
522 | clocks = <&clkc CLKID_FCLK_DIV5>, |
523 | <&clkc CLKID_VDIN_MEAS_COMP>; |
524 | clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
525 | vdin_id = <0>; |
526 | /*vdin write mem color depth support: |
527 | * bit0:support 8bit |
528 | * bit1:support 9bit |
529 | * bit2:support 10bit |
530 | * bit3:support 12bit |
531 | * bit4:support yuv422 10bit full pack mode (from txl new add) |
532 | * bit8:use 8bit at 4k_50/60hz_10bit |
533 | * bit9:use 10bit at 4k_50/60hz_10bit |
534 | */ |
535 | tv_bit_mode = <0x215>; |
536 | /* afbce_bit_mode: (amlogic frame buff compression encoder) |
537 | * bit 0~3: |
538 | * 0 -- normal mode, not use afbce |
539 | * 1 -- use afbce non-mmu mode |
540 | * 2 -- use afbce mmu mode |
541 | * bit 4: |
542 | * 0 -- afbce compression-lossy disable |
543 | * 1 -- afbce compression-lossy enable |
544 | */ |
545 | afbce_bit_mode = <0x1>; |
546 | }; |
547 | |
548 | vdin@1 { |
549 | compatible = "amlogic, vdin"; |
550 | memory-region = <&vdin1_cma_reserved>; |
551 | status = "okay"; |
552 | /*bit0:(1:share with codec_mm;0:cma alone) |
553 | *bit8:(1:alloc in discontinus way;0:alone in continuous way) |
554 | */ |
555 | flag_cma = <0>; |
556 | interrupts = <0 85 1>; |
557 | rdma-irq = <4>; |
558 | clocks = <&clkc CLKID_FCLK_DIV5>, |
559 | <&clkc CLKID_VDIN_MEAS_COMP>; |
560 | clock-names = "fclk_div5", "cts_vdin_meas_clk"; |
561 | vdin_id = <1>; |
562 | /*vdin write mem color depth support: |
563 | *bit0:support 8bit |
564 | *bit1:support 9bit |
565 | *bit2:support 10bit |
566 | *bit3:support 12bit |
567 | */ |
568 | tv_bit_mode = <0x15>; |
569 | }; |
570 | |
571 | tvafe { |
572 | compatible = "amlogic, tvafe-tl1"; |
573 | /*memory-region = <&tvafe_cma_reserved>;*/ |
574 | status = "okay"; |
575 | flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/ |
576 | cma_size = <5>;/*MByte*/ |
577 | reg = <0xff654000 0x2000>;/*tvafe reg base*/ |
578 | reserve-iomap = "true"; |
579 | tvafe_id = <0>; |
580 | //pinctrl-names = "default"; |
581 | /*!!particular sequence, no more and no less!!!*/ |
582 | tvafe_pin_mux = < |
583 | 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */ |
584 | 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */ |
585 | 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */ |
586 | 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */ |
587 | >; |
588 | clocks = <&clkc CLKID_DAC_CLK>; |
589 | clock-names = "vdac_clk_gate"; |
590 | }; |
591 | |
592 | vbi { |
593 | compatible = "amlogic, vbi"; |
594 | status = "okay"; |
595 | interrupts = <0 83 1>; |
596 | }; |
597 | |
598 | cvbsout { |
599 | compatible = "amlogic, cvbsout-tl1"; |
600 | status = "disabled"; |
601 | clocks = <&clkc CLKID_VCLK2_ENCI |
602 | &clkc CLKID_VCLK2_VENCI0 |
603 | &clkc CLKID_VCLK2_VENCI1 |
604 | &clkc CLKID_DAC_CLK>; |
605 | clock-names = "venci_top_gate", |
606 | "venci_0_gate", |
607 | "venci_1_gate", |
608 | "vdac_clk_gate"; |
609 | /* clk path */ |
610 | /* 0:vid_pll vid2_clk */ |
611 | /* 1:gp0_pll vid2_clk */ |
612 | /* 2:vid_pll vid1_clk */ |
613 | /* 3:gp0_pll vid1_clk */ |
614 | clk_path = <0>; |
615 | |
616 | /* performance: reg_address, reg_value */ |
617 | /* tl1 */ |
618 | performance = <0x1bf0 0x9 |
619 | 0x1b56 0x333 |
620 | 0x1b12 0x8080 |
621 | 0x1b05 0xfd |
622 | 0x1c59 0xf850 |
623 | 0xffff 0x0>; /* ending flag */ |
624 | performance_sarft = <0x1bf0 0x9 |
625 | 0x1b56 0x333 |
626 | 0x1b12 0x0 |
627 | 0x1b05 0x9 |
628 | 0x1c59 0xfc48 |
629 | 0xffff 0x0>; /* ending flag */ |
630 | performance_revB_telecom = <0x1bf0 0x9 |
631 | 0x1b56 0x546 |
632 | 0x1b12 0x8080 |
633 | 0x1b05 0x9 |
634 | 0x1c59 0xf850 |
635 | 0xffff 0x0>; /* ending flag */ |
636 | }; |
637 | |
638 | /* for external keypad */ |
639 | adc_keypad { |
640 | compatible = "amlogic, adc_keypad"; |
641 | status = "okay"; |
642 | key_name = "power","up","down","enter","left","right","home"; |
643 | key_num = <7>; |
644 | io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>; |
645 | io-channel-names = "key-chan-2", "key-chan-3"; |
646 | key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2 |
647 | SARADC_CH2 SARADC_CH3 SARADC_CH3>; |
648 | key_code = <116 103 108 28 105 106 102>; |
649 | key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023 |
650 | key_tolerance = <40 40 40 40 40 40 40>; |
651 | }; |
652 | |
653 | unifykey { |
654 | compatible = "amlogic, unifykey"; |
655 | status = "okay"; |
656 | |
657 | unifykey-num = <21>; |
658 | unifykey-index-0 = <&keysn_0>; |
659 | unifykey-index-1 = <&keysn_1>; |
660 | unifykey-index-2 = <&keysn_2>; |
661 | unifykey-index-3 = <&keysn_3>; |
662 | unifykey-index-4 = <&keysn_4>; |
663 | unifykey-index-5 = <&keysn_5>; |
664 | unifykey-index-6 = <&keysn_6>; |
665 | unifykey-index-7 = <&keysn_7>; |
666 | unifykey-index-8 = <&keysn_8>; |
667 | unifykey-index-9 = <&keysn_9>; |
668 | unifykey-index-10= <&keysn_10>; |
669 | unifykey-index-11 = <&keysn_11>; |
670 | unifykey-index-12 = <&keysn_12>; |
671 | unifykey-index-13 = <&keysn_13>; |
672 | unifykey-index-14 = <&keysn_14>; |
673 | unifykey-index-15 = <&keysn_15>; |
674 | unifykey-index-16 = <&keysn_16>; |
675 | unifykey-index-17 = <&keysn_17>; |
676 | unifykey-index-18 = <&keysn_18>; |
677 | unifykey-index-19 = <&keysn_19>; |
678 | unifykey-index-20 = <&keysn_20>; |
679 | |
680 | keysn_0: key_0{ |
681 | key-name = "usid"; |
682 | key-device = "normal"; |
683 | key-permit = "read","write","del"; |
684 | }; |
685 | keysn_1:key_1{ |
686 | key-name = "mac"; |
687 | key-device = "normal"; |
688 | key-permit = "read","write","del"; |
689 | }; |
690 | keysn_2:key_2{ |
691 | key-name = "hdcp"; |
692 | key-device = "secure"; |
693 | key-type = "sha1"; |
694 | key-permit = "read","write","del"; |
695 | }; |
696 | keysn_3:key_3{ |
697 | key-name = "secure_boot_set"; |
698 | key-device = "efuse"; |
699 | key-permit = "write"; |
700 | }; |
701 | keysn_4:key_4{ |
702 | key-name = "mac_bt"; |
703 | key-device = "normal"; |
704 | key-permit = "read","write","del"; |
705 | key-type = "mac"; |
706 | }; |
707 | keysn_5:key_5{ |
708 | key-name = "mac_wifi"; |
709 | key-device = "normal"; |
710 | key-permit = "read","write","del"; |
711 | key-type = "mac"; |
712 | }; |
713 | keysn_6:key_6{ |
714 | key-name = "hdcp2_tx"; |
715 | key-device = "normal"; |
716 | key-permit = "read","write","del"; |
717 | }; |
718 | keysn_7:key_7{ |
719 | key-name = "hdcp2_rx"; |
720 | key-device = "normal"; |
721 | key-permit = "read","write","del"; |
722 | }; |
723 | keysn_8:key_8{ |
724 | key-name = "widevinekeybox"; |
725 | key-device = "secure"; |
726 | key-type = "sha1"; |
727 | key-permit = "read","write","del"; |
728 | }; |
729 | keysn_9:key_9{ |
730 | key-name = "deviceid"; |
731 | key-device = "normal"; |
732 | key-permit = "read","write","del"; |
733 | }; |
734 | keysn_10:key_10{ |
735 | key-name = "hdcp22_fw_private"; |
736 | key-device = "secure"; |
737 | key-permit = "read","write","del"; |
738 | }; |
739 | keysn_11:key_11{ |
740 | key-name = "hdcp22_rx_private"; |
741 | key-device = "secure"; |
742 | key-permit = "read","write","del"; |
743 | }; |
744 | keysn_12:key_12{ |
745 | key-name = "hdcp22_rx_fw"; |
746 | key-device = "normal"; |
747 | key-permit = "read","write","del"; |
748 | }; |
749 | keysn_13:key_13{ |
750 | key-name = "hdcp14_rx"; |
751 | key-device = "normal"; |
752 | key-type = "sha1"; |
753 | key-permit = "read","write","del"; |
754 | }; |
755 | keysn_14:key_14{ |
756 | key-name = "prpubkeybox";// PlayReady |
757 | key-device = "secure"; |
758 | key-permit = "read","write","del"; |
759 | }; |
760 | keysn_15:key_15{ |
761 | key-name = "prprivkeybox";// PlayReady |
762 | key-device = "secure"; |
763 | key-permit = "read","write","del"; |
764 | }; |
765 | keysn_16:key_16{ |
766 | key-name = "lcd"; |
767 | key-device = "normal"; |
768 | key-permit = "read","write","del"; |
769 | }; |
770 | keysn_17:key_17{ |
771 | key-name = "lcd_extern"; |
772 | key-device = "normal"; |
773 | key-permit = "read","write","del"; |
774 | }; |
775 | keysn_18:key_18{ |
776 | key-name = "backlight"; |
777 | key-device = "normal"; |
778 | key-permit = "read","write","del"; |
779 | }; |
780 | keysn_19:key_19{ |
781 | key-name = "lcd_tcon"; |
782 | key-device = "normal"; |
783 | key-permit = "read","write","del"; |
784 | }; |
785 | keysn_20:key_20{ |
786 | key-name = "attestationkeybox";// attestation key |
787 | key-device = "secure"; |
788 | key-permit = "read","write","del"; |
789 | }; |
790 | }; /* End unifykey */ |
791 | |
792 | amlvideo2_0 { |
793 | compatible = "amlogic, amlvideo2"; |
794 | dev_name = "amlvideo2"; |
795 | status = "okay"; |
796 | amlvideo2_id = <0>; |
797 | cma_mode = <1>; |
798 | }; |
799 | |
800 | amlvideo2_1 { |
801 | compatible = "amlogic, amlvideo2"; |
802 | dev_name = "amlvideo2"; |
803 | status = "okay"; |
804 | amlvideo2_id = <1>; |
805 | cma_mode = <1>; |
806 | }; |
807 | |
808 | hdmirx { |
809 | compatible = "amlogic, hdmirx_tl1"; |
810 | #address-cells=<1>; |
811 | #size-cells=<1>; |
812 | memory-region = <&hdmirx_emp_cma_reserved>; |
813 | status = "okay"; |
814 | pinctrl-names = "default"; |
815 | pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux |
816 | &hdmirx_c_mux>; |
817 | repeat = <0>; |
818 | interrupts = <0 41 1>; |
819 | clocks = <&clkc CLKID_HDMIRX_MODET_COMP>, |
820 | <&clkc CLKID_HDMIRX_CFG_COMP>, |
821 | <&clkc CLKID_HDMIRX_ACR_COMP>, |
822 | <&clkc CLKID_HDMIRX_METER_COMP>, |
823 | <&clkc CLKID_HDMIRX_AXI_COMP>, |
824 | <&xtal>, |
825 | <&clkc CLKID_FCLK_DIV5>, |
826 | <&clkc CLKID_FCLK_DIV7>, |
827 | <&clkc CLKID_HDCP22_SKP_COMP>, |
828 | <&clkc CLKID_HDCP22_ESM_COMP>; |
829 | // <&clkc CLK_AUD_PLL2FS>, |
830 | // <&clkc CLK_AUD_PLL4FS>, |
831 | // <&clkc CLK_AUD_OUT>; |
832 | clock-names = "hdmirx_modet_clk", |
833 | "hdmirx_cfg_clk", |
834 | "hdmirx_acr_ref_clk", |
835 | "cts_hdmirx_meter_clk", |
836 | "cts_hdmi_axi_clk", |
837 | "xtal", |
838 | "fclk_div5", |
839 | "fclk_div7", |
840 | "hdcp_rx22_skp", |
841 | "hdcp_rx22_esm"; |
842 | // "hdmirx_aud_pll2fs", |
843 | // "hdmirx_aud_pll4f", |
844 | // "clk_aud_out"; |
845 | hdmirx_id = <0>; |
846 | en_4k_2_2k = <0>; |
847 | hpd_low_cec_off = <1>; |
848 | /* bit4: enable feature, bit3~0: port number */ |
849 | disable_port = <0x0>; |
850 | /* MAP_ADDR_MODULE_CBUS */ |
851 | /* MAP_ADDR_MODULE_HIU */ |
852 | /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */ |
853 | /* MAP_ADDR_MODULE_SEC_AHB */ |
854 | /* MAP_ADDR_MODULE_SEC_AHB2 */ |
855 | /* MAP_ADDR_MODULE_APB4 */ |
856 | /* MAP_ADDR_MODULE_TOP */ |
857 | reg = < 0x0 0x0 |
858 | 0xff63C000 0x2000 |
859 | 0xffe0d000 0x2000 |
860 | 0x0 0x0 |
861 | 0x0 0x0 |
862 | 0x0 0x0 |
863 | 0xff610000 0xa000>; |
864 | }; |
865 | |
866 | aocec: aocec { |
867 | compatible = "amlogic, aocec-tl1"; |
868 | /*device_name = "aocec";*/ |
869 | status = "okay"; |
870 | vendor_name = "Amlogic"; /* Max Chars: 8 */ |
871 | /* Refer to the following URL at: |
872 | * http://standards.ieee.org/develop/regauth/oui/oui.txt |
873 | */ |
874 | vendor_id = <0x000000>; |
875 | product_desc = "TL1"; /* Max Chars: 16 */ |
876 | cec_osd_string = "AML_TV"; /* Max Chars: 14 */ |
877 | port_num = <3>; |
878 | ee_cec; |
879 | arc_port_mask = <0x2>; |
880 | interrupts = <0 205 1 |
881 | 0 199 1>; |
882 | interrupt-names = "hdmi_aocecb","hdmi_aocec"; |
883 | pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep"; |
884 | pinctrl-0=<&aoceca_mux>; |
885 | pinctrl-1=<&aocecb_mux>; |
886 | pinctrl-2=<&aoceca_mux>; |
887 | reg = <0xFF80023c 0x4 |
888 | 0xFF800000 0x400>; |
889 | reg-names = "ao_exit","ao"; |
890 | }; |
891 | |
892 | p_tsensor: p_tsensor@ff634800 { |
893 | compatible = "amlogic, r1p1-tsensor"; |
894 | status = "okay"; |
895 | reg = <0xff634800 0x50>, |
896 | <0xff800268 0x4>; |
897 | cal_type = <0x1>; |
898 | cal_a = <324>; |
899 | cal_b = <424>; |
900 | cal_c = <3159>; |
901 | cal_d = <9411>; |
902 | rtemp = <115000>; |
903 | interrupts = <0 35 0>; |
904 | clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ |
905 | clock-names = "ts_comp"; |
906 | #thermal-sensor-cells = <1>; |
907 | }; |
908 | |
909 | d_tsensor: d_tsensor@ff634c00 { |
910 | compatible = "amlogic, r1p1-tsensor"; |
911 | status = "okay"; |
912 | reg = <0xff634c00 0x50>, |
913 | <0xff800230 0x4>; |
914 | cal_type = <0x1>; |
915 | cal_a = <324>; |
916 | cal_b = <424>; |
917 | cal_c = <3159>; |
918 | cal_d = <9411>; |
919 | rtemp = <115000>; |
920 | interrupts = <0 36 0>; |
921 | clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ |
922 | clock-names = "ts_comp"; |
923 | #thermal-sensor-cells = <1>; |
924 | }; |
925 | |
926 | s_tsensor: s_tsensor@ff635000 { |
927 | compatible = "amlogic, r1p1-tsensor"; |
928 | status = "okay"; |
929 | reg = <0xff635000 0x50>, |
930 | <0xff80026c 0x4>; |
931 | cal_type = <0x1>; |
932 | cal_a = <324>; |
933 | cal_b = <424>; |
934 | cal_c = <3159>; |
935 | cal_d = <9411>; |
936 | rtemp = <115000>; |
937 | interrupts = <0 38 0>; |
938 | clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ |
939 | clock-names = "ts_comp"; |
940 | #thermal-sensor-cells = <1>; |
941 | }; |
942 | |
943 | meson_cooldev: meson-cooldev@0 { |
944 | status = "okay"; |
945 | compatible = "amlogic, meson-cooldev"; |
946 | cooling_devices { |
947 | cpufreq_cool_cluster0 { |
948 | min_state = <1000000>; |
949 | dyn_coeff = <140>; |
950 | gpu_pp = <2>; |
951 | cluster_id = <0>; |
952 | node_name = "cpufreq_cool0"; |
953 | device_type = "cpufreq"; |
954 | }; |
955 | cpucore_cool_cluster0 { |
956 | min_state = <1>; |
957 | dyn_coeff = <0>; |
958 | gpu_pp = <2>; |
959 | cluster_id = <0>; |
960 | node_name = "cpucore_cool0"; |
961 | device_type = "cpucore"; |
962 | }; |
963 | gpufreq_cool { |
964 | min_state = <400>; |
965 | dyn_coeff = <140>; |
966 | gpu_pp = <2>; |
967 | cluster_id = <0>; |
968 | node_name = "gpufreq_cool0"; |
969 | device_type = "gpufreq"; |
970 | }; |
971 | gpucore_cool { |
972 | min_state = <1>; |
973 | dyn_coeff = <0>; |
974 | gpu_pp = <2>; |
975 | cluster_id = <0>; |
976 | node_name = "gpucore_cool0"; |
977 | device_type = "gpucore"; |
978 | }; |
979 | }; |
980 | cpufreq_cool0:cpufreq_cool0 { |
981 | #cooling-cells = <2>; /* min followed by max */ |
982 | }; |
983 | cpucore_cool0:cpucore_cool0 { |
984 | #cooling-cells = <2>; /* min followed by max */ |
985 | }; |
986 | gpufreq_cool0:gpufreq_cool0 { |
987 | #cooling-cells = <2>; /* min followed by max */ |
988 | }; |
989 | gpucore_cool0:gpucore_cool0 { |
990 | #cooling-cells = <2>; /* min followed by max */ |
991 | }; |
992 | };/*meson cooling devices end*/ |
993 | |
994 | thermal-zones { |
995 | pll_thermal: pll_thermal { |
996 | polling-delay = <1000>; |
997 | polling-delay-passive = <100>; |
998 | sustainable-power = <1322>; |
999 | thermal-sensors = <&p_tsensor 0>; |
1000 | trips { |
1001 | pswitch_on: trip-point@0 { |
1002 | temperature = <60000>; |
1003 | hysteresis = <5000>; |
1004 | type = "passive"; |
1005 | }; |
1006 | pcontrol: trip-point@1 { |
1007 | temperature = <75000>; |
1008 | hysteresis = <5000>; |
1009 | type = "passive"; |
1010 | }; |
1011 | phot: trip-point@2 { |
1012 | temperature = <85000>; |
1013 | hysteresis = <5000>; |
1014 | type = "hot"; |
1015 | }; |
1016 | pcritical: trip-point@3 { |
1017 | temperature = <110000>; |
1018 | hysteresis = <1000>; |
1019 | type = "critical"; |
1020 | }; |
1021 | }; |
1022 | cooling-maps { |
1023 | cpufreq_cooling_map { |
1024 | trip = <&pcontrol>; |
1025 | cooling-device = <&cpufreq_cool0 0 11>; |
1026 | contribution = <1024>; |
1027 | }; |
1028 | cpucore_cooling_map { |
1029 | trip = <&pcontrol>; |
1030 | cooling-device = <&cpucore_cool0 0 4>; |
1031 | contribution = <1024>; |
1032 | }; |
1033 | gpufreq_cooling_map { |
1034 | trip = <&pcontrol>; |
1035 | cooling-device = <&gpufreq_cool0 0 4>; |
1036 | contribution = <1024>; |
1037 | }; |
1038 | }; |
1039 | }; |
1040 | ddr_thermal: ddr_thermal { |
1041 | polling-delay = <2000>; |
1042 | polling-delay-passive = <1000>; |
1043 | sustainable-power = <1322>; |
1044 | thermal-sensors = <&d_tsensor 1>; |
1045 | trips { |
1046 | dswitch_on: trip-point@0 { |
1047 | temperature = <60000>; |
1048 | hysteresis = <5000>; |
1049 | type = "passive"; |
1050 | }; |
1051 | dcontrol: trip-point@1 { |
1052 | temperature = <75000>; |
1053 | hysteresis = <5000>; |
1054 | type = "passive"; |
1055 | }; |
1056 | dhot: trip-point@2 { |
1057 | temperature = <85000>; |
1058 | hysteresis = <5000>; |
1059 | type = "hot"; |
1060 | }; |
1061 | dcritical: trip-point@3 { |
1062 | temperature = <110000>; |
1063 | hysteresis = <1000>; |
1064 | type = "critical"; |
1065 | }; |
1066 | }; |
1067 | }; |
1068 | sar_thermal: sar_thermal { |
1069 | polling-delay = <2000>; |
1070 | polling-delay-passive = <1000>; |
1071 | sustainable-power = <1322>; |
1072 | thermal-sensors = <&s_tsensor 2>; |
1073 | trips { |
1074 | sswitch_on: trip-point@0 { |
1075 | temperature = <60000>; |
1076 | hysteresis = <5000>; |
1077 | type = "passive"; |
1078 | }; |
1079 | scontrol: trip-point@1 { |
1080 | temperature = <75000>; |
1081 | hysteresis = <5000>; |
1082 | type = "passive"; |
1083 | }; |
1084 | shot: trip-point@2 { |
1085 | temperature = <85000>; |
1086 | hysteresis = <5000>; |
1087 | type = "hot"; |
1088 | }; |
1089 | scritical: trip-point@3 { |
1090 | temperature = <110000>; |
1091 | hysteresis = <1000>; |
1092 | type = "critical"; |
1093 | }; |
1094 | }; |
1095 | }; |
1096 | }; /*thermal zone end*/ |
1097 | |
1098 | /*DCDC for MP8756GD*/ |
1099 | cpu_opp_table0: cpu_opp_table0 { |
1100 | compatible = "operating-points-v2"; |
1101 | opp-shared; |
1102 | |
1103 | opp00 { |
1104 | opp-hz = /bits/ 64 <100000000>; |
1105 | opp-microvolt = <699000>; |
1106 | }; |
1107 | opp01 { |
1108 | opp-hz = /bits/ 64 <250000000>; |
1109 | opp-microvolt = <699000>; |
1110 | }; |
1111 | opp02 { |
1112 | opp-hz = /bits/ 64 <500000000>; |
1113 | opp-microvolt = <709000>; |
1114 | }; |
1115 | opp03 { |
1116 | opp-hz = /bits/ 64 <667000000>; |
1117 | opp-microvolt = <719000>; |
1118 | }; |
1119 | opp04 { |
1120 | opp-hz = /bits/ 64 <1000000000>; |
1121 | opp-microvolt = <729000>; |
1122 | }; |
1123 | opp05 { |
1124 | opp-hz = /bits/ 64 <1200000000>; |
1125 | opp-microvolt = <749000>; |
1126 | }; |
1127 | opp06 { |
1128 | opp-hz = /bits/ 64 <1404000000>; |
1129 | opp-microvolt = <769000>; |
1130 | }; |
1131 | opp07 { |
1132 | opp-hz = /bits/ 64 <1500000000>; |
1133 | opp-microvolt = <779000>; |
1134 | }; |
1135 | opp08 { |
1136 | opp-hz = /bits/ 64 <1608000000>; |
1137 | opp-microvolt = <789000>; |
1138 | }; |
1139 | opp09 { |
1140 | opp-hz = /bits/ 64 <1704000000>; |
1141 | opp-microvolt = <829000>; |
1142 | }; |
1143 | opp10 { |
1144 | opp-hz = /bits/ 64 <1800000000>; |
1145 | opp-microvolt = <879000>; |
1146 | }; |
1147 | opp11 { |
1148 | opp-hz = /bits/ 64 <1908000000>; |
1149 | opp-microvolt = <929000>; |
1150 | }; |
1151 | }; |
1152 | |
1153 | cpufreq-meson { |
1154 | compatible = "amlogic, cpufreq-meson"; |
1155 | pinctrl-names = "default"; |
1156 | pinctrl-0 = <&pwm_ao_d_pins3>; |
1157 | status = "okay"; |
1158 | }; |
1159 | |
1160 | tuner: tuner { |
1161 | compatible = "amlogic, tuner"; |
1162 | status = "okay"; |
1163 | tuner_name = "mxl661_tuner"; |
1164 | tuner_i2c_adap = <&i2c0>; |
1165 | tuner_i2c_addr = <0x60>; |
1166 | tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */ |
1167 | tuner_xtal_mode = <3>; |
1168 | /* NO_SHARE_XTAL(0) |
1169 | * SLAVE_XTAL_SHARE(3) |
1170 | */ |
1171 | tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */ |
1172 | }; |
1173 | |
1174 | atv-demod { |
1175 | compatible = "amlogic, atv-demod"; |
1176 | status = "okay"; |
1177 | tuner = <&tuner>; |
1178 | btsc_sap_mode = <1>; |
1179 | /* pinctrl-names="atvdemod_agc_pins"; */ |
1180 | /* pinctrl-0=<&atvdemod_agc_pins>; */ |
1181 | reg = <0xff656000 0x2000 /* demod reg */ |
1182 | 0xff63c000 0x2000 /* hiu reg */ |
1183 | 0xff634000 0x2000 /* periphs reg */ |
1184 | 0xff64a000 0x2000>; /* audio reg */ |
1185 | reg_23cf = <0x88188832>; |
1186 | /*default:0x88188832;r840 on haier:0x48188832*/ |
1187 | }; |
1188 | |
1189 | bt-dev{ |
1190 | compatible = "amlogic, bt-dev"; |
1191 | status = "okay"; |
1192 | gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>; |
1193 | }; |
1194 | |
1195 | wifi{ |
1196 | compatible = "amlogic, aml_wifi"; |
1197 | status = "okay"; |
1198 | interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>; |
1199 | irq_trigger_type = "GPIO_IRQ_LOW"; |
1200 | dhd_static_buf; //dhd_static_buf support |
1201 | power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>; |
1202 | pinctrl-names = "default"; |
1203 | pinctrl-0 = <&pwm_b_pins1>; |
1204 | pwm_config = <&wifi_pwm_conf>; |
1205 | }; |
1206 | |
1207 | wifi_pwm_conf:wifi_pwm_conf{ |
1208 | pwm_channel1_conf { |
1209 | pwms = <&pwm_ab MESON_PWM_1 30541 0>; |
1210 | duty-cycle = <15270>; |
1211 | times = <8>; |
1212 | }; |
1213 | pwm_channel2_conf { |
1214 | pwms = <&pwm_ab MESON_PWM_3 30500 0>; |
1215 | duty-cycle = <15250>; |
1216 | times = <12>; |
1217 | }; |
1218 | }; |
1219 | |
1220 | sd_emmc_b: sdio@ffe05000 { |
1221 | status = "okay"; |
1222 | compatible = "amlogic, meson-mmc-tl1"; |
1223 | reg = <0xffe05000 0x800>; |
1224 | interrupts = <0 190 4>; |
1225 | |
1226 | pinctrl-names = "sdio_all_pins", |
1227 | "sdio_clk_cmd_pins"; |
1228 | pinctrl-0 = <&sdio_all_pins>; |
1229 | pinctrl-1 = <&sdio_clk_cmd_pins>; |
1230 | |
1231 | clocks = <&clkc CLKID_SD_EMMC_B>, |
1232 | <&clkc CLKID_SD_EMMC_B_P0_COMP>, |
1233 | <&clkc CLKID_FCLK_DIV2>, |
1234 | <&clkc CLKID_FCLK_DIV5>, |
1235 | <&xtal>; |
1236 | clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal"; |
1237 | |
1238 | bus-width = <4>; |
1239 | cap-sd-highspeed; |
1240 | cap-mmc-highspeed; |
1241 | max-frequency = <100000000>; |
1242 | disable-wp; |
1243 | sdio { |
1244 | pinname = "sdio"; |
1245 | ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ |
1246 | caps = "MMC_CAP_4_BIT_DATA", |
1247 | "MMC_CAP_MMC_HIGHSPEED", |
1248 | "MMC_CAP_SD_HIGHSPEED", |
1249 | "MMC_CAP_NONREMOVABLE", /**ptm debug */ |
1250 | "MMC_CAP_UHS_SDR12", |
1251 | "MMC_CAP_UHS_SDR25", |
1252 | "MMC_CAP_UHS_SDR50", |
1253 | "MMC_CAP_UHS_SDR104", |
1254 | "MMC_PM_KEEP_POWER", |
1255 | "MMC_CAP_SDIO_IRQ"; |
1256 | f_min = <400000>; |
1257 | f_max = <200000000>; |
1258 | max_req_size = <0x20000>; /**128KB*/ |
1259 | card_type = <3>; |
1260 | /* 3:sdio device(ie:sdio-wifi), |
1261 | * 4:SD combo (IO+mem) card |
1262 | */ |
1263 | }; |
1264 | }; |
1265 | |
1266 | /* sd_emmc_b: sd@ffe05000 { |
1267 | * status = "okay"; |
1268 | * compatible = "amlogic, meson-mmc-tl1"; |
1269 | * reg = <0xffe05000 0x800>; |
1270 | * interrupts = <0 190 1>; |
1271 | * |
1272 | * pinctrl-names = "sd_all_pins", |
1273 | * "sd_clk_cmd_pins", |
1274 | * "sd_1bit_pins"; |
1275 | * pinctrl-0 = <&sd_all_pins>; |
1276 | * pinctrl-1 = <&sd_clk_cmd_pins>; |
1277 | * pinctrl-2 = <&sd_1bit_pins>; |
1278 | * |
1279 | * clocks = <&clkc CLKID_SD_EMMC_B>, |
1280 | * <&clkc CLKID_SD_EMMC_B_P0_COMP>, |
1281 | * <&clkc CLKID_FCLK_DIV2>, |
1282 | * <&clkc CLKID_FCLK_DIV5>, |
1283 | * <&xtal>; |
1284 | * clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal"; |
1285 | * |
1286 | * bus-width = <4>; |
1287 | * cap-sd-highspeed; |
1288 | * cap-mmc-highspeed; |
1289 | * max-frequency = <100000000>; |
1290 | * disable-wp; |
1291 | * sd { |
1292 | * pinname = "sd"; |
1293 | * ocr_avail = <0x200080>; |
1294 | * caps = "MMC_CAP_4_BIT_DATA", |
1295 | * "MMC_CAP_MMC_HIGHSPEED", |
1296 | * "MMC_CAP_SD_HIGHSPEED"; |
1297 | * f_min = <400000>; |
1298 | * f_max = <200000000>; |
1299 | * max_req_size = <0x20000>; |
1300 | * no_sduart = <1>; |
1301 | * gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>; |
1302 | * jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>; |
1303 | * gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>; |
1304 | * card_type = <5>; |
1305 | * }; |
1306 | * }; |
1307 | */ |
1308 | |
1309 | }; /* end of / */ |
1310 | |
1311 | &i2c0 { |
1312 | status = "okay"; |
1313 | clock-frequency = <300000>; |
1314 | pinctrl-names="default"; |
1315 | pinctrl-0=<&i2c0_dv_pins>; |
1316 | }; |
1317 | |
1318 | &audiobus { |
1319 | tdma:tdm@0 { |
1320 | compatible = "amlogic, tl1-snd-tdma"; |
1321 | #sound-dai-cells = <0>; |
1322 | |
1323 | dai-tdm-lane-slot-mask-in = <1 0>; |
1324 | dai-tdm-lane-slot-mask-out = <1 1 1 1>; |
1325 | dai-tdm-clk-sel = <0>; |
1326 | |
1327 | clocks = <&clkaudio CLKID_AUDIO_MCLK_A |
1328 | &clkc CLKID_MPLL0 |
1329 | &clkc CLKID_MPLL1 |
1330 | &clkaudio CLKID_AUDIO_SPDIFOUT_A>; |
1331 | clock-names = "mclk", "clk_srcpll", |
1332 | "samesource_srcpll", "samesource_clk"; |
1333 | |
1334 | pinctrl-names = "tdm_pins"; |
1335 | pinctrl-0 = <&tdma_mclk &tdmout_a>; |
1336 | |
1337 | /* |
1338 | * 0: tdmout_a; |
1339 | * 1: tdmout_b; |
1340 | * 2: tdmout_c; |
1341 | * 3: spdifout; |
1342 | * 4: spdifout_b; |
1343 | */ |
1344 | samesource_sel = <3>; |
1345 | |
1346 | /* In for ACODEC_ADC */ |
1347 | acodec_adc = <1>; |
1348 | |
1349 | status = "okay"; |
1350 | }; |
1351 | |
1352 | tdmb:tdm@1 { |
1353 | compatible = "amlogic, tl1-snd-tdmb"; |
1354 | #sound-dai-cells = <0>; |
1355 | |
1356 | dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
1357 | dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
1358 | dai-tdm-clk-sel = <1>; |
1359 | |
1360 | clocks = <&clkaudio CLKID_AUDIO_MCLK_B |
1361 | &clkc CLKID_MPLL1>; |
1362 | clock-names = "mclk", "clk_srcpll"; |
1363 | |
1364 | status = "okay"; |
1365 | }; |
1366 | |
1367 | tdmc:tdm@2 { |
1368 | compatible = "amlogic, tl1-snd-tdmc"; |
1369 | #sound-dai-cells = <0>; |
1370 | |
1371 | dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
1372 | dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
1373 | dai-tdm-clk-sel = <2>; |
1374 | |
1375 | clocks = <&clkaudio CLKID_AUDIO_MCLK_C |
1376 | &clkc CLKID_MPLL2>; |
1377 | clock-names = "mclk", "clk_srcpll"; |
1378 | |
1379 | pinctrl-names = "tdm_pins"; |
1380 | pinctrl-0 = <&tdmout_c &tdmin_c>; |
1381 | |
1382 | status = "okay"; |
1383 | }; |
1384 | |
1385 | spdifa:spdif@0 { |
1386 | compatible = "amlogic, tl1-snd-spdif-a"; |
1387 | #sound-dai-cells = <0>; |
1388 | |
1389 | clocks = <&clkc CLKID_MPLL1 |
1390 | &clkc CLKID_FCLK_DIV4 |
1391 | &clkaudio CLKID_AUDIO_GATE_SPDIFIN |
1392 | &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A |
1393 | &clkaudio CLKID_AUDIO_SPDIFIN |
1394 | &clkaudio CLKID_AUDIO_SPDIFOUT_A>; |
1395 | clock-names = "sysclk", "fixed_clk", "gate_spdifin", |
1396 | "gate_spdifout", "clk_spdifin", "clk_spdifout"; |
1397 | |
1398 | interrupts = |
1399 | <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; |
1400 | interrupt-names = "irq_spdifin"; |
1401 | |
1402 | pinctrl-names = "spdif_pins"; |
1403 | pinctrl-0 = <&spdifout_a>; |
1404 | |
1405 | /* |
1406 | * whether do asrc for pcm and resample a or b |
1407 | * if raw data, asrc is disabled automatically |
1408 | * 0: "Disable", |
1409 | * 1: "Enable:32K", |
1410 | * 2: "Enable:44K", |
1411 | * 3: "Enable:48K", |
1412 | * 4: "Enable:88K", |
1413 | * 5: "Enable:96K", |
1414 | * 6: "Enable:176K", |
1415 | * 7: "Enable:192K", |
1416 | */ |
1417 | asrc_id = <0>; |
1418 | auto_asrc = <3>; |
1419 | |
1420 | status = "okay"; |
1421 | }; |
1422 | |
1423 | spdifb:spdif@1 { |
1424 | compatible = "amlogic, tl1-snd-spdif-b"; |
1425 | #sound-dai-cells = <0>; |
1426 | |
1427 | clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/ |
1428 | &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B |
1429 | &clkaudio CLKID_AUDIO_SPDIFOUT_B>; |
1430 | clock-names = "sysclk", |
1431 | "gate_spdifout", "clk_spdifout"; |
1432 | |
1433 | status = "okay"; |
1434 | }; |
1435 | |
1436 | pdm:pdm { |
1437 | compatible = "amlogic, tl1-snd-pdm"; |
1438 | #sound-dai-cells = <0>; |
1439 | |
1440 | clocks = <&clkaudio CLKID_AUDIO_GATE_PDM |
1441 | &clkc CLKID_FCLK_DIV3 |
1442 | &clkc CLKID_MPLL3 |
1443 | &clkaudio CLKID_AUDIO_PDMIN0 |
1444 | &clkaudio CLKID_AUDIO_PDMIN1>; |
1445 | clock-names = "gate", |
1446 | "sysclk_srcpll", |
1447 | "dclk_srcpll", |
1448 | "pdm_dclk", |
1449 | "pdm_sysclk"; |
1450 | |
1451 | pinctrl-names = "pdm_pins"; |
1452 | pinctrl-0 = <&pdmin>; |
1453 | |
1454 | /* mode 0~4, defalut:1 */ |
1455 | filter_mode = <1>; |
1456 | |
1457 | status = "okay"; |
1458 | }; |
1459 | |
1460 | extn:extn { |
1461 | compatible = "amlogic, snd-extn"; |
1462 | #sound-dai-cells = <0>; |
1463 | |
1464 | interrupts = |
1465 | <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; |
1466 | interrupt-names = "irq_frhdmirx"; |
1467 | |
1468 | status = "okay"; |
1469 | }; |
1470 | |
1471 | aed:effect { |
1472 | compatible = "amlogic, snd-effect-v2"; |
1473 | #sound-dai-cells = <0>; |
1474 | |
1475 | clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC |
1476 | &clkc CLKID_FCLK_DIV5 |
1477 | &clkaudio CLKID_AUDIO_EQDRC>; |
1478 | clock-names = "gate", "srcpll", "eqdrc"; |
1479 | |
1480 | /* |
1481 | * 0:tdmout_a |
1482 | * 1:tdmout_b |
1483 | * 2:tdmout_c |
1484 | * 3:spdifout |
1485 | * 4:spdifout_b |
1486 | */ |
1487 | eqdrc_module = <0>; |
1488 | /* max 0xf, each bit for one lane, usually one lane */ |
1489 | lane_mask = <0x1>; |
1490 | /* max 0xff, each bit for one channel */ |
1491 | channel_mask = <0xff>; |
1492 | |
1493 | status = "okay"; |
1494 | }; |
1495 | |
1496 | asrca: resample@0 { |
1497 | compatible = "amlogic, tl1-resample-a"; |
1498 | clocks = <&clkc CLKID_MPLL0 |
1499 | &clkaudio CLKID_AUDIO_MCLK_A |
1500 | &clkaudio CLKID_AUDIO_RESAMPLE_A>; |
1501 | clock-names = "resample_pll", "resample_src", "resample_clk"; |
1502 | /*same with toddr_src |
1503 | * TDMIN_A, 0 |
1504 | * TDMIN_B, 1 |
1505 | * TDMIN_C, 2 |
1506 | * SPDIFIN, 3 |
1507 | * PDMIN, 4 |
1508 | * NONE, |
1509 | * TDMIN_LB, 6 |
1510 | * LOOPBACK, 7 |
1511 | */ |
1512 | resample_module = <3>; |
1513 | |
1514 | status = "okay"; |
1515 | }; |
1516 | |
1517 | asrcb: resample@1 { |
1518 | compatible = "amlogic, tl1-resample-b"; |
1519 | |
1520 | clocks = <&clkc CLKID_MPLL3 |
1521 | &clkaudio CLKID_AUDIO_MCLK_F |
1522 | &clkaudio CLKID_AUDIO_RESAMPLE_B>; |
1523 | clock-names = "resample_pll", "resample_src", "resample_clk"; |
1524 | |
1525 | /*same with toddr_src |
1526 | * TDMIN_A, 0 |
1527 | * TDMIN_B, 1 |
1528 | * TDMIN_C, 2 |
1529 | * SPDIFIN, 3 |
1530 | * PDMIN, 4 |
1531 | * NONE, |
1532 | * TDMIN_LB, 6 |
1533 | * LOOPBACK, 7 |
1534 | */ |
1535 | resample_module = <3>; |
1536 | |
1537 | status = "disabled"; |
1538 | }; |
1539 | |
1540 | vad:vad { |
1541 | compatible = "amlogic, snd-vad"; |
1542 | #sound-dai-cells = <0>; |
1543 | |
1544 | clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD |
1545 | &clkc CLKID_FCLK_DIV5 |
1546 | &clkaudio CLKID_AUDIO_VAD>; |
1547 | clock-names = "gate", "pll", "clk"; |
1548 | |
1549 | interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING |
1550 | GIC_SPI 47 IRQ_TYPE_EDGE_RISING>; |
1551 | interrupt-names = "irq_wakeup", "irq_frame_sync"; |
1552 | |
1553 | /* |
1554 | * Data src sel: |
1555 | * 0: tdmin_a; |
1556 | * 1: tdmin_b; |
1557 | * 2: tdmin_c; |
1558 | * 3: spdifin; |
1559 | * 4: pdmin; |
1560 | * 5: loopback_b; |
1561 | * 6: tdmin_lb; |
1562 | * 7: loopback_a; |
1563 | */ |
1564 | src = <4>; |
1565 | |
1566 | /* |
1567 | * deal with hot word in user space or kernel space |
1568 | * 0: in user space |
1569 | * 1: in kernel space |
1570 | */ |
1571 | level = <0>; |
1572 | |
1573 | status = "disabled"; |
1574 | }; |
1575 | }; /* end of audiobus */ |
1576 | |
1577 | &pinctrl_periphs { |
1578 | /* audio pin mux */ |
1579 | |
1580 | tdma_mclk: tdma_mclk { |
1581 | mux { /* GPIOZ_0 */ |
1582 | groups = "mclk0_z"; |
1583 | function = "mclk0"; |
1584 | }; |
1585 | }; |
1586 | |
1587 | tdmout_a: tdmout_a { |
1588 | mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */ |
1589 | groups = "tdma_sclk_z", |
1590 | "tdma_fs_z", |
1591 | "tdma_dout0_z"; |
1592 | function = "tdma_out"; |
1593 | }; |
1594 | }; |
1595 | |
1596 | tdmin_a: tdmin_a { |
1597 | mux { /* GPIOZ_9 */ |
1598 | groups = "tdma_din2_z"; |
1599 | function = "tdma_in"; |
1600 | }; |
1601 | }; |
1602 | |
1603 | tdmout_c: tdmout_c { |
1604 | mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */ |
1605 | groups = "tdmc_sclk", |
1606 | "tdmc_fs", |
1607 | "tdmc_dout0"; |
1608 | function = "tdmc_out"; |
1609 | }; |
1610 | }; |
1611 | |
1612 | tdmin_c: tdmin_c { |
1613 | mux { /* GPIODV_10 */ |
1614 | groups = "tdmc_din1"; |
1615 | function = "tdmc_in"; |
1616 | }; |
1617 | }; |
1618 | |
1619 | spdifin_a: spdifin_a { |
1620 | mux { /* GPIODV_5 */ |
1621 | groups = "spdif_in"; |
1622 | function = "spdif_in"; |
1623 | }; |
1624 | }; |
1625 | |
1626 | spdifout_a: spdifout_a { |
1627 | mux { /* GPIODV_4 */ |
1628 | groups = "spdif_out_dv4"; |
1629 | function = "spdif_out"; |
1630 | }; |
1631 | }; |
1632 | |
1633 | pdmin: pdmin { |
1634 | mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */ |
1635 | groups = "pdm_dclk_z", |
1636 | "pdm_din0_z", |
1637 | "pdm_din2_z4"; |
1638 | function = "pdm"; |
1639 | }; |
1640 | }; |
1641 | |
1642 | /*backlight*/ |
1643 | bl_pwm_vs_on_pins:bl_pwm_vs_on_pin { |
1644 | mux { |
1645 | groups = "pwm_vs_z5"; |
1646 | function = "pwm_vs"; |
1647 | }; |
1648 | }; |
1649 | bl_pwm_off_pins:bl_pwm_off_pin { |
1650 | mux { |
1651 | groups = "GPIOZ_5"; |
1652 | function = "gpio_periphs"; |
1653 | output-low; |
1654 | }; |
1655 | }; |
1656 | bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin { |
1657 | mux { |
1658 | groups = "pwm_vs_z5"; |
1659 | function = "pwm_vs"; |
1660 | }; |
1661 | }; |
1662 | bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin { |
1663 | mux { |
1664 | groups = "pwm_vs_z6"; |
1665 | function = "pwm_vs"; |
1666 | }; |
1667 | }; |
1668 | bl_pwm_combo_off_pins:bl_pwm_combo_off_pin { |
1669 | mux { |
1670 | groups = "GPIOZ_5", |
1671 | "GPIOZ_6"; |
1672 | function = "gpio_periphs"; |
1673 | output-low; |
1674 | }; |
1675 | }; |
1676 | |
1677 | }; /* end of pinctrl_periphs */ |
1678 | |
1679 | &audio_data{ |
1680 | status = "okay"; |
1681 | }; |
1682 | |
1683 | &i2c2 { |
1684 | status = "okay"; |
1685 | pinctrl-names="default"; |
1686 | pinctrl-0=<&i2c2_z_pins>; |
1687 | clock-frequency = <400000>; |
1688 | |
1689 | tas5805: tas5805@36 { |
1690 | compatible = "ti,tas5805"; |
1691 | #sound-dai-cells = <0>; |
1692 | codec_name = "tas5805"; |
1693 | reg = <0x2d>; |
1694 | status = "disable"; |
1695 | }; |
1696 | |
1697 | ad82584f: ad82584f@62 { |
1698 | compatible = "ESMT, ad82584f"; |
1699 | #sound-dai-cells = <0>; |
1700 | reg = <0x31>; |
1701 | status = "okay"; |
1702 | reset_pin = <&gpio_ao GPIOAO_6 0>; |
1703 | }; |
1704 | |
1705 | }; |
1706 | |
1707 | &sd_emmc_c { |
1708 | status = "okay"; |
1709 | emmc { |
1710 | caps = "MMC_CAP_8_BIT_DATA", |
1711 | "MMC_CAP_MMC_HIGHSPEED", |
1712 | "MMC_CAP_SD_HIGHSPEED", |
1713 | "MMC_CAP_NONREMOVABLE", |
1714 | "MMC_CAP_1_8V_DDR", |
1715 | "MMC_CAP_HW_RESET", |
1716 | "MMC_CAP_ERASE", |
1717 | "MMC_CAP_CMD23"; |
1718 | caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400"; |
1719 | f_min = <400000>; |
1720 | f_max = <198000000>; |
1721 | }; |
1722 | }; |
1723 | |
1724 | |
1725 | |
1726 | &spifc { |
1727 | status = "disabled"; |
1728 | spi-nor@0 { |
1729 | cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>; |
1730 | }; |
1731 | }; |
1732 | |
1733 | &slc_nand { |
1734 | status = "disabled"; |
1735 | plat-names = "bootloader", "nandnormal"; |
1736 | plat-num = <2>; |
1737 | plat-part-0 = <&bootloader>; |
1738 | plat-part-1 = <&nandnormal>; |
1739 | bootloader: bootloader{ |
1740 | enable_pad = "ce0"; |
1741 | busy_pad = "rb0"; |
1742 | timming_mode = "mode5"; |
1743 | bch_mode = "bch8_1k"; |
1744 | t_rea = <20>; |
1745 | t_rhoh = <15>; |
1746 | chip_num = <1>; |
1747 | part_num = <0>; |
1748 | rb_detect = <1>; |
1749 | }; |
1750 | nandnormal: nandnormal{ |
1751 | enable_pad = "ce0"; |
1752 | busy_pad = "rb0"; |
1753 | timming_mode = "mode5"; |
1754 | bch_mode = "bch8_1k"; |
1755 | plane_mode = "twoplane"; |
1756 | t_rea = <20>; |
1757 | t_rhoh = <15>; |
1758 | chip_num = <2>; |
1759 | part_num = <3>; |
1760 | partition = <&nand_partitions>; |
1761 | rb_detect = <1>; |
1762 | }; |
1763 | nand_partitions:nand_partition{ |
1764 | /* |
1765 | * if bl_mode is 1, tpl size was generate by |
1766 | * fip_copies * fip_size which |
1767 | * will not skip bad when calculating |
1768 | * the partition size; |
1769 | * |
1770 | * if bl_mode is 0, |
1771 | * tpl partition must be comment out. |
1772 | */ |
1773 | tpl{ |
1774 | offset=<0x0 0x0>; |
1775 | size=<0x0 0x0>; |
1776 | }; |
1777 | logo{ |
1778 | offset=<0x0 0x0>; |
1779 | size=<0x0 0x200000>; |
1780 | }; |
1781 | recovery{ |
1782 | offset=<0x0 0x0>; |
1783 | size=<0x0 0x1000000>; |
1784 | }; |
1785 | boot{ |
1786 | offset=<0x0 0x0>; |
1787 | size=<0x0 0x1000000>; |
1788 | }; |
1789 | system{ |
1790 | offset=<0x0 0x0>; |
1791 | size=<0x0 0x4000000>; |
1792 | }; |
1793 | data{ |
1794 | offset=<0xffffffff 0xffffffff>; |
1795 | size=<0x0 0x0>; |
1796 | }; |
1797 | }; |
1798 | }; |
1799 | |
1800 | ðmac { |
1801 | status = "okay"; |
1802 | pinctrl-names = "internal_eth_pins"; |
1803 | pinctrl-0 = <&internal_eth_pins>; |
1804 | mc_val = <0x4be04>; |
1805 | |
1806 | internal_phy=<1>; |
1807 | }; |
1808 | |
1809 | &uart_A { |
1810 | status = "okay"; |
1811 | }; |
1812 | |
1813 | &dwc3 { |
1814 | status = "okay"; |
1815 | }; |
1816 | |
1817 | &usb2_phy_v2 { |
1818 | status = "okay"; |
1819 | portnum = <3>; |
1820 | }; |
1821 | |
1822 | &usb3_phy_v2 { |
1823 | status = "okay"; |
1824 | portnum = <0>; |
1825 | otg = <0>; |
1826 | }; |
1827 | |
1828 | &dwc2_a { |
1829 | status = "okay"; |
1830 | /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ |
1831 | controller-type = <1>; |
1832 | }; |
1833 | |
1834 | &spicc0 { |
1835 | status = "okay"; |
1836 | pinctrl-names = "default"; |
1837 | pinctrl-0 = <&spicc0_pins_h>; |
1838 | cs-gpios = <&gpio GPIOH_20 0>; |
1839 | }; |
1840 | |
1841 | &meson_fb { |
1842 | status = "okay"; |
1843 | display_size_default = <1920 1080 1920 2160 32>; |
1844 | mem_size = <0x00800000 0x1980000 0x100000 0x800000>; |
1845 | logo_addr = "0x7f800000"; |
1846 | mem_alloc = <0>; |
1847 | pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ |
1848 | }; |
1849 | |
1850 | &pwm_AO_cd { |
1851 | status = "okay"; |
1852 | }; |
1853 | |
1854 | &saradc { |
1855 | status = "okay"; |
1856 | }; |
1857 | |
1858 | &i2c1 { |
1859 | status = "okay"; |
1860 | clock-frequency = <300000>; |
1861 | pinctrl-names="default"; |
1862 | pinctrl-0=<&i2c1_h_pins>; |
1863 | |
1864 | lcd_extern_i2c0: lcd_extern_i2c@0 { |
1865 | compatible = "lcd_ext, i2c"; |
1866 | dev_name = "i2c_T5800Q"; |
1867 | reg = <0x1c>; |
1868 | status = "okay"; |
1869 | }; |
1870 | |
1871 | lcd_extern_i2c1: lcd_extern_i2c@1 { |
1872 | compatible = "lcd_ext, i2c"; |
1873 | dev_name = "i2c_ANX6862"; |
1874 | reg = <0x20>; |
1875 | status = "okay"; |
1876 | }; |
1877 | |
1878 | lcd_extern_i2c2: lcd_extern_i2c@2 { |
1879 | compatible = "lcd_ext, i2c"; |
1880 | dev_name = "i2c_ANX7911"; |
1881 | reg = <0x74>; |
1882 | status = "okay"; |
1883 | }; |
1884 | }; |
1885 | |
1886 | &pwm_ab { |
1887 | status = "okay"; |
1888 | }; |
1889 | |
1890 | &pwm_cd { |
1891 | status = "okay"; |
1892 | }; |
1893 | |
1894 | &efuse { |
1895 | status = "okay"; |
1896 | }; |
1897 |