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1/*
2 * arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts
3 *
4 * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18/dts-v1/;
19
20#include "mesontl1.dtsi"
21#include "partition_mbox_normal_P_32.dtsi"
22#include "mesontl1_x301-panel.dtsi"
23
24/ {
25 model = "Amlogic TL1 T962X2 X301";
26 amlogic-dt-id = "tl1_t962x2_x301";
27 compatible = "amlogic, tl1_t962x2_x301";
28
29 aliases {
30 serial0 = &uart_AO;
31 serial1 = &uart_A;
32 serial2 = &uart_B;
33 serial3 = &uart_C;
34 serial4 = &uart_AO_B;
35 tsensor0 = &p_tsensor;
36 tsensor1 = &d_tsensor;
37 tsensor2 = &s_tsensor;
38 i2c0 = &i2c0;
39 i2c1 = &i2c1;
40 i2c2 = &i2c2;
41 i2c3 = &i2c3;
42 i2c4 = &i2c_AO;
43 };
44
45 memory@00000000 {
46 device_type = "memory";
47 linux,usable-memory = <0x0 0x0 0x0 0x80000000>;
48 };
49
50 reserved-memory {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 ranges;
54 /* global autoconfigured region for contiguous allocations */
55 ramoops@0x07400000 {
56 compatible = "ramoops";
57 reg = <0x0 0x07400000 0x0 0x00100000>;
58 record-size = <0x8000>;
59 console-size = <0x8000>;
60 ftrace-size = <0x0>;
61 pmsg-size = <0x8000>;
62 };
63
64 secmon_reserved: linux,secmon {
65 compatible = "shared-dma-pool";
66 reusable;
67 size = <0x0 0x400000>;
68 alignment = <0x0 0x400000>;
69 alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
70 };
71
72 logo_reserved:linux,meson-fb {
73 compatible = "shared-dma-pool";
74 reusable;
75 size = <0x0 0x800000>;
76 alignment = <0x0 0x400000>;
77 alloc-ranges = <0x0 0x7f800000 0x0 0x800000>;
78 };
79
80 lcd_tcon_reserved:linux,lcd_tcon {
81 compatible = "shared-dma-pool";
82 reusable;
83 size = <0x0 0xc00000>;
84 alignment = <0x0 0x400000>;
85 alloc-ranges = <0x0 0x7ec00000 0x0 0xc00000>;
86 };
87
88 codec_mm_cma:linux,codec_mm_cma {
89 compatible = "shared-dma-pool";
90 reusable;
91 /* ion_codec_mm max can alloc size 80M*/
92 size = <0x0 0x13400000>;
93 alignment = <0x0 0x400000>;
94 linux,contiguous-region;
95 };
96
97 /* codec shared reserved */
98 codec_mm_reserved:linux,codec_mm_reserved {
99 compatible = "amlogic, codec-mm-reserved";
100 size = <0x0 0x0>;
101 alignment = <0x0 0x100000>;
102 //no-map;
103 };
104
105 ion_cma_reserved:linux,ion-dev {
106 compatible = "shared-dma-pool";
107 reusable;
108 size = <0x0 0x8000000>;
109 alignment = <0x0 0x400000>;
110 };
111
112 /* vdin0 CMA pool */
113 //vdin0_cma_reserved:linux,vdin0_cma {
114 // compatible = "shared-dma-pool";
115 // reusable;
116 /* 3840x2160x4x4 ~=128 M */
117 // size = <0x0 0xc400000>;
118 // alignment = <0x0 0x400000>;
119 //};
120
121 /* vdin1 CMA pool */
122 vdin1_cma_reserved:linux,vdin1_cma {
123 compatible = "shared-dma-pool";
124 reusable;
125 /* 1920x1080x2x4 =16 M */
126 size = <0x0 0x1400000>;
127 alignment = <0x0 0x400000>;
128 };
129
130 /*demod_reserved:linux,demod {
131 * compatible = "amlogic, demod-mem";
132 * size = <0x0 0x800000>; //8M //100m 0x6400000
133 * alloc-ranges = <0x0 0x0 0x0 0x30000000>;
134 * //multi-use;
135 * //no-map;
136 *};
137 */
138
139 demod_cma_reserved:linux,demod_cma {
140 compatible = "shared-dma-pool";
141 reusable;
142 /* 8M */
143 size = <0x0 0x0800000>;
144 alignment = <0x0 0x400000>;
145 };
146
147 /*di CMA pool */
148 di_cma_reserved:linux,di_cma {
149 compatible = "shared-dma-pool";
150 reusable;
151 /* buffer_size = 3621952(yuv422 8bit)
152 * | 4736064(yuv422 10bit)
153 * | 4074560(yuv422 10bit full pack mode)
154 * 10x3621952=34.6M(0x23) support 8bit
155 * 10x4736064=45.2M(0x2e) support 12bit
156 * 10x4074560=40M(0x28) support 10bit
157 */
158 size = <0x0 0x02800000>;
159 alignment = <0x0 0x400000>;
160 };
161
162 /* for hdmi rx emp use */
163 hdmirx_emp_cma_reserved:linux,emp_cma {
164 compatible = "shared-dma-pool";
165 /*linux,phandle = <5>;*/
166 reusable;
167 /* 4M for emp to ddr */
168 /* 32M for tmds to ddr */
169 size = <0x0 0x2000000>;
170 alignment = <0x0 0x400000>;
171 };
172
173 /* POST PROCESS MANAGER */
174 ppmgr_reserved:linux,ppmgr {
175 compatible = "amlogic, ppmgr_memory";
176 size = <0x0 0x0>;
177 };
178
179 picdec_cma_reserved:linux,picdec {
180 compatible = "shared-dma-pool";
181 reusable;
182 size = <0x0 0x0>;
183 alignment = <0x0 0x0>;
184 linux,contiguous-region;
185 };
186 }; /* end of reserved-memory */
187
188 codec_mm {
189 compatible = "amlogic, codec, mm";
190 status = "okay";
191 memory-region = <&codec_mm_cma &codec_mm_reserved>;
192 };
193
194 picdec {
195 compatible = "amlogic, picdec";
196 memory-region = <&picdec_cma_reserved>;
197 dev_name = "picdec";
198 status = "okay";
199 };
200
201 ppmgr {
202 compatible = "amlogic, ppmgr";
203 memory-region = <&ppmgr_reserved>;
204 status = "okay";
205 };
206
207 deinterlace {
208 compatible = "amlogic, deinterlace";
209 status = "okay";
210 /* 0:use reserved; 1:use cma; 2:use cma as reserved */
211 flag_cma = <1>;
212 //memory-region = <&di_reserved>;
213 memory-region = <&di_cma_reserved>;
214 interrupts = <0 46 1
215 0 40 1>;
216 interrupt-names = "pre_irq", "post_irq";
217 clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
218 <&clkc CLKID_VPU_CLKB_COMP>;
219 clock-names = "vpu_clkb_tmp_composite",
220 "vpu_clkb_composite";
221 clock-range = <334 667>;
222 /* buffer-size = <3621952>;(yuv422 8bit) */
223 buffer-size = <4074560>;/*yuv422 fullpack*/
224 /* reserve-iomap = "true"; */
225 /* if enable nr10bit, set nr10bit-support to 1 */
226 post-wr-support = <1>;
227 nr10bit-support = <1>;
228 nrds-enable = <1>;
229 pps-enable = <1>;
230 };
231
232 vout {
233 compatible = "amlogic, vout";
234 status = "okay";
235 fr_auto_policy = <0>;
236 };
237
238 /* Audio Related start */
239 pdm_codec:dummy {
240 #sound-dai-cells = <0>;
241 compatible = "amlogic, pdm_dummy_codec";
242 status = "okay";
243 };
244
245 dummy_codec:dummy {
246 #sound-dai-cells = <0>;
247 compatible = "amlogic, aml_dummy_codec";
248 status = "okay";
249 };
250
251 tl1_codec:codec {
252 #sound-dai-cells = <0>;
253 compatible = "amlogic, tl1_acodec";
254 status = "okay";
255 reg = <0x0 0xff632000 0x0 0x1c>;
256 tdmout_index = <0>;
257 tdmin_index = <0>;
258 dat1_ch_sel = <1>;
259 };
260
261 aml_dtv_demod {
262 compatible = "amlogic, ddemod-tl1";
263 dev_name = "aml_dtv_demod";
264 status = "okay";
265
266 //pinctrl-names="dtvdemod_agc";
267 //pinctrl-0=<&dtvdemod_agc>;
268
269 clocks = <&clkc CLKID_DAC_CLK>;
270 clock-names = "vdac_clk_gate";
271
272 reg = <0x0 0xff650000 0x0 0x4000 /*dtv demod base*/
273 0x0 0xff63c000 0x0 0x2000 /*hiu reg base*/
274 0x0 0xff800000 0x0 0x1000 /*io_aobus_base*/
275 0x0 0xffd01000 0x0 0x1000 /*reset*/
276 >;
277
278 dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
279 spectrum = <1>;
280 cma_flag = <1>;
281 cma_mem_size = <8>;
282 memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
283 };
284
285 auge_sound {
286 compatible = "amlogic, tl1-sound-card";
287 aml-audio-card,name = "AML-AUGESOUND";
288
289 avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>;
290
291 aml-audio-card,dai-link@0 {
292 format = "i2s";
293 mclk-fs = <256>;
294 //continuous-clock;
295 //bitclock-inversion;
296 //frame-inversion;
297 /* master mode */
298 bitclock-master = <&tdma>;
299 frame-master = <&tdma>;
300 /* slave mode */
301 /*
302 * bitclock-master = <&tdmacodec>;
303 * frame-master = <&tdmacodec>;
304 */
305 /* suffix-name, sync with android audio hal used for */
306 suffix-name = "alsaPORT-i2s";
307 tdmacpu: cpu {
308 sound-dai = <&tdma>;
309 dai-tdm-slot-tx-mask =
310 <1 1>;
311 dai-tdm-slot-rx-mask =
312 <1 1>;
313 dai-tdm-slot-num = <2>;
314 dai-tdm-slot-width = <32>;
315 system-clock-frequency = <12288000>;
316 };
317 tdmacodec: codec {
318 //sound-dai = <&dummy_codec>;
319 sound-dai = <&ad82584f &tl1_codec>;
320 };
321 };
322
323 aml-audio-card,dai-link@1 {
324 status = "disabled";
325
326 format = "i2s";
327 mclk-fs = <256>;
328 //continuous-clock;
329 //bitclock-inversion;
330 //frame-inversion;
331 /* master mode */
332 bitclock-master = <&tdmb>;
333 frame-master = <&tdmb>;
334 /* slave mode */
335 //bitclock-master = <&tdmbcodec>;
336 //frame-master = <&tdmbcodec>;
337 /* suffix-name, sync with android audio hal used for */
338 suffix-name = "alsaPORT-pcm";
339 cpu {
340 sound-dai = <&tdmb>;
341 dai-tdm-slot-tx-mask = <1 1>;
342 dai-tdm-slot-rx-mask = <1 1>;
343 dai-tdm-slot-num = <2>;
344 /*
345 * dai-tdm-slot-tx-mask =
346 * <1 1 1 1 1 1 1 1>;
347 * dai-tdm-slot-rx-mask =
348 * <1 1 1 1 1 1 1 1>;
349 * dai-tdm-slot-num = <8>;
350 */
351 dai-tdm-slot-width = <32>;
352 system-clock-frequency = <12288000>;
353 };
354 tdmbcodec: codec {
355 sound-dai = <&dummy_codec>;
356 };
357 };
358
359 aml-audio-card,dai-link@2 {
360 status = "disabled";
361
362 format = "i2s";
363 mclk-fs = <256>;
364 //continuous-clock;
365 //bitclock-inversion;
366 //frame-inversion;
367 /* master mode */
368 bitclock-master = <&tdmc>;
369 frame-master = <&tdmc>;
370 /* slave mode */
371 //bitclock-master = <&tdmccodec>;
372 //frame-master = <&tdmccodec>;
373 /* suffix-name, sync with android audio hal used for */
374 //suffix-name = "alsaPORT-tdm";
375 cpu {
376 sound-dai = <&tdmc>;
377 dai-tdm-slot-tx-mask = <1 1>;
378 dai-tdm-slot-rx-mask = <1 1>;
379 dai-tdm-slot-num = <2>;
380 dai-tdm-slot-width = <32>;
381 system-clock-frequency = <12288000>;
382 };
383 tdmccodec: codec {
384 sound-dai = <&dummy_codec>;
385 };
386 };
387
388 aml-audio-card,dai-link@3 {
389 mclk-fs = <64>;
390 /* suffix-name, sync with android audio hal used for */
391 suffix-name = "alsaPORT-pdm";
392 cpu {
393 sound-dai = <&pdm>;
394 };
395 codec {
396 sound-dai = <&pdm_codec>;
397 };
398 };
399
400 aml-audio-card,dai-link@4 {
401 mclk-fs = <128>;
402 /* suffix-name, sync with android audio hal used for */
403 suffix-name = "alsaPORT-spdif";
404 cpu {
405 sound-dai = <&spdifa>;
406 system-clock-frequency = <6144000>;
407 };
408 codec {
409 sound-dai = <&dummy_codec>;
410 };
411 };
412
413 aml-audio-card,dai-link@5 {
414 mclk-fs = <128>;
415 cpu {
416 sound-dai = <&spdifb>;
417 system-clock-frequency = <6144000>;
418 };
419 codec {
420 sound-dai = <&dummy_codec>;
421 };
422 };
423
424 aml-audio-card,dai-link@6 {
425 mclk-fs = <256>;
426 suffix-name = "alsaPORT-tv";
427 cpu {
428 sound-dai = <&extn>;
429 system-clock-frequency = <12288000>;
430 };
431 codec {
432 sound-dai = <&dummy_codec>;
433 };
434 };
435
436 };
437 /* Audio Related end */
438
439 dvb {
440 compatible = "amlogic, dvb";
441 status = "okay";
442 fe0_mode = "internal";
443 fe0_tuner = <&tuner>;
444
445 /*"parallel","serial","disable"*/
446 ts2 = "parallel";
447 ts2_control = <0>;
448 ts2_invert = <0>;
449 interrupts = <0 23 1
450 0 5 1
451 0 53 1
452 0 19 1
453 0 25 1
454 0 17 1>;
455 interrupt-names = "demux0_irq",
456 "demux1_irq",
457 "demux2_irq",
458 "dvr0_irq",
459 "dvr1_irq",
460 "dvr2_irq";
461 clocks = <&clkc CLKID_DEMUX
462 &clkc CLKID_ASYNC_FIFO
463 &clkc CLKID_AHB_ARB0
464/* &clkc CLKID_DOS_PARSER>;*/
465 &clkc CLKID_U_PARSER>;
466 clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
467 };
468
469 tvafe_avin_detect {
470 compatible = "amlogic, tl1_tvafe_avin_detect";
471 status = "okay";
472 device_mask = <1>;/*bit0:ch1;bit1:ch2*/
473 interrupts = <0 12 1>,
474 <0 13 1>;
475 };
476
477 amlvecm {
478 compatible = "amlogic, vecm";
479 dev_name = "aml_vecm";
480 status = "okay";
481 gamma_en = <1>;/*1:enabel ;0:disable*/
482 wb_en = <1>;/*1:enabel ;0:disable*/
483 cm_en = <1>;/*1:enabel ;0:disable*/
484 wb_sel = <1>;/*1:mtx ;0:gainoff*/
485 vlock_en = <1>;/*1:enable;0:disable*/
486 vlock_mode = <0x4>;
487 /* vlock work mode:
488 *bit0:auto ENC
489 *bit1:auto PLL
490 *bit2:manual PLL
491 *bit3:manual ENC
492 *bit4:manual soft ENC
493 *bit5:manual MIX PLL ENC
494 */
495 vlock_pll_m_limit = <1>;
496 vlock_line_limit = <3>;
497 };
498
499 vdin@0 {
500 compatible = "amlogic, vdin";
501 /*memory-region = <&vdin0_cma_reserved>;*/
502 status = "okay";
503 /*bit0:(1:share with codec_mm;0:cma alone)
504 *bit8:(1:alloc in discontinus way;0:alone in continuous way)
505 */
506 flag_cma = <0x101>;
507 /*MByte, if 10bit disable: 64M(YUV422),
508 *if 10bit enable: 64*1.5 = 96M(YUV422)
509 *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
510 *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
511 *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
512 *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
513 */
514 cma_size = <190>;
515 interrupts = <0 83 1>;
516 rdma-irq = <2>;
517 clocks = <&clkc CLKID_FCLK_DIV5>,
518 <&clkc CLKID_VDIN_MEAS_COMP>;
519 clock-names = "fclk_div5", "cts_vdin_meas_clk";
520 vdin_id = <0>;
521 /*vdin write mem color depth support:
522 * bit0:support 8bit
523 * bit1:support 9bit
524 * bit2:support 10bit
525 * bit3:support 12bit
526 * bit4:support yuv422 10bit full pack mode (from txl new add)
527 * bit8:use 8bit at 4k_50/60hz_10bit
528 * bit9:use 10bit at 4k_50/60hz_10bit
529 */
530 tv_bit_mode = <0x215>;
531 /* afbce_bit_mode: (amlogic frame buff compression encoder)
532 * bit 0~3:
533 * 0 -- normal mode, not use afbce
534 * 1 -- use afbce non-mmu mode
535 * 2 -- use afbce mmu mode
536 * bit 4:
537 * 0 -- afbce compression-lossy disable
538 * 1 -- afbce compression-lossy enable
539 */
540 afbce_bit_mode = <0x1>;
541 };
542
543 vdin@1 {
544 compatible = "amlogic, vdin";
545 memory-region = <&vdin1_cma_reserved>;
546 status = "okay";
547 /*bit0:(1:share with codec_mm;0:cma alone)
548 *bit8:(1:alloc in discontinus way;0:alone in continuous way)
549 */
550 flag_cma = <0>;
551 interrupts = <0 85 1>;
552 rdma-irq = <4>;
553 clocks = <&clkc CLKID_FCLK_DIV5>,
554 <&clkc CLKID_VDIN_MEAS_COMP>;
555 clock-names = "fclk_div5", "cts_vdin_meas_clk";
556 vdin_id = <1>;
557 /*vdin write mem color depth support:
558 *bit0:support 8bit
559 *bit1:support 9bit
560 *bit2:support 10bit
561 *bit3:support 12bit
562 */
563 tv_bit_mode = <0x15>;
564 };
565
566 tvafe {
567 compatible = "amlogic, tvafe-tl1";
568 /*memory-region = <&tvafe_cma_reserved>;*/
569 status = "okay";
570 flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
571 cma_size = <5>;/*MByte*/
572 reg = <0x0 0xff654000 0x0 0x2000>;/*tvafe reg base*/
573 reserve-iomap = "true";
574 tvafe_id = <0>;
575 //pinctrl-names = "default";
576 /*!!particular sequence, no more and no less!!!*/
577 tvafe_pin_mux = <
578 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
579 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
580 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
581 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
582 >;
583 clocks = <&clkc CLKID_DAC_CLK>;
584 clock-names = "vdac_clk_gate";
585 };
586
587 vbi {
588 compatible = "amlogic, vbi";
589 status = "okay";
590 interrupts = <0 83 1>;
591 };
592
593 cvbsout {
594 compatible = "amlogic, cvbsout-tl1";
595 status = "disabled";
596 clocks = <&clkc CLKID_VCLK2_ENCI
597 &clkc CLKID_VCLK2_VENCI0
598 &clkc CLKID_VCLK2_VENCI1
599 &clkc CLKID_DAC_CLK>;
600 clock-names = "venci_top_gate",
601 "venci_0_gate",
602 "venci_1_gate",
603 "vdac_clk_gate";
604 /* clk path */
605 /* 0:vid_pll vid2_clk */
606 /* 1:gp0_pll vid2_clk */
607 /* 2:vid_pll vid1_clk */
608 /* 3:gp0_pll vid1_clk */
609 clk_path = <0>;
610
611 /* performance: reg_address, reg_value */
612 /* tl1 */
613 performance = <0x1bf0 0x9
614 0x1b56 0x333
615 0x1b12 0x8080
616 0x1b05 0xfd
617 0x1c59 0xf850
618 0xffff 0x0>; /* ending flag */
619 performance_sarft = <0x1bf0 0x9
620 0x1b56 0x333
621 0x1b12 0x0
622 0x1b05 0x9
623 0x1c59 0xfc48
624 0xffff 0x0>; /* ending flag */
625 performance_revB_telecom = <0x1bf0 0x9
626 0x1b56 0x546
627 0x1b12 0x8080
628 0x1b05 0x9
629 0x1c59 0xf850
630 0xffff 0x0>; /* ending flag */
631 };
632
633 /* for external keypad */
634 adc_keypad {
635 compatible = "amlogic, adc_keypad";
636 status = "okay";
637 key_name = "power","up","down","enter","left","right","home";
638 key_num = <7>;
639 io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>;
640 io-channel-names = "key-chan-2", "key-chan-3";
641 key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
642 SARADC_CH2 SARADC_CH3 SARADC_CH3>;
643 key_code = <116 103 108 28 105 106 102>;
644 key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
645 key_tolerance = <40 40 40 40 40 40 40>;
646};
647
648 unifykey {
649 compatible = "amlogic, unifykey";
650 status = "okay";
651
652 unifykey-num = <21>;
653 unifykey-index-0 = <&keysn_0>;
654 unifykey-index-1 = <&keysn_1>;
655 unifykey-index-2 = <&keysn_2>;
656 unifykey-index-3 = <&keysn_3>;
657 unifykey-index-4 = <&keysn_4>;
658 unifykey-index-5 = <&keysn_5>;
659 unifykey-index-6 = <&keysn_6>;
660 unifykey-index-7 = <&keysn_7>;
661 unifykey-index-8 = <&keysn_8>;
662 unifykey-index-9 = <&keysn_9>;
663 unifykey-index-10= <&keysn_10>;
664 unifykey-index-11 = <&keysn_11>;
665 unifykey-index-12 = <&keysn_12>;
666 unifykey-index-13 = <&keysn_13>;
667 unifykey-index-14 = <&keysn_14>;
668 unifykey-index-15 = <&keysn_15>;
669 unifykey-index-16 = <&keysn_16>;
670 unifykey-index-17 = <&keysn_17>;
671 unifykey-index-18 = <&keysn_18>;
672 unifykey-index-19 = <&keysn_19>;
673 unifykey-index-20 = <&keysn_20>;
674
675 keysn_0: key_0{
676 key-name = "usid";
677 key-device = "normal";
678 key-permit = "read","write","del";
679 };
680 keysn_1:key_1{
681 key-name = "mac";
682 key-device = "normal";
683 key-permit = "read","write","del";
684 };
685 keysn_2:key_2{
686 key-name = "hdcp";
687 key-device = "secure";
688 key-type = "sha1";
689 key-permit = "read","write","del";
690 };
691 keysn_3:key_3{
692 key-name = "secure_boot_set";
693 key-device = "efuse";
694 key-permit = "write";
695 };
696 keysn_4:key_4{
697 key-name = "mac_bt";
698 key-device = "normal";
699 key-permit = "read","write","del";
700 key-type = "mac";
701 };
702 keysn_5:key_5{
703 key-name = "mac_wifi";
704 key-device = "normal";
705 key-permit = "read","write","del";
706 key-type = "mac";
707 };
708 keysn_6:key_6{
709 key-name = "hdcp2_tx";
710 key-device = "normal";
711 key-permit = "read","write","del";
712 };
713 keysn_7:key_7{
714 key-name = "hdcp2_rx";
715 key-device = "normal";
716 key-permit = "read","write","del";
717 };
718 keysn_8:key_8{
719 key-name = "widevinekeybox";
720 key-device = "secure";
721 key-type = "sha1";
722 key-permit = "read","write","del";
723 };
724 keysn_9:key_9{
725 key-name = "deviceid";
726 key-device = "normal";
727 key-permit = "read","write","del";
728 };
729 keysn_10:key_10{
730 key-name = "hdcp22_fw_private";
731 key-device = "secure";
732 key-permit = "read","write","del";
733 };
734 keysn_11:key_11{
735 key-name = "hdcp22_rx_private";
736 key-device = "secure";
737 key-permit = "read","write","del";
738 };
739 keysn_12:key_12{
740 key-name = "hdcp22_rx_fw";
741 key-device = "normal";
742 key-permit = "read","write","del";
743 };
744 keysn_13:key_13{
745 key-name = "hdcp14_rx";
746 key-device = "normal";
747 key-type = "sha1";
748 key-permit = "read","write","del";
749 };
750 keysn_14:key_14{
751 key-name = "prpubkeybox";// PlayReady
752 key-device = "secure";
753 key-permit = "read","write","del";
754 };
755 keysn_15:key_15{
756 key-name = "prprivkeybox";// PlayReady
757 key-device = "secure";
758 key-permit = "read","write","del";
759 };
760 keysn_16:key_16{
761 key-name = "lcd";
762 key-device = "normal";
763 key-permit = "read","write","del";
764 };
765 keysn_17:key_17{
766 key-name = "lcd_extern";
767 key-device = "normal";
768 key-permit = "read","write","del";
769 };
770 keysn_18:key_18{
771 key-name = "backlight";
772 key-device = "normal";
773 key-permit = "read","write","del";
774 };
775 keysn_19:key_19{
776 key-name = "lcd_tcon";
777 key-device = "normal";
778 key-permit = "read","write","del";
779 };
780 keysn_20:key_20{
781 key-name = "attestationkeybox";// attestation key
782 key-device = "secure";
783 key-permit = "read","write","del";
784 };
785 }; /* End unifykey */
786
787 amlvideo2_0 {
788 compatible = "amlogic, amlvideo2";
789 dev_name = "amlvideo2";
790 status = "okay";
791 amlvideo2_id = <0>;
792 cma_mode = <1>;
793 };
794
795 amlvideo2_1 {
796 compatible = "amlogic, amlvideo2";
797 dev_name = "amlvideo2";
798 status = "okay";
799 amlvideo2_id = <1>;
800 cma_mode = <1>;
801 };
802
803 hdmirx {
804 compatible = "amlogic, hdmirx_tl1";
805 #address-cells=<1>;
806 #size-cells=<1>;
807 memory-region = <&hdmirx_emp_cma_reserved>;
808 status = "okay";
809 pinctrl-names = "default";
810 pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
811 &hdmirx_c_mux>;
812 repeat = <0>;
813 interrupts = <0 41 1>;
814 clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
815 <&clkc CLKID_HDMIRX_CFG_COMP>,
816 <&clkc CLKID_HDMIRX_ACR_COMP>,
817 <&clkc CLKID_HDMIRX_METER_COMP>,
818 <&clkc CLKID_HDMIRX_AXI_COMP>,
819 <&xtal>,
820 <&clkc CLKID_FCLK_DIV5>,
821 <&clkc CLKID_FCLK_DIV7>,
822 <&clkc CLKID_HDCP22_SKP_COMP>,
823 <&clkc CLKID_HDCP22_ESM_COMP>;
824 // <&clkc CLK_AUD_PLL2FS>,
825 // <&clkc CLK_AUD_PLL4FS>,
826 // <&clkc CLK_AUD_OUT>;
827 clock-names = "hdmirx_modet_clk",
828 "hdmirx_cfg_clk",
829 "hdmirx_acr_ref_clk",
830 "cts_hdmirx_meter_clk",
831 "cts_hdmi_axi_clk",
832 "xtal",
833 "fclk_div5",
834 "fclk_div7",
835 "hdcp_rx22_skp",
836 "hdcp_rx22_esm";
837 // "hdmirx_aud_pll2fs",
838 // "hdmirx_aud_pll4f",
839 // "clk_aud_out";
840 hdmirx_id = <0>;
841 en_4k_2_2k = <0>;
842 hpd_low_cec_off = <1>;
843 /* bit4: enable feature, bit3~0: port number */
844 disable_port = <0x0>;
845 /* MAP_ADDR_MODULE_CBUS */
846 /* MAP_ADDR_MODULE_HIU */
847 /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
848 /* MAP_ADDR_MODULE_SEC_AHB */
849 /* MAP_ADDR_MODULE_SEC_AHB2 */
850 /* MAP_ADDR_MODULE_APB4 */
851 /* MAP_ADDR_MODULE_TOP */
852 reg = < 0x0 0x0 0x0 0x0
853 0x0 0xff63C000 0x0 0x2000
854 0x0 0xffe0d000 0x0 0x2000
855 0x0 0x0 0x0 0x0
856 0x0 0x0 0x0 0x0
857 0x0 0x0 0x0 0x0
858 0x0 0xff610000 0x0 0xa000>;
859 };
860
861 aocec: aocec {
862 compatible = "amlogic, aocec-tl1";
863 /*device_name = "aocec";*/
864 status = "okay";
865 vendor_name = "Amlogic"; /* Max Chars: 8 */
866 /* Refer to the following URL at:
867 * http://standards.ieee.org/develop/regauth/oui/oui.txt
868 */
869 vendor_id = <0x000000>;
870 product_desc = "TL1"; /* Max Chars: 16 */
871 cec_osd_string = "AML_TV"; /* Max Chars: 14 */
872 port_num = <3>;
873 ee_cec;
874 arc_port_mask = <0x2>;
875 interrupts = <0 205 1
876 0 199 1>;
877 interrupt-names = "hdmi_aocecb","hdmi_aocec";
878 pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
879 pinctrl-0=<&aoceca_mux>;
880 pinctrl-1=<&aocecb_mux>;
881 pinctrl-2=<&aoceca_mux>;
882 reg = <0x0 0xFF80023c 0x0 0x4
883 0x0 0xFF800000 0x0 0x400>;
884 reg-names = "ao_exit","ao";
885 };
886
887 p_tsensor: p_tsensor@ff634800 {
888 compatible = "amlogic, r1p1-tsensor";
889 status = "okay";
890 reg = <0x0 0xff634800 0x0 0x50>,
891 <0x0 0xff800268 0x0 0x4>;
892 cal_type = <0x1>;
893 cal_a = <324>;
894 cal_b = <424>;
895 cal_c = <3159>;
896 cal_d = <9411>;
897 rtemp = <115000>;
898 interrupts = <0 35 0>;
899 clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
900 clock-names = "ts_comp";
901 #thermal-sensor-cells = <1>;
902 };
903
904 d_tsensor: d_tsensor@ff634c00 {
905 compatible = "amlogic, r1p1-tsensor";
906 status = "okay";
907 reg = <0x0 0xff634c00 0x0 0x50>,
908 <0x0 0xff800230 0x0 0x4>;
909 cal_type = <0x1>;
910 cal_a = <324>;
911 cal_b = <424>;
912 cal_c = <3159>;
913 cal_d = <9411>;
914 rtemp = <115000>;
915 interrupts = <0 36 0>;
916 clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
917 clock-names = "ts_comp";
918 #thermal-sensor-cells = <1>;
919 };
920
921 s_tsensor: s_tsensor@ff635000 {
922 compatible = "amlogic, r1p1-tsensor";
923 status = "okay";
924 reg = <0x0 0xff635000 0x0 0x50>,
925 <0x0 0xff80026c 0x0 0x4>;
926 cal_type = <0x1>;
927 cal_a = <324>;
928 cal_b = <424>;
929 cal_c = <3159>;
930 cal_d = <9411>;
931 rtemp = <115000>;
932 interrupts = <0 38 0>;
933 clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
934 clock-names = "ts_comp";
935 #thermal-sensor-cells = <1>;
936 };
937
938 meson_cooldev: meson-cooldev@0 {
939 status = "okay";
940 compatible = "amlogic, meson-cooldev";
941 cooling_devices {
942 cpufreq_cool_cluster0 {
943 min_state = <1000000>;
944 dyn_coeff = <140>;
945 gpu_pp = <2>;
946 cluster_id = <0>;
947 node_name = "cpufreq_cool0";
948 device_type = "cpufreq";
949 };
950 cpucore_cool_cluster0 {
951 min_state = <1>;
952 dyn_coeff = <0>;
953 gpu_pp = <2>;
954 cluster_id = <0>;
955 node_name = "cpucore_cool0";
956 device_type = "cpucore";
957 };
958 gpufreq_cool {
959 min_state = <400>;
960 dyn_coeff = <140>;
961 gpu_pp = <2>;
962 cluster_id = <0>;
963 node_name = "gpufreq_cool0";
964 device_type = "gpufreq";
965 };
966 gpucore_cool {
967 min_state = <1>;
968 dyn_coeff = <0>;
969 gpu_pp = <2>;
970 cluster_id = <0>;
971 node_name = "gpucore_cool0";
972 device_type = "gpucore";
973 };
974 };
975 cpufreq_cool0:cpufreq_cool0 {
976 #cooling-cells = <2>; /* min followed by max */
977 };
978 cpucore_cool0:cpucore_cool0 {
979 #cooling-cells = <2>; /* min followed by max */
980 };
981 gpufreq_cool0:gpufreq_cool0 {
982 #cooling-cells = <2>; /* min followed by max */
983 };
984 gpucore_cool0:gpucore_cool0 {
985 #cooling-cells = <2>; /* min followed by max */
986 };
987 };/*meson cooling devices end*/
988
989 thermal-zones {
990 pll_thermal: pll_thermal {
991 polling-delay = <1000>;
992 polling-delay-passive = <100>;
993 sustainable-power = <1322>;
994 thermal-sensors = <&p_tsensor 0>;
995 trips {
996 pswitch_on: trip-point@0 {
997 temperature = <60000>;
998 hysteresis = <5000>;
999 type = "passive";
1000 };
1001 pcontrol: trip-point@1 {
1002 temperature = <75000>;
1003 hysteresis = <5000>;
1004 type = "passive";
1005 };
1006 phot: trip-point@2 {
1007 temperature = <85000>;
1008 hysteresis = <5000>;
1009 type = "hot";
1010 };
1011 pcritical: trip-point@3 {
1012 temperature = <110000>;
1013 hysteresis = <1000>;
1014 type = "critical";
1015 };
1016 };
1017 cooling-maps {
1018 cpufreq_cooling_map {
1019 trip = <&pcontrol>;
1020 cooling-device = <&cpufreq_cool0 0 11>;
1021 contribution = <1024>;
1022 };
1023 cpucore_cooling_map {
1024 trip = <&pcontrol>;
1025 cooling-device = <&cpucore_cool0 0 4>;
1026 contribution = <1024>;
1027 };
1028 gpufreq_cooling_map {
1029 trip = <&pcontrol>;
1030 cooling-device = <&gpufreq_cool0 0 4>;
1031 contribution = <1024>;
1032 };
1033 };
1034 };
1035 ddr_thermal: ddr_thermal {
1036 polling-delay = <2000>;
1037 polling-delay-passive = <1000>;
1038 sustainable-power = <1322>;
1039 thermal-sensors = <&d_tsensor 1>;
1040 trips {
1041 dswitch_on: trip-point@0 {
1042 temperature = <60000>;
1043 hysteresis = <5000>;
1044 type = "passive";
1045 };
1046 dcontrol: trip-point@1 {
1047 temperature = <75000>;
1048 hysteresis = <5000>;
1049 type = "passive";
1050 };
1051 dhot: trip-point@2 {
1052 temperature = <85000>;
1053 hysteresis = <5000>;
1054 type = "hot";
1055 };
1056 dcritical: trip-point@3 {
1057 temperature = <110000>;
1058 hysteresis = <1000>;
1059 type = "critical";
1060 };
1061 };
1062 };
1063 sar_thermal: sar_thermal {
1064 polling-delay = <2000>;
1065 polling-delay-passive = <1000>;
1066 sustainable-power = <1322>;
1067 thermal-sensors = <&s_tsensor 2>;
1068 trips {
1069 sswitch_on: trip-point@0 {
1070 temperature = <60000>;
1071 hysteresis = <5000>;
1072 type = "passive";
1073 };
1074 scontrol: trip-point@1 {
1075 temperature = <75000>;
1076 hysteresis = <5000>;
1077 type = "passive";
1078 };
1079 shot: trip-point@2 {
1080 temperature = <85000>;
1081 hysteresis = <5000>;
1082 type = "hot";
1083 };
1084 scritical: trip-point@3 {
1085 temperature = <110000>;
1086 hysteresis = <1000>;
1087 type = "critical";
1088 };
1089 };
1090 };
1091 }; /*thermal zone end*/
1092
1093 /*DCDC for MP8756GD*/
1094 cpu_opp_table0: cpu_opp_table0 {
1095 compatible = "operating-points-v2";
1096 opp-shared;
1097
1098 opp00 {
1099 opp-hz = /bits/ 64 <100000000>;
1100 opp-microvolt = <699000>;
1101 };
1102 opp01 {
1103 opp-hz = /bits/ 64 <250000000>;
1104 opp-microvolt = <699000>;
1105 };
1106 opp02 {
1107 opp-hz = /bits/ 64 <500000000>;
1108 opp-microvolt = <709000>;
1109 };
1110 opp03 {
1111 opp-hz = /bits/ 64 <667000000>;
1112 opp-microvolt = <719000>;
1113 };
1114 opp04 {
1115 opp-hz = /bits/ 64 <1000000000>;
1116 opp-microvolt = <729000>;
1117 };
1118 opp05 {
1119 opp-hz = /bits/ 64 <1200000000>;
1120 opp-microvolt = <749000>;
1121 };
1122 opp06 {
1123 opp-hz = /bits/ 64 <1404000000>;
1124 opp-microvolt = <769000>;
1125 };
1126 opp07 {
1127 opp-hz = /bits/ 64 <1500000000>;
1128 opp-microvolt = <779000>;
1129 };
1130 opp08 {
1131 opp-hz = /bits/ 64 <1608000000>;
1132 opp-microvolt = <789000>;
1133 };
1134 opp09 {
1135 opp-hz = /bits/ 64 <1704000000>;
1136 opp-microvolt = <829000>;
1137 };
1138 opp10 {
1139 opp-hz = /bits/ 64 <1800000000>;
1140 opp-microvolt = <879000>;
1141 };
1142 opp11 {
1143 opp-hz = /bits/ 64 <1908000000>;
1144 opp-microvolt = <929000>;
1145 };
1146 };
1147
1148 cpufreq-meson {
1149 compatible = "amlogic, cpufreq-meson";
1150 pinctrl-names = "default";
1151 pinctrl-0 = <&pwm_ao_d_pins3>;
1152 status = "okay";
1153 };
1154
1155 tuner: tuner {
1156 compatible = "amlogic, tuner";
1157 status = "okay";
1158 tuner_name = "mxl661_tuner";
1159 tuner_i2c_adap = <&i2c0>;
1160 tuner_i2c_addr = <0x60>;
1161 tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */
1162 tuner_xtal_mode = <3>;
1163 /* NO_SHARE_XTAL(0)
1164 * SLAVE_XTAL_SHARE(3)
1165 */
1166 tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */
1167 };
1168
1169 atv-demod {
1170 compatible = "amlogic, atv-demod";
1171 status = "okay";
1172 tuner = <&tuner>;
1173 btsc_sap_mode = <1>;
1174 /* pinctrl-names="atvdemod_agc_pins"; */
1175 /* pinctrl-0=<&atvdemod_agc_pins>; */
1176 reg = <0x0 0xff656000 0x0 0x2000 /* demod reg */
1177 0x0 0xff63c000 0x0 0x2000 /* hiu reg */
1178 0x0 0xff634000 0x0 0x2000 /* periphs reg */
1179 0x0 0xff64a000 0x0 0x2000>; /* audio reg */
1180 reg_23cf = <0x88188832>;
1181 /*default:0x88188832;r840 on haier:0x48188832*/
1182 };
1183
1184 bt-dev{
1185 compatible = "amlogic, bt-dev";
1186 status = "okay";
1187 gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>;
1188 };
1189
1190 wifi{
1191 compatible = "amlogic, aml_wifi";
1192 status = "okay";
1193 interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>;
1194 irq_trigger_type = "GPIO_IRQ_LOW";
1195 dhd_static_buf; //dhd_static_buf support
1196 power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>;
1197 pinctrl-names = "default";
1198 pinctrl-0 = <&pwm_b_pins1>;
1199 pwm_config = <&wifi_pwm_conf>;
1200 };
1201
1202 wifi_pwm_conf:wifi_pwm_conf{
1203 pwm_channel1_conf {
1204 pwms = <&pwm_ab MESON_PWM_1 30541 0>;
1205 duty-cycle = <15270>;
1206 times = <8>;
1207 };
1208 pwm_channel2_conf {
1209 pwms = <&pwm_ab MESON_PWM_3 30500 0>;
1210 duty-cycle = <15250>;
1211 times = <12>;
1212 };
1213 };
1214
1215 sd_emmc_b: sdio@ffe05000 {
1216 status = "okay";
1217 compatible = "amlogic, meson-mmc-tl1";
1218 reg = <0x0 0xffe05000 0x0 0x800>;
1219 interrupts = <0 190 4>;
1220
1221 pinctrl-names = "sdio_all_pins",
1222 "sdio_clk_cmd_pins";
1223 pinctrl-0 = <&sdio_all_pins>;
1224 pinctrl-1 = <&sdio_clk_cmd_pins>;
1225
1226 clocks = <&clkc CLKID_SD_EMMC_B>,
1227 <&clkc CLKID_SD_EMMC_B_P0_COMP>,
1228 <&clkc CLKID_FCLK_DIV2>,
1229 <&clkc CLKID_FCLK_DIV5>,
1230 <&xtal>;
1231 clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
1232
1233 bus-width = <4>;
1234 cap-sd-highspeed;
1235 cap-mmc-highspeed;
1236 max-frequency = <100000000>;
1237 disable-wp;
1238 sdio {
1239 pinname = "sdio";
1240 ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
1241 caps = "MMC_CAP_4_BIT_DATA",
1242 "MMC_CAP_MMC_HIGHSPEED",
1243 "MMC_CAP_SD_HIGHSPEED",
1244 "MMC_CAP_NONREMOVABLE", /**ptm debug */
1245 "MMC_CAP_UHS_SDR12",
1246 "MMC_CAP_UHS_SDR25",
1247 "MMC_CAP_UHS_SDR50",
1248 "MMC_CAP_UHS_SDR104",
1249 "MMC_PM_KEEP_POWER",
1250 "MMC_CAP_SDIO_IRQ";
1251 f_min = <400000>;
1252 f_max = <200000000>;
1253 max_req_size = <0x20000>; /**128KB*/
1254 card_type = <3>;
1255 /* 3:sdio device(ie:sdio-wifi),
1256 * 4:SD combo (IO+mem) card
1257 */
1258 };
1259 };
1260/* sd_emmc_b: sd@ffe05000 {
1261 * status = "okay";
1262 * compatible = "amlogic, meson-mmc-tl1";
1263 * reg = <0xffe05000 0x800>;
1264 * interrupts = <0 190 1>;
1265 *
1266 * pinctrl-names = "sd_all_pins",
1267 * "sd_clk_cmd_pins",
1268 * "sd_1bit_pins";
1269 * pinctrl-0 = <&sd_all_pins>;
1270 * pinctrl-1 = <&sd_clk_cmd_pins>;
1271 * pinctrl-2 = <&sd_1bit_pins>;
1272 *
1273 * clocks = <&clkc CLKID_SD_EMMC_B>,
1274 * <&clkc CLKID_SD_EMMC_B_P0_COMP>,
1275 * <&clkc CLKID_FCLK_DIV2>,
1276 * <&clkc CLKID_FCLK_DIV5>,
1277 * <&xtal>;
1278 * clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
1279 *
1280 * bus-width = <4>;
1281 * cap-sd-highspeed;
1282 * cap-mmc-highspeed;
1283 * max-frequency = <100000000>;
1284 * disable-wp;
1285 * sd {
1286 * pinname = "sd";
1287 * ocr_avail = <0x200080>;
1288 * caps = "MMC_CAP_4_BIT_DATA",
1289 * "MMC_CAP_MMC_HIGHSPEED",
1290 * "MMC_CAP_SD_HIGHSPEED";
1291 * f_min = <400000>;
1292 * f_max = <200000000>;
1293 * max_req_size = <0x20000>;
1294 * no_sduart = <1>;
1295 * gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
1296 * jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
1297 * gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
1298 * card_type = <5>;
1299 * };
1300 * };
1301 */
1302
1303}; /* end of / */
1304
1305&i2c0 {
1306 status = "okay";
1307 clock-frequency = <300000>;
1308 pinctrl-names="default";
1309 pinctrl-0=<&i2c0_dv_pins>;
1310};
1311
1312&audiobus {
1313 tdma:tdm@0 {
1314 compatible = "amlogic, tl1-snd-tdma";
1315 #sound-dai-cells = <0>;
1316
1317 dai-tdm-lane-slot-mask-in = <1 0>;
1318 dai-tdm-lane-slot-mask-out = <1 1 1 1>;
1319 dai-tdm-clk-sel = <0>;
1320
1321 clocks = <&clkaudio CLKID_AUDIO_MCLK_A
1322 &clkc CLKID_MPLL0
1323 &clkc CLKID_MPLL1
1324 &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
1325 clock-names = "mclk", "clk_srcpll",
1326 "samesource_srcpll", "samesource_clk";
1327
1328 pinctrl-names = "tdm_pins";
1329 pinctrl-0 = <&tdma_mclk &tdmout_a>;
1330
1331 /*
1332 * 0: tdmout_a;
1333 * 1: tdmout_b;
1334 * 2: tdmout_c;
1335 * 3: spdifout;
1336 * 4: spdifout_b;
1337 */
1338 samesource_sel = <3>;
1339
1340 /* In for ACODEC_ADC */
1341 acodec_adc = <1>;
1342
1343 status = "okay";
1344 };
1345
1346 tdmb:tdm@1 {
1347 compatible = "amlogic, tl1-snd-tdmb";
1348 #sound-dai-cells = <0>;
1349
1350 dai-tdm-lane-slot-mask-in = <1 0 0 0>;
1351 dai-tdm-lane-slot-mask-out = <1 0 0 0>;
1352 dai-tdm-clk-sel = <1>;
1353
1354 clocks = <&clkaudio CLKID_AUDIO_MCLK_B
1355 &clkc CLKID_MPLL1>;
1356 clock-names = "mclk", "clk_srcpll";
1357
1358 status = "okay";
1359 };
1360
1361 tdmc:tdm@2 {
1362 compatible = "amlogic, tl1-snd-tdmc";
1363 #sound-dai-cells = <0>;
1364
1365 dai-tdm-lane-slot-mask-in = <1 0 0 0>;
1366 dai-tdm-lane-slot-mask-out = <1 0 0 0>;
1367 dai-tdm-clk-sel = <2>;
1368
1369 clocks = <&clkaudio CLKID_AUDIO_MCLK_C
1370 &clkc CLKID_MPLL2>;
1371 clock-names = "mclk", "clk_srcpll";
1372
1373 pinctrl-names = "tdm_pins";
1374 pinctrl-0 = <&tdmout_c &tdmin_c>;
1375
1376 status = "okay";
1377 };
1378
1379 spdifa:spdif@0 {
1380 compatible = "amlogic, tl1-snd-spdif-a";
1381 #sound-dai-cells = <0>;
1382
1383 clocks = <&clkc CLKID_MPLL1
1384 &clkc CLKID_FCLK_DIV4
1385 &clkaudio CLKID_AUDIO_GATE_SPDIFIN
1386 &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
1387 &clkaudio CLKID_AUDIO_SPDIFIN
1388 &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
1389 clock-names = "sysclk", "fixed_clk", "gate_spdifin",
1390 "gate_spdifout", "clk_spdifin", "clk_spdifout";
1391
1392 interrupts =
1393 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
1394 interrupt-names = "irq_spdifin";
1395
1396 pinctrl-names = "spdif_pins";
1397 pinctrl-0 = <&spdifout_a>;
1398
1399 /*
1400 * whether do asrc for pcm and resample a or b
1401 * if raw data, asrc is disabled automatically
1402 * 0: "Disable",
1403 * 1: "Enable:32K",
1404 * 2: "Enable:44K",
1405 * 3: "Enable:48K",
1406 * 4: "Enable:88K",
1407 * 5: "Enable:96K",
1408 * 6: "Enable:176K",
1409 * 7: "Enable:192K",
1410 */
1411 asrc_id = <0>;
1412 auto_asrc = <3>;
1413
1414 status = "okay";
1415 };
1416
1417 spdifb:spdif@1 {
1418 compatible = "amlogic, tl1-snd-spdif-b";
1419 #sound-dai-cells = <0>;
1420
1421 clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
1422 &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
1423 &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
1424 clock-names = "sysclk",
1425 "gate_spdifout", "clk_spdifout";
1426
1427 status = "okay";
1428 };
1429
1430 pdm:pdm {
1431 compatible = "amlogic, tl1-snd-pdm";
1432 #sound-dai-cells = <0>;
1433
1434 clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
1435 &clkc CLKID_FCLK_DIV3
1436 &clkc CLKID_MPLL3
1437 &clkaudio CLKID_AUDIO_PDMIN0
1438 &clkaudio CLKID_AUDIO_PDMIN1>;
1439 clock-names = "gate",
1440 "sysclk_srcpll",
1441 "dclk_srcpll",
1442 "pdm_dclk",
1443 "pdm_sysclk";
1444
1445 pinctrl-names = "pdm_pins";
1446 pinctrl-0 = <&pdmin>;
1447
1448 /* mode 0~4, defalut:1 */
1449 filter_mode = <1>;
1450
1451 status = "okay";
1452 };
1453
1454 extn:extn {
1455 compatible = "amlogic, snd-extn";
1456 #sound-dai-cells = <0>;
1457
1458 interrupts =
1459 <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
1460 interrupt-names = "irq_frhdmirx";
1461
1462 status = "okay";
1463 };
1464
1465 aed:effect {
1466 compatible = "amlogic, snd-effect-v2";
1467 #sound-dai-cells = <0>;
1468
1469 clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
1470 &clkc CLKID_FCLK_DIV5
1471 &clkaudio CLKID_AUDIO_EQDRC>;
1472 clock-names = "gate", "srcpll", "eqdrc";
1473
1474 /*
1475 * 0:tdmout_a
1476 * 1:tdmout_b
1477 * 2:tdmout_c
1478 * 3:spdifout
1479 * 4:spdifout_b
1480 */
1481 eqdrc_module = <0>;
1482 /* max 0xf, each bit for one lane, usually one lane */
1483 lane_mask = <0x1>;
1484 /* max 0xff, each bit for one channel */
1485 channel_mask = <0xff>;
1486
1487 status = "okay";
1488 };
1489
1490 asrca: resample@0 {
1491 compatible = "amlogic, tl1-resample-a";
1492 clocks = <&clkc CLKID_MPLL0
1493 &clkaudio CLKID_AUDIO_MCLK_A
1494 &clkaudio CLKID_AUDIO_RESAMPLE_A>;
1495 clock-names = "resample_pll", "resample_src", "resample_clk";
1496 /*same with toddr_src
1497 * TDMIN_A, 0
1498 * TDMIN_B, 1
1499 * TDMIN_C, 2
1500 * SPDIFIN, 3
1501 * PDMIN, 4
1502 * NONE,
1503 * TDMIN_LB, 6
1504 * LOOPBACK, 7
1505 */
1506 resample_module = <3>;
1507
1508 status = "okay";
1509 };
1510
1511 asrcb: resample@1 {
1512 compatible = "amlogic, tl1-resample-b";
1513
1514 clocks = <&clkc CLKID_MPLL3
1515 &clkaudio CLKID_AUDIO_MCLK_F
1516 &clkaudio CLKID_AUDIO_RESAMPLE_B>;
1517 clock-names = "resample_pll", "resample_src", "resample_clk";
1518
1519 /*same with toddr_src
1520 * TDMIN_A, 0
1521 * TDMIN_B, 1
1522 * TDMIN_C, 2
1523 * SPDIFIN, 3
1524 * PDMIN, 4
1525 * NONE,
1526 * TDMIN_LB, 6
1527 * LOOPBACK, 7
1528 */
1529 resample_module = <3>;
1530
1531 status = "disabled";
1532 };
1533
1534}; /* end of audiobus */
1535
1536&pinctrl_periphs {
1537 /* audio pin mux */
1538
1539 tdma_mclk: tdma_mclk {
1540 mux { /* GPIOZ_0 */
1541 groups = "mclk0_z";
1542 function = "mclk0";
1543 };
1544 };
1545
1546 tdmout_a: tdmout_a {
1547 mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
1548 groups = "tdma_sclk_z",
1549 "tdma_fs_z",
1550 "tdma_dout0_z";
1551 function = "tdma_out";
1552 bias-disable;
1553 };
1554 };
1555
1556 tdmin_a: tdmin_a {
1557 mux { /* GPIOZ_9 */
1558 groups = "tdma_din2_z";
1559 function = "tdma_in";
1560 };
1561 };
1562
1563 tdmout_c: tdmout_c {
1564 mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
1565 groups = "tdmc_sclk",
1566 "tdmc_fs",
1567 "tdmc_dout0";
1568 function = "tdmc_out";
1569 };
1570 };
1571
1572 tdmin_c: tdmin_c {
1573 mux { /* GPIODV_10 */
1574 groups = "tdmc_din1";
1575 function = "tdmc_in";
1576 };
1577 };
1578
1579 spdifin_a: spdifin_a {
1580 mux { /* GPIODV_5 */
1581 groups = "spdif_in";
1582 function = "spdif_in";
1583 };
1584 };
1585
1586 spdifout_a: spdifout_a {
1587 mux { /* GPIODV_4 */
1588 groups = "spdif_out_dv4";
1589 function = "spdif_out";
1590 };
1591 };
1592
1593 pdmin: pdmin {
1594 mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */
1595 groups = "pdm_dclk_z",
1596 "pdm_din0_z",
1597 "pdm_din2_z4";
1598 function = "pdm";
1599 };
1600 };
1601
1602 /*backlight*/
1603 bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
1604 mux {
1605 groups = "pwm_vs_z5";
1606 function = "pwm_vs";
1607 };
1608 };
1609 bl_pwm_off_pins:bl_pwm_off_pin {
1610 mux {
1611 groups = "GPIOZ_5";
1612 function = "gpio_periphs";
1613 output-low;
1614 };
1615 };
1616 bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin {
1617 mux {
1618 groups = "pwm_vs_z5";
1619 function = "pwm_vs";
1620 };
1621 };
1622 bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin {
1623 mux {
1624 groups = "pwm_vs_z6";
1625 function = "pwm_vs";
1626 };
1627 };
1628 bl_pwm_combo_off_pins:bl_pwm_combo_off_pin {
1629 mux {
1630 groups = "GPIOZ_5",
1631 "GPIOZ_6";
1632 function = "gpio_periphs";
1633 output-low;
1634 };
1635 };
1636
1637}; /* end of pinctrl_periphs */
1638
1639&audio_data{
1640 status = "okay";
1641};
1642
1643&i2c2 {
1644 status = "okay";
1645 pinctrl-names="default";
1646 pinctrl-0=<&i2c2_z_pins>;
1647 clock-frequency = <400000>;
1648
1649 tas5805: tas5805@36 {
1650 compatible = "ti,tas5805";
1651 #sound-dai-cells = <0>;
1652 codec_name = "tas5805";
1653 reg = <0x2d>;
1654 status = "disable";
1655 };
1656
1657 ad82584f: ad82584f@62 {
1658 compatible = "ESMT, ad82584f";
1659 #sound-dai-cells = <0>;
1660 reg = <0x31>;
1661 status = "okay";
1662 reset_pin = <&gpio_ao GPIOAO_6 0>;
1663 };
1664
1665};
1666
1667&sd_emmc_c {
1668 status = "okay";
1669 emmc {
1670 caps = "MMC_CAP_8_BIT_DATA",
1671 "MMC_CAP_MMC_HIGHSPEED",
1672 "MMC_CAP_SD_HIGHSPEED",
1673 "MMC_CAP_NONREMOVABLE",
1674 "MMC_CAP_1_8V_DDR",
1675 "MMC_CAP_HW_RESET",
1676 "MMC_CAP_ERASE",
1677 "MMC_CAP_CMD23";
1678 caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
1679 f_min = <400000>;
1680 f_max = <198000000>;
1681 };
1682};
1683
1684
1685
1686&spifc {
1687 status = "disabled";
1688 spi-nor@0 {
1689 cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
1690 };
1691};
1692
1693&slc_nand {
1694 status = "disabled";
1695 plat-names = "bootloader", "nandnormal";
1696 plat-num = <2>;
1697 plat-part-0 = <&bootloader>;
1698 plat-part-1 = <&nandnormal>;
1699 bootloader: bootloader{
1700 enable_pad = "ce0";
1701 busy_pad = "rb0";
1702 timming_mode = "mode5";
1703 bch_mode = "bch8_1k";
1704 t_rea = <20>;
1705 t_rhoh = <15>;
1706 chip_num = <1>;
1707 part_num = <0>;
1708 rb_detect = <1>;
1709 };
1710 nandnormal: nandnormal{
1711 enable_pad = "ce0";
1712 busy_pad = "rb0";
1713 timming_mode = "mode5";
1714 bch_mode = "bch8_1k";
1715 plane_mode = "twoplane";
1716 t_rea = <20>;
1717 t_rhoh = <15>;
1718 chip_num = <2>;
1719 part_num = <3>;
1720 partition = <&nand_partitions>;
1721 rb_detect = <1>;
1722 };
1723 nand_partitions:nand_partition{
1724 /*
1725 * if bl_mode is 1, tpl size was generate by
1726 * fip_copies * fip_size which
1727 * will not skip bad when calculating
1728 * the partition size;
1729 *
1730 * if bl_mode is 0,
1731 * tpl partition must be comment out.
1732 */
1733 tpl{
1734 offset=<0x0 0x0>;
1735 size=<0x0 0x0>;
1736 };
1737 logo{
1738 offset=<0x0 0x0>;
1739 size=<0x0 0x200000>;
1740 };
1741 recovery{
1742 offset=<0x0 0x0>;
1743 size=<0x0 0x1000000>;
1744 };
1745 boot{
1746 offset=<0x0 0x0>;
1747 size=<0x0 0x1000000>;
1748 };
1749 system{
1750 offset=<0x0 0x0>;
1751 size=<0x0 0x4000000>;
1752 };
1753 data{
1754 offset=<0xffffffff 0xffffffff>;
1755 size=<0x0 0x0>;
1756 };
1757 };
1758};
1759
1760&ethmac {
1761 status = "okay";
1762 pinctrl-names = "internal_eth_pins";
1763 pinctrl-0 = <&internal_eth_pins>;
1764 mc_val = <0x4be04>;
1765
1766 internal_phy=<1>;
1767};
1768
1769&uart_A {
1770 status = "okay";
1771};
1772
1773&dwc3 {
1774 status = "okay";
1775};
1776
1777&usb2_phy_v2 {
1778 status = "okay";
1779 portnum = <3>;
1780};
1781
1782&usb3_phy_v2 {
1783 status = "okay";
1784 portnum = <0>;
1785 otg = <0>;
1786};
1787
1788&dwc2_a {
1789 status = "okay";
1790 /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
1791 controller-type = <1>;
1792};
1793
1794&spicc0 {
1795 status = "okay";
1796 pinctrl-names = "default";
1797 pinctrl-0 = <&spicc0_pins_h>;
1798 cs-gpios = <&gpio GPIOH_20 0>;
1799};
1800
1801&meson_fb {
1802 status = "okay";
1803 display_size_default = <1920 1080 1920 2160 32>;
1804 mem_size = <0x00800000 0x1980000 0x100000 0x800000>;
1805 logo_addr = "0x7f800000";
1806 mem_alloc = <0>;
1807 pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
1808};
1809
1810&pwm_AO_cd {
1811 status = "okay";
1812};
1813
1814&saradc {
1815 status = "okay";
1816};
1817
1818&i2c1 {
1819 status = "okay";
1820 clock-frequency = <300000>;
1821 pinctrl-names="default";
1822 pinctrl-0=<&i2c1_h_pins>;
1823
1824 lcd_extern_i2c0: lcd_extern_i2c@0 {
1825 compatible = "lcd_ext, i2c";
1826 dev_name = "i2c_T5800Q";
1827 reg = <0x1c>;
1828 status = "okay";
1829 };
1830
1831 lcd_extern_i2c1: lcd_extern_i2c@1 {
1832 compatible = "lcd_ext, i2c";
1833 dev_name = "i2c_ANX6862";
1834 reg = <0x20>;
1835 status = "okay";
1836 };
1837
1838 lcd_extern_i2c2: lcd_extern_i2c@2 {
1839 compatible = "lcd_ext, i2c";
1840 dev_name = "i2c_ANX7911";
1841 reg = <0x74>;
1842 status = "okay";
1843 };
1844};
1845
1846&pwm_ab {
1847 status = "okay";
1848};
1849
1850&pwm_cd {
1851 status = "okay";
1852};
1853
1854&efuse {
1855 status = "okay";
1856};
1857
generated by cgit at 2024-05-17 10:48:57 (GMT)