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path: root/drivers/amlogic/media/video_sink/video.c (plain)
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1/*
2 * drivers/amlogic/media/video_sink/video.c
3 *
4 * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18#include <linux/version.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/spinlock.h>
22#include <linux/interrupt.h>
23#include <linux/fs.h>
24#include <linux/string.h>
25#include <linux/io.h>
26#include <linux/mm.h>
27#include <linux/amlogic/major.h>
28#include <linux/err.h>
29#include <linux/mutex.h>
30#include <linux/platform_device.h>
31#include <linux/ctype.h>
32#include <linux/amlogic/media/frame_sync/ptsserv.h>
33#include <linux/amlogic/media/frame_sync/timestamp.h>
34#include <linux/amlogic/media/frame_sync/tsync.h>
35#include <linux/amlogic/media/vfm/vframe.h>
36#include <linux/amlogic/media/vfm/vframe_provider.h>
37#include <linux/amlogic/media/vfm/vframe_receiver.h>
38#include <linux/amlogic/media/utils/amstream.h>
39#include <linux/amlogic/media/vout/vout_notify.h>
40#include <linux/sched.h>
41#include <linux/slab.h>
42#include <linux/poll.h>
43#include <linux/clk.h>
44#include <linux/debugfs.h>
45#include <linux/amlogic/media/canvas/canvas.h>
46#include <linux/amlogic/media/canvas/canvas_mgr.h>
47#include <linux/dma-mapping.h>
48#include <linux/dma-contiguous.h>
49#include <linux/sched.h>
50#include <linux/amlogic/media/video_sink/video_keeper.h>
51#include "video_priv.h"
52
53#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
54#include <linux/amlogic/media/amvecm/amvecm.h>
55#endif
56#include <linux/amlogic/media/utils/vdec_reg.h>
57
58#ifdef CONFIG_PM
59#include <linux/delay.h>
60#include <linux/pm.h>
61#endif
62
63#include <linux/amlogic/media/registers/register.h>
64#include <linux/uaccess.h>
65#include <linux/amlogic/media/utils/amports_config.h>
66#include <linux/amlogic/media/vpu/vpu.h>
67#include "videolog.h"
68#ifdef CONFIG_AMLOGIC_MEDIA_VIDEOCAPTURE
69#include "amvideocap_priv.h"
70#endif
71#ifdef CONFIG_AM_VIDEO_LOG
72#define AMLOG
73#endif
74#include <linux/amlogic/media/utils/amlog.h>
75MODULE_AMLOG(LOG_LEVEL_ERROR, 0, LOG_DEFAULT_LEVEL_DESC, LOG_MASK_DESC);
76
77#include <linux/amlogic/media/video_sink/vpp.h>
78#include "linux/amlogic/media/frame_provider/tvin/tvin_v4l2.h"
79#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
80#define DISPLAY_CANVAS_BASE_INDEX2 0x10
81#define DISPLAY_CANVAS_MAX_INDEX2 0x15
82#include "../common/rdma/rdma.h"
83#endif
84#include <linux/amlogic/media/video_sink/video.h>
85#include <linux/amlogic/media/codec_mm/configs.h>
86
87#include "../common/vfm/vfm.h"
88#include <linux/amlogic/media/amdolbyvision/dolby_vision.h>
89
90#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
91#include <linux/amlogic/pm.h>
92#endif
93
94#define VIDEO_PIP
95
96static u32 osd_vpp_misc;
97static u32 osd_vpp_misc_mask;
98static bool update_osd_vpp_misc;
99int video_vsync = -ENXIO;
100/*global video manage cmd. */
101
102static bool legacy_vpp = true;
103
104#define DEBUG_TMP 0
105
106static int video_global_output = 1;
107/* video_pause_global: 0 is play, 1 is pause, 2 is invalid */
108static int video_pause_global = 1;
109
110#ifdef CONFIG_GE2D_KEEP_FRAME
111/* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */
112/* #include <mach/mod_gate.h> */
113/* #endif */
114/* #include "mach/meson-secure.h" */
115#endif
116
117#if 1
118/*TODO for logo*/
119struct platform_resource_s {
120 char name[10];
121 int mem_start;
122 int mem_end;
123};
124#endif
125static int debugflags;
126static int output_fps;
127static u32 omx_pts;
128static u32 omx_pts_set_index;
129static bool omx_run;
130static u32 omx_version = 3;
131#define OMX_PTS_DV_DEFAULT_UPPER 2500
132#define OMX_PTS_DV_DEFAULT_LOWER -1600
133static int omx_pts_interval_upper = 11000;
134static int omx_pts_interval_lower = -5500;
135static int omx_pts_dv_upper = OMX_PTS_DV_DEFAULT_UPPER;
136static int omx_pts_dv_lower = OMX_PTS_DV_DEFAULT_LOWER;
137static int omx_pts_set_from_hwc_count;
138static bool omx_check_previous_session;
139static u32 omx_cur_session = 0xffffffff;
140static int drop_frame_count;
141#define OMX_MAX_COUNT_RESET_SYSTEMTIME 2
142static int receive_frame_count;
143static int display_frame_count;
144static int omx_need_drop_frame_num;
145static bool omx_drop_done;
146static bool video_start_post;
147static bool videopeek;
148static bool nopostvideostart;
149
150/*----omx_info bit0: keep_last_frame, bit1~31: unused----*/
151static u32 omx_info = 0x1;
152
153#define ENABLE_UPDATE_HDR_FROM_USER 0
154#if ENABLE_UPDATE_HDR_FROM_USER
155static struct vframe_master_display_colour_s vf_hdr;
156static bool has_hdr_info;
157#endif
158static DEFINE_MUTEX(omx_mutex);
159
160#define DURATION_GCD 750
161
162static bool bypass_cm;
163
164static bool bypass_pps = true;
165/*For 3D usage ----0: mbx 1: tv */
166bool platform_type = 1;
167
168/* for bit depth setting. */
169int bit_depth_flag = 8;
170
171bool omx_secret_mode;
172#define DEBUG_FLAG_FFPLAY (1<<0)
173#define DEBUG_FLAG_CALC_PTS_INC (1<<1)
174
175#define RECEIVER_NAME "amvideo"
176
177static s32 amvideo_poll_major;
178/*static s8 dolby_first_delay;*/ /* for bug 145902 */
179
180static int video_receiver_event_fun(int type, void *data, void *);
181
182static const struct vframe_receiver_op_s video_vf_receiver = {
183 .event_cb = video_receiver_event_fun
184};
185
186static struct vframe_receiver_s video_vf_recv;
187
188#ifdef VIDEO_PIP
189#define RECEIVERPIP_NAME "videopip"
190static int pip_receiver_event_fun(int type, void *data, void *);
191
192static const struct vframe_receiver_op_s videopip_vf_receiver = {
193 .event_cb = pip_receiver_event_fun
194};
195
196static struct vframe_receiver_s videopip_vf_recv;
197
198static struct vpp_frame_par_s *curpip_frame_par, *nextpip_frame_par;
199static struct vpp_frame_par_s pip_frame_parms[2];
200static struct vframe_s *cur_pipbuf;
201static struct vframe_s local_pip;
202static int _videopip_set_disable(u32 val);
203#endif
204
205static struct device *amvideo_dev;
206static struct device *amvideo_poll_dev;
207
208#define DRIVER_NAME "amvideo"
209#define MODULE_NAME "amvideo"
210#define DEVICE_NAME "amvideo"
211
212#ifdef CONFIG_AML_VSYNC_FIQ_ENABLE
213#define FIQ_VSYNC
214#endif
215
216/* #define SLOW_SYNC_REPEAT */
217/* #define INTERLACE_FIELD_MATCH_PROCESS */
218bool disable_slow_sync;
219
220#ifdef INTERLACE_FIELD_MATCH_PROCESS
221#define FIELD_MATCH_THRESHOLD 10
222static int field_matching_count;
223#endif
224
225#define M_PTS_SMOOTH_MAX 45000
226#define M_PTS_SMOOTH_MIN 2250
227#define M_PTS_SMOOTH_ADJUST 900
228static u32 underflow;
229static u32 next_peek_underflow;
230
231#define VIDEO_ENABLE_STATE_IDLE 0
232#define VIDEO_ENABLE_STATE_ON_REQ 1
233#define VIDEO_ENABLE_STATE_ON_PENDING 2
234#define VIDEO_ENABLE_STATE_OFF_REQ 3
235
236static DEFINE_SPINLOCK(video_onoff_lock);
237static int video_onoff_state = VIDEO_ENABLE_STATE_IDLE;
238static u32 video_onoff_time;
239static DEFINE_SPINLOCK(video2_onoff_lock);
240static int video2_onoff_state = VIDEO_ENABLE_STATE_IDLE;
241static u32 hdmiin_frame_check;
242static u32 hdmiin_frame_check_cnt;
243
244#ifdef FIQ_VSYNC
245#define BRIDGE_IRQ INT_TIMER_C
246#define BRIDGE_IRQ_SET() WRITE_CBUS_REG(ISA_TIMERC, 1)
247#endif
248
249#define VD1_MEM_POWER_ON() \
250 do { \
251 unsigned long flags; \
252 spin_lock_irqsave(&delay_work_lock, flags); \
253 vpu_delay_work_flag &= ~VPU_DELAYWORK_MEM_POWER_OFF_VD1; \
254 spin_unlock_irqrestore(&delay_work_lock, flags); \
255 switch_vpu_mem_pd_vmod(VPU_VIU_VD1, VPU_MEM_POWER_ON); \
256 switch_vpu_mem_pd_vmod(VPU_AFBC_DEC, VPU_MEM_POWER_ON); \
257 switch_vpu_mem_pd_vmod(VPU_DI_POST, VPU_MEM_POWER_ON); \
258 if (!legacy_vpp) \
259 switch_vpu_mem_pd_vmod( \
260 VPU_VD1_SCALE, VPU_MEM_POWER_ON); \
261 } while (0)
262#define VD2_MEM_POWER_ON() \
263 do { \
264 unsigned long flags; \
265 spin_lock_irqsave(&delay_work_lock, flags); \
266 vpu_delay_work_flag &= ~VPU_DELAYWORK_MEM_POWER_OFF_VD2; \
267 spin_unlock_irqrestore(&delay_work_lock, flags); \
268 switch_vpu_mem_pd_vmod(VPU_VIU_VD2, VPU_MEM_POWER_ON); \
269 switch_vpu_mem_pd_vmod(VPU_AFBC_DEC1, VPU_MEM_POWER_ON); \
270 if (!legacy_vpp) \
271 switch_vpu_mem_pd_vmod( \
272 VPU_VD2_SCALE, VPU_MEM_POWER_ON); \
273 } while (0)
274#define VD1_MEM_POWER_OFF() \
275 do { \
276 unsigned long flags; \
277 spin_lock_irqsave(&delay_work_lock, flags); \
278 vpu_delay_work_flag |= VPU_DELAYWORK_MEM_POWER_OFF_VD1; \
279 vpu_mem_power_off_count = VPU_MEM_POWEROFF_DELAY; \
280 spin_unlock_irqrestore(&delay_work_lock, flags); \
281 } while (0)
282#define VD2_MEM_POWER_OFF() \
283 do { \
284 unsigned long flags; \
285 spin_lock_irqsave(&delay_work_lock, flags); \
286 vpu_delay_work_flag |= VPU_DELAYWORK_MEM_POWER_OFF_VD2; \
287 vpu_mem_power_off_count = VPU_MEM_POWEROFF_DELAY; \
288 spin_unlock_irqrestore(&delay_work_lock, flags); \
289 } while (0)
290
291#define VIDEO_LAYER_ON() \
292 do { \
293 unsigned long flags; \
294 spin_lock_irqsave(&video_onoff_lock, flags); \
295 video_onoff_state = VIDEO_ENABLE_STATE_ON_REQ; \
296 video_enabled = 1; \
297 video_status_saved = 1; \
298 spin_unlock_irqrestore(&video_onoff_lock, flags); \
299 } while (0)
300
301#define VIDEO_LAYER_OFF() \
302 do { \
303 unsigned long flags; \
304 spin_lock_irqsave(&video_onoff_lock, flags); \
305 video_onoff_state = VIDEO_ENABLE_STATE_OFF_REQ; \
306 video_enabled = 0; \
307 video_status_saved = 0; \
308 spin_unlock_irqrestore(&video_onoff_lock, flags); \
309 } while (0)
310
311#define VIDEO_LAYER2_ON() \
312 do { \
313 unsigned long flags; \
314 spin_lock_irqsave(&video2_onoff_lock, flags); \
315 video2_onoff_state = VIDEO_ENABLE_STATE_ON_REQ; \
316 video2_enabled = 1; \
317 video2_status_saved = 1; \
318 spin_unlock_irqrestore(&video2_onoff_lock, flags); \
319 } while (0)
320
321#define VIDEO_LAYER2_OFF() \
322 do { \
323 unsigned long flags; \
324 spin_lock_irqsave(&video2_onoff_lock, flags); \
325 video2_onoff_state = VIDEO_ENABLE_STATE_OFF_REQ; \
326 video2_enabled = 0; \
327 video2_status_saved = 0; \
328 spin_unlock_irqrestore(&video2_onoff_lock, flags); \
329 } while (0)
330
331#define EnableVideoLayer() \
332 do { \
333 VD1_MEM_POWER_ON(); \
334 VIDEO_LAYER_ON(); \
335 } while (0)
336
337#define EnableVideoLayer2() \
338 do { \
339 VD2_MEM_POWER_ON(); \
340 VIDEO_LAYER2_ON(); \
341 } while (0)
342
343#define VSYNC_EnableVideoLayer2() \
344 do { \
345 VD2_MEM_POWER_ON(); \
346 VSYNC_WR_MPEG_REG(VPP_MISC + cur_dev->vpp_off, \
347 READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off) |\
348 VPP_VD2_PREBLEND | (0x1ff << VPP_VD2_ALPHA_BIT)); \
349 } while (0)
350
351#define DisableVideoLayer() \
352 do { \
353 CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
354 VPP_VD1_PREBLEND | VPP_VD1_POSTBLEND); \
355 if (!legacy_vpp) { \
356 WRITE_VCBUS_REG( \
357 VD1_BLEND_SRC_CTRL + cur_dev->vpp_off, 0); \
358 } \
359 WRITE_VCBUS_REG(AFBC_ENABLE, 0);\
360 VIDEO_LAYER_OFF(); \
361 VD1_MEM_POWER_OFF(); \
362 if (debug_flag & DEBUG_FLAG_BLACKOUT) { \
363 pr_info("DisableVideoLayer()\n"); \
364 } \
365 } while (0)
366
367#define DisableVideoLayer_NoDelay() \
368 do { \
369 CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
370 VPP_VD1_PREBLEND | VPP_VD2_PREBLEND|\
371 VPP_VD2_POSTBLEND | VPP_VD1_POSTBLEND); \
372 if (!legacy_vpp) { \
373 WRITE_VCBUS_REG( \
374 VD1_BLEND_SRC_CTRL + cur_dev->vpp_off, 0); \
375 } \
376 WRITE_VCBUS_REG(AFBC_ENABLE, 0);\
377 if (debug_flag & DEBUG_FLAG_BLACKOUT) { \
378 pr_info("DisableVideoLayer_NoDelay()\n"); \
379 } \
380 } while (0)
381
382#define DisableVideoLayer2() \
383 do { \
384 CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
385 VPP_VD2_POSTBLEND | VPP_VD2_PREBLEND); \
386 VIDEO_LAYER2_OFF(); \
387 VD2_MEM_POWER_OFF(); \
388 } while (0)
389
390#define DisableVideoLayer_PREBELEND() \
391 do { CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
392 VPP_VD1_PREBLEND | VPP_VD2_PREBLEND); \
393 WRITE_VCBUS_REG(AFBC_ENABLE, 0);\
394 if (debug_flag & DEBUG_FLAG_BLACKOUT) { \
395 pr_info("DisableVideoLayer_PREBELEND()\n"); \
396 } \
397 } while (0)
398
399/*********************************************************/
400#if DEBUG_TMP
401static struct switch_dev video1_state_sdev = {
402/* android video layer switch device */
403 .name = "video_layer1",
404};
405#endif
406
407static DEFINE_MUTEX(video_layer_mutex);
408
409static u32 layer_cap;
410
411static struct disp_info_s glayer_info[MAX_VD_LAYERS];
412
413static u32 reference_zorder = 128;
414
415#define MAX_ZOOM_RATIO 300
416
417#define VPP_PREBLEND_VD_V_END_LIMIT 2304
418
419#define DUR2PTS(x) ((x) - ((x) >> 4))
420#define DUR2PTS_RM(x) ((x) & 0xf)
421#define PTS2DUR(x) (((x) << 4) / 15)
422
423#ifdef VIDEO_PTS_CHASE
424static int vpts_chase;
425static int av_sync_flag;
426static int vpts_chase_counter;
427static int vpts_chase_pts_diff;
428#endif
429
430static int step_enable;
431static int step_flag;
432
433/*seek values on.video_define.h*/
434static int debug_flag;
435int get_video_debug_flags(void)
436{
437 return debug_flag;
438}
439
440/* DEBUG_FLAG_BLACKOUT; */
441
442static int vsync_enter_line_max;
443static int vsync_exit_line_max;
444
445#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
446static int vsync_rdma_line_max;
447#endif
448static u32 framepacking_support __nosavedata;
449static unsigned int framepacking_width = 1920;
450static unsigned int framepacking_height = 2205;
451static unsigned int framepacking_blank = 45;
452static unsigned int process_3d_type;
453static unsigned int last_process_3d_type;
454#ifdef TV_3D_FUNCTION_OPEN
455/* toggle_3d_fa_frame is for checking the vpts_expire in 2 vsnyc */
456static int toggle_3d_fa_frame = 1;
457/*the pause_one_3d_fl_frame is for close*/
458/*the A/B register switch in every sync at pause mode. */
459static int pause_one_3d_fl_frame;
460MODULE_PARM_DESC(pause_one_3d_fl_frame, "\n pause_one_3d_fl_frame\n");
461module_param(pause_one_3d_fl_frame, uint, 0664);
462
463/*debug info control for skip & repeate vframe case*/
464static unsigned int video_dbg_vf;
465MODULE_PARM_DESC(video_dbg_vf, "\n video_dbg_vf\n");
466module_param(video_dbg_vf, uint, 0664);
467
468static unsigned int video_get_vf_cnt;
469static unsigned int video_drop_vf_cnt;
470MODULE_PARM_DESC(video_drop_vf_cnt, "\n video_drop_vf_cnt\n");
471module_param(video_drop_vf_cnt, uint, 0664);
472
473enum toggle_out_fl_frame_e {
474 OUT_FA_A_FRAME,
475 OUT_FA_BANK_FRAME,
476 OUT_FA_B_FRAME
477};
478
479static unsigned int video_3d_format;
480static unsigned int mvc_flag;
481static unsigned int force_3d_scaler = 3;
482static int mode_3d_changed;
483static int last_mode_3d;
484#endif
485
486#ifdef TV_REVERSE
487bool reverse;
488#endif
489
490const char video_dev_id[] = "amvideo-dev";
491
492const char video_dev_id2[] = "amvideo-dev2";
493
494int onwaitendframe;
495
496static u32 vpp_hold_line = 8;
497static u32 stop_update;
498
499struct video_dev_s video_dev[2] = {
500 {0x1d00 - 0x1d00, 0x1a50 - 0x1a50},
501 {0x1900 - 0x1d00, 0x1e00 - 0x1a50}
502};
503
504struct video_dev_s *cur_dev = &video_dev[0];
505struct video_dev_s *get_video_cur_dev(void)
506{
507 return cur_dev;
508}
509static int cur_dev_idx;
510
511#ifdef CONFIG_PM
512struct video_pm_state_s {
513 int event;
514 u32 vpp_misc;
515 int mem_pd_vd1;
516 int mem_pd_vd2;
517 int mem_pd_di_post;
518};
519#endif
520
521#define PTS_LOGGING
522#define PTS_THROTTLE
523/* #define PTS_TRACE_DEBUG */
524/* #define PTS_TRACE_START */
525
526#ifdef PTS_TRACE_DEBUG
527static int pts_trace_his[16];
528static u32 pts_his[16];
529static u32 scr_his[16];
530static int pts_trace_his_rd;
531#endif
532
533#if defined(PTS_LOGGING) || defined(PTS_TRACE_DEBUG)
534static int pts_trace;
535#endif
536
537#if defined(PTS_LOGGING)
538#define PTS_32_PATTERN_DETECT_RANGE 10
539#define PTS_22_PATTERN_DETECT_RANGE 10
540#define PTS_41_PATTERN_DETECT_RANGE 2
541
542enum video_refresh_pattern {
543 PTS_32_PATTERN = 0,
544 PTS_22_PATTERN,
545 PTS_41_PATTERN,
546 PTS_MAX_NUM_PATTERNS
547};
548
549int n_patterns = PTS_MAX_NUM_PATTERNS;
550
551static int pts_pattern[3] = {0, 0, 0};
552static int pts_pattern_enter_cnt[3] = {0, 0, 0};
553static int pts_pattern_exit_cnt[3] = {0, 0, 0};
554static int pts_log_enable[3] = {0, 0, 0};
555static int pre_pts_trace;
556static int pts_escape_vsync = -1;
557
558#define PTS_41_PATTERN_SINK_MAX 4
559static int pts_41_pattern_sink[PTS_41_PATTERN_SINK_MAX];
560static int pts_41_pattern_sink_index;
561static int pts_pattern_detected = -1;
562static bool pts_enforce_pulldown = true;
563#endif
564
565static DEFINE_MUTEX(video_module_mutex);
566static DEFINE_MUTEX(video_inuse_mutex);
567static DEFINE_SPINLOCK(lock);
568#if ENABLE_UPDATE_HDR_FROM_USER
569static DEFINE_SPINLOCK(omx_hdr_lock);
570#endif
571static u32 frame_par_ready_to_set, frame_par_force_to_set;
572static u32 vpts_remainder;
573static int video_property_changed;
574static u32 video_notify_flag;
575static int enable_video_discontinue_report = 1;
576
577#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
578static u32 video_scaler_mode;
579static int content_top = 0, content_left = 0, content_w = 0, content_h;
580static int scaler_pos_changed;
581#endif
582
583#ifndef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
584bool is_dolby_vision_enable(void)
585{
586 return 0;
587}
588bool is_dolby_vision_on(void)
589{
590 return 0;
591}
592bool is_dolby_vision_stb_mode(void)
593{
594 return 0;
595}
596#endif
597
598static struct amvideocap_req *capture_frame_req;
599u32 get_video_angle(void)
600{
601 return glayer_info[0].angle;
602}
603EXPORT_SYMBOL(get_video_angle);
604
605/*for video related files only.*/
606void video_module_lock(void)
607{
608 mutex_lock(&video_module_mutex);
609}
610void video_module_unlock(void)
611{
612 mutex_unlock(&video_module_mutex);
613}
614
615int video_property_notify(int flag)
616{
617 video_property_changed = flag;
618 return 0;
619}
620
621#if defined(PTS_LOGGING)
622static ssize_t pts_pattern_enter_cnt_read_file(struct file *file,
623 char __user *userbuf, size_t count, loff_t *ppos)
624{
625 char buf[20];
626 ssize_t len;
627
628 len = snprintf(buf, 20, "%d,%d,%d\n", pts_pattern_enter_cnt[0],
629 pts_pattern_enter_cnt[1], pts_pattern_enter_cnt[2]);
630 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
631}
632
633static ssize_t pts_pattern_exit_cnt_read_file(struct file *file,
634 char __user *userbuf, size_t count, loff_t *ppos)
635{
636 char buf[20];
637 ssize_t len;
638
639 len = snprintf(buf, 20, "%d,%d,%d\n", pts_pattern_exit_cnt[0],
640 pts_pattern_exit_cnt[1], pts_pattern_exit_cnt[2]);
641 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
642}
643
644static ssize_t pts_log_enable_read_file(struct file *file,
645 char __user *userbuf, size_t count, loff_t *ppos)
646{
647 char buf[20];
648 ssize_t len;
649
650 len = snprintf(buf, 20, "%d,%d,%d\n", pts_log_enable[0],
651 pts_log_enable[1], pts_log_enable[2]);
652 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
653}
654
655static ssize_t pts_log_enable_write_file(struct file *file,
656 const char __user *userbuf, size_t count, loff_t *ppos)
657{
658 char buf[20];
659 int ret;
660
661 count = min_t(size_t, count, (sizeof(buf)-1));
662 if (copy_from_user(buf, userbuf, count))
663 return -EFAULT;
664 buf[count] = 0;
665 /* pts_pattern_log_enable (3:2) (2:2) (4:1) */
666 ret = sscanf(buf, "%d,%d,%d", &pts_log_enable[0], &pts_log_enable[1],
667 &pts_log_enable[2]);
668 if (ret != 3) {
669 pr_info("use echo 0/1,0/1,0/1 > /sys/kernel/debug/pts_log_enable\n");
670 } else {
671 pr_info("pts_log_enable: %d,%d,%d\n", pts_log_enable[0],
672 pts_log_enable[1], pts_log_enable[2]);
673 }
674 return count;
675}
676static ssize_t pts_enforce_pulldown_read_file(struct file *file,
677 char __user *userbuf, size_t count, loff_t *ppos)
678{
679 char buf[16];
680 ssize_t len;
681
682 len = snprintf(buf, 16, "%d\n", pts_enforce_pulldown);
683 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
684}
685
686static ssize_t pts_enforce_pulldown_write_file(struct file *file,
687 const char __user *userbuf, size_t count, loff_t *ppos)
688{
689 unsigned int write_val;
690 char buf[16];
691 int ret;
692
693 count = min_t(size_t, count, (sizeof(buf)-1));
694 if (copy_from_user(buf, userbuf, count))
695 return -EFAULT;
696 buf[count] = 0;
697 ret = kstrtoint(buf, 0, &write_val);
698 if (ret != 0)
699 return -EINVAL;
700 pr_info("pts_enforce_pulldown: %d->%d\n",
701 pts_enforce_pulldown, write_val);
702 pts_enforce_pulldown = write_val;
703 return count;
704}
705
706static const struct file_operations pts_pattern_enter_cnt_file_ops = {
707 .open = simple_open,
708 .read = pts_pattern_enter_cnt_read_file,
709};
710
711static const struct file_operations pts_pattern_exit_cnt_file_ops = {
712 .open = simple_open,
713 .read = pts_pattern_exit_cnt_read_file,
714};
715
716static const struct file_operations pts_log_enable_file_ops = {
717 .open = simple_open,
718 .read = pts_log_enable_read_file,
719 .write = pts_log_enable_write_file,
720};
721
722static const struct file_operations pts_enforce_pulldown_file_ops = {
723 .open = simple_open,
724 .read = pts_enforce_pulldown_read_file,
725 .write = pts_enforce_pulldown_write_file,
726};
727#endif
728
729struct video_debugfs_files_s {
730 const char *name;
731 const umode_t mode;
732 const struct file_operations *fops;
733};
734
735static struct video_debugfs_files_s video_debugfs_files[] = {
736#if defined(PTS_LOGGING)
737 {"pts_pattern_enter_cnt", S_IFREG | 0444,
738 &pts_pattern_enter_cnt_file_ops
739 },
740 {"pts_pattern_exit_cnt", S_IFREG | 0444,
741 &pts_pattern_exit_cnt_file_ops
742 },
743 {"pts_log_enable", S_IFREG | 0644,
744 &pts_log_enable_file_ops
745 },
746 {"pts_enforce_pulldown", S_IFREG | 0644,
747 &pts_enforce_pulldown_file_ops
748 },
749#endif
750};
751
752static struct dentry *video_debugfs_root;
753static void video_debugfs_init(void)
754{
755 struct dentry *ent;
756 int i;
757
758 if (video_debugfs_root)
759 return;
760 video_debugfs_root = debugfs_create_dir("video", NULL);
761 if (!video_debugfs_root)
762 pr_err("can't create video debugfs dir\n");
763
764 for (i = 0; i < ARRAY_SIZE(video_debugfs_files); i++) {
765 ent = debugfs_create_file(video_debugfs_files[i].name,
766 video_debugfs_files[i].mode,
767 video_debugfs_root, NULL,
768 video_debugfs_files[i].fops);
769 if (!ent)
770 pr_info("debugfs create file %s failed\n",
771 video_debugfs_files[i].name);
772 }
773}
774
775static void video_debugfs_exit(void)
776{
777 debugfs_remove(video_debugfs_root);
778}
779
780#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
781int video_scaler_notify(int flag)
782{
783 video_scaler_mode = flag;
784 video_property_changed = 1;
785 return 0;
786}
787
788u32 amvideo_get_scaler_para(int *x, int *y, int *w, int *h, u32 *ratio)
789{
790 *x = content_left;
791 *y = content_top;
792 *w = content_w;
793 *h = content_h;
794 /* *ratio = 100; */
795 return video_scaler_mode;
796}
797
798void amvideo_set_scaler_para(int x, int y, int w, int h, int flag)
799{
800 struct disp_info_s *layer = &glayer_info[0];
801
802 mutex_lock(&video_module_mutex);
803 if (w < 2)
804 w = 0;
805 if (h < 2)
806 h = 0;
807 if (flag) {
808 if ((content_left != x) || (content_top != y)
809 || (content_w != w) || (content_h != h))
810 scaler_pos_changed = 1;
811 content_left = x;
812 content_top = y;
813 content_w = w;
814 content_h = h;
815 } else {
816 layer->layer_left = x;
817 layer->layer_top = y;
818 layer->layer_width = w;
819 layer->layer_height = h;
820 }
821 video_property_changed = 1;
822 mutex_unlock(&video_module_mutex);
823}
824
825u32 amvideo_get_scaler_mode(void)
826{
827 return video_scaler_mode;
828}
829#endif
830
831bool to_notify_trick_wait;
832/* display canvas */
833#define DISPLAY_CANVAS_BASE_INDEX 0x60
834
835#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
836static struct vframe_s *cur_rdma_buf;
837/*
838 *void vsync_rdma_config(void);
839 *void vsync_rdma_config_pre(void);
840 *bool is_vsync_rdma_enable(void);
841 *void start_rdma(void);
842 *void enable_rdma_log(int flag);
843 */
844static int enable_rdma_log_count;
845
846bool rdma_enable_pre;
847
848u32 disp_canvas_index[2][6] = {
849 {
850 DISPLAY_CANVAS_BASE_INDEX,
851 DISPLAY_CANVAS_BASE_INDEX + 1,
852 DISPLAY_CANVAS_BASE_INDEX + 2,
853 DISPLAY_CANVAS_BASE_INDEX + 3,
854 DISPLAY_CANVAS_BASE_INDEX + 4,
855 DISPLAY_CANVAS_BASE_INDEX + 5,
856 },
857 {
858 DISPLAY_CANVAS_BASE_INDEX2,
859 DISPLAY_CANVAS_BASE_INDEX2 + 1,
860 DISPLAY_CANVAS_BASE_INDEX2 + 2,
861 DISPLAY_CANVAS_BASE_INDEX2 + 3,
862 DISPLAY_CANVAS_BASE_INDEX2 + 4,
863 DISPLAY_CANVAS_BASE_INDEX2 + 5,
864 }
865};
866
867static u32 disp_canvas[2][2];
868static u32 rdma_canvas_id;
869static u32 next_rdma_canvas_id = 1;
870
871#ifdef VIDEO_PIP
872static u32 pip_rdma_canvas_id;
873static u32 pip_next_rdma_canvas_id = 1;
874static struct vframe_s *pip_rdma_buf;
875static struct vframe_s *pipbuf_to_put;
876#endif
877
878#define DISPBUF_TO_PUT_MAX 8
879static struct vframe_s *dispbuf_to_put[DISPBUF_TO_PUT_MAX];
880static int dispbuf_to_put_num;
881#else
882static u32 disp_canvas_index[6] = {
883 DISPLAY_CANVAS_BASE_INDEX,
884 DISPLAY_CANVAS_BASE_INDEX + 1,
885 DISPLAY_CANVAS_BASE_INDEX + 2,
886 DISPLAY_CANVAS_BASE_INDEX + 3,
887 DISPLAY_CANVAS_BASE_INDEX + 4,
888 DISPLAY_CANVAS_BASE_INDEX + 5,
889};
890
891static u32 disp_canvas[2];
892#endif
893
894static u32 post_canvas;
895
896
897/* zoom information */
898static u32 zoom_start_x_lines;
899static u32 zoom_end_x_lines;
900static u32 zoom_start_y_lines;
901static u32 zoom_end_y_lines;
902
903static u32 ori_start_x_lines;
904static u32 ori_end_x_lines;
905static u32 ori_start_y_lines;
906static u32 ori_end_y_lines;
907
908static u32 zoom2_start_x_lines;
909static u32 zoom2_end_x_lines;
910static u32 zoom2_start_y_lines;
911static u32 zoom2_end_y_lines;
912
913static u32 ori2_start_x_lines;
914static u32 ori2_end_x_lines;
915static u32 ori2_start_y_lines;
916static u32 ori2_end_y_lines;
917
918/* black out policy */
919#if defined(CONFIG_JPEGLOGO)
920static u32 blackout;
921#else
922static u32 blackout = 1;
923#endif
924static u32 force_blackout;
925
926/* disable video */
927
928#ifdef VIDEO_PIP
929static u32 pip_frame_count;
930static u32 disable_videopip = VIDEO_DISABLE_FORNEXT;
931static int pip_property_changed;
932static u32 pip_frame_ready_to_set;
933static u32 pip_global_output = 1;
934#if 0
935static u32 pip_v_skip;
936static u32 pip_h_skip;
937static u32 pip_start_x_lines;
938static u32 pip_end_x_lines;
939static u32 pip_start_y_lines;
940static u32 pip_end_y_lines;
941#endif
942static u32 pip_loop;
943#endif
944
945static u32 disable_video = VIDEO_DISABLE_NONE;
946static u32 video_enabled __nosavedata;
947static u32 video2_enabled __nosavedata;
948static u32 video_status_saved __nosavedata;
949static u32 video2_status_saved __nosavedata;
950static u32 hold_video;
951
952u32 get_video_enabled(void)
953{
954 return video_enabled;
955}
956/* show first frame*/
957static bool show_first_frame_nosync;
958bool show_first_picture;
959/* static bool first_frame=false; */
960
961/* test screen*/
962static u32 test_screen;
963/* rgb screen*/
964static u32 rgb_screen;
965
966/* video frame repeat count */
967static u32 frame_repeat_count;
968
969/* vout */
970static const struct vinfo_s *vinfo;
971
972/* config */
973static struct vframe_s *cur_dispbuf;
974static struct vframe_s *cur_dispbuf2;
975static bool need_disable_vd2;
976static bool last_mvc_status;
977void update_cur_dispbuf(void *buf)
978{
979 cur_dispbuf = buf;
980}
981
982static struct vframe_s vf_local, vf_local2;
983static u32 vsync_pts_inc;
984static u32 vsync_pts_inc_scale;
985static u32 vsync_pts_inc_scale_base = 1;
986static u32 vsync_pts_inc_upint;
987static u32 vsync_pts_inc_adj;
988static u32 vsync_pts_125;
989static u32 vsync_pts_112;
990static u32 vsync_pts_101;
991static u32 vsync_pts_100;
992static u32 vsync_freerun;
993/* extend this value to support both slow and fast playback
994 * 0,1: normal playback
995 * [2,1000]: speed/vsync_slow_factor
996 * >1000: speed*(vsync_slow_factor/1000000)
997 */
998static u32 vsync_slow_factor = 1;
999
1000/* pts alignment */
1001static bool vsync_pts_aligned;
1002static s32 vsync_pts_align;
1003
1004/* frame rate calculate */
1005static u32 last_frame_count;
1006static u32 frame_count;
1007static u32 new_frame_count;
1008static u32 first_frame_toggled;
1009static u32 toggle_count;
1010static u32 last_frame_time;
1011static u32 timer_count;
1012static u32 vsync_count;
1013static u64 last_frame_duration;
1014
1015static struct vpp_frame_par_s *cur_frame_par, *next_frame_par;
1016static struct vpp_frame_par_s frame_parms[2];
1017
1018/* vsync pass flag */
1019static u32 wait_sync;
1020
1021/* is fffb or seeking*/
1022static u32 video_seek_flag;
1023
1024#ifdef FIQ_VSYNC
1025static bridge_item_t vsync_fiq_bridge;
1026#endif
1027
1028/* trickmode i frame*/
1029u32 trickmode_i;
1030EXPORT_SYMBOL(trickmode_i);
1031
1032/* trickmode ff/fb */
1033u32 trickmode_fffb;
1034atomic_t trickmode_framedone = ATOMIC_INIT(0);
1035atomic_t video_sizechange = ATOMIC_INIT(0);
1036atomic_t video_unreg_flag = ATOMIC_INIT(0);
1037atomic_t video_inirq_flag = ATOMIC_INIT(0);
1038atomic_t video_pause_flag = ATOMIC_INIT(0);
1039int trickmode_duration;
1040int trickmode_duration_count;
1041u32 trickmode_vpts;
1042/* last_playback_filename */
1043char file_name[512];
1044
1045/* video freerun mode */
1046#define FREERUN_NONE 0 /* no freerun mode */
1047#define FREERUN_NODUR 1 /* freerun without duration */
1048#define FREERUN_DUR 2 /* freerun with duration */
1049static u32 freerun_mode;
1050static u32 slowsync_repeat_enable;
1051static bool dmc_adjust = true;
1052module_param_named(dmc_adjust, dmc_adjust, bool, 0644);
1053static u32 dmc_config_state;
1054static u32 last_toggle_count;
1055static u32 toggle_same_count;
1056
1057/* video_inuse */
1058static u32 video_inuse;
1059
1060void set_freerun_mode(int mode)
1061{
1062 freerun_mode = mode;
1063}
1064EXPORT_SYMBOL(set_freerun_mode);
1065
1066void set_pts_realign(void)
1067{
1068 vsync_pts_aligned = false;
1069}
1070EXPORT_SYMBOL(set_pts_realign);
1071
1072static const enum f2v_vphase_type_e vpp_phase_table[4][3] = {
1073 {F2V_P2IT, F2V_P2IB, F2V_P2P}, /* VIDTYPE_PROGRESSIVE */
1074 {F2V_IT2IT, F2V_IT2IB, F2V_IT2P}, /* VIDTYPE_INTERLACE_TOP */
1075 {F2V_P2IT, F2V_P2IB, F2V_P2P},
1076 {F2V_IB2IT, F2V_IB2IB, F2V_IB2P} /* VIDTYPE_INTERLACE_BOTTOM */
1077};
1078
1079static const u8 skip_tab[6] = { 0x24, 0x04, 0x68, 0x48, 0x28, 0x08 };
1080
1081/* wait queue for poll */
1082static wait_queue_head_t amvideo_trick_wait;
1083
1084/* wait queue for poll */
1085static wait_queue_head_t amvideo_sizechange_wait;
1086
1087#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
1088#define VPU_DELAYWORK_VPU_CLK 1
1089#define VPU_DELAYWORK_MEM_POWER_OFF_VD1 2
1090#define VPU_DELAYWORK_MEM_POWER_OFF_VD2 4
1091#define VPU_DELAYWORK_MEM_POWER_OFF_PROT 8
1092#define VPU_VIDEO_LAYER1_CHANGED 16
1093#define VPU_UPDATE_DOLBY_VISION 32
1094
1095#define VPU_MEM_POWEROFF_DELAY 100
1096static struct work_struct vpu_delay_work;
1097static int vpu_clk_level;
1098static DEFINE_SPINLOCK(delay_work_lock);
1099static int vpu_delay_work_flag;
1100static int vpu_mem_power_off_count;
1101#endif
1102
1103static u32 vpts_ref;
1104static u32 video_frame_repeat_count;
1105static u32 smooth_sync_enable;
1106static u32 hdmi_in_onvideo;
1107#ifdef CONFIG_AM_VIDEO2
1108static int video_play_clone_rate = 60;
1109static int android_clone_rate = 30;
1110static int noneseamless_play_clone_rate = 5;
1111#endif
1112
1113#define CONFIG_AM_VOUT
1114
1115void safe_disble_videolayer(void)
1116{
1117#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
1118 if (video_scaler_mode)
1119 DisableVideoLayer_PREBELEND();
1120 else
1121 DisableVideoLayer();
1122#else
1123 DisableVideoLayer();
1124#endif
1125}
1126
1127
1128/*********************************************************/
1129#ifdef VIDEO_PIP
1130static inline struct vframe_s *pip_vf_peek(void)
1131{
1132 if (pip_loop)
1133 return cur_dispbuf;
1134 return vf_peek(RECEIVERPIP_NAME);
1135}
1136
1137static inline struct vframe_s *pip_vf_get(void)
1138{
1139 struct vframe_s *vf = NULL;
1140
1141 if (pip_loop)
1142 return cur_dispbuf;
1143
1144 vf = vf_get(RECEIVERPIP_NAME);
1145
1146 if (vf) {
1147 /* video_notify_flag |= VIDEO_NOTIFY_PROVIDER_GET; */
1148 atomic_set(&vf->use_cnt, 1);
1149 }
1150 return vf;
1151
1152}
1153
1154#if 0
1155static int pip_vf_get_states(struct vframe_states *states)
1156{
1157 int ret = -1;
1158 unsigned long flags;
1159
1160 spin_lock_irqsave(&lock, flags);
1161 ret = vf_get_states_by_name(RECEIVERPIP_NAME, states);
1162 spin_unlock_irqrestore(&lock, flags);
1163 return ret;
1164}
1165#endif
1166
1167static inline void pip_vf_put(struct vframe_s *vf)
1168{
1169 struct vframe_provider_s *vfp = vf_get_provider(RECEIVERPIP_NAME);
1170
1171 if (pip_loop)
1172 return;
1173
1174 if (vfp && vf && atomic_dec_and_test(&vf->use_cnt)) {
1175 vf_put(vf, RECEIVERPIP_NAME);
1176 /* video_notify_flag |= VIDEO_NOTIFY_PROVIDER_PUT; */
1177 }
1178}
1179#endif
1180
1181static inline struct vframe_s *video_vf_peek(void)
1182{
1183 struct vframe_s *vf = vf_peek(RECEIVER_NAME);
1184
1185 if (vf && vf->disp_pts && vf->disp_pts_us64) {
1186 vf->pts = vf->disp_pts;
1187 vf->pts_us64 = vf->disp_pts_us64;
1188 vf->disp_pts = 0;
1189 vf->disp_pts_us64 = 0;
1190 }
1191 return vf;
1192}
1193
1194static inline struct vframe_s *video_vf_get(void)
1195{
1196 struct vframe_s *vf = NULL;
1197 int frame_width, frame_height;
1198
1199 vf = vf_get(RECEIVER_NAME);
1200
1201 if (vf) {
1202 if (vf->disp_pts && vf->disp_pts_us64) {
1203 vf->pts = vf->disp_pts;
1204 vf->pts_us64 = vf->disp_pts_us64;
1205 vf->disp_pts = 0;
1206 vf->disp_pts_us64 = 0;
1207 }
1208 if (vf->type & VIDTYPE_COMPRESS) {
1209 frame_width = vf->compWidth;
1210 frame_height = vf->compHeight;
1211 } else {
1212 frame_width = vf->width;
1213 frame_height = vf->height;
1214 }
1215 video_notify_flag |= VIDEO_NOTIFY_PROVIDER_GET;
1216 atomic_set(&vf->use_cnt, 1);
1217 /*always to 1,for first get from vfm provider */
1218 if ((vf->type & VIDTYPE_MVC) && (framepacking_support)
1219 &&(framepacking_width) && (framepacking_height)) {
1220 vf->width = framepacking_width;
1221 vf->height = framepacking_height;
1222 }
1223#ifdef TV_3D_FUNCTION_OPEN
1224 /*can be moved to h264mvc.c */
1225 if ((vf->type & VIDTYPE_MVC)
1226 && (process_3d_type & MODE_3D_ENABLE) && vf->trans_fmt) {
1227 vf->type = VIDTYPE_PROGRESSIVE | VIDTYPE_VIU_FIELD;
1228 process_3d_type |= MODE_3D_MVC;
1229 mvc_flag = 1;
1230 } else {
1231 process_3d_type &= (~MODE_3D_MVC);
1232 mvc_flag = 0;
1233 }
1234 if (((process_3d_type & MODE_FORCE_3D_TO_2D_LR)
1235 || (process_3d_type & MODE_FORCE_3D_LR)
1236 || (process_3d_type & MODE_FORCE_3D_FA_LR))
1237 && (!(vf->type & VIDTYPE_MVC))
1238 && (vf->trans_fmt != TVIN_TFMT_3D_FP)) {
1239 vf->trans_fmt = TVIN_TFMT_3D_DET_LR;
1240 vf->left_eye.start_x = 0;
1241 vf->left_eye.start_y = 0;
1242 vf->left_eye.width = frame_width / 2;
1243 vf->left_eye.height = frame_height;
1244
1245 vf->right_eye.start_x = frame_width / 2;
1246 vf->right_eye.start_y = 0;
1247 vf->right_eye.width = frame_width / 2;
1248 vf->right_eye.height = frame_height;
1249 }
1250 if (((process_3d_type & MODE_FORCE_3D_TO_2D_TB)
1251 || (process_3d_type & MODE_FORCE_3D_TB)
1252 || (process_3d_type & MODE_FORCE_3D_FA_TB))
1253 && (!(vf->type & VIDTYPE_MVC))
1254 && (vf->trans_fmt != TVIN_TFMT_3D_FP)) {
1255 vf->trans_fmt = TVIN_TFMT_3D_TB;
1256 vf->left_eye.start_x = 0;
1257 vf->left_eye.start_y = 0;
1258 vf->left_eye.width = frame_width;
1259 vf->left_eye.height = frame_height/2;
1260
1261 vf->right_eye.start_x = 0;
1262 vf->right_eye.start_y = frame_height/2;
1263 vf->right_eye.width = frame_width;
1264 vf->right_eye.height = frame_height/2;
1265 }
1266 receive_frame_count++;
1267#endif
1268 }
1269 return vf;
1270
1271}
1272
1273static int video_vf_get_states(struct vframe_states *states)
1274{
1275 int ret = -1;
1276 unsigned long flags;
1277
1278 spin_lock_irqsave(&lock, flags);
1279 ret = vf_get_states_by_name(RECEIVER_NAME, states);
1280 spin_unlock_irqrestore(&lock, flags);
1281 return ret;
1282}
1283
1284static inline void video_vf_put(struct vframe_s *vf)
1285{
1286 struct vframe_provider_s *vfp = vf_get_provider(RECEIVER_NAME);
1287
1288 if (vfp && vf && atomic_dec_and_test(&vf->use_cnt)) {
1289 vf_put(vf, RECEIVER_NAME);
1290#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
1291 if (is_dolby_vision_enable())
1292 dolby_vision_vf_put(vf);
1293#endif
1294 video_notify_flag |= VIDEO_NOTIFY_PROVIDER_PUT;
1295 }
1296}
1297
1298int ext_get_cur_video_frame(struct vframe_s **vf, int *canvas_index)
1299{
1300 if (cur_dispbuf == NULL)
1301 return -1;
1302 atomic_inc(&cur_dispbuf->use_cnt);
1303 *canvas_index = READ_VCBUS_REG(VD1_IF0_CANVAS0 + cur_dev->viu_off);
1304 *vf = cur_dispbuf;
1305 return 0;
1306}
1307static void dump_vframe_status(const char *name)
1308{
1309 int ret = -1;
1310 struct vframe_states states;
1311 struct vframe_provider_s *vfp;
1312
1313 vfp = vf_get_provider_by_name(name);
1314 if (vfp && vfp->ops && vfp->ops->vf_states)
1315 ret = vfp->ops->vf_states(&states, vfp->op_arg);
1316
1317 if (ret == 0) {
1318 ret += pr_info("%s_pool_size=%d\n",
1319 name, states.vf_pool_size);
1320 ret += pr_info("%s buf_free_num=%d\n",
1321 name, states.buf_free_num);
1322 ret += pr_info("%s buf_avail_num=%d\n",
1323 name, states.buf_avail_num);
1324 } else {
1325 ret += pr_info("%s vframe no states\n", name);
1326 }
1327}
1328
1329static void dump_vdin_reg(void)
1330{
1331 unsigned int reg001, reg002;
1332
1333 reg001 = READ_VCBUS_REG(0x1204);
1334 reg002 = READ_VCBUS_REG(0x1205);
1335 pr_info("VDIN_LCNT_STATUS:0x%x,VDIN_COM_STATUS0:0x%x\n",
1336 reg001, reg002);
1337}
1338
1339#ifdef CONFIG_AMLOGIC_MEDIA_VIDEOCAPTURE
1340
1341int ext_put_video_frame(struct vframe_s *vf)
1342{
1343 if (vf == &vf_local)
1344 return 0;
1345 video_vf_put(vf);
1346 return 0;
1347}
1348
1349static int is_need_framepacking_output(void)
1350{
1351 int ret = 0;
1352
1353 if ((framepacking_support) &&
1354 (cur_dispbuf) && (cur_dispbuf->type & VIDTYPE_MVC)) {
1355 ret = 1;
1356 }
1357 return ret;
1358}
1359
1360int ext_register_end_frame_callback(struct amvideocap_req *req)
1361{
1362 mutex_lock(&video_module_mutex);
1363 capture_frame_req = req;
1364 mutex_unlock(&video_module_mutex);
1365 return 0;
1366}
1367int ext_frame_capture_poll(int endflags)
1368{
1369 mutex_lock(&video_module_mutex);
1370 if (capture_frame_req && capture_frame_req->callback) {
1371 struct vframe_s *vf;
1372 int index;
1373 int ret;
1374 struct amvideocap_req *req = capture_frame_req;
1375
1376 ret = ext_get_cur_video_frame(&vf, &index);
1377 if (!ret) {
1378 req->callback(req->data, vf, index);
1379 capture_frame_req = NULL;
1380 }
1381 }
1382 mutex_unlock(&video_module_mutex);
1383 return 0;
1384}
1385#endif
1386
1387static void update_layer_info(u8 layer_id)
1388{
1389 struct disp_info_s *layer;
1390
1391 if (layer_id >= MAX_VD_LAYERS)
1392 return;
1393
1394 if (layer_id == 0) {
1395 layer = &glayer_info[0];
1396 layer->reverse = reverse;
1397 layer->proc_3d_type = process_3d_type;
1398 } else if (layer_id == 1) {
1399 layer = &glayer_info[1];
1400 layer->reverse = reverse;
1401 layer->proc_3d_type = 0;
1402 }
1403}
1404
1405static void vpp_settings_h(struct vpp_frame_par_s *framePtr)
1406{
1407 struct vppfilter_mode_s *vpp_filter = &framePtr->vpp_filter;
1408 u32 r1, r2, r3;
1409
1410 u32 x_lines;
1411
1412 r1 = framePtr->VPP_hsc_linear_startp - framePtr->VPP_hsc_startp;
1413 r2 = framePtr->VPP_hsc_linear_endp - framePtr->VPP_hsc_startp;
1414 r3 = framePtr->VPP_hsc_endp - framePtr->VPP_hsc_startp;
1415
1416 if ((framePtr->supscl_path == CORE0_PPS_CORE1) ||
1417 (framePtr->supscl_path == CORE1_AFTER_PPS) ||
1418 (framePtr->supscl_path == PPS_CORE0_CORE1) ||
1419 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1420 r3 >>= framePtr->supsc1_hori_ratio;
1421 if ((framePtr->supscl_path == CORE0_AFTER_PPS) ||
1422 (framePtr->supscl_path == PPS_CORE0_CORE1) ||
1423 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1424 r3 >>= framePtr->supsc0_hori_ratio;
1425
1426 x_lines = zoom_end_x_lines / (framePtr->hscale_skip_count + 1);
1427 if (process_3d_type & MODE_3D_OUT_TB) {
1428 /* vd1 and vd2 do pre blend */
1429 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_H_START_END,
1430 ((zoom_start_x_lines & VPP_VD_SIZE_MASK) <<
1431 VPP_VD1_START_BIT) | (((zoom_end_x_lines) &
1432 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1433 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_H_START_END,
1434 ((zoom_start_x_lines & VPP_VD_SIZE_MASK) <<
1435 VPP_VD1_START_BIT) | (((zoom_end_x_lines) &
1436 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1437 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_H_START_END +
1438 cur_dev->vpp_off,
1439 ((framePtr->VPP_hsc_startp & VPP_VD_SIZE_MASK)
1440 << VPP_VD1_START_BIT) |
1441 ((framePtr->VPP_hsc_endp & VPP_VD_SIZE_MASK)
1442 << VPP_VD1_END_BIT));
1443 } else if (process_3d_type & MODE_3D_OUT_LR) {
1444 /* vd1 and vd2 do pre blend */
1445 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_H_START_END,
1446 ((zoom_start_x_lines & VPP_VD_SIZE_MASK) <<
1447 VPP_VD1_START_BIT) | (((x_lines >> 1) &
1448 VPP_VD_SIZE_MASK) <<
1449 VPP_VD1_END_BIT));
1450 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_H_START_END,
1451 ((((x_lines + 1) >> 1) & VPP_VD_SIZE_MASK) <<
1452 VPP_VD1_START_BIT) | ((x_lines &
1453 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1454 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_H_START_END +
1455 cur_dev->vpp_off,
1456 ((framePtr->VPP_hsc_startp & VPP_VD_SIZE_MASK)
1457 << VPP_VD1_START_BIT) |
1458 ((framePtr->VPP_hsc_endp & VPP_VD_SIZE_MASK)
1459 << VPP_VD1_END_BIT));
1460 } else{
1461 if (!legacy_vpp) {
1462 x_lines = (zoom_end_x_lines -
1463 zoom_start_x_lines + 1)
1464 / (framePtr->hscale_skip_count + 1);
1465 VSYNC_WR_MPEG_REG(
1466 VPP_PREBLEND_VD1_H_START_END,
1467 ((0 & VPP_VD_SIZE_MASK) <<
1468 VPP_VD1_START_BIT) | (((x_lines - 1) &
1469 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1470 }
1471 VSYNC_WR_MPEG_REG(
1472 VPP_POSTBLEND_VD1_H_START_END +
1473 cur_dev->vpp_off,
1474 ((framePtr->VPP_hsc_startp & VPP_VD_SIZE_MASK)
1475 << VPP_VD1_START_BIT) |
1476 ((framePtr->VPP_hsc_endp & VPP_VD_SIZE_MASK)
1477 << VPP_VD1_END_BIT));
1478#ifdef VIDEO_PIP
1479 if (!cur_pipbuf)
1480#endif
1481 {
1482 VSYNC_WR_MPEG_REG(
1483 VPP_BLEND_VD2_H_START_END +
1484 cur_dev->vpp_off,
1485 ((framePtr->VPP_hd_start_lines_ &
1486 VPP_VD_SIZE_MASK)
1487 << VPP_VD1_START_BIT) |
1488 ((framePtr->VPP_hd_end_lines_ &
1489 VPP_VD_SIZE_MASK)
1490 << VPP_VD1_END_BIT));
1491 }
1492 }
1493
1494 VSYNC_WR_MPEG_REG(VPP_HSC_REGION12_STARTP +
1495 cur_dev->vpp_off,
1496 (0 << VPP_REGION1_BIT) |
1497 ((r1 & VPP_REGION_MASK) << VPP_REGION2_BIT));
1498
1499 VSYNC_WR_MPEG_REG(VPP_HSC_REGION34_STARTP + cur_dev->vpp_off,
1500 ((r2 & VPP_REGION_MASK) << VPP_REGION3_BIT) |
1501 ((r3 & VPP_REGION_MASK) << VPP_REGION4_BIT));
1502 VSYNC_WR_MPEG_REG(VPP_HSC_REGION4_ENDP + cur_dev->vpp_off, r3);
1503
1504 VSYNC_WR_MPEG_REG(VPP_HSC_START_PHASE_STEP + cur_dev->vpp_off,
1505 vpp_filter->vpp_hf_start_phase_step);
1506
1507 VSYNC_WR_MPEG_REG(VPP_HSC_REGION1_PHASE_SLOPE + cur_dev->vpp_off,
1508 vpp_filter->vpp_hf_start_phase_slope);
1509
1510 VSYNC_WR_MPEG_REG(VPP_HSC_REGION3_PHASE_SLOPE + cur_dev->vpp_off,
1511 vpp_filter->vpp_hf_end_phase_slope);
1512
1513 VSYNC_WR_MPEG_REG(VPP_LINE_IN_LENGTH + cur_dev->vpp_off,
1514 framePtr->VPP_line_in_length_);
1515}
1516
1517static void vd2_settings_h(struct vframe_s *vf)
1518{
1519 u32 VPP_hd_start_lines_;
1520 u32 VPP_hd_end_lines_;
1521
1522 if (vf) {
1523 VPP_hd_start_lines_ = 0;
1524 VPP_hd_end_lines_ = ((vf->type & VIDTYPE_COMPRESS) ?
1525 vf->compWidth : vf->width) - 1;
1526
1527 VSYNC_WR_MPEG_REG(
1528 VPP_BLEND_VD2_H_START_END +
1529 cur_dev->vpp_off,
1530 ((VPP_hd_start_lines_ &
1531 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1532 ((VPP_hd_end_lines_ &
1533 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1534 }
1535}
1536
1537static void vpp_settings_v(struct vpp_frame_par_s *framePtr)
1538{
1539 struct vppfilter_mode_s *vpp_filter = &framePtr->vpp_filter;
1540 u32 r, afbc_enble_flag;
1541 u32 y_lines;
1542 u32 v_phase;
1543 u32 v_skip_flag = 0;
1544 int x, y, w, h;
1545 struct disp_info_s *layer = &glayer_info[0];
1546
1547 r = framePtr->VPP_vsc_endp - framePtr->VPP_vsc_startp;
1548 afbc_enble_flag = 0;
1549 if (is_meson_gxbb_cpu())
1550 afbc_enble_flag = READ_VCBUS_REG(AFBC_ENABLE) & 0x100;
1551 if ((vpp_filter->vpp_vsc_start_phase_step > 0x1000000)
1552 && afbc_enble_flag)
1553 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
1554 cur_dev->vpp_off, ((framePtr->VPP_vsc_startp &
1555 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT)
1556 | (((framePtr->VPP_vsc_endp + 1) & VPP_VD_SIZE_MASK) <<
1557 VPP_VD1_END_BIT));
1558 else {
1559 afbc_enble_flag = READ_VCBUS_REG(AFBC_ENABLE) & 0x100;
1560 v_phase = vpp_filter->vpp_vsc_start_phase_step;
1561
1562 x = layer->layer_left;
1563 y = layer->layer_top;
1564 w = layer->layer_width;
1565 h = layer->layer_height;
1566 if (v_phase * (framePtr->vscale_skip_count + 1) > 0x1000000) {
1567 if ((afbc_enble_flag) && (y < 0)) {
1568 if ((framePtr->VPP_vsc_endp < 0x250) ||
1569 (framePtr->VPP_vsc_endp <
1570 framePtr->VPP_post_blend_vd_v_end_/2)) {
1571 if (framePtr->VPP_vsc_endp > 0x6)
1572 v_skip_flag = 1;
1573 }
1574 }
1575 }
1576 if (v_skip_flag == 1) {
1577 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
1578 cur_dev->vpp_off, ((framePtr->VPP_vsc_startp &
1579 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT)
1580 | (((framePtr->VPP_vsc_endp - 6) & VPP_VD_SIZE_MASK) <<
1581 VPP_VD1_END_BIT));
1582 } else {
1583 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
1584 cur_dev->vpp_off, ((framePtr->VPP_vsc_startp &
1585 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT)
1586 | ((framePtr->VPP_vsc_endp & VPP_VD_SIZE_MASK) <<
1587 VPP_VD1_END_BIT));
1588 }
1589 }
1590
1591 y_lines = zoom_end_y_lines / (framePtr->vscale_skip_count + 1);
1592 if (process_3d_type & MODE_3D_OUT_TB) {
1593 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END,
1594 ((zoom_start_y_lines & VPP_VD_SIZE_MASK) <<
1595 VPP_VD1_START_BIT) | (((y_lines >> 1) &
1596 VPP_VD_SIZE_MASK) <<
1597 VPP_VD1_END_BIT));
1598 VSYNC_WR_MPEG_REG(
1599 VPP_BLEND_VD2_V_START_END,
1600 ((((y_lines + 1) >> 1) & VPP_VD_SIZE_MASK) <<
1601 VPP_VD1_START_BIT) |
1602 ((y_lines & VPP_VD_SIZE_MASK) <<
1603 VPP_VD1_END_BIT));
1604 } else if (process_3d_type & MODE_3D_OUT_LR) {
1605 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END,
1606 ((zoom_start_y_lines & VPP_VD_SIZE_MASK) <<
1607 VPP_VD1_START_BIT) | ((zoom_end_y_lines &
1608 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1609 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_V_START_END,
1610 ((zoom_start_y_lines & VPP_VD_SIZE_MASK) <<
1611 VPP_VD1_START_BIT) | ((zoom_end_y_lines &
1612 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1613 } else {
1614 if ((framePtr->VPP_post_blend_vd_v_end_ -
1615 framePtr->VPP_post_blend_vd_v_start_ + 1) >
1616 VPP_PREBLEND_VD_V_END_LIMIT) {
1617 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
1618 cur_dev->vpp_off,
1619 ((framePtr->VPP_post_blend_vd_v_start_
1620 & VPP_VD_SIZE_MASK) <<
1621 VPP_VD1_START_BIT) |
1622 ((framePtr->VPP_post_blend_vd_v_end_ &
1623 VPP_VD_SIZE_MASK)
1624 << VPP_VD1_END_BIT));
1625 } else {
1626 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
1627 cur_dev->vpp_off,
1628 ((0 & VPP_VD_SIZE_MASK) <<
1629 VPP_VD1_START_BIT) |
1630 (((VPP_PREBLEND_VD_V_END_LIMIT - 1) &
1631 VPP_VD_SIZE_MASK) <<
1632 VPP_VD1_END_BIT));
1633 }
1634#ifdef VIDEO_PIP
1635 if (!cur_pipbuf)
1636#endif
1637 {
1638 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_V_START_END +
1639 cur_dev->vpp_off,
1640 ((((framePtr->VPP_vd_end_lines_ + 1) / 2) &
1641 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1642 (((framePtr->VPP_vd_end_lines_) &
1643 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1644 }
1645 if (is_need_framepacking_output()) {
1646 VSYNC_WR_MPEG_REG(
1647 VPP_BLEND_VD2_V_START_END +
1648 cur_dev->vpp_off,
1649 (((((framePtr->VPP_vd_end_lines_ -
1650 framepacking_blank + 1) / 2) + framepacking_blank) &
1651 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1652 (((framePtr->VPP_vd_end_lines_) &
1653 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1654 }
1655 }
1656 VSYNC_WR_MPEG_REG(VPP_VSC_REGION12_STARTP + cur_dev->vpp_off, 0);
1657 VSYNC_WR_MPEG_REG(VPP_VSC_REGION34_STARTP + cur_dev->vpp_off,
1658 ((r & VPP_REGION_MASK) << VPP_REGION3_BIT) |
1659 ((r & VPP_REGION_MASK) << VPP_REGION4_BIT));
1660
1661 if ((framePtr->supscl_path == CORE0_PPS_CORE1) ||
1662 (framePtr->supscl_path == CORE1_AFTER_PPS) ||
1663 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1664 r >>= framePtr->supsc1_vert_ratio;
1665 if ((framePtr->supscl_path == CORE0_AFTER_PPS) ||
1666 (framePtr->supscl_path == PPS_CORE0_CORE1) ||
1667 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1668 r >>= framePtr->supsc0_vert_ratio;
1669
1670 VSYNC_WR_MPEG_REG(VPP_VSC_REGION4_ENDP + cur_dev->vpp_off, r);
1671
1672 VSYNC_WR_MPEG_REG(VPP_VSC_START_PHASE_STEP + cur_dev->vpp_off,
1673 vpp_filter->vpp_vsc_start_phase_step);
1674}
1675
1676static void vd2_settings_v(struct vframe_s *vf)
1677{
1678 u32 VPP_vd_start_lines_;
1679 u32 VPP_vd_end_lines_;
1680
1681 if (vf) {
1682 VPP_vd_start_lines_ = 0;
1683 VPP_vd_end_lines_ = ((vf->type & VIDTYPE_COMPRESS) ?
1684 vf->compHeight : vf->height) - 1;
1685
1686 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_V_START_END +
1687 cur_dev->vpp_off,
1688 ((VPP_vd_start_lines_ &
1689 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1690 (((VPP_vd_end_lines_) &
1691 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1692 }
1693}
1694
1695#ifdef TV_3D_FUNCTION_OPEN
1696static void zoom_get_horz_pos(struct vframe_s *vf, u32 vpp_3d_mode, u32 *ls,
1697 u32 *le, u32 *rs, u32 *re)
1698{
1699 u32 crop_sx, crop_ex, crop_sy, crop_ey;
1700 int frame_width, frame_height;
1701 struct disp_info_s *layer = &glayer_info[0];
1702
1703 if (!vf)
1704 return;
1705
1706 crop_sy = layer->crop_top;
1707 crop_sx = layer->crop_left;
1708 crop_ey = layer->crop_bottom;
1709 crop_ex = layer->crop_right;
1710
1711 if (vf->type & VIDTYPE_COMPRESS) {
1712 frame_width = vf->compWidth;
1713 frame_height = vf->compHeight;
1714 } else {
1715 frame_width = vf->width;
1716 frame_height = vf->height;
1717 }
1718
1719 switch (vpp_3d_mode) {
1720 case VPP_3D_MODE_LR:
1721 /*half width,double height */
1722 *ls = zoom_start_x_lines;
1723 *le = zoom_end_x_lines;
1724 *rs = *ls + (frame_width >> 1);
1725 *re = *le + (frame_width >> 1);
1726 if (process_3d_type & MODE_3D_OUT_LR) {
1727 *ls = zoom_start_x_lines;
1728 *le = zoom_end_x_lines >> 1;
1729 *rs = *ls + (frame_width >> 1);
1730 *re = *le + (frame_width >> 1);
1731 }
1732 break;
1733 case VPP_3D_MODE_TB:
1734 case VPP_3D_MODE_LA:
1735 case VPP_3D_MODE_FA:
1736 default:
1737 if (vf->trans_fmt == TVIN_TFMT_3D_FP) {
1738 *ls = vf->left_eye.start_x + crop_sx;
1739 *le = vf->left_eye.start_x + vf->left_eye.width -
1740 crop_ex - 1;
1741 *rs = vf->right_eye.start_x + crop_sx;
1742 *re = vf->right_eye.start_x + vf->right_eye.width -
1743 crop_ex - 1;
1744 } else if (process_3d_type & MODE_3D_OUT_LR) {
1745 *ls = zoom_start_x_lines;
1746 *le = zoom_end_x_lines >> 1;
1747 *rs = *ls;
1748 *re = *le;
1749 /* *rs = *ls + (vf->width); */
1750 /* *re = *le + (vf->width); */
1751 } else {
1752 *ls = *rs = zoom_start_x_lines;
1753 *le = *re = zoom_end_x_lines;
1754 }
1755 break;
1756 }
1757}
1758
1759static void zoom_get_vert_pos(struct vframe_s *vf, u32 vpp_3d_mode, u32 *ls,
1760 u32 *le, u32 *rs, u32 *re)
1761{
1762 u32 crop_sx, crop_ex, crop_sy, crop_ey, height;
1763 int frame_width, frame_height;
1764 struct disp_info_s *layer = &glayer_info[0];
1765
1766 if (!vf)
1767 return;
1768
1769 crop_sy = layer->crop_top;
1770 crop_sx = layer->crop_left;
1771 crop_ey = layer->crop_bottom;
1772 crop_ex = layer->crop_right;
1773
1774 if (vf->type & VIDTYPE_COMPRESS) {
1775 frame_width = vf->compWidth;
1776 frame_height = vf->compHeight;
1777 } else {
1778 frame_width = vf->width;
1779 frame_height = vf->height;
1780 }
1781
1782 if (vf->type & VIDTYPE_INTERLACE)
1783 height = frame_height >> 1;
1784 else
1785 height = frame_height;
1786
1787 switch (vpp_3d_mode) {
1788 case VPP_3D_MODE_TB:
1789 if (vf->trans_fmt == TVIN_TFMT_3D_FP) {
1790 if (vf->type & VIDTYPE_INTERLACE) {
1791 /*if input is interlace vertical*/
1792 /*crop will be reduce by half */
1793 *ls =
1794 (vf->left_eye.start_y +
1795 (crop_sy >> 1)) >> 1;
1796 *le =
1797 ((vf->left_eye.start_y +
1798 vf->left_eye.height -
1799 (crop_ey >> 1)) >> 1) - 1;
1800 *rs =
1801 (vf->right_eye.start_y +
1802 (crop_sy >> 1)) >> 1;
1803 *re =
1804 ((vf->right_eye.start_y +
1805 vf->left_eye.height -
1806 (crop_ey >> 1)) >> 1) - 1;
1807 } else {
1808 *ls = vf->left_eye.start_y + (crop_sy >> 1);
1809 *le = vf->left_eye.start_y +
1810 vf->left_eye.height -
1811 (crop_ey >> 1) - 1;
1812 *rs = vf->right_eye.start_y + (crop_sy >> 1);
1813 *re =
1814 vf->right_eye.start_y +
1815 vf->left_eye.height - (crop_ey >> 1) - 1;
1816 }
1817 } else {
1818 if ((vf->type & VIDTYPE_VIU_FIELD)
1819 && (vf->type & VIDTYPE_INTERLACE)) {
1820 *ls = zoom_start_y_lines >> 1;
1821 *le = zoom_end_y_lines >> 1;
1822 *rs = *ls + (height >> 1);
1823 *re = *le + (height >> 1);
1824
1825 } else if (vf->type & VIDTYPE_INTERLACE) {
1826 *ls = zoom_start_y_lines >> 1;
1827 *le = zoom_end_y_lines >> 1;
1828 *rs = *ls + height;
1829 *re = *le + height;
1830
1831 } else {
1832 /* same width,same height */
1833 *ls = zoom_start_y_lines >> 1;
1834 *le = zoom_end_y_lines >> 1;
1835 *rs = *ls + (height >> 1);
1836 *re = *le + (height >> 1);
1837 }
1838 if ((process_3d_type & MODE_3D_TO_2D_MASK)
1839 || (process_3d_type & MODE_3D_OUT_LR)) {
1840 /* same width,half height */
1841 *ls = zoom_start_y_lines;
1842 *le = zoom_end_y_lines;
1843 *rs = zoom_start_y_lines + (height >> 1);
1844 *re = zoom_end_y_lines + (height >> 1);
1845 }
1846 }
1847 break;
1848 case VPP_3D_MODE_LR:
1849 /* half width,double height */
1850 *ls = *rs = zoom_start_y_lines >> 1;
1851 *le = *re = zoom_end_y_lines >> 1;
1852 if ((process_3d_type & MODE_3D_TO_2D_MASK)
1853 || (process_3d_type & MODE_3D_OUT_LR)) {
1854 /*half width ,same height */
1855 *ls = *rs = zoom_start_y_lines;
1856 *le = *re = zoom_end_y_lines;
1857 }
1858 break;
1859 case VPP_3D_MODE_FA:
1860 /*same width same heiht */
1861 if ((process_3d_type & MODE_3D_TO_2D_MASK)
1862 || (process_3d_type & MODE_3D_OUT_LR)) {
1863 *ls = *rs = zoom_start_y_lines;
1864 *le = *re = zoom_end_y_lines;
1865 } else {
1866 *ls = *rs = (zoom_start_y_lines + crop_sy) >> 1;
1867 *le = *re = (zoom_end_y_lines + crop_ey) >> 1;
1868 }
1869 break;
1870 case VPP_3D_MODE_LA:
1871 *ls = *rs = zoom_start_y_lines;
1872 if ((process_3d_type & MODE_3D_LR_SWITCH)
1873 || (process_3d_type & MODE_3D_TO_2D_R))
1874 *ls = *rs = zoom_start_y_lines + 1;
1875 if (process_3d_type & MODE_3D_TO_2D_L)
1876 *ls = *rs = zoom_start_y_lines;
1877 *le = *re = zoom_end_y_lines;
1878 if ((process_3d_type & MODE_3D_OUT_FA_MASK)
1879 || (process_3d_type & MODE_3D_OUT_TB)
1880 || (process_3d_type & MODE_3D_OUT_LR)) {
1881 *rs = zoom_start_y_lines + 1;
1882 *ls = zoom_start_y_lines;
1883 /* *le = zoom_end_y_lines; */
1884 /* *re = zoom_end_y_lines; */
1885 }
1886 break;
1887 default:
1888 *ls = *rs = zoom_start_y_lines;
1889 *le = *re = zoom_end_y_lines;
1890 break;
1891 }
1892}
1893
1894#endif
1895static void zoom_display_horz(struct vframe_s *vf, int hscale)
1896{
1897 u32 ls = 0, le = 0, rs = 0, re = 0;
1898#ifdef TV_REVERSE
1899 int content_w, content_l, content_r;
1900#endif
1901#ifdef TV_3D_FUNCTION_OPEN
1902 if (process_3d_type & MODE_3D_ENABLE) {
1903 zoom_get_horz_pos(vf, cur_frame_par->vpp_3d_mode, &ls,
1904 &le, &rs, &re);
1905 } else {
1906 ls = rs = zoom_start_x_lines;
1907 le = re = zoom_end_x_lines;
1908 }
1909#else
1910 ls = rs = zoom_start_x_lines;
1911 le = re = zoom_end_x_lines;
1912#endif
1913 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_X0 + cur_dev->viu_off,
1914 (ls << VDIF_PIC_START_BIT) |
1915 (le << VDIF_PIC_END_BIT));
1916
1917 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_X0 + cur_dev->viu_off,
1918 (ls / 2 << VDIF_PIC_START_BIT) |
1919 (le / 2 << VDIF_PIC_END_BIT));
1920
1921 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_X1 + cur_dev->viu_off,
1922 (rs << VDIF_PIC_START_BIT) |
1923 (re << VDIF_PIC_END_BIT));
1924
1925 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_X1 + cur_dev->viu_off,
1926 (rs / 2 << VDIF_PIC_START_BIT) |
1927 (re / 2 << VDIF_PIC_END_BIT));
1928
1929 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_W + cur_dev->viu_off,
1930 (((zoom_end_x_lines - zoom_start_x_lines +
1931 1) >> hscale) << VD1_FMT_LUMA_WIDTH_BIT) |
1932 (((zoom_end_x_lines / 2 - zoom_start_x_lines / 2 +
1933 1) >> hscale) << VD1_FMT_CHROMA_WIDTH_BIT));
1934
1935 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
1936 int l_aligned;
1937 int r_aligned;
1938 int h_skip = cur_frame_par->hscale_skip_count + 1;
1939 int c_skip = 2;
1940
1941 /* After TL1, afbc supports 420/422/444*/
1942 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
1943 if (vf && (vf->type & VIDTYPE_VIU_444))
1944 c_skip = 1;
1945
1946 if ((zoom_start_x_lines > 0) ||
1947 (zoom_end_x_lines < ori_end_x_lines)) {
1948 l_aligned = round_down(ori_start_x_lines, 32);
1949 r_aligned = round_up(ori_end_x_lines + 1, 32);
1950 } else {
1951 l_aligned = round_down(zoom_start_x_lines, 32);
1952 r_aligned = round_up(zoom_end_x_lines + 1, 32);
1953 }
1954 VSYNC_WR_MPEG_REG(AFBC_VD_CFMT_W,
1955 (((r_aligned - l_aligned) / h_skip) << 16) |
1956 ((r_aligned / c_skip - l_aligned / c_skip) / h_skip));
1957
1958 VSYNC_WR_MPEG_REG(AFBC_MIF_HOR_SCOPE,
1959 ((l_aligned / 32) << 16) |
1960 ((r_aligned / 32) - 1));
1961
1962 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
1963 VSYNC_WR_MPEG_REG(AFBC_SIZE_OUT,
1964 (VSYNC_RD_MPEG_REG(AFBC_SIZE_OUT)
1965 & 0xffff) |
1966 (((r_aligned - l_aligned) / h_skip) << 16));
1967 }
1968#ifdef TV_REVERSE
1969 if (reverse) {
1970 content_w = zoom_end_x_lines - zoom_start_x_lines + 1;
1971 content_l = (r_aligned - zoom_end_x_lines - 1);
1972 content_r = content_l + content_w - 1;
1973 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
1974 (((content_l << 16)) | content_r) / h_skip);
1975 } else
1976#endif
1977 {
1978 if (((process_3d_type & MODE_3D_FA)
1979 || (process_3d_type & MODE_FORCE_3D_FA_LR))
1980 && (cur_frame_par->vpp_3d_mode == 1)) {
1981 /* do nothing*/
1982 } else {
1983 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
1984 (((zoom_start_x_lines - l_aligned) << 16) |
1985 (zoom_end_x_lines - l_aligned)) / h_skip);
1986 }
1987 }
1988 VSYNC_WR_MPEG_REG(AFBC_SIZE_IN,
1989 (VSYNC_RD_MPEG_REG(AFBC_SIZE_IN) & 0xffff) |
1990 ((r_aligned - l_aligned) << 16));
1991 }
1992
1993#ifdef VIDEO_PIP
1994 if (!cur_pipbuf)
1995#endif
1996 {
1997 VSYNC_WR_MPEG_REG(
1998 VD2_IF0_LUMA_X0 + cur_dev->viu_off,
1999 (ls << VDIF_PIC_START_BIT) |
2000 (le << VDIF_PIC_END_BIT));
2001
2002 VSYNC_WR_MPEG_REG(
2003 VD2_IF0_CHROMA_X0 + cur_dev->viu_off,
2004 (ls / 2 << VDIF_PIC_START_BIT) |
2005 (le / 2 << VDIF_PIC_END_BIT));
2006
2007 VSYNC_WR_MPEG_REG(
2008 VD2_IF0_LUMA_X1 + cur_dev->viu_off,
2009 (rs << VDIF_PIC_START_BIT) |
2010 (re << VDIF_PIC_END_BIT));
2011
2012 VSYNC_WR_MPEG_REG(
2013 VD2_IF0_CHROMA_X1 + cur_dev->viu_off,
2014 (rs / 2 << VDIF_PIC_START_BIT) |
2015 (re / 2 << VDIF_PIC_END_BIT));
2016
2017 VSYNC_WR_MPEG_REG(
2018 VIU_VD2_FMT_W + cur_dev->viu_off,
2019 (((zoom_end_x_lines - zoom_start_x_lines +
2020 1) >> hscale) << VD1_FMT_LUMA_WIDTH_BIT) |
2021 (((zoom_end_x_lines / 2 - zoom_start_x_lines / 2 +
2022 1) >> hscale) << VD1_FMT_CHROMA_WIDTH_BIT));
2023 }
2024}
2025
2026static void vd2_zoom_display_horz(struct vframe_s *vf, int hscale)
2027{
2028 u32 ls, le, rs, re;
2029#ifdef TV_REVERSE
2030 int content_w, content_l, content_r;
2031#endif
2032 ls = rs = zoom2_start_x_lines;
2033 le = re = zoom2_end_x_lines;
2034
2035 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
2036 int l_aligned;
2037 int r_aligned;
2038 int h_skip = hscale + 1;
2039 int c_skip = 2;
2040
2041 /* After TL1, afbc supports 420/422/444*/
2042 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2043 if (vf && (vf->type & VIDTYPE_VIU_444))
2044 c_skip = 1;
2045
2046 if ((zoom2_start_x_lines > 0) ||
2047 (zoom2_end_x_lines < ori2_end_x_lines)) {
2048 l_aligned = round_down(ori2_start_x_lines, 32);
2049 r_aligned = round_up(ori2_end_x_lines + 1, 32);
2050 } else {
2051 l_aligned = round_down(zoom2_start_x_lines, 32);
2052 r_aligned = round_up(zoom2_end_x_lines + 1, 32);
2053 }
2054 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_W,
2055 (((r_aligned - l_aligned) / h_skip) << 16) |
2056 ((r_aligned / c_skip - l_aligned / c_skip) / h_skip));
2057
2058 VSYNC_WR_MPEG_REG(VD2_AFBC_MIF_HOR_SCOPE,
2059 ((l_aligned / 32) << 16) |
2060 ((r_aligned / 32) - 1));
2061 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
2062 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_OUT,
2063 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_OUT)
2064 & 0xffff) |
2065 (((r_aligned - l_aligned) / h_skip) << 16));
2066 }
2067#ifdef TV_REVERSE
2068 if (reverse) {
2069 content_w = zoom2_end_x_lines - zoom2_start_x_lines + 1;
2070 content_l = (r_aligned - zoom2_end_x_lines - 1) +
2071 (zoom2_start_x_lines - l_aligned);
2072 content_r = content_l + content_w - 1;
2073 VSYNC_WR_MPEG_REG(VD2_AFBC_PIXEL_HOR_SCOPE,
2074 (content_l << 16) | content_r);
2075 } else
2076#endif
2077 {
2078 VSYNC_WR_MPEG_REG(VD2_AFBC_PIXEL_HOR_SCOPE,
2079 ((zoom2_start_x_lines - l_aligned) << 16) |
2080 (zoom2_end_x_lines - l_aligned));
2081 }
2082 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_IN,
2083 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_IN) & 0xffff) |
2084 ((r_aligned - l_aligned) << 16));
2085 }
2086
2087 VSYNC_WR_MPEG_REG(
2088 VD2_IF0_LUMA_X0 + cur_dev->viu_off,
2089 (ls << VDIF_PIC_START_BIT) |
2090 (le << VDIF_PIC_END_BIT));
2091
2092 VSYNC_WR_MPEG_REG(
2093 VD2_IF0_CHROMA_X0 + cur_dev->viu_off,
2094 (ls / 2 << VDIF_PIC_START_BIT) |
2095 (le / 2 << VDIF_PIC_END_BIT));
2096
2097 VSYNC_WR_MPEG_REG(
2098 VD2_IF0_LUMA_X1 + cur_dev->viu_off,
2099 (rs << VDIF_PIC_START_BIT) |
2100 (re << VDIF_PIC_END_BIT));
2101
2102 VSYNC_WR_MPEG_REG(
2103 VD2_IF0_CHROMA_X1 + cur_dev->viu_off,
2104 (rs / 2 << VDIF_PIC_START_BIT) |
2105 (re / 2 << VDIF_PIC_END_BIT));
2106
2107 VSYNC_WR_MPEG_REG(
2108 VIU_VD2_FMT_W + cur_dev->viu_off,
2109 (((le - ls + 1) >> hscale)
2110 << VD1_FMT_LUMA_WIDTH_BIT) |
2111 (((le / 2 - ls / 2 + 1) >> hscale)
2112 << VD1_FMT_CHROMA_WIDTH_BIT));
2113}
2114
2115static void zoom_display_vert(struct vframe_s *vf)
2116{
2117
2118 u32 ls = 0, le = 0, rs = 0, re = 0;
2119
2120 if (process_3d_type & MODE_3D_ENABLE) {
2121 zoom_get_vert_pos(vf,
2122 cur_frame_par->vpp_3d_mode, &ls,
2123 &le, &rs, &re);
2124 } else {
2125 ls = rs = zoom_start_y_lines;
2126 le = re = zoom_end_y_lines;
2127 }
2128
2129 if ((vf) && (vf->type & VIDTYPE_MVC)) {
2130 if (is_need_framepacking_output()) {
2131 VSYNC_WR_MPEG_REG(
2132 VD1_IF0_LUMA_Y0 + cur_dev->viu_off,
2133 (ls << VDIF_PIC_START_BIT) |
2134 (le << VDIF_PIC_END_BIT));
2135
2136 VSYNC_WR_MPEG_REG(
2137 VD1_IF0_CHROMA_Y0 + cur_dev->viu_off,
2138 ((ls / 2) << VDIF_PIC_START_BIT) |
2139 ((le / 2) << VDIF_PIC_END_BIT));
2140
2141 VSYNC_WR_MPEG_REG(
2142 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2143 (rs << VDIF_PIC_START_BIT) |
2144 (re << VDIF_PIC_END_BIT));
2145
2146 VSYNC_WR_MPEG_REG(
2147 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2148 ((rs / 2) << VDIF_PIC_START_BIT) |
2149 ((re / 2) << VDIF_PIC_END_BIT));
2150 } else {
2151 VSYNC_WR_MPEG_REG(
2152 VD1_IF0_LUMA_Y0 + cur_dev->viu_off,
2153 (ls * 2 << VDIF_PIC_START_BIT) |
2154 ((le * 2 - 1) << VDIF_PIC_END_BIT));
2155
2156 VSYNC_WR_MPEG_REG(
2157 VD1_IF0_CHROMA_Y0 + cur_dev->viu_off,
2158 ((ls) << VDIF_PIC_START_BIT) |
2159 ((le - 1) << VDIF_PIC_END_BIT));
2160
2161 VSYNC_WR_MPEG_REG(
2162 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2163 (ls * 2 << VDIF_PIC_START_BIT) |
2164 ((le * 2 - 1) << VDIF_PIC_END_BIT));
2165
2166 VSYNC_WR_MPEG_REG(
2167 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2168 ((ls) << VDIF_PIC_START_BIT) |
2169 ((le - 1) << VDIF_PIC_END_BIT));
2170 }
2171 } else {
2172 VSYNC_WR_MPEG_REG(
2173 VD1_IF0_LUMA_Y0 + cur_dev->viu_off,
2174 (ls << VDIF_PIC_START_BIT) |
2175 (le << VDIF_PIC_END_BIT));
2176
2177 VSYNC_WR_MPEG_REG(
2178 VD1_IF0_CHROMA_Y0 + cur_dev->viu_off,
2179 ((ls / 2) << VDIF_PIC_START_BIT) |
2180 ((le / 2) << VDIF_PIC_END_BIT));
2181
2182 VSYNC_WR_MPEG_REG(
2183 VD1_IF0_LUMA_Y1 + cur_dev->viu_off,
2184 (rs << VDIF_PIC_START_BIT) |
2185 (re << VDIF_PIC_END_BIT));
2186
2187 VSYNC_WR_MPEG_REG(
2188 VD1_IF0_CHROMA_Y1 + cur_dev->viu_off,
2189 ((rs / 2) << VDIF_PIC_START_BIT) |
2190 ((re / 2) << VDIF_PIC_END_BIT));
2191
2192#ifdef VIDEO_PIP
2193 if (!cur_pipbuf)
2194#endif
2195 {
2196 VSYNC_WR_MPEG_REG(
2197 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2198 (ls << VDIF_PIC_START_BIT) |
2199 (le << VDIF_PIC_END_BIT));
2200
2201 VSYNC_WR_MPEG_REG(
2202 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2203 ((ls / 2) << VDIF_PIC_START_BIT) |
2204 ((le / 2) << VDIF_PIC_END_BIT));
2205
2206 VSYNC_WR_MPEG_REG(
2207 VD2_IF0_LUMA_Y1 + cur_dev->viu_off,
2208 (rs << VDIF_PIC_START_BIT) |
2209 (re << VDIF_PIC_END_BIT));
2210
2211 VSYNC_WR_MPEG_REG(
2212 VD2_IF0_CHROMA_Y1 + cur_dev->viu_off,
2213 ((rs / 2) << VDIF_PIC_START_BIT) |
2214 ((re / 2) << VDIF_PIC_END_BIT));
2215 }
2216 }
2217
2218 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
2219 int t_aligned;
2220 int b_aligned;
2221 int ori_t_aligned;
2222 int ori_b_aligned;
2223 int v_skip = cur_frame_par->vscale_skip_count + 1;
2224 int c_skip = 2;
2225
2226 /* After TL1, afbc supports 420/422/444*/
2227 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2228 if (vf && ((vf->type & VIDTYPE_VIU_444)
2229 || (vf->type & VIDTYPE_VIU_422)))
2230 c_skip = 1;
2231
2232 t_aligned = round_down(zoom_start_y_lines, 4);
2233 b_aligned = round_up(zoom_end_y_lines + 1, 4);
2234
2235 ori_t_aligned = round_down(ori_start_y_lines, 4);
2236 ori_b_aligned = round_up(ori_end_y_lines + 1, 4);
2237 VSYNC_WR_MPEG_REG(AFBC_VD_CFMT_H,
2238 (b_aligned - t_aligned) / c_skip / v_skip);
2239
2240 if (((process_3d_type & MODE_3D_FA)
2241 || (process_3d_type & MODE_FORCE_3D_FA_TB))
2242 && (cur_frame_par->vpp_3d_mode == 2)) {
2243 int block_h;
2244
2245 block_h = ori_b_aligned - ori_t_aligned;
2246 block_h = block_h / 8;
2247 if (toggle_3d_fa_frame == OUT_FA_B_FRAME) {
2248 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
2249 (((ori_t_aligned / 4) + block_h) << 16) |
2250 ((ori_b_aligned / 4) - 1));
2251 } else {
2252 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
2253 ((ori_t_aligned / 4) << 16) |
2254 ((ori_t_aligned / 4) + block_h - 1));
2255 }
2256 } else {
2257 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
2258 ((t_aligned / 4) << 16) |
2259 ((b_aligned / 4) - 1));
2260 }
2261 VSYNC_WR_MPEG_REG(AFBC_PIXEL_VER_SCOPE,
2262 ((zoom_start_y_lines - t_aligned) << 16) |
2263 (zoom_end_y_lines - t_aligned));
2264 /* afbc pixel vertical output region must be
2265 * [0, zoom_end_y_lines - zoom_start_y_lines]
2266 */
2267 VSYNC_WR_MPEG_REG(AFBC_PIXEL_VER_SCOPE,
2268 (zoom_end_y_lines - zoom_start_y_lines));
2269
2270 VSYNC_WR_MPEG_REG(AFBC_SIZE_IN,
2271 (VSYNC_RD_MPEG_REG(AFBC_SIZE_IN)
2272 & 0xffff0000) |
2273 (ori_b_aligned - ori_t_aligned));
2274 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
2275 VSYNC_WR_MPEG_REG(AFBC_SIZE_OUT,
2276 (VSYNC_RD_MPEG_REG(AFBC_SIZE_OUT) &
2277 0xffff0000) |
2278 ((b_aligned - t_aligned) / v_skip));
2279 }
2280 }
2281}
2282
2283static void vd2_zoom_display_vert(struct vframe_s *vf, int vscale)
2284{
2285
2286 u32 ls, le, rs, re;
2287
2288 ls = rs = zoom2_start_y_lines;
2289 le = re = zoom2_end_y_lines;
2290
2291 /* vd2 */
2292 VSYNC_WR_MPEG_REG(
2293 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2294 (ls << VDIF_PIC_START_BIT) |
2295 (le << VDIF_PIC_END_BIT));
2296
2297 VSYNC_WR_MPEG_REG(
2298 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2299 ((ls / 2) << VDIF_PIC_START_BIT) |
2300 ((le / 2) << VDIF_PIC_END_BIT));
2301
2302 VSYNC_WR_MPEG_REG(
2303 VD2_IF0_LUMA_Y1 + cur_dev->viu_off,
2304 (rs << VDIF_PIC_START_BIT) |
2305 (re << VDIF_PIC_END_BIT));
2306
2307 VSYNC_WR_MPEG_REG(
2308 VD2_IF0_CHROMA_Y1 + cur_dev->viu_off,
2309 ((rs / 2) << VDIF_PIC_START_BIT) |
2310 ((re / 2) << VDIF_PIC_END_BIT));
2311
2312 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
2313 int t_aligned;
2314 int b_aligned;
2315 int ori_t_aligned;
2316 int ori_b_aligned;
2317 int v_skip = vscale + 1;
2318 int c_skip = 2;
2319
2320 /* After TL1, afbc supports 420/422/444*/
2321 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2322 if (vf && ((vf->type & VIDTYPE_VIU_444)
2323 || (vf->type & VIDTYPE_VIU_422)))
2324 c_skip = 1;
2325
2326 t_aligned = round_down(zoom2_start_y_lines, 4);
2327 b_aligned = round_up(zoom2_end_y_lines + 1, 4);
2328
2329 ori_t_aligned = round_down(ori2_start_y_lines, 4);
2330 ori_b_aligned = round_up(ori2_end_y_lines + 1, 4);
2331
2332 /* TODO: afbc setting only support 420 for now */
2333 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_H,
2334 (b_aligned - t_aligned) / c_skip / v_skip);
2335
2336 VSYNC_WR_MPEG_REG(VD2_AFBC_MIF_VER_SCOPE,
2337 ((t_aligned / 4) << 16) |
2338 ((b_aligned / 4) - 1));
2339
2340 VSYNC_WR_MPEG_REG(VD2_AFBC_PIXEL_VER_SCOPE,
2341 ((zoom2_start_y_lines - t_aligned) << 16) |
2342 (zoom2_end_y_lines - t_aligned));
2343
2344 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_IN,
2345 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_IN)
2346 & 0xffff0000) |
2347 (ori_b_aligned - ori_t_aligned));
2348 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
2349 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_OUT,
2350 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_OUT)
2351 & 0xffff0000) |
2352 ((b_aligned - t_aligned) / v_skip));
2353 }
2354 }
2355}
2356
2357#ifdef TV_3D_FUNCTION_OPEN
2358/* judge the out mode is 240:LBRBLRBR or 120:LRLRLR */
2359static void judge_3d_fa_out_mode(void)
2360{
2361 if ((process_3d_type & MODE_3D_OUT_FA_MASK)
2362 && pause_one_3d_fl_frame == 2)
2363 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2364 else if ((process_3d_type & MODE_3D_OUT_FA_MASK)
2365 && pause_one_3d_fl_frame == 1)
2366 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2367 else if ((process_3d_type & MODE_3D_OUT_FA_MASK)
2368 && pause_one_3d_fl_frame == 0) {
2369 /* toggle_3d_fa_frame determine*/
2370 /*the out frame is L or R or blank */
2371 if ((process_3d_type & MODE_3D_OUT_FA_L_FIRST)) {
2372 if ((vsync_count % 2) == 0)
2373 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2374 else
2375 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2376 } else if ((process_3d_type & MODE_3D_OUT_FA_R_FIRST)) {
2377 if ((vsync_count % 2) == 0)
2378 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2379 else
2380 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2381 } else if ((process_3d_type & MODE_3D_OUT_FA_LB_FIRST)) {
2382 if ((vsync_count % 4) == 0)
2383 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2384 else if ((vsync_count % 4) == 2)
2385 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2386 else
2387 toggle_3d_fa_frame = OUT_FA_BANK_FRAME;
2388 } else if ((process_3d_type & MODE_3D_OUT_FA_RB_FIRST)) {
2389 if ((vsync_count % 4) == 0)
2390 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2391 else if ((vsync_count % 4) == 2)
2392 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2393 else
2394 toggle_3d_fa_frame = OUT_FA_BANK_FRAME;
2395 }
2396 } else
2397 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2398}
2399
2400#endif
2401
2402static void vframe_canvas_set(struct canvas_config_s *config, u32 planes,
2403 u32 *index)
2404{
2405 int i;
2406 u32 *canvas_index = index;
2407
2408 struct canvas_config_s *cfg = config;
2409
2410 for (i = 0; i < planes; i++, canvas_index++, cfg++)
2411 canvas_config_config(*canvas_index, cfg);
2412}
2413
2414#ifdef PTS_LOGGING
2415static void log_vsync_video_pattern(int pattern)
2416{
2417 int factor1 = 0, factor2 = 0, pattern_range = 0;
2418
2419 if (pattern >= PTS_MAX_NUM_PATTERNS)
2420 return;
2421
2422 if (pattern == PTS_32_PATTERN) {
2423 factor1 = 3;
2424 factor2 = 2;
2425 pattern_range = PTS_32_PATTERN_DETECT_RANGE;
2426 } else if (pattern == PTS_22_PATTERN) {
2427 factor1 = 2;
2428 factor2 = 2;
2429 pattern_range = PTS_22_PATTERN_DETECT_RANGE;
2430 } else if (pattern == PTS_41_PATTERN) {
2431 /* update 2111 mode detection */
2432 if (pts_trace == 2) {
2433 if ((pts_41_pattern_sink[1] == 1) &&
2434 (pts_41_pattern_sink[2] == 1) &&
2435 (pts_41_pattern_sink[3] == 1) &&
2436 (pts_pattern[PTS_41_PATTERN] <
2437 PTS_41_PATTERN_DETECT_RANGE)) {
2438 pts_pattern[PTS_41_PATTERN]++;
2439 if (pts_pattern[PTS_41_PATTERN] ==
2440 PTS_41_PATTERN_DETECT_RANGE) {
2441 pts_pattern_enter_cnt[PTS_41_PATTERN]++;
2442 pts_pattern_detected = pattern;
2443 if (pts_log_enable[PTS_41_PATTERN])
2444 pr_info("video 4:1 mode detected\n");
2445 }
2446 }
2447 pts_41_pattern_sink[0] = 2;
2448 pts_41_pattern_sink_index = 1;
2449 } else if (pts_trace == 1) {
2450 if ((pts_41_pattern_sink_index <
2451 PTS_41_PATTERN_SINK_MAX) &&
2452 (pts_41_pattern_sink_index > 0)) {
2453 pts_41_pattern_sink[pts_41_pattern_sink_index]
2454 = 1;
2455 pts_41_pattern_sink_index++;
2456 } else if (pts_pattern[PTS_41_PATTERN] ==
2457 PTS_41_PATTERN_DETECT_RANGE) {
2458 pts_pattern[PTS_41_PATTERN] = 0;
2459 pts_41_pattern_sink_index = 0;
2460 pts_pattern_exit_cnt[PTS_41_PATTERN]++;
2461 memset(&pts_41_pattern_sink[0], 0,
2462 PTS_41_PATTERN_SINK_MAX);
2463 if (pts_log_enable[PTS_41_PATTERN])
2464 pr_info("video 4:1 mode broken\n");
2465 } else {
2466 pts_pattern[PTS_41_PATTERN] = 0;
2467 pts_41_pattern_sink_index = 0;
2468 memset(&pts_41_pattern_sink[0], 0,
2469 PTS_41_PATTERN_SINK_MAX);
2470 }
2471 } else if (pts_pattern[PTS_41_PATTERN] ==
2472 PTS_41_PATTERN_DETECT_RANGE) {
2473 pts_pattern[PTS_41_PATTERN] = 0;
2474 pts_41_pattern_sink_index = 0;
2475 memset(&pts_41_pattern_sink[0], 0,
2476 PTS_41_PATTERN_SINK_MAX);
2477 pts_pattern_exit_cnt[PTS_41_PATTERN]++;
2478 if (pts_log_enable[PTS_41_PATTERN])
2479 pr_info("video 4:1 mode broken\n");
2480 } else {
2481 pts_pattern[PTS_41_PATTERN] = 0;
2482 pts_41_pattern_sink_index = 0;
2483 memset(&pts_41_pattern_sink[0], 0,
2484 PTS_41_PATTERN_SINK_MAX);
2485 }
2486 return;
2487 }
2488
2489
2490 /* update 3:2 or 2:2 mode detection */
2491 if (((pre_pts_trace == factor1) && (pts_trace == factor2)) ||
2492 ((pre_pts_trace == factor2) && (pts_trace == factor1))) {
2493 if (pts_pattern[pattern] < pattern_range) {
2494 pts_pattern[pattern]++;
2495 if (pts_pattern[pattern] == pattern_range) {
2496 pts_pattern_enter_cnt[pattern]++;
2497 pts_pattern_detected = pattern;
2498 if (pts_log_enable[pattern])
2499 pr_info("video %d:%d mode detected\n",
2500 factor1, factor2);
2501 }
2502 }
2503 } else if (pts_pattern[pattern] == pattern_range) {
2504 pts_pattern[pattern] = 0;
2505 pts_pattern_exit_cnt[pattern]++;
2506 if (pts_log_enable[pattern])
2507 pr_info("video %d:%d mode broken\n", factor1, factor2);
2508 } else
2509 pts_pattern[pattern] = 0;
2510}
2511
2512static void vsync_video_pattern(void)
2513{
2514 /* Check for 3:2*/
2515 log_vsync_video_pattern(PTS_32_PATTERN);
2516 /* Check for 2:2*/
2517 log_vsync_video_pattern(PTS_22_PATTERN);
2518 /* Check for 4:1*/
2519 log_vsync_video_pattern(PTS_41_PATTERN);
2520}
2521#endif
2522
2523static inline void vd1_path_select(bool afbc)
2524{
2525 u32 misc_off = cur_dev->vpp_off;
2526
2527 if (!legacy_vpp) {
2528 VSYNC_WR_MPEG_REG_BITS(
2529 VD1_AFBCD0_MISC_CTRL,
2530 /* go field sel */
2531 (0 << 20) |
2532 /* linebuffer en */
2533 (0 << 16) |
2534 /* vd1 -> dolby -> vpp top */
2535 (0 << 14) |
2536 /* axi sel: vd1 mif or afbc */
2537 ((afbc ? 1 : 0) << 12) |
2538 /* data sel: vd1 & afbc0 (not osd4) */
2539 (0 << 11) |
2540 /* data sel: afbc0 or vd1 */
2541 ((afbc ? 1 : 0) << 10) |
2542 /* afbc0 to vd1 (not di) */
2543 (0 << 9) |
2544 /* vd1 mif to vpp (not di) */
2545 (0 << 8) |
2546 /* afbc0 gclk ctrl */
2547 (0 << 0),
2548 0, 22);
2549 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2550 VSYNC_WR_MPEG_REG_BITS(
2551 VD1_AFBCD0_MISC_CTRL,
2552 /* Vd1_afbc0_mem_sel */
2553 (afbc ? 1 : 0),
2554 22, 1);
2555
2556#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
2557 if (!cpu_after_eq(MESON_CPU_MAJOR_ID_G12A))
2558 return;
2559 if ((DI_POST_REG_RD(DI_POST_CTRL) & 0x100) != 0) {
2560 /* check di_vpp_out_en bit */
2561 VSYNC_WR_MPEG_REG_BITS(
2562 VD1_AFBCD0_MISC_CTRL,
2563 /* vd1 mif to di */
2564 1,
2565 8, 2);
2566 VSYNC_WR_MPEG_REG_BITS(
2567 VD1_AFBCD0_MISC_CTRL,
2568 /* go field select di post */
2569 1,
2570 20, 2);
2571 }
2572#endif
2573 } else {
2574#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
2575 if ((DI_POST_REG_RD(DI_POST_CTRL) & 0x100) == 0)
2576 /* mif sel */
2577#endif
2578 VSYNC_WR_MPEG_REG_BITS(
2579 VIU_MISC_CTRL0 + misc_off,
2580 0, 16, 3);
2581 VSYNC_WR_MPEG_REG_BITS(
2582 VIU_MISC_CTRL0 + misc_off,
2583 (afbc ? 1 : 0), 20, 1);
2584 }
2585}
2586
2587static inline void vd2_path_select(bool afbc)
2588{
2589 u32 misc_off = cur_dev->vpp_off;
2590
2591 if (!legacy_vpp) {
2592 VSYNC_WR_MPEG_REG_BITS(
2593 VD2_AFBCD1_MISC_CTRL,
2594 /* go field sel */
2595 (0 << 20) |
2596 /* linebuffer en */
2597 (0 << 16) |
2598 /* TODO: vd2 -> dolby -> vpp top ?? */
2599 (0 << 14) |
2600 /* axi sel: vd2 mif */
2601 ((afbc ? 1 : 0) << 12) |
2602 /* data sel: vd2 & afbc1 (not osd4) */
2603 (0 << 11) |
2604 /* data sel: afbc1 */
2605 ((afbc ? 1 : 0) << 10) |
2606 /* afbc1 to vd2 (not di) */
2607 (0 << 9) |
2608 /* vd2 mif to vpp (not di) */
2609 (0 << 8) |
2610 /* afbc1 gclk ctrl */
2611 (0 << 0),
2612 0, 22);
2613 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2614 VSYNC_WR_MPEG_REG_BITS(
2615 VD2_AFBCD1_MISC_CTRL,
2616 /* Vd2_afbc0_mem_sel */
2617 (afbc ? 1 : 0),
2618 22, 1);
2619 } else {
2620 VSYNC_WR_MPEG_REG_BITS(
2621 VIU_MISC_CTRL1 + misc_off,
2622 (afbc ? 2 : 0), 0, 2);
2623 }
2624}
2625
2626#ifdef VIDEO_PIP
2627s32 config_vd_pps(
2628 u8 layer_id,
2629 struct vpp_frame_par_s *cur_frame_par,
2630 struct scaler_setting_s *setting,
2631 const struct vinfo_s *info)
2632{
2633 struct vppfilter_mode_s *vpp_filter;
2634
2635 if (!cur_frame_par || !info || !setting)
2636 return -1;
2637
2638 vpp_filter = &cur_frame_par->vpp_filter;
2639 setting->frame_par = cur_frame_par;
2640 setting->id = layer_id;
2641 setting->misc_reg_offt = 0;
2642 /* enable pps as default */
2643 setting->sc_top_enable = true;
2644 setting->sc_h_enable = true;
2645 setting->sc_v_enable = true;
2646
2647 if ((vpp_filter->vpp_hsc_start_phase_step == 0x1000000)
2648 && (vpp_filter->vpp_vsc_start_phase_step == 0x1000000)
2649 && (vpp_filter->vpp_hsc_start_phase_step ==
2650 vpp_filter->vpp_hf_start_phase_step)
2651 && !vpp_filter->vpp_pre_vsc_en
2652 && !vpp_filter->vpp_pre_hsc_en
2653 && !cur_frame_par->supsc0_enable
2654 && !cur_frame_par->supsc1_enable
2655 && bypass_pps)
2656 setting->sc_top_enable = false;
2657
2658 /* old chip: vd2 has no pps */
2659 if ((legacy_vpp || is_meson_tl1_cpu())
2660 && (setting->id != 0))
2661 setting->sc_top_enable = false;
2662
2663 setting->vinfo_width = info->width;
2664 setting->vinfo_height = info->height;
2665 return 0;
2666}
2667
2668static inline void vd2_scaler_setting(
2669 struct scaler_setting_s *setting)
2670{
2671 u32 misc_off, i;
2672 u32 r1, r2, r3;
2673 struct vpp_frame_par_s *frame_par;
2674 struct vppfilter_mode_s *vpp_filter;
2675
2676 if (legacy_vpp || !setting
2677 || !setting->frame_par
2678 || is_meson_tl1_cpu())
2679 return;
2680
2681 frame_par = setting->frame_par;
2682 misc_off = setting->misc_reg_offt;
2683 vpp_filter = &frame_par->vpp_filter;
2684
2685 if (setting->sc_top_enable) {
2686 u32 sc_misc_val;
2687
2688 sc_misc_val = VPP_SC_TOP_EN | VPP_SC_V1OUT_EN;
2689 if (setting->sc_h_enable) {
2690 sc_misc_val |= (((vpp_filter->vpp_pre_hsc_en & 1)
2691 << VPP_SC_PREHORZ_EN_BIT)
2692 | VPP_SC_HORZ_EN);
2693 sc_misc_val |= ((vpp_filter->vpp_horz_coeff[0] & 7)
2694 << VPP_SC_HBANK_LENGTH_BIT);
2695 }
2696
2697 if (setting->sc_v_enable) {
2698 sc_misc_val |= (((vpp_filter->vpp_pre_vsc_en & 1)
2699 << VPP_SC_PREVERT_EN_BIT)
2700 | VPP_SC_VERT_EN);
2701 sc_misc_val |= ((vpp_filter->vpp_pre_vsc_en & 1)
2702 << VPP_LINE_BUFFER_EN_BIT);
2703 sc_misc_val |= ((vpp_filter->vpp_vert_coeff[0] & 7)
2704 << VPP_SC_VBANK_LENGTH_BIT);
2705 }
2706 VSYNC_WR_MPEG_REG(
2707 VD2_SC_MISC + misc_off,
2708 sc_misc_val);
2709 } else {
2710 setting->sc_v_enable = false;
2711 setting->sc_h_enable = false;
2712 VSYNC_WR_MPEG_REG_BITS(
2713 VD2_SC_MISC + misc_off,
2714 0, VPP_SC_TOP_EN_BIT,
2715 VPP_SC_TOP_EN_WID);
2716 }
2717
2718 /* horitontal filter settings */
2719 if (setting->sc_h_enable) {
2720 if (vpp_filter->vpp_horz_coeff[1] & 0x8000) {
2721 VSYNC_WR_MPEG_REG(
2722 VD2_SCALE_COEF_IDX + misc_off,
2723 VPP_COEF_HORZ | VPP_COEF_9BIT);
2724 } else {
2725 VSYNC_WR_MPEG_REG(
2726 VD2_SCALE_COEF_IDX + misc_off,
2727 VPP_COEF_HORZ);
2728 }
2729 for (i = 0; i <
2730 (vpp_filter->vpp_horz_coeff[1] & 0xff); i++) {
2731 VSYNC_WR_MPEG_REG(
2732 VD2_SCALE_COEF + misc_off,
2733 vpp_filter->vpp_horz_coeff[i + 2]);
2734 }
2735 r1 = frame_par->VPP_hsc_linear_startp
2736 - frame_par->VPP_hsc_startp;
2737 r2 = frame_par->VPP_hsc_linear_endp
2738 - frame_par->VPP_hsc_startp;
2739 r3 = frame_par->VPP_hsc_endp
2740 - frame_par->VPP_hsc_startp;
2741
2742 VSYNC_WR_MPEG_REG_BITS(
2743 VD2_HSC_PHASE_CTRL + misc_off,
2744 frame_par->VPP_hf_ini_phase_,
2745 VPP_HSC_TOP_INI_PHASE_BIT,
2746 VPP_HSC_TOP_INI_PHASE_WID);
2747
2748 VSYNC_WR_MPEG_REG(
2749 VD2_HSC_REGION12_STARTP + misc_off,
2750 (0 << VPP_REGION1_BIT) |
2751 ((r1 & VPP_REGION_MASK)
2752 << VPP_REGION2_BIT));
2753 VSYNC_WR_MPEG_REG(
2754 VD2_HSC_REGION34_STARTP + misc_off,
2755 ((r2 & VPP_REGION_MASK)
2756 << VPP_REGION3_BIT) |
2757 ((r3 & VPP_REGION_MASK)
2758 << VPP_REGION4_BIT));
2759 VSYNC_WR_MPEG_REG(
2760 VD2_HSC_REGION4_ENDP + misc_off, r3);
2761
2762 VSYNC_WR_MPEG_REG(
2763 VD2_HSC_START_PHASE_STEP + misc_off,
2764 vpp_filter->vpp_hf_start_phase_step);
2765
2766 VSYNC_WR_MPEG_REG(
2767 VD2_HSC_REGION1_PHASE_SLOPE + misc_off,
2768 vpp_filter->vpp_hf_start_phase_slope);
2769
2770 VSYNC_WR_MPEG_REG(
2771 VD2_HSC_REGION3_PHASE_SLOPE + misc_off,
2772 vpp_filter->vpp_hf_end_phase_slope);
2773 }
2774
2775 /* vertical filter settings */
2776 if (setting->sc_v_enable) {
2777 VSYNC_WR_MPEG_REG_BITS(
2778 VD2_VSC_PHASE_CTRL + misc_off,
2779 (vpp_filter->vpp_vert_coeff[0] == 2) ? 1 : 0,
2780 VPP_PHASECTL_DOUBLELINE_BIT,
2781 VPP_PHASECTL_DOUBLELINE_WID);
2782 VSYNC_WR_MPEG_REG(
2783 VD2_SCALE_COEF_IDX + misc_off,
2784 VPP_COEF_VERT);
2785 for (i = 0; i < vpp_filter->vpp_vert_coeff[1]; i++) {
2786 VSYNC_WR_MPEG_REG(
2787 VD2_SCALE_COEF + misc_off,
2788 vpp_filter->vpp_vert_coeff[i + 2]);
2789 }
2790
2791 /* vertical chroma filter settings */
2792 if (vpp_filter->vpp_vert_chroma_filter_en) {
2793 const u32 *pCoeff =
2794 vpp_filter->vpp_vert_chroma_coeff;
2795 VSYNC_WR_MPEG_REG(
2796 VD2_SCALE_COEF_IDX + misc_off,
2797 VPP_COEF_VERT_CHROMA
2798 |VPP_COEF_SEP_EN);
2799 for (i = 0; i < pCoeff[1]; i++)
2800 VSYNC_WR_MPEG_REG(
2801 VD2_SCALE_COEF + misc_off,
2802 pCoeff[i + 2]);
2803 }
2804
2805 r1 = frame_par->VPP_vsc_endp
2806 - frame_par->VPP_vsc_startp;
2807 VSYNC_WR_MPEG_REG(
2808 VD2_VSC_REGION12_STARTP + misc_off, 0);
2809
2810 VSYNC_WR_MPEG_REG(
2811 VD2_VSC_REGION34_STARTP + misc_off,
2812 ((r1 & VPP_REGION_MASK)
2813 << VPP_REGION3_BIT) |
2814 ((r1 & VPP_REGION_MASK)
2815 << VPP_REGION4_BIT));
2816
2817 VSYNC_WR_MPEG_REG(
2818 VD2_VSC_REGION4_ENDP + misc_off, r1);
2819
2820 VSYNC_WR_MPEG_REG(
2821 VD2_VSC_START_PHASE_STEP + misc_off,
2822 vpp_filter->vpp_vsc_start_phase_step);
2823 }
2824
2825 VSYNC_WR_MPEG_REG(
2826 VPP_VD2_HDR_IN_SIZE + misc_off,
2827 (frame_par->VPP_pic_in_height_ << 16)
2828 | frame_par->VPP_line_in_length_);
2829}
2830
2831s32 config_vd_blend(
2832 u8 layer_id,
2833 struct vpp_frame_par_s *cur_frame_par,
2834 struct vframe_s *vf,
2835 u32 layer_alpha,
2836 struct blend_setting_s *setting)
2837{
2838 /* u32 type = 0; */
2839 u32 vskip, hskip;
2840
2841 if (!cur_frame_par || !setting || !vf)
2842 return -1;
2843
2844 setting->frame_par = cur_frame_par;
2845 setting->id = layer_id;
2846 setting->misc_reg_offt = 0;
2847
2848 setting->layer_alpha = layer_alpha;
2849 setting->preblend_h_start = 0;
2850 setting->preblend_h_end = 4096;
2851 if ((cur_frame_par->VPP_post_blend_vd_v_end_ -
2852 cur_frame_par->VPP_post_blend_vd_v_start_ + 1)
2853 > VPP_PREBLEND_VD_V_END_LIMIT) {
2854 setting->preblend_v_start =
2855 cur_frame_par->VPP_post_blend_vd_v_start_;
2856 setting->preblend_v_end =
2857 cur_frame_par->VPP_post_blend_vd_v_end_;
2858 } else {
2859 setting->preblend_v_start = 0;
2860 setting->preblend_v_end =
2861 VPP_PREBLEND_VD_V_END_LIMIT - 1;
2862 }
2863
2864 setting->preblend_h_size =
2865 cur_frame_par->VPP_line_in_length_;
2866
2867 /* old chip, vd2 has no scaler, so only can use mif setting */
2868 if ((setting->id != 0) &&
2869 (legacy_vpp || is_meson_tl1_cpu())) {
2870 vskip = cur_frame_par->vscale_skip_count;
2871 hskip = cur_frame_par->hscale_skip_count;
2872
2873 setting->postblend_h_start =
2874 cur_frame_par->VPP_hd_start_lines_;
2875 setting->postblend_h_end =
2876 cur_frame_par->VPP_hd_start_lines_ +
2877 (cur_frame_par->VPP_line_in_length_ >> hskip) - 1;
2878 setting->postblend_v_start =
2879 cur_frame_par->VPP_vd_start_lines_;
2880 setting->postblend_v_end =
2881 cur_frame_par->VPP_vd_start_lines_ +
2882 (cur_frame_par->VPP_pic_in_height_ >> vskip) - 1;
2883 setting->postblend_h_size =
2884 cur_frame_par->VPP_post_blend_h_size_;
2885 } else {
2886 setting->postblend_h_start =
2887 cur_frame_par->VPP_hsc_startp;
2888 setting->postblend_h_end =
2889 cur_frame_par->VPP_hsc_endp;
2890 setting->postblend_v_start =
2891 cur_frame_par->VPP_vsc_startp;
2892 setting->postblend_v_end =
2893 cur_frame_par->VPP_vsc_endp;
2894 setting->postblend_h_size =
2895 cur_frame_par->VPP_post_blend_h_size_;
2896 }
2897
2898 if (!legacy_vpp) {
2899 u32 temp_h = cur_frame_par->VPP_pic_in_height_;
2900
2901 temp_h <<= 16;
2902 setting->preblend_h_size |= temp_h;
2903
2904 temp_h =
2905 cur_frame_par->VPP_post_blend_vd_v_end_ + 1;
2906 temp_h <<= 16;
2907 setting->postblend_h_size |= temp_h;
2908 }
2909
2910#if 0
2911 /* TODO: need remove this work around check for afbc */
2912 type = vf->type;
2913 if (cur_frame_par->nocomp)
2914 type &= ~VIDTYPE_COMPRESS;
2915
2916 if (type & VIDTYPE_COMPRESS) {
2917 u32 v_phase;
2918 struct vppfilter_mode_s *vpp_filter =
2919 &cur_frame_par->vpp_filter;
2920 v_phase = vpp_filter->vpp_vsc_start_phase_step;
2921 v_phase *= (cur_frame_par->vscale_skip_count + 1);
2922 if ((v_phase > 0x1000000) &&
2923 (layer->disp_info.layer_top < 0)) {
2924 if ((cur_frame_par->VPP_vsc_endp > 0x6) &&
2925 ((cur_frame_par->VPP_vsc_endp < 0x250)
2926 || (cur_frame_par->VPP_vsc_endp <
2927 cur_frame_par->VPP_post_blend_vd_v_end_/2))) {
2928 setting->postblend_v_end -= 6;
2929 }
2930 }
2931 }
2932#endif
2933 return 0;
2934}
2935
2936static inline void vd2_vpp_blend_setting(
2937 struct blend_setting_s *setting)
2938{
2939 u32 misc_off;
2940 u32 vd_size_mask = VPP_VD_SIZE_MASK;
2941
2942 if (!setting)
2943 return;
2944
2945 /* g12a change to 13 bits */
2946 if (!legacy_vpp)
2947 vd_size_mask = 0x1fff;
2948
2949 misc_off = 0;
2950
2951 /* vd2 preblend size should be same postblend size */
2952 /* preblend setting */
2953 VSYNC_WR_MPEG_REG(
2954 VPP_BLEND_VD2_H_START_END + misc_off,
2955 ((setting->postblend_h_start & vd_size_mask)
2956 << VPP_VD1_START_BIT) |
2957 ((setting->postblend_h_end & vd_size_mask)
2958 << VPP_VD1_END_BIT));
2959
2960 VSYNC_WR_MPEG_REG(
2961 VPP_BLEND_VD2_V_START_END + misc_off,
2962 ((setting->postblend_v_start & vd_size_mask)
2963 << VPP_VD1_START_BIT) |
2964 ((setting->postblend_v_end & vd_size_mask)
2965 << VPP_VD1_END_BIT));
2966}
2967
2968static inline void proc_vd2_vsc_phase_per_vsync(
2969 struct vpp_frame_par_s *frame_par,
2970 struct vframe_s *vf,
2971 u32 vout_type)
2972{
2973 struct f2v_vphase_s *vphase;
2974 u32 misc_off, vin_type;
2975 struct vppfilter_mode_s *vpp_filter;
2976
2977 if (legacy_vpp || is_meson_tl1_cpu()
2978 || !frame_par || !vf)
2979 return;
2980
2981 vpp_filter = &frame_par->vpp_filter;
2982 misc_off = 0;
2983 vin_type = vf->type & VIDTYPE_TYPEMASK;
2984 /* vertical phase */
2985 vphase = &frame_par->VPP_vf_ini_phase_
2986 [vpp_phase_table[vin_type]
2987 [vout_type]];
2988 VSYNC_WR_MPEG_REG(
2989 VD2_VSC_INI_PHASE + misc_off,
2990 ((u32) (vphase->phase) << 8));
2991
2992 if (vphase->repeat_skip >= 0) {
2993 /* skip lines */
2994 VSYNC_WR_MPEG_REG_BITS(
2995 VD2_VSC_PHASE_CTRL + misc_off,
2996 skip_tab[vphase->repeat_skip],
2997 VPP_PHASECTL_INIRCVNUMT_BIT,
2998 VPP_PHASECTL_INIRCVNUM_WID +
2999 VPP_PHASECTL_INIRPTNUM_WID);
3000 } else {
3001 /* repeat first line */
3002 VSYNC_WR_MPEG_REG_BITS(
3003 VD2_VSC_PHASE_CTRL + misc_off,
3004 4,
3005 VPP_PHASECTL_INIRCVNUMT_BIT,
3006 VPP_PHASECTL_INIRCVNUM_WID);
3007 VSYNC_WR_MPEG_REG_BITS(
3008 VD2_VSC_PHASE_CTRL + misc_off,
3009 1 - vphase->repeat_skip,
3010 VPP_PHASECTL_INIRPTNUMT_BIT,
3011 VPP_PHASECTL_INIRPTNUM_WID);
3012 }
3013
3014 VSYNC_WR_MPEG_REG_BITS(
3015 VD2_VSC_PHASE_CTRL + misc_off,
3016 (vpp_filter->vpp_vert_coeff[0] == 2) ? 1 : 0,
3017 VPP_PHASECTL_DOUBLELINE_BIT,
3018 VPP_PHASECTL_DOUBLELINE_WID);
3019}
3020
3021static void pip_toggle_frame(struct vframe_s *vf)
3022{
3023 u32 first_picture = 0;
3024
3025 if (vf == NULL)
3026 return;
3027
3028 ori2_start_x_lines = 0;
3029 ori2_end_x_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3030 vf->compWidth : vf->width) - 1;
3031 ori2_start_y_lines = 0;
3032 ori2_end_y_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3033 vf->compHeight : vf->height) - 1;
3034
3035 if (debug_flag & DEBUG_FLAG_PRINT_TOGGLE_FRAME)
3036 pr_info("%s()\n", __func__);
3037
3038 if ((vf->width == 0) && (vf->height == 0)) {
3039 amlog_level(LOG_LEVEL_ERROR,
3040 "Video: invalid frame dimension\n");
3041 return;
3042 }
3043 if (cur_pipbuf
3044 && (cur_pipbuf != &local_pip)
3045 && (cur_pipbuf != vf)) {
3046 pip_frame_count++;
3047 if (pip_frame_count == 1)
3048 first_picture = 1;
3049#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3050 if (is_vsync_rdma_enable()) {
3051 if (pip_rdma_buf == cur_pipbuf)
3052 pipbuf_to_put = cur_pipbuf;
3053 else
3054 pip_vf_put(cur_pipbuf);
3055 } else {
3056 if (pipbuf_to_put) {
3057 pip_vf_put(
3058 pipbuf_to_put);
3059 pipbuf_to_put = NULL;
3060 }
3061 pip_vf_put(cur_pipbuf);
3062 }
3063#else
3064 pip_vf_put(cur_pipbuf);
3065#endif
3066 } else if (!cur_pipbuf
3067 || (cur_pipbuf == &local_pip))
3068 first_picture = 1;
3069
3070 /* switch buffer */
3071 if (vf->type & VIDTYPE_COMPRESS) {
3072 VSYNC_WR_MPEG_REG(VD2_AFBC_HEAD_BADDR,
3073 vf->compHeadAddr>>4);
3074 VSYNC_WR_MPEG_REG(VD2_AFBC_BODY_BADDR,
3075 vf->compBodyAddr>>4);
3076 }
3077 if (vf->canvas0Addr != 0) {
3078#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3079 if (vf->canvas0Addr != (u32)-1) {
3080 canvas_copy(vf->canvas0Addr & 0xff,
3081 disp_canvas_index[pip_rdma_canvas_id][3]);
3082 canvas_copy((vf->canvas0Addr >> 8) & 0xff,
3083 disp_canvas_index[pip_rdma_canvas_id][4]);
3084 canvas_copy((vf->canvas0Addr >> 16) & 0xff,
3085 disp_canvas_index[pip_rdma_canvas_id][5]);
3086 } else {
3087 vframe_canvas_set(&vf->canvas0_config[0],
3088 vf->plane_num,
3089 &disp_canvas_index[pip_rdma_canvas_id][3]);
3090 }
3091
3092 VSYNC_WR_MPEG_REG(
3093 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3094 disp_canvas[pip_rdma_canvas_id][1]);
3095
3096 pip_next_rdma_canvas_id = pip_rdma_canvas_id ? 0 : 1;
3097#endif
3098 }
3099
3100 if (pip_property_changed) {
3101 first_picture = 1;
3102 pip_property_changed = 0;
3103 }
3104 if (cur_pipbuf != vf)
3105 vf->type_backup = vf->type;
3106
3107 /* enable new config on the new frames */
3108 if ((first_picture) || (cur_pipbuf &&
3109 ((cur_pipbuf->bufWidth != vf->bufWidth) ||
3110 (cur_pipbuf->width != vf->width) ||
3111 (cur_pipbuf->height != vf->height) ||
3112 (cur_pipbuf->bitdepth != vf->bitdepth) ||
3113 (cur_pipbuf->trans_fmt != vf->trans_fmt) ||
3114 (cur_pipbuf->ratio_control != vf->ratio_control) ||
3115 ((cur_pipbuf->type_backup & VIDTYPE_INTERLACE) !=
3116 (vf->type_backup & VIDTYPE_INTERLACE)) ||
3117 (cur_pipbuf->type != vf->type)))) {
3118 int iret;
3119
3120 /* apply new vpp settings */
3121 nextpip_frame_par =
3122 (&pip_frame_parms[0] == nextpip_frame_par) ?
3123 &pip_frame_parms[1] : &pip_frame_parms[0];
3124
3125 update_layer_info(1);
3126 if (legacy_vpp || is_meson_tl1_cpu())
3127 iret = vpp_set_filters_no_scaler(
3128 &glayer_info[1], vf,
3129 nextpip_frame_par, vinfo);
3130 else
3131 iret = vpp_set_filters(
3132 &glayer_info[1], vf,
3133 nextpip_frame_par, vinfo,
3134 true);
3135
3136 if (iret == VppFilter_Success_and_Changed)
3137 pip_property_changed = 1;
3138
3139 pip_frame_ready_to_set = 1;
3140 }
3141
3142 if (((vf->type & VIDTYPE_NO_VIDEO_ENABLE) == 0) &&
3143 (!pip_property_changed || (vf != cur_pipbuf))) {
3144 if (disable_videopip == VIDEO_DISABLE_FORNEXT) {
3145 EnableVideoLayer2();
3146 disable_videopip = VIDEO_DISABLE_NONE;
3147 }
3148 if (first_picture &&
3149 (disable_videopip !=
3150 VIDEO_DISABLE_NORMAL)) {
3151 EnableVideoLayer2();
3152 }
3153 }
3154 cur_pipbuf = vf;
3155 if (first_picture)
3156 pip_frame_ready_to_set = 1;
3157}
3158
3159static void pip_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
3160{
3161 u32 r;
3162 u32 vphase, vini_phase;
3163 u32 pat, loop;
3164 static const u32 vpat[MAX_VSKIP_COUNT + 1] = {
3165 0, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
3166 u32 u, v;
3167 u32 type, bit_mode = 0;
3168
3169 if (!vf || !frame_par) {
3170 pr_err("pip_set_dcu vf is NULL\n");
3171 return;
3172 }
3173
3174 type = vf->type;
3175 pr_debug("pip_set_dcu %p, type:0x%x\n", vf, type);
3176
3177 if (frame_par->nocomp)
3178 type &= ~VIDTYPE_COMPRESS;
3179
3180 if (type & VIDTYPE_COMPRESS) {
3181 r = (3 << 24) |
3182 (vpp_hold_line << 16) |
3183 ((legacy_vpp ? 1 : 2) << 14) | /* burst1 */
3184 (vf->bitdepth & BITDEPTH_MASK);
3185
3186 if (frame_par->hscale_skip_count)
3187 r |= 0x33;
3188 if (frame_par->vscale_skip_count)
3189 r |= 0xcc;
3190
3191#ifdef TV_REVERSE
3192 if (reverse)
3193 r |= (1<<26) | (1<<27);
3194#endif
3195 if (vf->bitdepth & BITDEPTH_SAVING_MODE)
3196 r |= (1<<28); /* mem_saving_mode */
3197 if (type & VIDTYPE_SCATTER)
3198 r |= (1<<29);
3199 VSYNC_WR_MPEG_REG(VD2_AFBC_MODE, r);
3200
3201 r = 0x1700;
3202 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3203 if (vf && (vf->source_type
3204 != VFRAME_SOURCE_TYPE_HDMI))
3205 r |= (1 << 19); /* dos_uncomp */
3206 }
3207 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, r);
3208
3209 r = 0x100;
3210 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3211 if (type & VIDTYPE_VIU_444)
3212 r |= 0;
3213 else if (type & VIDTYPE_VIU_422)
3214 r |= (1 << 12);
3215 else
3216 r |= (2 << 12);
3217 }
3218 VSYNC_WR_MPEG_REG(VD2_AFBC_CONV_CTRL, r);
3219
3220 u = (vf->bitdepth >> (BITDEPTH_U_SHIFT)) & 0x3;
3221 v = (vf->bitdepth >> (BITDEPTH_V_SHIFT)) & 0x3;
3222 VSYNC_WR_MPEG_REG(VD2_AFBC_DEC_DEF_COLOR,
3223 0x3FF00000 | /*Y,bit20+*/
3224 0x80 << (u + 10) |
3225 0x80 << v);
3226 /* chroma formatter */
3227 r = HFORMATTER_EN |
3228 (0x8 << VFORMATTER_PHASE_BIT) |
3229 VFORMATTER_EN;
3230#if 0 /* def CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION */
3231 if (is_meson_txlx_package_962X()
3232 && !is_dolby_vision_stb_mode()
3233 && is_dolby_vision_on()) {
3234 r |= HFORMATTER_REPEAT |
3235 HFORMATTER_YC_RATIO_2_1 |
3236 HFORMATTER_EN |
3237 VFORMATTER_ALWAYS_RPT |
3238 (0 << VFORMATTER_INIPHASE_BIT) |
3239 (0x8 << VFORMATTER_PHASE_BIT) |
3240 VFORMATTER_EN;
3241 } else
3242#endif
3243 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3244 r = HFORMATTER_YC_RATIO_2_1 |
3245 HFORMATTER_EN |
3246 VFORMATTER_RPTLINE0_EN |
3247 (0x8 << VFORMATTER_PHASE_BIT) |
3248 VFORMATTER_EN;
3249
3250 if (is_dolby_vision_on())
3251 r |= HFORMATTER_REPEAT |
3252 (0xc << VFORMATTER_INIPHASE_BIT);
3253 else
3254 r |= HFORMATTER_RRT_PIXEL0 |
3255 (0 << VFORMATTER_INIPHASE_BIT);
3256
3257 if (type & VIDTYPE_VIU_444) {
3258 r &= ~HFORMATTER_EN;
3259 r &= ~VFORMATTER_EN;
3260 r &= ~HFORMATTER_YC_RATIO_2_1;
3261 } else if (type & VIDTYPE_VIU_422) {
3262 r &= ~VFORMATTER_EN;
3263 }
3264 } else {
3265 r = HFORMATTER_YC_RATIO_2_1 |
3266 HFORMATTER_EN |
3267 VFORMATTER_RPTLINE0_EN |
3268 (0x8 << VFORMATTER_PHASE_BIT) |
3269 VFORMATTER_EN;
3270 if (is_dolby_vision_on())
3271 r |= HFORMATTER_REPEAT |
3272 (0xc << VFORMATTER_INIPHASE_BIT);
3273 else
3274 r |= HFORMATTER_RRT_PIXEL0 |
3275 (0 << VFORMATTER_INIPHASE_BIT);
3276 }
3277 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_CTRL, r);
3278
3279 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3280 if (type & VIDTYPE_COMPRESS_LOSS)
3281 VSYNC_WR_MPEG_REG(
3282 VD2_AFBCDEC_IQUANT_ENABLE,
3283 ((1 << 11) |
3284 (1 << 10) |
3285 (1 << 4) |
3286 (1 << 0)));
3287 else
3288 VSYNC_WR_MPEG_REG(
3289 VD2_AFBCDEC_IQUANT_ENABLE, 0);
3290 }
3291
3292 vd2_path_select(true);
3293 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG +
3294 cur_dev->viu_off, 0);
3295 return;
3296 }
3297
3298 if ((vf->bitdepth & BITDEPTH_Y10) &&
3299 (!frame_par->nocomp)) {
3300 if (vf->type & VIDTYPE_VIU_444) {
3301 bit_mode = 2;
3302 } else {
3303 if (vf->bitdepth & FULL_PACK_422_MODE)
3304 bit_mode = 3;
3305 else
3306 bit_mode = 1;
3307 }
3308 } else {
3309 bit_mode = 0;
3310 }
3311 vd2_path_select(false);
3312 if (!legacy_vpp) {
3313 VSYNC_WR_MPEG_REG_BITS(
3314 G12_VD2_IF0_GEN_REG3,
3315 (bit_mode & 0x3), 8, 2);
3316 } else {
3317 VSYNC_WR_MPEG_REG_BITS(
3318 VD2_IF0_GEN_REG3 + cur_dev->viu_off,
3319 (bit_mode&0x3), 8, 2);
3320 }
3321 if (!(VSYNC_RD_MPEG_REG(VIU_MISC_CTRL1) & 0x1))
3322 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
3323 if (type & VIDTYPE_VIU_NV21)
3324 VSYNC_WR_MPEG_REG_BITS(
3325 VD2_IF0_GEN_REG2 +
3326 cur_dev->viu_off, 1, 0, 1);
3327 else
3328 VSYNC_WR_MPEG_REG_BITS(
3329 VD2_IF0_GEN_REG2 +
3330 cur_dev->viu_off, 0, 0, 1);
3331
3332 r = (3 << VDIF_URGENT_BIT) |
3333 (vpp_hold_line << VDIF_HOLD_LINES_BIT) |
3334 VDIF_FORMAT_SPLIT |
3335 VDIF_CHRO_RPT_LAST | VDIF_ENABLE;
3336 /* | VDIF_RESET_ON_GO_FIELD;*/
3337 if (debug_flag & DEBUG_FLAG_GOFIELD_MANUL)
3338 r |= 1<<7; /*for manul triggle gofiled.*/
3339
3340 if ((type & VIDTYPE_VIU_SINGLE_PLANE) == 0)
3341 r |= VDIF_SEPARATE_EN;
3342 else {
3343 if (type & VIDTYPE_VIU_422)
3344 r |= VDIF_FORMAT_422;
3345 else {
3346 r |= VDIF_FORMAT_RGB888_YUV444 |
3347 VDIF_DEMUX_MODE_RGB_444;
3348 }
3349 }
3350
3351 if (frame_par->hscale_skip_count)
3352 r |= VDIF_CHROMA_HZ_AVG | VDIF_LUMA_HZ_AVG;
3353
3354 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG + cur_dev->viu_off, r);
3355
3356#ifdef TV_REVERSE
3357 if (reverse) {
3358 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
3359 cur_dev->viu_off), 0xf, 2, 4);
3360 } else {
3361 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
3362 cur_dev->viu_off), 0, 2, 4);
3363 }
3364#endif
3365
3366 /* chroma formatter */
3367 if (type & VIDTYPE_VIU_444) {
3368 VSYNC_WR_MPEG_REG(
3369 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3370 HFORMATTER_YC_RATIO_1_1);
3371 } else if (type & VIDTYPE_VIU_FIELD) {
3372 vini_phase = 0xc << VFORMATTER_INIPHASE_BIT;
3373 vphase = ((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
3374 << VFORMATTER_PHASE_BIT;
3375 if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
3376 is_meson_txlx_cpu()) {
3377 if ((vf->width >= 3840) &&
3378 (vf->height >= 2160) &&
3379 (type & VIDTYPE_VIU_422)) {
3380 VSYNC_WR_MPEG_REG(
3381 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3382 HFORMATTER_RRT_PIXEL0 |
3383 HFORMATTER_YC_RATIO_2_1 |
3384 HFORMATTER_EN |
3385 VFORMATTER_RPTLINE0_EN |
3386 vini_phase | vphase);
3387 } else {
3388 VSYNC_WR_MPEG_REG(
3389 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3390 HFORMATTER_REPEAT |
3391 HFORMATTER_YC_RATIO_2_1 |
3392 HFORMATTER_EN |
3393 VFORMATTER_RPTLINE0_EN |
3394 vini_phase | vphase |
3395 VFORMATTER_EN);
3396 }
3397 } else {
3398 VSYNC_WR_MPEG_REG(
3399 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3400 HFORMATTER_REPEAT |
3401 HFORMATTER_YC_RATIO_2_1 |
3402 HFORMATTER_EN |
3403 VFORMATTER_RPTLINE0_EN |
3404 vini_phase | vphase |
3405 VFORMATTER_EN);
3406 }
3407 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
3408 VSYNC_WR_MPEG_REG(
3409 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3410 HFORMATTER_YC_RATIO_2_1 |
3411 HFORMATTER_EN |
3412 VFORMATTER_RPTLINE0_EN |
3413 (0xe << VFORMATTER_INIPHASE_BIT) |
3414 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
3415 << VFORMATTER_PHASE_BIT) |
3416 VFORMATTER_EN);
3417 } else {
3418 VSYNC_WR_MPEG_REG(
3419 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3420 HFORMATTER_REPEAT |
3421 HFORMATTER_YC_RATIO_2_1 |
3422 HFORMATTER_EN |
3423 VFORMATTER_RPTLINE0_EN |
3424 (0xc << VFORMATTER_INIPHASE_BIT) |
3425 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
3426 << VFORMATTER_PHASE_BIT) |
3427 VFORMATTER_EN);
3428 }
3429
3430 if (is_meson_txlx_cpu()
3431 || is_meson_g12a_cpu()
3432 || is_meson_g12b_cpu())
3433 VSYNC_WR_MPEG_REG_BITS(
3434 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3435 1, 29, 1);
3436
3437 /* LOOP/SKIP pattern */
3438 pat = vpat[frame_par->vscale_skip_count];
3439
3440 if (type & VIDTYPE_VIU_FIELD) {
3441 loop = 0;
3442
3443 if (type & VIDTYPE_INTERLACE)
3444 pat = vpat[frame_par->vscale_skip_count >> 1];
3445 } else if (type & VIDTYPE_MVC) {
3446 loop = 0x11;
3447 pat = 0x80;
3448 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
3449 loop = 0x11;
3450 pat <<= 4;
3451 } else
3452 loop = 0;
3453
3454 VSYNC_WR_MPEG_REG(
3455 VD2_IF0_RPT_LOOP + cur_dev->viu_off,
3456 (loop << VDIF_CHROMA_LOOP1_BIT) |
3457 (loop << VDIF_LUMA_LOOP1_BIT) |
3458 (loop << VDIF_CHROMA_LOOP0_BIT) |
3459 (loop << VDIF_LUMA_LOOP0_BIT));
3460
3461 VSYNC_WR_MPEG_REG(
3462 VD2_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
3463 VSYNC_WR_MPEG_REG(
3464 VD2_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
3465 VSYNC_WR_MPEG_REG(
3466 VD2_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
3467 VSYNC_WR_MPEG_REG(
3468 VD2_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
3469
3470 VSYNC_WR_MPEG_REG(
3471 VD2_IF0_LUMA_PSEL + cur_dev->viu_off, 0);
3472 VSYNC_WR_MPEG_REG(
3473 VD2_IF0_CHROMA_PSEL + cur_dev->viu_off, 0);
3474}
3475#endif
3476
3477/* for sdr/hdr/single dv switch with dual dv */
3478static u32 last_el_status;
3479/* for dual dv switch with different el size */
3480static u32 last_el_w;
3481bool has_enhanced_layer(struct vframe_s *vf)
3482{
3483 struct provider_aux_req_s req;
3484
3485 if (!vf)
3486 return 0;
3487 if (vf->source_type != VFRAME_SOURCE_TYPE_OTHERS)
3488 return 0;
3489 if (!is_dolby_vision_on())
3490 return 0;
3491
3492 req.vf = vf;
3493 req.bot_flag = 0;
3494 req.aux_buf = NULL;
3495 req.aux_size = 0;
3496 req.dv_enhance_exist = 0;
3497 vf_notify_provider_by_name("dvbldec",
3498 VFRAME_EVENT_RECEIVER_GET_AUX_DATA,
3499 (void *)&req);
3500 return req.dv_enhance_exist;
3501}
3502u32 property_changed_true;
3503
3504static u64 func_div(u64 number, u32 divid)
3505{
3506 u64 tmp = number;
3507
3508 do_div(tmp, divid);
3509 return tmp;
3510}
3511
3512static void vsync_toggle_frame(struct vframe_s *vf)
3513{
3514 u32 first_picture = 0;
3515 unsigned long flags = 0;
3516 bool vf_with_el = false;
3517 bool force_toggle = false;
3518 long long *clk_array;
3519 bool is_mvc = false;
3520
3521 if (vf == NULL)
3522 return;
3523 frame_count++;
3524 toggle_count++;
3525
3526 if (vf->type & VIDTYPE_MVC)
3527 is_mvc = true;
3528
3529 if (is_dolby_vision_enable())
3530 vf_with_el = has_enhanced_layer(vf);
3531
3532#ifdef PTS_TRACE_DEBUG
3533#ifdef PTS_TRACE_START
3534 if (pts_trace_his_rd < 16) {
3535#endif
3536 pts_trace_his[pts_trace_his_rd] = pts_trace;
3537 pts_his[pts_trace_his_rd] = vf->pts;
3538 scr_his[pts_trace_his_rd] = timestamp_pcrscr_get();
3539 pts_trace_his_rd++;
3540 if (pts_trace_his_rd >= 16)
3541 pts_trace_his_rd = 0;
3542#ifdef PTS_TRACE_START
3543 }
3544#endif
3545#endif
3546
3547#ifdef PTS_LOGGING
3548 if (pts_escape_vsync == 1) {
3549 pts_trace++;
3550 pts_escape_vsync = 0;
3551 }
3552 vsync_video_pattern();
3553 pre_pts_trace = pts_trace;
3554#endif
3555
3556#if defined(PTS_LOGGING) || defined(PTS_TRACE_DEBUG)
3557 pts_trace = 0;
3558#endif
3559
3560 ori_start_x_lines = 0;
3561 ori_end_x_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3562 vf->compWidth : vf->width) - 1;
3563 ori_start_y_lines = 0;
3564 ori_end_y_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3565 vf->compHeight : vf->height) - 1;
3566 if (debug_flag & DEBUG_FLAG_PRINT_TOGGLE_FRAME) {
3567 u32 pcr = timestamp_pcrscr_get();
3568 u32 vpts = timestamp_vpts_get();
3569 u32 apts = timestamp_apts_get();
3570
3571 pr_info("%s pts:%d.%06d pcr:%d.%06d vpts:%d.%06d apts:%d.%06d\n",
3572 __func__, (vf->pts) / 90000,
3573 ((vf->pts) % 90000) * 1000 / 90, (pcr) / 90000,
3574 ((pcr) % 90000) * 1000 / 90, (vpts) / 90000,
3575 ((vpts) % 90000) * 1000 / 90, (apts) / 90000,
3576 ((apts) % 90000) * 1000 / 90);
3577 }
3578
3579 if (trickmode_i || trickmode_fffb)
3580 trickmode_duration_count = trickmode_duration;
3581
3582 if (vf->early_process_fun) {
3583 if (vf->early_process_fun(vf->private_data, vf) == 1) {
3584 /* video_property_changed = true; */
3585 first_picture = 1;
3586 }
3587 } else {
3588#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
3589 if ((DI_POST_REG_RD(DI_IF1_GEN_REG) & 0x1) != 0) {
3590 /* check mif enable status, disable post di */
3591 VSYNC_WR_MPEG_REG(DI_POST_CTRL, 0x3 << 30);
3592 VSYNC_WR_MPEG_REG(DI_POST_SIZE,
3593 (32 - 1) | ((128 - 1) << 16));
3594 VSYNC_WR_MPEG_REG(DI_IF1_GEN_REG,
3595 READ_VCBUS_REG(DI_IF1_GEN_REG) &
3596 0xfffffffe);
3597 }
3598#endif
3599 }
3600
3601 timer_count = 0;
3602 if ((vf->width == 0) && (vf->height == 0)) {
3603 amlog_level(LOG_LEVEL_ERROR,
3604 "Video: invalid frame dimension\n");
3605 return;
3606 }
3607
3608 if (hold_video) {
3609 if (cur_dispbuf != vf) {
3610 new_frame_count++;
3611 if (vf->pts != 0) {
3612 amlog_mask(LOG_MASK_TIMESTAMP,
3613 "vpts to: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3614 vf->pts, timestamp_pcrscr_get(),
3615 READ_MPEG_REG(SCR_HIU));
3616
3617 timestamp_vpts_set(vf->pts);
3618 last_frame_duration = vf->duration;
3619 } else if (last_frame_duration) {
3620 amlog_mask(LOG_MASK_TIMESTAMP,
3621 "vpts inc: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3622 timestamp_vpts_get() +
3623 DUR2PTS(cur_dispbuf->duration),
3624 timestamp_pcrscr_get(),
3625 READ_MPEG_REG(SCR_HIU));
3626
3627 timestamp_vpts_inc(DUR2PTS
3628 (last_frame_duration));
3629
3630 vpts_remainder +=
3631 DUR2PTS_RM(last_frame_duration);
3632 if (vpts_remainder >= 0xf) {
3633 vpts_remainder -= 0xf;
3634 timestamp_vpts_inc(-1);
3635 }
3636 }
3637 video_vf_put(vf);
3638 return;
3639 }
3640 }
3641
3642 if ((cur_dispbuf) && (cur_dispbuf != &vf_local) && (cur_dispbuf != vf)
3643 && (video_property_changed != 2)) {
3644 new_frame_count++;
3645 if (new_frame_count == 1)
3646 first_picture = 1;
3647#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3648 if (is_vsync_rdma_enable()) {
3649#ifdef RDMA_RECYCLE_ORDERED_VFRAMES
3650 if (dispbuf_to_put_num < DISPBUF_TO_PUT_MAX) {
3651 dispbuf_to_put[dispbuf_to_put_num] =
3652 cur_dispbuf;
3653 dispbuf_to_put_num++;
3654 } else
3655 video_vf_put(cur_dispbuf);
3656#else
3657 if (cur_rdma_buf == cur_dispbuf) {
3658 dispbuf_to_put[0] = cur_dispbuf;
3659 dispbuf_to_put_num = 1;
3660 } else
3661 video_vf_put(cur_dispbuf);
3662#endif
3663 } else {
3664 int i;
3665
3666 for (i = 0; i < dispbuf_to_put_num; i++) {
3667 if (dispbuf_to_put[i]) {
3668 video_vf_put(
3669 dispbuf_to_put[i]);
3670 dispbuf_to_put[i] = NULL;
3671 }
3672 dispbuf_to_put_num = 0;
3673 }
3674 video_vf_put(cur_dispbuf);
3675 }
3676#else
3677 video_vf_put(cur_dispbuf);
3678#endif
3679 if (debug_flag & DEBUG_FLAG_LATENCY) {
3680 vf->ready_clock[3] = sched_clock();
3681 pr_info(
3682 "video toggle latency %lld ms, video get latency %lld ms, vdin put latency %lld ms, first %lld ms.\n",
3683 func_div(vf->ready_clock[3], 1000),
3684 func_div(vf->ready_clock[2], 1000),
3685 func_div(vf->ready_clock[1], 1000),
3686 func_div(vf->ready_clock[0], 1000));
3687 cur_dispbuf->ready_clock[4] = sched_clock();
3688 clk_array = cur_dispbuf->ready_clock;
3689 pr_info("video put latency %lld ms, video toggle latency %lld ms, video get latency %lld ms, vdin put latency %lld ms, first %lld ms.\n",
3690 func_div(*(clk_array + 4), 1000),
3691 func_div(*(clk_array + 3), 1000),
3692 func_div(*(clk_array + 2), 1000),
3693 func_div(*(clk_array + 1), 1000),
3694 func_div(*clk_array, 1000));
3695 }
3696 } else
3697 first_picture = 1;
3698
3699 if (video_property_changed) {
3700 property_changed_true = 2;
3701 video_property_changed = 0;
3702 first_picture = 1;
3703 }
3704 if (property_changed_true > 0) {
3705 property_changed_true--;
3706 first_picture = 1;
3707 }
3708
3709 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
3710 && first_picture)
3711 pr_info("first picture {%d,%d} pts:%x,\n",
3712 vf->width, vf->height, vf->pts);
3713
3714 /* switch buffer */
3715 post_canvas = vf->canvas0Addr;
3716 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) &&
3717 (vf->type & VIDTYPE_COMPRESS)) {
3718 VSYNC_WR_MPEG_REG(AFBC_HEAD_BADDR, vf->compHeadAddr>>4);
3719 VSYNC_WR_MPEG_REG(AFBC_BODY_BADDR, vf->compBodyAddr>>4);
3720 }
3721 if ((vf->canvas0Addr != 0)
3722#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
3723 && ((DI_POST_REG_RD(DI_POST_CTRL) & 0x1000) == 0)
3724 /* check di_post_viu_link */
3725#endif
3726 ) {
3727
3728#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3729 if (vf->canvas0Addr != (u32)-1) {
3730 canvas_copy(vf->canvas0Addr & 0xff,
3731 disp_canvas_index[rdma_canvas_id][0]);
3732 canvas_copy((vf->canvas0Addr >> 8) & 0xff,
3733 disp_canvas_index[rdma_canvas_id][1]);
3734 canvas_copy((vf->canvas0Addr >> 16) & 0xff,
3735 disp_canvas_index[rdma_canvas_id][2]);
3736 } else {
3737 vframe_canvas_set(&vf->canvas0_config[0],
3738 vf->plane_num,
3739 &disp_canvas_index[rdma_canvas_id][0]);
3740 }
3741 if (is_mvc || process_3d_type) {
3742 if (vf->canvas1Addr != (u32)-1) {
3743 canvas_copy(vf->canvas1Addr & 0xff,
3744 disp_canvas_index[rdma_canvas_id][3]);
3745 canvas_copy((vf->canvas1Addr >> 8) & 0xff,
3746 disp_canvas_index[rdma_canvas_id][4]);
3747 canvas_copy((vf->canvas1Addr >> 16) & 0xff,
3748 disp_canvas_index[rdma_canvas_id][5]);
3749 } else {
3750 vframe_canvas_set(&vf->canvas1_config[0],
3751 vf->plane_num,
3752 &disp_canvas_index[rdma_canvas_id][3]);
3753 }
3754 }
3755
3756 VSYNC_WR_MPEG_REG(
3757 VD1_IF0_CANVAS0 + cur_dev->viu_off,
3758 disp_canvas[rdma_canvas_id][0]);
3759 if (is_mvc)
3760 VSYNC_WR_MPEG_REG(
3761 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3762 disp_canvas[rdma_canvas_id][1]);
3763 if (cur_frame_par &&
3764 (cur_frame_par->vpp_2pic_mode == 1)) {
3765 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3766 cur_dev->viu_off,
3767 disp_canvas[rdma_canvas_id][0]);
3768 if (is_mvc)
3769 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3770 cur_dev->viu_off,
3771 disp_canvas[rdma_canvas_id][0]);
3772 } else {
3773 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3774 cur_dev->viu_off,
3775 disp_canvas[rdma_canvas_id][1]);
3776 if (is_mvc)
3777 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3778 cur_dev->viu_off,
3779 disp_canvas[rdma_canvas_id][0]);
3780 }
3781 if (cur_frame_par
3782 && (process_3d_type & MODE_3D_ENABLE)
3783 && (process_3d_type & MODE_3D_TO_2D_R)
3784 && (cur_frame_par->vpp_2pic_mode
3785 == VPP_SELECT_PIC1)) {
3786 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS0 + cur_dev->viu_off,
3787 disp_canvas[rdma_canvas_id][1]);
3788 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 + cur_dev->viu_off,
3789 disp_canvas[rdma_canvas_id][1]);
3790 if (is_mvc) {
3791 VSYNC_WR_MPEG_REG(
3792 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3793 disp_canvas[rdma_canvas_id][1]);
3794 VSYNC_WR_MPEG_REG(
3795 VD2_IF0_CANVAS1 + cur_dev->viu_off,
3796 disp_canvas[rdma_canvas_id][1]);
3797 }
3798 }
3799 next_rdma_canvas_id = rdma_canvas_id ? 0 : 1;
3800#else
3801 canvas_copy(vf->canvas0Addr & 0xff, disp_canvas_index[0]);
3802 canvas_copy((vf->canvas0Addr >> 8) & 0xff,
3803 disp_canvas_index[1]);
3804 canvas_copy((vf->canvas0Addr >> 16) & 0xff,
3805 disp_canvas_index[2]);
3806 if (is_mvc || process_3d_type) {
3807 canvas_copy(vf->canvas1Addr & 0xff,
3808 disp_canvas_index[3]);
3809 canvas_copy((vf->canvas1Addr >> 8) & 0xff,
3810 disp_canvas_index[4]);
3811 canvas_copy((vf->canvas1Addr >> 16) & 0xff,
3812 disp_canvas_index[5]);
3813 }
3814 VSYNC_WR_MPEG_REG(
3815 VD1_IF0_CANVAS0 + cur_dev->viu_off,
3816 disp_canvas[0]);
3817 if (is_mvc)
3818 VSYNC_WR_MPEG_REG(
3819 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3820 disp_canvas[0]);
3821 if (cur_frame_par &&
3822 (cur_frame_par->vpp_2pic_mode == 1)) {
3823 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3824 cur_dev->viu_off,
3825 disp_canvas[0]);
3826 if (is_mvc)
3827 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3828 cur_dev->viu_off,
3829 disp_canvas[0]);
3830 } else {
3831 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3832 cur_dev->viu_off,
3833 disp_canvas[1]);
3834 if (is_mvc)
3835 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3836 cur_dev->viu_off,
3837 disp_canvas[1]);
3838 }
3839#endif
3840 }
3841 /* set video PTS */
3842 if (cur_dispbuf != vf) {
3843 if (vf->pts != 0) {
3844 amlog_mask(LOG_MASK_TIMESTAMP,
3845 "vpts to: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3846 vf->pts, timestamp_pcrscr_get(),
3847 READ_MPEG_REG(SCR_HIU));
3848 timestamp_vpts_set(vf->pts);
3849 } else if (cur_dispbuf) {
3850 amlog_mask(LOG_MASK_TIMESTAMP,
3851 "vpts inc: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3852 timestamp_vpts_get() +
3853 DUR2PTS(cur_dispbuf->duration),
3854 timestamp_pcrscr_get(),
3855 READ_MPEG_REG(SCR_HIU));
3856
3857 timestamp_vpts_inc(DUR2PTS
3858 (cur_dispbuf->duration));
3859
3860 vpts_remainder +=
3861 DUR2PTS_RM(cur_dispbuf->duration);
3862 if (vpts_remainder >= 0xf) {
3863 vpts_remainder -= 0xf;
3864 timestamp_vpts_inc(-1);
3865 }
3866 }
3867 vf->type_backup = vf->type;
3868 }
3869
3870 if (cur_dispbuf && vf &&
3871 (cur_dispbuf->ratio_control &
3872 DISP_RATIO_ADAPTED_PICMODE) &&
3873 (cur_dispbuf->ratio_control ==
3874 vf->ratio_control) &&
3875 memcmp(&cur_dispbuf->pic_mode, &vf->pic_mode,
3876 sizeof(struct vframe_pic_mode_s)))
3877 force_toggle = true;
3878
3879 if ((last_process_3d_type != process_3d_type)
3880 || (last_el_status != vf_with_el))
3881 force_toggle = true;
3882
3883 /* enable new config on the new frames */
3884 if (first_picture || force_toggle ||
3885 (cur_dispbuf &&
3886 ((cur_dispbuf->bufWidth != vf->bufWidth) ||
3887 (cur_dispbuf->width != vf->width) ||
3888 (cur_dispbuf->height != vf->height) ||
3889 (cur_dispbuf->bitdepth != vf->bitdepth) ||
3890 (cur_dispbuf->trans_fmt != vf->trans_fmt) ||
3891 (cur_dispbuf->ratio_control != vf->ratio_control) ||
3892 ((cur_dispbuf->type_backup & VIDTYPE_INTERLACE) !=
3893 (vf->type_backup & VIDTYPE_INTERLACE)) ||
3894 (cur_dispbuf->type != vf->type)))) {
3895 int iret;
3896
3897 last_process_3d_type = process_3d_type;
3898 atomic_inc(&video_sizechange);
3899 wake_up_interruptible(&amvideo_sizechange_wait);
3900 amlog_mask(LOG_MASK_FRAMEINFO,
3901 "%s %dx%d ar=0x%x\n",
3902 ((vf->type & VIDTYPE_TYPEMASK) ==
3903 VIDTYPE_INTERLACE_TOP) ? "interlace-top"
3904 : ((vf->type & VIDTYPE_TYPEMASK)
3905 == VIDTYPE_INTERLACE_BOTTOM)
3906 ? "interlace-bottom" : "progressive", vf->width,
3907 vf->height, vf->ratio_control);
3908#ifdef TV_3D_FUNCTION_OPEN
3909 amlog_mask(LOG_MASK_FRAMEINFO,
3910 "%s trans_fmt=%u\n", __func__, vf->trans_fmt);
3911
3912#endif
3913 next_frame_par = (&frame_parms[0] == next_frame_par) ?
3914 &frame_parms[1] : &frame_parms[0];
3915
3916 update_layer_info(0);
3917 iret = vpp_set_filters(
3918 &glayer_info[0], vf,
3919 next_frame_par, vinfo,
3920 (is_dolby_vision_on() &&
3921 is_dolby_vision_stb_mode()));
3922
3923 if (iret == VppFilter_Success_and_Changed)
3924 video_property_changed = 1;
3925
3926 /* apply new vpp settings */
3927 frame_par_ready_to_set = 1;
3928
3929 if (((vf->width > 1920) && (vf->height > 1088)) ||
3930 ((vf->type & VIDTYPE_COMPRESS) &&
3931 (vf->compWidth > 1920) &&
3932 (vf->compHeight > 1080))) {
3933 if (vpu_clk_level == 0) {
3934 vpu_clk_level = 1;
3935 spin_lock_irqsave(&lock, flags);
3936 vpu_delay_work_flag |=
3937 VPU_DELAYWORK_VPU_CLK;
3938 spin_unlock_irqrestore(&lock, flags);
3939 }
3940 } else {
3941 if (vpu_clk_level == 1) {
3942 vpu_clk_level = 0;
3943 spin_lock_irqsave(&lock, flags);
3944 vpu_delay_work_flag |=
3945 VPU_DELAYWORK_VPU_CLK;
3946 spin_unlock_irqrestore(&lock, flags);
3947 }
3948 }
3949 }
3950
3951 /* if el is unnecessary, afbc2 need to be closed */
3952 if ((last_el_status == 1) && (vf_with_el == 0))
3953 need_disable_vd2 = true;
3954
3955 if (((vf->type & VIDTYPE_MVC) == 0)
3956 && last_mvc_status)
3957 need_disable_vd2 = true;
3958
3959 last_el_status = vf_with_el;
3960
3961 if (((vf->type & VIDTYPE_NO_VIDEO_ENABLE) == 0) &&
3962 ((!property_changed_true) || (vf != cur_dispbuf))) {
3963 if (disable_video == VIDEO_DISABLE_FORNEXT) {
3964 EnableVideoLayer();
3965 disable_video = VIDEO_DISABLE_NONE;
3966 }
3967 if (first_picture && (disable_video != VIDEO_DISABLE_NORMAL)) {
3968 EnableVideoLayer();
3969 if ((vf->type & VIDTYPE_MVC) ||
3970 (cur_dispbuf2 && (cur_dispbuf2->type & VIDTYPE_VD2)))
3971 EnableVideoLayer2();
3972 else if (cur_dispbuf2 &&
3973 !(cur_dispbuf2->type & VIDTYPE_COMPRESS))
3974 VD2_MEM_POWER_ON();
3975 else if (vf_with_el)
3976 EnableVideoLayer2();
3977 else if (need_disable_vd2)
3978 DisableVideoLayer2();
3979 }
3980 }
3981 if (cur_dispbuf && (cur_dispbuf->type != vf->type)) {
3982 if ((vf->type & VIDTYPE_MVC) ||
3983 (cur_dispbuf2 && (cur_dispbuf2->type & VIDTYPE_VD2)))
3984 EnableVideoLayer2();
3985 else {
3986 if (cur_dispbuf2 &&
3987 !(cur_dispbuf2->type & VIDTYPE_COMPRESS))
3988 VD2_MEM_POWER_ON();
3989 else if (vf_with_el)
3990 EnableVideoLayer2();
3991 else if (need_disable_vd2)
3992 DisableVideoLayer2();
3993 }
3994 }
3995 cur_dispbuf = vf;
3996 if (cur_dispbuf && (cur_dispbuf->type & VIDTYPE_MVC))
3997 last_mvc_status = true;
3998 else
3999 last_mvc_status = false;
4000
4001 if (first_picture) {
4002 frame_par_ready_to_set = 1;
4003 first_frame_toggled = 1;
4004
4005#ifdef VIDEO_PTS_CHASE
4006 av_sync_flag = 0;
4007#endif
4008 }
4009 if (cur_dispbuf != &vf_local)
4010 video_keeper_new_frame_notify();
4011
4012 if ((vf != &vf_local) && (vf) && !vsync_pts_aligned) {
4013#ifdef PTS_TRACE_DEBUG
4014 pr_info("####timestamp_pcrscr_get() = 0x%x, vf->pts = 0x%x, vsync_pts_inc = %d\n",
4015 timestamp_pcrscr_get(), vf->pts, vsync_pts_inc);
4016#endif
4017 if ((abs(timestamp_pcrscr_get() - vf->pts) <= (vsync_pts_inc))
4018 && ((int)(timestamp_pcrscr_get() - vf->pts) >= 0)) {
4019 /*vsync_pts_align = vsync_pts_inc / 4 - */
4020 /* (timestamp_pcrscr_get() - vf->pts);*/
4021 vsync_pts_align = 0;
4022 vsync_pts_aligned = true;
4023#ifdef PTS_TRACE_DEBUG
4024 pts_trace_his_rd = 0;
4025 pr_info("####vsync_pts_align set to %d\n",
4026 vsync_pts_align);
4027#endif
4028 }
4029 }
4030 if (stop_update)
4031 frame_par_ready_to_set = 0;
4032}
4033
4034static void viu_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
4035{
4036 u32 r;
4037 u32 vphase, vini_phase, vformatter;
4038 u32 pat, loop;
4039 static const u32 vpat[MAX_VSKIP_COUNT + 1] = {
4040 0, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
4041 u32 u, v;
4042 u32 type, bit_mode = 0;
4043 bool is_mvc = false;
4044
4045 if (vf == NULL) {
4046 pr_info("viu_set_dcu vf NULL, return\n");
4047 return;
4048 }
4049
4050 type = vf->type;
4051 if (type & VIDTYPE_MVC)
4052 is_mvc = true;
4053
4054 pr_debug("set dcu for vd1 %p, type:0x%x\n", vf, type);
4055 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
4056 if (frame_par->nocomp)
4057 type &= ~VIDTYPE_COMPRESS;
4058
4059 if (type & VIDTYPE_COMPRESS) {
4060 r = (3 << 24) |
4061 (vpp_hold_line << 16) |
4062 ((legacy_vpp ? 1 : 2) << 14) | /* burst1 */
4063 (vf->bitdepth & BITDEPTH_MASK);
4064
4065 if (frame_par->hscale_skip_count)
4066 r |= 0x33;
4067 if (frame_par->vscale_skip_count)
4068 r |= 0xcc;
4069#ifdef TV_REVERSE
4070 if (reverse)
4071 r |= (1<<26) | (1<<27);
4072#endif
4073 if (vf->bitdepth & BITDEPTH_SAVING_MODE)
4074 r |= (1<<28); /* mem_saving_mode */
4075 if (type & VIDTYPE_SCATTER)
4076 r |= (1<<29);
4077 VSYNC_WR_MPEG_REG(AFBC_MODE, r);
4078
4079 r = 0x1700;
4080 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4081 if (vf && (vf->source_type
4082 != VFRAME_SOURCE_TYPE_HDMI))
4083 r |= (1 << 19); /* dos_uncomp */
4084
4085 if (type & VIDTYPE_COMB_MODE)
4086 r |= (1 << 20);
4087 }
4088 VSYNC_WR_MPEG_REG(AFBC_ENABLE, r);
4089
4090 r = 0x100;
4091 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4092 if (type & VIDTYPE_VIU_444)
4093 r |= 0;
4094 else if (type & VIDTYPE_VIU_422)
4095 r |= (1 << 12);
4096 else
4097 r |= (2 << 12);
4098 }
4099 VSYNC_WR_MPEG_REG(AFBC_CONV_CTRL, r);
4100
4101 u = (vf->bitdepth >> (BITDEPTH_U_SHIFT)) & 0x3;
4102 v = (vf->bitdepth >> (BITDEPTH_V_SHIFT)) & 0x3;
4103 VSYNC_WR_MPEG_REG(AFBC_DEC_DEF_COLOR,
4104 0x3FF00000 | /*Y,bit20+*/
4105 0x80 << (u + 10) |
4106 0x80 << v);
4107 /* chroma formatter */
4108
4109 r = 0;
4110#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4111 if (is_meson_txlx_package_962X()
4112 && !is_dolby_vision_stb_mode()
4113 && is_dolby_vision_on()) {
4114 r = HFORMATTER_REPEAT |
4115 HFORMATTER_YC_RATIO_2_1 |
4116 HFORMATTER_EN |
4117 VFORMATTER_ALWAYS_RPT |
4118 (0 << VFORMATTER_INIPHASE_BIT) |
4119 (0x8 << VFORMATTER_PHASE_BIT) |
4120 VFORMATTER_EN;
4121 } else
4122#endif
4123 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4124 r = HFORMATTER_REPEAT |
4125 HFORMATTER_YC_RATIO_2_1 |
4126 HFORMATTER_EN |
4127 VFORMATTER_RPTLINE0_EN |
4128 (0xc << VFORMATTER_INIPHASE_BIT) |
4129 (0x8 << VFORMATTER_PHASE_BIT) |
4130 VFORMATTER_EN;
4131 if (type & VIDTYPE_VIU_444) {
4132 r &= ~HFORMATTER_EN;
4133 r &= ~VFORMATTER_EN;
4134 r &= ~HFORMATTER_YC_RATIO_2_1;
4135 } else if (type & VIDTYPE_VIU_422) {
4136 r &= ~VFORMATTER_EN;
4137 }
4138 } else {
4139 r = HFORMATTER_REPEAT |
4140 HFORMATTER_YC_RATIO_2_1 |
4141 HFORMATTER_EN |
4142 VFORMATTER_RPTLINE0_EN |
4143 (0xc << VFORMATTER_INIPHASE_BIT) |
4144 (0x8 << VFORMATTER_PHASE_BIT) |
4145 VFORMATTER_EN;
4146 }
4147 VSYNC_WR_MPEG_REG(AFBC_VD_CFMT_CTRL, r);
4148
4149 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4150 if (type & VIDTYPE_COMPRESS_LOSS)
4151 VSYNC_WR_MPEG_REG(
4152 AFBCDEC_IQUANT_ENABLE,
4153 ((1 << 11) |
4154 (1 << 10) |
4155 (1 << 4) |
4156 (1 << 0)));
4157 else
4158 VSYNC_WR_MPEG_REG(
4159 AFBCDEC_IQUANT_ENABLE, 0);
4160 }
4161
4162 vd1_path_select(true);
4163
4164 VSYNC_WR_MPEG_REG(
4165 VD1_IF0_GEN_REG + cur_dev->viu_off, 0);
4166 return;
4167
4168 } else {
4169 if ((vf->bitdepth & BITDEPTH_Y10) &&
4170 (!frame_par->nocomp)) {
4171 if (vf->type & VIDTYPE_VIU_444) {
4172 bit_mode = 2;
4173 } else {
4174 if (vf->bitdepth & FULL_PACK_422_MODE)
4175 bit_mode = 3;
4176 else
4177 bit_mode = 1;
4178 }
4179 } else {
4180 bit_mode = 0;
4181 }
4182 if (!legacy_vpp) {
4183 VSYNC_WR_MPEG_REG_BITS(
4184 G12_VD1_IF0_GEN_REG3,
4185 (bit_mode & 0x3), 8, 2);
4186 if (is_mvc)
4187 VSYNC_WR_MPEG_REG_BITS(
4188 G12_VD2_IF0_GEN_REG3,
4189 (bit_mode & 0x3), 8, 2);
4190 } else {
4191 VSYNC_WR_MPEG_REG_BITS(
4192 VD1_IF0_GEN_REG3 +
4193 cur_dev->viu_off,
4194 (bit_mode & 0x3), 8, 2);
4195 if (is_mvc)
4196 VSYNC_WR_MPEG_REG_BITS(
4197 VD2_IF0_GEN_REG3 +
4198 cur_dev->viu_off,
4199 (bit_mode & 0x3), 8, 2);
4200 }
4201#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
4202 DI_POST_WR_REG_BITS(DI_IF1_GEN_REG3,
4203 (bit_mode&0x3), 8, 2);
4204 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXLX))
4205 DI_POST_WR_REG_BITS(DI_IF2_GEN_REG3,
4206 (bit_mode & 0x3), 8, 2);
4207 if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12A))
4208 DI_POST_WR_REG_BITS(DI_IF0_GEN_REG3,
4209 (bit_mode & 0x3), 8, 2);
4210#endif
4211 vd1_path_select(false);
4212 VSYNC_WR_MPEG_REG(AFBC_ENABLE, 0);
4213 }
4214 }
4215
4216 r = (3 << VDIF_URGENT_BIT) |
4217 (vpp_hold_line << VDIF_HOLD_LINES_BIT) |
4218 VDIF_FORMAT_SPLIT |
4219 VDIF_CHRO_RPT_LAST | VDIF_ENABLE;
4220 /* | VDIF_RESET_ON_GO_FIELD;*/
4221 if (debug_flag & DEBUG_FLAG_GOFIELD_MANUL)
4222 r |= 1<<7; /*for manul triggle gofiled.*/
4223
4224 if ((type & VIDTYPE_VIU_SINGLE_PLANE) == 0)
4225 r |= VDIF_SEPARATE_EN;
4226 else {
4227 if (type & VIDTYPE_VIU_422)
4228 r |= VDIF_FORMAT_422;
4229 else {
4230 r |= VDIF_FORMAT_RGB888_YUV444 |
4231 VDIF_DEMUX_MODE_RGB_444;
4232 }
4233 }
4234
4235 if (frame_par->hscale_skip_count)
4236 r |= VDIF_CHROMA_HZ_AVG | VDIF_LUMA_HZ_AVG;
4237
4238 /*enable go field reset default according to vlsi*/
4239 r |= VDIF_RESET_ON_GO_FIELD;
4240 VSYNC_WR_MPEG_REG(VD1_IF0_GEN_REG + cur_dev->viu_off, r);
4241 if (is_mvc)
4242 VSYNC_WR_MPEG_REG(
4243 VD2_IF0_GEN_REG + cur_dev->viu_off, r);
4244
4245 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */
4246 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) {
4247 if (type & VIDTYPE_VIU_NV21) {
4248 VSYNC_WR_MPEG_REG_BITS(VD1_IF0_GEN_REG2 +
4249 cur_dev->viu_off, 1, 0, 1);
4250 } else {
4251 VSYNC_WR_MPEG_REG_BITS(VD1_IF0_GEN_REG2 +
4252 cur_dev->viu_off, 0, 0, 1);
4253 }
4254#ifdef TV_REVERSE
4255 if (reverse) {
4256 VSYNC_WR_MPEG_REG_BITS((VD1_IF0_GEN_REG2 +
4257 cur_dev->viu_off), 0xf, 2, 4);
4258 if (is_mvc)
4259 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4260 cur_dev->viu_off), 0xf, 2, 4);
4261 } else {
4262 VSYNC_WR_MPEG_REG_BITS((VD1_IF0_GEN_REG2 +
4263 cur_dev->viu_off), 0, 2, 4);
4264 if (is_mvc)
4265 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4266 cur_dev->viu_off), 0, 2, 4);
4267 }
4268#endif
4269 }
4270 /* #endif */
4271
4272 /* chroma formatter */
4273 if (type & VIDTYPE_VIU_444) {
4274 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4275 HFORMATTER_YC_RATIO_1_1);
4276 if (is_mvc)
4277 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4278 HFORMATTER_YC_RATIO_1_1);
4279 } else if (type & VIDTYPE_VIU_FIELD) {
4280 vini_phase = 0xc << VFORMATTER_INIPHASE_BIT;
4281 vphase =
4282 ((type & VIDTYPE_VIU_422) ? 0x10 : 0x08) <<
4283 VFORMATTER_PHASE_BIT;
4284
4285 /*vlsi suggest only for yuv420 vformatter shold be 1*/
4286 if (type & VIDTYPE_VIU_NV21)
4287 vformatter = VFORMATTER_EN;
4288 else
4289 vformatter = 0;
4290 if (is_meson_txlx_package_962X()
4291 && !is_dolby_vision_stb_mode()
4292 && is_dolby_vision_on()) {
4293 VSYNC_WR_MPEG_REG(
4294 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4295 HFORMATTER_REPEAT |
4296 HFORMATTER_YC_RATIO_2_1 |
4297 HFORMATTER_EN |
4298 ((type & VIDTYPE_VIU_422) ?
4299 VFORMATTER_RPTLINE0_EN :
4300 VFORMATTER_ALWAYS_RPT) |
4301 (0 << VFORMATTER_INIPHASE_BIT) |
4302 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4303 << VFORMATTER_PHASE_BIT) |
4304 ((type & VIDTYPE_VIU_422) ?
4305 0 :
4306 VFORMATTER_EN));
4307 pr_debug("\tvd1 set fmt(dovi tv)\n");
4308 } else if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
4309 is_meson_txlx_cpu()) {
4310 if ((vf->width >= 3840) &&
4311 (vf->height >= 2160) &&
4312 (type & VIDTYPE_VIU_422)) {
4313 VSYNC_WR_MPEG_REG(
4314 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4315 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4316 VFORMATTER_RPTLINE0_EN | vini_phase | vphase);
4317 if (is_mvc)
4318 VSYNC_WR_MPEG_REG(
4319 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4320 HFORMATTER_RRT_PIXEL0 |
4321 HFORMATTER_YC_RATIO_2_1 |
4322 HFORMATTER_EN |
4323 VFORMATTER_RPTLINE0_EN |
4324 vini_phase | vphase);
4325 } else {
4326 VSYNC_WR_MPEG_REG(
4327 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4328 (is_dolby_vision_on() ?
4329 HFORMATTER_REPEAT : 0) |
4330 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4331 VFORMATTER_RPTLINE0_EN | vini_phase | vphase |
4332 vformatter);
4333 if (is_mvc)
4334 VSYNC_WR_MPEG_REG(
4335 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4336 HFORMATTER_YC_RATIO_2_1 |
4337 HFORMATTER_EN |
4338 VFORMATTER_RPTLINE0_EN |
4339 vini_phase | vphase |
4340 vformatter);
4341 }
4342 } else {
4343 VSYNC_WR_MPEG_REG(
4344 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4345 (is_dolby_vision_on() ?
4346 HFORMATTER_REPEAT : 0) |
4347 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4348 VFORMATTER_RPTLINE0_EN |
4349 vini_phase | vphase |
4350 vformatter);
4351 if (is_mvc)
4352 VSYNC_WR_MPEG_REG(
4353 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4354 HFORMATTER_YC_RATIO_2_1 |
4355 HFORMATTER_EN |
4356 VFORMATTER_RPTLINE0_EN |
4357 vini_phase | vphase |
4358 vformatter);
4359 }
4360 } else if (type & VIDTYPE_MVC) {
4361 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4362 HFORMATTER_YC_RATIO_2_1 |
4363 HFORMATTER_EN |
4364 VFORMATTER_RPTLINE0_EN |
4365 (0xe << VFORMATTER_INIPHASE_BIT) |
4366 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4367 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4368 if (is_mvc)
4369 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4370 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4371 VFORMATTER_RPTLINE0_EN | (0xa <<
4372 VFORMATTER_INIPHASE_BIT) |
4373 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4374 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4375 } else if ((type & VIDTYPE_INTERLACE)
4376 && (((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP))) {
4377 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4378 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4379 VFORMATTER_RPTLINE0_EN | (0xe <<
4380 VFORMATTER_INIPHASE_BIT) |
4381 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4382 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4383 if (is_mvc)
4384 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4385 HFORMATTER_YC_RATIO_2_1 |
4386 HFORMATTER_EN |
4387 VFORMATTER_RPTLINE0_EN |
4388 (0xe << VFORMATTER_INIPHASE_BIT) |
4389 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4390 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4391 } else {
4392 if (is_meson_txlx_package_962X()
4393 && !is_dolby_vision_stb_mode()
4394 && is_dolby_vision_on()) {
4395 VSYNC_WR_MPEG_REG(
4396 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4397 HFORMATTER_REPEAT |
4398 HFORMATTER_YC_RATIO_2_1 |
4399 HFORMATTER_EN |
4400 VFORMATTER_ALWAYS_RPT |
4401 (0 << VFORMATTER_INIPHASE_BIT) |
4402 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4403 << VFORMATTER_PHASE_BIT) |
4404 VFORMATTER_EN);
4405 } else {
4406 VSYNC_WR_MPEG_REG(
4407 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4408 (is_dolby_vision_on() ?
4409 HFORMATTER_REPEAT : 0) |
4410 HFORMATTER_YC_RATIO_2_1 |
4411 HFORMATTER_EN |
4412 VFORMATTER_RPTLINE0_EN |
4413 (0xa << VFORMATTER_INIPHASE_BIT) |
4414 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4415 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4416 }
4417 if (is_mvc)
4418 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4419 HFORMATTER_YC_RATIO_2_1 |
4420 HFORMATTER_EN |
4421 VFORMATTER_RPTLINE0_EN |
4422 (0xa << VFORMATTER_INIPHASE_BIT) |
4423 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4424 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4425 }
4426#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4427 if ((is_meson_txlx_cpu()
4428 || is_meson_g12a_cpu()
4429 || is_meson_g12b_cpu())
4430 && is_dolby_vision_on()
4431 && is_dolby_vision_stb_mode()
4432 && (vf->source_type ==
4433 VFRAME_SOURCE_TYPE_OTHERS))
4434 VSYNC_WR_MPEG_REG_BITS(
4435 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4436 1, 29, 1);
4437#endif
4438 /* LOOP/SKIP pattern */
4439 pat = vpat[frame_par->vscale_skip_count];
4440
4441 if (type & VIDTYPE_VIU_FIELD) {
4442 loop = 0;
4443
4444 if (type & VIDTYPE_INTERLACE)
4445 pat = vpat[frame_par->vscale_skip_count >> 1];
4446 } else if (type & VIDTYPE_MVC) {
4447 loop = 0x11;
4448 if (is_need_framepacking_output()) {
4449 pat = 0;
4450 } else
4451 pat = 0x80;
4452 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
4453 loop = 0x11;
4454 pat <<= 4;
4455 } else
4456 loop = 0;
4457
4458 VSYNC_WR_MPEG_REG(
4459 VD1_IF0_RPT_LOOP + cur_dev->viu_off,
4460 (loop << VDIF_CHROMA_LOOP1_BIT) |
4461 (loop << VDIF_LUMA_LOOP1_BIT) |
4462 (loop << VDIF_CHROMA_LOOP0_BIT) |
4463 (loop << VDIF_LUMA_LOOP0_BIT));
4464 if (is_mvc)
4465 VSYNC_WR_MPEG_REG(
4466 VD2_IF0_RPT_LOOP + cur_dev->viu_off,
4467 (loop << VDIF_CHROMA_LOOP1_BIT) |
4468 (loop << VDIF_LUMA_LOOP1_BIT) |
4469 (loop << VDIF_CHROMA_LOOP0_BIT) |
4470 (loop << VDIF_LUMA_LOOP0_BIT));
4471
4472 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
4473 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
4474 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
4475 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
4476
4477 if (type & VIDTYPE_MVC) {
4478 if (is_need_framepacking_output())
4479 pat = 0;
4480 else
4481 pat = 0x88;
4482 VSYNC_WR_MPEG_REG(
4483 VD2_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
4484 VSYNC_WR_MPEG_REG(
4485 VD2_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
4486 VSYNC_WR_MPEG_REG(
4487 VD2_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
4488 VSYNC_WR_MPEG_REG(
4489 VD2_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
4490 }
4491
4492 /* picture 0/1 control */
4493 if ((((type & VIDTYPE_INTERLACE) == 0) &&
4494 ((type & VIDTYPE_VIU_FIELD) == 0) &&
4495 ((type & VIDTYPE_MVC) == 0)) ||
4496 (frame_par->vpp_2pic_mode & 0x3)) {
4497 /* progressive frame in two pictures */
4498 if (frame_par->vpp_2pic_mode & VPP_PIC1_FIRST) {
4499 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4500 cur_dev->viu_off, (2 << 26) |
4501 /* two pic mode */
4502 (2 << 24) |
4503 /* use own last line */
4504 (1 << 8) |
4505 /* toggle pic 0 and 1, use pic1 first*/
4506 (0x01));
4507 /* loop pattern */
4508 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4509 cur_dev->viu_off, (2 << 26) |
4510 /* two pic mode */
4511 (2 << 24) |
4512 /* use own last line */
4513 (1 << 8) |
4514 /* toggle pic 0 and 1,use pic1 first */
4515 (0x01));
4516 /* loop pattern */
4517 } else {
4518 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4519 cur_dev->viu_off, (2 << 26) |
4520 /* two pic mode */
4521 (2 << 24) |
4522 /* use own last line */
4523 (2 << 8) |
4524 /* toggle pic 0 and 1, use pic0 first */
4525 (0x01));
4526 /* loop pattern */
4527 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4528 cur_dev->viu_off, (2 << 26) |
4529 /* two pic mode */
4530 (2 << 24) |
4531 /* use own last line */
4532 (2 << 8) |
4533 /* toggle pic 0 and 1, use pic0 first */
4534 (0x01));
4535 /* loop pattern */
4536 }
4537 } else if (process_3d_type & MODE_3D_OUT_FA_MASK) {
4538 /*FA LR/TB output , do nothing*/
4539 } else {
4540 if (frame_par->vpp_2pic_mode & VPP_SELECT_PIC1) {
4541 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4542 cur_dev->viu_off, 0);
4543 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4544 cur_dev->viu_off, 0);
4545 if (is_mvc) {
4546 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
4547 cur_dev->viu_off, 0);
4548 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
4549 cur_dev->viu_off, 0);
4550 }
4551 } else {
4552 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4553 cur_dev->viu_off, 0);
4554 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4555 cur_dev->viu_off, 0);
4556 if (is_mvc) {
4557 VSYNC_WR_MPEG_REG(
4558 VD2_IF0_LUMA_PSEL +
4559 cur_dev->viu_off, 0);
4560 VSYNC_WR_MPEG_REG(
4561 VD2_IF0_CHROMA_PSEL +
4562 cur_dev->viu_off, 0);
4563 }
4564 }
4565 }
4566}
4567
4568static void vd2_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
4569{
4570 u32 r;
4571 u32 vphase, vini_phase;
4572 u32 pat, loop;
4573 static const u32 vpat[MAX_VSKIP_COUNT + 1] = {
4574 0, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
4575 u32 u, v;
4576 u32 type, bit_mode = 0;
4577
4578 if (!vf) {
4579 pr_err("vd2_set_dcu vf is NULL\n");
4580 return;
4581 }
4582
4583 type = vf->type;
4584 pr_debug("set dcu for vd2 %p, type:0x%x\n", vf, type);
4585 last_el_w = (vf->type
4586 & VIDTYPE_COMPRESS) ?
4587 vf->compWidth :
4588 vf->width;
4589 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
4590 if (type & VIDTYPE_COMPRESS) {
4591 r = (3 << 24) |
4592 (vpp_hold_line << 16) |
4593 ((legacy_vpp ? 1 : 2) << 14) | /* burst1 */
4594 (vf->bitdepth & BITDEPTH_MASK);
4595
4596 if (frame_par->hscale_skip_count)
4597 r |= 0x33;
4598 if (frame_par->vscale_skip_count)
4599 r |= 0xcc;
4600
4601#ifdef TV_REVERSE
4602 if (reverse)
4603 r |= (1<<26) | (1<<27);
4604#endif
4605 if (vf->bitdepth & BITDEPTH_SAVING_MODE)
4606 r |= (1<<28); /* mem_saving_mode */
4607 if (type & VIDTYPE_SCATTER)
4608 r |= (1<<29);
4609 VSYNC_WR_MPEG_REG(VD2_AFBC_MODE, r);
4610
4611 r = 0x1700;
4612 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4613 if (vf && (vf->source_type
4614 != VFRAME_SOURCE_TYPE_HDMI))
4615 r |= (1 << 19); /* dos_uncomp */
4616 }
4617 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, r);
4618
4619 r = 0x100;
4620 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4621 if (type & VIDTYPE_VIU_444)
4622 r |= 0;
4623 else if (type & VIDTYPE_VIU_422)
4624 r |= (1 << 12);
4625 else
4626 r |= (2 << 12);
4627 }
4628 VSYNC_WR_MPEG_REG(VD2_AFBC_CONV_CTRL, r);
4629
4630 u = (vf->bitdepth >> (BITDEPTH_U_SHIFT)) & 0x3;
4631 v = (vf->bitdepth >> (BITDEPTH_V_SHIFT)) & 0x3;
4632 VSYNC_WR_MPEG_REG(VD2_AFBC_DEC_DEF_COLOR,
4633 0x3FF00000 | /*Y,bit20+*/
4634 0x80 << (u + 10) |
4635 0x80 << v);
4636
4637 /* chroma formatter */
4638 r = HFORMATTER_EN |
4639 (0x8 << VFORMATTER_PHASE_BIT) |
4640 VFORMATTER_EN;
4641#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4642 if (is_meson_txlx_package_962X()
4643 && !is_dolby_vision_stb_mode()
4644 && is_dolby_vision_on()) {
4645 r |= HFORMATTER_REPEAT |
4646 HFORMATTER_YC_RATIO_2_1 |
4647 HFORMATTER_EN |
4648 VFORMATTER_ALWAYS_RPT |
4649 (0 << VFORMATTER_INIPHASE_BIT) |
4650 (0x8 << VFORMATTER_PHASE_BIT) |
4651 VFORMATTER_EN;
4652 } else
4653#endif
4654 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4655 r = HFORMATTER_YC_RATIO_2_1 |
4656 HFORMATTER_EN |
4657 VFORMATTER_RPTLINE0_EN |
4658 (0x8 << VFORMATTER_PHASE_BIT) |
4659 VFORMATTER_EN;
4660
4661 if (is_dolby_vision_on())
4662 r |= HFORMATTER_REPEAT |
4663 (0xc << VFORMATTER_INIPHASE_BIT);
4664 else
4665 r |= HFORMATTER_RRT_PIXEL0 |
4666 (0 << VFORMATTER_INIPHASE_BIT);
4667
4668 if (type & VIDTYPE_VIU_444) {
4669 r &= ~HFORMATTER_EN;
4670 r &= ~VFORMATTER_EN;
4671 r &= ~HFORMATTER_YC_RATIO_2_1;
4672 } else if (type & VIDTYPE_VIU_422) {
4673 r &= ~VFORMATTER_EN;
4674 }
4675 } else {
4676 r = HFORMATTER_YC_RATIO_2_1 |
4677 HFORMATTER_EN |
4678 VFORMATTER_RPTLINE0_EN |
4679 (0x8 << VFORMATTER_PHASE_BIT) |
4680 VFORMATTER_EN;
4681 if (is_dolby_vision_on())
4682 r |= HFORMATTER_REPEAT |
4683 (0xc << VFORMATTER_INIPHASE_BIT);
4684 else
4685 r |= HFORMATTER_RRT_PIXEL0 |
4686 (0 << VFORMATTER_INIPHASE_BIT);
4687 }
4688 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_CTRL, r);
4689
4690 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4691 if (type & VIDTYPE_COMPRESS_LOSS)
4692 VSYNC_WR_MPEG_REG(
4693 VD2_AFBCDEC_IQUANT_ENABLE,
4694 ((1 << 11) |
4695 (1 << 10) |
4696 (1 << 4) |
4697 (1 << 0)));
4698 else
4699 VSYNC_WR_MPEG_REG(
4700 VD2_AFBCDEC_IQUANT_ENABLE, 0);
4701 }
4702
4703 vd2_path_select(true);
4704 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG +
4705 cur_dev->viu_off, 0);
4706 return;
4707 } else {
4708 if ((vf->bitdepth & BITDEPTH_Y10) &&
4709 (!frame_par->nocomp)) {
4710 if (vf->type & VIDTYPE_VIU_444) {
4711 bit_mode = 2;
4712 } else {
4713 if (vf->bitdepth & FULL_PACK_422_MODE)
4714 bit_mode = 3;
4715 else
4716 bit_mode = 1;
4717 }
4718 } else {
4719 bit_mode = 0;
4720 }
4721 vd2_path_select(false);
4722 if (!legacy_vpp) {
4723 VSYNC_WR_MPEG_REG_BITS(
4724 G12_VD2_IF0_GEN_REG3,
4725 (bit_mode & 0x3), 8, 2);
4726 } else {
4727 VSYNC_WR_MPEG_REG_BITS(
4728 VD2_IF0_GEN_REG3 + cur_dev->viu_off,
4729 (bit_mode&0x3), 8, 2);
4730 }
4731 if (!(VSYNC_RD_MPEG_REG(VIU_MISC_CTRL1) & 0x1))
4732 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
4733 if (type & VIDTYPE_VIU_NV21)
4734 VSYNC_WR_MPEG_REG_BITS(
4735 VD2_IF0_GEN_REG2 +
4736 cur_dev->viu_off, 1, 0, 1);
4737 else
4738 VSYNC_WR_MPEG_REG_BITS(
4739 VD2_IF0_GEN_REG2 +
4740 cur_dev->viu_off, 0, 0, 1);
4741 }
4742 }
4743
4744 r = (3 << VDIF_URGENT_BIT) |
4745 (vpp_hold_line << VDIF_HOLD_LINES_BIT) |
4746 VDIF_FORMAT_SPLIT |
4747 VDIF_CHRO_RPT_LAST | VDIF_ENABLE;
4748 /* | VDIF_RESET_ON_GO_FIELD;*/
4749 if (debug_flag & DEBUG_FLAG_GOFIELD_MANUL)
4750 r |= 1<<7; /*for manul triggle gofiled.*/
4751
4752 if ((type & VIDTYPE_VIU_SINGLE_PLANE) == 0)
4753 r |= VDIF_SEPARATE_EN;
4754 else {
4755 if (type & VIDTYPE_VIU_422)
4756 r |= VDIF_FORMAT_422;
4757 else {
4758 r |= VDIF_FORMAT_RGB888_YUV444 |
4759 VDIF_DEMUX_MODE_RGB_444;
4760 }
4761 }
4762
4763 if (frame_par->hscale_skip_count)
4764 r |= VDIF_CHROMA_HZ_AVG | VDIF_LUMA_HZ_AVG;
4765
4766 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG + cur_dev->viu_off, r);
4767
4768#ifdef TV_REVERSE
4769 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) {
4770 if (reverse) {
4771 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4772 cur_dev->viu_off), 0xf, 2, 4);
4773 } else {
4774 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4775 cur_dev->viu_off), 0, 2, 4);
4776 }
4777 }
4778#endif
4779
4780 /* chroma formatter */
4781 if (type & VIDTYPE_VIU_444) {
4782 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4783 HFORMATTER_YC_RATIO_1_1);
4784 } else if (type & VIDTYPE_VIU_FIELD) {
4785 vini_phase = 0xc << VFORMATTER_INIPHASE_BIT;
4786 vphase =
4787 ((type & VIDTYPE_VIU_422) ? 0x10 : 0x08) <<
4788 VFORMATTER_PHASE_BIT;
4789 if (is_meson_txlx_package_962X()
4790 && !is_dolby_vision_stb_mode()
4791 && is_dolby_vision_on()) {
4792 VSYNC_WR_MPEG_REG(
4793 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4794 HFORMATTER_REPEAT |
4795 HFORMATTER_YC_RATIO_2_1 |
4796 HFORMATTER_EN |
4797 VFORMATTER_ALWAYS_RPT |
4798 (0 << VFORMATTER_INIPHASE_BIT) |
4799 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4800 << VFORMATTER_PHASE_BIT) |
4801 VFORMATTER_EN);
4802 pr_debug("\tvd2 set fmt(dovi tv)\n");
4803 } else if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
4804 is_meson_txlx_cpu()) {
4805 if ((vf->width >= 3840) &&
4806 (vf->height >= 2160) &&
4807 (type & VIDTYPE_VIU_422)) {
4808 VSYNC_WR_MPEG_REG(
4809 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4810 HFORMATTER_RRT_PIXEL0 |
4811 HFORMATTER_YC_RATIO_2_1 |
4812 HFORMATTER_EN | VFORMATTER_RPTLINE0_EN |
4813 vini_phase | vphase);
4814 } else {
4815 VSYNC_WR_MPEG_REG(
4816 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4817 (is_dolby_vision_on() ?
4818 HFORMATTER_REPEAT : 0) |
4819 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4820 VFORMATTER_RPTLINE0_EN |
4821 vini_phase | vphase |
4822 VFORMATTER_EN);
4823 }
4824 } else {
4825 VSYNC_WR_MPEG_REG(
4826 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4827 (is_dolby_vision_on() ?
4828 HFORMATTER_REPEAT : 0) |
4829 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4830 VFORMATTER_RPTLINE0_EN | vini_phase | vphase |
4831 VFORMATTER_EN);
4832 }
4833 } else if (type & VIDTYPE_MVC) {
4834 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4835 HFORMATTER_YC_RATIO_2_1 |
4836 HFORMATTER_EN |
4837 VFORMATTER_RPTLINE0_EN |
4838 (0xe << VFORMATTER_INIPHASE_BIT) |
4839 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4840 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4841 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4842 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4843 VFORMATTER_RPTLINE0_EN | (0xa <<
4844 VFORMATTER_INIPHASE_BIT) |
4845 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4846 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4847 } else if ((type & VIDTYPE_INTERLACE)
4848 &&
4849 (((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP))) {
4850 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4851 HFORMATTER_YC_RATIO_2_1 |
4852 HFORMATTER_EN |
4853 VFORMATTER_RPTLINE0_EN |
4854 (0xe << VFORMATTER_INIPHASE_BIT) |
4855 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4856 << VFORMATTER_PHASE_BIT) |
4857 VFORMATTER_EN);
4858 } else {
4859 if (is_meson_txlx_package_962X()
4860 && !is_dolby_vision_stb_mode()
4861 && is_dolby_vision_on()) {
4862 VSYNC_WR_MPEG_REG(
4863 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4864 HFORMATTER_REPEAT |
4865 HFORMATTER_YC_RATIO_2_1 |
4866 HFORMATTER_EN |
4867 VFORMATTER_ALWAYS_RPT |
4868 (0 << VFORMATTER_INIPHASE_BIT) |
4869 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4870 << VFORMATTER_PHASE_BIT) |
4871 VFORMATTER_EN);
4872 pr_info("\tvd2 set fmt(dovi tv)\n");
4873 } else {
4874 VSYNC_WR_MPEG_REG(
4875 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4876 (is_dolby_vision_on() ?
4877 HFORMATTER_REPEAT : 0) |
4878 HFORMATTER_YC_RATIO_2_1 |
4879 HFORMATTER_EN |
4880 VFORMATTER_RPTLINE0_EN |
4881 (0xc << VFORMATTER_INIPHASE_BIT) |
4882 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4883 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4884 pr_info("\tvd2 set fmt(dovi:%d)\n",
4885 /*is_dolby_vision_on()*/0);
4886 }
4887 }
4888#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4889 if ((is_meson_txlx_cpu()
4890 || is_meson_g12a_cpu()
4891 || is_meson_g12b_cpu())
4892 && is_dolby_vision_on()
4893 && is_dolby_vision_stb_mode()
4894 && (vf->source_type ==
4895 VFRAME_SOURCE_TYPE_OTHERS))
4896 VSYNC_WR_MPEG_REG_BITS(
4897 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4898 1, 29, 1);
4899#endif
4900 /* LOOP/SKIP pattern */
4901 pat = vpat[frame_par->vscale_skip_count];
4902
4903 if (type & VIDTYPE_VIU_FIELD) {
4904 loop = 0;
4905
4906 if (type & VIDTYPE_INTERLACE)
4907 pat = vpat[frame_par->vscale_skip_count >> 1];
4908 } else if (type & VIDTYPE_MVC) {
4909 loop = 0x11;
4910 pat = 0x80;
4911 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
4912 loop = 0x11;
4913 pat <<= 4;
4914 } else
4915 loop = 0;
4916
4917 VSYNC_WR_MPEG_REG(
4918 VD2_IF0_RPT_LOOP + cur_dev->viu_off,
4919 (loop << VDIF_CHROMA_LOOP1_BIT) |
4920 (loop << VDIF_LUMA_LOOP1_BIT) |
4921 (loop << VDIF_CHROMA_LOOP0_BIT) |
4922 (loop << VDIF_LUMA_LOOP0_BIT));
4923
4924 if (type & VIDTYPE_MVC)
4925 pat = 0x88;
4926
4927 VSYNC_WR_MPEG_REG(
4928 VD2_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
4929 VSYNC_WR_MPEG_REG(
4930 VD2_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
4931 VSYNC_WR_MPEG_REG(
4932 VD2_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
4933 VSYNC_WR_MPEG_REG(
4934 VD2_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
4935
4936 if (platform_type == 0) {
4937 /* picture 0/1 control */
4938 if (((type & VIDTYPE_INTERLACE) == 0) &&
4939 ((type & VIDTYPE_VIU_FIELD) == 0) &&
4940 ((type & VIDTYPE_MVC) == 0)) {
4941 /* progressive frame in two pictures */
4942
4943 } else {
4944 VSYNC_WR_MPEG_REG(
4945 VD2_IF0_LUMA_PSEL + cur_dev->viu_off, 0);
4946 VSYNC_WR_MPEG_REG(
4947 VD2_IF0_CHROMA_PSEL + cur_dev->viu_off, 0);
4948 }
4949 } else {
4950 /* picture 0/1 control */
4951 if ((((type & VIDTYPE_INTERLACE) == 0) &&
4952 ((type & VIDTYPE_VIU_FIELD) == 0) &&
4953 ((type & VIDTYPE_MVC) == 0)) ||
4954 (next_frame_par->vpp_2pic_mode & 0x3)) {
4955 /* progressive frame in two pictures */
4956
4957 } else {
4958 if (next_frame_par->vpp_2pic_mode & VPP_SELECT_PIC1) {
4959 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
4960 cur_dev->viu_off, 0);
4961 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
4962 cur_dev->viu_off, 0);
4963 } else {
4964 VSYNC_WR_MPEG_REG(
4965 VD2_IF0_LUMA_PSEL +
4966 cur_dev->viu_off, 0);
4967 VSYNC_WR_MPEG_REG(
4968 VD2_IF0_CHROMA_PSEL +
4969 cur_dev->viu_off, 0);
4970 }
4971 }
4972 }
4973}
4974
4975static int detect_vout_type(void)
4976{
4977 int vout_type = VOUT_TYPE_PROG;
4978 if ((vinfo) && (vinfo->field_height != vinfo->height)) {
4979 if ((vinfo->height == 576) || (vinfo->height == 480))
4980 vout_type = (READ_VCBUS_REG(ENCI_INFO_READ) &
4981 (1 << 29)) ?
4982 VOUT_TYPE_BOT_FIELD : VOUT_TYPE_TOP_FIELD;
4983 else if (vinfo->height == 1080)
4984 vout_type = (((READ_VCBUS_REG(ENCP_INFO_READ) >> 16) &
4985 0x1fff) < 562) ?
4986 VOUT_TYPE_TOP_FIELD : VOUT_TYPE_BOT_FIELD;
4987
4988#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
4989 if (is_vsync_rdma_enable()) {
4990 if (vout_type == VOUT_TYPE_TOP_FIELD)
4991 vout_type = VOUT_TYPE_BOT_FIELD;
4992 else if (vout_type == VOUT_TYPE_BOT_FIELD)
4993 vout_type = VOUT_TYPE_TOP_FIELD;
4994 }
4995#endif
4996 }
4997 return vout_type;
4998}
4999
5000#ifdef INTERLACE_FIELD_MATCH_PROCESS
5001static inline bool interlace_field_type_need_match(int vout_type,
5002 struct vframe_s *vf)
5003{
5004 if (DUR2PTS(vf->duration) != vsync_pts_inc)
5005 return false;
5006
5007 if ((vout_type == VOUT_TYPE_TOP_FIELD) &&
5008 ((vf->type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_BOTTOM))
5009 return true;
5010 else if ((vout_type == VOUT_TYPE_BOT_FIELD) &&
5011 ((vf->type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP))
5012 return true;
5013
5014 return false;
5015}
5016#endif
5017
5018static int calc_hold_line(void)
5019{
5020 if ((READ_VCBUS_REG(ENCI_VIDEO_EN) & 1) == 0)
5021 return READ_VCBUS_REG(ENCP_VIDEO_VAVON_BLINE) >> 1;
5022 else
5023 return READ_VCBUS_REG(ENCP_VFIFO2VD_LINE_TOP_START) >> 1;
5024}
5025
5026/* add a new function to check if current display frame has been*/
5027/*displayed for its duration */
5028static inline bool duration_expire(struct vframe_s *cur_vf,
5029 struct vframe_s *next_vf, u32 dur)
5030{
5031 u32 pts;
5032 s32 dur_disp;
5033 static s32 rpt_tab_idx;
5034 static const u32 rpt_tab[4] = { 0x100, 0x100, 0x300, 0x300 };
5035
5036 /* do not switch to new frames in none-normal speed */
5037 if (vsync_slow_factor > 1000)
5038 return false;
5039
5040 if ((cur_vf == NULL) || (cur_dispbuf == &vf_local))
5041 return true;
5042
5043 pts = next_vf->pts;
5044 if (pts == 0)
5045 dur_disp = DUR2PTS(cur_vf->duration);
5046 else
5047 dur_disp = pts - timestamp_vpts_get();
5048
5049 if ((dur << 8) >= (dur_disp * rpt_tab[rpt_tab_idx & 3])) {
5050 rpt_tab_idx = (rpt_tab_idx + 1) & 3;
5051 return true;
5052 } else
5053 return false;
5054}
5055
5056#define VPTS_RESET_THRO
5057
5058#ifdef PTS_LOGGING
5059static inline void vpts_perform_pulldown(struct vframe_s *next_vf,
5060 bool *expired)
5061{
5062 int pattern_range, expected_curr_interval;
5063 int expected_prev_interval;
5064
5065 /* Dont do anything if we have invalid data */
5066 if (!next_vf || !next_vf->pts || !next_vf->next_vf_pts_valid)
5067 return;
5068
5069 switch (pts_pattern_detected) {
5070 case PTS_32_PATTERN:
5071 pattern_range = PTS_32_PATTERN_DETECT_RANGE;
5072 switch (pre_pts_trace) {
5073 case 3:
5074 expected_prev_interval = 3;
5075 expected_curr_interval = 2;
5076 break;
5077 case 2:
5078 expected_prev_interval = 2;
5079 expected_curr_interval = 3;
5080 break;
5081 default:
5082 return;
5083 }
5084 break;
5085 case PTS_22_PATTERN:
5086 if (pre_pts_trace != 2)
5087 return;
5088 pattern_range = PTS_22_PATTERN_DETECT_RANGE;
5089 expected_prev_interval = 2;
5090 expected_curr_interval = 2;
5091 break;
5092 case PTS_41_PATTERN:
5093 /* TODO */
5094 default:
5095 return;
5096 }
5097
5098 /* We do nothing if we dont have enough data*/
5099 if (pts_pattern[pts_pattern_detected] != pattern_range)
5100 return;
5101
5102 if (*expired) {
5103 if (pts_trace < expected_curr_interval) {
5104 /* 2323232323..2233..2323, prev=2, curr=3,*/
5105 /* check if next frame will toggle after 3 vsyncs */
5106 /* 22222...22222 -> 222..2213(2)22...22 */
5107 /* check if next frame will toggle after 3 vsyncs */
5108 int nextPts = timestamp_pcrscr_get() + vsync_pts_align;
5109
5110 if (/*((int)(nextPts + expected_prev_interval * */
5111 /*vsync_pts_inc - next_vf->next_vf_pts) < 0) && */
5112 ((int)(nextPts + (expected_prev_interval + 1) *
5113 vsync_pts_inc - next_vf->next_vf_pts) >= 0)) {
5114 *expired = false;
5115 if (pts_log_enable[PTS_32_PATTERN]
5116 || pts_log_enable[PTS_22_PATTERN])
5117 pr_info("hold frame for pattern: %d",
5118 pts_pattern_detected);
5119 }
5120
5121 /* here need to escape a vsync */
5122 if (timestamp_pcrscr_get() >
5123 (next_vf->pts + vsync_pts_inc)) {
5124 *expired = true;
5125 pts_escape_vsync = 1;
5126 if (pts_log_enable[PTS_32_PATTERN]
5127 || pts_log_enable[PTS_22_PATTERN])
5128 pr_info("escape a vsync pattern: %d",
5129 pts_pattern_detected);
5130 }
5131 }
5132 } else {
5133 if (pts_trace == expected_curr_interval) {
5134 /* 23232323..233223...2323 curr=2, prev=3 */
5135 /* check if this frame will expire next vsyncs and */
5136 /* next frame will expire after 3 vsyncs */
5137 /* 22222...22222 -> 222..223122...22 */
5138 /* check if this frame will expire next vsyncs and */
5139 /* next frame will expire after 2 vsyncs */
5140 int nextPts = timestamp_pcrscr_get() + vsync_pts_align;
5141
5142 if (((int)(nextPts + vsync_pts_inc - next_vf->pts)
5143 >= 0) &&
5144 ((int)(nextPts +
5145 vsync_pts_inc * (expected_prev_interval - 1)
5146 - next_vf->next_vf_pts) < 0) &&
5147 ((int)(nextPts + expected_prev_interval *
5148 vsync_pts_inc - next_vf->next_vf_pts) >= 0)) {
5149 *expired = true;
5150 if (pts_log_enable[PTS_32_PATTERN]
5151 || pts_log_enable[PTS_22_PATTERN])
5152 pr_info("pull frame for pattern: %d",
5153 pts_pattern_detected);
5154 }
5155 }
5156 }
5157}
5158#endif
5159
5160static inline bool vpts_expire(struct vframe_s *cur_vf,
5161 struct vframe_s *next_vf,
5162 int toggled_cnt)
5163{
5164 u32 pts;
5165#ifdef VIDEO_PTS_CHASE
5166 u32 vid_pts, scr_pts;
5167#endif
5168 u32 systime;
5169 u32 adjust_pts, org_vpts;
5170 bool expired;
5171
5172 if (next_vf == NULL)
5173 return false;
5174
5175 if (videopeek) {
5176 videopeek = false;
5177 pr_info("video peek toogle the first frame\n");
5178 return true;
5179 }
5180
5181 if (debug_flag & DEBUG_FLAG_TOGGLE_FRAME_PER_VSYNC)
5182 return true;
5183 if (/*(cur_vf == NULL) || (cur_dispbuf == &vf_local) ||*/ debugflags &
5184 DEBUG_FLAG_FFPLAY)
5185 return true;
5186
5187 if ((freerun_mode == FREERUN_NODUR) || hdmi_in_onvideo)
5188 return true;
5189 /*freerun for game mode*/
5190 if (next_vf->flag & VFRAME_FLAG_GAME_MODE)
5191 return true;
5192
5193 if (step_enable) {
5194 if (step_flag)
5195 return false;
5196 if (!step_flag) {
5197 step_flag = 1;
5198 return true;
5199 }
5200 }
5201
5202 if ((trickmode_i == 1) || ((trickmode_fffb == 1))) {
5203 if (((atomic_read(&trickmode_framedone) == 0)
5204 || (trickmode_i == 1)) && (!to_notify_trick_wait)
5205 && (trickmode_duration_count <= 0)) {
5206#if 0
5207 if (cur_vf)
5208 pts = timestamp_vpts_get() +
5209 trickmode_duration;
5210 else
5211 return true;
5212#else
5213 return true;
5214#endif
5215 } else
5216 return false;
5217 }
5218 if (omx_secret_mode && (!omx_run || !omx_drop_done))
5219 return false;
5220
5221 if (next_vf->duration == 0)
5222
5223 return true;
5224
5225 systime = timestamp_pcrscr_get();
5226 pts = next_vf->pts;
5227
5228 if (((pts == 0) && (cur_dispbuf != &vf_local))
5229 || (freerun_mode == FREERUN_DUR)) {
5230 pts =
5231 timestamp_vpts_get() +
5232 (cur_vf ? DUR2PTS(cur_vf->duration) : 0);
5233 }
5234 /* check video PTS discontinuity */
5235 else if ((enable_video_discontinue_report) &&
5236 (first_frame_toggled) &&
5237 (abs(systime - pts) > tsync_vpts_discontinuity_margin()) &&
5238 ((next_vf->flag & VFRAME_FLAG_NO_DISCONTINUE) == 0)) {
5239 /*
5240 * if paused ignore discontinue
5241 */
5242 if (!timestamp_pcrscr_enable_state()) {
5243 /*pr_info("video pts discontinue,
5244 * but pcrscr is disabled,
5245 * return false\n");
5246 */
5247 return false;
5248 }
5249 pts =
5250 timestamp_vpts_get() +
5251 (cur_vf ? DUR2PTS(cur_vf->duration) : 0);
5252 /* pr_info("system=0x%x vpts=0x%x\n", systime,*/
5253 /*timestamp_vpts_get()); */
5254 if ((int)(systime - pts) >= 0) {
5255 if (next_vf->pts != 0)
5256 tsync_avevent_locked(VIDEO_TSTAMP_DISCONTINUITY,
5257 next_vf->pts);
5258 else if (next_vf->pts == 0 &&
5259 (tsync_get_mode() != TSYNC_MODE_PCRMASTER))
5260 tsync_avevent_locked(VIDEO_TSTAMP_DISCONTINUITY,
5261 pts);
5262
5263 /* pr_info("discontinue,
5264 * systime=0x%x vpts=0x%x next_vf->pts = 0x%x\n",
5265 * systime,
5266 * pts,
5267 * next_vf->pts);
5268 */
5269
5270 /* pts==0 is a keep frame maybe. */
5271 if (systime > next_vf->pts || next_vf->pts == 0)
5272 return true;
5273 if (omx_secret_mode == true)
5274 return true;
5275
5276 return false;
5277 } else if (omx_secret_mode == true)
5278 return true;
5279 } else if (omx_run
5280 && omx_secret_mode
5281 && (omx_pts + omx_pts_interval_upper < next_vf->pts)
5282 && (abs(omx_pts_set_index - next_vf->omx_index) <= 16)
5283 && (omx_pts_set_index >= next_vf->omx_index)) {
5284 pr_info("omx, omx_pts=%d omx_pts_set_index=%d pts=%d omx_index=%d\n",
5285 omx_pts,
5286 omx_pts_set_index,
5287 next_vf->pts,
5288 next_vf->omx_index);
5289 return true;
5290 }
5291#if 1
5292 if (vsync_pts_inc_upint && (!freerun_mode)) {
5293 struct vframe_states frame_states;
5294 u32 delayed_ms, t1, t2;
5295
5296 delayed_ms =
5297 calculation_stream_delayed_ms(PTS_TYPE_VIDEO, &t1, &t2);
5298 if (video_vf_get_states(&frame_states) == 0) {
5299 u32 pcr = timestamp_pcrscr_get();
5300 u32 vpts = timestamp_vpts_get();
5301 u32 diff = pcr - vpts;
5302
5303 if (delayed_ms > 200) {
5304 vsync_freerun++;
5305 if (pcr < next_vf->pts
5306 || pcr < vpts + next_vf->duration) {
5307 if (next_vf->pts > 0) {
5308 timestamp_pcrscr_set
5309 (next_vf->pts);
5310 } else {
5311 timestamp_pcrscr_set(vpts +
5312 next_vf->duration);
5313 }
5314 }
5315 return true;
5316 } else if ((frame_states.buf_avail_num >= 3)
5317 && diff < vsync_pts_inc << 2) {
5318 vsync_pts_inc_adj =
5319 vsync_pts_inc + (vsync_pts_inc >> 2);
5320 vsync_pts_125++;
5321 } else if ((frame_states.buf_avail_num >= 2
5322 && diff < vsync_pts_inc << 1)) {
5323 vsync_pts_inc_adj =
5324 vsync_pts_inc + (vsync_pts_inc >> 3);
5325 vsync_pts_112++;
5326 } else if (frame_states.buf_avail_num >= 1
5327 && diff < vsync_pts_inc - 20) {
5328 vsync_pts_inc_adj = vsync_pts_inc + 10;
5329 vsync_pts_101++;
5330 } else {
5331 vsync_pts_inc_adj = 0;
5332 vsync_pts_100++;
5333 }
5334 }
5335 }
5336#endif
5337
5338#ifdef VIDEO_PTS_CHASE
5339 vid_pts = timestamp_vpts_get();
5340 scr_pts = timestamp_pcrscr_get();
5341 vid_pts += vsync_pts_inc;
5342
5343 if (av_sync_flag) {
5344 if (vpts_chase) {
5345 if ((abs(vid_pts - scr_pts) < 6000)
5346 || (abs(vid_pts - scr_pts) > 90000)) {
5347 vpts_chase = 0;
5348 pr_info("leave vpts chase mode, diff:%d\n",
5349 vid_pts - scr_pts);
5350 }
5351 } else if ((abs(vid_pts - scr_pts) > 9000)
5352 && (abs(vid_pts - scr_pts) < 90000)) {
5353 vpts_chase = 1;
5354 if (vid_pts < scr_pts)
5355 vpts_chase_pts_diff = 50;
5356 else
5357 vpts_chase_pts_diff = -50;
5358 vpts_chase_counter =
5359 ((int)(scr_pts - vid_pts)) / vpts_chase_pts_diff;
5360 pr_info("enter vpts chase mode, diff:%d\n",
5361 vid_pts - scr_pts);
5362 } else if (abs(vid_pts - scr_pts) >= 90000) {
5363 pr_info("video pts discontinue, diff:%d\n",
5364 vid_pts - scr_pts);
5365 }
5366 } else
5367 vpts_chase = 0;
5368
5369 if (vpts_chase) {
5370 u32 curr_pts =
5371 scr_pts - vpts_chase_pts_diff * vpts_chase_counter;
5372
5373 /* pr_info("vchase pts %d, %d, %d, %d, %d\n",*/
5374 /*curr_pts, scr_pts, curr_pts-scr_pts, vid_pts, vpts_chase_counter); */
5375 return ((int)(curr_pts - pts)) >= 0;
5376 } else {
5377 int aud_start = (timestamp_apts_get() != -1);
5378
5379 if (!av_sync_flag && aud_start && (abs(scr_pts - pts) < 9000)
5380 && ((int)(scr_pts - pts) < 0)) {
5381 av_sync_flag = 1;
5382 pr_info("av sync ok\n");
5383 }
5384 return ((int)(scr_pts - pts)) >= 0;
5385 }
5386#else
5387 if (smooth_sync_enable) {
5388 org_vpts = timestamp_vpts_get();
5389 if ((abs(org_vpts + vsync_pts_inc - systime) <
5390 M_PTS_SMOOTH_MAX)
5391 && (abs(org_vpts + vsync_pts_inc - systime) >
5392 M_PTS_SMOOTH_MIN)) {
5393
5394 if (!video_frame_repeat_count) {
5395 vpts_ref = org_vpts;
5396 video_frame_repeat_count++;
5397 }
5398
5399 if ((int)(org_vpts + vsync_pts_inc - systime) > 0) {
5400 adjust_pts =
5401 vpts_ref + (vsync_pts_inc -
5402 M_PTS_SMOOTH_ADJUST) *
5403 video_frame_repeat_count;
5404 } else {
5405 adjust_pts =
5406 vpts_ref + (vsync_pts_inc +
5407 M_PTS_SMOOTH_ADJUST) *
5408 video_frame_repeat_count;
5409 }
5410
5411 return (int)(adjust_pts - pts) >= 0;
5412 }
5413
5414 if (video_frame_repeat_count) {
5415 vpts_ref = 0;
5416 video_frame_repeat_count = 0;
5417 }
5418 }
5419
5420 expired = (int)(timestamp_pcrscr_get() + vsync_pts_align - pts) >= 0;
5421
5422#ifdef PTS_THROTTLE
5423 if (expired && next_vf && next_vf->next_vf_pts_valid &&
5424 (vsync_slow_factor == 1) &&
5425 next_vf->next_vf_pts &&
5426 (toggled_cnt > 0) &&
5427 ((int)(timestamp_pcrscr_get() + vsync_pts_inc +
5428 vsync_pts_align - next_vf->next_vf_pts) < 0)) {
5429 expired = false;
5430 } else if (!expired && next_vf && next_vf->next_vf_pts_valid &&
5431 (vsync_slow_factor == 1) &&
5432 next_vf->next_vf_pts &&
5433 (toggled_cnt == 0) &&
5434 ((int)(timestamp_pcrscr_get() + vsync_pts_inc +
5435 vsync_pts_align - next_vf->next_vf_pts) >= 0)) {
5436 expired = true;
5437 }
5438#endif
5439
5440#ifdef PTS_LOGGING
5441 if (pts_enforce_pulldown) {
5442 /* Perform Pulldown if needed*/
5443 vpts_perform_pulldown(next_vf, &expired);
5444 }
5445#endif
5446 return expired;
5447#endif
5448}
5449
5450static void vsync_notify(void)
5451{
5452 if (video_notify_flag & VIDEO_NOTIFY_TRICK_WAIT) {
5453 wake_up_interruptible(&amvideo_trick_wait);
5454 video_notify_flag &= ~VIDEO_NOTIFY_TRICK_WAIT;
5455 }
5456 if (video_notify_flag & VIDEO_NOTIFY_FRAME_WAIT) {
5457 video_notify_flag &= ~VIDEO_NOTIFY_FRAME_WAIT;
5458 vf_notify_provider(RECEIVER_NAME,
5459 VFRAME_EVENT_RECEIVER_FRAME_WAIT, NULL);
5460 }
5461#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
5462 if (video_notify_flag & VIDEO_NOTIFY_POS_CHANGED) {
5463 video_notify_flag &= ~VIDEO_NOTIFY_POS_CHANGED;
5464 vf_notify_provider(RECEIVER_NAME,
5465 VFRAME_EVENT_RECEIVER_POS_CHANGED, NULL);
5466 }
5467#endif
5468 if (video_notify_flag &
5469 (VIDEO_NOTIFY_PROVIDER_GET | VIDEO_NOTIFY_PROVIDER_PUT)) {
5470 int event = 0;
5471
5472 if (video_notify_flag & VIDEO_NOTIFY_PROVIDER_GET)
5473 event |= VFRAME_EVENT_RECEIVER_GET;
5474 if (video_notify_flag & VIDEO_NOTIFY_PROVIDER_PUT)
5475 event |= VFRAME_EVENT_RECEIVER_PUT;
5476
5477 vf_notify_provider(RECEIVER_NAME, event, NULL);
5478
5479 video_notify_flag &=
5480 ~(VIDEO_NOTIFY_PROVIDER_GET | VIDEO_NOTIFY_PROVIDER_PUT);
5481 }
5482#ifdef CONFIG_CLK81_DFS
5483 check_and_set_clk81();
5484#endif
5485
5486#ifdef CONFIG_GAMMA_PROC
5487 gamma_adjust();
5488#endif
5489
5490}
5491
5492#ifdef FIQ_VSYNC
5493static irqreturn_t vsync_bridge_isr(int irq, void *dev_id)
5494{
5495 vsync_notify();
5496
5497 return IRQ_HANDLED;
5498}
5499#endif
5500
5501int get_vsync_count(unsigned char reset)
5502{
5503 if (reset)
5504 vsync_count = 0;
5505 return vsync_count;
5506}
5507EXPORT_SYMBOL(get_vsync_count);
5508
5509int get_vsync_pts_inc_mode(void)
5510{
5511 return vsync_pts_inc_upint;
5512}
5513EXPORT_SYMBOL(get_vsync_pts_inc_mode);
5514
5515void set_vsync_pts_inc_mode(int inc)
5516{
5517 vsync_pts_inc_upint = inc;
5518}
5519EXPORT_SYMBOL(set_vsync_pts_inc_mode);
5520
5521#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
5522void vsync_rdma_process(void)
5523{
5524 vsync_rdma_config();
5525}
5526#endif
5527
5528/* #ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2 */
5529static enum vmode_e old_vmode = VMODE_MAX;
5530/* #endif */
5531static enum vmode_e new_vmode = VMODE_MAX;
5532static inline bool video_vf_disp_mode_check(struct vframe_s *vf)
5533{
5534 struct provider_disp_mode_req_s req;
5535 int ret = -1;
5536 req.vf = vf;
5537 req.disp_mode = 0;
5538 req.req_mode = 1;
5539
5540 if (is_dolby_vision_enable()) {
5541 ret = vf_notify_provider_by_name("dv_vdin",
5542 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5543 if (ret == -1)
5544 vf_notify_provider_by_name("vdin0",
5545 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5546 } else
5547 vf_notify_provider_by_name("vdin0",
5548 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5549 if (req.disp_mode == VFRAME_DISP_MODE_OK)
5550 return false;
5551 /*whether need to check pts??*/
5552 video_vf_put(vf);
5553 return true;
5554}
5555static enum vframe_disp_mode_e video_vf_disp_mode_get(struct vframe_s *vf)
5556{
5557 struct provider_disp_mode_req_s req;
5558 int ret = -1;
5559 req.vf = vf;
5560 req.disp_mode = 0;
5561 req.req_mode = 0;
5562
5563 if (is_dolby_vision_enable()) {
5564 ret = vf_notify_provider_by_name("dv_vdin",
5565 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5566 if (ret == -1)
5567 vf_notify_provider_by_name("vdin0",
5568 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5569 } else
5570 vf_notify_provider_by_name("vdin0",
5571 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5572 return req.disp_mode;
5573}
5574static inline bool video_vf_dirty_put(struct vframe_s *vf)
5575{
5576 if (!vf->frame_dirty)
5577 return false;
5578 if (cur_dispbuf != vf) {
5579 if (vf->pts != 0) {
5580 amlog_mask(LOG_MASK_TIMESTAMP,
5581 "vpts to vf->pts:0x%x,scr:0x%x,abs_scr: 0x%x\n",
5582 vf->pts, timestamp_pcrscr_get(),
5583 READ_MPEG_REG(SCR_HIU));
5584 timestamp_vpts_set(vf->pts);
5585 } else if (cur_dispbuf) {
5586 amlog_mask(LOG_MASK_TIMESTAMP,
5587 "vpts inc:0x%x,scr: 0x%x, abs_scr: 0x%x\n",
5588 timestamp_vpts_get() +
5589 DUR2PTS(cur_dispbuf->duration),
5590 timestamp_pcrscr_get(),
5591 READ_MPEG_REG(SCR_HIU));
5592 timestamp_vpts_inc(
5593 DUR2PTS(cur_dispbuf->duration));
5594
5595 vpts_remainder +=
5596 DUR2PTS_RM(cur_dispbuf->duration);
5597 if (vpts_remainder >= 0xf) {
5598 vpts_remainder -= 0xf;
5599 timestamp_vpts_inc(-1);
5600 }
5601 }
5602 }
5603 video_vf_put(vf);
5604 return true;
5605
5606}
5607#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
5608struct vframe_s *dolby_vision_toggle_frame(struct vframe_s *vf)
5609{
5610 struct vframe_s *toggle_vf = NULL;
5611 int width_bl, width_el;
5612 int height_bl, height_el;
5613 int ret = dolby_vision_update_metadata(vf);
5614
5615 cur_dispbuf2 = dolby_vision_vf_peek_el(vf);
5616 if (cur_dispbuf2) {
5617 if (cur_dispbuf2->type & VIDTYPE_COMPRESS) {
5618 VSYNC_WR_MPEG_REG(VD2_AFBC_HEAD_BADDR,
5619 cur_dispbuf2->compHeadAddr>>4);
5620 VSYNC_WR_MPEG_REG(VD2_AFBC_BODY_BADDR,
5621 cur_dispbuf2->compBodyAddr>>4);
5622 } else {
5623 vframe_canvas_set(&cur_dispbuf2->canvas0_config[0],
5624 cur_dispbuf2->plane_num,
5625 &disp_canvas_index[rdma_canvas_id][3]);
5626 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS0 + cur_dev->viu_off,
5627 disp_canvas[rdma_canvas_id][1]);
5628 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 + cur_dev->viu_off,
5629 disp_canvas[rdma_canvas_id][1]);
5630 }
5631
5632 width_el = (cur_dispbuf2->type
5633 & VIDTYPE_COMPRESS) ?
5634 cur_dispbuf2->compWidth :
5635 cur_dispbuf2->width;
5636 if (!(cur_dispbuf2->type & VIDTYPE_VD2)) {
5637 width_bl = (vf->type
5638 & VIDTYPE_COMPRESS) ?
5639 vf->compWidth :
5640 vf->width;
5641 if (width_el >= width_bl)
5642 width_el = width_bl;
5643 else if (width_el != width_bl / 2)
5644 width_el = width_bl / 2;
5645 }
5646 ori2_start_x_lines = 0;
5647 ori2_end_x_lines =
5648 width_el - 1;
5649
5650 height_el = (cur_dispbuf2->type
5651 & VIDTYPE_COMPRESS) ?
5652 cur_dispbuf2->compHeight :
5653 cur_dispbuf2->height;
5654 if (!(cur_dispbuf2->type & VIDTYPE_VD2)) {
5655 height_bl = (vf->type
5656 & VIDTYPE_COMPRESS) ?
5657 vf->compHeight :
5658 vf->height;
5659 if (height_el >= height_bl)
5660 height_el = height_bl;
5661 else if (height_el != height_bl / 2)
5662 height_el = height_bl / 2;
5663 }
5664 ori2_start_y_lines = 0;
5665 ori2_end_y_lines =
5666 height_el - 1;
5667 }
5668 if (ret == 0) {
5669 /* setting generated for this frame */
5670 /* or DOVI in bypass mode */
5671 toggle_vf = vf;
5672 dolby_vision_set_toggle_flag(1);
5673 } else {
5674 /* fail generating setting for this frame */
5675 toggle_vf = NULL;
5676 dolby_vision_set_toggle_flag(0);
5677 }
5678 return toggle_vf;
5679}
5680
5681static int dolby_vision_need_wait(void)
5682{
5683 struct vframe_s *vf;
5684
5685 vf = video_vf_peek();
5686 if (!vf || (dolby_vision_wait_metadata(vf) == 1))
5687 return 1;
5688 return 0;
5689}
5690#endif
5691/* patch for 4k2k bandwidth issue, skiw mali and vpu mif */
5692static void dmc_adjust_for_mali_vpu(unsigned int width,
5693 unsigned int height, bool force_adjust)
5694{
5695 if (toggle_count == last_toggle_count)
5696 toggle_same_count++;
5697 else {
5698 last_toggle_count = toggle_count;
5699 toggle_same_count = 0;
5700 }
5701 /*avoid 3840x2160 crop*/
5702 if ((width >= 2000) && (height >= 1400) &&
5703 (((dmc_config_state != 1) && (toggle_same_count < 30))
5704 || force_adjust)) {
5705 if (0) {/* if (is_dolby_vision_enable()) { */
5706 /* vpu dmc */
5707 WRITE_DMCREG(
5708 DMC_AM0_CHAN_CTRL,
5709 0x85f403f4);
5710 WRITE_DMCREG(
5711 DMC_AM1_CHAN_CTRL,
5712 0x85f403f4);
5713 WRITE_DMCREG(
5714 DMC_AM2_CHAN_CTRL,
5715 0x85f403f4);
5716
5717 /* mali dmc */
5718 WRITE_DMCREG(
5719 DMC_AXI1_CHAN_CTRL,
5720 0xff10ff4);
5721 WRITE_DMCREG(
5722 DMC_AXI2_CHAN_CTRL,
5723 0xff10ff4);
5724 WRITE_DMCREG(
5725 DMC_AXI1_HOLD_CTRL,
5726 0x08040804);
5727 WRITE_DMCREG(
5728 DMC_AXI2_HOLD_CTRL,
5729 0x08040804);
5730 } else {
5731 /* vpu dmc */
5732 WRITE_DMCREG(
5733 DMC_AM1_CHAN_CTRL,
5734 0x43028);
5735 WRITE_DMCREG(
5736 DMC_AM1_HOLD_CTRL,
5737 0x18101818);
5738 WRITE_DMCREG(
5739 DMC_AM3_CHAN_CTRL,
5740 0x85f403f4);
5741 WRITE_DMCREG(
5742 DMC_AM4_CHAN_CTRL,
5743 0x85f403f4);
5744 /* mali dmc */
5745 WRITE_DMCREG(
5746 DMC_AXI1_HOLD_CTRL,
5747 0x10080804);
5748 WRITE_DMCREG(
5749 DMC_AXI2_HOLD_CTRL,
5750 0x10080804);
5751 }
5752 dmc_config_state = 1;
5753 } else if (((toggle_same_count >= 30) ||
5754 ((width < 2000) && (height < 1400))) &&
5755 (dmc_config_state != 2)) {
5756 /* vpu dmc */
5757 WRITE_DMCREG(
5758 DMC_AM0_CHAN_CTRL,
5759 0x8FF003C4);
5760 WRITE_DMCREG(
5761 DMC_AM1_CHAN_CTRL,
5762 0x3028);
5763 WRITE_DMCREG(
5764 DMC_AM1_HOLD_CTRL,
5765 0x18101810);
5766 WRITE_DMCREG(
5767 DMC_AM2_CHAN_CTRL,
5768 0x8FF003C4);
5769 WRITE_DMCREG(
5770 DMC_AM2_HOLD_CTRL,
5771 0x3028);
5772 WRITE_DMCREG(
5773 DMC_AM3_CHAN_CTRL,
5774 0x85f003f4);
5775 WRITE_DMCREG(
5776 DMC_AM4_CHAN_CTRL,
5777 0x85f003f4);
5778
5779 /* mali dmc */
5780 WRITE_DMCREG(
5781 DMC_AXI1_CHAN_CTRL,
5782 0x8FF00FF4);
5783 WRITE_DMCREG(
5784 DMC_AXI2_CHAN_CTRL,
5785 0x8FF00FF4);
5786 WRITE_DMCREG(
5787 DMC_AXI1_HOLD_CTRL,
5788 0x18101810);
5789 WRITE_DMCREG(
5790 DMC_AXI2_HOLD_CTRL,
5791 0x18101810);
5792 toggle_same_count = 30;
5793 dmc_config_state = 2;
5794 }
5795}
5796
5797static bool is_sc_enable_before_pps(struct vpp_frame_par_s *par)
5798{
5799 bool ret = false;
5800
5801 if (par) {
5802 if (par->supsc0_enable &&
5803 ((par->supscl_path == CORE0_PPS_CORE1)
5804 || (par->supscl_path == CORE0_BEFORE_PPS)))
5805 ret = true;
5806 else if (par->supsc1_enable &&
5807 (par->supscl_path == CORE1_BEFORE_PPS))
5808 ret = true;
5809 else if ((par->supsc0_enable || par->supsc1_enable)
5810 && (par->supscl_path == CORE0_CORE1_PPS))
5811 ret = true;
5812 }
5813 return ret;
5814}
5815
5816void correct_vd1_mif_size_for_DV(struct vpp_frame_par_s *par)
5817{
5818 u32 aligned_mask = 0xfffffffe;
5819 u32 old_len;
5820 if ((is_dolby_vision_on() == true)
5821 && (par->VPP_line_in_length_ > 0)
5822 && !is_sc_enable_before_pps(par)) {
5823 /* work around to skip the size check when sc enable */
5824 if (cur_dispbuf2) {
5825 /*
5826 *if (cur_dispbuf2->type
5827 * & VIDTYPE_COMPRESS)
5828 * aligned_mask = 0xffffffc0;
5829 *else
5830 */
5831 aligned_mask = 0xfffffffc;
5832 }
5833#if 0 /* def TV_REVERSE */
5834 if (reverse) {
5835 par->VPP_line_in_length_
5836 &= 0xfffffffe;
5837 par->VPP_hd_end_lines_
5838 &= 0xfffffffe;
5839 par->VPP_hd_start_lines_ =
5840 par->VPP_hd_end_lines_ + 1
5841 - par->VPP_line_in_length_;
5842 } else
5843#endif
5844 {
5845 par->VPP_line_in_length_
5846 &= aligned_mask;
5847 par->VPP_hd_start_lines_
5848 &= aligned_mask;
5849 par->VPP_hd_end_lines_ =
5850 par->VPP_hd_start_lines_ +
5851 par->VPP_line_in_length_ - 1;
5852 /* if have el layer, need 2 pixel align by height */
5853 if (cur_dispbuf2) {
5854 old_len =
5855 par->VPP_vd_end_lines_ -
5856 par->VPP_vd_start_lines_ + 1;
5857 if (old_len & 1)
5858 par->VPP_vd_end_lines_--;
5859 if (par->VPP_vd_start_lines_ & 1) {
5860 par->VPP_vd_start_lines_--;
5861 par->VPP_vd_end_lines_--;
5862 }
5863 old_len =
5864 par->VPP_vd_end_lines_ -
5865 par->VPP_vd_start_lines_ + 1;
5866 old_len = old_len >> par->vscale_skip_count;
5867 if (par->VPP_pic_in_height_ < old_len)
5868 par->VPP_pic_in_height_ = old_len;
5869 }
5870 }
5871 }
5872}
5873
5874void correct_vd2_mif_size_for_DV(
5875 struct vpp_frame_par_s *par,
5876 struct vframe_s *bl_vf)
5877{
5878 int width_bl, width_el, line_in_length;
5879 int shift;
5880 if ((is_dolby_vision_on() == true)
5881 && (par->VPP_line_in_length_ > 0)
5882 && !is_sc_enable_before_pps(par)) {
5883 /* work around to skip the size check when sc enable */
5884 width_el = (cur_dispbuf2->type
5885 & VIDTYPE_COMPRESS) ?
5886 cur_dispbuf2->compWidth :
5887 cur_dispbuf2->width;
5888 width_bl = (bl_vf->type
5889 & VIDTYPE_COMPRESS) ?
5890 bl_vf->compWidth :
5891 bl_vf->width;
5892 if (width_el >= width_bl)
5893 shift = 0;
5894 else
5895 shift = 1;
5896 zoom2_start_x_lines =
5897 par->VPP_hd_start_lines_ >> shift;
5898 line_in_length =
5899 par->VPP_line_in_length_ >> shift;
5900 zoom2_end_x_lines
5901 &= 0xfffffffe;
5902 line_in_length
5903 &= 0xfffffffe;
5904 if (line_in_length > 1)
5905 zoom2_end_x_lines =
5906 zoom2_start_x_lines +
5907 line_in_length - 1;
5908 else
5909 zoom2_end_x_lines = zoom2_start_x_lines;
5910
5911 zoom2_start_y_lines =
5912 par->VPP_vd_start_lines_ >> shift;
5913 if (zoom2_start_y_lines >= zoom2_end_y_lines)
5914 zoom2_end_y_lines = zoom2_start_y_lines;
5915 /* TODO: if el len is 0, need disable bl */
5916 }
5917}
5918#if ENABLE_UPDATE_HDR_FROM_USER
5919void set_hdr_to_frame(struct vframe_s *vf)
5920{
5921 unsigned long flags;
5922
5923 spin_lock_irqsave(&omx_hdr_lock, flags);
5924
5925 if (has_hdr_info) {
5926 vf->prop.master_display_colour = vf_hdr;
5927
5928 //config static signal_type for vp9
5929 vf->signal_type = (1 << 29)
5930 | (5 << 26) /* unspecified */
5931 | (0 << 25) /* limit */
5932 | (1 << 24) /* color available */
5933 | (9 << 16) /* 2020 */
5934 | (16 << 8) /* 2084 */
5935 | (9 << 0); /* 2020 */
5936
5937 //pr_info("set_hdr_to_frame %d, signal_type 0x%x",
5938 //vf->prop.master_display_colour.present_flag,vf->signal_type);
5939 }
5940 spin_unlock_irqrestore(&omx_hdr_lock, flags);
5941}
5942#endif
5943
5944static int vpp_zorder_check(void)
5945{
5946 int force_flush = 0;
5947 u32 layer0_sel = 0; /* vd1 */
5948 u32 layer1_sel = 1; /* vd2 */
5949
5950 if (legacy_vpp)
5951 return 0;
5952
5953 if (glayer_info[1].zorder < glayer_info[0].zorder) {
5954 layer0_sel = 1;
5955 layer1_sel = 0;
5956 if ((glayer_info[0].zorder >= reference_zorder)
5957 && (glayer_info[1].zorder < reference_zorder))
5958 layer0_sel++;
5959 } else {
5960 layer0_sel = 0;
5961 layer1_sel = 1;
5962 if ((glayer_info[1].zorder >= reference_zorder)
5963 && (glayer_info[0].zorder < reference_zorder))
5964 layer1_sel++;
5965 }
5966
5967 glayer_info[0].cur_sel_port = layer0_sel;
5968 glayer_info[1].cur_sel_port = layer1_sel;
5969
5970 if ((glayer_info[0].cur_sel_port !=
5971 glayer_info[0].last_sel_port) ||
5972 (glayer_info[1].cur_sel_port !=
5973 glayer_info[1].last_sel_port)) {
5974 force_flush = 1;
5975 glayer_info[0].last_sel_port =
5976 glayer_info[0].cur_sel_port;
5977 glayer_info[1].last_sel_port =
5978 glayer_info[1].cur_sel_port;
5979 }
5980 return force_flush;
5981}
5982
5983#ifdef TV_3D_FUNCTION_OPEN
5984inline void switch_3dView_per_vsync(void)
5985{
5986 u32 start_aligned, end_aligned, block_len;
5987 u32 FA_enable = process_3d_type & MODE_3D_OUT_FA_MASK;
5988
5989 if (FA_enable && (toggle_3d_fa_frame == OUT_FA_A_FRAME)) {
5990 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
5991 cur_dev->vpp_off, 1, 14, 1);
5992 /* VPP_VD1_PREBLEND disable */
5993 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
5994 cur_dev->vpp_off, 1, 10, 1);
5995 /* VPP_VD1_POSTBLEND disable */
5996 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
5997 cur_dev->viu_off, 0x4000000);
5998 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
5999 cur_dev->viu_off, 0x4000000);
6000 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6001 cur_dev->viu_off, 0x4000000);
6002 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6003 cur_dev->viu_off, 0x4000000);
6004 if (cur_dispbuf->type & VIDTYPE_COMPRESS) {
6005 if ((process_3d_type & MODE_FORCE_3D_FA_LR)
6006 && (cur_frame_par->vpp_3d_mode == 1)) {
6007 start_aligned = ori_start_x_lines;
6008 end_aligned = ori_end_x_lines + 1;
6009 block_len =
6010 (end_aligned - start_aligned) / 2;
6011 block_len = block_len /
6012 (cur_frame_par->hscale_skip_count + 1);
6013 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
6014 (start_aligned << 16) |
6015 (start_aligned + block_len - 1));
6016 }
6017 if ((process_3d_type & MODE_FORCE_3D_FA_TB)
6018 && (cur_frame_par->vpp_3d_mode == 2)) {
6019 start_aligned =
6020 round_down(ori_start_y_lines, 4);
6021 end_aligned =
6022 round_up(ori_end_y_lines + 1, 4);
6023 block_len = end_aligned - start_aligned;
6024 block_len = block_len / 8;
6025 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
6026 ((start_aligned / 4) << 16) |
6027 ((start_aligned / 4) + block_len - 1));
6028 }
6029 }
6030 } else if (FA_enable &&
6031 (toggle_3d_fa_frame == OUT_FA_B_FRAME)) {
6032 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6033 cur_dev->vpp_off, 1, 14, 1);
6034 /* VPP_VD1_PREBLEND disable */
6035 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6036 cur_dev->vpp_off, 1, 10, 1);
6037 /* VPP_VD1_POSTBLEND disable */
6038 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6039 cur_dev->viu_off, 0);
6040 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6041 cur_dev->viu_off, 0);
6042 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6043 cur_dev->viu_off, 0);
6044 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6045 cur_dev->viu_off, 0);
6046 if (cur_dispbuf->type & VIDTYPE_COMPRESS) {
6047 if ((process_3d_type & MODE_FORCE_3D_FA_LR)
6048 && (cur_frame_par->vpp_3d_mode == 1)) {
6049 start_aligned = ori_start_x_lines;
6050 end_aligned = ori_end_x_lines + 1;
6051 block_len =
6052 (end_aligned - start_aligned) / 2;
6053 block_len = block_len /
6054 (cur_frame_par->hscale_skip_count + 1);
6055 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
6056 ((start_aligned + block_len) << 16) |
6057 (end_aligned - 1));
6058 }
6059 if ((process_3d_type & MODE_FORCE_3D_FA_TB)
6060 && (cur_frame_par->vpp_3d_mode == 2)) {
6061 start_aligned =
6062 round_down(ori_start_y_lines, 4);
6063 end_aligned =
6064 round_up(ori_end_y_lines + 1, 4);
6065 block_len = end_aligned - start_aligned;
6066 block_len = block_len / 8;
6067 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
6068 (((start_aligned / 4) + block_len) << 16) |
6069 ((end_aligned / 4) - 1));
6070 }
6071 }
6072 } else if (FA_enable &&
6073 (toggle_3d_fa_frame == OUT_FA_BANK_FRAME)) {
6074 /* output a banking frame */
6075 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6076 cur_dev->vpp_off, 0, 14, 1);
6077 /* VPP_VD1_PREBLEND disable */
6078 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6079 cur_dev->vpp_off, 0, 10, 1);
6080 /* VPP_VD1_POSTBLEND disable */
6081 }
6082
6083 if ((process_3d_type & MODE_3D_OUT_TB)
6084 || (process_3d_type & MODE_3D_OUT_LR)) {
6085 if (cur_frame_par->vpp_2pic_mode &
6086 VPP_PIC1_FIRST) {
6087 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6088 cur_dev->viu_off, 0x4000000);
6089 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6090 cur_dev->viu_off, 0x4000000);
6091 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6092 cur_dev->viu_off, 0);
6093 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6094 cur_dev->viu_off, 0);
6095 } else {
6096 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6097 cur_dev->viu_off, 0);
6098 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6099 cur_dev->viu_off, 0);
6100 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6101 cur_dev->viu_off, 0x4000000);
6102 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6103 cur_dev->viu_off, 0x4000000);
6104 }
6105 }
6106}
6107#endif
6108
6109#ifdef FIQ_VSYNC
6110void vsync_fisr_in(void)
6111#else
6112static irqreturn_t vsync_isr_in(int irq, void *dev_id)
6113#endif
6114{
6115 int hold_line;
6116 int enc_line;
6117 unsigned char frame_par_di_set = 0;
6118 s32 i, vout_type;
6119 struct vframe_s *vf;
6120 unsigned long flags;
6121#ifdef CONFIG_TVIN_VDIN
6122 struct vdin_v4l2_ops_s *vdin_ops = NULL;
6123 struct vdin_arg_s arg;
6124#endif
6125 bool show_nosync = false;
6126 u32 vpp_misc_save, vpp_misc_set;
6127 int first_set = 0;
6128 int toggle_cnt;
6129 struct vframe_s *toggle_vf = NULL;
6130 struct vframe_s *toggle_frame = NULL;
6131 int video1_off_req = 0;
6132 int video2_off_req = 0;
6133 struct vframe_s *cur_dispbuf_back = cur_dispbuf;
6134 static struct vframe_s *pause_vf;
6135 int force_flush = 0;
6136
6137 if (debug_flag & DEBUG_FLAG_VSYNC_DONONE)
6138 return IRQ_HANDLED;
6139
6140#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
6141 const char *dev_id_s = (const char *)dev_id;
6142 int dev_id_len = strlen(dev_id_s);
6143
6144 if (cur_dev == &video_dev[1]) {
6145 if (cur_dev_idx == 0) {
6146 cur_dev = &video_dev[0];
6147 vinfo = get_current_vinfo();
6148 vsync_pts_inc =
6149 90000 * vinfo->sync_duration_den /
6150 vinfo->sync_duration_num;
6151 vsync_pts_inc_scale = vinfo->sync_duration_den;
6152 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
6153 video_property_changed = 1;
6154 pr_info("Change to video 0\n");
6155 }
6156 } else {
6157 if (cur_dev_idx != 0) {
6158 cur_dev = &video_dev[1];
6159 vinfo = get_current_vinfo2();
6160 vsync_pts_inc =
6161 90000 * vinfo->sync_duration_den /
6162 vinfo->sync_duration_num;
6163 vsync_pts_inc_scale = vinfo->sync_duration_den;
6164 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
6165 video_property_changed = 1;
6166 pr_info("Change to video 1\n");
6167 }
6168 }
6169
6170 if ((dev_id_s[dev_id_len - 1] == '2' && cur_dev_idx == 0) ||
6171 (dev_id_s[dev_id_len - 1] != '2' && cur_dev_idx != 0))
6172 return IRQ_HANDLED;
6173 /* pr_info("%s: %s\n", __func__, dev_id_s); */
6174#endif
6175
6176 if (omx_need_drop_frame_num > 0 && !omx_drop_done && omx_secret_mode) {
6177 struct vframe_s *vf = NULL;
6178
6179 while (1) {
6180 vf = video_vf_peek();
6181
6182#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6183 if (is_dolby_vision_enable()
6184 && vf && is_dovi_frame(vf)) {
6185 pr_info("vsync_isr_in, ignore the omx %d frames drop for dv frame\n",
6186 omx_need_drop_frame_num);
6187 omx_need_drop_frame_num = 0;
6188 omx_drop_done = true;
6189 break;
6190 }
6191#endif
6192 if (vf) {
6193 if (omx_need_drop_frame_num >= vf->omx_index) {
6194 //pr_info("vsync drop omx_index %d\n",
6195 //vf->omx_index);
6196 vf = video_vf_get();
6197 video_vf_put(vf);
6198 } else {
6199 omx_drop_done = true;
6200 break;
6201 }
6202 } else
6203 break;
6204 }
6205 }
6206
6207 vf = video_vf_peek();
6208 if ((vf) && ((vf->type & VIDTYPE_NO_VIDEO_ENABLE) == 0)) {
6209 if ((old_vmode != new_vmode) || (debug_flag == 8)) {
6210 debug_flag = 1;
6211 video_property_changed = 1;
6212 pr_info("detect vout mode change!!!!!!!!!!!!\n");
6213 old_vmode = new_vmode;
6214 }
6215 }
6216 toggle_cnt = 0;
6217 vsync_count++;
6218 timer_count++;
6219
6220#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6221 vlock_process(vf);/*need call every vsync*/
6222#endif
6223
6224 switch (READ_VCBUS_REG(VPU_VIU_VENC_MUX_CTRL) & 0x3) {
6225 case 0:
6226 enc_line = (READ_VCBUS_REG(ENCL_INFO_READ) >> 16) & 0x1fff;
6227 break;
6228 case 1:
6229 enc_line = (READ_VCBUS_REG(ENCI_INFO_READ) >> 16) & 0x1fff;
6230 break;
6231 case 2:
6232 enc_line = (READ_VCBUS_REG(ENCP_INFO_READ) >> 16) & 0x1fff;
6233 break;
6234 case 3:
6235 enc_line = (READ_VCBUS_REG(ENCT_INFO_READ) >> 16) & 0x1fff;
6236 break;
6237 }
6238 if (enc_line > vsync_enter_line_max)
6239 vsync_enter_line_max = enc_line;
6240
6241 if (is_meson_txlx_cpu() && dmc_adjust) {
6242 bool force_adjust = false;
6243 struct vframe_s *chk_vf;
6244
6245 chk_vf = (vf != NULL) ? vf : cur_dispbuf;
6246 if (chk_vf)
6247 force_adjust =
6248 (chk_vf->type & VIDTYPE_VIU_444) ? true : false;
6249 if (chk_vf)
6250 dmc_adjust_for_mali_vpu(
6251 chk_vf->width,
6252 chk_vf->height,
6253 force_adjust);
6254 else
6255 dmc_adjust_for_mali_vpu(
6256 0, 0, force_adjust);
6257 }
6258#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
6259 vsync_rdma_config_pre();
6260
6261 if (to_notify_trick_wait) {
6262 atomic_set(&trickmode_framedone, 1);
6263 video_notify_flag |= VIDEO_NOTIFY_TRICK_WAIT;
6264 to_notify_trick_wait = false;
6265 goto exit;
6266 }
6267
6268 if (debug_flag & DEBUG_FLAG_PRINT_RDMA) {
6269 if (video_property_changed) {
6270 enable_rdma_log_count = 5;
6271 enable_rdma_log(1);
6272 }
6273 if (enable_rdma_log_count > 0)
6274 enable_rdma_log_count--;
6275 }
6276#endif
6277#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6278 /* check video frame before VECM process */
6279 if (is_dolby_vision_enable() && vf)
6280 dolby_vision_check_hdr10(vf);
6281#endif
6282#ifdef CONFIG_TVIN_VDIN
6283 /* patch for m8 4k2k wifidisplay bandwidth bottleneck */
6284 if (get_cpu_type() == MESON_CPU_MAJOR_ID_M8) {
6285 vdin_ops = get_vdin_v4l2_ops();
6286 if (vdin_ops && vdin_ops->tvin_vdin_func) {
6287 arg.cmd = VDIN_CMD_ISR;
6288 vdin_ops->tvin_vdin_func(1, &arg);
6289#ifdef CONFIG_AM_VIDEO2
6290 vdin_ops->tvin_vdin_func(0, &arg);
6291#endif
6292 }
6293 }
6294#endif
6295 vout_type = detect_vout_type();
6296 hold_line = calc_hold_line();
6297 if (vsync_pts_inc_upint) {
6298 if (vsync_pts_inc_adj) {
6299 /* pr_info("adj %d, org %d\n",*/
6300 /*vsync_pts_inc_adj, vsync_pts_inc); */
6301 timestamp_pcrscr_inc(vsync_pts_inc_adj);
6302 timestamp_apts_inc(vsync_pts_inc_adj);
6303 } else {
6304 timestamp_pcrscr_inc(vsync_pts_inc + 1);
6305 timestamp_apts_inc(vsync_pts_inc + 1);
6306 }
6307 } else {
6308 if (vsync_slow_factor == 0) {
6309 pr_info("invalid vsync_slow_factor, set to 1\n");
6310 vsync_slow_factor = 1;
6311 }
6312
6313 if (vsync_slow_factor == 1) {
6314 timestamp_pcrscr_inc_scale(vsync_pts_inc_scale,
6315 vsync_pts_inc_scale_base);
6316 timestamp_apts_inc(vsync_pts_inc / vsync_slow_factor);
6317 videosync_pcrscr_update(vsync_pts_inc_scale,
6318 vsync_pts_inc_scale_base);
6319 } else if (vsync_slow_factor > 1000) {
6320 u32 inc = (vsync_slow_factor / 1000)
6321 * vsync_pts_inc / 1000;
6322
6323 timestamp_pcrscr_inc(inc);
6324 timestamp_apts_inc(inc);
6325 } else {
6326 timestamp_pcrscr_inc(vsync_pts_inc / vsync_slow_factor);
6327 timestamp_apts_inc(vsync_pts_inc / vsync_slow_factor);
6328 }
6329 }
6330 if (omx_secret_mode == true) {
6331 u32 system_time = timestamp_pcrscr_get();
6332 int diff = system_time - omx_pts;
6333
6334 if ((diff - omx_pts_interval_upper) > 0
6335 || (diff - omx_pts_interval_lower) < 0
6336 || (omx_pts_set_from_hwc_count <
6337 OMX_MAX_COUNT_RESET_SYSTEMTIME)) {
6338 timestamp_pcrscr_enable(1);
6339 /*pr_info("system_time=%d, omx_pts=%d, diff=%d\n",*/
6340 /*system_time, omx_pts, diff);*/
6341 /*add greatest common divisor of duration*/
6342 /*1500(60fps) 3000(30fps) 3750(24fps) for some video*/
6343 /*that pts is not evenly*/
6344 timestamp_pcrscr_set(omx_pts + DURATION_GCD);
6345 } else if (is_dolby_vision_enable()
6346 && ((diff - omx_pts_dv_upper) > 0
6347 || (diff - omx_pts_dv_lower) < 0)) {
6348 timestamp_pcrscr_set(omx_pts + DURATION_GCD);
6349 }
6350 } else
6351 omx_pts = 0;
6352 if (trickmode_duration_count > 0)
6353 trickmode_duration_count -= vsync_pts_inc;
6354#ifdef VIDEO_PTS_CHASE
6355 if (vpts_chase)
6356 vpts_chase_counter--;
6357#endif
6358
6359 if (slowsync_repeat_enable)
6360 frame_repeat_count++;
6361
6362 if (smooth_sync_enable) {
6363 if (video_frame_repeat_count)
6364 video_frame_repeat_count++;
6365 }
6366
6367 if (atomic_read(&video_unreg_flag))
6368 goto exit;
6369
6370 if (atomic_read(&video_pause_flag)
6371 && (!((video_global_output == 1)
6372 && (video_enabled != video_status_saved))))
6373 goto exit;
6374
6375#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
6376 if (is_vsync_rdma_enable()) {
6377 rdma_canvas_id = next_rdma_canvas_id;
6378#ifdef VIDEO_PIP
6379 pip_rdma_canvas_id = pip_next_rdma_canvas_id;
6380#endif
6381 } else {
6382 if (rdma_enable_pre)
6383 goto exit;
6384
6385 rdma_canvas_id = 0;
6386 next_rdma_canvas_id = 1;
6387#ifdef VIDEO_PIP
6388 pip_rdma_canvas_id = 0;
6389 pip_next_rdma_canvas_id = 1;
6390#endif
6391 }
6392
6393 for (i = 0; i < dispbuf_to_put_num; i++) {
6394 if (dispbuf_to_put[i]) {
6395 video_vf_put(dispbuf_to_put[i]);
6396 dispbuf_to_put[i] = NULL;
6397 }
6398 dispbuf_to_put_num = 0;
6399 }
6400#ifdef VIDEO_PIP
6401 if (pipbuf_to_put) {
6402 pip_vf_put(pipbuf_to_put);
6403 pipbuf_to_put = NULL;
6404 }
6405#endif
6406#endif
6407
6408 if ((!cur_dispbuf) || (cur_dispbuf == &vf_local)) {
6409
6410 vf = video_vf_peek();
6411
6412 if (vf) {
6413 if (hdmi_in_onvideo == 0) {
6414 if (nopostvideostart == false)
6415 tsync_avevent_locked(VIDEO_START,
6416 (vf->pts) ? vf->pts :
6417 timestamp_vpts_get());
6418 video_start_post = true;
6419 }
6420
6421 if (show_first_frame_nosync || show_first_picture)
6422 show_nosync = true;
6423
6424 if (slowsync_repeat_enable)
6425 frame_repeat_count = 0;
6426
6427 } else if ((cur_dispbuf == &vf_local)
6428 && (video_property_changed)) {
6429 if (!(blackout | force_blackout)) {
6430 if (cur_dispbuf
6431#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
6432 && ((DI_POST_REG_RD(DI_IF1_GEN_REG) & 0x1)
6433 == 0)
6434#endif
6435 ) {
6436 /* setting video display*/
6437 /*property in unregister mode */
6438 u32 cur_index =
6439 READ_VCBUS_REG(VD1_IF0_CANVAS0 +
6440 cur_dev->viu_off);
6441 if ((get_cpu_type() >=
6442 MESON_CPU_MAJOR_ID_GXBB) &&
6443 (cur_dispbuf->type &
6444 VIDTYPE_COMPRESS)) {
6445 cur_dispbuf->compHeadAddr =
6446 READ_VCBUS_REG(AFBC_HEAD_BADDR)
6447 << 4;
6448 } else {
6449 cur_dispbuf->canvas0Addr =
6450 cur_index;
6451 }
6452 }
6453 vsync_toggle_frame(cur_dispbuf);
6454 } else
6455 video_property_changed = 0;
6456 } else {
6457 goto SET_FILTER;
6458 }
6459 }
6460
6461 /* buffer switch management */
6462 vf = video_vf_peek();
6463
6464 /* setting video display property in underflow mode */
6465 if ((!vf) && cur_dispbuf && (video_property_changed))
6466 vsync_toggle_frame(cur_dispbuf);
6467
6468 /*debug info for skip & repeate vframe case*/
6469 if (!vf) {
6470 underflow++;
6471 if (video_dbg_vf&(1<<0))
6472 dump_vframe_status("vdin0");
6473 if (video_dbg_vf&(1<<1))
6474 dump_vframe_status("deinterlace");
6475 if (video_dbg_vf&(1<<2))
6476 dump_vframe_status("amlvideo2");
6477 if (video_dbg_vf&(1<<3))
6478 dump_vframe_status("ppmgr");
6479 if (video_dbg_vf&(1<<4))
6480 dump_vdin_reg();
6481 }
6482 video_get_vf_cnt = 0;
6483 if (platform_type == 1) {
6484 /* toggle_3d_fa_frame*/
6485 /* determine the out frame is L or R or blank */
6486 judge_3d_fa_out_mode();
6487 }
6488 while (vf) {
6489 if (vpts_expire(cur_dispbuf, vf, toggle_cnt) || show_nosync) {
6490 if (debug_flag & DEBUG_FLAG_PTS_TRACE)
6491 pr_info("vpts = 0x%x, c.dur=0x%x, n.pts=0x%x, scr = 0x%x, pcr-pts-diff=%d, ptstrace=%d\n",
6492 timestamp_vpts_get(),
6493 (cur_dispbuf) ?
6494 cur_dispbuf->duration : 0,
6495 vf->pts, timestamp_pcrscr_get(),
6496 timestamp_pcrscr_get() - vf->pts,
6497 pts_trace);
6498 amlog_mask_if(toggle_cnt > 0, LOG_MASK_FRAMESKIP,
6499 "skipped\n");
6500#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6501 if (is_dolby_vision_enable()
6502 && dolby_vision_need_wait())
6503 break;
6504#endif
6505#if ENABLE_UPDATE_HDR_FROM_USER
6506 set_hdr_to_frame(vf);
6507#endif
6508
6509#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6510 refresh_on_vs(vf);
6511 if (amvecm_on_vs(
6512 (cur_dispbuf != &vf_local)
6513 ? cur_dispbuf : NULL,
6514 vf, CSC_FLAG_CHECK_OUTPUT,
6515 cur_frame_par ?
6516 cur_frame_par->supsc1_hori_ratio :
6517 0,
6518 cur_frame_par ?
6519 cur_frame_par->supsc1_vert_ratio :
6520 0) == 1)
6521 break;
6522#endif
6523 /*
6524 *two special case:
6525 *case1:4k display case,input buffer not enough &
6526 * quickly for display
6527 *case2:input buffer all not OK
6528 */
6529 if (vf && hdmiin_frame_check &&
6530 (vf->source_type == VFRAME_SOURCE_TYPE_HDMI) &&
6531 (video_vf_disp_mode_get(vf) ==
6532 VFRAME_DISP_MODE_UNKNOWN) &&
6533 (hdmiin_frame_check_cnt++ < 10))
6534 break;
6535 else
6536 hdmiin_frame_check_cnt = 0;
6537
6538 vf = video_vf_get();
6539 if (!vf)
6540 break;
6541 if (debug_flag & DEBUG_FLAG_LATENCY) {
6542 vf->ready_clock[2] = sched_clock();
6543 pr_info("video get latency %lld ms vdin put latency %lld ms. first %lld ms.\n",
6544 func_div(vf->ready_clock[2], 1000),
6545 func_div(vf->ready_clock[1], 1000),
6546 func_div(vf->ready_clock[0], 1000));
6547 }
6548 if (video_vf_dirty_put(vf))
6549 break;
6550 if (vf && hdmiin_frame_check && (vf->source_type ==
6551 VFRAME_SOURCE_TYPE_HDMI) &&
6552 video_vf_disp_mode_check(vf))
6553 break;
6554 force_blackout = 0;
6555 if ((platform_type == 1) ||
6556 (platform_type == 0)) {
6557 if (vf) {
6558 if (last_mode_3d !=
6559 vf->mode_3d_enable) {
6560 last_mode_3d =
6561 vf->mode_3d_enable;
6562 mode_3d_changed = 1;
6563 }
6564 video_3d_format = vf->trans_fmt;
6565 }
6566 }
6567 vsync_toggle_frame(vf);
6568 toggle_frame = vf;
6569#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6570 if (is_dolby_vision_enable()) {
6571 toggle_vf = dolby_vision_toggle_frame(vf);
6572 video_pause_global = 0;
6573 } else
6574#endif
6575 {
6576 cur_dispbuf2 = NULL;
6577 video_pause_global = 2;
6578 pause_vf = NULL;
6579 }
6580 if (trickmode_fffb == 1) {
6581 trickmode_vpts = vf->pts;
6582#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
6583 #ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
6584 if ((DI_POST_REG_RD(DI_IF1_GEN_REG) & 0x1)
6585 != 0) {
6586 atomic_set(&trickmode_framedone, 1);
6587 video_notify_flag |=
6588 VIDEO_NOTIFY_TRICK_WAIT;
6589 } else
6590 #endif
6591 to_notify_trick_wait = true;
6592#else
6593 atomic_set(&trickmode_framedone, 1);
6594 video_notify_flag |= VIDEO_NOTIFY_TRICK_WAIT;
6595#endif
6596 break;
6597 }
6598 if (slowsync_repeat_enable)
6599 frame_repeat_count = 0;
6600 vf = video_vf_peek();
6601 if (!vf)
6602 next_peek_underflow++;
6603#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6604 if (for_dolby_vision_certification()
6605 && toggle_vf)
6606 break;
6607#endif
6608 if (debug_flag & DEBUG_FLAG_TOGGLE_FRAME_PER_VSYNC)
6609 break;
6610 video_get_vf_cnt++;
6611 if (video_get_vf_cnt >= 2)
6612 video_drop_vf_cnt++;
6613 } else {
6614 /* check if current frame's duration has expired,
6615 *in this example
6616 * it compares current frame display duration
6617 * with 1/1/1/1.5 frame duration
6618 * every 4 frames there will be one frame play
6619 * longer than usual.
6620 * you can adjust this array for any slow sync
6621 * control as you want.
6622 * The playback can be smoother than previous method.
6623 */
6624 if (slowsync_repeat_enable) {
6625 if (duration_expire
6626 (cur_dispbuf, vf,
6627 frame_repeat_count * vsync_pts_inc)
6628 && timestamp_pcrscr_enable_state()) {
6629 amlog_mask(LOG_MASK_SLOWSYNC,
6630 "slow sync toggle,repeat_count = %d\n",
6631 frame_repeat_count);
6632 amlog_mask(LOG_MASK_SLOWSYNC,
6633 "sys.time = 0x%x, video time = 0x%x\n",
6634 timestamp_pcrscr_get(),
6635 timestamp_vpts_get());
6636#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6637 if (is_dolby_vision_enable()
6638 && dolby_vision_need_wait())
6639 break;
6640#endif
6641#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6642 refresh_on_vs(vf);
6643 if (amvecm_on_vs(
6644 (cur_dispbuf != &vf_local)
6645 ? cur_dispbuf : NULL,
6646 vf, CSC_FLAG_CHECK_OUTPUT,
6647 cur_frame_par ?
6648 cur_frame_par->supsc1_hori_ratio
6649 : 0,
6650 cur_frame_par ?
6651 cur_frame_par->supsc1_vert_ratio
6652 : 0) == 1)
6653 break;
6654#endif
6655 vf = video_vf_get();
6656 if (!vf)
6657 break;
6658 vsync_toggle_frame(vf);
6659 toggle_frame = vf;
6660#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6661 if (is_dolby_vision_enable())
6662 toggle_vf =
6663 dolby_vision_toggle_frame(vf);
6664 else
6665#endif
6666 cur_dispbuf2 = NULL;
6667 frame_repeat_count = 0;
6668
6669 vf = video_vf_peek();
6670 } else if ((cur_dispbuf) &&
6671 (cur_dispbuf->duration_pulldown >
6672 vsync_pts_inc)) {
6673 frame_count++;
6674 cur_dispbuf->duration_pulldown -=
6675 PTS2DUR(vsync_pts_inc);
6676 }
6677 } else {
6678 if ((cur_dispbuf)
6679 && (cur_dispbuf->duration_pulldown >
6680 vsync_pts_inc)) {
6681 frame_count++;
6682 cur_dispbuf->duration_pulldown -=
6683 PTS2DUR(vsync_pts_inc);
6684 }
6685 }
6686 /* setting video display property in pause mode */
6687 if (video_property_changed && cur_dispbuf) {
6688 if (blackout | force_blackout) {
6689 if (cur_dispbuf != &vf_local)
6690 vsync_toggle_frame(
6691 cur_dispbuf);
6692 } else
6693 vsync_toggle_frame(cur_dispbuf);
6694 if (is_dolby_vision_enable()) {
6695 pause_vf = cur_dispbuf;
6696 video_pause_global = 1;
6697 } else {
6698 pause_vf = NULL;
6699 video_pause_global = 2;
6700 }
6701 }
6702 if (pause_vf && (video_pause_global == 1)
6703 && is_dolby_vision_enable()) {
6704 toggle_vf = pause_vf;
6705 dolby_vision_parse_metadata(
6706 cur_dispbuf, 0, false);
6707 dolby_vision_set_toggle_flag(1);
6708 }
6709 break;
6710 }
6711
6712 toggle_cnt++;
6713 }
6714
6715#ifdef INTERLACE_FIELD_MATCH_PROCESS
6716 if (interlace_field_type_need_match(vout_type, vf)) {
6717 if (field_matching_count++ == FIELD_MATCH_THRESHOLD) {
6718 field_matching_count = 0;
6719 /* adjust system time to get one more field toggle */
6720 /* at next vsync to match field */
6721 timestamp_pcrscr_inc(vsync_pts_inc);
6722 }
6723 } else
6724 field_matching_count = 0;
6725#endif
6726
6727SET_FILTER:
6728#ifdef VIDEO_PIP
6729 vf = pip_vf_peek();
6730 /* setting video display property in underflow mode */
6731 if ((!vf) && cur_pipbuf && (pip_property_changed))
6732 pip_toggle_frame(cur_pipbuf);
6733 if (vf) {
6734 vf = pip_vf_get();
6735 if (vf) {
6736 if (!vf->frame_dirty)
6737 pip_toggle_frame(vf);
6738 else
6739 pip_vf_put(vf);
6740 }
6741 }
6742#endif
6743#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6744 amvecm_on_vs(
6745 (cur_dispbuf != &vf_local)
6746 ? cur_dispbuf : NULL,
6747 toggle_frame,
6748 toggle_frame ? CSC_FLAG_TOGGLE_FRAME : 0,
6749 cur_frame_par ?
6750 cur_frame_par->supsc1_hori_ratio :
6751 0,
6752 cur_frame_par ?
6753 cur_frame_par->supsc1_vert_ratio :
6754 0);
6755#endif
6756 /* filter setting management */
6757 if ((frame_par_ready_to_set) || (frame_par_force_to_set)) {
6758 cur_frame_par = next_frame_par;
6759 frame_par_di_set = 1;
6760 }
6761#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6762 if (is_dolby_vision_enable()) {
6763 u32 frame_size = 0, h_size, v_size;
6764 u8 pps_state = 0; /* pps no change */
6765
6766 /* force toggle when keeping frame after playing */
6767 if ((cur_dispbuf == &vf_local)
6768 && !toggle_vf
6769 && is_dolby_vision_on()) {
6770 toggle_vf = cur_dispbuf;
6771 dolby_vision_parse_metadata(
6772 cur_dispbuf, 2, false);
6773 dolby_vision_set_toggle_flag(1);
6774 }
6775/* pause mode was moved to video display property */
6776#if 0
6777 /* force toggle in pause mode */
6778 if (cur_dispbuf
6779 && (cur_dispbuf != &vf_local)
6780 && !toggle_vf
6781 && is_dolby_vision_on()
6782 && !for_dolby_vision_certification()) {
6783 toggle_vf = cur_dispbuf;
6784 dolby_vision_parse_metadata(
6785 cur_dispbuf, 0, false);
6786 dolby_vision_set_toggle_flag(1);
6787 }
6788#endif
6789 if (cur_frame_par) {
6790 if (frame_par_ready_to_set || frame_par_force_to_set) {
6791 struct vppfilter_mode_s *vpp_filter =
6792 &cur_frame_par->vpp_filter;
6793 if ((vpp_filter->vpp_hsc_start_phase_step
6794 == 0x1000000) &&
6795 (vpp_filter->vpp_vsc_start_phase_step
6796 == 0x1000000) &&
6797 (vpp_filter->vpp_hsc_start_phase_step ==
6798 vpp_filter->vpp_hf_start_phase_step) &&
6799 !vpp_filter->vpp_pre_vsc_en &&
6800 !vpp_filter->vpp_pre_hsc_en &&
6801 !cur_frame_par->supsc0_enable &&
6802 !cur_frame_par->supsc1_enable &&
6803 bypass_pps)
6804 pps_state = 2; /* pps disable */
6805 else
6806 pps_state = 1; /* pps enable */
6807 }
6808 if (cur_frame_par->VPP_hd_start_lines_
6809 >= cur_frame_par->VPP_hd_end_lines_)
6810 h_size = 0;
6811 else
6812 h_size = cur_frame_par->VPP_hd_end_lines_
6813 - cur_frame_par->VPP_hd_start_lines_ + 1;
6814 h_size /= (cur_frame_par->hscale_skip_count + 1);
6815 if (cur_frame_par->VPP_vd_start_lines_
6816 >= cur_frame_par->VPP_vd_end_lines_)
6817 v_size = 0;
6818 else
6819 v_size = cur_frame_par->VPP_vd_end_lines_
6820 - cur_frame_par->VPP_vd_start_lines_ + 1;
6821 v_size /= (cur_frame_par->vscale_skip_count + 1);
6822 frame_size = (h_size << 16) | v_size;
6823 } else if (toggle_vf) {
6824 h_size = (toggle_vf->type & VIDTYPE_COMPRESS) ?
6825 toggle_vf->compWidth : toggle_vf->width;
6826 v_size = (toggle_vf->type & VIDTYPE_COMPRESS) ?
6827 toggle_vf->compHeight : toggle_vf->height;
6828 frame_size = (h_size << 16) | v_size;
6829 }
6830 dolby_vision_process(toggle_vf, frame_size, pps_state);
6831 dolby_vision_update_setting();
6832 }
6833#endif
6834 if ((platform_type == 1) || (platform_type == 0)) {
6835 if (mode_3d_changed) {
6836 mode_3d_changed = 0;
6837 frame_par_force_to_set = 1;
6838 }
6839 }
6840 if (cur_dispbuf_back != cur_dispbuf) {
6841 display_frame_count++;
6842 drop_frame_count = receive_frame_count - display_frame_count;
6843 }
6844 if (cur_dispbuf) {
6845 struct f2v_vphase_s *vphase;
6846 u32 vin_type = cur_dispbuf->type & VIDTYPE_TYPEMASK;
6847 {
6848 int need_afbc = (cur_dispbuf->type & VIDTYPE_COMPRESS);
6849 int afbc_need_reset =
6850 video_enabled &&
6851 need_afbc &&
6852 (!(READ_VCBUS_REG(AFBC_ENABLE) & 0x100));
6853 /*video on && afbc is off && is compress frame.*/
6854 if (frame_par_ready_to_set || afbc_need_reset) {
6855 if (cur_frame_par) {
6856 viu_set_dcu(cur_frame_par, cur_dispbuf);
6857 if (cur_dispbuf2)
6858 vd2_set_dcu(cur_frame_par,
6859 cur_dispbuf2);
6860 }
6861 } else if (cur_dispbuf2) {
6862 u32 new_el_w =
6863 (cur_dispbuf2->type
6864 & VIDTYPE_COMPRESS) ?
6865 cur_dispbuf2->compWidth :
6866 cur_dispbuf2->width;
6867 if (new_el_w != last_el_w) {
6868 pr_info("reset vd2 dcu for el change, %d->%d, %p--%p\n",
6869 last_el_w, new_el_w,
6870 cur_dispbuf, cur_dispbuf2);
6871 vd2_set_dcu(cur_frame_par,
6872 cur_dispbuf2);
6873 }
6874 } else {
6875 last_el_w = 0;
6876 last_el_status = 0;
6877 }
6878 }
6879
6880 if (cur_frame_par &&
6881 cur_frame_par->hscale_skip_count) {
6882 VSYNC_WR_MPEG_REG_BITS(VIU_VD1_FMT_CTRL +
6883 cur_dev->viu_off, 1, 20, 1);
6884 /* HFORMATTER_EN */
6885#ifdef VIDEO_PIP
6886 if (!cur_pipbuf)
6887#endif
6888 VSYNC_WR_MPEG_REG_BITS(VIU_VD2_FMT_CTRL +
6889 cur_dev->viu_off, 1, 20, 1);
6890 /* HFORMATTER_EN */
6891 }
6892
6893#ifdef TV_3D_FUNCTION_OPEN
6894 switch_3dView_per_vsync();
6895#endif
6896 /* vertical phase */
6897 vphase = &cur_frame_par->VPP_vf_ini_phase_
6898 [vpp_phase_table[vin_type]
6899 [vout_type]];
6900 VSYNC_WR_MPEG_REG(
6901 VPP_VSC_INI_PHASE + cur_dev->vpp_off,
6902 ((u32) (vphase->phase) << 8));
6903
6904 if (vphase->repeat_skip >= 0) {
6905 /* skip lines */
6906 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
6907 cur_dev->vpp_off,
6908 skip_tab[vphase->repeat_skip],
6909 VPP_PHASECTL_INIRCVNUMT_BIT,
6910 VPP_PHASECTL_INIRCVNUM_WID +
6911 VPP_PHASECTL_INIRPTNUM_WID);
6912 } else {
6913 /* repeat first line */
6914 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
6915 cur_dev->vpp_off, 4,
6916 VPP_PHASECTL_INIRCVNUMT_BIT,
6917 VPP_PHASECTL_INIRCVNUM_WID);
6918 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
6919 cur_dev->vpp_off,
6920 1 - vphase->repeat_skip,
6921 VPP_PHASECTL_INIRPTNUMT_BIT,
6922 VPP_PHASECTL_INIRPTNUM_WID);
6923 }
6924 if (force_3d_scaler == 3 &&
6925 cur_frame_par &&
6926 cur_frame_par->vpp_3d_scale) {
6927 VSYNC_WR_MPEG_REG_BITS(
6928 VPP_VSC_PHASE_CTRL, 3,
6929 VPP_PHASECTL_DOUBLELINE_BIT, 2);
6930 } else if (force_3d_scaler == 1 &&
6931 cur_frame_par &&
6932 cur_frame_par->vpp_3d_scale) {
6933 VSYNC_WR_MPEG_REG_BITS(
6934 VPP_VSC_PHASE_CTRL, 1,
6935 VPP_PHASECTL_DOUBLELINE_BIT,
6936 VPP_PHASECTL_DOUBLELINE_WID);
6937 } else if (force_3d_scaler == 2 &&
6938 cur_frame_par &&
6939 cur_frame_par->vpp_3d_scale) {
6940 VSYNC_WR_MPEG_REG_BITS(
6941 VPP_VSC_PHASE_CTRL, 2,
6942 VPP_PHASECTL_DOUBLELINE_BIT, 2);
6943 } else {
6944 VSYNC_WR_MPEG_REG_BITS(
6945 VPP_VSC_PHASE_CTRL, 0,
6946 VPP_PHASECTL_DOUBLELINE_BIT, 2);
6947 }
6948 }
6949#ifdef VIDEO_PIP
6950 if (pip_frame_ready_to_set)
6951 curpip_frame_par = nextpip_frame_par;
6952
6953 if (cur_pipbuf) {
6954 int need_afbc = (cur_pipbuf->type & VIDTYPE_COMPRESS);
6955 int afbc_need_reset =
6956 video2_enabled &&
6957 need_afbc &&
6958 (!(READ_VCBUS_REG(VD2_AFBC_ENABLE) & 0x100));
6959 /*video on && afbc is off && is compress frame.*/
6960 if (pip_frame_ready_to_set || afbc_need_reset)
6961 pip_set_dcu(curpip_frame_par, cur_pipbuf);
6962
6963 if (cur_pipbuf && curpip_frame_par) {
6964 if (curpip_frame_par->hscale_skip_count) {
6965 VSYNC_WR_MPEG_REG_BITS(
6966 VIU_VD2_FMT_CTRL +
6967 cur_dev->viu_off, 1, 20, 1);
6968 /* HFORMATTER_EN */
6969 }
6970 proc_vd2_vsc_phase_per_vsync(
6971 curpip_frame_par, cur_pipbuf, vout_type);
6972 }
6973 }
6974
6975 if (pip_frame_ready_to_set) {
6976#if 0
6977 u32 h_size, v_size;
6978
6979 if (pip_start_x_lines < pip_end_x_lines)
6980 h_size = pip_end_x_lines - pip_start_x_lines + 1;
6981 else
6982 h_size = ori2_end_x_lines - ori2_start_x_lines + 1;
6983
6984 if (pip_start_y_lines < pip_end_y_lines)
6985 v_size = pip_end_y_lines - pip_start_y_lines + 1;
6986 else
6987 v_size = ori2_end_y_lines - ori2_start_y_lines + 1;
6988
6989 zoom2_start_x_lines = ori2_start_x_lines;
6990 zoom2_end_x_lines = ori2_end_x_lines;
6991 zoom2_start_y_lines = ori2_start_y_lines;
6992 zoom2_end_y_lines = ori2_end_y_lines;
6993
6994 if (h_size < (zoom2_end_x_lines - zoom2_start_x_lines + 1))
6995 zoom2_end_x_lines = zoom2_start_x_lines + h_size - 1;
6996 else if (h_size > (zoom2_end_x_lines - zoom2_start_x_lines + 1))
6997 h_size = zoom2_end_x_lines - zoom2_start_x_lines + 1;
6998
6999 if (v_size < (zoom2_end_y_lines - zoom2_start_y_lines + 1))
7000 zoom2_end_y_lines = zoom2_start_y_lines + v_size - 1;
7001 else if (v_size > (zoom2_end_y_lines - zoom2_start_y_lines + 1))
7002 v_size = (zoom2_end_y_lines - zoom2_start_y_lines + 1);
7003
7004 if (vinfo) {
7005 if (pip_start_x_lines + h_size > vinfo->width) {
7006 h_size = vinfo->width - pip_start_x_lines;
7007 zoom2_end_x_lines =
7008 zoom2_start_x_lines + h_size - 1;
7009 }
7010 if (pip_start_y_lines + v_size > vinfo->height) {
7011 v_size = vinfo->height - pip_start_y_lines;
7012 zoom2_end_y_lines =
7013 zoom2_start_y_lines + v_size - 1;
7014 }
7015 }
7016#endif
7017 struct scaler_setting_s local_pps;
7018 struct blend_setting_s local_blend;
7019 struct vpp_frame_par_s *par = curpip_frame_par;
7020
7021 if (cur_pipbuf->type & VIDTYPE_INTERLACE) {
7022 if (cur_pipbuf->type & VIDTYPE_VIU_FIELD) {
7023 zoom2_start_y_lines =
7024 par->VPP_vd_start_lines_ >> 1;
7025 zoom2_end_y_lines =
7026 ((par->VPP_vd_end_lines_ + 1)
7027 >> 1) - 1;
7028 } else {
7029 zoom2_start_y_lines =
7030 par->VPP_vd_start_lines_;
7031 zoom2_end_y_lines =
7032 par->VPP_vd_end_lines_;
7033 }
7034 } else {
7035 if (cur_pipbuf->type & VIDTYPE_VIU_FIELD) {
7036 zoom2_start_y_lines =
7037 par->VPP_vd_start_lines_;
7038 zoom2_end_y_lines =
7039 par->VPP_vd_end_lines_;
7040 } else {
7041 zoom2_start_y_lines =
7042 par->VPP_vd_start_lines_ >> 1;
7043 zoom2_end_y_lines =
7044 ((par->VPP_vd_end_lines_ + 1)
7045 >> 1) - 1;
7046 }
7047 }
7048 zoom2_start_x_lines =
7049 par->VPP_hd_start_lines_;
7050 zoom2_end_x_lines =
7051 par->VPP_hd_end_lines_;
7052 config_vd_pps(
7053 1, par, &local_pps, vinfo);
7054 config_vd_blend(
7055 1, par, cur_pipbuf,
7056 (legacy_vpp ? 0x1ff : 0x100), &local_blend);
7057 vd2_scaler_setting(&local_pps);
7058 vd2_zoom_display_horz(
7059 cur_pipbuf,
7060 par->hscale_skip_count);
7061 vd2_zoom_display_vert(
7062 cur_pipbuf,
7063 par->vscale_skip_count);
7064 vd2_vpp_blend_setting(&local_blend);
7065 pip_frame_ready_to_set = 0;
7066 }
7067#endif
7068
7069 if (((frame_par_ready_to_set) || (frame_par_force_to_set)) &&
7070 (cur_frame_par)) {
7071 struct vppfilter_mode_s *vpp_filter =
7072 &cur_frame_par->vpp_filter;
7073
7074 if (cur_dispbuf) {
7075 u32 zoom_start_y, zoom_end_y;
7076 correct_vd1_mif_size_for_DV(cur_frame_par);
7077 if (cur_dispbuf->type & VIDTYPE_INTERLACE) {
7078 if (cur_dispbuf->type
7079 & VIDTYPE_COMPRESS) {
7080 /* for vdin afbc and interlace case */
7081 zoom_start_y =
7082 cur_frame_par->VPP_vd_start_lines_;
7083 zoom_end_y =
7084 cur_frame_par->VPP_vd_end_lines_;
7085 } else if (cur_dispbuf->type
7086 & VIDTYPE_VIU_FIELD) {
7087 zoom_start_y =
7088 cur_frame_par->VPP_vd_start_lines_
7089 >> 1;
7090 zoom_end_y =
7091 ((cur_frame_par->VPP_vd_end_lines_ + 1)
7092 >> 1) - 1;
7093 } else {
7094 zoom_start_y =
7095 cur_frame_par->VPP_vd_start_lines_;
7096 zoom_end_y =
7097 cur_frame_par->VPP_vd_end_lines_;
7098 }
7099 } else {
7100 if (cur_dispbuf->type & VIDTYPE_VIU_FIELD) {
7101 zoom_start_y =
7102 cur_frame_par->VPP_vd_start_lines_;
7103 zoom_end_y =
7104 cur_frame_par->VPP_vd_end_lines_;
7105 } else {
7106 if (is_need_framepacking_output()) {
7107 zoom_start_y =
7108 cur_frame_par->VPP_vd_start_lines_ >> 1;
7109 zoom_end_y =
7110 ((cur_frame_par->VPP_vd_end_lines_
7111 - framepacking_blank + 1) >> 1) - 1;
7112 } else {
7113 zoom_start_y =
7114 cur_frame_par->VPP_vd_start_lines_ >> 1;
7115 zoom_end_y =
7116 ((cur_frame_par->VPP_vd_end_lines_ + 1) >> 1) - 1;
7117 }
7118 }
7119 }
7120
7121 zoom_start_x_lines =
7122 cur_frame_par->VPP_hd_start_lines_;
7123 zoom_end_x_lines = cur_frame_par->VPP_hd_end_lines_;
7124 zoom_display_horz(cur_dispbuf,
7125 cur_frame_par->hscale_skip_count);
7126
7127 zoom_start_y_lines = zoom_start_y;
7128 zoom_end_y_lines = zoom_end_y;
7129 zoom_display_vert(cur_dispbuf);
7130 if (is_dolby_vision_enable() && cur_dispbuf2) {
7131 zoom2_start_x_lines = ori2_start_x_lines;
7132 zoom2_end_x_lines = ori2_end_x_lines;
7133 zoom2_start_y_lines = ori2_start_y_lines;
7134 zoom2_end_y_lines = ori2_end_y_lines;
7135 correct_vd2_mif_size_for_DV(
7136 cur_frame_par, cur_dispbuf);
7137 vd2_zoom_display_horz(cur_dispbuf2,
7138 cur_frame_par->hscale_skip_count);
7139 vd2_zoom_display_vert(cur_dispbuf2,
7140 cur_frame_par->vscale_skip_count);
7141 }
7142 }
7143 /*vpp input size setting*/
7144 VSYNC_WR_MPEG_REG(VPP_IN_H_V_SIZE,
7145 ((cur_frame_par->video_input_w & 0x1fff) <<
7146 16) | (cur_frame_par->video_input_h & 0x1fff));
7147
7148 /* vpp super scaler */
7149 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB) {
7150 vpp_set_super_scaler_regs(cur_frame_par->supscl_path,
7151 cur_frame_par->supsc0_enable,
7152 cur_frame_par->spsc0_w_in,
7153 cur_frame_par->spsc0_h_in,
7154 cur_frame_par->supsc0_hori_ratio,
7155 cur_frame_par->supsc0_vert_ratio,
7156 cur_frame_par->supsc1_enable,
7157 cur_frame_par->spsc1_w_in,
7158 cur_frame_par->spsc1_h_in,
7159 cur_frame_par->supsc1_hori_ratio,
7160 cur_frame_par->supsc1_vert_ratio,
7161 vinfo->width,
7162 vinfo->height);
7163 if (is_dolby_vision_on() &&
7164 is_dolby_vision_stb_mode() &&
7165 !cur_frame_par->supsc0_enable &&
7166 !cur_frame_par->supsc1_enable) {
7167 VSYNC_WR_MPEG_REG(VPP_SRSHARP0_CTRL, 0);
7168 VSYNC_WR_MPEG_REG(VPP_SRSHARP1_CTRL, 0);
7169 }
7170 }
7171
7172 /* vpp filters */
7173 /* SET_MPEG_REG_MASK(VPP_SC_MISC + cur_dev->vpp_off, */
7174 /* VPP_SC_TOP_EN | VPP_SC_VERT_EN | VPP_SC_HORZ_EN); */
7175#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
7176 if (for_dolby_vision_certification()) {
7177 /* turn off PPS for Dolby Vision certification */
7178 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7179 0, VPP_SC_TOP_EN_BIT, VPP_SC_TOP_EN_WID);
7180 } else
7181#endif
7182 {
7183 VSYNC_WR_MPEG_REG(VPP_SC_MISC + cur_dev->vpp_off,
7184 READ_VCBUS_REG(VPP_SC_MISC +
7185 cur_dev->vpp_off) |
7186 VPP_SC_TOP_EN | VPP_SC_VERT_EN |
7187 VPP_SC_HORZ_EN);
7188
7189 /* pps pre hsc&vsc en */
7190 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7191 vpp_filter->vpp_pre_hsc_en,
7192 VPP_SC_PREHORZ_EN_BIT, 1);
7193 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7194 vpp_filter->vpp_pre_vsc_en,
7195 VPP_SC_PREVERT_EN_BIT, 1);
7196 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7197 vpp_filter->vpp_pre_vsc_en,
7198 VPP_LINE_BUFFER_EN_BIT, 1);
7199 }
7200 /* for bypass pps debug */
7201 if ((vpp_filter->vpp_hsc_start_phase_step == 0x1000000) &&
7202 (vpp_filter->vpp_vsc_start_phase_step == 0x1000000) &&
7203 (vpp_filter->vpp_hsc_start_phase_step ==
7204 vpp_filter->vpp_hf_start_phase_step) &&
7205 !vpp_filter->vpp_pre_vsc_en &&
7206 !vpp_filter->vpp_pre_hsc_en &&
7207 bypass_pps)
7208 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7209 0, VPP_SC_TOP_EN_BIT, VPP_SC_TOP_EN_WID);
7210 /*turn off vertical scaler when 3d display */
7211 /* CLEAR_MPEG_REG_MASK(VPP_SC_MISC,VPP_SC_VERT_EN); */
7212 if (platform_type == 1) {
7213 if (last_mode_3d) {
7214 VSYNC_WR_MPEG_REG(
7215 VPP_SC_MISC + cur_dev->vpp_off,
7216 READ_MPEG_REG(VPP_SC_MISC +
7217 cur_dev->vpp_off) &
7218 (~VPP_SC_VERT_EN));
7219 }
7220 }
7221 /* horitontal filter settings */
7222 VSYNC_WR_MPEG_REG_BITS(
7223 VPP_SC_MISC + cur_dev->vpp_off,
7224 vpp_filter->vpp_horz_coeff[0],
7225 VPP_SC_HBANK_LENGTH_BIT,
7226 VPP_SC_BANK_LENGTH_WID);
7227
7228 /* fix the pps last line dummy issue */
7229 if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12B))
7230 VSYNC_WR_MPEG_REG_BITS(
7231 VPP_SC_MISC + cur_dev->vpp_off,
7232 1, 24, 1);
7233
7234 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
7235 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8)
7236 && !is_meson_mtvd_cpu()) {
7237 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
7238 cur_dev->vpp_off,
7239 (vpp_filter->vpp_vert_coeff[0] == 2) ? 1 : 0,
7240 VPP_PHASECTL_DOUBLELINE_BIT,
7241 VPP_PHASECTL_DOUBLELINE_WID);
7242 }
7243 /* #endif */
7244
7245 if (vpp_filter->vpp_horz_coeff[1] & 0x8000) {
7246 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF_IDX +
7247 cur_dev->vpp_off,
7248 VPP_COEF_HORZ | VPP_COEF_9BIT);
7249 } else {
7250 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF_IDX +
7251 cur_dev->vpp_off,
7252 VPP_COEF_HORZ);
7253 }
7254
7255 for (i = 0; i < (vpp_filter->vpp_horz_coeff[1] & 0xff); i++) {
7256 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF + cur_dev->vpp_off,
7257 vpp_filter->vpp_horz_coeff[i + 2]);
7258 }
7259
7260 /* vertical filter settings */
7261 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7262 vpp_filter->vpp_vert_coeff[0],
7263 VPP_SC_VBANK_LENGTH_BIT,
7264 VPP_SC_BANK_LENGTH_WID);
7265
7266 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF_IDX + cur_dev->vpp_off,
7267 VPP_COEF_VERT);
7268 for (i = 0; i < vpp_filter->vpp_vert_coeff[1]; i++) {
7269 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF + cur_dev->vpp_off,
7270 vpp_filter->vpp_vert_coeff[i + 2]);
7271 }
7272
7273 /* vertical chroma filter settings */
7274 if (vpp_filter->vpp_vert_chroma_filter_en) {
7275 const u32 *pCoeff = vpp_filter->vpp_vert_chroma_coeff;
7276
7277 VSYNC_WR_MPEG_REG(
7278 VPP_SCALE_COEF_IDX + cur_dev->vpp_off,
7279 VPP_COEF_VERT_CHROMA|VPP_COEF_SEP_EN);
7280 for (i = 0; i < pCoeff[1]; i++)
7281 VSYNC_WR_MPEG_REG(
7282 VPP_SCALE_COEF + cur_dev->vpp_off,
7283 pCoeff[i + 2]);
7284 }
7285 /* work around to cut the last green line
7286 *when two layer dv display and do vskip
7287 */
7288 if (is_dolby_vision_on() &&
7289 (cur_frame_par->vscale_skip_count > 0)
7290 && cur_dispbuf2
7291 && (cur_frame_par->VPP_pic_in_height_ > 0))
7292 cur_frame_par->VPP_pic_in_height_--;
7293 VSYNC_WR_MPEG_REG(VPP_PIC_IN_HEIGHT + cur_dev->vpp_off,
7294 cur_frame_par->VPP_pic_in_height_);
7295
7296 VSYNC_WR_MPEG_REG_BITS(VPP_HSC_PHASE_CTRL + cur_dev->vpp_off,
7297 cur_frame_par->VPP_hf_ini_phase_,
7298 VPP_HSC_TOP_INI_PHASE_BIT,
7299 VPP_HSC_TOP_INI_PHASE_WID);
7300 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_H_START_END +
7301 cur_dev->vpp_off,
7302 ((cur_frame_par->VPP_post_blend_vd_h_start_ &
7303 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
7304 ((cur_frame_par->VPP_post_blend_vd_h_end_ &
7305 VPP_VD_SIZE_MASK)
7306 << VPP_VD1_END_BIT));
7307 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
7308 cur_dev->vpp_off,
7309 ((cur_frame_par->VPP_post_blend_vd_v_start_ &
7310 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
7311 ((cur_frame_par->VPP_post_blend_vd_v_end_ &
7312 VPP_VD_SIZE_MASK)
7313 << VPP_VD1_END_BIT));
7314
7315 if ((cur_frame_par->VPP_post_blend_vd_v_end_ -
7316 cur_frame_par->VPP_post_blend_vd_v_start_ + 1) > 1080) {
7317 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
7318 cur_dev->vpp_off,
7319 ((cur_frame_par->VPP_post_blend_vd_v_start_ &
7320 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
7321 ((cur_frame_par->VPP_post_blend_vd_v_end_ &
7322 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
7323 } else {
7324 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
7325 cur_dev->vpp_off,
7326 ((0 & VPP_VD_SIZE_MASK) <<
7327 VPP_VD1_START_BIT) | ((1079 &
7328 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
7329 }
7330
7331 if (!legacy_vpp) {
7332 VSYNC_WR_MPEG_REG(
7333 VPP_PREBLEND_H_SIZE + cur_dev->vpp_off,
7334 (cur_frame_par->video_input_h << 16)
7335 | cur_frame_par->video_input_w);
7336 VSYNC_WR_MPEG_REG(
7337 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7338 ((cur_frame_par->VPP_post_blend_vd_v_end_ + 1)
7339 << 16) |
7340 cur_frame_par->VPP_post_blend_h_size_);
7341 } else {
7342 VSYNC_WR_MPEG_REG(
7343 VPP_PREBLEND_H_SIZE + cur_dev->vpp_off,
7344 cur_frame_par->VPP_line_in_length_);
7345 VSYNC_WR_MPEG_REG(
7346 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7347 cur_frame_par->VPP_post_blend_h_size_);
7348 }
7349
7350 vpp_settings_h(cur_frame_par);
7351 vpp_settings_v(cur_frame_par);
7352 if (is_dolby_vision_enable() && cur_dispbuf2) {
7353 vd2_settings_h(cur_dispbuf2);
7354 vd2_settings_v(cur_dispbuf2);
7355 }
7356 frame_par_ready_to_set = 0;
7357 frame_par_force_to_set = 0;
7358 first_set = 1;
7359 }
7360 /* VPP one time settings */
7361 wait_sync = 0;
7362
7363 if (!legacy_vpp && vinfo) {
7364 u32 read_value = VSYNC_RD_MPEG_REG(
7365 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off);
7366 if (((vinfo->field_height << 16) | vinfo->width)
7367 != read_value)
7368 VSYNC_WR_MPEG_REG(
7369 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7370 ((vinfo->field_height << 16) | vinfo->width));
7371 } else if (vinfo) {
7372 if (VSYNC_RD_MPEG_REG(
7373 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off)
7374 != vinfo->width)
7375 VSYNC_WR_MPEG_REG(
7376 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7377 vinfo->width);
7378 }
7379
7380 if (cur_dispbuf && cur_dispbuf->process_fun) {
7381 /* for new deinterlace driver */
7382#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
7383 if (debug_flag & DEBUG_FLAG_PRINT_RDMA) {
7384 if (enable_rdma_log_count > 0)
7385 pr_info("call process_fun\n");
7386 }
7387#endif
7388 cur_dispbuf->process_fun(cur_dispbuf->private_data,
7389 zoom_start_x_lines |
7390 (cur_frame_par->vscale_skip_count <<
7391 24) | (frame_par_di_set << 16),
7392 zoom_end_x_lines, zoom_start_y_lines,
7393 zoom_end_y_lines, cur_dispbuf);
7394 }
7395
7396 exit:
7397#if defined(PTS_LOGGING) || defined(PTS_TRACE_DEBUG)
7398 pts_trace++;
7399#endif
7400 vpp_misc_save = READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off);
7401 vpp_misc_set = vpp_misc_save;
7402#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM
7403 if (!is_dolby_vision_on())
7404 vpp_misc_set |= VPP_CM_ENABLE;
7405 else
7406 vpp_misc_set &= ~VPP_CM_ENABLE;
7407#endif
7408
7409 if (bypass_cm)
7410 vpp_misc_set &= ~VPP_CM_ENABLE;
7411
7412 if (update_osd_vpp_misc && legacy_vpp) {
7413 vpp_misc_set &= ~osd_vpp_misc_mask;
7414 vpp_misc_set |=
7415 (osd_vpp_misc & osd_vpp_misc_mask);
7416 if (vpp_misc_set &
7417 (VPP_OSD1_POSTBLEND | VPP_OSD2_POSTBLEND))
7418 vpp_misc_set |= VPP_POSTBLEND_EN;
7419 }
7420
7421#ifdef VIDEO_PIP
7422 if (cur_pipbuf && (video2_enabled == 1)
7423 && ((vpp_misc_save & VPP_VD2_POSTBLEND) == 0)
7424 && (video2_onoff_state == VIDEO_ENABLE_STATE_IDLE)) {
7425 vpp_misc_set |=
7426 VPP_VD2_POSTBLEND |
7427 VPP_POSTBLEND_EN;
7428 }
7429#endif
7430
7431 if ((video_enabled == 1) && ((vpp_misc_save & VPP_VD1_POSTBLEND) == 0)
7432 && (video_onoff_state == VIDEO_ENABLE_STATE_IDLE)) {
7433 vpp_misc_set |=
7434 VPP_VD1_PREBLEND |
7435 VPP_VD1_POSTBLEND |
7436 VPP_POSTBLEND_EN;
7437 }
7438 if ((video_enabled == 1) && cur_frame_par
7439 && (cur_dispbuf != &vf_local) && (first_set == 0)
7440 && (video_onoff_state == VIDEO_ENABLE_STATE_IDLE)) {
7441 struct vppfilter_mode_s *vpp_filter =
7442 &cur_frame_par->vpp_filter;
7443 u32 h_phase_step, v_phase_step;
7444
7445 h_phase_step = READ_VCBUS_REG(
7446 VPP_HSC_START_PHASE_STEP + cur_dev->vpp_off);
7447 v_phase_step = READ_VCBUS_REG(
7448 VPP_VSC_START_PHASE_STEP + cur_dev->vpp_off);
7449 if ((vpp_filter->vpp_hf_start_phase_step != h_phase_step) ||
7450 (vpp_filter->vpp_vsc_start_phase_step != v_phase_step)) {
7451 video_property_changed = 1;
7452 /*pr_info("frame info register rdma write fail!\n");*/
7453 }
7454 }
7455 if (likely(video_onoff_state != VIDEO_ENABLE_STATE_IDLE)) {
7456 /* state change for video layer enable/disable */
7457
7458 spin_lock_irqsave(&video_onoff_lock, flags);
7459
7460 if (video_onoff_state == VIDEO_ENABLE_STATE_ON_REQ) {
7461 /*
7462 * the video layer is enabled one vsync later,assumming
7463 * all registers are ready from RDMA.
7464 */
7465 video_onoff_state = VIDEO_ENABLE_STATE_ON_PENDING;
7466 } else if (video_onoff_state ==
7467 VIDEO_ENABLE_STATE_ON_PENDING) {
7468 vpp_misc_set |= VPP_VD1_PREBLEND |
7469 VPP_VD1_POSTBLEND |
7470 VPP_POSTBLEND_EN;
7471
7472 video_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7473 video_onoff_time = jiffies_to_msecs(jiffies);
7474
7475 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7476 pr_info("VsyncEnableVideoLayer\n");
7477 vpu_delay_work_flag |=
7478 VPU_VIDEO_LAYER1_CHANGED;
7479 force_flush = 1;
7480 } else if (video_onoff_state == VIDEO_ENABLE_STATE_OFF_REQ) {
7481 vpp_misc_set &= ~(VPP_VD1_PREBLEND |
7482 VPP_VD1_POSTBLEND);
7483 if (process_3d_type)
7484 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7485 VPP_VD2_POSTBLEND | VPP_PREBLEND_EN);
7486 /*auto disable sr when video off*/
7487 if (!is_meson_txl_cpu() &&
7488 !is_meson_txlx_cpu()) {
7489 VSYNC_WR_MPEG_REG(VPP_SRSHARP0_CTRL, 0);
7490 VSYNC_WR_MPEG_REG(VPP_SRSHARP1_CTRL, 0);
7491 }
7492 video_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7493 video_onoff_time = jiffies_to_msecs(jiffies);
7494 vpu_delay_work_flag |=
7495 VPU_VIDEO_LAYER1_CHANGED;
7496 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7497 pr_info("VsyncDisableVideoLayer\n");
7498 video1_off_req = 1;
7499 force_flush = 1;
7500 }
7501
7502 spin_unlock_irqrestore(&video_onoff_lock, flags);
7503 }
7504
7505 if (likely(video2_onoff_state != VIDEO_ENABLE_STATE_IDLE)) {
7506 /* state change for video layer2 enable/disable */
7507
7508 spin_lock_irqsave(&video2_onoff_lock, flags);
7509
7510 if (video2_onoff_state == VIDEO_ENABLE_STATE_ON_REQ) {
7511 /*
7512 * the video layer 2
7513 * is enabled one vsync later, assumming
7514 * all registers are ready from RDMA.
7515 */
7516 video2_onoff_state = VIDEO_ENABLE_STATE_ON_PENDING;
7517 } else if (video2_onoff_state ==
7518 VIDEO_ENABLE_STATE_ON_PENDING) {
7519 if (is_dolby_vision_on())
7520 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7521 VPP_VD2_POSTBLEND | VPP_PREBLEND_EN);
7522 else if (process_3d_type ||
7523 (cur_dispbuf &&
7524 (cur_dispbuf->type & VIDTYPE_MVC)))
7525 vpp_misc_set |= VPP_VD2_PREBLEND |
7526 VPP_PREBLEND_EN;
7527 else if (!legacy_vpp)
7528 vpp_misc_set |= VPP_VD2_POSTBLEND |
7529 VPP_POSTBLEND_EN;
7530 else
7531 vpp_misc_set |= VPP_VD2_PREBLEND |
7532 VPP_PREBLEND_EN;
7533#ifdef VIDEO_PIP
7534 if (cur_pipbuf) {
7535 vpp_misc_set &=
7536 ~(VPP_PREBLEND_EN | VPP_VD2_PREBLEND);
7537 vpp_misc_set |= VPP_VD2_POSTBLEND;
7538 }
7539#endif
7540 /* g12a has no alpha overflow check in hardware */
7541 if (!legacy_vpp)
7542 vpp_misc_set |= (0x100 << VPP_VD2_ALPHA_BIT);
7543 else
7544 vpp_misc_set |= (0x1ff << VPP_VD2_ALPHA_BIT);
7545 video2_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7546 video_onoff_time = jiffies_to_msecs(jiffies);
7547
7548 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7549 pr_info("VsyncEnableVideoLayer2\n");
7550 force_flush = 1;
7551 } else if (video2_onoff_state == VIDEO_ENABLE_STATE_OFF_REQ) {
7552 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7553 VPP_VD2_POSTBLEND | VPP_PREBLEND_EN
7554 | (0x1ff << VPP_VD2_ALPHA_BIT));
7555 video2_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7556 video_onoff_time = jiffies_to_msecs(jiffies);
7557
7558 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7559 pr_info("VsyncDisableVideoLayer2\n");
7560 video2_off_req = 1;
7561 force_flush = 1;
7562 }
7563 spin_unlock_irqrestore(&video2_onoff_lock, flags);
7564 }
7565
7566 if (video_global_output == 0) {
7567 video_enabled = 0;
7568 vpp_misc_set &= ~(VPP_VD1_PREBLEND |
7569 VPP_VD2_PREBLEND |
7570 VPP_VD2_POSTBLEND |
7571 VPP_VD1_POSTBLEND |
7572 VPP_PREBLEND_EN);
7573#ifdef VIDEO_PIP
7574 /* should keep video2 display */
7575 if (cur_pipbuf && video2_enabled)
7576 vpp_misc_set |= VPP_VD2_POSTBLEND;
7577#endif
7578 } else {
7579 video_enabled = video_status_saved;
7580 }
7581
7582 if (!video_enabled &&
7583 (vpp_misc_set & VPP_VD1_POSTBLEND))
7584 vpp_misc_set &= ~(VPP_VD1_PREBLEND |
7585 VPP_VD1_POSTBLEND |
7586 VPP_PREBLEND_EN);
7587
7588#ifdef VIDEO_PIP
7589 if (pip_global_output == 0) {
7590 video2_enabled = 0;
7591 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7592 VPP_VD2_POSTBLEND);
7593 } else {
7594 video2_enabled = video2_status_saved;
7595 }
7596
7597 if (!video2_enabled &&
7598 (vpp_misc_set & VPP_VD2_POSTBLEND))
7599 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7600 VPP_VD2_POSTBLEND);
7601#endif
7602
7603 if (!legacy_vpp) {
7604 u32 set_value = 0;
7605 force_flush |= vpp_zorder_check();
7606
7607 /* for sr core0, put it between prebld & pps as default */
7608 if (cur_frame_par &&
7609 (cur_frame_par->sr_core_support &
7610 SUPER_CORE0_SUPPORT))
7611 if (cur_frame_par->sr0_position)
7612 vpp_misc_set |=
7613 PREBLD_SR0_VD1_SCALER;
7614 else
7615 vpp_misc_set &=
7616 ~SR0_AFTER_DNLP;
7617 else
7618 vpp_misc_set |=
7619 PREBLD_SR0_VD1_SCALER;
7620 /* for sr core1, put it before post blend as default */
7621 if (cur_frame_par &&
7622 (cur_frame_par->sr_core_support &
7623 SUPER_CORE1_SUPPORT))
7624 if (cur_frame_par->sr1_position)
7625 vpp_misc_set |=
7626 DNLP_SR1_CM;
7627 else
7628 vpp_misc_set &=
7629 ~SR1_AFTER_POSTBLEN;
7630 else
7631 vpp_misc_set |=
7632 DNLP_SR1_CM;
7633
7634 vpp_misc_set &=
7635 ((1 << 29) | VPP_CM_ENABLE |
7636 (0x1ff << VPP_VD2_ALPHA_BIT) |
7637 VPP_VD2_PREBLEND |
7638 VPP_VD1_PREBLEND |
7639 VPP_VD2_POSTBLEND |
7640 VPP_VD1_POSTBLEND |
7641 VPP_PREBLEND_EN |
7642 VPP_POSTBLEND_EN |
7643 0xf);
7644
7645 /* if vd2 is bottom layer, need remove alpha for vd2 */
7646 if (((vpp_misc_set & VPP_VD1_POSTBLEND) == 0)
7647 && (vpp_misc_set & VPP_VD2_POSTBLEND)) {
7648 vpp_misc_set &= ~(0x1ff << VPP_VD2_ALPHA_BIT);
7649 vpp_misc_set |= (0x100 << VPP_VD2_ALPHA_BIT);
7650 }
7651
7652 vpp_misc_save &=
7653 ((1 << 29) | VPP_CM_ENABLE |
7654 (0x1ff << VPP_VD2_ALPHA_BIT) |
7655 VPP_VD2_PREBLEND |
7656 VPP_VD1_PREBLEND |
7657 VPP_VD2_POSTBLEND |
7658 VPP_VD1_POSTBLEND |
7659 VPP_PREBLEND_EN |
7660 VPP_POSTBLEND_EN |
7661 0xf);
7662 if ((vpp_misc_set != vpp_misc_save)
7663 || force_flush) {
7664 u32 port_val[3] = {0, 0, 0};
7665 u32 vd1_port, vd2_port, icnt;
7666 u32 post_blend_reg[3] = {
7667 VD1_BLEND_SRC_CTRL,
7668 VD2_BLEND_SRC_CTRL,
7669 OSD2_BLEND_SRC_CTRL
7670 };
7671
7672 /* just reset the select port */
7673 if ((glayer_info[0].cur_sel_port > 2)
7674 || (glayer_info[1].cur_sel_port > 2)) {
7675 glayer_info[0].cur_sel_port = 0;
7676 glayer_info[1].cur_sel_port = 1;
7677 }
7678
7679 vd1_port = glayer_info[0].cur_sel_port;
7680 vd2_port = glayer_info[1].cur_sel_port;
7681
7682 /* post bld premult*/
7683 port_val[0] |= (1 << 16);
7684
7685 /* vd2 path sel */
7686 if (vpp_misc_set & VPP_VD2_POSTBLEND)
7687 port_val[1] |= (1 << 20);
7688 else
7689 port_val[1] &= ~(1 << 20);
7690
7691 /* osd2 path sel */
7692 port_val[2] |= (1 << 20);
7693
7694 if (vpp_misc_set & VPP_VD1_POSTBLEND) {
7695 /* post src */
7696 port_val[vd1_port] |= (1 << 8);
7697 port_val[0] |=
7698 ((1 << 4) | /* pre bld premult*/
7699 (1 << 0)); /* pre bld src 1 */
7700 } else
7701 port_val[0] &= ~0xff;
7702
7703 if (vpp_misc_set & VPP_VD2_POSTBLEND)
7704 /* post src */
7705 port_val[vd2_port] |= (2 << 8);
7706 else if (vpp_misc_set & VPP_VD2_PREBLEND)
7707 port_val[1] |=
7708 ((1 << 4) | /* pre bld premult*/
7709 (2 << 0)); /* pre bld src 1 */
7710
7711 for (icnt = 0; icnt < 3; icnt++)
7712 VSYNC_WR_MPEG_REG(
7713 post_blend_reg[icnt]
7714 + cur_dev->vpp_off,
7715 port_val[icnt]);
7716
7717 set_value = vpp_misc_set;
7718 set_value &=
7719 ((1 << 29) | VPP_CM_ENABLE |
7720 (0x1ff << VPP_VD2_ALPHA_BIT) |
7721 VPP_VD2_PREBLEND |
7722 VPP_VD1_PREBLEND |
7723 VPP_VD2_POSTBLEND |
7724 VPP_VD1_POSTBLEND |
7725 0xf);
7726 if ((vpp_misc_set & VPP_VD2_PREBLEND)
7727 && (vpp_misc_set & VPP_VD1_PREBLEND))
7728 set_value |= VPP_PREBLEND_EN;
7729 if (bypass_cm)
7730 set_value &= ~VPP_CM_ENABLE;
7731 set_value |= VPP_POSTBLEND_EN;
7732 VSYNC_WR_MPEG_REG(
7733 VPP_MISC + cur_dev->vpp_off,
7734 set_value);
7735 }
7736 } else if (vpp_misc_save != vpp_misc_set)
7737 VSYNC_WR_MPEG_REG(
7738 VPP_MISC + cur_dev->vpp_off,
7739 vpp_misc_set);
7740
7741 /*vpp_misc_set maybe have same,but need off.*/
7742 /* if vd1 off, disable vd2 also */
7743#ifdef VIDEO_PIP
7744 if (video2_off_req && cur_pipbuf) {
7745 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
7746 && video2_off_req)
7747 pr_info("VD2 AFBC off now.\n");
7748 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
7749 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG, 0);
7750 if (!legacy_vpp) {
7751 VSYNC_WR_MPEG_REG(
7752 VD2_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7753 }
7754 if (cur_pipbuf && (cur_pipbuf == &local_pip))
7755 cur_pipbuf = NULL;
7756 } else if (!cur_pipbuf &&
7757 (video2_off_req || video1_off_req)) {
7758 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
7759 && video2_off_req)
7760 pr_info("VD2 AFBC off now.\n");
7761 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
7762 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG, 0);
7763 if (!legacy_vpp) {
7764 VSYNC_WR_MPEG_REG(
7765 VD2_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7766 }
7767 last_el_w = 0;
7768 last_el_status = 0;
7769 if (cur_dispbuf2 && (cur_dispbuf2 == &vf_local2))
7770 cur_dispbuf2 = NULL;
7771 need_disable_vd2 = false;
7772 }
7773#else
7774 if (video2_off_req || video1_off_req) {
7775 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
7776 && video2_off_req)
7777 pr_info("VD2 AFBC off now.\n");
7778 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
7779 VSYNC_WR_MPEG_REG(
7780 VD2_IF0_GEN_REG + cur_dev->viu_off, 0);
7781 if (!legacy_vpp) {
7782 VSYNC_WR_MPEG_REG(
7783 VD2_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7784 }
7785 last_el_w = 0;
7786 last_el_status = 0;
7787 if (cur_dispbuf2 && (cur_dispbuf2 == &vf_local2))
7788 cur_dispbuf2 = NULL;
7789 need_disable_vd2 = false;
7790 }
7791#endif
7792
7793 if (video1_off_req) {
7794 /*
7795 * video layer off, swith off afbc,
7796 * will enabled on new frame coming.
7797 */
7798 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7799 pr_info("AFBC off now.\n");
7800 VSYNC_WR_MPEG_REG(AFBC_ENABLE, 0);
7801 VSYNC_WR_MPEG_REG(
7802 VD1_IF0_GEN_REG + cur_dev->viu_off, 0);
7803 if (!legacy_vpp) {
7804 VSYNC_WR_MPEG_REG(
7805 VD1_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7806 }
7807 if (is_dolby_vision_enable()) {
7808 if (is_meson_txlx_stbmode() ||
7809 is_meson_gxm())
7810 VSYNC_WR_MPEG_REG_BITS(
7811 VIU_MISC_CTRL1,
7812 1, 16, 1); /* bypass core1 */
7813 else if (is_meson_g12a_cpu()
7814 || is_meson_g12b_cpu())
7815 VSYNC_WR_MPEG_REG_BITS(
7816 DOLBY_PATH_CTRL, 1, 0, 1);
7817 }
7818 if (cur_dispbuf && (cur_dispbuf == &vf_local))
7819 cur_dispbuf = NULL;
7820 }
7821#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
7822 cur_rdma_buf = cur_dispbuf;
7823#ifdef VIDEO_PIP
7824 pip_rdma_buf = cur_pipbuf;
7825#endif
7826 /* vsync_rdma_config(); */
7827 vsync_rdma_process();
7828 if (debug_flag & DEBUG_FLAG_PRINT_RDMA) {
7829 if (enable_rdma_log_count == 0)
7830 enable_rdma_log(0);
7831 }
7832 rdma_enable_pre = is_vsync_rdma_enable();
7833#endif
7834
7835 if (timer_count > 50) {
7836 timer_count = 0;
7837 video_notify_flag |= VIDEO_NOTIFY_FRAME_WAIT;
7838#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
7839 if ((video_scaler_mode) && (scaler_pos_changed)) {
7840 video_notify_flag |= VIDEO_NOTIFY_POS_CHANGED;
7841 scaler_pos_changed = 0;
7842 } else {
7843 scaler_pos_changed = 0;
7844 video_notify_flag &= ~VIDEO_NOTIFY_POS_CHANGED;
7845 }
7846#endif
7847 }
7848
7849 switch (READ_VCBUS_REG(VPU_VIU_VENC_MUX_CTRL) & 0x3) {
7850 case 0:
7851 enc_line = (READ_VCBUS_REG(ENCL_INFO_READ) >> 16) & 0x1fff;
7852 break;
7853 case 1:
7854 enc_line = (READ_VCBUS_REG(ENCI_INFO_READ) >> 16) & 0x1fff;
7855 break;
7856 case 2:
7857 enc_line = (READ_VCBUS_REG(ENCP_INFO_READ) >> 16) & 0x1fff;
7858 break;
7859 case 3:
7860 enc_line = (READ_VCBUS_REG(ENCT_INFO_READ) >> 16) & 0x1fff;
7861 break;
7862 }
7863 if (enc_line > vsync_exit_line_max)
7864 vsync_exit_line_max = enc_line;
7865
7866#ifdef FIQ_VSYNC
7867 if (video_notify_flag)
7868 fiq_bridge_pulse_trigger(&vsync_fiq_bridge);
7869#else
7870 if (video_notify_flag)
7871 vsync_notify();
7872
7873 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
7874 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) && !is_meson_mtvd_cpu()) {
7875 if (vpu_delay_work_flag)
7876 schedule_work(&vpu_delay_work);
7877 }
7878 /* #endif */
7879
7880 return IRQ_HANDLED;
7881#endif
7882
7883}
7884
7885
7886#ifdef FIQ_VSYNC
7887void vsync_fisr(void)
7888{
7889 atomic_set(&video_inirq_flag, 1);
7890 vsync_fisr_in();
7891 atomic_set(&video_inirq_flag, 0);
7892}
7893#else
7894static irqreturn_t vsync_isr(int irq, void *dev_id)
7895{
7896 irqreturn_t ret;
7897
7898 atomic_set(&video_inirq_flag, 1);
7899 ret = vsync_isr_in(irq, dev_id);
7900 atomic_set(&video_inirq_flag, 0);
7901 return ret;
7902}
7903#endif
7904
7905
7906/*********************************************************
7907 * FIQ Routines
7908 *********************************************************/
7909
7910static void vsync_fiq_up(void)
7911{
7912#ifdef FIQ_VSYNC
7913 request_fiq(INT_VIU_VSYNC, &vsync_fisr);
7914#else
7915 int r;
7916 /*TODO irq */
7917 r = request_irq(video_vsync, &vsync_isr,
7918 IRQF_SHARED, "vsync", (void *)video_dev_id);
7919
7920#ifdef CONFIG_MESON_TRUSTZONE
7921 if (num_online_cpus() > 1)
7922 irq_set_affinity(INT_VIU_VSYNC, cpumask_of(1));
7923#endif
7924#endif
7925}
7926
7927static void vsync_fiq_down(void)
7928{
7929#ifdef FIQ_VSYNC
7930 free_fiq(INT_VIU_VSYNC, &vsync_fisr);
7931#else
7932 /*TODO irq */
7933 free_irq(video_vsync, (void *)video_dev_id);
7934#endif
7935}
7936
7937#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
7938static void vsync2_fiq_up(void)
7939{
7940 int r;
7941
7942 r = request_irq(INT_VIU2_VSYNC, &vsync_isr,
7943 IRQF_SHARED, "vsync", (void *)video_dev_id2);
7944}
7945
7946static void vsync2_fiq_down(void)
7947{
7948 free_irq(INT_VIU2_VSYNC, (void *)video_dev_id2);
7949}
7950
7951#endif
7952
7953int get_curren_frame_para(int *top, int *left, int *bottom, int *right)
7954{
7955 if (!cur_frame_par)
7956 return -1;
7957 *top = cur_frame_par->VPP_vd_start_lines_;
7958 *left = cur_frame_par->VPP_hd_start_lines_;
7959 *bottom = cur_frame_par->VPP_vd_end_lines_;
7960 *right = cur_frame_par->VPP_hd_end_lines_;
7961 return 0;
7962}
7963
7964int get_current_vscale_skip_count(struct vframe_s *vf)
7965{
7966 int ret = 0;
7967 static struct vpp_frame_par_s frame_par;
7968
7969 vpp_set_filters(
7970 &glayer_info[0],
7971 vf, &frame_par, vinfo,
7972 (is_dolby_vision_on() &&
7973 is_dolby_vision_stb_mode()));
7974 ret = frame_par.vscale_skip_count;
7975 if (cur_frame_par && (process_3d_type & MODE_3D_ENABLE))
7976 ret |= (cur_frame_par->vpp_3d_mode<<8);
7977 return ret;
7978}
7979
7980int query_video_status(int type, int *value)
7981{
7982 if (value == NULL)
7983 return -1;
7984 switch (type) {
7985 case 0:
7986 *value = trickmode_fffb;
7987 break;
7988 case 1:
7989 *value = trickmode_i;
7990 break;
7991 default:
7992 break;
7993 }
7994 return 0;
7995}
7996EXPORT_SYMBOL(query_video_status);
7997
7998static void video_vf_unreg_provider(void)
7999{
8000 ulong flags;
8001 struct vframe_s *el_vf = NULL;
8002 int keeped = 0;
8003 new_frame_count = 0;
8004 first_frame_toggled = 0;
8005 videopeek = 0;
8006 nopostvideostart = false;
8007
8008 atomic_set(&video_unreg_flag, 1);
8009 while (atomic_read(&video_inirq_flag) > 0)
8010 schedule();
8011 spin_lock_irqsave(&lock, flags);
8012
8013#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8014 dispbuf_to_put_num = DISPBUF_TO_PUT_MAX;
8015 while (dispbuf_to_put_num > 0) {
8016 dispbuf_to_put_num--;
8017 dispbuf_to_put[dispbuf_to_put_num] = NULL;
8018 }
8019 cur_rdma_buf = NULL;
8020#endif
8021 if (cur_dispbuf) {
8022 vf_local = *cur_dispbuf;
8023 cur_dispbuf = &vf_local;
8024 cur_dispbuf->video_angle = 0;
8025 }
8026 if (cur_dispbuf2)
8027 need_disable_vd2 = true;
8028 if (is_dolby_vision_enable()) {
8029 if (cur_dispbuf2 == &vf_local2)
8030 cur_dispbuf2 = NULL;
8031 else if (cur_dispbuf2 != NULL) {
8032 vf_local2 = *cur_dispbuf2;
8033 el_vf = &vf_local2;
8034 }
8035 cur_dispbuf2 = NULL;
8036 }
8037 if (trickmode_fffb) {
8038 atomic_set(&trickmode_framedone, 0);
8039 to_notify_trick_wait = false;
8040 }
8041
8042 vsync_pts_100 = 0;
8043 vsync_pts_112 = 0;
8044 vsync_pts_125 = 0;
8045 vsync_freerun = 0;
8046 vsync_pts_align = 0;
8047 vsync_pts_aligned = false;
8048
8049#ifdef VIDEO_PIP
8050 if (pip_loop) {
8051#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8052 pipbuf_to_put = NULL;
8053 pip_rdma_buf = NULL;
8054#endif
8055 if (cur_pipbuf) {
8056 local_pip = *cur_pipbuf;
8057 cur_pipbuf = &local_pip;
8058 cur_pipbuf->video_angle = 0;
8059 }
8060 pip_frame_count = 0;
8061 }
8062#endif
8063 spin_unlock_irqrestore(&lock, flags);
8064
8065#ifdef VIDEO_PIP
8066 if (pip_loop) {
8067 disable_videopip = VIDEO_DISABLE_FORNEXT;
8068 DisableVideoLayer2();
8069 }
8070#endif
8071
8072 if (blackout | force_blackout) {
8073 safe_disble_videolayer();
8074 try_free_keep_video(1);
8075 }
8076
8077#ifdef CONFIG_GE2D_KEEP_FRAME
8078 if (cur_dispbuf) {
8079 /* TODO: mod gate */
8080 /* switch_mod_gate_by_name("ge2d", 1); */
8081 keeped = vf_keep_current(cur_dispbuf, el_vf);
8082 /* TODO: mod gate */
8083 /* switch_mod_gate_by_name("ge2d", 0); */
8084 }
8085 if ((hdmi_in_onvideo == 0) && (video_start_post)) {
8086 tsync_avevent(VIDEO_STOP, 0);
8087 video_start_post = false;
8088 }
8089#else
8090 /* if (!trickmode_fffb) */
8091 if (cur_dispbuf)
8092 keeped = vf_keep_current(cur_dispbuf, el_vf);
8093 if ((hdmi_in_onvideo == 0) && (video_start_post)) {
8094 tsync_avevent(VIDEO_STOP, 0);
8095 video_start_post = false;
8096 }
8097#endif
8098 if (keeped < 0) {/*keep failed.*/
8099 pr_info("video keep failed, disable video now!\n");
8100 safe_disble_videolayer();
8101 try_free_keep_video(1);
8102 }
8103 atomic_set(&video_unreg_flag, 0);
8104 pr_info("VD1 AFBC 0x%x.\n", READ_VCBUS_REG(AFBC_ENABLE));
8105 enable_video_discontinue_report = 1;
8106 show_first_picture = false;
8107 show_first_frame_nosync = false;
8108
8109#ifdef PTS_LOGGING
8110 {
8111 int pattern;
8112 /* Print what we have right now*/
8113 if (pts_pattern_detected >= PTS_32_PATTERN &&
8114 pts_pattern_detected < PTS_MAX_NUM_PATTERNS) {
8115 pr_info("pattern detected = %d, pts_enter_pattern_cnt =%d, pts_exit_pattern_cnt =%d",
8116 pts_pattern_detected,
8117 pts_pattern_enter_cnt[pts_pattern_detected],
8118 pts_pattern_exit_cnt[pts_pattern_detected]);
8119 }
8120 /* Reset all metrics now*/
8121 for (pattern = 0; pattern < PTS_MAX_NUM_PATTERNS; pattern++) {
8122 pts_pattern[pattern] = 0;
8123 pts_pattern_exit_cnt[pattern] = 0;
8124 pts_pattern_enter_cnt[pattern] = 0;
8125 }
8126 /* Reset 4:1 data*/
8127 memset(&pts_41_pattern_sink[0], 0, PTS_41_PATTERN_SINK_MAX);
8128 pts_pattern_detected = -1;
8129 pre_pts_trace = 0;
8130 pts_escape_vsync = 0;
8131 }
8132#endif
8133}
8134
8135static void video_vf_light_unreg_provider(int need_keep_frame)
8136{
8137 ulong flags;
8138
8139 if (need_keep_frame) {
8140 /* wait for the end of the last toggled frame*/
8141 atomic_set(&video_unreg_flag, 1);
8142 while (atomic_read(&video_inirq_flag) > 0)
8143 schedule();
8144 }
8145
8146 spin_lock_irqsave(&lock, flags);
8147#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8148 dispbuf_to_put_num = DISPBUF_TO_PUT_MAX;
8149 while (dispbuf_to_put_num > 0) {
8150 dispbuf_to_put_num--;
8151 dispbuf_to_put[dispbuf_to_put_num] = NULL;
8152 }
8153 cur_rdma_buf = NULL;
8154#endif
8155
8156 if (cur_dispbuf) {
8157 vf_local = *cur_dispbuf;
8158 cur_dispbuf = &vf_local;
8159 }
8160 spin_unlock_irqrestore(&lock, flags);
8161
8162 if (need_keep_frame) {
8163 /* keep the last toggled frame*/
8164 if (cur_dispbuf) {
8165 unsigned int result;
8166
8167 result = vf_keep_current(cur_dispbuf, NULL);
8168 if (result == 0)
8169 pr_info("%s: keep cur_disbuf failed\n",
8170 __func__);
8171 }
8172 atomic_set(&video_unreg_flag, 0);
8173 }
8174}
8175
8176static int get_display_info(void *data)
8177{
8178 s32 w, h, x, y;
8179 struct vdisplay_info_s *info_para = (struct vdisplay_info_s *)data;
8180 const struct vinfo_s *info = get_current_vinfo();
8181 struct disp_info_s *layer = &glayer_info[0];
8182
8183 if ((!cur_frame_par) || (!info))
8184 return -1;
8185
8186 x = layer->layer_left;
8187 y = layer->layer_top;
8188 w = layer->layer_width;
8189 h = layer->layer_height;
8190
8191 if ((w == 0) || (w > info->width))
8192 w = info->width;
8193 if ((h == 0) || (h > info->height))
8194 h = info->height;
8195
8196 info_para->frame_hd_start_lines_ = cur_frame_par->VPP_hd_start_lines_;
8197 info_para->frame_hd_end_lines_ = cur_frame_par->VPP_hd_end_lines_;
8198 info_para->frame_vd_start_lines_ = cur_frame_par->VPP_vd_start_lines_;
8199 info_para->frame_vd_end_lines_ = cur_frame_par->VPP_vd_end_lines_;
8200 info_para->display_hsc_startp = cur_frame_par->VPP_hsc_startp - x;
8201 info_para->display_hsc_endp =
8202 cur_frame_par->VPP_hsc_endp + (info->width - x - w);
8203 info_para->display_vsc_startp = cur_frame_par->VPP_vsc_startp - y;
8204 info_para->display_vsc_endp =
8205 cur_frame_par->VPP_vsc_endp + (info->height - y - h);
8206 info_para->screen_vd_h_start_ =
8207 cur_frame_par->VPP_post_blend_vd_h_start_;
8208 info_para->screen_vd_h_end_ =
8209 cur_frame_par->VPP_post_blend_vd_h_end_;
8210 info_para->screen_vd_v_start_ =
8211 cur_frame_par->VPP_post_blend_vd_v_start_;
8212 info_para->screen_vd_v_end_ = cur_frame_par->VPP_post_blend_vd_v_end_;
8213
8214 return 0;
8215}
8216#if ENABLE_UPDATE_HDR_FROM_USER
8217void init_hdr_info(void)
8218{
8219 unsigned long flags;
8220
8221 spin_lock_irqsave(&omx_hdr_lock, flags);
8222
8223 has_hdr_info = false;
8224 memset(&vf_hdr, 0, sizeof(vf_hdr));
8225
8226 spin_unlock_irqrestore(&omx_hdr_lock, flags);
8227}
8228#endif
8229static int video_receiver_event_fun(int type, void *data, void *private_data)
8230{
8231#ifdef CONFIG_AM_VIDEO2
8232 char *provider_name;
8233#endif
8234 if (type == VFRAME_EVENT_PROVIDER_UNREG) {
8235 video_vf_unreg_provider();
8236#ifdef CONFIG_AM_VIDEO2
8237 set_clone_frame_rate(android_clone_rate, 200);
8238#endif
8239 drop_frame_count = 0;
8240 receive_frame_count = 0;
8241 display_frame_count = 0;
8242 //init_hdr_info();
8243
8244 } else if (type == VFRAME_EVENT_PROVIDER_RESET) {
8245 video_vf_light_unreg_provider(1);
8246 } else if (type == VFRAME_EVENT_PROVIDER_LIGHT_UNREG)
8247 video_vf_light_unreg_provider(0);
8248 else if (type == VFRAME_EVENT_PROVIDER_REG) {
8249 enable_video_discontinue_report = 1;
8250 drop_frame_count = 0;
8251 receive_frame_count = 0;
8252 display_frame_count = 0;
8253 omx_run = false;
8254 omx_pts_set_from_hwc_count = 0;
8255 omx_check_previous_session = true;
8256 omx_need_drop_frame_num = 0;
8257 omx_drop_done = false;
8258 omx_pts_set_index = 0;
8259 //init_hdr_info();
8260
8261#ifdef CONFIG_AM_VIDEO2
8262 provider_name = (char *)data;
8263 if (strncmp(provider_name, "decoder", 7) == 0
8264 || strncmp(provider_name, "ppmgr", 5) == 0
8265 || strncmp(provider_name, "deinterlace", 11) == 0
8266 || strncmp(provider_name, "d2d3", 11) == 0) {
8267 set_clone_frame_rate(noneseamless_play_clone_rate, 0);
8268 set_clone_frame_rate(video_play_clone_rate, 100);
8269 }
8270#endif
8271/*notify di 3d mode is frame*/
8272/*alternative mode,passing two buffer in one frame */
8273 if (platform_type == 1) {
8274 if ((process_3d_type & MODE_3D_FA) &&
8275 !cur_dispbuf->trans_fmt)
8276 vf_notify_receiver_by_name("deinterlace",
8277 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE,
8278 (void *)1);
8279 }
8280
8281 video_vf_light_unreg_provider(0);
8282 } else if (type == VFRAME_EVENT_PROVIDER_FORCE_BLACKOUT) {
8283 force_blackout = 1;
8284 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
8285 pr_info("%s VFRAME_EVENT_PROVIDER_FORCE_BLACKOUT\n",
8286 __func__);
8287 }
8288 } else if (type == VFRAME_EVENT_PROVIDER_FR_HINT) {
8289#ifdef CONFIG_AM_VOUT
8290 if ((data != NULL) && (video_seek_flag == 0)) {
8291 set_vframe_rate_hint((unsigned long)data);
8292 omx_pts_dv_upper = DUR2PTS((unsigned long)data) * 3 / 2;
8293 omx_pts_dv_lower = 0 - DUR2PTS((unsigned long)data);
8294 }
8295#endif
8296 } else if (type == VFRAME_EVENT_PROVIDER_FR_END_HINT) {
8297#ifdef CONFIG_AM_VOUT
8298 if (video_seek_flag == 0) {
8299 set_vframe_rate_end_hint();
8300 omx_pts_dv_upper = OMX_PTS_DV_DEFAULT_UPPER;
8301 omx_pts_dv_lower = OMX_PTS_DV_DEFAULT_LOWER;
8302 }
8303#endif
8304 } else if (type == VFRAME_EVENT_PROVIDER_QUREY_DISPLAY_INFO) {
8305 get_display_info(data);
8306 } else if (type == VFRAME_EVENT_PROVIDER_PROPERTY_CHANGED)
8307 video_property_changed = 1;
8308 return 0;
8309}
8310
8311#ifdef VIDEO_PIP
8312static void pip_vf_unreg_provider(void)
8313{
8314 ulong flags;
8315
8316 /* atomic_set(&video_unreg_flag, 1); */
8317 while (atomic_read(&video_inirq_flag) > 0)
8318 schedule();
8319 spin_lock_irqsave(&lock, flags);
8320
8321#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8322 pipbuf_to_put = NULL;
8323 pip_rdma_buf = NULL;
8324#endif
8325 if (cur_pipbuf) {
8326 local_pip = *cur_pipbuf;
8327 cur_pipbuf = &local_pip;
8328 cur_pipbuf->video_angle = 0;
8329 }
8330 pip_frame_count = 0;
8331 spin_unlock_irqrestore(&lock, flags);
8332
8333 disable_videopip = VIDEO_DISABLE_FORNEXT;
8334 DisableVideoLayer2();
8335}
8336
8337static void pip_vf_light_unreg_provider(void)
8338{
8339 ulong flags;
8340
8341 spin_lock_irqsave(&lock, flags);
8342#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8343 pipbuf_to_put = NULL;
8344 pip_rdma_buf = NULL;
8345#endif
8346
8347 if (cur_pipbuf) {
8348 local_pip = *cur_pipbuf;
8349 cur_pipbuf = &local_pip;
8350 }
8351 spin_unlock_irqrestore(&lock, flags);
8352}
8353
8354static int pip_receiver_event_fun(
8355 int type, void *data, void *private_data)
8356{
8357 if (type == VFRAME_EVENT_PROVIDER_UNREG)
8358 pip_vf_unreg_provider();
8359 else if (type == VFRAME_EVENT_PROVIDER_RESET)
8360 pip_vf_light_unreg_provider();
8361 else if (type == VFRAME_EVENT_PROVIDER_LIGHT_UNREG)
8362 pip_vf_light_unreg_provider();
8363 else if (type == VFRAME_EVENT_PROVIDER_REG)
8364 pip_vf_light_unreg_provider();
8365 return 0;
8366}
8367#endif
8368
8369unsigned int get_post_canvas(void)
8370{
8371 return post_canvas;
8372}
8373EXPORT_SYMBOL(get_post_canvas);
8374
8375
8376u32 get_blackout_policy(void)
8377{
8378 return blackout | force_blackout;
8379}
8380EXPORT_SYMBOL(get_blackout_policy);
8381
8382u32 set_blackout_policy(int policy)
8383{
8384 blackout = policy;
8385 return 0;
8386}
8387EXPORT_SYMBOL(set_blackout_policy);
8388
8389u8 is_vpp_postblend(void)
8390{
8391 if (READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off) & VPP_VD1_POSTBLEND)
8392 return 1;
8393 return 0;
8394}
8395EXPORT_SYMBOL(is_vpp_postblend);
8396
8397void pause_video(unsigned char pause_flag)
8398{
8399 atomic_set(&video_pause_flag, pause_flag ? 1 : 0);
8400}
8401EXPORT_SYMBOL(pause_video);
8402/*********************************************************
8403 * Utilities
8404 *********************************************************/
8405int _video_set_disable(u32 val)
8406{
8407 if (val > VIDEO_DISABLE_FORNEXT)
8408 return -EINVAL;
8409
8410 disable_video = val;
8411
8412 if (disable_video != VIDEO_DISABLE_NONE) {
8413 safe_disble_videolayer();
8414
8415 if ((disable_video == VIDEO_DISABLE_FORNEXT) && cur_dispbuf
8416 && (cur_dispbuf != &vf_local))
8417 video_property_changed = 1;
8418 try_free_keep_video(0);
8419 } else {
8420 if (cur_dispbuf && (cur_dispbuf != &vf_local)) {
8421 EnableVideoLayer();
8422 video_property_changed = 1;
8423 }
8424 }
8425
8426 return 0;
8427}
8428
8429static void _set_video_crop(
8430 struct disp_info_s *layer, int *p)
8431{
8432 int last_l, last_r, last_t, last_b;
8433 int new_l, new_r, new_t, new_b;
8434
8435 if (!layer)
8436 return;
8437
8438 last_t = layer->crop_top;
8439 last_l = layer->crop_left;
8440 last_b = layer->crop_bottom;
8441 last_r = layer->crop_right;
8442
8443 new_t = layer->crop_top = p[0];
8444 new_l = layer->crop_left = p[1];
8445 new_b = layer->crop_bottom = p[2];
8446 new_r = layer->crop_right = p[3];
8447 if ((new_t != last_t) || (new_l != last_l)
8448 || (new_b != last_b) || (new_r != last_r)) {
8449 if (layer->layer_id == 0)
8450 video_property_changed = 1;
8451#ifdef VIDEO_PIP
8452 else if (layer->layer_id == 1)
8453 pip_property_changed = 1;
8454#endif
8455 }
8456}
8457
8458static void _set_video_window(
8459 struct disp_info_s *layer, int *p)
8460{
8461 int w, h;
8462 int *parsed = p;
8463 int last_x, last_y, last_w, last_h;
8464 int new_x, new_y, new_w, new_h;
8465#ifdef TV_REVERSE
8466 int temp, temp1;
8467 const struct vinfo_s *info = get_current_vinfo();
8468#endif
8469
8470 if (!layer)
8471 return;
8472
8473#ifdef TV_REVERSE
8474 /* FIXME: use layer info */
8475 if (reverse) {
8476 temp = parsed[0];
8477 temp1 = parsed[1];
8478 parsed[0] = info->width - parsed[2] - 1;
8479 parsed[1] = info->height - parsed[3] - 1;
8480 parsed[2] = info->width - temp - 1;
8481 parsed[3] = info->height - temp1 - 1;
8482 }
8483#endif
8484
8485 last_x = layer->layer_left;
8486 last_y = layer->layer_top;
8487 last_w = layer->layer_width;
8488 last_h = layer->layer_height;
8489
8490 if (parsed[0] < 0 && parsed[2] < 2) {
8491 parsed[2] = 2;
8492 parsed[0] = 0;
8493 }
8494 if (parsed[1] < 0 && parsed[3] < 2) {
8495 parsed[3] = 2;
8496 parsed[1] = 0;
8497 }
8498 w = parsed[2] - parsed[0] + 1;
8499 h = parsed[3] - parsed[1] + 1;
8500
8501#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
8502 if (video_scaler_mode) {
8503 if ((w == 1) && (h == 1)) {
8504 w = 0;
8505 h = 0;
8506 }
8507 if ((content_left != parsed[0]) || (content_top != parsed[1])
8508 || (content_w != w) || (content_h != h))
8509 scaler_pos_changed = 1;
8510 content_left = parsed[0];
8511 content_top = parsed[1];
8512 content_w = w;
8513 content_h = h;
8514 /* video_notify_flag =*/
8515 /*video_notify_flag|VIDEO_NOTIFY_POS_CHANGED; */
8516 } else
8517#endif
8518 {
8519 if ((w > 0) && (h > 0)) {
8520 if ((w == 1) && (h == 1)) {
8521 w = 0;
8522 h = 0;
8523 }
8524 layer->layer_left = parsed[0];
8525 layer->layer_top = parsed[1];
8526 layer->layer_width = w;
8527 layer->layer_height = h;
8528 }
8529 }
8530
8531 new_x = layer->layer_left;
8532 new_y = layer->layer_top;
8533 new_w = layer->layer_width;
8534 new_h = layer->layer_height;
8535
8536 if ((last_x != new_x) || (last_y != new_y)
8537 || (last_w != new_w) || (last_h != new_h)) {
8538 if (layer->layer_id == 0)
8539 video_property_changed = 1;
8540#ifdef VIDEO_PIP
8541 else if (layer->layer_id == 1)
8542 pip_property_changed = 1;
8543#endif
8544 }
8545}
8546#if ENABLE_UPDATE_HDR_FROM_USER
8547static void config_hdr_info(const struct vframe_master_display_colour_s p)
8548{
8549 struct vframe_master_display_colour_s tmp = {0};
8550 bool valid_hdr = false;
8551 unsigned long flags;
8552
8553 tmp.present_flag = p.present_flag;
8554 if (tmp.present_flag == 1) {
8555 tmp = p;
8556
8557 if (tmp.primaries[0][0] == 0 &&
8558 tmp.primaries[0][1] == 0 &&
8559 tmp.primaries[1][0] == 0 &&
8560 tmp.primaries[1][1] == 0 &&
8561 tmp.primaries[2][0] == 0 &&
8562 tmp.primaries[2][1] == 0 &&
8563 tmp.white_point[0] == 0 &&
8564 tmp.white_point[1] == 0 &&
8565 tmp.luminance[0] == 0 &&
8566 tmp.luminance[1] == 0 &&
8567 tmp.content_light_level.max_content == 0 &&
8568 tmp.content_light_level.max_pic_average == 0) {
8569 valid_hdr = false;
8570 } else {
8571 valid_hdr = true;
8572 }
8573 }
8574
8575 spin_lock_irqsave(&omx_hdr_lock, flags);
8576 vf_hdr = tmp;
8577 has_hdr_info = valid_hdr;
8578 spin_unlock_irqrestore(&omx_hdr_lock, flags);
8579
8580 pr_debug("has_hdr_info %d\n", has_hdr_info);
8581}
8582#endif
8583static void set_omx_pts(u32 *p)
8584{
8585 u32 tmp_pts = p[0];
8586 /*u32 vision = p[1];*/
8587 u32 set_from_hwc = p[2];
8588 u32 frame_num = p[3];
8589 u32 not_reset = p[4];
8590 u32 session = p[5];
8591 unsigned int try_cnt = 0x1000;
8592
8593 mutex_lock(&omx_mutex);
8594 if (omx_pts_set_index < frame_num)
8595 omx_pts_set_index = frame_num;
8596
8597 if (omx_check_previous_session) {
8598 if (session != omx_cur_session) {
8599 omx_cur_session = session;
8600 omx_check_previous_session = false;
8601 } else {
8602 mutex_unlock(&omx_mutex);
8603 pr_info("check session return: tmp_pts %d"
8604 "session=0x%x\n", tmp_pts, omx_cur_session);
8605 return;
8606 }
8607 }
8608 if (debug_flag & DEBUG_FLAG_PTS_TRACE)
8609 pr_info("[set_omx_pts]tmp_pts:%d, set_from_hwc:%d,frame_num=%d, not_reset=%d\n",
8610 tmp_pts, set_from_hwc, frame_num, not_reset);
8611
8612 if (not_reset == 0)
8613 omx_pts = tmp_pts;
8614 /* kodi may render first frame, then drop dozens of frames */
8615 if (set_from_hwc == 0 && omx_run == true && frame_num <= 2
8616 && not_reset == 0) {
8617 pr_info("reset omx_run to false.\n");
8618 omx_run = false;
8619 }
8620 if (set_from_hwc == 1) {
8621 if (!omx_run) {
8622 omx_need_drop_frame_num =
8623 frame_num > 0 ? frame_num-1 : 0;
8624 if (omx_need_drop_frame_num == 0)
8625 omx_drop_done = true;
8626 pr_info("omx_need_drop_frame_num %d\n",
8627 omx_need_drop_frame_num);
8628 }
8629 omx_run = true;
8630 if (omx_pts_set_from_hwc_count < OMX_MAX_COUNT_RESET_SYSTEMTIME)
8631 omx_pts_set_from_hwc_count++;
8632
8633 } else if (set_from_hwc == 0 && !omx_run) {
8634 struct vframe_s *vf = NULL;
8635 u32 donot_drop = 0;
8636
8637 while (try_cnt--) {
8638 vf = vf_peek(RECEIVER_NAME);
8639#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
8640 if (is_dolby_vision_enable()
8641 && vf && is_dovi_frame(vf)) {
8642 pr_info("set_omx_pts ignore the omx %d frames drop for dv frame\n",
8643 frame_num);
8644 donot_drop = 1;
8645 break;
8646 }
8647#endif
8648 if (vf) {
8649 pr_debug("drop frame_num=%d, vf->omx_index=%d\n",
8650 frame_num, vf->omx_index);
8651 if (frame_num >= vf->omx_index) {
8652 vf = vf_get(RECEIVER_NAME);
8653 if (vf)
8654 vf_put(vf, RECEIVER_NAME);
8655 } else
8656 break;
8657 } else
8658 break;
8659 }
8660 if (donot_drop && omx_pts_set_from_hwc_count > 0) {
8661 pr_info("reset omx_run to true.\n");
8662 omx_run = true;
8663 }
8664 }
8665 mutex_unlock(&omx_mutex);
8666}
8667
8668static int alloc_layer(u32 layer_id)
8669{
8670 int ret = -EINVAL;
8671
8672 if (layer_id == 0) {
8673 if (layer_cap & LAYER0_BUSY) {
8674 ret = -EBUSY;
8675 } else if (layer_cap & LAYER0_AVAIL) {
8676 ret = 0;
8677 layer_cap |= LAYER0_BUSY;
8678 }
8679 } else if (layer_id == 1) {
8680 if (layer_cap & LAYER1_BUSY) {
8681 ret = -EBUSY;
8682 } else if (layer_cap & LAYER1_AVAIL) {
8683 ret = 0;
8684 layer_cap |= LAYER1_BUSY;
8685 }
8686 }
8687 return ret;
8688}
8689
8690static int free_layer(u32 layer_id)
8691{
8692 int ret = -EINVAL;
8693
8694 if (layer_id == 0) {
8695 if ((layer_cap & LAYER0_BUSY)
8696 && (layer_cap & LAYER0_AVAIL)) {
8697 ret = 0;
8698 layer_cap &= ~LAYER0_BUSY;
8699 }
8700 } else if (layer_id == 1) {
8701 if ((layer_cap & LAYER1_BUSY)
8702 && (layer_cap & LAYER1_AVAIL)) {
8703 ret = 0;
8704 layer_cap &= ~LAYER1_BUSY;
8705 }
8706 }
8707 return ret;
8708}
8709
8710/*********************************************************
8711 * /dev/amvideo APIs
8712 ********************************************************
8713 */
8714static int amvideo_open(struct inode *inode, struct file *file)
8715{
8716 file->private_data = NULL;
8717 return 0;
8718}
8719
8720static int amvideo_poll_open(struct inode *inode, struct file *file)
8721{
8722 file->private_data = NULL;
8723 return 0;
8724}
8725
8726static int amvideo_release(struct inode *inode, struct file *file)
8727{
8728 file->private_data = NULL;
8729 return 0;
8730}
8731
8732static int amvideo_poll_release(struct inode *inode, struct file *file)
8733{
8734 file->private_data = NULL;
8735 return 0;
8736}
8737
8738static long amvideo_ioctl(struct file *file, unsigned int cmd, ulong arg)
8739{
8740 long ret = 0;
8741 void __user *argp = (void __user *)arg;
8742 struct disp_info_s *layer = &glayer_info[0];
8743 u32 layer_id;
8744
8745 switch (cmd) {
8746 case AMSTREAM_IOC_GLOBAL_SET_VIDEOPIP_OUTPUT:
8747 case AMSTREAM_IOC_GLOBAL_GET_VIDEOPIP_OUTPUT:
8748 case AMSTREAM_IOC_GET_VIDEOPIP_DISABLE:
8749 case AMSTREAM_IOC_SET_VIDEOPIP_DISABLE:
8750 case AMSTREAM_IOC_GET_VIDEOPIP_AXIS:
8751 case AMSTREAM_IOC_SET_VIDEOPIP_AXIS:
8752 case AMSTREAM_IOC_GET_VIDEOPIP_CROP:
8753 case AMSTREAM_IOC_SET_VIDEOPIP_CROP:
8754 case AMSTREAM_IOC_GET_PIP_SCREEN_MODE:
8755 case AMSTREAM_IOC_SET_PIP_SCREEN_MODE:
8756 case AMSTREAM_IOC_GET_PIP_ZORDER:
8757 case AMSTREAM_IOC_SET_PIP_ZORDER:
8758 layer = &glayer_info[1];
8759 break;
8760 default:
8761 break;
8762 }
8763
8764 if (file->private_data)
8765 layer = (struct disp_info_s *)file->private_data;
8766
8767 switch (cmd) {
8768 case AMSTREAM_IOC_SET_HDR_INFO:{
8769#if ENABLE_UPDATE_HDR_FROM_USER
8770 struct vframe_master_display_colour_s tmp;
8771 if (copy_from_user(&tmp, argp, sizeof(tmp)) == 0)
8772 config_hdr_info(tmp);
8773#endif
8774 }
8775 break;
8776 case AMSTREAM_IOC_SET_OMX_VPTS:{
8777 u32 pts[6];
8778 if (copy_from_user(pts, argp, sizeof(pts)) == 0)
8779 set_omx_pts(pts);
8780 }
8781 break;
8782
8783 case AMSTREAM_IOC_GET_OMX_VPTS:
8784 put_user(omx_pts, (u32 __user *)argp);
8785 break;
8786
8787 case AMSTREAM_IOC_GET_OMX_VERSION:
8788 put_user(omx_version, (u32 __user *)argp);
8789 break;
8790
8791 case AMSTREAM_IOC_GET_OMX_INFO:
8792 put_user(omx_info, (u32 __user *)argp);
8793 break;
8794
8795 case AMSTREAM_IOC_TRICKMODE:
8796 if (arg == TRICKMODE_I)
8797 trickmode_i = 1;
8798 else if (arg == TRICKMODE_FFFB)
8799 trickmode_fffb = 1;
8800 else {
8801 trickmode_i = 0;
8802 trickmode_fffb = 0;
8803 }
8804 to_notify_trick_wait = false;
8805 atomic_set(&trickmode_framedone, 0);
8806 tsync_trick_mode(trickmode_fffb);
8807 break;
8808
8809 case AMSTREAM_IOC_TRICK_STAT:
8810 put_user(atomic_read(&trickmode_framedone),
8811 (u32 __user *)argp);
8812 break;
8813
8814 case AMSTREAM_IOC_GET_TRICK_VPTS:
8815 put_user(trickmode_vpts, (u32 __user *)argp);
8816 break;
8817
8818 case AMSTREAM_IOC_VPAUSE:
8819 tsync_avevent(VIDEO_PAUSE, arg);
8820 break;
8821
8822 case AMSTREAM_IOC_AVTHRESH:
8823 tsync_set_avthresh(arg);
8824 break;
8825
8826 case AMSTREAM_IOC_SYNCTHRESH:
8827 tsync_set_syncthresh(arg);
8828 break;
8829
8830 case AMSTREAM_IOC_SYNCENABLE:
8831 tsync_set_enable(arg);
8832 break;
8833
8834 case AMSTREAM_IOC_SET_SYNC_ADISCON:
8835 tsync_set_sync_adiscont(arg);
8836 break;
8837
8838 case AMSTREAM_IOC_SET_SYNC_VDISCON:
8839 tsync_set_sync_vdiscont(arg);
8840 break;
8841
8842 case AMSTREAM_IOC_GET_SYNC_ADISCON:
8843 put_user(tsync_get_sync_adiscont(), (u32 __user *)argp);
8844 break;
8845
8846 case AMSTREAM_IOC_GET_SYNC_VDISCON:
8847 put_user(tsync_get_sync_vdiscont(), (u32 __user *)argp);
8848 break;
8849
8850 case AMSTREAM_IOC_GET_SYNC_ADISCON_DIFF:
8851 put_user(tsync_get_sync_adiscont_diff(), (u32 __user *)argp);
8852 break;
8853
8854 case AMSTREAM_IOC_GET_SYNC_VDISCON_DIFF:
8855 put_user(tsync_get_sync_vdiscont_diff(), (u32 __user *)argp);
8856 break;
8857
8858 case AMSTREAM_IOC_SET_SYNC_ADISCON_DIFF:
8859 tsync_set_sync_adiscont_diff(arg);
8860 break;
8861
8862 case AMSTREAM_IOC_SET_SYNC_VDISCON_DIFF:
8863 tsync_set_sync_vdiscont_diff(arg);
8864 break;
8865
8866 case AMSTREAM_IOC_VF_STATUS:{
8867 struct vframe_states vfsta;
8868 struct vframe_states states;
8869
8870 video_vf_get_states(&vfsta);
8871 states.vf_pool_size = vfsta.vf_pool_size;
8872 states.buf_avail_num = vfsta.buf_avail_num;
8873 states.buf_free_num = vfsta.buf_free_num;
8874 states.buf_recycle_num = vfsta.buf_recycle_num;
8875 if (copy_to_user(argp, &states, sizeof(states)))
8876 ret = -EFAULT;
8877 }
8878 break;
8879
8880 case AMSTREAM_IOC_GET_VIDEOPIP_DISABLE:
8881 case AMSTREAM_IOC_GET_VIDEO_DISABLE:
8882 if (layer->layer_id == 0)
8883 put_user(disable_video, (u32 __user *)argp);
8884#ifdef VIDEO_PIP
8885 else if (layer->layer_id == 1)
8886 put_user(disable_videopip, (u32 __user *)argp);
8887#endif
8888 break;
8889
8890 case AMSTREAM_IOC_SET_VIDEOPIP_DISABLE:
8891 case AMSTREAM_IOC_SET_VIDEO_DISABLE:
8892 {
8893 u32 val;
8894
8895 if (copy_from_user(&val, argp, sizeof(u32)) == 0) {
8896 if (layer->layer_id == 0)
8897 ret = _video_set_disable(val);
8898#ifdef VIDEO_PIP
8899 else if (layer->layer_id == 1)
8900 ret = _videopip_set_disable(val);
8901#endif
8902 } else
8903 ret = -EFAULT;
8904 }
8905 break;
8906
8907 case AMSTREAM_IOC_GET_VIDEO_DISCONTINUE_REPORT:
8908 put_user(enable_video_discontinue_report, (u32 __user *)argp);
8909 break;
8910
8911 case AMSTREAM_IOC_SET_VIDEO_DISCONTINUE_REPORT:
8912 enable_video_discontinue_report = (arg == 0) ? 0 : 1;
8913 break;
8914
8915 case AMSTREAM_IOC_GET_VIDEOPIP_AXIS:
8916 case AMSTREAM_IOC_GET_VIDEO_AXIS:
8917 {
8918 int axis[4];
8919#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
8920 if (video_scaler_mode && (layer->layer_id == 0)) {
8921 axis[0] = content_left;
8922 axis[1] = content_top;
8923 axis[2] = content_w;
8924 axis[3] = content_h;
8925 } else
8926#endif
8927 {
8928 axis[0] = layer->layer_left;
8929 axis[1] = layer->layer_top;
8930 axis[2] = layer->layer_width;
8931 axis[3] = layer->layer_height;
8932 }
8933
8934 axis[2] = axis[0] + axis[2] - 1;
8935 axis[3] = axis[1] + axis[3] - 1;
8936
8937 if (copy_to_user(argp, &axis[0], sizeof(axis)) != 0)
8938 ret = -EFAULT;
8939 }
8940 break;
8941
8942 case AMSTREAM_IOC_SET_VIDEOPIP_AXIS:
8943 case AMSTREAM_IOC_SET_VIDEO_AXIS:
8944 {
8945 int axis[4];
8946
8947 if (copy_from_user(axis, argp, sizeof(axis)) == 0)
8948 _set_video_window(layer, axis);
8949 else
8950 ret = -EFAULT;
8951 }
8952 break;
8953
8954 case AMSTREAM_IOC_GET_VIDEOPIP_CROP:
8955 case AMSTREAM_IOC_GET_VIDEO_CROP:
8956 {
8957 int crop[4];
8958 {
8959 crop[0] = layer->crop_top;
8960 crop[1] = layer->crop_left;
8961 crop[2] = layer->crop_bottom;
8962 crop[3] = layer->crop_right;
8963 }
8964
8965 if (copy_to_user(argp, &crop[0], sizeof(crop)) != 0)
8966 ret = -EFAULT;
8967 }
8968 break;
8969
8970 case AMSTREAM_IOC_SET_VIDEOPIP_CROP:
8971 case AMSTREAM_IOC_SET_VIDEO_CROP:
8972 {
8973 int crop[4];
8974
8975 if (copy_from_user(crop, argp, sizeof(crop)) == 0)
8976 _set_video_crop(layer, crop);
8977 else
8978 ret = -EFAULT;
8979 }
8980 break;
8981
8982 case AMSTREAM_IOC_GET_PIP_SCREEN_MODE:
8983 case AMSTREAM_IOC_GET_SCREEN_MODE:
8984 if (copy_to_user(argp, &layer->wide_mode, sizeof(u32)) != 0)
8985 ret = -EFAULT;
8986 break;
8987
8988 case AMSTREAM_IOC_SET_PIP_SCREEN_MODE:
8989 case AMSTREAM_IOC_SET_SCREEN_MODE:
8990 {
8991 u32 mode;
8992
8993 if (copy_from_user(&mode, argp, sizeof(u32)) == 0) {
8994 if (mode >= VIDEO_WIDEOPTION_MAX)
8995 ret = -EINVAL;
8996 else if (mode != layer->wide_mode) {
8997 layer->wide_mode = mode;
8998 if (layer->layer_id == 0)
8999 video_property_changed = 1;
9000#ifdef VIDEO_PIP
9001 else if (layer->layer_id == 1)
9002 pip_property_changed = 1;
9003#endif
9004 }
9005 } else
9006 ret = -EFAULT;
9007 }
9008 break;
9009
9010 case AMSTREAM_IOC_GET_BLACKOUT_POLICY:
9011 if (copy_to_user(argp, &blackout, sizeof(u32)) != 0)
9012 ret = -EFAULT;
9013 break;
9014
9015 case AMSTREAM_IOC_SET_BLACKOUT_POLICY:{
9016 u32 mode;
9017
9018 if (copy_from_user(&mode, argp, sizeof(u32)) == 0) {
9019 if (mode > 2)
9020 ret = -EINVAL;
9021 else
9022 blackout = mode;
9023 } else
9024 ret = -EFAULT;
9025 }
9026 break;
9027
9028 case AMSTREAM_IOC_CLEAR_VBUF:{
9029 unsigned long flags;
9030 while (atomic_read(&video_inirq_flag) > 0 ||
9031 atomic_read(&video_unreg_flag) > 0)
9032 schedule();
9033 spin_lock_irqsave(&lock, flags);
9034 cur_dispbuf = NULL;
9035 spin_unlock_irqrestore(&lock, flags);
9036 }
9037 break;
9038
9039 case AMSTREAM_IOC_CLEAR_VIDEO:
9040 if (blackout)
9041 safe_disble_videolayer();
9042 break;
9043
9044 case AMSTREAM_IOC_SET_FREERUN_MODE:
9045 if (arg > FREERUN_DUR)
9046 ret = -EFAULT;
9047 else
9048 freerun_mode = arg;
9049 break;
9050
9051 case AMSTREAM_IOC_GET_FREERUN_MODE:
9052 put_user(freerun_mode, (u32 __user *)argp);
9053 break;
9054
9055 case AMSTREAM_IOC_DISABLE_SLOW_SYNC:
9056 if (arg)
9057 disable_slow_sync = 1;
9058 else
9059 disable_slow_sync = 0;
9060 break;
9061 /*
9062 ***************************************************************
9063 *3d process ioctl
9064 ****************************************************************
9065 */
9066 case AMSTREAM_IOC_SET_3D_TYPE:
9067 {
9068#ifdef TV_3D_FUNCTION_OPEN
9069 unsigned int set_3d =
9070 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE;
9071 unsigned int type = (unsigned int)arg;
9072
9073 if (type != process_3d_type) {
9074 process_3d_type = type;
9075 if (mvc_flag)
9076 process_3d_type |= MODE_3D_MVC;
9077 video_property_changed = 1;
9078 if ((process_3d_type & MODE_3D_FA)
9079 && cur_dispbuf
9080 && !cur_dispbuf->trans_fmt)
9081 /*notify di 3d mode is frame*/
9082 /*alternative mode,passing two*/
9083 /*buffer in one frame */
9084 vf_notify_receiver_by_name(
9085 "deinterlace",
9086 set_3d,
9087 (void *)1);
9088 else
9089 vf_notify_receiver_by_name(
9090 "deinterlace",
9091 set_3d,
9092 (void *)0);
9093 }
9094#endif
9095 break;
9096 }
9097 case AMSTREAM_IOC_GET_3D_TYPE:
9098#ifdef TV_3D_FUNCTION_OPEN
9099 put_user(process_3d_type, (u32 __user *)argp);
9100
9101#endif
9102 break;
9103 case AMSTREAM_IOC_GET_SOURCE_VIDEO_3D_TYPE:
9104#ifdef TV_3D_FUNCTION_OPEN
9105 {
9106 int source_video_3d_type = VPP_3D_MODE_NULL;
9107
9108 if (!cur_frame_par)
9109 source_video_3d_type =
9110 VPP_3D_MODE_NULL;
9111 else
9112 get_vpp_3d_mode(process_3d_type,
9113 cur_frame_par->trans_fmt, &source_video_3d_type);
9114 put_user(source_video_3d_type, (u32 __user *)argp);
9115 }
9116#endif
9117 break;
9118 case AMSTREAM_IOC_SET_VSYNC_UPINT:
9119 vsync_pts_inc_upint = arg;
9120 break;
9121
9122 case AMSTREAM_IOC_GET_VSYNC_SLOW_FACTOR:
9123 put_user(vsync_slow_factor, (u32 __user *)argp);
9124 break;
9125
9126 case AMSTREAM_IOC_SET_VSYNC_SLOW_FACTOR:
9127 vsync_slow_factor = arg;
9128 break;
9129
9130 case AMSTREAM_IOC_GLOBAL_SET_VIDEOPIP_OUTPUT:
9131 case AMSTREAM_IOC_GLOBAL_SET_VIDEO_OUTPUT:
9132 if (layer->layer_id == 0) {
9133 if (arg != 0)
9134 video_global_output = 1;
9135 else
9136 video_global_output = 0;
9137 }
9138#ifdef VIDEO_PIP
9139 else if (layer->layer_id == 1) {
9140 if (arg != 0)
9141 pip_global_output = 1;
9142 else
9143 pip_global_output = 0;
9144 }
9145#endif
9146 break;
9147
9148 case AMSTREAM_IOC_GLOBAL_GET_VIDEOPIP_OUTPUT:
9149 case AMSTREAM_IOC_GLOBAL_GET_VIDEO_OUTPUT:
9150 if (layer->layer_id == 0)
9151 put_user(video_global_output, (u32 __user *)argp);
9152#ifdef VIDEO_PIP
9153 else if (layer->layer_id == 1)
9154 put_user(pip_global_output, (u32 __user *)argp);
9155#endif
9156 break;
9157
9158 case AMSTREAM_IOC_GET_VIDEO_LAYER1_ON: {
9159 u32 vsync_duration;
9160 u32 video_onoff_diff = 0;
9161
9162 vsync_duration = vsync_pts_inc / 90;
9163 video_onoff_diff =
9164 jiffies_to_msecs(jiffies) - video_onoff_time;
9165
9166 if (video_onoff_state == VIDEO_ENABLE_STATE_IDLE) {
9167 /* wait until 5ms after next vsync */
9168 msleep(video_onoff_diff < vsync_duration
9169 ? vsync_duration - video_onoff_diff + 5
9170 : 0);
9171 }
9172 put_user(video_onoff_state, (u32 __user *)argp);
9173 break;
9174 }
9175
9176 case AMSTREAM_IOC_GET_FIRST_FRAME_TOGGLED:
9177 put_user(first_frame_toggled, (u32 __user *)argp);
9178 break;
9179
9180 case AMSTREAM_IOC_SET_VIDEOPEEK:
9181 videopeek = true;
9182 nopostvideostart = true;
9183 break;
9184
9185 case AMSTREAM_IOC_GET_PIP_ZORDER:
9186 case AMSTREAM_IOC_GET_ZORDER:
9187 put_user(layer->zorder, (u32 __user *)argp);
9188 break;
9189
9190 case AMSTREAM_IOC_SET_PIP_ZORDER:
9191 case AMSTREAM_IOC_SET_ZORDER:{
9192 u32 zorder, new_prop = 0;
9193
9194 if (copy_from_user(&zorder, argp, sizeof(u32)) == 0) {
9195 if (layer->zorder != zorder)
9196 new_prop = 1;
9197 layer->zorder = zorder;
9198 if ((layer->layer_id == 0) && new_prop)
9199 video_property_changed = 1;
9200#ifdef VIDEO_PIP
9201 else if ((layer->layer_id == 1) && new_prop)
9202 pip_property_changed = 1;
9203#endif
9204 } else
9205 ret = -EFAULT;
9206 }
9207 break;
9208
9209 case AMSTREAM_IOC_QUERY_LAYER:
9210 mutex_lock(&video_layer_mutex);
9211 put_user(layer_cap, (u32 __user *)argp);
9212 mutex_unlock(&video_layer_mutex);
9213 ret = 0;
9214 break;
9215
9216 case AMSTREAM_IOC_ALLOC_LAYER:
9217 if (copy_from_user(&layer_id, argp, sizeof(u32)) == 0) {
9218 if (layer_id >= MAX_VD_LAYERS) {
9219 ret = -EINVAL;
9220 } else {
9221 mutex_lock(&video_layer_mutex);
9222 if (file->private_data) {
9223 ret = -EBUSY;
9224 } else {
9225 ret = alloc_layer(layer_id);
9226 if (!ret)
9227 file->private_data =
9228 (void *)&glayer_info[layer_id];
9229 }
9230 mutex_unlock(&video_layer_mutex);
9231 }
9232 } else
9233 ret = -EFAULT;
9234 break;
9235
9236 case AMSTREAM_IOC_FREE_LAYER:
9237 mutex_lock(&video_layer_mutex);
9238 if (!file->private_data) {
9239 ret = -EINVAL;
9240 } else {
9241 ret = free_layer(layer->layer_id);
9242 if (!ret)
9243 file->private_data = NULL;
9244 }
9245 mutex_unlock(&video_layer_mutex);
9246 break;
9247
9248 default:
9249 return -EINVAL;
9250 }
9251
9252 return ret;
9253}
9254
9255#ifdef CONFIG_COMPAT
9256static long amvideo_compat_ioctl(struct file *file, unsigned int cmd, ulong arg)
9257{
9258 long ret = 0;
9259
9260 switch (cmd) {
9261 case AMSTREAM_IOC_SET_HDR_INFO:
9262 case AMSTREAM_IOC_SET_OMX_VPTS:
9263 case AMSTREAM_IOC_GET_OMX_VPTS:
9264 case AMSTREAM_IOC_GET_OMX_VERSION:
9265 case AMSTREAM_IOC_GET_OMX_INFO:
9266 case AMSTREAM_IOC_TRICK_STAT:
9267 case AMSTREAM_IOC_GET_TRICK_VPTS:
9268 case AMSTREAM_IOC_GET_SYNC_ADISCON:
9269 case AMSTREAM_IOC_GET_SYNC_VDISCON:
9270 case AMSTREAM_IOC_GET_SYNC_ADISCON_DIFF:
9271 case AMSTREAM_IOC_GET_SYNC_VDISCON_DIFF:
9272 case AMSTREAM_IOC_VF_STATUS:
9273 case AMSTREAM_IOC_GET_VIDEO_DISABLE:
9274 case AMSTREAM_IOC_GET_VIDEO_DISCONTINUE_REPORT:
9275 case AMSTREAM_IOC_GET_VIDEO_AXIS:
9276 case AMSTREAM_IOC_SET_VIDEO_AXIS:
9277 case AMSTREAM_IOC_GET_VIDEO_CROP:
9278 case AMSTREAM_IOC_SET_VIDEO_CROP:
9279 case AMSTREAM_IOC_GET_SCREEN_MODE:
9280 case AMSTREAM_IOC_SET_SCREEN_MODE:
9281 case AMSTREAM_IOC_GET_BLACKOUT_POLICY:
9282 case AMSTREAM_IOC_SET_BLACKOUT_POLICY:
9283 case AMSTREAM_IOC_GET_FREERUN_MODE:
9284 case AMSTREAM_IOC_GET_3D_TYPE:
9285 case AMSTREAM_IOC_GET_SOURCE_VIDEO_3D_TYPE:
9286 case AMSTREAM_IOC_GET_VSYNC_SLOW_FACTOR:
9287 case AMSTREAM_IOC_GLOBAL_GET_VIDEO_OUTPUT:
9288 case AMSTREAM_IOC_GET_VIDEO_LAYER1_ON:
9289 case AMSTREAM_IOC_GLOBAL_SET_VIDEOPIP_OUTPUT:
9290 case AMSTREAM_IOC_GLOBAL_GET_VIDEOPIP_OUTPUT:
9291 case AMSTREAM_IOC_GET_VIDEOPIP_DISABLE:
9292 case AMSTREAM_IOC_SET_VIDEOPIP_DISABLE:
9293 case AMSTREAM_IOC_GET_VIDEOPIP_AXIS:
9294 case AMSTREAM_IOC_SET_VIDEOPIP_AXIS:
9295 case AMSTREAM_IOC_GET_VIDEOPIP_CROP:
9296 case AMSTREAM_IOC_SET_VIDEOPIP_CROP:
9297 case AMSTREAM_IOC_GET_PIP_SCREEN_MODE:
9298 case AMSTREAM_IOC_SET_PIP_SCREEN_MODE:
9299 case AMSTREAM_IOC_GET_PIP_ZORDER:
9300 case AMSTREAM_IOC_SET_PIP_ZORDER:
9301 case AMSTREAM_IOC_GET_ZORDER:
9302 case AMSTREAM_IOC_SET_ZORDER:
9303 case AMSTREAM_IOC_QUERY_LAYER:
9304 case AMSTREAM_IOC_ALLOC_LAYER:
9305 case AMSTREAM_IOC_FREE_LAYER:
9306 arg = (unsigned long) compat_ptr(arg);
9307 case AMSTREAM_IOC_TRICKMODE:
9308 case AMSTREAM_IOC_VPAUSE:
9309 case AMSTREAM_IOC_AVTHRESH:
9310 case AMSTREAM_IOC_SYNCTHRESH:
9311 case AMSTREAM_IOC_SYNCENABLE:
9312 case AMSTREAM_IOC_SET_SYNC_ADISCON:
9313 case AMSTREAM_IOC_SET_SYNC_VDISCON:
9314 case AMSTREAM_IOC_SET_SYNC_ADISCON_DIFF:
9315 case AMSTREAM_IOC_SET_SYNC_VDISCON_DIFF:
9316 case AMSTREAM_IOC_SET_VIDEO_DISABLE:
9317 case AMSTREAM_IOC_SET_VIDEO_DISCONTINUE_REPORT:
9318 case AMSTREAM_IOC_CLEAR_VBUF:
9319 case AMSTREAM_IOC_CLEAR_VIDEO:
9320 case AMSTREAM_IOC_SET_FREERUN_MODE:
9321 case AMSTREAM_IOC_DISABLE_SLOW_SYNC:
9322 case AMSTREAM_IOC_SET_3D_TYPE:
9323 case AMSTREAM_IOC_SET_VSYNC_UPINT:
9324 case AMSTREAM_IOC_SET_VSYNC_SLOW_FACTOR:
9325 case AMSTREAM_IOC_GLOBAL_SET_VIDEO_OUTPUT:
9326 case AMSTREAM_IOC_GET_FIRST_FRAME_TOGGLED:
9327 case AMSTREAM_IOC_SET_VIDEOPEEK:
9328 return amvideo_ioctl(file, cmd, arg);
9329 default:
9330 return -EINVAL;
9331 }
9332
9333 return ret;
9334}
9335#endif
9336
9337static unsigned int amvideo_poll(struct file *file, poll_table *wait_table)
9338{
9339 poll_wait(file, &amvideo_trick_wait, wait_table);
9340
9341 if (atomic_read(&trickmode_framedone)) {
9342 atomic_set(&trickmode_framedone, 0);
9343 return POLLOUT | POLLWRNORM;
9344 }
9345
9346 return 0;
9347}
9348
9349static unsigned int amvideo_poll_poll(struct file *file, poll_table *wait_table)
9350{
9351 poll_wait(file, &amvideo_sizechange_wait, wait_table);
9352
9353 if (atomic_read(&video_sizechange)) {
9354 atomic_set(&video_sizechange, 0);
9355 return POLLIN | POLLWRNORM;
9356 }
9357
9358 return 0;
9359}
9360
9361static const struct file_operations amvideo_fops = {
9362 .owner = THIS_MODULE,
9363 .open = amvideo_open,
9364 .release = amvideo_release,
9365 .unlocked_ioctl = amvideo_ioctl,
9366#ifdef CONFIG_COMPAT
9367 .compat_ioctl = amvideo_compat_ioctl,
9368#endif
9369 .poll = amvideo_poll,
9370};
9371
9372static const struct file_operations amvideo_poll_fops = {
9373 .owner = THIS_MODULE,
9374 .open = amvideo_poll_open,
9375 .release = amvideo_poll_release,
9376 .poll = amvideo_poll_poll,
9377};
9378
9379/*********************************************************
9380 * SYSFS property functions
9381 *********************************************************/
9382#define MAX_NUMBER_PARA 10
9383#define AMVIDEO_CLASS_NAME "video"
9384#define AMVIDEO_POLL_CLASS_NAME "video_poll"
9385
9386static int parse_para(const char *para, int para_num, int *result)
9387{
9388 char *token = NULL;
9389 char *params, *params_base;
9390 int *out = result;
9391 int len = 0, count = 0;
9392 int res = 0;
9393 int ret = 0;
9394
9395 if (!para)
9396 return 0;
9397
9398 params = kstrdup(para, GFP_KERNEL);
9399 params_base = params;
9400 token = params;
9401 if (token) {
9402 len = strlen(token);
9403 do {
9404 token = strsep(&params, " ");
9405 if (!token)
9406 break;
9407 while (token && (isspace(*token)
9408 || !isgraph(*token)) && len) {
9409 token++;
9410 len--;
9411 }
9412 if (len == 0)
9413 break;
9414 ret = kstrtoint(token, 0, &res);
9415 if (ret < 0)
9416 break;
9417 len = strlen(token);
9418 *out++ = res;
9419 count++;
9420 } while ((count < para_num) && (len > 0));
9421 }
9422
9423 kfree(params_base);
9424 return count;
9425}
9426
9427static void set_video_crop(
9428 struct disp_info_s *layer, const char *para)
9429{
9430 int parsed[4];
9431
9432 if (likely(parse_para(para, 4, parsed) == 4))
9433 _set_video_crop(layer, parsed);
9434 amlog_mask(LOG_MASK_SYSFS,
9435 "video crop=>x0:%d,y0:%d,x1:%d,y1:%d\n ",
9436 parsed[0], parsed[1], parsed[2], parsed[3]);
9437}
9438
9439static void set_video_speed_check(const char *para)
9440{
9441 int parsed[2];
9442 struct disp_info_s *layer = &glayer_info[0];
9443
9444 if (likely(parse_para(para, 2, parsed) == 2)) {
9445 layer->speed_check_height = parsed[0];
9446 layer->speed_check_width = parsed[1];
9447 }
9448 amlog_mask(LOG_MASK_SYSFS,
9449 "video speed_check=>h:%d,w:%d\n ", parsed[0], parsed[1]);
9450}
9451
9452static void set_video_window(
9453 struct disp_info_s *layer, const char *para)
9454{
9455 int parsed[4];
9456
9457 if (likely(parse_para(para, 4, parsed) == 4))
9458 _set_video_window(layer, parsed);
9459 amlog_mask(LOG_MASK_SYSFS,
9460 "video=>x0:%d,y0:%d,x1:%d,y1:%d\n ",
9461 parsed[0], parsed[1], parsed[2], parsed[3]);
9462}
9463
9464static ssize_t video_3d_scale_store(struct class *cla,
9465 struct class_attribute *attr,
9466 const char *buf, size_t count)
9467{
9468#ifdef TV_3D_FUNCTION_OPEN
9469 u32 enable;
9470 int r;
9471 struct disp_info_s *layer = &glayer_info[0];
9472
9473 r = kstrtouint(buf, 0, &enable);
9474 if (r < 0)
9475 return -EINVAL;
9476
9477 layer->vpp_3d_scale = enable ? true : false;
9478 video_property_changed = 1;
9479 amlog_mask(LOG_MASK_SYSFS, "%s:%s 3d scale.\n", __func__,
9480 enable ? "enable" : "disable");
9481#endif
9482 return count;
9483}
9484
9485static ssize_t video_sr_show(struct class *cla, struct class_attribute *attr,
9486 char *buf)
9487{
9488 return sprintf(buf, "super_scaler:%d\n", super_scaler);
9489}
9490
9491static ssize_t video_sr_store(struct class *cla,
9492 struct class_attribute *attr,
9493 const char *buf, size_t count)
9494{
9495 int parsed[1];
9496
9497 mutex_lock(&video_module_mutex);
9498 if (likely(parse_para(buf, 1, parsed) == 1)) {
9499 if (super_scaler != (parsed[0] & 0x1)) {
9500 super_scaler = parsed[0] & 0x1;
9501 video_property_changed = 1;
9502 }
9503 }
9504 mutex_unlock(&video_module_mutex);
9505
9506 return strnlen(buf, count);
9507}
9508
9509static ssize_t video_crop_show(struct class *cla, struct class_attribute *attr,
9510 char *buf)
9511{
9512 u32 t, l, b, r;
9513 struct disp_info_s *layer = &glayer_info[0];
9514
9515 t = layer->crop_top;
9516 l = layer->crop_left;
9517 b = layer->crop_bottom;
9518 r = layer->crop_right;
9519 return snprintf(buf, 40, "%d %d %d %d\n", t, l, b, r);
9520}
9521
9522static ssize_t video_crop_store(struct class *cla,
9523 struct class_attribute *attr,
9524 const char *buf, size_t count)
9525{
9526 struct disp_info_s *layer = &glayer_info[0];
9527
9528 mutex_lock(&video_module_mutex);
9529
9530 set_video_crop(layer, buf);
9531
9532 mutex_unlock(&video_module_mutex);
9533
9534 return strnlen(buf, count);
9535}
9536
9537static ssize_t video_state_show(struct class *cla,
9538 struct class_attribute *attr,
9539 char *buf)
9540{
9541 ssize_t len = 0;
9542 struct vppfilter_mode_s *vpp_filter = NULL;
9543
9544 if (!cur_frame_par)
9545 return len;
9546 vpp_filter = &cur_frame_par->vpp_filter;
9547 len += sprintf(buf + len,
9548 "zoom_start_x_lines:%u.zoom_end_x_lines:%u.\n",
9549 zoom_start_x_lines, zoom_end_x_lines);
9550 len += sprintf(buf + len,
9551 "zoom_start_y_lines:%u.zoom_end_y_lines:%u.\n",
9552 zoom_start_y_lines, zoom_end_y_lines);
9553 len += sprintf(buf + len, "frame parameters: pic_in_height %u.\n",
9554 cur_frame_par->VPP_pic_in_height_);
9555 len += sprintf(buf + len,
9556 "frame parameters: VPP_line_in_length_ %u.\n",
9557 cur_frame_par->VPP_line_in_length_);
9558 len += sprintf(buf + len, "vscale_skip_count %u.\n",
9559 cur_frame_par->vscale_skip_count);
9560 len += sprintf(buf + len, "hscale_skip_count %u.\n",
9561 cur_frame_par->hscale_skip_count);
9562 len += sprintf(buf + len, "supscl_path %u.\n",
9563 cur_frame_par->supscl_path);
9564 len += sprintf(buf + len, "supsc0_enable %u.\n",
9565 cur_frame_par->supsc0_enable);
9566 len += sprintf(buf + len, "supsc1_enable %u.\n",
9567 cur_frame_par->supsc1_enable);
9568 len += sprintf(buf + len, "supsc0_hori_ratio %u.\n",
9569 cur_frame_par->supsc0_hori_ratio);
9570 len += sprintf(buf + len, "supsc1_hori_ratio %u.\n",
9571 cur_frame_par->supsc1_hori_ratio);
9572 len += sprintf(buf + len, "supsc0_vert_ratio %u.\n",
9573 cur_frame_par->supsc0_vert_ratio);
9574 len += sprintf(buf + len, "supsc1_vert_ratio %u.\n",
9575 cur_frame_par->supsc1_vert_ratio);
9576 len += sprintf(buf + len, "spsc0_h_in %u.\n",
9577 cur_frame_par->spsc0_h_in);
9578 len += sprintf(buf + len, "spsc1_h_in %u.\n",
9579 cur_frame_par->spsc1_h_in);
9580 len += sprintf(buf + len, "spsc0_w_in %u.\n",
9581 cur_frame_par->spsc0_w_in);
9582 len += sprintf(buf + len, "spsc1_w_in %u.\n",
9583 cur_frame_par->spsc1_w_in);
9584 len += sprintf(buf + len, "video_input_w %u.\n",
9585 cur_frame_par->video_input_w);
9586 len += sprintf(buf + len, "video_input_h %u.\n",
9587 cur_frame_par->video_input_h);
9588 len += sprintf(buf + len, "clk_in_pps %u.\n",
9589 cur_frame_par->clk_in_pps);
9590#ifdef TV_3D_FUNCTION_OPEN
9591 len += sprintf(buf + len, "vpp_2pic_mode %u.\n",
9592 cur_frame_par->vpp_2pic_mode);
9593 len += sprintf(buf + len, "vpp_3d_scale %u.\n",
9594 cur_frame_par->vpp_3d_scale);
9595 len += sprintf(buf + len,
9596 "vpp_3d_mode %u.\n", cur_frame_par->vpp_3d_mode);
9597#endif
9598 len +=
9599 sprintf(buf + len, "hscale phase step 0x%x.\n",
9600 vpp_filter->vpp_hsc_start_phase_step);
9601 len +=
9602 sprintf(buf + len, "vscale phase step 0x%x.\n",
9603 vpp_filter->vpp_vsc_start_phase_step);
9604 len +=
9605 sprintf(buf + len, "pps pre hsc enable %d.\n",
9606 vpp_filter->vpp_pre_hsc_en);
9607 len +=
9608 sprintf(buf + len, "pps pre vsc enable %d.\n",
9609 vpp_filter->vpp_pre_vsc_en);
9610 len +=
9611 sprintf(buf + len, "hscale filter coef %d.\n",
9612 vpp_filter->vpp_horz_filter);
9613 len +=
9614 sprintf(buf + len, "vscale filter coef %d.\n",
9615 vpp_filter->vpp_vert_filter);
9616 len +=
9617 sprintf(buf + len, "vpp_vert_chroma_filter_en %d.\n",
9618 vpp_filter->vpp_vert_chroma_filter_en);
9619 len +=
9620 sprintf(buf + len, "post_blend_vd_h_start 0x%x.\n",
9621 cur_frame_par->VPP_post_blend_vd_h_start_);
9622 len +=
9623 sprintf(buf + len, "post_blend_vd_h_end 0x%x.\n",
9624 cur_frame_par->VPP_post_blend_vd_h_end_);
9625 len +=
9626 sprintf(buf + len, "post_blend_vd_v_start 0x%x.\n",
9627 cur_frame_par->VPP_post_blend_vd_v_start_);
9628 len +=
9629 sprintf(buf + len, "post_blend_vd_v_end 0x%x.\n",
9630 cur_frame_par->VPP_post_blend_vd_v_end_);
9631 len +=
9632 sprintf(buf + len, "VPP_hd_start_lines_ 0x%x.\n",
9633 cur_frame_par->VPP_hd_start_lines_);
9634 len +=
9635 sprintf(buf + len, "VPP_hd_end_lines_ 0x%x.\n",
9636 cur_frame_par->VPP_hd_end_lines_);
9637 len +=
9638 sprintf(buf + len, "VPP_vd_start_lines_ 0x%x.\n",
9639 cur_frame_par->VPP_vd_start_lines_);
9640 len +=
9641 sprintf(buf + len, "VPP_vd_end_lines_ 0x%x.\n",
9642 cur_frame_par->VPP_vd_end_lines_);
9643 len +=
9644 sprintf(buf + len, "VPP_hsc_startp 0x%x.\n",
9645 cur_frame_par->VPP_hsc_startp);
9646 len +=
9647 sprintf(buf + len, "VPP_hsc_endp 0x%x.\n",
9648 cur_frame_par->VPP_hsc_endp);
9649 len +=
9650 sprintf(buf + len, "VPP_vsc_startp 0x%x.\n",
9651 cur_frame_par->VPP_vsc_startp);
9652 len +=
9653 sprintf(buf + len, "VPP_vsc_endp 0x%x.\n",
9654 cur_frame_par->VPP_vsc_endp);
9655 return len;
9656}
9657
9658static ssize_t video_axis_show(struct class *cla,
9659 struct class_attribute *attr,
9660 char *buf)
9661{
9662 int x, y, w, h;
9663 struct disp_info_s *layer = &glayer_info[0];
9664
9665#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
9666 if (video_scaler_mode) {
9667 x = content_left;
9668 y = content_top;
9669 w = content_w;
9670 h = content_h;
9671 } else
9672#endif
9673 {
9674 x = layer->layer_left;
9675 y = layer->layer_top;
9676 w = layer->layer_width;
9677 h = layer->layer_height;
9678 }
9679 return snprintf(buf, 40, "%d %d %d %d\n", x, y, x + w - 1, y + h - 1);
9680}
9681
9682static ssize_t video_axis_store(struct class *cla,
9683 struct class_attribute *attr,
9684 const char *buf, size_t count)
9685{
9686 struct disp_info_s *layer = &glayer_info[0];
9687
9688 mutex_lock(&video_module_mutex);
9689
9690 set_video_window(layer, buf);
9691
9692 mutex_unlock(&video_module_mutex);
9693
9694 return strnlen(buf, count);
9695}
9696
9697static ssize_t video_global_offset_show(struct class *cla,
9698 struct class_attribute *attr, char *buf)
9699{
9700 int x, y;
9701 struct disp_info_s *layer = &glayer_info[0];
9702
9703 x = layer->global_offset_x;
9704 y = layer->global_offset_y;
9705
9706 return snprintf(buf, 40, "%d %d\n", x, y);
9707}
9708
9709static ssize_t video_global_offset_store(struct class *cla,
9710 struct class_attribute *attr,
9711 const char *buf, size_t count)
9712{
9713 int parsed[2];
9714 struct disp_info_s *layer = &glayer_info[0];
9715
9716 mutex_lock(&video_module_mutex);
9717
9718 if (likely(parse_para(buf, 2, parsed) == 2)) {
9719 layer->global_offset_x = parsed[0];
9720 layer->global_offset_y = parsed[1];
9721 video_property_changed = 1;
9722
9723 amlog_mask(LOG_MASK_SYSFS,
9724 "video_offset=>x0:%d,y0:%d\n ",
9725 parsed[0], parsed[1]);
9726 }
9727
9728 mutex_unlock(&video_module_mutex);
9729
9730 return count;
9731}
9732
9733static ssize_t video_zoom_show(struct class *cla,
9734 struct class_attribute *attr,
9735 char *buf)
9736{
9737 u32 r;
9738 struct disp_info_s *layer = &glayer_info[0];
9739
9740 r = layer->zoom_ratio;
9741
9742 return snprintf(buf, 40, "%d\n", r);
9743}
9744
9745static ssize_t video_zoom_store(struct class *cla,
9746 struct class_attribute *attr,
9747 const char *buf, size_t count)
9748{
9749 unsigned long r;
9750 int ret = 0;
9751 struct disp_info_s *layer = &glayer_info[0];
9752
9753 ret = kstrtoul(buf, 0, (unsigned long *)&r);
9754 if (ret < 0)
9755 return -EINVAL;
9756
9757 if ((r <= MAX_ZOOM_RATIO) && (r != layer->zoom_ratio)) {
9758 layer->zoom_ratio = r;
9759 video_property_changed = 1;
9760 }
9761
9762 return count;
9763}
9764
9765static ssize_t video_screen_mode_show(struct class *cla,
9766 struct class_attribute *attr, char *buf)
9767{
9768 struct disp_info_s *layer = &glayer_info[0];
9769 static const char * const wide_str[] = {
9770 "normal", "full stretch", "4-3", "16-9", "non-linear",
9771 "normal-noscaleup",
9772 "4-3 ignore", "4-3 letter box", "4-3 pan scan", "4-3 combined",
9773 "16-9 ignore", "16-9 letter box", "16-9 pan scan",
9774 "16-9 combined", "Custom AR", "AFD"
9775 };
9776
9777 if (layer->wide_mode < ARRAY_SIZE(wide_str)) {
9778 return sprintf(buf, "%d:%s\n",
9779 layer->wide_mode,
9780 wide_str[layer->wide_mode]);
9781 } else
9782 return 0;
9783}
9784
9785static ssize_t video_screen_mode_store(struct class *cla,
9786 struct class_attribute *attr,
9787 const char *buf, size_t count)
9788{
9789 unsigned long mode;
9790 int ret = 0;
9791 struct disp_info_s *layer = &glayer_info[0];
9792
9793 ret = kstrtoul(buf, 0, (unsigned long *)&mode);
9794 if (ret < 0)
9795 return -EINVAL;
9796
9797 if ((mode < VIDEO_WIDEOPTION_MAX)
9798 && (mode != layer->wide_mode)) {
9799 layer->wide_mode = mode;
9800 video_property_changed = 1;
9801 }
9802
9803 return count;
9804}
9805
9806static ssize_t video_blackout_policy_show(struct class *cla,
9807 struct class_attribute *attr,
9808 char *buf)
9809{
9810 return sprintf(buf, "%d\n", blackout);
9811}
9812
9813static ssize_t video_blackout_policy_store(struct class *cla,
9814 struct class_attribute *attr,
9815 const char *buf, size_t count)
9816{
9817 int r;
9818
9819 r = kstrtoint(buf, 0, &blackout);
9820 if (r < 0)
9821 return -EINVAL;
9822
9823 if (debug_flag & DEBUG_FLAG_BLACKOUT)
9824 pr_info("%s(%d)\n", __func__, blackout);
9825
9826 return count;
9827}
9828
9829static ssize_t video_seek_flag_show(struct class *cla,
9830 struct class_attribute *attr,
9831 char *buf)
9832{
9833 return sprintf(buf, "%d\n", video_seek_flag);
9834}
9835
9836static ssize_t video_seek_flag_store(struct class *cla,
9837 struct class_attribute *attr,
9838 const char *buf, size_t count)
9839{
9840 int r;
9841
9842 r = kstrtoint(buf, 0, &video_seek_flag);
9843 if (r < 0)
9844 return -EINVAL;
9845
9846 return count;
9847}
9848
9849#ifdef PTS_TRACE_DEBUG
9850static ssize_t pts_trace_show(struct class *cla,
9851 struct class_attribute *attr, char *buf)
9852{
9853 return sprintf(buf, "%d %d %d %d %d %d %d %d\n"
9854 "%d %d %d %d %d %d %d %d\n"
9855 "%0x %0x %0x %0x %0x %0x %0x %0x\n"
9856 "%0x %0x %0x %0x %0x %0x %0x %0x\n"
9857 "%0x %0x %0x %0x %0x %0x %0x %0x\n"
9858 "%0x %0x %0x %0x %0x %0x %0x %0x\n",
9859 pts_trace_his[0], pts_trace_his[1], pts_trace_his[2],
9860 pts_trace_his[3], pts_trace_his[4], pts_trace_his[5],
9861 pts_trace_his[6], pts_trace_his[7], pts_trace_his[8],
9862 pts_trace_his[9], pts_trace_his[10], pts_trace_his[11],
9863 pts_trace_his[12], pts_trace_his[13], pts_trace_his[14],
9864 pts_trace_his[15],
9865 pts_his[0], pts_his[1], pts_his[2], pts_his[3],
9866 pts_his[4], pts_his[5], pts_his[6], pts_his[7],
9867 pts_his[8], pts_his[9], pts_his[10], pts_his[11],
9868 pts_his[12], pts_his[13], pts_his[14], pts_his[15],
9869 scr_his[0], scr_his[1], scr_his[2], scr_his[3],
9870 scr_his[4], scr_his[5], scr_his[6], scr_his[7],
9871 scr_his[8], scr_his[9], scr_his[10], scr_his[11],
9872 scr_his[12], scr_his[13], scr_his[14], scr_his[15]);
9873}
9874#endif
9875
9876static ssize_t video_brightness_show(struct class *cla,
9877 struct class_attribute *attr, char *buf)
9878{
9879 s32 val = (READ_VCBUS_REG(VPP_VADJ1_Y + cur_dev->vpp_off) >> 8) &
9880 0x1ff;
9881
9882 val = (val << 23) >> 23;
9883
9884 return sprintf(buf, "%d\n", val);
9885}
9886
9887static ssize_t video_brightness_store(struct class *cla,
9888 struct class_attribute *attr,
9889 const char *buf, size_t count)
9890{
9891 int r;
9892 int val;
9893
9894 r = kstrtoint(buf, 0, &val);
9895 if ((r < 0) || (val < -255) || (val > 255))
9896 return -EINVAL;
9897
9898 if (get_cpu_type() <= MESON_CPU_MAJOR_ID_GXTVBB)
9899 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y +
9900 cur_dev->vpp_off, val, 8, 9);
9901 else
9902 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y +
9903 cur_dev->vpp_off, val << 1, 8, 10);
9904
9905 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ1_EN);
9906
9907 return count;
9908}
9909
9910static ssize_t video_contrast_show(struct class *cla,
9911 struct class_attribute *attr, char *buf)
9912{
9913 return sprintf(buf, "%d\n",
9914 (int)(READ_VCBUS_REG(VPP_VADJ1_Y + cur_dev->vpp_off) &
9915 0xff) - 0x80);
9916}
9917
9918static ssize_t video_contrast_store(struct class *cla,
9919 struct class_attribute *attr,
9920 const char *buf, size_t count)
9921{
9922 int r;
9923 int val;
9924
9925 r = kstrtoint(buf, 0, &val);
9926 if ((r < 0) || (val < -127) || (val > 127))
9927 return -EINVAL;
9928
9929 val += 0x80;
9930
9931 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y + cur_dev->vpp_off, val, 0, 8);
9932 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ1_EN);
9933
9934 return count;
9935}
9936
9937static ssize_t vpp_brightness_show(struct class *cla,
9938 struct class_attribute *attr, char *buf)
9939{
9940 s32 val = (READ_VCBUS_REG(VPP_VADJ2_Y +
9941 cur_dev->vpp_off) >> 8) & 0x1ff;
9942
9943 val = (val << 23) >> 23;
9944
9945 return sprintf(buf, "%d\n", val);
9946}
9947
9948static ssize_t vpp_brightness_store(struct class *cla,
9949 struct class_attribute *attr,
9950 const char *buf, size_t count)
9951{
9952 int r;
9953 int val;
9954
9955 r = kstrtoint(buf, 0, &val);
9956 if ((r < 0) || (val < -255) || (val > 255))
9957 return -EINVAL;
9958
9959 if (get_cpu_type() <= MESON_CPU_MAJOR_ID_GXTVBB)
9960 WRITE_VCBUS_REG_BITS(VPP_VADJ2_Y +
9961 cur_dev->vpp_off, val, 8, 9);
9962 else
9963 WRITE_VCBUS_REG_BITS(VPP_VADJ2_Y +
9964 cur_dev->vpp_off, val << 1, 8, 10);
9965
9966 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ2_EN);
9967
9968 return count;
9969}
9970
9971static ssize_t vpp_contrast_show(struct class *cla,
9972 struct class_attribute *attr, char *buf)
9973{
9974 return sprintf(buf, "%d\n",
9975 (int)(READ_VCBUS_REG(VPP_VADJ2_Y + cur_dev->vpp_off) &
9976 0xff) - 0x80);
9977}
9978
9979static ssize_t vpp_contrast_store(struct class *cla,
9980 struct class_attribute *attr, const char *buf,
9981 size_t count)
9982{
9983 int r;
9984 int val;
9985
9986 r = kstrtoint(buf, 0, &val);
9987 if ((r < 0) || (val < -127) || (val > 127))
9988 return -EINVAL;
9989
9990 val += 0x80;
9991
9992 WRITE_VCBUS_REG_BITS(VPP_VADJ2_Y + cur_dev->vpp_off, val, 0, 8);
9993 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ2_EN);
9994
9995 return count;
9996}
9997
9998static ssize_t video_saturation_show(struct class *cla,
9999 struct class_attribute *attr, char *buf)
10000{
10001 return sprintf(buf, "%d\n",
10002 READ_VCBUS_REG(VPP_VADJ1_Y + cur_dev->vpp_off) & 0xff);
10003}
10004
10005static ssize_t video_saturation_store(struct class *cla,
10006 struct class_attribute *attr,
10007 const char *buf, size_t count)
10008{
10009 int r;
10010 int val;
10011
10012 r = kstrtoint(buf, 0, &val);
10013 if ((r < 0) || (val < -127) || (val > 127))
10014 return -EINVAL;
10015
10016 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y + cur_dev->vpp_off, val, 0, 8);
10017 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ1_EN);
10018
10019 return count;
10020}
10021
10022static ssize_t vpp_saturation_hue_show(struct class *cla,
10023 struct class_attribute *attr, char *buf)
10024{
10025 return sprintf(buf, "0x%x\n", READ_VCBUS_REG(VPP_VADJ2_MA_MB));
10026}
10027
10028static ssize_t vpp_saturation_hue_store(struct class *cla,
10029 struct class_attribute *attr,
10030 const char *buf, size_t count)
10031{
10032 int r;
10033 s32 mab = 0;
10034 s16 mc = 0, md = 0;
10035
10036 r = kstrtoint(buf, 0, &mab);
10037 if ((r < 0) || (mab & 0xfc00fc00))
10038 return -EINVAL;
10039
10040 WRITE_VCBUS_REG(VPP_VADJ2_MA_MB, mab);
10041 mc = (s16) ((mab << 22) >> 22); /* mc = -mb */
10042 mc = 0 - mc;
10043 if (mc > 511)
10044 mc = 511;
10045 if (mc < -512)
10046 mc = -512;
10047 md = (s16) ((mab << 6) >> 22); /* md = ma; */
10048 mab = ((mc & 0x3ff) << 16) | (md & 0x3ff);
10049 WRITE_VCBUS_REG(VPP_VADJ2_MC_MD, mab);
10050 /* WRITE_MPEG_REG(VPP_VADJ_CTRL, 1); */
10051 WRITE_VCBUS_REG_BITS(VPP_VADJ_CTRL + cur_dev->vpp_off, 1, 2, 1);
10052#ifdef PQ_DEBUG_EN
10053 pr_info("\n[amvideo..] set vpp_saturation OK!!!\n");
10054#endif
10055 return count;
10056}
10057
10058/* [ 24] 1/enable, 0/disable */
10059/* [23:16] Y */
10060/* [15: 8] Cb */
10061/* [ 7: 0] Cr */
10062static ssize_t video_test_screen_show(struct class *cla,
10063 struct class_attribute *attr, char *buf)
10064{
10065 return sprintf(buf, "0x%x\n", test_screen);
10066}
10067static ssize_t video_rgb_screen_show(struct class *cla,
10068 struct class_attribute *attr, char *buf)
10069{
10070 return sprintf(buf, "0x%x\n", rgb_screen);
10071}
10072
10073#define SCALE 6
10074
10075static short R_Cr[] = { -11484, -11394, -11305, -11215, -11125,
10076-11036, -10946, -10856, -10766, -10677, -10587, -10497, -10407,
10077-10318, -10228, -10138, -10049, -9959, -9869, -9779, -9690, -9600,
10078-9510, -9420, -9331, -9241, -9151, -9062, -8972, -8882, -8792, -8703,
10079-8613, -8523, -8433, -8344, -8254, -8164, -8075, -7985, -7895, -7805,
10080-7716, -7626, -7536, -7446, -7357, -7267, -7177, -7088, -6998, -6908,
10081-6818, -6729, -6639, -6549, -6459, -6370, -6280, -6190, -6101, -6011,
10082-5921, -5831, -5742, -5652, -5562, -5472, -5383, -5293, -5203, -5113,
10083-5024, -4934, -4844, -4755, -4665, -4575, -4485, -4396, -4306, -4216,
10084-4126, -4037, -3947, -3857, -3768, -3678, -3588, -3498, -3409, -3319,
10085-3229, -3139, -3050, -2960, -2870, -2781, -2691, -2601, -2511, -2422,
10086-2332, -2242, -2152, -2063, -1973, -1883, -1794, -1704, -1614, -1524,
10087-1435, -1345, -1255, -1165, -1076, -986, -896, -807, -717, -627, -537,
10088-448, -358, -268, -178, -89, 0, 90, 179, 269, 359, 449, 538, 628, 718,
10089808, 897, 987, 1077, 1166, 1256, 1346, 1436, 1525, 1615, 1705, 1795,
100901884, 1974, 2064, 2153, 2243, 2333, 2423, 2512, 2602, 2692, 2782,
100912871, 2961, 3051, 3140, 3230, 3320, 3410, 3499, 3589, 3679, 3769,
100923858, 3948, 4038, 4127, 4217, 4307, 4397, 4486, 4576, 4666, 4756,
100934845, 4935, 5025, 5114, 5204, 5294, 5384, 5473, 5563, 5653, 5743,
100945832, 5922, 6012, 6102, 6191, 6281, 6371, 6460, 6550, 6640, 6730,
100956819, 6909, 6999, 7089, 7178, 7268, 7358, 7447, 7537, 7627, 7717,
100967806, 7896, 7986, 8076, 8165, 8255, 8345, 8434, 8524, 8614, 8704,
100978793, 8883, 8973, 9063, 9152, 9242, 9332, 9421, 9511, 9601, 9691,
100989780, 9870, 9960, 10050, 10139, 10229, 10319, 10408, 10498, 10588,
1009910678, 10767, 10857, 10947, 11037, 11126, 11216, 11306, 11395 };
10100
10101static short G_Cb[] = { 2819, 2797, 2775, 2753, 2731, 2709, 2687,
101022665, 2643, 2621, 2599, 2577, 2555, 2533, 2511, 2489, 2467, 2445,
101032423, 2401, 2379, 2357, 2335, 2313, 2291, 2269, 2247, 2225, 2202,
101042180, 2158, 2136, 2114, 2092, 2070, 2048, 2026, 2004, 1982, 1960,
101051938, 1916, 1894, 1872, 1850, 1828, 1806, 1784, 1762, 1740, 1718,
101061696, 1674, 1652, 1630, 1608, 1586, 1564, 1542, 1520, 1498, 1476,
101071454, 1432, 1410, 1388, 1366, 1344, 1321, 1299, 1277, 1255, 1233,
101081211, 1189, 1167, 1145, 1123, 1101, 1079, 1057, 1035, 1013, 991, 969,
10109947, 925, 903, 881, 859, 837, 815, 793, 771, 749, 727, 705, 683, 661,
10110639, 617, 595, 573, 551, 529, 507, 485, 463, 440, 418, 396, 374, 352,
10111330, 308, 286, 264, 242, 220, 198, 176, 154, 132, 110, 88, 66, 44, 22,
101120, -21, -43, -65, -87, -109, -131, -153, -175, -197, -219, -241, -263,
10113-285, -307, -329, -351, -373, -395, -417, -439, -462, -484, -506,
10114-528, -550, -572, -594, -616, -638, -660, -682, -704, -726, -748,
10115-770, -792, -814, -836, -858, -880, -902, -924, -946, -968, -990,
10116-1012, -1034, -1056, -1078, -1100, -1122, -1144, -1166, -1188, -1210,
10117-1232, -1254, -1276, -1298, -1320, -1343, -1365, -1387, -1409, -1431,
10118-1453, -1475, -1497, -1519, -1541, -1563, -1585, -1607, -1629, -1651,
10119-1673, -1695, -1717, -1739, -1761, -1783, -1805, -1827, -1849, -1871,
10120-1893, -1915, -1937, -1959, -1981, -2003, -2025, -2047, -2069, -2091,
10121-2113, -2135, -2157, -2179, -2201, -2224, -2246, -2268, -2290, -2312,
10122-2334, -2356, -2378, -2400, -2422, -2444, -2466, -2488, -2510, -2532,
10123-2554, -2576, -2598, -2620, -2642, -2664, -2686, -2708, -2730, -2752,
10124-2774, -2796 };
10125
10126static short G_Cr[] = { 5850, 5805, 5759, 5713, 5667, 5622, 5576,
101275530, 5485, 5439, 5393, 5347, 5302, 5256, 5210, 5165, 5119, 5073,
101285028, 4982, 4936, 4890, 4845, 4799, 4753, 4708, 4662, 4616, 4570,
101294525, 4479, 4433, 4388, 4342, 4296, 4251, 4205, 4159, 4113, 4068,
101304022, 3976, 3931, 3885, 3839, 3794, 3748, 3702, 3656, 3611, 3565,
101313519, 3474, 3428, 3382, 3336, 3291, 3245, 3199, 3154, 3108, 3062,
101323017, 2971, 2925, 2879, 2834, 2788, 2742, 2697, 2651, 2605, 2559,
101332514, 2468, 2422, 2377, 2331, 2285, 2240, 2194, 2148, 2102, 2057,
101342011, 1965, 1920, 1874, 1828, 1782, 1737, 1691, 1645, 1600, 1554,
101351508, 1463, 1417, 1371, 1325, 1280, 1234, 1188, 1143, 1097, 1051,
101361006, 960, 914, 868, 823, 777, 731, 686, 640, 594, 548, 503, 457, 411,
10137366, 320, 274, 229, 183, 137, 91, 46, 0, -45, -90, -136, -182, -228,
10138-273, -319, -365, -410, -456, -502, -547, -593, -639, -685, -730,
10139-776, -822, -867, -913, -959, -1005, -1050, -1096, -1142, -1187,
10140-1233, -1279, -1324, -1370, -1416, -1462, -1507, -1553, -1599, -1644,
10141-1690, -1736, -1781, -1827, -1873, -1919, -1964, -2010, -2056, -2101,
10142-2147, -2193, -2239, -2284, -2330, -2376, -2421, -2467, -2513, -2558,
10143-2604, -2650, -2696, -2741, -2787, -2833, -2878, -2924, -2970, -3016,
10144-3061, -3107, -3153, -3198, -3244, -3290, -3335, -3381, -3427, -3473,
10145-3518, -3564, -3610, -3655, -3701, -3747, -3793, -3838, -3884, -3930,
10146-3975, -4021, -4067, -4112, -4158, -4204, -4250, -4295, -4341, -4387,
10147-4432, -4478, -4524, -4569, -4615, -4661, -4707, -4752, -4798, -4844,
10148-4889, -4935, -4981, -5027, -5072, -5118, -5164, -5209, -5255, -5301,
10149-5346, -5392, -5438, -5484, -5529, -5575, -5621, -5666, -5712, -5758,
10150-5804 };
10151
10152static short B_Cb[] = { -14515, -14402, -14288, -14175, -14062,
10153-13948, -13835, -13721, -13608, -13495, -13381, -13268, -13154,
10154-13041, -12928, -12814, -12701, -12587, -12474, -12360, -12247,
10155-12134, -12020, -11907, -11793, -11680, -11567, -11453, -11340,
10156-11226, -11113, -11000, -10886, -10773, -10659, -10546, -10433,
10157-10319, -10206, -10092, -9979, -9865, -9752, -9639, -9525, -9412,
10158-9298, -9185, -9072, -8958, -8845, -8731, -8618, -8505, -8391, -8278,
10159-8164, -8051, -7938, -7824, -7711, -7597, -7484, -7371, -7257, -7144,
10160-7030, -6917, -6803, -6690, -6577, -6463, -6350, -6236, -6123, -6010,
10161-5896, -5783, -5669, -5556, -5443, -5329, -5216, -5102, -4989, -4876,
10162-4762, -4649, -4535, -4422, -4309, -4195, -4082, -3968, -3855, -3741,
10163-3628, -3515, -3401, -3288, -3174, -3061, -2948, -2834, -2721, -2607,
10164-2494, -2381, -2267, -2154, -2040, -1927, -1814, -1700, -1587, -1473,
10165-1360, -1246, -1133, -1020, -906, -793, -679, -566, -453, -339, -226,
10166-112, 0, 113, 227, 340, 454, 567, 680, 794, 907, 1021, 1134, 1247,
101671361, 1474, 1588, 1701, 1815, 1928, 2041, 2155, 2268, 2382, 2495,
101682608, 2722, 2835, 2949, 3062, 3175, 3289, 3402, 3516, 3629, 3742,
101693856, 3969, 4083, 4196, 4310, 4423, 4536, 4650, 4763, 4877, 4990,
101705103, 5217, 5330, 5444, 5557, 5670, 5784, 5897, 6011, 6124, 6237,
101716351, 6464, 6578, 6691, 6804, 6918, 7031, 7145, 7258, 7372, 7485,
101727598, 7712, 7825, 7939, 8052, 8165, 8279, 8392, 8506, 8619, 8732,
101738846, 8959, 9073, 9186, 9299, 9413, 9526, 9640, 9753, 9866, 9980,
1017410093, 10207, 10320, 10434, 10547, 10660, 10774, 10887, 11001, 11114,
1017511227, 11341, 11454, 11568, 11681, 11794, 11908, 12021, 12135, 12248,
1017612361, 12475, 12588, 12702, 12815, 12929, 13042, 13155, 13269, 13382,
1017713496, 13609, 13722, 13836, 13949, 14063, 14176, 14289, 14403
10178};
10179
10180static u32 yuv2rgb(u32 yuv)
10181{
10182 int y = (yuv >> 16) & 0xff;
10183 int cb = (yuv >> 8) & 0xff;
10184 int cr = yuv & 0xff;
10185 int r, g, b;
10186
10187 r = y + ((R_Cr[cr]) >> SCALE);
10188 g = y + ((G_Cb[cb] + G_Cr[cr]) >> SCALE);
10189 b = y + ((B_Cb[cb]) >> SCALE);
10190
10191 r = r - 16;
10192 if (r < 0)
10193 r = 0;
10194 r = r*1164/1000;
10195 g = g - 16;
10196 if (g < 0)
10197 g = 0;
10198 g = g*1164/1000;
10199 b = b - 16;
10200 if (b < 0)
10201 b = 0;
10202 b = b*1164/1000;
10203
10204 r = (r <= 0) ? 0 : (r >= 255) ? 255 : r;
10205 g = (g <= 0) ? 0 : (g >= 255) ? 255 : g;
10206 b = (b <= 0) ? 0 : (b >= 255) ? 255 : b;
10207
10208 return (r << 16) | (g << 8) | b;
10209}
10210/* 8bit convert to 10bit */
10211static u32 eight2ten(u32 yuv)
10212{
10213 int y = (yuv >> 16) & 0xff;
10214 int cb = (yuv >> 8) & 0xff;
10215 int cr = yuv & 0xff;
10216 u32 data32;
10217
10218 /* txlx need check vd1 path bit width by s2u registers */
10219 if (get_cpu_type() == MESON_CPU_MAJOR_ID_TXLX) {
10220 data32 = READ_VCBUS_REG(0x1d94) & 0xffff;
10221 if ((data32 == 0x2000) ||
10222 (data32 == 0x800))
10223 return ((y << 20)<<2) | ((cb << 10)<<2) | (cr<<2);
10224 else
10225 return (y << 20) | (cb << 10) | cr;
10226 } else
10227 return (y << 20) | (cb << 10) | cr;
10228}
10229
10230static u32 rgb2yuv(u32 rgb)
10231{
10232 int r = (rgb >> 16) & 0xff;
10233 int g = (rgb >> 8) & 0xff;
10234 int b = rgb & 0xff;
10235 int y, u, v;
10236
10237 y = ((47*r + 157*g + 16*b + 128) >> 8) + 16;
10238 u = ((-26*r - 87*g + 112*b + 128) >> 8) + 128;
10239 v = ((112*r - 102*g - 10*b + 128) >> 8) + 128;
10240
10241 return (y << 16) | (u << 8) | v;
10242}
10243
10244static ssize_t video_test_screen_store(struct class *cla,
10245 struct class_attribute *attr,
10246 const char *buf, size_t count)
10247{
10248 int r;
10249 unsigned int data = 0x0;
10250
10251 r = kstrtoint(buf, 0, &test_screen);
10252 if (r < 0)
10253 return -EINVAL;
10254#if 0/*no use now*/
10255 /* vdin0 pre post blend enable or disabled */
10256 data = READ_VCBUS_REG(VPP_MISC);
10257 if (test_screen & 0x01000000)
10258 data |= VPP_VD1_PREBLEND;
10259 else
10260 data &= (~VPP_VD1_PREBLEND);
10261
10262 if (test_screen & 0x02000000)
10263 data |= VPP_VD1_POSTBLEND;
10264 else
10265 data &= (~VPP_VD1_POSTBLEND);
10266#endif
10267
10268#if DEBUG_TMP
10269 if (test_screen & 0x04000000)
10270 data |= VPP_VD2_PREBLEND;
10271 else
10272 data &= (~VPP_VD2_PREBLEND);
10273
10274 if (test_screen & 0x08000000)
10275 data |= VPP_VD2_POSTBLEND;
10276 else
10277 data &= (~VPP_VD2_POSTBLEND);
10278#endif
10279
10280 /* show test screen YUV blend*/
10281 if (!legacy_vpp)
10282 WRITE_VCBUS_REG(
10283 VPP_POST_BLEND_BLEND_DUMMY_DATA,
10284 test_screen & 0x00ffffff);
10285 else if (is_meson_gxm_cpu() ||
10286 (get_cpu_type() == MESON_CPU_MAJOR_ID_TXLX))
10287 /* bit width change to 10bit in gxm, 10/12 in txlx*/
10288 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10289 eight2ten(test_screen & 0x00ffffff));
10290 else if (get_cpu_type() == MESON_CPU_MAJOR_ID_GXTVBB)
10291 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10292 yuv2rgb(test_screen & 0x00ffffff));
10293 else if (get_cpu_type() < MESON_CPU_MAJOR_ID_GXTVBB)
10294 if (READ_VCBUS_REG(VIU_OSD1_BLK0_CFG_W0) & 0x80)
10295 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10296 test_screen & 0x00ffffff);
10297 else /* RGB blend */
10298 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10299 yuv2rgb(test_screen & 0x00ffffff));
10300 else
10301 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10302 test_screen & 0x00ffffff);
10303#if 0/*no use*/
10304 WRITE_VCBUS_REG(VPP_MISC, data);
10305#endif
10306 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
10307 pr_info("%s write(VPP_MISC,%x) write(VPP_DUMMY_DATA1, %x)\n",
10308 __func__, data, test_screen & 0x00ffffff);
10309 }
10310 return count;
10311}
10312
10313static ssize_t video_rgb_screen_store(struct class *cla,
10314 struct class_attribute *attr,
10315 const char *buf, size_t count)
10316{
10317 int r;
10318 u32 yuv_eight;
10319
10320 /* unsigned data = 0x0; */
10321 r = kstrtoint(buf, 0, &rgb_screen);
10322 if (r < 0)
10323 return -EINVAL;
10324
10325#if DEBUG_TMP
10326 /* vdin0 pre post blend enable or disabled */
10327
10328 data = READ_VCBUS_REG(VPP_MISC);
10329 if (rgb_screen & 0x01000000)
10330 data |= VPP_VD1_PREBLEND;
10331 else
10332 data &= (~VPP_VD1_PREBLEND);
10333
10334 if (rgb_screen & 0x02000000)
10335 data |= VPP_VD1_POSTBLEND;
10336 else
10337 data &= (~VPP_VD1_POSTBLEND);
10338
10339 if (test_screen & 0x04000000)
10340 data |= VPP_VD2_PREBLEND;
10341 else
10342 data &= (~VPP_VD2_PREBLEND);
10343
10344 if (test_screen & 0x08000000)
10345 data |= VPP_VD2_POSTBLEND;
10346 else
10347 data &= (~VPP_VD2_POSTBLEND);
10348#endif
10349 /* show test screen YUV blend*/
10350 yuv_eight = rgb2yuv(rgb_screen & 0x00ffffff);
10351 if (!legacy_vpp) {
10352 WRITE_VCBUS_REG(
10353 VPP_POST_BLEND_BLEND_DUMMY_DATA,
10354 yuv_eight & 0x00ffffff);
10355 } else if (is_meson_gxtvbb_cpu()) {
10356 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10357 rgb_screen & 0x00ffffff);
10358 } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL)) {
10359 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10360 eight2ten(yuv_eight & 0x00ffffff));
10361 }
10362 /* WRITE_VCBUS_REG(VPP_MISC, data); */
10363
10364 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
10365 pr_info("%s write(VPP_DUMMY_DATA1, %x)\n",
10366 __func__, rgb_screen & 0x00ffffff);
10367 }
10368 return count;
10369}
10370
10371
10372
10373static ssize_t video_nonlinear_factor_show(struct class *cla,
10374 struct class_attribute *attr,
10375 char *buf)
10376{
10377 u32 factor;
10378 struct disp_info_s *layer = &glayer_info[0];
10379
10380 factor = vpp_get_nonlinear_factor(layer);
10381
10382 return sprintf(buf, "%d\n", factor);
10383}
10384
10385static ssize_t video_nonlinear_factor_store(struct class *cla,
10386 struct class_attribute *attr,
10387 const char *buf, size_t count)
10388{
10389 int r;
10390 u32 factor;
10391 struct disp_info_s *layer = &glayer_info[0];
10392
10393 r = kstrtoint(buf, 0, &factor);
10394 if (r < 0)
10395 return -EINVAL;
10396
10397 if (vpp_set_nonlinear_factor(layer, factor) == 0)
10398 video_property_changed = 1;
10399
10400 return count;
10401}
10402
10403static ssize_t video_disable_show(struct class *cla,
10404 struct class_attribute *attr, char *buf)
10405{
10406 return sprintf(buf, "%d\n", disable_video);
10407}
10408
10409static ssize_t video_disable_store(struct class *cla,
10410 struct class_attribute *attr,
10411 const char *buf, size_t count)
10412{
10413 int r;
10414 int val;
10415
10416 if (debug_flag & DEBUG_FLAG_BLACKOUT)
10417 pr_info("%s(%s)\n", __func__, buf);
10418
10419 r = kstrtoint(buf, 0, &val);
10420 if (r < 0)
10421 return -EINVAL;
10422
10423 if (_video_set_disable(val) < 0)
10424 return -EINVAL;
10425
10426 return count;
10427}
10428
10429static ssize_t video_global_output_show(struct class *cla,
10430 struct class_attribute *attr, char *buf)
10431{
10432 return sprintf(buf, "%d\n", video_global_output);
10433}
10434
10435static ssize_t video_global_output_store(struct class *cla,
10436 struct class_attribute *attr,
10437 const char *buf, size_t count)
10438{
10439 int r;
10440
10441 r = kstrtoint(buf, 0, &video_global_output);
10442 if (r < 0)
10443 return -EINVAL;
10444
10445 pr_info("%s(%d)\n", __func__, video_global_output);
10446
10447 return count;
10448}
10449
10450static ssize_t video_hold_show(struct class *cla,
10451 struct class_attribute *attr, char *buf)
10452{
10453 return sprintf(buf, "%d\n", hold_video);
10454}
10455
10456static ssize_t video_hold_store(struct class *cla,
10457 struct class_attribute *attr,
10458 const char *buf, size_t count)
10459{
10460 int r;
10461
10462 if (debug_flag & DEBUG_FLAG_BLACKOUT)
10463 pr_info("%s(%s)\n", __func__, buf);
10464
10465 r = kstrtoint(buf, 0, &hold_video);
10466 if (r < 0)
10467 return -EINVAL;
10468
10469 return count;
10470}
10471
10472static ssize_t video_freerun_mode_show(struct class *cla,
10473 struct class_attribute *attr, char *buf)
10474{
10475 return sprintf(buf, "%d\n", freerun_mode);
10476}
10477
10478static ssize_t video_freerun_mode_store(struct class *cla,
10479 struct class_attribute *attr,
10480 const char *buf, size_t count)
10481{
10482 int r;
10483
10484 r = kstrtoint(buf, 0, &freerun_mode);
10485 if (r < 0)
10486 return -EINVAL;
10487
10488 if (debug_flag)
10489 pr_info("%s(%d)\n", __func__, freerun_mode);
10490
10491 return count;
10492}
10493
10494static ssize_t video_speed_check_show(struct class *cla,
10495 struct class_attribute *attr, char *buf)
10496{
10497 u32 h, w;
10498 struct disp_info_s *layer = &glayer_info[0];
10499
10500 h = layer->speed_check_height;
10501 w = layer->speed_check_width;
10502
10503 return snprintf(buf, 40, "%d %d\n", h, w);
10504}
10505
10506static ssize_t video_speed_check_store(struct class *cla,
10507 struct class_attribute *attr,
10508 const char *buf, size_t count)
10509{
10510 set_video_speed_check(buf);
10511 return strnlen(buf, count);
10512}
10513
10514static ssize_t threedim_mode_store(struct class *cla,
10515 struct class_attribute *attr,
10516 const char *buf, size_t len)
10517{
10518#ifdef TV_3D_FUNCTION_OPEN
10519
10520 u32 type;
10521 int r;
10522
10523 r = kstrtoint(buf, 0, &type);
10524 if (r < 0)
10525 return -EINVAL;
10526
10527 if (type != process_3d_type) {
10528 process_3d_type = type;
10529 if (mvc_flag)
10530 process_3d_type |= MODE_3D_MVC;
10531 video_property_changed = 1;
10532 if ((process_3d_type & MODE_3D_FA)
10533 && cur_dispbuf && !cur_dispbuf->trans_fmt)
10534 /*notify di 3d mode is frame alternative mode,1*/
10535 /*passing two buffer in one frame */
10536 vf_notify_receiver_by_name("deinterlace",
10537 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE,
10538 (void *)1);
10539 else
10540 vf_notify_receiver_by_name("deinterlace",
10541 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE,
10542 (void *)0);
10543 }
10544#endif
10545 return len;
10546}
10547
10548static ssize_t threedim_mode_show(struct class *cla,
10549 struct class_attribute *attr, char *buf)
10550{
10551#ifdef TV_3D_FUNCTION_OPEN
10552 return sprintf(buf, "process type 0x%x,trans fmt %u.\n",
10553 process_3d_type, video_3d_format);
10554#else
10555 return 0;
10556#endif
10557}
10558
10559static ssize_t frame_addr_show(struct class *cla, struct class_attribute *attr,
10560 char *buf)
10561{
10562 struct canvas_s canvas;
10563 u32 addr[3];
10564
10565 if (cur_dispbuf) {
10566 canvas_read(cur_dispbuf->canvas0Addr & 0xff, &canvas);
10567 addr[0] = canvas.addr;
10568 canvas_read((cur_dispbuf->canvas0Addr >> 8) & 0xff, &canvas);
10569 addr[1] = canvas.addr;
10570 canvas_read((cur_dispbuf->canvas0Addr >> 16) & 0xff, &canvas);
10571 addr[2] = canvas.addr;
10572
10573 return sprintf(buf, "0x%x-0x%x-0x%x\n", addr[0], addr[1],
10574 addr[2]);
10575 }
10576
10577 return sprintf(buf, "NA\n");
10578}
10579
10580static ssize_t frame_canvas_width_show(struct class *cla,
10581 struct class_attribute *attr, char *buf)
10582{
10583 struct canvas_s canvas;
10584 u32 width[3];
10585
10586 if (cur_dispbuf) {
10587 canvas_read(cur_dispbuf->canvas0Addr & 0xff, &canvas);
10588 width[0] = canvas.width;
10589 canvas_read((cur_dispbuf->canvas0Addr >> 8) & 0xff, &canvas);
10590 width[1] = canvas.width;
10591 canvas_read((cur_dispbuf->canvas0Addr >> 16) & 0xff, &canvas);
10592 width[2] = canvas.width;
10593
10594 return sprintf(buf, "%d-%d-%d\n",
10595 width[0], width[1], width[2]);
10596 }
10597
10598 return sprintf(buf, "NA\n");
10599}
10600
10601static ssize_t frame_canvas_height_show(struct class *cla,
10602 struct class_attribute *attr, char *buf)
10603{
10604 struct canvas_s canvas;
10605 u32 height[3];
10606
10607 if (cur_dispbuf) {
10608 canvas_read(cur_dispbuf->canvas0Addr & 0xff, &canvas);
10609 height[0] = canvas.height;
10610 canvas_read((cur_dispbuf->canvas0Addr >> 8) & 0xff, &canvas);
10611 height[1] = canvas.height;
10612 canvas_read((cur_dispbuf->canvas0Addr >> 16) & 0xff, &canvas);
10613 height[2] = canvas.height;
10614
10615 return sprintf(buf, "%d-%d-%d\n", height[0], height[1],
10616 height[2]);
10617 }
10618
10619 return sprintf(buf, "NA\n");
10620}
10621
10622static ssize_t frame_width_show(struct class *cla,
10623 struct class_attribute *attr,
10624 char *buf)
10625{
10626 if (cur_dispbuf) {
10627 if (cur_dispbuf->type & VIDTYPE_COMPRESS)
10628 return sprintf(buf, "%d\n", cur_dispbuf->compWidth);
10629 else
10630 return sprintf(buf, "%d\n", cur_dispbuf->width);
10631 }
10632
10633 return sprintf(buf, "NA\n");
10634}
10635
10636static ssize_t frame_height_show(struct class *cla,
10637 struct class_attribute *attr, char *buf)
10638{
10639 if (cur_dispbuf) {
10640 if (cur_dispbuf->type & VIDTYPE_COMPRESS)
10641 return sprintf(buf, "%d\n", cur_dispbuf->compHeight);
10642 else
10643 return sprintf(buf, "%d\n", cur_dispbuf->height);
10644 }
10645
10646 return sprintf(buf, "NA\n");
10647}
10648
10649static ssize_t frame_format_show(struct class *cla,
10650 struct class_attribute *attr, char *buf)
10651{
10652 ssize_t ret = 0;
10653
10654 if (cur_dispbuf) {
10655 if ((cur_dispbuf->type & VIDTYPE_TYPEMASK) ==
10656 VIDTYPE_INTERLACE_TOP)
10657 ret = sprintf(buf, "interlace-top\n");
10658 else if ((cur_dispbuf->type & VIDTYPE_TYPEMASK) ==
10659 VIDTYPE_INTERLACE_BOTTOM)
10660 ret = sprintf(buf, "interlace-bottom\n");
10661 else
10662 ret = sprintf(buf, "progressive\n");
10663
10664 if (cur_dispbuf->type & VIDTYPE_COMPRESS)
10665 ret += sprintf(buf + ret, "Compressed\n");
10666
10667 return ret;
10668 }
10669
10670 return sprintf(buf, "NA\n");
10671}
10672
10673static ssize_t frame_aspect_ratio_show(struct class *cla,
10674 struct class_attribute *attr, char *buf)
10675{
10676 if (cur_dispbuf) {
10677 u32 ar = (cur_dispbuf->ratio_control &
10678 DISP_RATIO_ASPECT_RATIO_MASK) >>
10679 DISP_RATIO_ASPECT_RATIO_BIT;
10680
10681 if (ar)
10682 return sprintf(buf, "0x%x\n", ar);
10683 else
10684 return sprintf(buf, "0x%x\n",
10685 (cur_dispbuf->width << 8) /
10686 cur_dispbuf->height);
10687 }
10688
10689 return sprintf(buf, "NA\n");
10690}
10691
10692static ssize_t frame_rate_show(struct class *cla, struct class_attribute *attr,
10693 char *buf)
10694{
10695 u32 cnt = frame_count - last_frame_count;
10696 u32 time = jiffies;
10697 u32 tmp = time;
10698 u32 rate = 0;
10699 u32 vsync_rate;
10700 ssize_t ret = 0;
10701
10702 time -= last_frame_time;
10703 last_frame_time = tmp;
10704 last_frame_count = frame_count;
10705 if (time == 0)
10706 return 0;
10707 rate = 100 * cnt * HZ / time;
10708 vsync_rate = 100 * vsync_count * HZ / time;
10709 if (vinfo->sync_duration_den > 0) {
10710 ret =
10711 sprintf(buf,
10712 "VF.fps=%d.%02d panel fps %d, dur/is: %d,v/s=%d.%02d,inc=%d\n",
10713 rate / 100, rate % 100,
10714 vinfo->sync_duration_num /
10715 vinfo->sync_duration_den,
10716 time, vsync_rate / 100, vsync_rate % 100,
10717 vsync_pts_inc);
10718 }
10719 if ((debugflags & DEBUG_FLAG_CALC_PTS_INC) && time > HZ * 10
10720 && vsync_rate > 0) {
10721 if ((vsync_rate * vsync_pts_inc / 100) != 90000)
10722 vsync_pts_inc = 90000 * 100 / (vsync_rate);
10723 }
10724 vsync_count = 0;
10725 return ret;
10726}
10727
10728static ssize_t vframe_states_show(struct class *cla,
10729 struct class_attribute *attr, char *buf)
10730{
10731 int ret = 0;
10732 struct vframe_states states;
10733 unsigned long flags;
10734 struct vframe_s *vf;
10735
10736 if (video_vf_get_states(&states) == 0) {
10737 ret += sprintf(buf + ret, "vframe_pool_size=%d\n",
10738 states.vf_pool_size);
10739 ret += sprintf(buf + ret, "vframe buf_free_num=%d\n",
10740 states.buf_free_num);
10741 ret += sprintf(buf + ret, "vframe buf_recycle_num=%d\n",
10742 states.buf_recycle_num);
10743 ret += sprintf(buf + ret, "vframe buf_avail_num=%d\n",
10744 states.buf_avail_num);
10745
10746 spin_lock_irqsave(&lock, flags);
10747
10748 vf = video_vf_peek();
10749 if (vf) {
10750 ret += sprintf(buf + ret,
10751 "vframe ready frame delayed =%dms\n",
10752 (int)(jiffies_64 -
10753 vf->ready_jiffies64) * 1000 /
10754 HZ);
10755 ret += sprintf(buf + ret,
10756 "vf index=%d\n", vf->index);
10757 ret += sprintf(buf + ret,
10758 "vf->pts=%d\n", vf->pts);
10759 ret += sprintf(buf + ret,
10760 "cur vpts=%d\n",
10761 timestamp_vpts_get());
10762 ret += sprintf(buf + ret,
10763 "vf type=%d\n",
10764 vf->type);
10765 if (vf->type & VIDTYPE_COMPRESS) {
10766 ret += sprintf(buf + ret,
10767 "vf compHeadAddr=%x\n",
10768 vf->compHeadAddr);
10769 ret += sprintf(buf + ret,
10770 "vf compBodyAddr =%x\n",
10771 vf->compBodyAddr);
10772 } else {
10773 ret += sprintf(buf + ret,
10774 "vf canvas0Addr=%x\n",
10775 vf->canvas0Addr);
10776 ret += sprintf(buf + ret,
10777 "vf canvas1Addr=%x\n",
10778 vf->canvas1Addr);
10779 ret += sprintf(buf + ret,
10780 "vf canvas0Addr.y.addr=%x(%d)\n",
10781 canvas_get_addr(
10782 canvasY(vf->canvas0Addr)),
10783 canvas_get_addr(
10784 canvasY(vf->canvas0Addr)));
10785 ret += sprintf(buf + ret,
10786 "vf canvas0Adr.uv.adr=%x(%d)\n",
10787 canvas_get_addr(
10788 canvasUV(vf->canvas0Addr)),
10789 canvas_get_addr(
10790 canvasUV(vf->canvas0Addr)));
10791 }
10792 }
10793 spin_unlock_irqrestore(&lock, flags);
10794
10795 } else
10796 ret += sprintf(buf + ret, "vframe no states\n");
10797
10798 return ret;
10799}
10800
10801#ifdef CONFIG_AM_VOUT
10802static ssize_t device_resolution_show(struct class *cla,
10803 struct class_attribute *attr, char *buf)
10804{
10805#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
10806 const struct vinfo_s *info;
10807
10808 if (cur_dev == &video_dev[0])
10809 info = get_current_vinfo();
10810 else
10811 info = get_current_vinfo2();
10812#else
10813 const struct vinfo_s *info = get_current_vinfo();
10814#endif
10815
10816 if (info != NULL)
10817 return sprintf(buf, "%dx%d\n", info->width, info->height);
10818 else
10819 return sprintf(buf, "0x0\n");
10820}
10821#endif
10822
10823static ssize_t video_filename_show(struct class *cla,
10824 struct class_attribute *attr, char *buf)
10825{
10826 return sprintf(buf, "%s\n", file_name);
10827}
10828
10829static ssize_t video_filename_store(struct class *cla,
10830 struct class_attribute *attr,
10831 const char *buf, size_t count)
10832{
10833 size_t r;
10834
10835 /* check input buf to mitigate buffer overflow issue */
10836 if (strlen(buf) >= sizeof(file_name)) {
10837 memcpy(file_name, buf, sizeof(file_name));
10838 file_name[sizeof(file_name)-1] = '\0';
10839 r = 1;
10840 } else
10841 r = sscanf(buf, "%s", file_name);
10842 if (r != 1)
10843 return -EINVAL;
10844
10845 return r;
10846}
10847
10848static ssize_t video_debugflags_show(struct class *cla,
10849 struct class_attribute *attr, char *buf)
10850{
10851 int len = 0;
10852
10853 len += sprintf(buf + len, "value=%d\n", debugflags);
10854 len += sprintf(buf + len, "bit0:playing as fast!\n");
10855 len += sprintf(buf + len,
10856 "bit1:enable calc pts inc in frame rate show\n");
10857 return len;
10858}
10859
10860static ssize_t video_debugflags_store(struct class *cla,
10861 struct class_attribute *attr,
10862 const char *buf, size_t count)
10863{
10864 int r;
10865 int value = -1;
10866
10867/*
10868 * r = sscanf(buf, "%d", &value);
10869 * if (r == 1) {
10870 * debugflags = value;
10871 * seted = 1;
10872 * } else {
10873 * r = sscanf(buf, "0x%x", &value);
10874 * if (r == 1) {
10875 * debugflags = value;
10876 * seted = 1;
10877 * }
10878 * }
10879 */
10880
10881 r = kstrtoint(buf, 0, &value);
10882 if (r < 0)
10883 return -EINVAL;
10884
10885 debugflags = value;
10886
10887 pr_info("debugflags changed to %d(%x)\n", debugflags,
10888 debugflags);
10889 return count;
10890
10891}
10892
10893static ssize_t trickmode_duration_show(struct class *cla,
10894 struct class_attribute *attr, char *buf)
10895{
10896 return sprintf(buf, "trickmode frame duration %d\n",
10897 trickmode_duration / 9000);
10898}
10899
10900static ssize_t trickmode_duration_store(struct class *cla,
10901 struct class_attribute *attr,
10902 const char *buf, size_t count)
10903{
10904 int r;
10905 u32 s_value;
10906
10907 r = kstrtoint(buf, 0, &s_value);
10908 if (r < 0)
10909 return -EINVAL;
10910
10911 trickmode_duration = s_value * 9000;
10912
10913 return count;
10914}
10915
10916static ssize_t video_vsync_pts_inc_upint_show(struct class *cla,
10917 struct class_attribute *attr,
10918 char *buf)
10919{
10920 if (vsync_pts_inc_upint)
10921 return sprintf(buf,
10922 "%d,freerun %d,1.25xInc %d,1.12xInc %d,inc+10 %d,1xInc %d\n",
10923 vsync_pts_inc_upint, vsync_freerun,
10924 vsync_pts_125, vsync_pts_112, vsync_pts_101,
10925 vsync_pts_100);
10926 else
10927 return sprintf(buf, "%d\n", vsync_pts_inc_upint);
10928}
10929
10930static ssize_t video_vsync_pts_inc_upint_store(struct class *cla,
10931 struct class_attribute *attr,
10932 const char *buf, size_t count)
10933{
10934 int r;
10935
10936 r = kstrtoint(buf, 0, &vsync_pts_inc_upint);
10937 if (r < 0)
10938 return -EINVAL;
10939
10940 if (debug_flag)
10941 pr_info("%s(%d)\n", __func__, vsync_pts_inc_upint);
10942
10943 return count;
10944}
10945
10946static ssize_t slowsync_repeat_enable_show(struct class *cla,
10947 struct class_attribute *attr,
10948 char *buf)
10949{
10950 return sprintf(buf, "slowsync repeate enable = %d\n",
10951 slowsync_repeat_enable);
10952}
10953
10954static ssize_t slowsync_repeat_enable_store(struct class *cla,
10955 struct class_attribute *attr,
10956 const char *buf, size_t count)
10957{
10958 int r;
10959
10960 r = kstrtoint(buf, 0, &slowsync_repeat_enable);
10961 if (r < 0)
10962 return -EINVAL;
10963
10964 if (debug_flag)
10965 pr_info("%s(%d)\n", __func__, slowsync_repeat_enable);
10966
10967 return count;
10968}
10969
10970static ssize_t video_vsync_slow_factor_show(struct class *cla,
10971 struct class_attribute *attr,
10972 char *buf)
10973{
10974 return sprintf(buf, "%d\n", vsync_slow_factor);
10975}
10976
10977static ssize_t video_vsync_slow_factor_store(struct class *cla,
10978 struct class_attribute *attr,
10979 const char *buf, size_t count)
10980{
10981 int r;
10982
10983 r = kstrtoint(buf, 0, &vsync_slow_factor);
10984 if (r < 0)
10985 return -EINVAL;
10986
10987 if (debug_flag)
10988 pr_info("%s(%d)\n", __func__, vsync_slow_factor);
10989
10990 return count;
10991}
10992
10993static ssize_t fps_info_show(struct class *cla, struct class_attribute *attr,
10994 char *buf)
10995{
10996 u32 cnt = frame_count - last_frame_count;
10997 u32 time = jiffies;
10998 u32 input_fps = 0;
10999 u32 tmp = time;
11000
11001 time -= last_frame_time;
11002 last_frame_time = tmp;
11003 last_frame_count = frame_count;
11004 if (time != 0)
11005 output_fps = cnt * HZ / time;
11006 if (cur_dispbuf && cur_dispbuf->duration > 0) {
11007 input_fps = 96000 / cur_dispbuf->duration;
11008 if (output_fps > input_fps)
11009 output_fps = input_fps;
11010 } else
11011 input_fps = output_fps;
11012 return sprintf(buf, "input_fps:0x%x output_fps:0x%x drop_fps:0x%x\n",
11013 input_fps, output_fps, input_fps - output_fps);
11014}
11015
11016static ssize_t video_layer1_state_show(struct class *cla,
11017 struct class_attribute *attr, char *buf)
11018{
11019 /*return sprintf(buf, "%d\n",*/
11020 /*(READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off)*/
11021 /*& VPP_VD1_PREBLEND) ? 1 : 0);*/
11022 return sprintf(buf, "%d\n", video_enabled);
11023}
11024
11025void set_video_angle(u32 s_value)
11026{
11027 struct disp_info_s *layer = &glayer_info[0];
11028
11029 if ((s_value <= 3) && (layer->angle != s_value)) {
11030 layer->angle = s_value;
11031 pr_info("video angle:%d\n", layer->angle);
11032 }
11033}
11034EXPORT_SYMBOL(set_video_angle);
11035
11036static ssize_t video_angle_show(struct class *cla, struct class_attribute *attr,
11037 char *buf)
11038{
11039 struct disp_info_s *layer = &glayer_info[0];
11040
11041 return snprintf(buf, 40, "%d\n", layer->angle);
11042}
11043
11044static ssize_t video_angle_store(struct class *cla,
11045 struct class_attribute *attr, const char *buf,
11046 size_t count)
11047{
11048 int r;
11049 u32 s_value;
11050
11051 r = kstrtoint(buf, 0, &s_value);
11052 if (r < 0)
11053 return -EINVAL;
11054
11055 set_video_angle(s_value);
11056 return strnlen(buf, count);
11057}
11058
11059static ssize_t show_first_frame_nosync_show(struct class *cla,
11060 struct class_attribute *attr,
11061 char *buf)
11062{
11063 return sprintf(buf, "%d\n", show_first_frame_nosync ? 1 : 0);
11064}
11065
11066static ssize_t show_first_frame_nosync_store(struct class *cla,
11067 struct class_attribute *attr,
11068 const char *buf, size_t count)
11069{
11070 int r;
11071 int value;
11072
11073 r = kstrtoint(buf, 0, &value);
11074 if (r < 0)
11075 return -EINVAL;
11076
11077 if (value == 0)
11078 show_first_frame_nosync = false;
11079 else
11080 show_first_frame_nosync = true;
11081
11082 return count;
11083}
11084
11085static ssize_t show_first_picture_store(struct class *cla,
11086 struct class_attribute *attr,
11087 const char *buf, size_t count)
11088{
11089 int r;
11090 int value;
11091
11092 r = kstrtoint(buf, 0, &value);
11093 if (r < 0)
11094 return -EINVAL;
11095
11096 if (value == 0)
11097 show_first_picture = false;
11098 else
11099 show_first_picture = true;
11100
11101 return count;
11102}
11103
11104static ssize_t video_free_keep_buffer_store(struct class *cla,
11105 struct class_attribute *attr,
11106 const char *buf, size_t count)
11107{
11108 int r;
11109 int val;
11110
11111 if (debug_flag & DEBUG_FLAG_BLACKOUT)
11112 pr_info("%s(%s)\n", __func__, buf);
11113 r = kstrtoint(buf, 0, &val);
11114 if (r < 0)
11115 return -EINVAL;
11116 if (val == 1)
11117 try_free_keep_video(1);
11118 return count;
11119}
11120
11121
11122static ssize_t free_cma_buffer_store(struct class *cla,
11123 struct class_attribute *attr,
11124 const char *buf, size_t count)
11125{
11126 int r;
11127 int val;
11128
11129 r = kstrtoint(buf, 0, &val);
11130 if (r < 0)
11131 return -EINVAL;
11132 if (val == 1) {
11133 pr_info("start to free cma buffer\n");
11134#if DEBUG_TMP
11135 vh265_free_cmabuf();
11136 vh264_4k_free_cmabuf();
11137 vdec_free_cmabuf();
11138#endif
11139 }
11140 return count;
11141}
11142
11143static ssize_t pic_mode_info_show(struct class *cla,
11144 struct class_attribute *attr, char *buf)
11145{
11146 int ret = 0;
11147
11148 if (cur_dispbuf) {
11149 u32 adapted_mode = (cur_dispbuf->ratio_control
11150 & DISP_RATIO_ADAPTED_PICMODE) ? 1 : 0;
11151 u32 info_frame = (cur_dispbuf->ratio_control
11152 & DISP_RATIO_INFOFRAME_AVAIL) ? 1 : 0;
11153
11154 ret += sprintf(buf + ret, "ratio_control=0x%x\n",
11155 cur_dispbuf->ratio_control);
11156 ret += sprintf(buf + ret, "adapted_mode=%d\n",
11157 adapted_mode);
11158 ret += sprintf(buf + ret, "info_frame=%d\n",
11159 info_frame);
11160 ret += sprintf(buf + ret,
11161 "hs=%d, he=%d, vs=%d, ve=%d\n",
11162 cur_dispbuf->pic_mode.hs,
11163 cur_dispbuf->pic_mode.he,
11164 cur_dispbuf->pic_mode.vs,
11165 cur_dispbuf->pic_mode.ve);
11166 ret += sprintf(buf + ret, "screen_mode=%d\n",
11167 cur_dispbuf->pic_mode.screen_mode);
11168 ret += sprintf(buf + ret, "custom_ar=%d\n",
11169 cur_dispbuf->pic_mode.custom_ar);
11170 ret += sprintf(buf + ret, "AFD_enable=%d\n",
11171 cur_dispbuf->pic_mode.AFD_enable);
11172 return ret;
11173 }
11174 return sprintf(buf, "NA\n");
11175}
11176
11177static ssize_t video_inuse_show(struct class *class,
11178 struct class_attribute *attr, char *buf)
11179{
11180 size_t r;
11181
11182 mutex_lock(&video_inuse_mutex);
11183 if (video_inuse == 0) {
11184 r = sprintf(buf, "%d\n", video_inuse);
11185 video_inuse = 1;
11186 pr_info("video_inuse return 0,set 1\n");
11187 } else {
11188 r = sprintf(buf, "%d\n", video_inuse);
11189 pr_info("video_inuse = %d\n", video_inuse);
11190 }
11191 mutex_unlock(&video_inuse_mutex);
11192 return r;
11193}
11194
11195static ssize_t video_inuse_store(struct class *class,
11196 struct class_attribute *attr,
11197 const char *buf, size_t count)
11198{
11199 size_t r;
11200 int val;
11201
11202 mutex_lock(&video_inuse_mutex);
11203 r = kstrtoint(buf, 0, &val);
11204 pr_info("set video_inuse val:%d\n", val);
11205 video_inuse = val;
11206 mutex_unlock(&video_inuse_mutex);
11207 if (r != 1)
11208 return -EINVAL;
11209
11210 return count;
11211}
11212
11213static ssize_t video_zorder_show(
11214 struct class *cla,
11215 struct class_attribute *attr,
11216 char *buf)
11217{
11218 struct disp_info_s *layer = &glayer_info[0];
11219
11220 return sprintf(buf, "%d\n", layer->zorder);
11221}
11222
11223static ssize_t video_zorder_store(
11224 struct class *cla,
11225 struct class_attribute *attr,
11226 const char *buf, size_t count)
11227{
11228 int zorder;
11229 int ret = 0;
11230 struct disp_info_s *layer = &glayer_info[0];
11231
11232 ret = kstrtoint(buf, 0, &zorder);
11233 if (ret < 0)
11234 return -EINVAL;
11235
11236 if (zorder != layer->zorder) {
11237 layer->zorder = zorder;
11238 video_property_changed = 1;
11239 }
11240 return count;
11241}
11242
11243#ifdef VIDEO_PIP
11244static int _videopip_set_disable(u32 val)
11245{
11246 if (val > VIDEO_DISABLE_FORNEXT)
11247 return -EINVAL;
11248
11249 disable_videopip = val;
11250
11251 if (disable_videopip != VIDEO_DISABLE_NONE) {
11252 DisableVideoLayer2();
11253
11254 if ((disable_videopip == VIDEO_DISABLE_FORNEXT)
11255 && cur_pipbuf && (cur_pipbuf != &local_pip))
11256 pip_property_changed = 1;
11257 } else {
11258 if (cur_pipbuf && (cur_pipbuf != &local_pip))
11259 EnableVideoLayer2();
11260 }
11261
11262 return 0;
11263}
11264
11265static ssize_t videopip_axis_show(
11266 struct class *cla,
11267 struct class_attribute *attr,
11268 char *buf)
11269{
11270 int x0, y0, x1, y1;
11271 struct disp_info_s *layer = &glayer_info[1];
11272
11273 x0 = layer->layer_left;
11274 y0 = layer->layer_top;
11275 x1 = layer->layer_width + x0 - 1;
11276 y1 = layer->layer_height + y0 - 1;
11277 return snprintf(buf, 40, "%d %d %d %d\n", x0, y0, x1, y1);
11278}
11279
11280static ssize_t videopip_axis_store(
11281 struct class *cla,
11282 struct class_attribute *attr,
11283 const char *buf, size_t count)
11284{
11285 struct disp_info_s *layer = &glayer_info[1];
11286
11287 mutex_lock(&video_module_mutex);
11288
11289 set_video_window(layer, buf);
11290
11291 mutex_unlock(&video_module_mutex);
11292
11293 return strnlen(buf, count);
11294}
11295
11296static ssize_t videopip_crop_show(
11297 struct class *cla,
11298 struct class_attribute *attr,
11299 char *buf)
11300{
11301 u32 t, l, b, r;
11302 struct disp_info_s *layer = &glayer_info[1];
11303
11304 t = layer->crop_top;
11305 l = layer->crop_left;
11306 b = layer->crop_bottom;
11307 r = layer->crop_right;
11308 return snprintf(buf, 40, "%d %d %d %d\n", t, l, b, r);
11309}
11310
11311static ssize_t videopip_crop_store(
11312 struct class *cla,
11313 struct class_attribute *attr,
11314 const char *buf, size_t count)
11315{
11316 struct disp_info_s *layer = &glayer_info[1];
11317
11318 mutex_lock(&video_module_mutex);
11319
11320 set_video_crop(layer, buf);
11321
11322 mutex_unlock(&video_module_mutex);
11323
11324 return strnlen(buf, count);
11325}
11326
11327static ssize_t videopip_disable_show(
11328 struct class *cla, struct class_attribute *attr, char *buf)
11329{
11330 return sprintf(buf, "%d\n", disable_videopip);
11331}
11332
11333static ssize_t videopip_disable_store(
11334 struct class *cla,
11335 struct class_attribute *attr,
11336 const char *buf, size_t count)
11337{
11338 int r;
11339 int val;
11340
11341 if (debug_flag & DEBUG_FLAG_BLACKOUT)
11342 pr_info("%s(%s)\n", __func__, buf);
11343
11344 r = kstrtoint(buf, 0, &val);
11345 if (r < 0)
11346 return -EINVAL;
11347
11348 if (_videopip_set_disable(val) < 0)
11349 return -EINVAL;
11350
11351 return count;
11352}
11353
11354static ssize_t videopip_screen_mode_show(
11355 struct class *cla,
11356 struct class_attribute *attr,
11357 char *buf)
11358{
11359 struct disp_info_s *layer = &glayer_info[1];
11360 static const char * const wide_str[] = {
11361 "normal", "full stretch", "4-3", "16-9", "non-linear",
11362 "normal-noscaleup",
11363 "4-3 ignore", "4-3 letter box", "4-3 pan scan", "4-3 combined",
11364 "16-9 ignore", "16-9 letter box", "16-9 pan scan",
11365 "16-9 combined", "Custom AR", "AFD"
11366 };
11367
11368 if (layer->wide_mode < ARRAY_SIZE(wide_str)) {
11369 return sprintf(buf, "%d:%s\n",
11370 layer->wide_mode,
11371 wide_str[layer->wide_mode]);
11372 } else
11373 return 0;
11374}
11375
11376static ssize_t videopip_screen_mode_store(
11377 struct class *cla,
11378 struct class_attribute *attr,
11379 const char *buf, size_t count)
11380{
11381 unsigned long mode;
11382 int ret = 0;
11383 struct disp_info_s *layer = &glayer_info[1];
11384
11385 ret = kstrtoul(buf, 0, (unsigned long *)&mode);
11386 if (ret < 0)
11387 return -EINVAL;
11388
11389 if ((mode < VIDEO_WIDEOPTION_MAX)
11390 && (mode != layer->wide_mode)) {
11391 layer->wide_mode = mode;
11392 pip_property_changed = 1;
11393 }
11394 return count;
11395}
11396
11397static ssize_t videopip_loop_show(
11398 struct class *cla, struct class_attribute *attr, char *buf)
11399{
11400 return sprintf(buf, "%d\n", pip_loop);
11401}
11402
11403static ssize_t videopip_loop_store(
11404 struct class *cla,
11405 struct class_attribute *attr,
11406 const char *buf, size_t count)
11407{
11408 int r;
11409 int val;
11410
11411 r = kstrtoint(buf, 0, &val);
11412 if (r < 0)
11413 return -EINVAL;
11414
11415 pip_loop = val;
11416 return count;
11417}
11418
11419static ssize_t videopip_global_output_show(
11420 struct class *cla,
11421 struct class_attribute *attr,
11422 char *buf)
11423{
11424 return sprintf(buf, "%d\n", pip_global_output);
11425}
11426
11427static ssize_t videopip_global_output_store(
11428 struct class *cla,
11429 struct class_attribute *attr,
11430 const char *buf, size_t count)
11431{
11432 int r;
11433
11434 r = kstrtoint(buf, 0, &pip_global_output);
11435 if (r < 0)
11436 return -EINVAL;
11437
11438 pr_info("%s(%d)\n", __func__, pip_global_output);
11439
11440 return count;
11441}
11442
11443static ssize_t videopip_zorder_show(
11444 struct class *cla,
11445 struct class_attribute *attr,
11446 char *buf)
11447{
11448 struct disp_info_s *layer = &glayer_info[1];
11449
11450 return sprintf(buf, "%d\n", layer->zorder);
11451}
11452
11453static ssize_t videopip_zorder_store(
11454 struct class *cla,
11455 struct class_attribute *attr,
11456 const char *buf, size_t count)
11457{
11458 int zorder;
11459 int ret = 0;
11460 struct disp_info_s *layer = &glayer_info[1];
11461
11462 ret = kstrtoint(buf, 0, &zorder);
11463 if (ret < 0)
11464 return -EINVAL;
11465
11466 if (zorder != layer->zorder) {
11467 layer->zorder = zorder;
11468 pip_property_changed = 1;
11469 }
11470 return count;
11471}
11472
11473static ssize_t videopip_state_show(
11474 struct class *cla,
11475 struct class_attribute *attr,
11476 char *buf)
11477{
11478 ssize_t len = 0;
11479 struct vppfilter_mode_s *vpp_filter = NULL;
11480
11481 if (!curpip_frame_par)
11482 return len;
11483 vpp_filter = &curpip_frame_par->vpp_filter;
11484 len += sprintf(buf + len,
11485 "zoom2_start_x_lines:%u.zoom2_end_x_lines:%u.\n",
11486 zoom2_start_x_lines, zoom2_end_x_lines);
11487 len += sprintf(buf + len,
11488 "zoom2_start_y_lines:%u.zoom2_end_y_lines:%u.\n",
11489 zoom2_start_y_lines, zoom2_end_y_lines);
11490 len += sprintf(buf + len, "frame parameters: pic_in_height %u.\n",
11491 curpip_frame_par->VPP_pic_in_height_);
11492 len += sprintf(buf + len,
11493 "frame parameters: VPP_line_in_length_ %u.\n",
11494 curpip_frame_par->VPP_line_in_length_);
11495 len += sprintf(buf + len, "vscale_skip_count %u.\n",
11496 curpip_frame_par->vscale_skip_count);
11497 len += sprintf(buf + len, "hscale_skip_count %u.\n",
11498 curpip_frame_par->hscale_skip_count);
11499 len += sprintf(buf + len, "supscl_path %u.\n",
11500 curpip_frame_par->supscl_path);
11501 len += sprintf(buf + len, "supsc0_enable %u.\n",
11502 curpip_frame_par->supsc0_enable);
11503 len += sprintf(buf + len, "supsc1_enable %u.\n",
11504 curpip_frame_par->supsc1_enable);
11505 len += sprintf(buf + len, "supsc0_hori_ratio %u.\n",
11506 curpip_frame_par->supsc0_hori_ratio);
11507 len += sprintf(buf + len, "supsc1_hori_ratio %u.\n",
11508 curpip_frame_par->supsc1_hori_ratio);
11509 len += sprintf(buf + len, "supsc0_vert_ratio %u.\n",
11510 curpip_frame_par->supsc0_vert_ratio);
11511 len += sprintf(buf + len, "supsc1_vert_ratio %u.\n",
11512 curpip_frame_par->supsc1_vert_ratio);
11513 len += sprintf(buf + len, "spsc0_h_in %u.\n",
11514 curpip_frame_par->spsc0_h_in);
11515 len += sprintf(buf + len, "spsc1_h_in %u.\n",
11516 curpip_frame_par->spsc1_h_in);
11517 len += sprintf(buf + len, "spsc0_w_in %u.\n",
11518 curpip_frame_par->spsc0_w_in);
11519 len += sprintf(buf + len, "spsc1_w_in %u.\n",
11520 curpip_frame_par->spsc1_w_in);
11521 len += sprintf(buf + len, "video_input_w %u.\n",
11522 curpip_frame_par->video_input_w);
11523 len += sprintf(buf + len, "video_input_h %u.\n",
11524 curpip_frame_par->video_input_h);
11525 len += sprintf(buf + len, "clk_in_pps %u.\n",
11526 curpip_frame_par->clk_in_pps);
11527 len +=
11528 sprintf(buf + len, "hscale phase step 0x%x.\n",
11529 vpp_filter->vpp_hsc_start_phase_step);
11530 len +=
11531 sprintf(buf + len, "vscale phase step 0x%x.\n",
11532 vpp_filter->vpp_vsc_start_phase_step);
11533 len +=
11534 sprintf(buf + len, "pps pre hsc enable %d.\n",
11535 vpp_filter->vpp_pre_hsc_en);
11536 len +=
11537 sprintf(buf + len, "pps pre vsc enable %d.\n",
11538 vpp_filter->vpp_pre_vsc_en);
11539 len +=
11540 sprintf(buf + len, "hscale filter coef %d.\n",
11541 vpp_filter->vpp_horz_filter);
11542 len +=
11543 sprintf(buf + len, "vscale filter coef %d.\n",
11544 vpp_filter->vpp_vert_filter);
11545 len +=
11546 sprintf(buf + len, "vpp_vert_chroma_filter_en %d.\n",
11547 vpp_filter->vpp_vert_chroma_filter_en);
11548 len +=
11549 sprintf(buf + len, "post_blend_vd_h_start 0x%x.\n",
11550 curpip_frame_par->VPP_post_blend_vd_h_start_);
11551 len +=
11552 sprintf(buf + len, "post_blend_vd_h_end 0x%x.\n",
11553 curpip_frame_par->VPP_post_blend_vd_h_end_);
11554 len +=
11555 sprintf(buf + len, "post_blend_vd_v_start 0x%x.\n",
11556 curpip_frame_par->VPP_post_blend_vd_v_start_);
11557 len +=
11558 sprintf(buf + len, "post_blend_vd_v_end 0x%x.\n",
11559 curpip_frame_par->VPP_post_blend_vd_v_end_);
11560 len +=
11561 sprintf(buf + len, "VPP_hd_start_lines_ 0x%x.\n",
11562 curpip_frame_par->VPP_hd_start_lines_);
11563 len +=
11564 sprintf(buf + len, "VPP_hd_end_lines_ 0x%x.\n",
11565 curpip_frame_par->VPP_hd_end_lines_);
11566 len +=
11567 sprintf(buf + len, "VPP_vd_start_lines_ 0x%x.\n",
11568 curpip_frame_par->VPP_vd_start_lines_);
11569 len +=
11570 sprintf(buf + len, "VPP_vd_end_lines_ 0x%x.\n",
11571 curpip_frame_par->VPP_vd_end_lines_);
11572 len +=
11573 sprintf(buf + len, "VPP_hsc_startp 0x%x.\n",
11574 curpip_frame_par->VPP_hsc_startp);
11575 len +=
11576 sprintf(buf + len, "VPP_hsc_endp 0x%x.\n",
11577 curpip_frame_par->VPP_hsc_endp);
11578 len +=
11579 sprintf(buf + len, "VPP_vsc_startp 0x%x.\n",
11580 curpip_frame_par->VPP_vsc_startp);
11581 len +=
11582 sprintf(buf + len, "VPP_vsc_endp 0x%x.\n",
11583 curpip_frame_par->VPP_vsc_endp);
11584 return len;
11585}
11586
11587#endif
11588
11589static struct class_attribute amvideo_class_attrs[] = {
11590 __ATTR(axis,
11591 0664,
11592 video_axis_show,
11593 video_axis_store),
11594 __ATTR(crop,
11595 0644,
11596 video_crop_show,
11597 video_crop_store),
11598 __ATTR(sr,
11599 0644,
11600 video_sr_show,
11601 video_sr_store),
11602 __ATTR(global_offset,
11603 0644,
11604 video_global_offset_show,
11605 video_global_offset_store),
11606 __ATTR(screen_mode,
11607 0664,
11608 video_screen_mode_show,
11609 video_screen_mode_store),
11610 __ATTR(blackout_policy,
11611 0664,
11612 video_blackout_policy_show,
11613 video_blackout_policy_store),
11614 __ATTR(video_seek_flag,
11615 0664,
11616 video_seek_flag_show,
11617 video_seek_flag_store),
11618 __ATTR(disable_video,
11619 0664,
11620 video_disable_show,
11621 video_disable_store),
11622 __ATTR(video_global_output,
11623 0664,
11624 video_global_output_show,
11625 video_global_output_store),
11626 __ATTR(hold_video,
11627 0664,
11628 video_hold_show,
11629 video_hold_store),
11630 __ATTR(zoom,
11631 0664,
11632 video_zoom_show,
11633 video_zoom_store),
11634 __ATTR(brightness,
11635 0644,
11636 video_brightness_show,
11637 video_brightness_store),
11638 __ATTR(contrast,
11639 0644,
11640 video_contrast_show,
11641 video_contrast_store),
11642 __ATTR(vpp_brightness,
11643 0644,
11644 vpp_brightness_show,
11645 vpp_brightness_store),
11646 __ATTR(vpp_contrast,
11647 0644,
11648 vpp_contrast_show,
11649 vpp_contrast_store),
11650 __ATTR(saturation,
11651 0644,
11652 video_saturation_show,
11653 video_saturation_store),
11654 __ATTR(vpp_saturation_hue,
11655 0644,
11656 vpp_saturation_hue_show,
11657 vpp_saturation_hue_store),
11658 __ATTR(test_screen,
11659 0644,
11660 video_test_screen_show,
11661 video_test_screen_store),
11662 __ATTR(rgb_screen,
11663 0644,
11664 video_rgb_screen_show,
11665 video_rgb_screen_store),
11666 __ATTR(file_name,
11667 0644,
11668 video_filename_show,
11669 video_filename_store),
11670 __ATTR(debugflags,
11671 0644,
11672 video_debugflags_show,
11673 video_debugflags_store),
11674 __ATTR(trickmode_duration,
11675 0644,
11676 trickmode_duration_show,
11677 trickmode_duration_store),
11678 __ATTR(nonlinear_factor,
11679 0644,
11680 video_nonlinear_factor_show,
11681 video_nonlinear_factor_store),
11682 __ATTR(freerun_mode,
11683 0644,
11684 video_freerun_mode_show,
11685 video_freerun_mode_store),
11686 __ATTR(video_speed_check_h_w,
11687 0644,
11688 video_speed_check_show,
11689 video_speed_check_store),
11690 __ATTR(threedim_mode,
11691 0644,
11692 threedim_mode_show,
11693 threedim_mode_store),
11694 __ATTR(vsync_pts_inc_upint,
11695 0644,
11696 video_vsync_pts_inc_upint_show,
11697 video_vsync_pts_inc_upint_store),
11698 __ATTR(vsync_slow_factor,
11699 0644,
11700 video_vsync_slow_factor_show,
11701 video_vsync_slow_factor_store),
11702 __ATTR(angle,
11703 0644,
11704 video_angle_show,
11705 video_angle_store),
11706 __ATTR(stereo_scaler,
11707 0644, NULL,
11708 video_3d_scale_store),
11709 __ATTR(show_first_frame_nosync,
11710 0644,
11711 show_first_frame_nosync_show,
11712 show_first_frame_nosync_store),
11713 __ATTR(show_first_picture,
11714 0664, NULL,
11715 show_first_picture_store),
11716 __ATTR(slowsync_repeat_enable,
11717 0644,
11718 slowsync_repeat_enable_show,
11719 slowsync_repeat_enable_store),
11720 __ATTR(free_keep_buffer,
11721 0664, NULL,
11722 video_free_keep_buffer_store),
11723 __ATTR(free_cma_buffer,
11724 0664, NULL,
11725 free_cma_buffer_store),
11726#ifdef CONFIG_AM_VOUT
11727 __ATTR_RO(device_resolution),
11728#endif
11729#ifdef PTS_TRACE_DEBUG
11730 __ATTR_RO(pts_trace),
11731#endif
11732 __ATTR(video_inuse,
11733 0664,
11734 video_inuse_show,
11735 video_inuse_store),
11736 __ATTR(video_zorder,
11737 0664,
11738 video_zorder_show,
11739 video_zorder_store),
11740 __ATTR_RO(frame_addr),
11741 __ATTR_RO(frame_canvas_width),
11742 __ATTR_RO(frame_canvas_height),
11743 __ATTR_RO(frame_width),
11744 __ATTR_RO(frame_height),
11745 __ATTR_RO(frame_format),
11746 __ATTR_RO(frame_aspect_ratio),
11747 __ATTR_RO(frame_rate),
11748 __ATTR_RO(vframe_states),
11749 __ATTR_RO(video_state),
11750 __ATTR_RO(fps_info),
11751 __ATTR_RO(video_layer1_state),
11752 __ATTR_RO(pic_mode_info),
11753#ifdef VIDEO_PIP
11754 __ATTR(axis_pip,
11755 0664,
11756 videopip_axis_show,
11757 videopip_axis_store),
11758 __ATTR(crop_pip,
11759 0664,
11760 videopip_crop_show,
11761 videopip_crop_store),
11762 __ATTR(disable_videopip,
11763 0664,
11764 videopip_disable_show,
11765 videopip_disable_store),
11766 __ATTR(screen_mode_pip,
11767 0664,
11768 videopip_screen_mode_show,
11769 videopip_screen_mode_store),
11770 __ATTR(videopip_loop,
11771 0664,
11772 videopip_loop_show,
11773 videopip_loop_store),
11774 __ATTR(pip_global_output,
11775 0664,
11776 videopip_global_output_show,
11777 videopip_global_output_store),
11778 __ATTR(videopip_zorder,
11779 0664,
11780 videopip_zorder_show,
11781 videopip_zorder_store),
11782 __ATTR_RO(videopip_state),
11783#endif
11784 __ATTR_NULL
11785};
11786
11787static struct class_attribute amvideo_poll_class_attrs[] = {
11788 __ATTR_RO(frame_width),
11789 __ATTR_RO(frame_height),
11790 __ATTR_RO(vframe_states),
11791 __ATTR_RO(video_state),
11792 __ATTR_NULL
11793};
11794
11795#ifdef CONFIG_PM
11796static int amvideo_class_suspend(struct device *dev, pm_message_t state)
11797{
11798#if 0
11799
11800 pm_state.event = state.event;
11801
11802 if (state.event == PM_EVENT_SUSPEND) {
11803 pm_state.vpp_misc =
11804 READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off);
11805
11806 DisableVideoLayer_NoDelay();
11807
11808 msleep(50);
11809 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
11810 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8)
11811 && !is_meson_mtvd_cpu()) {
11812 vpu_delay_work_flag = 0;
11813 }
11814 /* #endif */
11815
11816 }
11817#endif
11818 return 0;
11819}
11820
11821static int amvideo_class_resume(struct device *dev)
11822{
11823#if 0
11824#define VPP_MISC_VIDEO_BITS_MASK \
11825 ((VPP_VD2_ALPHA_MASK << VPP_VD2_ALPHA_BIT) | \
11826 VPP_VD2_PREBLEND | VPP_VD1_PREBLEND |\
11827 VPP_VD2_POSTBLEND | VPP_VD1_POSTBLEND | VPP_POSTBLEND_EN)\
11828
11829 if (pm_state.event == PM_EVENT_SUSPEND) {
11830 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
11831 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8)
11832 && !is_meson_mtvd_cpu()) {
11833 switch_vpu_mem_pd_vmod(VPU_VIU_VD1,
11834 pm_state.mem_pd_vd1);
11835 switch_vpu_mem_pd_vmod(VPU_VIU_VD2,
11836 pm_state.mem_pd_vd2);
11837 switch_vpu_mem_pd_vmod(VPU_DI_POST,
11838 pm_state.mem_pd_di_post);
11839 }
11840 /* #endif */
11841 WRITE_VCBUS_REG(VPP_MISC + cur_dev->vpp_off,
11842 (READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off) &
11843 (~VPP_MISC_VIDEO_BITS_MASK)) |
11844 (pm_state.vpp_misc & VPP_MISC_VIDEO_BITS_MASK));
11845 WRITE_VCBUS_REG(VPP_MISC +
11846 cur_dev->vpp_off, pm_state.vpp_misc);
11847
11848 pm_state.event = -1;
11849 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
11850 pr_info("%s write(VPP_MISC,%x)\n", __func__,
11851 pm_state.vpp_misc);
11852 }
11853 }
11854#ifdef CONFIG_SCREEN_ON_EARLY
11855 if (power_key_pressed) {
11856 vout_pll_resume_early();
11857 osd_resume_early();
11858 resume_vout_early();
11859 power_key_pressed = 0;
11860 }
11861#endif
11862#endif
11863 return 0;
11864}
11865#endif
11866
11867static struct class amvideo_class = {
11868 .name = AMVIDEO_CLASS_NAME,
11869 .class_attrs = amvideo_class_attrs,
11870#ifdef CONFIG_PM
11871 .suspend = amvideo_class_suspend,
11872 .resume = amvideo_class_resume,
11873#endif
11874};
11875
11876static struct class amvideo_poll_class = {
11877 .name = AMVIDEO_POLL_CLASS_NAME,
11878 .class_attrs = amvideo_poll_class_attrs,
11879};
11880
11881#ifdef TV_REVERSE
11882static int __init vpp_axis_reverse(char *str)
11883{
11884 unsigned char *ptr = str;
11885
11886 pr_info("%s: bootargs is %s\n", __func__, str);
11887 if (strstr(ptr, "1"))
11888 reverse = true;
11889 else
11890 reverse = false;
11891
11892 return 0;
11893}
11894
11895__setup("video_reverse=", vpp_axis_reverse);
11896#endif
11897
11898struct vframe_s *get_cur_dispbuf(void)
11899{
11900 return cur_dispbuf;
11901}
11902
11903#ifdef CONFIG_AM_VOUT
11904int vout_notify_callback(struct notifier_block *block, unsigned long cmd,
11905 void *para)
11906{
11907 const struct vinfo_s *info;
11908 ulong flags;
11909
11910#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
11911 if (cur_dev != &video_dev[0])
11912 return 0;
11913#endif
11914 switch (cmd) {
11915 case VOUT_EVENT_MODE_CHANGE:
11916 info = get_current_vinfo();
11917 spin_lock_irqsave(&lock, flags);
11918 vinfo = info;
11919 /* pre-calculate vsync_pts_inc in 90k unit */
11920 vsync_pts_inc = 90000 * vinfo->sync_duration_den /
11921 vinfo->sync_duration_num;
11922 vsync_pts_inc_scale = vinfo->sync_duration_den;
11923 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
11924 spin_unlock_irqrestore(&lock, flags);
11925 new_vmode = vinfo->mode;
11926 break;
11927 case VOUT_EVENT_OSD_PREBLEND_ENABLE:
11928 break;
11929 case VOUT_EVENT_OSD_DISP_AXIS:
11930 break;
11931 }
11932 return 0;
11933}
11934
11935#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
11936int vout2_notify_callback(struct notifier_block *block, unsigned long cmd,
11937 void *para)
11938{
11939 const struct vinfo_s *info;
11940 ulong flags;
11941
11942 if (cur_dev != &video_dev[1])
11943 return 0;
11944
11945 switch (cmd) {
11946 case VOUT_EVENT_MODE_CHANGE:
11947 info = get_current_vinfo2();
11948 spin_lock_irqsave(&lock, flags);
11949 vinfo = info;
11950 /* pre-calculate vsync_pts_inc in 90k unit */
11951 vsync_pts_inc = 90000 * vinfo->sync_duration_den /
11952 vinfo->sync_duration_num;
11953 vsync_pts_inc_scale = vinfo->sync_duration_den;
11954 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
11955 spin_unlock_irqrestore(&lock, flags);
11956 break;
11957 case VOUT_EVENT_OSD_PREBLEND_ENABLE:
11958 break;
11959 case VOUT_EVENT_OSD_DISP_AXIS:
11960 break;
11961 }
11962 return 0;
11963}
11964#endif
11965
11966
11967static struct notifier_block vout_notifier = {
11968 .notifier_call = vout_notify_callback,
11969};
11970
11971#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
11972static struct notifier_block vout2_notifier = {
11973 .notifier_call = vout2_notify_callback,
11974};
11975#endif
11976
11977
11978static void vout_hook(void)
11979{
11980 vout_register_client(&vout_notifier);
11981
11982#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
11983 vout2_register_client(&vout2_notifier);
11984#endif
11985
11986 vinfo = get_current_vinfo();
11987
11988 if (!vinfo) {
11989#if DEBUG_TMP
11990 set_current_vmode(VMODE_720P);
11991#endif
11992 vinfo = get_current_vinfo();
11993 }
11994
11995 if (vinfo) {
11996 vsync_pts_inc = 90000 * vinfo->sync_duration_den /
11997 vinfo->sync_duration_num;
11998 vsync_pts_inc_scale = vinfo->sync_duration_den;
11999 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
12000 old_vmode = new_vmode = vinfo->mode;
12001 }
12002#ifdef CONFIG_AM_VIDEO_LOG
12003 if (vinfo) {
12004 amlog_mask(LOG_MASK_VINFO, "vinfo = %p\n", vinfo);
12005 amlog_mask(LOG_MASK_VINFO, "display platform %s:\n",
12006 vinfo->name);
12007 amlog_mask(LOG_MASK_VINFO, "\tresolution %d x %d\n",
12008 vinfo->width, vinfo->height);
12009 amlog_mask(LOG_MASK_VINFO, "\taspect ratio %d : %d\n",
12010 vinfo->aspect_ratio_num, vinfo->aspect_ratio_den);
12011 amlog_mask(LOG_MASK_VINFO, "\tsync duration %d : %d\n",
12012 vinfo->sync_duration_num, vinfo->sync_duration_den);
12013 }
12014#endif
12015}
12016#endif
12017
12018static int amvideo_notify_callback(
12019 struct notifier_block *block,
12020 unsigned long cmd,
12021 void *para)
12022{
12023 u32 *p, val;
12024
12025 switch (cmd) {
12026 case AMVIDEO_UPDATE_OSD_MODE:
12027 p = (u32 *)para;
12028 if (!update_osd_vpp_misc)
12029 osd_vpp_misc_mask = p[1];
12030 val = osd_vpp_misc
12031 & (~osd_vpp_misc_mask);
12032 val |= (p[0] & osd_vpp_misc_mask);
12033 osd_vpp_misc = val;
12034 if (!update_osd_vpp_misc)
12035 update_osd_vpp_misc = true;
12036 break;
12037 default:
12038 break;
12039 }
12040 return 0;
12041}
12042
12043static struct notifier_block amvideo_notifier = {
12044 .notifier_call = amvideo_notify_callback,
12045};
12046
12047static RAW_NOTIFIER_HEAD(amvideo_notifier_list);
12048int amvideo_register_client(struct notifier_block *nb)
12049{
12050 return raw_notifier_chain_register(&amvideo_notifier_list, nb);
12051}
12052EXPORT_SYMBOL(amvideo_register_client);
12053
12054int amvideo_unregister_client(struct notifier_block *nb)
12055{
12056 return raw_notifier_chain_unregister(&amvideo_notifier_list, nb);
12057}
12058EXPORT_SYMBOL(amvideo_unregister_client);
12059
12060int amvideo_notifier_call_chain(unsigned long val, void *v)
12061{
12062 return raw_notifier_call_chain(&amvideo_notifier_list, val, v);
12063}
12064EXPORT_SYMBOL_GPL(amvideo_notifier_call_chain);
12065
12066#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
12067
12068static void do_vpu_delay_work(struct work_struct *work)
12069{
12070 unsigned long flags;
12071 unsigned int r;
12072
12073#if DEBUG_TMP
12074 if (vpu_delay_work_flag & VPU_VIDEO_LAYER1_CHANGED) {
12075 vpu_delay_work_flag &= ~VPU_VIDEO_LAYER1_CHANGED;
12076
12077 switch_set_state(&video1_state_sdev, !!video_enabled);
12078 }
12079#endif
12080 spin_lock_irqsave(&delay_work_lock, flags);
12081
12082 if (vpu_delay_work_flag & VPU_DELAYWORK_VPU_CLK) {
12083 vpu_delay_work_flag &= ~VPU_DELAYWORK_VPU_CLK;
12084
12085 spin_unlock_irqrestore(&delay_work_lock, flags);
12086
12087 if (vpu_clk_level > 0)
12088 request_vpu_clk_vmod(360000000, VPU_VIU_VD1);
12089 else
12090 release_vpu_clk_vmod(VPU_VIU_VD1);
12091
12092 spin_lock_irqsave(&delay_work_lock, flags);
12093 }
12094
12095 r = READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off);
12096
12097 if (vpu_mem_power_off_count > 0) {
12098 vpu_mem_power_off_count--;
12099
12100 if (vpu_mem_power_off_count == 0) {
12101 if ((vpu_delay_work_flag &
12102 VPU_DELAYWORK_MEM_POWER_OFF_VD1)
12103 && ((r & VPP_VD1_PREBLEND) == 0)) {
12104 vpu_delay_work_flag &=
12105 ~VPU_DELAYWORK_MEM_POWER_OFF_VD1;
12106
12107 switch_vpu_mem_pd_vmod(
12108 VPU_VIU_VD1,
12109 VPU_MEM_POWER_DOWN);
12110 switch_vpu_mem_pd_vmod(
12111 VPU_AFBC_DEC,
12112 VPU_MEM_POWER_DOWN);
12113 switch_vpu_mem_pd_vmod(
12114 VPU_DI_POST,
12115 VPU_MEM_POWER_DOWN);
12116 if (!legacy_vpp)
12117 switch_vpu_mem_pd_vmod(
12118 VPU_VD1_SCALE,
12119 VPU_MEM_POWER_DOWN);
12120 }
12121
12122 if ((vpu_delay_work_flag &
12123 VPU_DELAYWORK_MEM_POWER_OFF_VD2)
12124 && ((r & VPP_VD2_PREBLEND) == 0)) {
12125 vpu_delay_work_flag &=
12126 ~VPU_DELAYWORK_MEM_POWER_OFF_VD2;
12127
12128 switch_vpu_mem_pd_vmod(
12129 VPU_VIU_VD2,
12130 VPU_MEM_POWER_DOWN);
12131 switch_vpu_mem_pd_vmod(
12132 VPU_AFBC_DEC1,
12133 VPU_MEM_POWER_DOWN);
12134 if (!legacy_vpp)
12135 switch_vpu_mem_pd_vmod(
12136 VPU_VD2_SCALE,
12137 VPU_MEM_POWER_DOWN);
12138 }
12139
12140 if ((vpu_delay_work_flag &
12141 VPU_DELAYWORK_MEM_POWER_OFF_PROT)
12142 && ((r & VPP_VD1_PREBLEND) == 0)) {
12143 vpu_delay_work_flag &=
12144 ~VPU_DELAYWORK_MEM_POWER_OFF_PROT;
12145 }
12146 }
12147 }
12148
12149 spin_unlock_irqrestore(&delay_work_lock, flags);
12150}
12151#endif
12152
12153/*********************************************************/
12154struct device *get_video_device(void)
12155{
12156 return amvideo_dev;
12157}
12158
12159static int __init video_early_init(void)
12160{
12161 /* todo: move this to clock tree, enable VPU clock */
12162 /* WRITE_CBUS_REG(HHI_VPU_CLK_CNTL,*/
12163 /*(1<<9) | (1<<8) | (3)); // fclk_div3/4 = ~200M */
12164 /* WRITE_CBUS_REG(HHI_VPU_CLK_CNTL,*/
12165 /*(3<<9) | (1<<8) | (0)); // fclk_div7/1 = 364M*/
12166 /*moved to vpu.c, default config by dts */
12167
12168 u32 cur_hold_line;
12169
12170 if (!legacy_vpp) {
12171 WRITE_VCBUS_REG_BITS(VPP_OFIFO_SIZE, 0x1000,
12172 VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID);
12173 WRITE_VCBUS_REG_BITS(
12174 VPP_MATRIX_CTRL, 0, 10, 5);
12175 } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXTVBB))
12176 WRITE_VCBUS_REG_BITS(VPP_OFIFO_SIZE, 0xfff,
12177 VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID);
12178
12179 WRITE_VCBUS_REG(VPP_PREBLEND_VD1_H_START_END, 4096);
12180 WRITE_VCBUS_REG(VPP_BLEND_VD2_H_START_END, 4096);
12181
12182 if (is_meson_txl_cpu() || is_meson_txlx_cpu()) {
12183 /* fifo max size on txl :128*3=384[0x180] */
12184 WRITE_VCBUS_REG(
12185 VD1_IF0_LUMA_FIFO_SIZE + cur_dev->viu_off, 0x180);
12186 WRITE_VCBUS_REG(
12187 VD2_IF0_LUMA_FIFO_SIZE + cur_dev->viu_off, 0x180);
12188 }
12189
12190#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12191 WRITE_VCBUS_REG_BITS(VPP2_OFIFO_SIZE, 0x800,
12192 VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID);
12193 /*
12194 *WRITE_VCBUS_REG_BITS(VPU_OSD3_MMC_CTRL, 1, 12, 2);
12195 *select vdisp_mmc_arb for VIU2_OSD1 request
12196 */
12197 WRITE_VCBUS_REG_BITS(VPU_OSD3_MMC_CTRL, 2, 12, 2);
12198 /* select vdin_mmc_arb for VIU2_OSD1 request */
12199#endif
12200 /* default 10bit setting for gxm */
12201 if (is_meson_gxm_cpu()) {
12202 WRITE_VCBUS_REG_BITS(VIU_MISC_CTRL1, 0xff, 16, 8);
12203 WRITE_VCBUS_REG(VPP_DOLBY_CTRL, 0x22000);
12204 /*
12205 *default setting is black for dummy data1& dumy data0,
12206 *for dummy data1 the y/cb/cr data width is 10bit on gxm,
12207 *for dummy data the y/cb/cr data width is 8bit but
12208 *vpp_dummy_data will be left shift 2bit auto on gxm!!!
12209 */
12210 WRITE_VCBUS_REG(VPP_DUMMY_DATA1, 0x1020080);
12211 WRITE_VCBUS_REG(VPP_DUMMY_DATA, 0x42020);
12212 } else if (is_meson_txlx_cpu() ||
12213 cpu_after_eq(MESON_CPU_MAJOR_ID_G12A)) {
12214 /*black 10bit*/
12215 WRITE_VCBUS_REG(VPP_DUMMY_DATA, 0x4080200);
12216 }
12217 /* temp: enable VPU arb mem */
12218 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB)
12219 switch_vpu_mem_pd_vmod(VPU_VPU_ARB, VPU_MEM_POWER_ON);
12220
12221 /*disable sr default when power up*/
12222 WRITE_VCBUS_REG(VPP_SRSHARP0_CTRL, 0);
12223 WRITE_VCBUS_REG(VPP_SRSHARP1_CTRL, 0);
12224
12225 cur_hold_line = READ_VCBUS_REG(VPP_HOLD_LINES + cur_dev->vpp_off);
12226 cur_hold_line = cur_hold_line & 0xff;
12227
12228 if (cur_hold_line > 0x1f)
12229 vpp_hold_line = 0x1f;
12230 else
12231 vpp_hold_line = cur_hold_line;
12232
12233 /* Temp force set dmc */
12234 if (!legacy_vpp) {
12235 WRITE_DMCREG(
12236 DMC_AM0_CHAN_CTRL,
12237 0x8ff403cf);
12238 /* for vd1 & vd2 dummy alpha*/
12239 WRITE_VCBUS_REG(
12240 VPP_POST_BLEND_DUMMY_ALPHA,
12241 0x7fffffff);
12242 WRITE_VCBUS_REG_BITS(
12243 VPP_MISC1, 0x100, 0, 9);
12244 }
12245 if (is_meson_tl1_cpu()) {
12246 /* force bypass dolby for TL1, no dolby function */
12247 WRITE_VCBUS_REG_BITS(
12248 DOLBY_PATH_CTRL, 0xf, 0, 6);
12249 /* disable latch for sr core0/1 scaler */
12250 WRITE_VCBUS_REG_BITS(
12251 SRSHARP0_SHARP_SYNC_CTRL, 1, 0, 1);
12252 WRITE_VCBUS_REG_BITS(
12253 SRSHARP1_SHARP_SYNC_CTRL, 1, 8, 1);
12254 }
12255 if (is_meson_g12b_cpu())
12256 WRITE_VCBUS_REG_BITS(
12257 SRSHARP0_SHARP_SYNC_CTRL, 1, 0, 1);
12258 return 0;
12259}
12260
12261static struct mconfig video_configs[] = {
12262 MC_PI32("pause_one_3d_fl_frame", &pause_one_3d_fl_frame),
12263 MC_PI32("debug_flag", &debug_flag),
12264 MC_PU32("force_3d_scaler", &force_3d_scaler),
12265 MC_PU32("video_3d_format", &video_3d_format),
12266 MC_PI32("vsync_enter_line_max", &vsync_enter_line_max),
12267 MC_PI32("vsync_exit_line_max", &vsync_exit_line_max),
12268#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
12269 MC_PI32("vsync_rdma_line_max", &vsync_rdma_line_max),
12270#endif
12271 MC_PU32("underflow", &underflow),
12272 MC_PU32("next_peek_underflow", &next_peek_underflow),
12273 MC_PU32("smooth_sync_enable", &smooth_sync_enable),
12274 MC_PU32("hdmi_in_onvideo", &hdmi_in_onvideo),
12275#ifdef CONFIG_AM_VIDEO2
12276 MC_PI32("video_play_clone_rate", &video_play_clone_rate),
12277 MC_PI32("android_clone_rate", &android_clone_rate),
12278 MC_PI32("video_play_clone_rate", &video_play_clone_rate),
12279 MC_PI32("android_clone_rate", &android_clone_rate),
12280 MC_PI32("noneseamless_play_clone_rate", &noneseamless_play_clone_rate),
12281#endif
12282 MC_PU32("smooth_sync_enable", &smooth_sync_enable),
12283 MC_PU32("hdmi_in_onvideo", &hdmi_in_onvideo),
12284 MC_PI32("cur_dev_idx", &cur_dev_idx),
12285 MC_PU32("new_frame_count", &new_frame_count),
12286 MC_PU32("omx_pts", &omx_pts),
12287 MC_PU32("omx_pts_set_index", &omx_pts_set_index),
12288 MC_PBOOL("omx_run", &omx_run),
12289 MC_PU32("omx_version", &omx_version),
12290 MC_PU32("omx_info", &omx_info),
12291 MC_PI32("omx_need_drop_frame_num", &omx_need_drop_frame_num),
12292 MC_PBOOL("omx_drop_done", &omx_drop_done),
12293 MC_PI32("omx_pts_interval_upper", &omx_pts_interval_upper),
12294 MC_PI32("omx_pts_interval_lower", &omx_pts_interval_lower),
12295 MC_PBOOL("bypass_pps", &bypass_pps),
12296 MC_PBOOL("platform_type", &platform_type),
12297 MC_PU32("process_3d_type", &process_3d_type),
12298 MC_PU32("omx_pts", &omx_pts),
12299 MC_PU32("framepacking_support", &framepacking_support),
12300 MC_PU32("framepacking_width", &framepacking_width),
12301 MC_PU32("framepacking_height", &framepacking_height),
12302 MC_PU32("framepacking_blank", &framepacking_blank),
12303 MC_PU32("video_seek_flag", &video_seek_flag),
12304 MC_PU32("slowsync_repeat_enable", &slowsync_repeat_enable),
12305 MC_PU32("toggle_count", &toggle_count),
12306 MC_PBOOL("show_first_frame_nosync", &show_first_frame_nosync),
12307#ifdef TV_REVERSE
12308 MC_PBOOL("reverse", &reverse),
12309#endif
12310};
12311
12312#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
12313static void video_early_suspend(struct early_suspend *h)
12314{
12315 DisableVideoLayer();
12316 DisableVideoLayer2();
12317 pr_info("video_early_suspend ok\n");
12318}
12319
12320static void video_late_resume(struct early_suspend *h)
12321{
12322 pr_info("video_late_resume ok\n");
12323};
12324
12325static struct early_suspend video_early_suspend_handler = {
12326 .suspend = video_early_suspend,
12327 .resume = video_late_resume,
12328};
12329#endif
12330
12331static int amvideom_probe(struct platform_device *pdev)
12332{
12333 int ret = 0;
12334
12335 video_early_init();
12336
12337 DisableVideoLayer();
12338 DisableVideoLayer2();
12339
12340 /* get interrupt resource */
12341 video_vsync = platform_get_irq_byname(pdev, "vsync");
12342 if (video_vsync == -ENXIO) {
12343 pr_info("cannot get amvideom irq resource\n");
12344
12345 return video_vsync;
12346 }
12347
12348 pr_info("amvideom vsync irq: %d\n", video_vsync);
12349
12350#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
12351 register_early_suspend(&video_early_suspend_handler);
12352#endif
12353 return ret;
12354}
12355
12356static int amvideom_remove(struct platform_device *pdev)
12357{
12358#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
12359 unregister_early_suspend(&video_early_suspend_handler);
12360#endif
12361 return 0;
12362}
12363
12364static const struct of_device_id amlogic_amvideom_dt_match[] = {
12365 {
12366 .compatible = "amlogic, amvideom",
12367 },
12368 {},
12369};
12370
12371static struct platform_driver amvideom_driver = {
12372 .probe = amvideom_probe,
12373 .remove = amvideom_remove,
12374 .driver = {
12375 .name = "amvideom",
12376 .of_match_table = amlogic_amvideom_dt_match,
12377 }
12378};
12379
12380static int __init video_init(void)
12381{
12382 int r = 0, i;
12383 /*
12384 *#ifdef CONFIG_ARCH_MESON1
12385 *ulong clk = clk_get_rate(clk_get_sys("clk_other_pll", NULL));
12386 *#elif !defined(CONFIG_ARCH_MESON3) && !defined(CONFIG_ARCH_MESON6)
12387 *ulong clk = clk_get_rate(clk_get_sys("clk_misc_pll", NULL));
12388 *#endif
12389 */
12390
12391#ifdef CONFIG_ARCH_MESON1
12392 no to here ulong clk =
12393 clk_get_rate(clk_get_sys("clk_other_pll", NULL));
12394#elif defined(CONFIG_ARCH_MESON2)
12395 not to here ulong clk =
12396 clk_get_rate(clk_get_sys("clk_misc_pll", NULL));
12397#endif
12398 /* #if !defined(CONFIG_ARCH_MESON3) && !defined(CONFIG_ARCH_MESON6) */
12399#if 0 /* MESON_CPU_TYPE <= MESON_CPU_TYPE_MESON2 */
12400 /* MALI clock settings */
12401 if ((clk <= 750000000) && (clk >= 600000000)) {
12402 WRITE_VCBUS_REG(HHI_MALI_CLK_CNTL,
12403 (2 << 9) | /* select misc pll as clock source */
12404 (1 << 8) | /* enable clock gating */
12405 (2 << 0)); /* Misc clk / 3 */
12406 } else {
12407 WRITE_VCBUS_REG(HHI_MALI_CLK_CNTL,
12408 (3 << 9) | /* select DDR clock as clock source */
12409 (1 << 8) | /* enable clock gating */
12410 (1 << 0)); /* DDR clk / 2 */
12411 }
12412#endif
12413
12414 if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
12415 || is_meson_tl1_cpu()) {
12416 cur_dev->viu_off = 0x3200 - 0x1a50;
12417 legacy_vpp = false;
12418 }
12419 if (platform_driver_register(&amvideom_driver)) {
12420 pr_info("failed to amvideom driver!\n");
12421 return -ENODEV;
12422 }
12423
12424 /* check super scaler support status */
12425 vpp_super_scaler_support();
12426 /* adaptive config bypass ratio */
12427 vpp_bypass_ratio_config();
12428
12429#ifndef CONFIG_AM_VIDEO2
12430 /*DisableVPP2VideoLayer();*/
12431#endif
12432
12433 cur_dispbuf = NULL;
12434 cur_dispbuf2 = NULL;
12435 amvideo_register_client(&amvideo_notifier);
12436
12437#ifdef FIQ_VSYNC
12438 /* enable fiq bridge */
12439 vsync_fiq_bridge.handle = vsync_bridge_isr;
12440 vsync_fiq_bridge.key = (u32) vsync_bridge_isr;
12441 vsync_fiq_bridge.name = "vsync_bridge_isr";
12442
12443 r = register_fiq_bridge_handle(&vsync_fiq_bridge);
12444
12445 if (r) {
12446 amlog_level(LOG_LEVEL_ERROR,
12447 "video fiq bridge register error.\n");
12448 r = -ENOENT;
12449 goto err0;
12450 }
12451#endif
12452
12453 /* sysfs node creation */
12454 r = class_register(&amvideo_poll_class);
12455 if (r) {
12456 amlog_level(LOG_LEVEL_ERROR, "create video_poll class fail.\n");
12457#ifdef FIQ_VSYNC
12458 free_irq(BRIDGE_IRQ, (void *)video_dev_id);
12459#else
12460 free_irq(INT_VIU_VSYNC, (void *)video_dev_id);
12461#endif
12462 goto err1;
12463 }
12464
12465 r = class_register(&amvideo_class);
12466 if (r) {
12467 amlog_level(LOG_LEVEL_ERROR, "create video class fail.\n");
12468#ifdef FIQ_VSYNC
12469 free_irq(BRIDGE_IRQ, (void *)video_dev_id);
12470#else
12471 free_irq(INT_VIU_VSYNC, (void *)video_dev_id);
12472#endif
12473 goto err1;
12474 }
12475
12476 /* create video device */
12477 r = register_chrdev(AMVIDEO_MAJOR, "amvideo", &amvideo_fops);
12478 if (r < 0) {
12479 amlog_level(LOG_LEVEL_ERROR,
12480 "Can't register major for amvideo device\n");
12481 goto err2;
12482 }
12483
12484 r = register_chrdev(0, "amvideo_poll", &amvideo_poll_fops);
12485 if (r < 0) {
12486 amlog_level(LOG_LEVEL_ERROR,
12487 "Can't register major for amvideo_poll device\n");
12488 goto err3;
12489 }
12490
12491 amvideo_poll_major = r;
12492
12493 amvideo_dev = device_create(&amvideo_class, NULL,
12494 MKDEV(AMVIDEO_MAJOR, 0), NULL, DEVICE_NAME);
12495
12496 if (IS_ERR(amvideo_dev)) {
12497 amlog_level(LOG_LEVEL_ERROR, "Can't create amvideo device\n");
12498 goto err4;
12499 }
12500
12501 amvideo_poll_dev = device_create(&amvideo_poll_class, NULL,
12502 MKDEV(amvideo_poll_major, 0), NULL, "amvideo_poll");
12503
12504 if (IS_ERR(amvideo_poll_dev)) {
12505 amlog_level(LOG_LEVEL_ERROR,
12506 "Can't create amvideo_poll device\n");
12507 goto err5;
12508 }
12509
12510 /* make vd1 below vd2 */
12511 for (i = 0; i < MAX_VD_LAYERS; i++) {
12512 vpp_disp_info_init(&glayer_info[i], i);
12513 glayer_info[i].wide_mode = 1;
12514 glayer_info[i].zorder = reference_zorder - 2 + i;
12515 glayer_info[i].cur_sel_port = i;
12516 glayer_info[i].last_sel_port = i;
12517 }
12518
12519 if (legacy_vpp)
12520 layer_cap =
12521 LAYER1_AFBC |
12522 LAYER1_AVAIL |
12523 LAYER0_AFBC |
12524 LAYER0_SCALER |
12525 LAYER0_AVAIL;
12526 else if (is_meson_tl1_cpu())
12527 layer_cap =
12528 LAYER1_AVAIL |
12529 LAYER0_AFBC |
12530 LAYER0_SCALER |
12531 LAYER0_AVAIL;
12532 else
12533 layer_cap =
12534 LAYER1_AFBC |
12535 LAYER1_SCALER |
12536 LAYER1_AVAIL |
12537 LAYER0_AFBC |
12538 LAYER0_SCALER |
12539 LAYER0_AVAIL;
12540
12541 init_waitqueue_head(&amvideo_trick_wait);
12542 init_waitqueue_head(&amvideo_sizechange_wait);
12543#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
12544 INIT_WORK(&vpu_delay_work, do_vpu_delay_work);
12545#endif
12546
12547#ifdef CONFIG_AM_VOUT
12548 vout_hook();
12549#endif
12550
12551#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
12552 dispbuf_to_put_num = DISPBUF_TO_PUT_MAX;
12553 while (dispbuf_to_put_num > 0) {
12554 dispbuf_to_put_num--;
12555 dispbuf_to_put[dispbuf_to_put_num] = NULL;
12556 }
12557
12558 disp_canvas[0][0] =
12559 (disp_canvas_index[0][2] << 16) | (disp_canvas_index[0][1] << 8) |
12560 disp_canvas_index[0][0];
12561 disp_canvas[0][1] =
12562 (disp_canvas_index[0][5] << 16) | (disp_canvas_index[0][4] << 8) |
12563 disp_canvas_index[0][3];
12564
12565 disp_canvas[1][0] =
12566 (disp_canvas_index[1][2] << 16) | (disp_canvas_index[1][1] << 8) |
12567 disp_canvas_index[1][0];
12568 disp_canvas[1][1] =
12569 (disp_canvas_index[1][5] << 16) | (disp_canvas_index[1][4] << 8) |
12570 disp_canvas_index[1][3];
12571#else
12572
12573 disp_canvas[0] =
12574 (disp_canvas_index[2] << 16) | (disp_canvas_index[1] << 8) |
12575 disp_canvas_index[0];
12576 disp_canvas[1] =
12577 (disp_canvas_index[5] << 16) | (disp_canvas_index[4] << 8) |
12578 disp_canvas_index[3];
12579#endif
12580
12581 vsync_fiq_up();
12582#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12583 vsync2_fiq_up();
12584#endif
12585
12586 vf_receiver_init(&video_vf_recv, RECEIVER_NAME, &video_vf_receiver,
12587 NULL);
12588 vf_reg_receiver(&video_vf_recv);
12589
12590#ifdef VIDEO_PIP
12591 vf_receiver_init(
12592 &videopip_vf_recv, RECEIVERPIP_NAME,
12593 &videopip_vf_receiver, NULL);
12594 vf_reg_receiver(&videopip_vf_recv);
12595#endif
12596
12597#if DEBUG_TMP
12598 switch_dev_register(&video1_state_sdev);
12599 switch_set_state(&video1_state_sdev, 0);
12600#endif
12601 video_keeper_init();
12602#ifdef CONFIG_AM_VIDEO2
12603 set_clone_frame_rate(android_clone_rate, 0);
12604#endif
12605 REG_PATH_CONFIGS("media.video", video_configs);
12606 video_debugfs_init();
12607 return 0;
12608 err5:
12609 device_destroy(&amvideo_class, MKDEV(AMVIDEO_MAJOR, 0));
12610 err4:
12611 unregister_chrdev(amvideo_poll_major, "amvideo_poll");
12612 err3:
12613 unregister_chrdev(AMVIDEO_MAJOR, DEVICE_NAME);
12614
12615 err2:
12616#ifdef FIQ_VSYNC
12617 unregister_fiq_bridge_handle(&vsync_fiq_bridge);
12618#endif
12619 class_unregister(&amvideo_class);
12620 err1:
12621 class_unregister(&amvideo_poll_class);
12622#ifdef FIQ_VSYNC
12623 err0:
12624#endif
12625 amvideo_unregister_client(&amvideo_notifier);
12626 platform_driver_unregister(&amvideom_driver);
12627
12628 return r;
12629}
12630
12631
12632static void __exit video_exit(void)
12633{
12634 video_debugfs_exit();
12635 vf_unreg_receiver(&video_vf_recv);
12636
12637#ifdef VIDEO_PIP
12638 vf_unreg_receiver(&videopip_vf_recv);
12639#endif
12640 DisableVideoLayer();
12641 DisableVideoLayer2();
12642
12643 vsync_fiq_down();
12644#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12645 vsync2_fiq_down();
12646#endif
12647 device_destroy(&amvideo_class, MKDEV(AMVIDEO_MAJOR, 0));
12648 device_destroy(&amvideo_poll_class, MKDEV(amvideo_poll_major, 0));
12649
12650 unregister_chrdev(AMVIDEO_MAJOR, DEVICE_NAME);
12651 unregister_chrdev(amvideo_poll_major, "amvideo_poll");
12652
12653#ifdef FIQ_VSYNC
12654 unregister_fiq_bridge_handle(&vsync_fiq_bridge);
12655#endif
12656
12657 class_unregister(&amvideo_class);
12658 class_unregister(&amvideo_poll_class);
12659 amvideo_unregister_client(&amvideo_notifier);
12660}
12661
12662
12663
12664MODULE_PARM_DESC(debug_flag, "\n debug_flag\n");
12665module_param(debug_flag, uint, 0664);
12666
12667#ifdef TV_3D_FUNCTION_OPEN
12668MODULE_PARM_DESC(force_3d_scaler, "\n force_3d_scaler\n");
12669module_param(force_3d_scaler, uint, 0664);
12670
12671MODULE_PARM_DESC(video_3d_format, "\n video_3d_format\n");
12672module_param(video_3d_format, uint, 0664);
12673
12674#endif
12675
12676MODULE_PARM_DESC(vsync_enter_line_max, "\n vsync_enter_line_max\n");
12677module_param(vsync_enter_line_max, uint, 0664);
12678
12679MODULE_PARM_DESC(vsync_exit_line_max, "\n vsync_exit_line_max\n");
12680module_param(vsync_exit_line_max, uint, 0664);
12681
12682#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
12683MODULE_PARM_DESC(vsync_rdma_line_max, "\n vsync_rdma_line_max\n");
12684module_param(vsync_rdma_line_max, uint, 0664);
12685#endif
12686
12687module_param(underflow, uint, 0664);
12688MODULE_PARM_DESC(underflow, "\n Underflow count\n");
12689
12690module_param(next_peek_underflow, uint, 0664);
12691MODULE_PARM_DESC(skip, "\n Underflow count\n");
12692
12693module_param(hdmiin_frame_check, uint, 0664);
12694MODULE_PARM_DESC(hdmiin_frame_check, "\n hdmiin_frame_check\n");
12695
12696module_param(step_enable, uint, 0664);
12697MODULE_PARM_DESC(step_enable, "\n step_enable\n");
12698
12699module_param(step_flag, uint, 0664);
12700MODULE_PARM_DESC(step_flag, "\n step_flag\n");
12701
12702/*arch_initcall(video_early_init);*/
12703
12704module_init(video_init);
12705module_exit(video_exit);
12706
12707MODULE_PARM_DESC(smooth_sync_enable, "\n smooth_sync_enable\n");
12708module_param(smooth_sync_enable, uint, 0664);
12709
12710MODULE_PARM_DESC(hdmi_in_onvideo, "\n hdmi_in_onvideo\n");
12711module_param(hdmi_in_onvideo, uint, 0664);
12712
12713#ifdef CONFIG_AM_VIDEO2
12714MODULE_PARM_DESC(video_play_clone_rate, "\n video_play_clone_rate\n");
12715module_param(video_play_clone_rate, uint, 0664);
12716
12717MODULE_PARM_DESC(android_clone_rate, "\n android_clone_rate\n");
12718module_param(android_clone_rate, uint, 0664);
12719
12720MODULE_PARM_DESC(noneseamless_play_clone_rate,
12721 "\n noneseamless_play_clone_rate\n");
12722module_param(noneseamless_play_clone_rate, uint, 0664);
12723
12724#endif
12725MODULE_PARM_DESC(vsync_count, "\n vsync_count\n");
12726module_param(vsync_count, uint, 0664);
12727
12728
12729MODULE_PARM_DESC(cur_dev_idx, "\n cur_dev_idx\n");
12730module_param(cur_dev_idx, uint, 0664);
12731
12732MODULE_PARM_DESC(new_frame_count, "\n new_frame_count\n");
12733module_param(new_frame_count, uint, 0664);
12734
12735MODULE_PARM_DESC(first_frame_toggled, "\n first_frame_toggled\n");
12736module_param(first_frame_toggled, uint, 0664);
12737
12738MODULE_PARM_DESC(omx_pts, "\n omx_pts\n");
12739module_param(omx_pts, uint, 0664);
12740
12741MODULE_PARM_DESC(omx_run, "\n omx_run\n");
12742module_param(omx_run, bool, 0664);
12743
12744MODULE_PARM_DESC(omx_pts_set_index, "\n omx_pts_set_index\n");
12745module_param(omx_pts_set_index, uint, 0664);
12746
12747MODULE_PARM_DESC(omx_version, "\n omx_version\n");
12748module_param(omx_version, uint, 0664);
12749
12750MODULE_PARM_DESC(omx_info, "\n omx_info\n");
12751module_param(omx_info, uint, 0664);
12752
12753MODULE_PARM_DESC(omx_need_drop_frame_num, "\n omx_need_drop_frame_num\n");
12754module_param(omx_need_drop_frame_num, int, 0664);
12755
12756MODULE_PARM_DESC(omx_drop_done, "\n omx_drop_done\n");
12757module_param(omx_drop_done, bool, 0664);
12758
12759MODULE_PARM_DESC(omx_pts_interval_upper, "\n omx_pts_interval\n");
12760module_param(omx_pts_interval_upper, int, 0664);
12761
12762MODULE_PARM_DESC(omx_pts_interval_lower, "\n omx_pts_interval\n");
12763module_param(omx_pts_interval_lower, int, 0664);
12764
12765MODULE_PARM_DESC(drop_frame_count, "\n drop_frame_count\n");
12766module_param(drop_frame_count, int, 0664);
12767
12768MODULE_PARM_DESC(receive_frame_count, "\n receive_frame_count\n");
12769module_param(receive_frame_count, int, 0664);
12770
12771MODULE_PARM_DESC(display_frame_count, "\n display_frame_count\n");
12772module_param(display_frame_count, int, 0664);
12773
12774MODULE_PARM_DESC(bypass_pps, "\n pps_bypass\n");
12775module_param(bypass_pps, bool, 0664);
12776
12777MODULE_PARM_DESC(platform_type, "\n platform_type\n");
12778module_param(platform_type, bool, 0664);
12779
12780MODULE_PARM_DESC(process_3d_type, "\n process_3d_type\n");
12781module_param(process_3d_type, uint, 0664);
12782
12783
12784MODULE_PARM_DESC(framepacking_support, "\n framepacking_support\n");
12785module_param(framepacking_support, uint, 0664);
12786
12787MODULE_PARM_DESC(framepacking_width, "\n framepacking_width\n");
12788module_param(framepacking_width, uint, 0664);
12789
12790MODULE_PARM_DESC(framepacking_height, "\n framepacking_height\n");
12791module_param(framepacking_height, uint, 0664);
12792
12793MODULE_PARM_DESC(framepacking_blank, "\n framepacking_blank\n");
12794module_param(framepacking_blank, uint, 0664);
12795
12796MODULE_PARM_DESC(bypass_cm, "\n bypass_cm\n");
12797module_param(bypass_cm, bool, 0664);
12798
12799#ifdef TV_REVERSE
12800module_param(reverse, bool, 0644);
12801MODULE_PARM_DESC(reverse, "reverse /disable reverse");
12802#endif
12803
12804MODULE_PARM_DESC(toggle_count, "\n toggle count\n");
12805module_param(toggle_count, uint, 0664);
12806
12807MODULE_PARM_DESC(vpp_hold_line, "\n vpp_hold_line\n");
12808module_param(vpp_hold_line, uint, 0664);
12809
12810MODULE_PARM_DESC(stop_update, "\n stop_update\n");
12811module_param(stop_update, uint, 0664);
12812
12813MODULE_PARM_DESC(reference_zorder, "\n reference_zorder\n");
12814module_param(reference_zorder, uint, 0664);
12815
12816MODULE_DESCRIPTION("AMLOGIC video output driver");
12817MODULE_LICENSE("GPL");
12818MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>");
12819
generated by cgit at 2024-05-17 02:11:03 (GMT)