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path: root/drivers/amlogic/media/video_sink/video.c (plain)
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1/*
2 * drivers/amlogic/media/video_sink/video.c
3 *
4 * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18#include <linux/version.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/spinlock.h>
22#include <linux/interrupt.h>
23#include <linux/fs.h>
24#include <linux/string.h>
25#include <linux/io.h>
26#include <linux/mm.h>
27#include <linux/amlogic/major.h>
28#include <linux/err.h>
29#include <linux/mutex.h>
30#include <linux/platform_device.h>
31#include <linux/ctype.h>
32#include <linux/amlogic/media/frame_sync/ptsserv.h>
33#include <linux/amlogic/media/frame_sync/timestamp.h>
34#include <linux/amlogic/media/frame_sync/tsync.h>
35#include <linux/amlogic/media/vfm/vframe.h>
36#include <linux/amlogic/media/vfm/vframe_provider.h>
37#include <linux/amlogic/media/vfm/vframe_receiver.h>
38#include <linux/amlogic/media/utils/amstream.h>
39#include <linux/amlogic/media/vout/vout_notify.h>
40#include <linux/sched.h>
41#include <linux/slab.h>
42#include <linux/poll.h>
43#include <linux/clk.h>
44#include <linux/debugfs.h>
45#include <linux/amlogic/media/canvas/canvas.h>
46#include <linux/amlogic/media/canvas/canvas_mgr.h>
47#include <linux/dma-mapping.h>
48#include <linux/dma-contiguous.h>
49#include <linux/sched.h>
50#include <linux/amlogic/media/video_sink/video_keeper.h>
51#include "video_priv.h"
52
53#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
54#include <linux/amlogic/media/amvecm/amvecm.h>
55#endif
56#include <linux/amlogic/media/utils/vdec_reg.h>
57
58#ifdef CONFIG_PM
59#include <linux/delay.h>
60#include <linux/pm.h>
61#endif
62
63#include <linux/amlogic/media/registers/register.h>
64#include <linux/uaccess.h>
65#include <linux/amlogic/media/utils/amports_config.h>
66#include <linux/amlogic/media/vpu/vpu.h>
67#include "videolog.h"
68#ifdef CONFIG_AMLOGIC_MEDIA_VIDEOCAPTURE
69#include "amvideocap_priv.h"
70#endif
71#ifdef CONFIG_AM_VIDEO_LOG
72#define AMLOG
73#endif
74#include <linux/amlogic/media/utils/amlog.h>
75MODULE_AMLOG(LOG_LEVEL_ERROR, 0, LOG_DEFAULT_LEVEL_DESC, LOG_MASK_DESC);
76
77#include <linux/amlogic/media/video_sink/vpp.h>
78#include "linux/amlogic/media/frame_provider/tvin/tvin_v4l2.h"
79#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
80#define DISPLAY_CANVAS_BASE_INDEX2 0x10
81#define DISPLAY_CANVAS_MAX_INDEX2 0x15
82#include "../common/rdma/rdma.h"
83#endif
84#include <linux/amlogic/media/video_sink/video.h>
85#include <linux/amlogic/media/codec_mm/configs.h>
86
87#include "../common/vfm/vfm.h"
88#include <linux/amlogic/media/amdolbyvision/dolby_vision.h>
89
90#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
91#include <linux/amlogic/pm.h>
92#endif
93
94#define VIDEO_PIP
95
96static u32 osd_vpp_misc;
97static u32 osd_vpp_misc_mask;
98static bool update_osd_vpp_misc;
99int video_vsync = -ENXIO;
100/*global video manage cmd. */
101
102static bool legacy_vpp = true;
103
104#define DEBUG_TMP 0
105
106static int video_global_output = 1;
107/* video_pause_global: 0 is play, 1 is pause, 2 is invalid */
108static int video_pause_global = 1;
109
110#ifdef CONFIG_GE2D_KEEP_FRAME
111/* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */
112/* #include <mach/mod_gate.h> */
113/* #endif */
114/* #include "mach/meson-secure.h" */
115#endif
116
117#if 1
118/*TODO for logo*/
119struct platform_resource_s {
120 char name[10];
121 int mem_start;
122 int mem_end;
123};
124#endif
125
126struct video_frame_detect_s {
127 u32 interrupt_count;
128 u32 start_receive_count;
129};
130
131static int debugflags;
132static int output_fps;
133static u32 omx_pts;
134static u32 omx_pts_set_index;
135static bool omx_run;
136static u32 omx_version = 3;
137#define OMX_PTS_DV_DEFAULT_UPPER 2500
138#define OMX_PTS_DV_DEFAULT_LOWER -1600
139static int omx_pts_interval_upper = 11000;
140static int omx_pts_interval_lower = -5500;
141static int omx_pts_dv_upper = OMX_PTS_DV_DEFAULT_UPPER;
142static int omx_pts_dv_lower = OMX_PTS_DV_DEFAULT_LOWER;
143static int omx_pts_set_from_hwc_count;
144static bool omx_check_previous_session;
145static u32 omx_cur_session = 0xffffffff;
146static int drop_frame_count;
147#define OMX_MAX_COUNT_RESET_SYSTEMTIME 2
148static int receive_frame_count;
149static int display_frame_count;
150static int omx_need_drop_frame_num;
151static bool omx_drop_done;
152static bool video_start_post;
153static bool videopeek;
154static bool nopostvideostart;
155static struct video_frame_detect_s video_frame_detect;
156
157/*----omx_info bit0: keep_last_frame, bit1~31: unused----*/
158static u32 omx_info = 0x1;
159
160#define ENABLE_UPDATE_HDR_FROM_USER 0
161#if ENABLE_UPDATE_HDR_FROM_USER
162static struct vframe_master_display_colour_s vf_hdr;
163static bool has_hdr_info;
164#endif
165static DEFINE_MUTEX(omx_mutex);
166
167#define DURATION_GCD 750
168
169static bool bypass_cm;
170
171static bool bypass_pps = true;
172/*For 3D usage ----0: mbx 1: tv */
173bool platform_type = 1;
174
175/* for bit depth setting. */
176int bit_depth_flag = 8;
177
178bool omx_secret_mode;
179#define DEBUG_FLAG_FFPLAY (1<<0)
180#define DEBUG_FLAG_CALC_PTS_INC (1<<1)
181
182#define RECEIVER_NAME "amvideo"
183
184static s32 amvideo_poll_major;
185/*static s8 dolby_first_delay;*/ /* for bug 145902 */
186
187static int video_receiver_event_fun(int type, void *data, void *);
188
189static const struct vframe_receiver_op_s video_vf_receiver = {
190 .event_cb = video_receiver_event_fun
191};
192
193static struct vframe_receiver_s video_vf_recv;
194
195#ifdef VIDEO_PIP
196#define RECEIVERPIP_NAME "videopip"
197static int pip_receiver_event_fun(int type, void *data, void *);
198
199static const struct vframe_receiver_op_s videopip_vf_receiver = {
200 .event_cb = pip_receiver_event_fun
201};
202
203static struct vframe_receiver_s videopip_vf_recv;
204
205static struct vpp_frame_par_s *curpip_frame_par, *nextpip_frame_par;
206static struct vpp_frame_par_s pip_frame_parms[2];
207static struct vframe_s *cur_pipbuf;
208static struct vframe_s local_pip;
209static int _videopip_set_disable(u32 val);
210#endif
211
212static struct device *amvideo_dev;
213static struct device *amvideo_poll_dev;
214
215#define DRIVER_NAME "amvideo"
216#define MODULE_NAME "amvideo"
217#define DEVICE_NAME "amvideo"
218
219#ifdef CONFIG_AML_VSYNC_FIQ_ENABLE
220#define FIQ_VSYNC
221#endif
222
223/* #define SLOW_SYNC_REPEAT */
224/* #define INTERLACE_FIELD_MATCH_PROCESS */
225bool disable_slow_sync;
226
227#ifdef INTERLACE_FIELD_MATCH_PROCESS
228#define FIELD_MATCH_THRESHOLD 10
229static int field_matching_count;
230#endif
231
232#define M_PTS_SMOOTH_MAX 45000
233#define M_PTS_SMOOTH_MIN 2250
234#define M_PTS_SMOOTH_ADJUST 900
235static u32 underflow;
236static u32 next_peek_underflow;
237
238#define VIDEO_ENABLE_STATE_IDLE 0
239#define VIDEO_ENABLE_STATE_ON_REQ 1
240#define VIDEO_ENABLE_STATE_ON_PENDING 2
241#define VIDEO_ENABLE_STATE_OFF_REQ 3
242
243static DEFINE_SPINLOCK(video_onoff_lock);
244static int video_onoff_state = VIDEO_ENABLE_STATE_IDLE;
245static u32 video_onoff_time;
246static DEFINE_SPINLOCK(video2_onoff_lock);
247static int video2_onoff_state = VIDEO_ENABLE_STATE_IDLE;
248static u32 hdmiin_frame_check;
249static u32 hdmiin_frame_check_cnt;
250
251
252/*frame_detect_flag: 1 enable, 0 disable */
253/*frame_detect_time: */
254/* How often "frame_detect_receive_count" and */
255/* "frame_detect_drop_count" are updated, suggested set 1(s) */
256/*frame_detect_fps: Set fps based on the video file, */
257/* If the FPS is 60, set it to 60000. */
258/*frame_detect_receive_count: */
259/* The number of frame that should be obtained during the test time. */
260/*frame_detect_drop_count: */
261/* The number of frame lost during test time. */
262
263
264static u32 frame_detect_flag;
265static u32 frame_detect_time = 1;
266static u32 frame_detect_fps = 60000;
267static u32 frame_detect_receive_count;
268static u32 frame_detect_drop_count;
269
270#ifdef FIQ_VSYNC
271#define BRIDGE_IRQ INT_TIMER_C
272#define BRIDGE_IRQ_SET() WRITE_CBUS_REG(ISA_TIMERC, 1)
273#endif
274
275#define VD1_MEM_POWER_ON() \
276 do { \
277 unsigned long flags; \
278 spin_lock_irqsave(&delay_work_lock, flags); \
279 vpu_delay_work_flag &= ~VPU_DELAYWORK_MEM_POWER_OFF_VD1; \
280 spin_unlock_irqrestore(&delay_work_lock, flags); \
281 switch_vpu_mem_pd_vmod(VPU_VIU_VD1, VPU_MEM_POWER_ON); \
282 switch_vpu_mem_pd_vmod(VPU_AFBC_DEC, VPU_MEM_POWER_ON); \
283 switch_vpu_mem_pd_vmod(VPU_DI_POST, VPU_MEM_POWER_ON); \
284 if (!legacy_vpp) \
285 switch_vpu_mem_pd_vmod( \
286 VPU_VD1_SCALE, VPU_MEM_POWER_ON); \
287 } while (0)
288#define VD2_MEM_POWER_ON() \
289 do { \
290 unsigned long flags; \
291 spin_lock_irqsave(&delay_work_lock, flags); \
292 vpu_delay_work_flag &= ~VPU_DELAYWORK_MEM_POWER_OFF_VD2; \
293 spin_unlock_irqrestore(&delay_work_lock, flags); \
294 switch_vpu_mem_pd_vmod(VPU_VIU_VD2, VPU_MEM_POWER_ON); \
295 switch_vpu_mem_pd_vmod(VPU_AFBC_DEC1, VPU_MEM_POWER_ON); \
296 if (!legacy_vpp) \
297 switch_vpu_mem_pd_vmod( \
298 VPU_VD2_SCALE, VPU_MEM_POWER_ON); \
299 } while (0)
300#define VD1_MEM_POWER_OFF() \
301 do { \
302 unsigned long flags; \
303 spin_lock_irqsave(&delay_work_lock, flags); \
304 vpu_delay_work_flag |= VPU_DELAYWORK_MEM_POWER_OFF_VD1; \
305 vpu_mem_power_off_count = VPU_MEM_POWEROFF_DELAY; \
306 spin_unlock_irqrestore(&delay_work_lock, flags); \
307 } while (0)
308#define VD2_MEM_POWER_OFF() \
309 do { \
310 unsigned long flags; \
311 spin_lock_irqsave(&delay_work_lock, flags); \
312 vpu_delay_work_flag |= VPU_DELAYWORK_MEM_POWER_OFF_VD2; \
313 vpu_mem_power_off_count = VPU_MEM_POWEROFF_DELAY; \
314 spin_unlock_irqrestore(&delay_work_lock, flags); \
315 } while (0)
316
317#define VIDEO_LAYER_ON() \
318 do { \
319 unsigned long flags; \
320 spin_lock_irqsave(&video_onoff_lock, flags); \
321 video_onoff_state = VIDEO_ENABLE_STATE_ON_REQ; \
322 video_enabled = 1; \
323 video_status_saved = 1; \
324 spin_unlock_irqrestore(&video_onoff_lock, flags); \
325 } while (0)
326
327#define VIDEO_LAYER_OFF() \
328 do { \
329 unsigned long flags; \
330 spin_lock_irqsave(&video_onoff_lock, flags); \
331 video_onoff_state = VIDEO_ENABLE_STATE_OFF_REQ; \
332 video_enabled = 0; \
333 video_status_saved = 0; \
334 spin_unlock_irqrestore(&video_onoff_lock, flags); \
335 } while (0)
336
337#define VIDEO_LAYER2_ON() \
338 do { \
339 unsigned long flags; \
340 spin_lock_irqsave(&video2_onoff_lock, flags); \
341 video2_onoff_state = VIDEO_ENABLE_STATE_ON_REQ; \
342 video2_enabled = 1; \
343 video2_status_saved = 1; \
344 spin_unlock_irqrestore(&video2_onoff_lock, flags); \
345 } while (0)
346
347#define VIDEO_LAYER2_OFF() \
348 do { \
349 unsigned long flags; \
350 spin_lock_irqsave(&video2_onoff_lock, flags); \
351 video2_onoff_state = VIDEO_ENABLE_STATE_OFF_REQ; \
352 video2_enabled = 0; \
353 video2_status_saved = 0; \
354 spin_unlock_irqrestore(&video2_onoff_lock, flags); \
355 } while (0)
356
357#define EnableVideoLayer() \
358 do { \
359 VD1_MEM_POWER_ON(); \
360 VIDEO_LAYER_ON(); \
361 } while (0)
362
363#define EnableVideoLayer2() \
364 do { \
365 VD2_MEM_POWER_ON(); \
366 VIDEO_LAYER2_ON(); \
367 } while (0)
368
369#define VSYNC_EnableVideoLayer2() \
370 do { \
371 VD2_MEM_POWER_ON(); \
372 VSYNC_WR_MPEG_REG(VPP_MISC + cur_dev->vpp_off, \
373 READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off) |\
374 VPP_VD2_PREBLEND | (0x1ff << VPP_VD2_ALPHA_BIT)); \
375 } while (0)
376
377#define DisableVideoLayer() \
378 do { \
379 CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
380 VPP_VD1_PREBLEND | VPP_VD1_POSTBLEND); \
381 if (!legacy_vpp) { \
382 WRITE_VCBUS_REG( \
383 VD1_BLEND_SRC_CTRL + cur_dev->vpp_off, 0); \
384 } \
385 WRITE_VCBUS_REG(AFBC_ENABLE, 0);\
386 VIDEO_LAYER_OFF(); \
387 VD1_MEM_POWER_OFF(); \
388 if (debug_flag & DEBUG_FLAG_BLACKOUT) { \
389 pr_info("DisableVideoLayer()\n"); \
390 } \
391 } while (0)
392
393#define DisableVideoLayer_NoDelay() \
394 do { \
395 CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
396 VPP_VD1_PREBLEND | VPP_VD2_PREBLEND|\
397 VPP_VD2_POSTBLEND | VPP_VD1_POSTBLEND); \
398 if (!legacy_vpp) { \
399 WRITE_VCBUS_REG( \
400 VD1_BLEND_SRC_CTRL + cur_dev->vpp_off, 0); \
401 } \
402 WRITE_VCBUS_REG(AFBC_ENABLE, 0);\
403 if (debug_flag & DEBUG_FLAG_BLACKOUT) { \
404 pr_info("DisableVideoLayer_NoDelay()\n"); \
405 } \
406 } while (0)
407
408#define DisableVideoLayer2() \
409 do { \
410 CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
411 VPP_VD2_POSTBLEND | VPP_VD2_PREBLEND); \
412 VIDEO_LAYER2_OFF(); \
413 VD2_MEM_POWER_OFF(); \
414 } while (0)
415
416#define DisableVideoLayer_PREBELEND() \
417 do { CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
418 VPP_VD1_PREBLEND | VPP_VD2_PREBLEND); \
419 WRITE_VCBUS_REG(AFBC_ENABLE, 0);\
420 if (debug_flag & DEBUG_FLAG_BLACKOUT) { \
421 pr_info("DisableVideoLayer_PREBELEND()\n"); \
422 } \
423 } while (0)
424
425/*********************************************************/
426#if DEBUG_TMP
427static struct switch_dev video1_state_sdev = {
428/* android video layer switch device */
429 .name = "video_layer1",
430};
431#endif
432
433static DEFINE_MUTEX(video_layer_mutex);
434
435static u32 layer_cap;
436
437static struct disp_info_s glayer_info[MAX_VD_LAYERS];
438
439static u32 reference_zorder = 128;
440
441#define MAX_ZOOM_RATIO 300
442
443#define VPP_PREBLEND_VD_V_END_LIMIT 2304
444
445#define DUR2PTS(x) ((x) - ((x) >> 4))
446#define DUR2PTS_RM(x) ((x) & 0xf)
447#define PTS2DUR(x) (((x) << 4) / 15)
448
449#ifdef VIDEO_PTS_CHASE
450static int vpts_chase;
451static int av_sync_flag;
452static int vpts_chase_counter;
453static int vpts_chase_pts_diff;
454#endif
455
456static int step_enable;
457static int step_flag;
458
459/*seek values on.video_define.h*/
460static int debug_flag;
461int get_video_debug_flags(void)
462{
463 return debug_flag;
464}
465
466/* DEBUG_FLAG_BLACKOUT; */
467
468static int vsync_enter_line_max;
469static int vsync_exit_line_max;
470
471#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
472static int vsync_rdma_line_max;
473#endif
474static u32 framepacking_support __nosavedata;
475static unsigned int framepacking_width = 1920;
476static unsigned int framepacking_height = 2205;
477static unsigned int framepacking_blank = 45;
478static unsigned int process_3d_type;
479static unsigned int last_process_3d_type;
480#ifdef TV_3D_FUNCTION_OPEN
481/* toggle_3d_fa_frame is for checking the vpts_expire in 2 vsnyc */
482static int toggle_3d_fa_frame = 1;
483/*the pause_one_3d_fl_frame is for close*/
484/*the A/B register switch in every sync at pause mode. */
485static int pause_one_3d_fl_frame;
486MODULE_PARM_DESC(pause_one_3d_fl_frame, "\n pause_one_3d_fl_frame\n");
487module_param(pause_one_3d_fl_frame, uint, 0664);
488
489/*debug info control for skip & repeate vframe case*/
490static unsigned int video_dbg_vf;
491MODULE_PARM_DESC(video_dbg_vf, "\n video_dbg_vf\n");
492module_param(video_dbg_vf, uint, 0664);
493
494static unsigned int video_get_vf_cnt;
495static unsigned int video_drop_vf_cnt;
496MODULE_PARM_DESC(video_drop_vf_cnt, "\n video_drop_vf_cnt\n");
497module_param(video_drop_vf_cnt, uint, 0664);
498
499enum toggle_out_fl_frame_e {
500 OUT_FA_A_FRAME,
501 OUT_FA_BANK_FRAME,
502 OUT_FA_B_FRAME
503};
504
505static unsigned int video_3d_format;
506static unsigned int mvc_flag;
507static unsigned int force_3d_scaler = 3;
508static int mode_3d_changed;
509static int last_mode_3d;
510#endif
511
512#ifdef TV_REVERSE
513bool reverse;
514#endif
515
516const char video_dev_id[] = "amvideo-dev";
517
518const char video_dev_id2[] = "amvideo-dev2";
519
520int onwaitendframe;
521
522static u32 vpp_hold_line = 8;
523static u32 stop_update;
524
525struct video_dev_s video_dev[2] = {
526 {0x1d00 - 0x1d00, 0x1a50 - 0x1a50},
527 {0x1900 - 0x1d00, 0x1e00 - 0x1a50}
528};
529
530struct video_dev_s *cur_dev = &video_dev[0];
531struct video_dev_s *get_video_cur_dev(void)
532{
533 return cur_dev;
534}
535static int cur_dev_idx;
536
537#ifdef CONFIG_PM
538struct video_pm_state_s {
539 int event;
540 u32 vpp_misc;
541 int mem_pd_vd1;
542 int mem_pd_vd2;
543 int mem_pd_di_post;
544};
545#endif
546
547#define PTS_LOGGING
548#define PTS_THROTTLE
549/* #define PTS_TRACE_DEBUG */
550/* #define PTS_TRACE_START */
551
552#ifdef PTS_TRACE_DEBUG
553static int pts_trace_his[16];
554static u32 pts_his[16];
555static u32 scr_his[16];
556static int pts_trace_his_rd;
557#endif
558
559#if defined(PTS_LOGGING) || defined(PTS_TRACE_DEBUG)
560static int pts_trace;
561#endif
562
563#if defined(PTS_LOGGING)
564#define PTS_32_PATTERN_DETECT_RANGE 10
565#define PTS_22_PATTERN_DETECT_RANGE 10
566#define PTS_41_PATTERN_DETECT_RANGE 2
567
568enum video_refresh_pattern {
569 PTS_32_PATTERN = 0,
570 PTS_22_PATTERN,
571 PTS_41_PATTERN,
572 PTS_MAX_NUM_PATTERNS
573};
574
575int n_patterns = PTS_MAX_NUM_PATTERNS;
576
577static int pts_pattern[3] = {0, 0, 0};
578static int pts_pattern_enter_cnt[3] = {0, 0, 0};
579static int pts_pattern_exit_cnt[3] = {0, 0, 0};
580static int pts_log_enable[3] = {0, 0, 0};
581static int pre_pts_trace;
582static int pts_escape_vsync = -1;
583
584#define PTS_41_PATTERN_SINK_MAX 4
585static int pts_41_pattern_sink[PTS_41_PATTERN_SINK_MAX];
586static int pts_41_pattern_sink_index;
587static int pts_pattern_detected = -1;
588static bool pts_enforce_pulldown = true;
589#endif
590
591static DEFINE_MUTEX(video_module_mutex);
592static DEFINE_MUTEX(video_inuse_mutex);
593static DEFINE_SPINLOCK(lock);
594#if ENABLE_UPDATE_HDR_FROM_USER
595static DEFINE_SPINLOCK(omx_hdr_lock);
596#endif
597static u32 frame_par_ready_to_set, frame_par_force_to_set;
598static u32 vpts_remainder;
599static int video_property_changed;
600static u32 video_notify_flag;
601static int enable_video_discontinue_report = 1;
602
603#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
604static u32 video_scaler_mode;
605static int content_top = 0, content_left = 0, content_w = 0, content_h;
606static int scaler_pos_changed;
607#endif
608
609#ifndef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
610bool is_dolby_vision_enable(void)
611{
612 return 0;
613}
614bool is_dolby_vision_on(void)
615{
616 return 0;
617}
618bool is_dolby_vision_stb_mode(void)
619{
620 return 0;
621}
622#endif
623
624static struct amvideocap_req *capture_frame_req;
625u32 get_video_angle(void)
626{
627 return glayer_info[0].angle;
628}
629EXPORT_SYMBOL(get_video_angle);
630
631/*for video related files only.*/
632void video_module_lock(void)
633{
634 mutex_lock(&video_module_mutex);
635}
636void video_module_unlock(void)
637{
638 mutex_unlock(&video_module_mutex);
639}
640
641int video_property_notify(int flag)
642{
643 video_property_changed = flag;
644 return 0;
645}
646
647#if defined(PTS_LOGGING)
648static ssize_t pts_pattern_enter_cnt_read_file(struct file *file,
649 char __user *userbuf, size_t count, loff_t *ppos)
650{
651 char buf[20];
652 ssize_t len;
653
654 len = snprintf(buf, 20, "%d,%d,%d\n", pts_pattern_enter_cnt[0],
655 pts_pattern_enter_cnt[1], pts_pattern_enter_cnt[2]);
656 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
657}
658
659static ssize_t pts_pattern_exit_cnt_read_file(struct file *file,
660 char __user *userbuf, size_t count, loff_t *ppos)
661{
662 char buf[20];
663 ssize_t len;
664
665 len = snprintf(buf, 20, "%d,%d,%d\n", pts_pattern_exit_cnt[0],
666 pts_pattern_exit_cnt[1], pts_pattern_exit_cnt[2]);
667 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
668}
669
670static ssize_t pts_log_enable_read_file(struct file *file,
671 char __user *userbuf, size_t count, loff_t *ppos)
672{
673 char buf[20];
674 ssize_t len;
675
676 len = snprintf(buf, 20, "%d,%d,%d\n", pts_log_enable[0],
677 pts_log_enable[1], pts_log_enable[2]);
678 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
679}
680
681static ssize_t pts_log_enable_write_file(struct file *file,
682 const char __user *userbuf, size_t count, loff_t *ppos)
683{
684 char buf[20];
685 int ret;
686
687 count = min_t(size_t, count, (sizeof(buf)-1));
688 if (copy_from_user(buf, userbuf, count))
689 return -EFAULT;
690 buf[count] = 0;
691 /* pts_pattern_log_enable (3:2) (2:2) (4:1) */
692 ret = sscanf(buf, "%d,%d,%d", &pts_log_enable[0], &pts_log_enable[1],
693 &pts_log_enable[2]);
694 if (ret != 3) {
695 pr_info("use echo 0/1,0/1,0/1 > /sys/kernel/debug/pts_log_enable\n");
696 } else {
697 pr_info("pts_log_enable: %d,%d,%d\n", pts_log_enable[0],
698 pts_log_enable[1], pts_log_enable[2]);
699 }
700 return count;
701}
702static ssize_t pts_enforce_pulldown_read_file(struct file *file,
703 char __user *userbuf, size_t count, loff_t *ppos)
704{
705 char buf[16];
706 ssize_t len;
707
708 len = snprintf(buf, 16, "%d\n", pts_enforce_pulldown);
709 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
710}
711
712static ssize_t pts_enforce_pulldown_write_file(struct file *file,
713 const char __user *userbuf, size_t count, loff_t *ppos)
714{
715 unsigned int write_val;
716 char buf[16];
717 int ret;
718
719 count = min_t(size_t, count, (sizeof(buf)-1));
720 if (copy_from_user(buf, userbuf, count))
721 return -EFAULT;
722 buf[count] = 0;
723 ret = kstrtoint(buf, 0, &write_val);
724 if (ret != 0)
725 return -EINVAL;
726 pr_info("pts_enforce_pulldown: %d->%d\n",
727 pts_enforce_pulldown, write_val);
728 pts_enforce_pulldown = write_val;
729 return count;
730}
731
732static const struct file_operations pts_pattern_enter_cnt_file_ops = {
733 .open = simple_open,
734 .read = pts_pattern_enter_cnt_read_file,
735};
736
737static const struct file_operations pts_pattern_exit_cnt_file_ops = {
738 .open = simple_open,
739 .read = pts_pattern_exit_cnt_read_file,
740};
741
742static const struct file_operations pts_log_enable_file_ops = {
743 .open = simple_open,
744 .read = pts_log_enable_read_file,
745 .write = pts_log_enable_write_file,
746};
747
748static const struct file_operations pts_enforce_pulldown_file_ops = {
749 .open = simple_open,
750 .read = pts_enforce_pulldown_read_file,
751 .write = pts_enforce_pulldown_write_file,
752};
753#endif
754
755struct video_debugfs_files_s {
756 const char *name;
757 const umode_t mode;
758 const struct file_operations *fops;
759};
760
761static struct video_debugfs_files_s video_debugfs_files[] = {
762#if defined(PTS_LOGGING)
763 {"pts_pattern_enter_cnt", S_IFREG | 0444,
764 &pts_pattern_enter_cnt_file_ops
765 },
766 {"pts_pattern_exit_cnt", S_IFREG | 0444,
767 &pts_pattern_exit_cnt_file_ops
768 },
769 {"pts_log_enable", S_IFREG | 0644,
770 &pts_log_enable_file_ops
771 },
772 {"pts_enforce_pulldown", S_IFREG | 0644,
773 &pts_enforce_pulldown_file_ops
774 },
775#endif
776};
777
778static struct dentry *video_debugfs_root;
779static void video_debugfs_init(void)
780{
781 struct dentry *ent;
782 int i;
783
784 if (video_debugfs_root)
785 return;
786 video_debugfs_root = debugfs_create_dir("video", NULL);
787 if (!video_debugfs_root)
788 pr_err("can't create video debugfs dir\n");
789
790 for (i = 0; i < ARRAY_SIZE(video_debugfs_files); i++) {
791 ent = debugfs_create_file(video_debugfs_files[i].name,
792 video_debugfs_files[i].mode,
793 video_debugfs_root, NULL,
794 video_debugfs_files[i].fops);
795 if (!ent)
796 pr_info("debugfs create file %s failed\n",
797 video_debugfs_files[i].name);
798 }
799}
800
801static void video_debugfs_exit(void)
802{
803 debugfs_remove(video_debugfs_root);
804}
805
806#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
807int video_scaler_notify(int flag)
808{
809 video_scaler_mode = flag;
810 video_property_changed = 1;
811 return 0;
812}
813
814u32 amvideo_get_scaler_para(int *x, int *y, int *w, int *h, u32 *ratio)
815{
816 *x = content_left;
817 *y = content_top;
818 *w = content_w;
819 *h = content_h;
820 /* *ratio = 100; */
821 return video_scaler_mode;
822}
823
824void amvideo_set_scaler_para(int x, int y, int w, int h, int flag)
825{
826 struct disp_info_s *layer = &glayer_info[0];
827
828 mutex_lock(&video_module_mutex);
829 if (w < 2)
830 w = 0;
831 if (h < 2)
832 h = 0;
833 if (flag) {
834 if ((content_left != x) || (content_top != y)
835 || (content_w != w) || (content_h != h))
836 scaler_pos_changed = 1;
837 content_left = x;
838 content_top = y;
839 content_w = w;
840 content_h = h;
841 } else {
842 layer->layer_left = x;
843 layer->layer_top = y;
844 layer->layer_width = w;
845 layer->layer_height = h;
846 }
847 video_property_changed = 1;
848 mutex_unlock(&video_module_mutex);
849}
850
851u32 amvideo_get_scaler_mode(void)
852{
853 return video_scaler_mode;
854}
855#endif
856
857bool to_notify_trick_wait;
858/* display canvas */
859#define DISPLAY_CANVAS_BASE_INDEX 0x60
860
861#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
862static struct vframe_s *cur_rdma_buf;
863/*
864 *void vsync_rdma_config(void);
865 *void vsync_rdma_config_pre(void);
866 *bool is_vsync_rdma_enable(void);
867 *void start_rdma(void);
868 *void enable_rdma_log(int flag);
869 */
870static int enable_rdma_log_count;
871
872bool rdma_enable_pre;
873
874u32 disp_canvas_index[2][6] = {
875 {
876 DISPLAY_CANVAS_BASE_INDEX,
877 DISPLAY_CANVAS_BASE_INDEX + 1,
878 DISPLAY_CANVAS_BASE_INDEX + 2,
879 DISPLAY_CANVAS_BASE_INDEX + 3,
880 DISPLAY_CANVAS_BASE_INDEX + 4,
881 DISPLAY_CANVAS_BASE_INDEX + 5,
882 },
883 {
884 DISPLAY_CANVAS_BASE_INDEX2,
885 DISPLAY_CANVAS_BASE_INDEX2 + 1,
886 DISPLAY_CANVAS_BASE_INDEX2 + 2,
887 DISPLAY_CANVAS_BASE_INDEX2 + 3,
888 DISPLAY_CANVAS_BASE_INDEX2 + 4,
889 DISPLAY_CANVAS_BASE_INDEX2 + 5,
890 }
891};
892
893static u32 disp_canvas[2][2];
894static u32 rdma_canvas_id;
895static u32 next_rdma_canvas_id = 1;
896
897#ifdef VIDEO_PIP
898static u32 pip_rdma_canvas_id;
899static u32 pip_next_rdma_canvas_id = 1;
900static struct vframe_s *pip_rdma_buf;
901static struct vframe_s *pipbuf_to_put;
902#endif
903
904#define DISPBUF_TO_PUT_MAX 8
905static struct vframe_s *dispbuf_to_put[DISPBUF_TO_PUT_MAX];
906static int dispbuf_to_put_num;
907#else
908static u32 disp_canvas_index[6] = {
909 DISPLAY_CANVAS_BASE_INDEX,
910 DISPLAY_CANVAS_BASE_INDEX + 1,
911 DISPLAY_CANVAS_BASE_INDEX + 2,
912 DISPLAY_CANVAS_BASE_INDEX + 3,
913 DISPLAY_CANVAS_BASE_INDEX + 4,
914 DISPLAY_CANVAS_BASE_INDEX + 5,
915};
916
917static u32 disp_canvas[2];
918#endif
919
920static u32 post_canvas;
921
922
923/* zoom information */
924static u32 zoom_start_x_lines;
925static u32 zoom_end_x_lines;
926static u32 zoom_start_y_lines;
927static u32 zoom_end_y_lines;
928
929static u32 ori_start_x_lines;
930static u32 ori_end_x_lines;
931static u32 ori_start_y_lines;
932static u32 ori_end_y_lines;
933
934static u32 zoom2_start_x_lines;
935static u32 zoom2_end_x_lines;
936static u32 zoom2_start_y_lines;
937static u32 zoom2_end_y_lines;
938
939static u32 ori2_start_x_lines;
940static u32 ori2_end_x_lines;
941static u32 ori2_start_y_lines;
942static u32 ori2_end_y_lines;
943
944/* black out policy */
945#if defined(CONFIG_JPEGLOGO)
946static u32 blackout;
947#else
948static u32 blackout = 1;
949#endif
950static u32 force_blackout;
951
952/* disable video */
953
954#ifdef VIDEO_PIP
955static u32 pip_frame_count;
956static u32 disable_videopip = VIDEO_DISABLE_FORNEXT;
957static int pip_property_changed;
958static u32 pip_frame_ready_to_set;
959static u32 pip_global_output = 1;
960#if 0
961static u32 pip_v_skip;
962static u32 pip_h_skip;
963static u32 pip_start_x_lines;
964static u32 pip_end_x_lines;
965static u32 pip_start_y_lines;
966static u32 pip_end_y_lines;
967#endif
968static u32 pip_loop;
969#endif
970
971static u32 disable_video = VIDEO_DISABLE_NONE;
972static u32 video_enabled __nosavedata;
973static u32 video2_enabled __nosavedata;
974static u32 video_status_saved __nosavedata;
975static u32 video2_status_saved __nosavedata;
976static u32 hold_video;
977
978u32 get_video_enabled(void)
979{
980 return video_enabled;
981}
982/* show first frame*/
983static bool show_first_frame_nosync;
984bool show_first_picture;
985/* static bool first_frame=false; */
986
987/* test screen*/
988static u32 test_screen;
989/* rgb screen*/
990static u32 rgb_screen;
991
992/* video frame repeat count */
993static u32 frame_repeat_count;
994
995/* vout */
996static const struct vinfo_s *vinfo;
997
998/* config */
999static struct vframe_s *cur_dispbuf;
1000static struct vframe_s *cur_dispbuf2;
1001static bool need_disable_vd2;
1002static bool last_mvc_status;
1003void update_cur_dispbuf(void *buf)
1004{
1005 cur_dispbuf = buf;
1006}
1007
1008static struct vframe_s vf_local, vf_local2;
1009static u32 vsync_pts_inc;
1010static u32 vsync_pts_inc_scale;
1011static u32 vsync_pts_inc_scale_base = 1;
1012static u32 vsync_pts_inc_upint;
1013static u32 vsync_pts_inc_adj;
1014static u32 vsync_pts_125;
1015static u32 vsync_pts_112;
1016static u32 vsync_pts_101;
1017static u32 vsync_pts_100;
1018static u32 vsync_freerun;
1019/* extend this value to support both slow and fast playback
1020 * 0,1: normal playback
1021 * [2,1000]: speed/vsync_slow_factor
1022 * >1000: speed*(vsync_slow_factor/1000000)
1023 */
1024static u32 vsync_slow_factor = 1;
1025
1026/* pts alignment */
1027static bool vsync_pts_aligned;
1028static s32 vsync_pts_align;
1029
1030/* frame rate calculate */
1031static u32 last_frame_count;
1032static u32 frame_count;
1033static u32 new_frame_count;
1034static u32 first_frame_toggled;
1035static u32 toggle_count;
1036static u32 last_frame_time;
1037static u32 timer_count;
1038static u32 vsync_count;
1039static u64 last_frame_duration;
1040
1041static struct vpp_frame_par_s *cur_frame_par, *next_frame_par;
1042static struct vpp_frame_par_s frame_parms[2];
1043
1044/* vsync pass flag */
1045static u32 wait_sync;
1046
1047/* is fffb or seeking*/
1048static u32 video_seek_flag;
1049
1050#ifdef FIQ_VSYNC
1051static bridge_item_t vsync_fiq_bridge;
1052#endif
1053
1054/* trickmode i frame*/
1055u32 trickmode_i;
1056EXPORT_SYMBOL(trickmode_i);
1057
1058/* trickmode ff/fb */
1059u32 trickmode_fffb;
1060atomic_t trickmode_framedone = ATOMIC_INIT(0);
1061atomic_t video_sizechange = ATOMIC_INIT(0);
1062atomic_t video_unreg_flag = ATOMIC_INIT(0);
1063atomic_t video_inirq_flag = ATOMIC_INIT(0);
1064atomic_t video_pause_flag = ATOMIC_INIT(0);
1065int trickmode_duration;
1066int trickmode_duration_count;
1067u32 trickmode_vpts;
1068/* last_playback_filename */
1069char file_name[512];
1070
1071/* video freerun mode */
1072#define FREERUN_NONE 0 /* no freerun mode */
1073#define FREERUN_NODUR 1 /* freerun without duration */
1074#define FREERUN_DUR 2 /* freerun with duration */
1075static u32 freerun_mode;
1076static u32 slowsync_repeat_enable;
1077static bool dmc_adjust = true;
1078module_param_named(dmc_adjust, dmc_adjust, bool, 0644);
1079static u32 dmc_config_state;
1080static u32 last_toggle_count;
1081static u32 toggle_same_count;
1082
1083/* video_inuse */
1084static u32 video_inuse;
1085
1086void set_freerun_mode(int mode)
1087{
1088 freerun_mode = mode;
1089}
1090EXPORT_SYMBOL(set_freerun_mode);
1091
1092void set_pts_realign(void)
1093{
1094 vsync_pts_aligned = false;
1095}
1096EXPORT_SYMBOL(set_pts_realign);
1097
1098static const enum f2v_vphase_type_e vpp_phase_table[4][3] = {
1099 {F2V_P2IT, F2V_P2IB, F2V_P2P}, /* VIDTYPE_PROGRESSIVE */
1100 {F2V_IT2IT, F2V_IT2IB, F2V_IT2P}, /* VIDTYPE_INTERLACE_TOP */
1101 {F2V_P2IT, F2V_P2IB, F2V_P2P},
1102 {F2V_IB2IT, F2V_IB2IB, F2V_IB2P} /* VIDTYPE_INTERLACE_BOTTOM */
1103};
1104
1105static const u8 skip_tab[6] = { 0x24, 0x04, 0x68, 0x48, 0x28, 0x08 };
1106
1107/* wait queue for poll */
1108static wait_queue_head_t amvideo_trick_wait;
1109
1110/* wait queue for poll */
1111static wait_queue_head_t amvideo_sizechange_wait;
1112
1113#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
1114#define VPU_DELAYWORK_VPU_CLK 1
1115#define VPU_DELAYWORK_MEM_POWER_OFF_VD1 2
1116#define VPU_DELAYWORK_MEM_POWER_OFF_VD2 4
1117#define VPU_DELAYWORK_MEM_POWER_OFF_PROT 8
1118#define VPU_VIDEO_LAYER1_CHANGED 16
1119#define VPU_UPDATE_DOLBY_VISION 32
1120
1121#define VPU_MEM_POWEROFF_DELAY 100
1122static struct work_struct vpu_delay_work;
1123static int vpu_clk_level;
1124static DEFINE_SPINLOCK(delay_work_lock);
1125static int vpu_delay_work_flag;
1126static int vpu_mem_power_off_count;
1127#endif
1128
1129static u32 vpts_ref;
1130static u32 video_frame_repeat_count;
1131static u32 smooth_sync_enable;
1132static u32 hdmi_in_onvideo;
1133#ifdef CONFIG_AM_VIDEO2
1134static int video_play_clone_rate = 60;
1135static int android_clone_rate = 30;
1136static int noneseamless_play_clone_rate = 5;
1137#endif
1138
1139#define CONFIG_AM_VOUT
1140
1141void safe_disble_videolayer(void)
1142{
1143#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
1144 if (video_scaler_mode)
1145 DisableVideoLayer_PREBELEND();
1146 else
1147 DisableVideoLayer();
1148#else
1149 DisableVideoLayer();
1150#endif
1151}
1152
1153
1154/*********************************************************/
1155#ifdef VIDEO_PIP
1156static inline struct vframe_s *pip_vf_peek(void)
1157{
1158 if (pip_loop)
1159 return cur_dispbuf;
1160 return vf_peek(RECEIVERPIP_NAME);
1161}
1162
1163static inline struct vframe_s *pip_vf_get(void)
1164{
1165 struct vframe_s *vf = NULL;
1166
1167 if (pip_loop)
1168 return cur_dispbuf;
1169
1170 vf = vf_get(RECEIVERPIP_NAME);
1171
1172 if (vf) {
1173 /* video_notify_flag |= VIDEO_NOTIFY_PROVIDER_GET; */
1174 atomic_set(&vf->use_cnt, 1);
1175 }
1176 return vf;
1177
1178}
1179
1180#if 0
1181static int pip_vf_get_states(struct vframe_states *states)
1182{
1183 int ret = -1;
1184 unsigned long flags;
1185
1186 spin_lock_irqsave(&lock, flags);
1187 ret = vf_get_states_by_name(RECEIVERPIP_NAME, states);
1188 spin_unlock_irqrestore(&lock, flags);
1189 return ret;
1190}
1191#endif
1192
1193static inline void pip_vf_put(struct vframe_s *vf)
1194{
1195 struct vframe_provider_s *vfp = vf_get_provider(RECEIVERPIP_NAME);
1196
1197 if (pip_loop)
1198 return;
1199
1200 if (vfp && vf && atomic_dec_and_test(&vf->use_cnt)) {
1201 vf_put(vf, RECEIVERPIP_NAME);
1202 /* video_notify_flag |= VIDEO_NOTIFY_PROVIDER_PUT; */
1203 }
1204}
1205#endif
1206
1207static inline struct vframe_s *video_vf_peek(void)
1208{
1209 struct vframe_s *vf = vf_peek(RECEIVER_NAME);
1210
1211 if (vf && vf->disp_pts && vf->disp_pts_us64) {
1212 vf->pts = vf->disp_pts;
1213 vf->pts_us64 = vf->disp_pts_us64;
1214 vf->disp_pts = 0;
1215 vf->disp_pts_us64 = 0;
1216 }
1217 return vf;
1218}
1219
1220static inline struct vframe_s *video_vf_get(void)
1221{
1222 struct vframe_s *vf = NULL;
1223 int frame_width, frame_height;
1224
1225 vf = vf_get(RECEIVER_NAME);
1226
1227 if (vf) {
1228 if (vf->disp_pts && vf->disp_pts_us64) {
1229 vf->pts = vf->disp_pts;
1230 vf->pts_us64 = vf->disp_pts_us64;
1231 vf->disp_pts = 0;
1232 vf->disp_pts_us64 = 0;
1233 }
1234 if (vf->type & VIDTYPE_COMPRESS) {
1235 frame_width = vf->compWidth;
1236 frame_height = vf->compHeight;
1237 } else {
1238 frame_width = vf->width;
1239 frame_height = vf->height;
1240 }
1241 video_notify_flag |= VIDEO_NOTIFY_PROVIDER_GET;
1242 atomic_set(&vf->use_cnt, 1);
1243 /*always to 1,for first get from vfm provider */
1244 if ((vf->type & VIDTYPE_MVC) && (framepacking_support)
1245 &&(framepacking_width) && (framepacking_height)) {
1246 vf->width = framepacking_width;
1247 vf->height = framepacking_height;
1248 }
1249#ifdef TV_3D_FUNCTION_OPEN
1250 /*can be moved to h264mvc.c */
1251 if ((vf->type & VIDTYPE_MVC)
1252 && (process_3d_type & MODE_3D_ENABLE) && vf->trans_fmt) {
1253 vf->type = VIDTYPE_PROGRESSIVE | VIDTYPE_VIU_FIELD;
1254 process_3d_type |= MODE_3D_MVC;
1255 mvc_flag = 1;
1256 } else {
1257 process_3d_type &= (~MODE_3D_MVC);
1258 mvc_flag = 0;
1259 }
1260 if (((process_3d_type & MODE_FORCE_3D_TO_2D_LR)
1261 || (process_3d_type & MODE_FORCE_3D_LR)
1262 || (process_3d_type & MODE_FORCE_3D_FA_LR))
1263 && (!(vf->type & VIDTYPE_MVC))
1264 && (vf->trans_fmt != TVIN_TFMT_3D_FP)) {
1265 vf->trans_fmt = TVIN_TFMT_3D_DET_LR;
1266 vf->left_eye.start_x = 0;
1267 vf->left_eye.start_y = 0;
1268 vf->left_eye.width = frame_width / 2;
1269 vf->left_eye.height = frame_height;
1270
1271 vf->right_eye.start_x = frame_width / 2;
1272 vf->right_eye.start_y = 0;
1273 vf->right_eye.width = frame_width / 2;
1274 vf->right_eye.height = frame_height;
1275 }
1276 if (((process_3d_type & MODE_FORCE_3D_TO_2D_TB)
1277 || (process_3d_type & MODE_FORCE_3D_TB)
1278 || (process_3d_type & MODE_FORCE_3D_FA_TB))
1279 && (!(vf->type & VIDTYPE_MVC))
1280 && (vf->trans_fmt != TVIN_TFMT_3D_FP)) {
1281 vf->trans_fmt = TVIN_TFMT_3D_TB;
1282 vf->left_eye.start_x = 0;
1283 vf->left_eye.start_y = 0;
1284 vf->left_eye.width = frame_width;
1285 vf->left_eye.height = frame_height/2;
1286
1287 vf->right_eye.start_x = 0;
1288 vf->right_eye.start_y = frame_height/2;
1289 vf->right_eye.width = frame_width;
1290 vf->right_eye.height = frame_height/2;
1291 }
1292 receive_frame_count++;
1293#endif
1294 }
1295 return vf;
1296
1297}
1298
1299static int video_vf_get_states(struct vframe_states *states)
1300{
1301 int ret = -1;
1302 unsigned long flags;
1303
1304 spin_lock_irqsave(&lock, flags);
1305 ret = vf_get_states_by_name(RECEIVER_NAME, states);
1306 spin_unlock_irqrestore(&lock, flags);
1307 return ret;
1308}
1309
1310static inline void video_vf_put(struct vframe_s *vf)
1311{
1312 struct vframe_provider_s *vfp = vf_get_provider(RECEIVER_NAME);
1313
1314 if (vfp && vf && atomic_dec_and_test(&vf->use_cnt)) {
1315 vf_put(vf, RECEIVER_NAME);
1316#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
1317 if (is_dolby_vision_enable())
1318 dolby_vision_vf_put(vf);
1319#endif
1320 video_notify_flag |= VIDEO_NOTIFY_PROVIDER_PUT;
1321 }
1322}
1323
1324int ext_get_cur_video_frame(struct vframe_s **vf, int *canvas_index)
1325{
1326 if (cur_dispbuf == NULL)
1327 return -1;
1328 atomic_inc(&cur_dispbuf->use_cnt);
1329 *canvas_index = READ_VCBUS_REG(VD1_IF0_CANVAS0 + cur_dev->viu_off);
1330 *vf = cur_dispbuf;
1331 return 0;
1332}
1333static void dump_vframe_status(const char *name)
1334{
1335 int ret = -1;
1336 struct vframe_states states;
1337 struct vframe_provider_s *vfp;
1338
1339 vfp = vf_get_provider_by_name(name);
1340 if (vfp && vfp->ops && vfp->ops->vf_states)
1341 ret = vfp->ops->vf_states(&states, vfp->op_arg);
1342
1343 if (ret == 0) {
1344 ret += pr_info("%s_pool_size=%d\n",
1345 name, states.vf_pool_size);
1346 ret += pr_info("%s buf_free_num=%d\n",
1347 name, states.buf_free_num);
1348 ret += pr_info("%s buf_avail_num=%d\n",
1349 name, states.buf_avail_num);
1350 } else {
1351 ret += pr_info("%s vframe no states\n", name);
1352 }
1353}
1354
1355static void dump_vdin_reg(void)
1356{
1357 unsigned int reg001, reg002;
1358
1359 reg001 = READ_VCBUS_REG(0x1204);
1360 reg002 = READ_VCBUS_REG(0x1205);
1361 pr_info("VDIN_LCNT_STATUS:0x%x,VDIN_COM_STATUS0:0x%x\n",
1362 reg001, reg002);
1363}
1364
1365#ifdef CONFIG_AMLOGIC_MEDIA_VIDEOCAPTURE
1366
1367int ext_put_video_frame(struct vframe_s *vf)
1368{
1369 if (vf == &vf_local)
1370 return 0;
1371 video_vf_put(vf);
1372 return 0;
1373}
1374
1375static int is_need_framepacking_output(void)
1376{
1377 int ret = 0;
1378
1379 if ((framepacking_support) &&
1380 (cur_dispbuf) && (cur_dispbuf->type & VIDTYPE_MVC)) {
1381 ret = 1;
1382 }
1383 return ret;
1384}
1385
1386int ext_register_end_frame_callback(struct amvideocap_req *req)
1387{
1388 mutex_lock(&video_module_mutex);
1389 capture_frame_req = req;
1390 mutex_unlock(&video_module_mutex);
1391 return 0;
1392}
1393int ext_frame_capture_poll(int endflags)
1394{
1395 mutex_lock(&video_module_mutex);
1396 if (capture_frame_req && capture_frame_req->callback) {
1397 struct vframe_s *vf;
1398 int index;
1399 int ret;
1400 struct amvideocap_req *req = capture_frame_req;
1401
1402 ret = ext_get_cur_video_frame(&vf, &index);
1403 if (!ret) {
1404 req->callback(req->data, vf, index);
1405 capture_frame_req = NULL;
1406 }
1407 }
1408 mutex_unlock(&video_module_mutex);
1409 return 0;
1410}
1411#endif
1412
1413static void update_layer_info(u8 layer_id)
1414{
1415 struct disp_info_s *layer;
1416
1417 if (layer_id >= MAX_VD_LAYERS)
1418 return;
1419
1420 if (layer_id == 0) {
1421 layer = &glayer_info[0];
1422 layer->reverse = reverse;
1423 layer->proc_3d_type = process_3d_type;
1424 } else if (layer_id == 1) {
1425 layer = &glayer_info[1];
1426 layer->reverse = reverse;
1427 layer->proc_3d_type = 0;
1428 }
1429}
1430
1431static void vpp_settings_h(struct vpp_frame_par_s *framePtr)
1432{
1433 struct vppfilter_mode_s *vpp_filter = &framePtr->vpp_filter;
1434 u32 r1, r2, r3;
1435
1436 u32 x_lines;
1437
1438 r1 = framePtr->VPP_hsc_linear_startp - framePtr->VPP_hsc_startp;
1439 r2 = framePtr->VPP_hsc_linear_endp - framePtr->VPP_hsc_startp;
1440 r3 = framePtr->VPP_hsc_endp - framePtr->VPP_hsc_startp;
1441
1442 if ((framePtr->supscl_path == CORE0_PPS_CORE1) ||
1443 (framePtr->supscl_path == CORE1_AFTER_PPS) ||
1444 (framePtr->supscl_path == PPS_CORE0_CORE1) ||
1445 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1446 r3 >>= framePtr->supsc1_hori_ratio;
1447 if ((framePtr->supscl_path == CORE0_AFTER_PPS) ||
1448 (framePtr->supscl_path == PPS_CORE0_CORE1) ||
1449 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1450 r3 >>= framePtr->supsc0_hori_ratio;
1451
1452 x_lines = zoom_end_x_lines / (framePtr->hscale_skip_count + 1);
1453 if (process_3d_type & MODE_3D_OUT_TB) {
1454 /* vd1 and vd2 do pre blend */
1455 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_H_START_END,
1456 ((zoom_start_x_lines & VPP_VD_SIZE_MASK) <<
1457 VPP_VD1_START_BIT) | (((zoom_end_x_lines) &
1458 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1459 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_H_START_END,
1460 ((zoom_start_x_lines & VPP_VD_SIZE_MASK) <<
1461 VPP_VD1_START_BIT) | (((zoom_end_x_lines) &
1462 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1463 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_H_START_END +
1464 cur_dev->vpp_off,
1465 ((framePtr->VPP_hsc_startp & VPP_VD_SIZE_MASK)
1466 << VPP_VD1_START_BIT) |
1467 ((framePtr->VPP_hsc_endp & VPP_VD_SIZE_MASK)
1468 << VPP_VD1_END_BIT));
1469 } else if (process_3d_type & MODE_3D_OUT_LR) {
1470 /* vd1 and vd2 do pre blend */
1471 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_H_START_END,
1472 ((zoom_start_x_lines & VPP_VD_SIZE_MASK) <<
1473 VPP_VD1_START_BIT) | (((x_lines >> 1) &
1474 VPP_VD_SIZE_MASK) <<
1475 VPP_VD1_END_BIT));
1476 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_H_START_END,
1477 ((((x_lines + 1) >> 1) & VPP_VD_SIZE_MASK) <<
1478 VPP_VD1_START_BIT) | ((x_lines &
1479 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1480 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_H_START_END +
1481 cur_dev->vpp_off,
1482 ((framePtr->VPP_hsc_startp & VPP_VD_SIZE_MASK)
1483 << VPP_VD1_START_BIT) |
1484 ((framePtr->VPP_hsc_endp & VPP_VD_SIZE_MASK)
1485 << VPP_VD1_END_BIT));
1486 } else{
1487 if (!legacy_vpp) {
1488 x_lines = (zoom_end_x_lines -
1489 zoom_start_x_lines + 1)
1490 / (framePtr->hscale_skip_count + 1);
1491 VSYNC_WR_MPEG_REG(
1492 VPP_PREBLEND_VD1_H_START_END,
1493 ((0 & VPP_VD_SIZE_MASK) <<
1494 VPP_VD1_START_BIT) | (((x_lines - 1) &
1495 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1496 }
1497 VSYNC_WR_MPEG_REG(
1498 VPP_POSTBLEND_VD1_H_START_END +
1499 cur_dev->vpp_off,
1500 ((framePtr->VPP_hsc_startp & VPP_VD_SIZE_MASK)
1501 << VPP_VD1_START_BIT) |
1502 ((framePtr->VPP_hsc_endp & VPP_VD_SIZE_MASK)
1503 << VPP_VD1_END_BIT));
1504#ifdef VIDEO_PIP
1505 if (!cur_pipbuf)
1506#endif
1507 {
1508 VSYNC_WR_MPEG_REG(
1509 VPP_BLEND_VD2_H_START_END +
1510 cur_dev->vpp_off,
1511 ((framePtr->VPP_hd_start_lines_ &
1512 VPP_VD_SIZE_MASK)
1513 << VPP_VD1_START_BIT) |
1514 ((framePtr->VPP_hd_end_lines_ &
1515 VPP_VD_SIZE_MASK)
1516 << VPP_VD1_END_BIT));
1517 }
1518 }
1519
1520 VSYNC_WR_MPEG_REG(VPP_HSC_REGION12_STARTP +
1521 cur_dev->vpp_off,
1522 (0 << VPP_REGION1_BIT) |
1523 ((r1 & VPP_REGION_MASK) << VPP_REGION2_BIT));
1524
1525 VSYNC_WR_MPEG_REG(VPP_HSC_REGION34_STARTP + cur_dev->vpp_off,
1526 ((r2 & VPP_REGION_MASK) << VPP_REGION3_BIT) |
1527 ((r3 & VPP_REGION_MASK) << VPP_REGION4_BIT));
1528 VSYNC_WR_MPEG_REG(VPP_HSC_REGION4_ENDP + cur_dev->vpp_off, r3);
1529
1530 VSYNC_WR_MPEG_REG(VPP_HSC_START_PHASE_STEP + cur_dev->vpp_off,
1531 vpp_filter->vpp_hf_start_phase_step);
1532
1533 VSYNC_WR_MPEG_REG(VPP_HSC_REGION1_PHASE_SLOPE + cur_dev->vpp_off,
1534 vpp_filter->vpp_hf_start_phase_slope);
1535
1536 VSYNC_WR_MPEG_REG(VPP_HSC_REGION3_PHASE_SLOPE + cur_dev->vpp_off,
1537 vpp_filter->vpp_hf_end_phase_slope);
1538
1539 VSYNC_WR_MPEG_REG(VPP_LINE_IN_LENGTH + cur_dev->vpp_off,
1540 framePtr->VPP_line_in_length_);
1541}
1542
1543static void vd2_settings_h(struct vframe_s *vf)
1544{
1545 u32 VPP_hd_start_lines_;
1546 u32 VPP_hd_end_lines_;
1547
1548 if (vf) {
1549 VPP_hd_start_lines_ = 0;
1550 VPP_hd_end_lines_ = ((vf->type & VIDTYPE_COMPRESS) ?
1551 vf->compWidth : vf->width) - 1;
1552
1553 VSYNC_WR_MPEG_REG(
1554 VPP_BLEND_VD2_H_START_END +
1555 cur_dev->vpp_off,
1556 ((VPP_hd_start_lines_ &
1557 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1558 ((VPP_hd_end_lines_ &
1559 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1560 }
1561}
1562
1563static void vpp_settings_v(struct vpp_frame_par_s *framePtr)
1564{
1565 struct vppfilter_mode_s *vpp_filter = &framePtr->vpp_filter;
1566 u32 r, afbc_enble_flag;
1567 u32 y_lines;
1568 u32 v_phase;
1569 u32 v_skip_flag = 0;
1570 int x, y, w, h;
1571 struct disp_info_s *layer = &glayer_info[0];
1572
1573 r = framePtr->VPP_vsc_endp - framePtr->VPP_vsc_startp;
1574 afbc_enble_flag = 0;
1575 if (is_meson_gxbb_cpu())
1576 afbc_enble_flag = READ_VCBUS_REG(AFBC_ENABLE) & 0x100;
1577 if ((vpp_filter->vpp_vsc_start_phase_step > 0x1000000)
1578 && afbc_enble_flag)
1579 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
1580 cur_dev->vpp_off, ((framePtr->VPP_vsc_startp &
1581 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT)
1582 | (((framePtr->VPP_vsc_endp + 1) & VPP_VD_SIZE_MASK) <<
1583 VPP_VD1_END_BIT));
1584 else {
1585 afbc_enble_flag = READ_VCBUS_REG(AFBC_ENABLE) & 0x100;
1586 v_phase = vpp_filter->vpp_vsc_start_phase_step;
1587
1588 x = layer->layer_left;
1589 y = layer->layer_top;
1590 w = layer->layer_width;
1591 h = layer->layer_height;
1592 if (v_phase * (framePtr->vscale_skip_count + 1) > 0x1000000) {
1593 if ((afbc_enble_flag) && (y < 0)) {
1594 if ((framePtr->VPP_vsc_endp < 0x250) ||
1595 (framePtr->VPP_vsc_endp <
1596 framePtr->VPP_post_blend_vd_v_end_/2)) {
1597 if (framePtr->VPP_vsc_endp > 0x6)
1598 v_skip_flag = 1;
1599 }
1600 }
1601 }
1602 if (v_skip_flag == 1) {
1603 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
1604 cur_dev->vpp_off, ((framePtr->VPP_vsc_startp &
1605 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT)
1606 | (((framePtr->VPP_vsc_endp - 6) & VPP_VD_SIZE_MASK) <<
1607 VPP_VD1_END_BIT));
1608 } else {
1609 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
1610 cur_dev->vpp_off, ((framePtr->VPP_vsc_startp &
1611 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT)
1612 | ((framePtr->VPP_vsc_endp & VPP_VD_SIZE_MASK) <<
1613 VPP_VD1_END_BIT));
1614 }
1615 }
1616
1617 y_lines = zoom_end_y_lines / (framePtr->vscale_skip_count + 1);
1618 if (process_3d_type & MODE_3D_OUT_TB) {
1619 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END,
1620 ((zoom_start_y_lines & VPP_VD_SIZE_MASK) <<
1621 VPP_VD1_START_BIT) | (((y_lines >> 1) &
1622 VPP_VD_SIZE_MASK) <<
1623 VPP_VD1_END_BIT));
1624 VSYNC_WR_MPEG_REG(
1625 VPP_BLEND_VD2_V_START_END,
1626 ((((y_lines + 1) >> 1) & VPP_VD_SIZE_MASK) <<
1627 VPP_VD1_START_BIT) |
1628 ((y_lines & VPP_VD_SIZE_MASK) <<
1629 VPP_VD1_END_BIT));
1630 } else if (process_3d_type & MODE_3D_OUT_LR) {
1631 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END,
1632 ((zoom_start_y_lines & VPP_VD_SIZE_MASK) <<
1633 VPP_VD1_START_BIT) | ((zoom_end_y_lines &
1634 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1635 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_V_START_END,
1636 ((zoom_start_y_lines & VPP_VD_SIZE_MASK) <<
1637 VPP_VD1_START_BIT) | ((zoom_end_y_lines &
1638 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1639 } else {
1640 if ((framePtr->VPP_post_blend_vd_v_end_ -
1641 framePtr->VPP_post_blend_vd_v_start_ + 1) >
1642 VPP_PREBLEND_VD_V_END_LIMIT) {
1643 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
1644 cur_dev->vpp_off,
1645 ((framePtr->VPP_post_blend_vd_v_start_
1646 & VPP_VD_SIZE_MASK) <<
1647 VPP_VD1_START_BIT) |
1648 ((framePtr->VPP_post_blend_vd_v_end_ &
1649 VPP_VD_SIZE_MASK)
1650 << VPP_VD1_END_BIT));
1651 } else {
1652 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
1653 cur_dev->vpp_off,
1654 ((0 & VPP_VD_SIZE_MASK) <<
1655 VPP_VD1_START_BIT) |
1656 (((VPP_PREBLEND_VD_V_END_LIMIT - 1) &
1657 VPP_VD_SIZE_MASK) <<
1658 VPP_VD1_END_BIT));
1659 }
1660#ifdef VIDEO_PIP
1661 if (!cur_pipbuf)
1662#endif
1663 {
1664 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_V_START_END +
1665 cur_dev->vpp_off,
1666 ((((framePtr->VPP_vd_end_lines_ + 1) / 2) &
1667 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1668 (((framePtr->VPP_vd_end_lines_) &
1669 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1670 }
1671 if (is_need_framepacking_output()) {
1672 VSYNC_WR_MPEG_REG(
1673 VPP_BLEND_VD2_V_START_END +
1674 cur_dev->vpp_off,
1675 (((((framePtr->VPP_vd_end_lines_ -
1676 framepacking_blank + 1) / 2) + framepacking_blank) &
1677 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1678 (((framePtr->VPP_vd_end_lines_) &
1679 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1680 }
1681 }
1682 VSYNC_WR_MPEG_REG(VPP_VSC_REGION12_STARTP + cur_dev->vpp_off, 0);
1683 VSYNC_WR_MPEG_REG(VPP_VSC_REGION34_STARTP + cur_dev->vpp_off,
1684 ((r & VPP_REGION_MASK) << VPP_REGION3_BIT) |
1685 ((r & VPP_REGION_MASK) << VPP_REGION4_BIT));
1686
1687 if ((framePtr->supscl_path == CORE0_PPS_CORE1) ||
1688 (framePtr->supscl_path == CORE1_AFTER_PPS) ||
1689 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1690 r >>= framePtr->supsc1_vert_ratio;
1691 if ((framePtr->supscl_path == CORE0_AFTER_PPS) ||
1692 (framePtr->supscl_path == PPS_CORE0_CORE1) ||
1693 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1694 r >>= framePtr->supsc0_vert_ratio;
1695
1696 VSYNC_WR_MPEG_REG(VPP_VSC_REGION4_ENDP + cur_dev->vpp_off, r);
1697
1698 VSYNC_WR_MPEG_REG(VPP_VSC_START_PHASE_STEP + cur_dev->vpp_off,
1699 vpp_filter->vpp_vsc_start_phase_step);
1700}
1701
1702static void vd2_settings_v(struct vframe_s *vf)
1703{
1704 u32 VPP_vd_start_lines_;
1705 u32 VPP_vd_end_lines_;
1706
1707 if (vf) {
1708 VPP_vd_start_lines_ = 0;
1709 VPP_vd_end_lines_ = ((vf->type & VIDTYPE_COMPRESS) ?
1710 vf->compHeight : vf->height) - 1;
1711
1712 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_V_START_END +
1713 cur_dev->vpp_off,
1714 ((VPP_vd_start_lines_ &
1715 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1716 (((VPP_vd_end_lines_) &
1717 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1718 }
1719}
1720
1721#ifdef TV_3D_FUNCTION_OPEN
1722static void zoom_get_horz_pos(struct vframe_s *vf, u32 vpp_3d_mode, u32 *ls,
1723 u32 *le, u32 *rs, u32 *re)
1724{
1725 u32 crop_sx, crop_ex, crop_sy, crop_ey;
1726 int frame_width, frame_height;
1727 struct disp_info_s *layer = &glayer_info[0];
1728
1729 if (!vf)
1730 return;
1731
1732 crop_sy = layer->crop_top;
1733 crop_sx = layer->crop_left;
1734 crop_ey = layer->crop_bottom;
1735 crop_ex = layer->crop_right;
1736
1737 if (vf->type & VIDTYPE_COMPRESS) {
1738 frame_width = vf->compWidth;
1739 frame_height = vf->compHeight;
1740 } else {
1741 frame_width = vf->width;
1742 frame_height = vf->height;
1743 }
1744
1745 switch (vpp_3d_mode) {
1746 case VPP_3D_MODE_LR:
1747 /*half width,double height */
1748 *ls = zoom_start_x_lines;
1749 *le = zoom_end_x_lines;
1750 *rs = *ls + (frame_width >> 1);
1751 *re = *le + (frame_width >> 1);
1752 if (process_3d_type & MODE_3D_OUT_LR) {
1753 *ls = zoom_start_x_lines;
1754 *le = zoom_end_x_lines >> 1;
1755 *rs = *ls + (frame_width >> 1);
1756 *re = *le + (frame_width >> 1);
1757 }
1758 break;
1759 case VPP_3D_MODE_TB:
1760 case VPP_3D_MODE_LA:
1761 case VPP_3D_MODE_FA:
1762 default:
1763 if (vf->trans_fmt == TVIN_TFMT_3D_FP) {
1764 *ls = vf->left_eye.start_x + crop_sx;
1765 *le = vf->left_eye.start_x + vf->left_eye.width -
1766 crop_ex - 1;
1767 *rs = vf->right_eye.start_x + crop_sx;
1768 *re = vf->right_eye.start_x + vf->right_eye.width -
1769 crop_ex - 1;
1770 } else if (process_3d_type & MODE_3D_OUT_LR) {
1771 *ls = zoom_start_x_lines;
1772 *le = zoom_end_x_lines >> 1;
1773 *rs = *ls;
1774 *re = *le;
1775 /* *rs = *ls + (vf->width); */
1776 /* *re = *le + (vf->width); */
1777 } else {
1778 *ls = *rs = zoom_start_x_lines;
1779 *le = *re = zoom_end_x_lines;
1780 }
1781 break;
1782 }
1783}
1784
1785static void zoom_get_vert_pos(struct vframe_s *vf, u32 vpp_3d_mode, u32 *ls,
1786 u32 *le, u32 *rs, u32 *re)
1787{
1788 u32 crop_sx, crop_ex, crop_sy, crop_ey, height;
1789 int frame_width, frame_height;
1790 struct disp_info_s *layer = &glayer_info[0];
1791
1792 if (!vf)
1793 return;
1794
1795 crop_sy = layer->crop_top;
1796 crop_sx = layer->crop_left;
1797 crop_ey = layer->crop_bottom;
1798 crop_ex = layer->crop_right;
1799
1800 if (vf->type & VIDTYPE_COMPRESS) {
1801 frame_width = vf->compWidth;
1802 frame_height = vf->compHeight;
1803 } else {
1804 frame_width = vf->width;
1805 frame_height = vf->height;
1806 }
1807
1808 if (vf->type & VIDTYPE_INTERLACE)
1809 height = frame_height >> 1;
1810 else
1811 height = frame_height;
1812
1813 switch (vpp_3d_mode) {
1814 case VPP_3D_MODE_TB:
1815 if (vf->trans_fmt == TVIN_TFMT_3D_FP) {
1816 if (vf->type & VIDTYPE_INTERLACE) {
1817 /*if input is interlace vertical*/
1818 /*crop will be reduce by half */
1819 *ls =
1820 (vf->left_eye.start_y +
1821 (crop_sy >> 1)) >> 1;
1822 *le =
1823 ((vf->left_eye.start_y +
1824 vf->left_eye.height -
1825 (crop_ey >> 1)) >> 1) - 1;
1826 *rs =
1827 (vf->right_eye.start_y +
1828 (crop_sy >> 1)) >> 1;
1829 *re =
1830 ((vf->right_eye.start_y +
1831 vf->left_eye.height -
1832 (crop_ey >> 1)) >> 1) - 1;
1833 } else {
1834 *ls = vf->left_eye.start_y + (crop_sy >> 1);
1835 *le = vf->left_eye.start_y +
1836 vf->left_eye.height -
1837 (crop_ey >> 1) - 1;
1838 *rs = vf->right_eye.start_y + (crop_sy >> 1);
1839 *re =
1840 vf->right_eye.start_y +
1841 vf->left_eye.height - (crop_ey >> 1) - 1;
1842 }
1843 } else {
1844 if ((vf->type & VIDTYPE_VIU_FIELD)
1845 && (vf->type & VIDTYPE_INTERLACE)) {
1846 *ls = zoom_start_y_lines >> 1;
1847 *le = zoom_end_y_lines >> 1;
1848 *rs = *ls + (height >> 1);
1849 *re = *le + (height >> 1);
1850
1851 } else if (vf->type & VIDTYPE_INTERLACE) {
1852 *ls = zoom_start_y_lines >> 1;
1853 *le = zoom_end_y_lines >> 1;
1854 *rs = *ls + height;
1855 *re = *le + height;
1856
1857 } else {
1858 /* same width,same height */
1859 *ls = zoom_start_y_lines >> 1;
1860 *le = zoom_end_y_lines >> 1;
1861 *rs = *ls + (height >> 1);
1862 *re = *le + (height >> 1);
1863 }
1864 if ((process_3d_type & MODE_3D_TO_2D_MASK)
1865 || (process_3d_type & MODE_3D_OUT_LR)) {
1866 /* same width,half height */
1867 *ls = zoom_start_y_lines;
1868 *le = zoom_end_y_lines;
1869 *rs = zoom_start_y_lines + (height >> 1);
1870 *re = zoom_end_y_lines + (height >> 1);
1871 }
1872 }
1873 break;
1874 case VPP_3D_MODE_LR:
1875 /* half width,double height */
1876 *ls = *rs = zoom_start_y_lines >> 1;
1877 *le = *re = zoom_end_y_lines >> 1;
1878 if ((process_3d_type & MODE_3D_TO_2D_MASK)
1879 || (process_3d_type & MODE_3D_OUT_LR)) {
1880 /*half width ,same height */
1881 *ls = *rs = zoom_start_y_lines;
1882 *le = *re = zoom_end_y_lines;
1883 }
1884 break;
1885 case VPP_3D_MODE_FA:
1886 /*same width same heiht */
1887 if ((process_3d_type & MODE_3D_TO_2D_MASK)
1888 || (process_3d_type & MODE_3D_OUT_LR)) {
1889 *ls = *rs = zoom_start_y_lines;
1890 *le = *re = zoom_end_y_lines;
1891 } else {
1892 *ls = *rs = (zoom_start_y_lines + crop_sy) >> 1;
1893 *le = *re = (zoom_end_y_lines + crop_ey) >> 1;
1894 }
1895 break;
1896 case VPP_3D_MODE_LA:
1897 *ls = *rs = zoom_start_y_lines;
1898 if ((process_3d_type & MODE_3D_LR_SWITCH)
1899 || (process_3d_type & MODE_3D_TO_2D_R))
1900 *ls = *rs = zoom_start_y_lines + 1;
1901 if (process_3d_type & MODE_3D_TO_2D_L)
1902 *ls = *rs = zoom_start_y_lines;
1903 *le = *re = zoom_end_y_lines;
1904 if ((process_3d_type & MODE_3D_OUT_FA_MASK)
1905 || (process_3d_type & MODE_3D_OUT_TB)
1906 || (process_3d_type & MODE_3D_OUT_LR)) {
1907 *rs = zoom_start_y_lines + 1;
1908 *ls = zoom_start_y_lines;
1909 /* *le = zoom_end_y_lines; */
1910 /* *re = zoom_end_y_lines; */
1911 }
1912 break;
1913 default:
1914 *ls = *rs = zoom_start_y_lines;
1915 *le = *re = zoom_end_y_lines;
1916 break;
1917 }
1918}
1919
1920#endif
1921static void zoom_display_horz(struct vframe_s *vf, int hscale)
1922{
1923 u32 ls = 0, le = 0, rs = 0, re = 0;
1924#ifdef TV_REVERSE
1925 int content_w, content_l, content_r;
1926#endif
1927#ifdef TV_3D_FUNCTION_OPEN
1928 if (process_3d_type & MODE_3D_ENABLE) {
1929 zoom_get_horz_pos(vf, cur_frame_par->vpp_3d_mode, &ls,
1930 &le, &rs, &re);
1931 } else {
1932 ls = rs = zoom_start_x_lines;
1933 le = re = zoom_end_x_lines;
1934 }
1935#else
1936 ls = rs = zoom_start_x_lines;
1937 le = re = zoom_end_x_lines;
1938#endif
1939 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_X0 + cur_dev->viu_off,
1940 (ls << VDIF_PIC_START_BIT) |
1941 (le << VDIF_PIC_END_BIT));
1942
1943 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_X0 + cur_dev->viu_off,
1944 (ls / 2 << VDIF_PIC_START_BIT) |
1945 (le / 2 << VDIF_PIC_END_BIT));
1946
1947 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_X1 + cur_dev->viu_off,
1948 (rs << VDIF_PIC_START_BIT) |
1949 (re << VDIF_PIC_END_BIT));
1950
1951 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_X1 + cur_dev->viu_off,
1952 (rs / 2 << VDIF_PIC_START_BIT) |
1953 (re / 2 << VDIF_PIC_END_BIT));
1954
1955 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_W + cur_dev->viu_off,
1956 (((zoom_end_x_lines - zoom_start_x_lines +
1957 1) >> hscale) << VD1_FMT_LUMA_WIDTH_BIT) |
1958 (((zoom_end_x_lines / 2 - zoom_start_x_lines / 2 +
1959 1) >> hscale) << VD1_FMT_CHROMA_WIDTH_BIT));
1960
1961 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
1962 int l_aligned;
1963 int r_aligned;
1964 int h_skip = cur_frame_par->hscale_skip_count + 1;
1965 int c_skip = 2;
1966
1967 /* After TL1, afbc supports 420/422/444*/
1968 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
1969 if (vf && (vf->type & VIDTYPE_VIU_444))
1970 c_skip = 1;
1971
1972 if ((zoom_start_x_lines > 0) ||
1973 (zoom_end_x_lines < ori_end_x_lines)) {
1974 l_aligned = round_down(ori_start_x_lines, 32);
1975 r_aligned = round_up(ori_end_x_lines + 1, 32);
1976 } else {
1977 l_aligned = round_down(zoom_start_x_lines, 32);
1978 r_aligned = round_up(zoom_end_x_lines + 1, 32);
1979 }
1980 VSYNC_WR_MPEG_REG(AFBC_VD_CFMT_W,
1981 (((r_aligned - l_aligned) / h_skip) << 16) |
1982 ((r_aligned / c_skip - l_aligned / c_skip) / h_skip));
1983
1984 VSYNC_WR_MPEG_REG(AFBC_MIF_HOR_SCOPE,
1985 ((l_aligned / 32) << 16) |
1986 ((r_aligned / 32) - 1));
1987
1988 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
1989 VSYNC_WR_MPEG_REG(AFBC_SIZE_OUT,
1990 (VSYNC_RD_MPEG_REG(AFBC_SIZE_OUT)
1991 & 0xffff) |
1992 (((r_aligned - l_aligned) / h_skip) << 16));
1993 }
1994#ifdef TV_REVERSE
1995 if (reverse) {
1996 content_w = zoom_end_x_lines - zoom_start_x_lines + 1;
1997 content_l = (r_aligned - zoom_end_x_lines - 1);
1998 content_r = content_l + content_w - 1;
1999 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
2000 (((content_l << 16)) | content_r) / h_skip);
2001 } else
2002#endif
2003 {
2004 if (((process_3d_type & MODE_3D_FA)
2005 || (process_3d_type & MODE_FORCE_3D_FA_LR))
2006 && (cur_frame_par->vpp_3d_mode == 1)) {
2007 /* do nothing*/
2008 } else {
2009 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
2010 (((zoom_start_x_lines - l_aligned) << 16) |
2011 (zoom_end_x_lines - l_aligned)) / h_skip);
2012 }
2013 }
2014 VSYNC_WR_MPEG_REG(AFBC_SIZE_IN,
2015 (VSYNC_RD_MPEG_REG(AFBC_SIZE_IN) & 0xffff) |
2016 ((r_aligned - l_aligned) << 16));
2017 }
2018
2019#ifdef VIDEO_PIP
2020 if (!cur_pipbuf)
2021#endif
2022 {
2023 VSYNC_WR_MPEG_REG(
2024 VD2_IF0_LUMA_X0 + cur_dev->viu_off,
2025 (ls << VDIF_PIC_START_BIT) |
2026 (le << VDIF_PIC_END_BIT));
2027
2028 VSYNC_WR_MPEG_REG(
2029 VD2_IF0_CHROMA_X0 + cur_dev->viu_off,
2030 (ls / 2 << VDIF_PIC_START_BIT) |
2031 (le / 2 << VDIF_PIC_END_BIT));
2032
2033 VSYNC_WR_MPEG_REG(
2034 VD2_IF0_LUMA_X1 + cur_dev->viu_off,
2035 (rs << VDIF_PIC_START_BIT) |
2036 (re << VDIF_PIC_END_BIT));
2037
2038 VSYNC_WR_MPEG_REG(
2039 VD2_IF0_CHROMA_X1 + cur_dev->viu_off,
2040 (rs / 2 << VDIF_PIC_START_BIT) |
2041 (re / 2 << VDIF_PIC_END_BIT));
2042
2043 VSYNC_WR_MPEG_REG(
2044 VIU_VD2_FMT_W + cur_dev->viu_off,
2045 (((zoom_end_x_lines - zoom_start_x_lines +
2046 1) >> hscale) << VD1_FMT_LUMA_WIDTH_BIT) |
2047 (((zoom_end_x_lines / 2 - zoom_start_x_lines / 2 +
2048 1) >> hscale) << VD1_FMT_CHROMA_WIDTH_BIT));
2049 }
2050}
2051
2052static void vd2_zoom_display_horz(struct vframe_s *vf, int hscale)
2053{
2054 u32 ls, le, rs, re;
2055#ifdef TV_REVERSE
2056 int content_w, content_l, content_r;
2057#endif
2058 ls = rs = zoom2_start_x_lines;
2059 le = re = zoom2_end_x_lines;
2060
2061 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
2062 int l_aligned;
2063 int r_aligned;
2064 int h_skip = hscale + 1;
2065 int c_skip = 2;
2066
2067 /* After TL1, afbc supports 420/422/444*/
2068 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2069 if (vf && (vf->type & VIDTYPE_VIU_444))
2070 c_skip = 1;
2071
2072 if ((zoom2_start_x_lines > 0) ||
2073 (zoom2_end_x_lines < ori2_end_x_lines)) {
2074 l_aligned = round_down(ori2_start_x_lines, 32);
2075 r_aligned = round_up(ori2_end_x_lines + 1, 32);
2076 } else {
2077 l_aligned = round_down(zoom2_start_x_lines, 32);
2078 r_aligned = round_up(zoom2_end_x_lines + 1, 32);
2079 }
2080 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_W,
2081 (((r_aligned - l_aligned) / h_skip) << 16) |
2082 ((r_aligned / c_skip - l_aligned / c_skip) / h_skip));
2083
2084 VSYNC_WR_MPEG_REG(VD2_AFBC_MIF_HOR_SCOPE,
2085 ((l_aligned / 32) << 16) |
2086 ((r_aligned / 32) - 1));
2087 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
2088 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_OUT,
2089 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_OUT)
2090 & 0xffff) |
2091 (((r_aligned - l_aligned) / h_skip) << 16));
2092 }
2093#ifdef TV_REVERSE
2094 if (reverse) {
2095 content_w = zoom2_end_x_lines - zoom2_start_x_lines + 1;
2096 content_l = (r_aligned - zoom2_end_x_lines - 1) +
2097 (zoom2_start_x_lines - l_aligned);
2098 content_r = content_l + content_w - 1;
2099 VSYNC_WR_MPEG_REG(VD2_AFBC_PIXEL_HOR_SCOPE,
2100 (content_l << 16) | content_r);
2101 } else
2102#endif
2103 {
2104 VSYNC_WR_MPEG_REG(VD2_AFBC_PIXEL_HOR_SCOPE,
2105 ((zoom2_start_x_lines - l_aligned) << 16) |
2106 (zoom2_end_x_lines - l_aligned));
2107 }
2108 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_IN,
2109 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_IN) & 0xffff) |
2110 ((r_aligned - l_aligned) << 16));
2111 }
2112
2113 VSYNC_WR_MPEG_REG(
2114 VD2_IF0_LUMA_X0 + cur_dev->viu_off,
2115 (ls << VDIF_PIC_START_BIT) |
2116 (le << VDIF_PIC_END_BIT));
2117
2118 VSYNC_WR_MPEG_REG(
2119 VD2_IF0_CHROMA_X0 + cur_dev->viu_off,
2120 (ls / 2 << VDIF_PIC_START_BIT) |
2121 (le / 2 << VDIF_PIC_END_BIT));
2122
2123 VSYNC_WR_MPEG_REG(
2124 VD2_IF0_LUMA_X1 + cur_dev->viu_off,
2125 (rs << VDIF_PIC_START_BIT) |
2126 (re << VDIF_PIC_END_BIT));
2127
2128 VSYNC_WR_MPEG_REG(
2129 VD2_IF0_CHROMA_X1 + cur_dev->viu_off,
2130 (rs / 2 << VDIF_PIC_START_BIT) |
2131 (re / 2 << VDIF_PIC_END_BIT));
2132
2133 VSYNC_WR_MPEG_REG(
2134 VIU_VD2_FMT_W + cur_dev->viu_off,
2135 (((le - ls + 1) >> hscale)
2136 << VD1_FMT_LUMA_WIDTH_BIT) |
2137 (((le / 2 - ls / 2 + 1) >> hscale)
2138 << VD1_FMT_CHROMA_WIDTH_BIT));
2139}
2140
2141static void zoom_display_vert(struct vframe_s *vf)
2142{
2143
2144 u32 ls = 0, le = 0, rs = 0, re = 0;
2145
2146 if (process_3d_type & MODE_3D_ENABLE) {
2147 zoom_get_vert_pos(vf,
2148 cur_frame_par->vpp_3d_mode, &ls,
2149 &le, &rs, &re);
2150 } else {
2151 ls = rs = zoom_start_y_lines;
2152 le = re = zoom_end_y_lines;
2153 }
2154
2155 if ((vf) && (vf->type & VIDTYPE_MVC)) {
2156 if (is_need_framepacking_output()) {
2157 VSYNC_WR_MPEG_REG(
2158 VD1_IF0_LUMA_Y0 + cur_dev->viu_off,
2159 (ls << VDIF_PIC_START_BIT) |
2160 (le << VDIF_PIC_END_BIT));
2161
2162 VSYNC_WR_MPEG_REG(
2163 VD1_IF0_CHROMA_Y0 + cur_dev->viu_off,
2164 ((ls / 2) << VDIF_PIC_START_BIT) |
2165 ((le / 2) << VDIF_PIC_END_BIT));
2166
2167 VSYNC_WR_MPEG_REG(
2168 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2169 (rs << VDIF_PIC_START_BIT) |
2170 (re << VDIF_PIC_END_BIT));
2171
2172 VSYNC_WR_MPEG_REG(
2173 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2174 ((rs / 2) << VDIF_PIC_START_BIT) |
2175 ((re / 2) << VDIF_PIC_END_BIT));
2176 } else {
2177 VSYNC_WR_MPEG_REG(
2178 VD1_IF0_LUMA_Y0 + cur_dev->viu_off,
2179 (ls * 2 << VDIF_PIC_START_BIT) |
2180 ((le * 2 - 1) << VDIF_PIC_END_BIT));
2181
2182 VSYNC_WR_MPEG_REG(
2183 VD1_IF0_CHROMA_Y0 + cur_dev->viu_off,
2184 ((ls) << VDIF_PIC_START_BIT) |
2185 ((le - 1) << VDIF_PIC_END_BIT));
2186
2187 VSYNC_WR_MPEG_REG(
2188 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2189 (ls * 2 << VDIF_PIC_START_BIT) |
2190 ((le * 2 - 1) << VDIF_PIC_END_BIT));
2191
2192 VSYNC_WR_MPEG_REG(
2193 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2194 ((ls) << VDIF_PIC_START_BIT) |
2195 ((le - 1) << VDIF_PIC_END_BIT));
2196 }
2197 } else {
2198 VSYNC_WR_MPEG_REG(
2199 VD1_IF0_LUMA_Y0 + cur_dev->viu_off,
2200 (ls << VDIF_PIC_START_BIT) |
2201 (le << VDIF_PIC_END_BIT));
2202
2203 VSYNC_WR_MPEG_REG(
2204 VD1_IF0_CHROMA_Y0 + cur_dev->viu_off,
2205 ((ls / 2) << VDIF_PIC_START_BIT) |
2206 ((le / 2) << VDIF_PIC_END_BIT));
2207
2208 VSYNC_WR_MPEG_REG(
2209 VD1_IF0_LUMA_Y1 + cur_dev->viu_off,
2210 (rs << VDIF_PIC_START_BIT) |
2211 (re << VDIF_PIC_END_BIT));
2212
2213 VSYNC_WR_MPEG_REG(
2214 VD1_IF0_CHROMA_Y1 + cur_dev->viu_off,
2215 ((rs / 2) << VDIF_PIC_START_BIT) |
2216 ((re / 2) << VDIF_PIC_END_BIT));
2217
2218#ifdef VIDEO_PIP
2219 if (!cur_pipbuf)
2220#endif
2221 {
2222 VSYNC_WR_MPEG_REG(
2223 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2224 (ls << VDIF_PIC_START_BIT) |
2225 (le << VDIF_PIC_END_BIT));
2226
2227 VSYNC_WR_MPEG_REG(
2228 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2229 ((ls / 2) << VDIF_PIC_START_BIT) |
2230 ((le / 2) << VDIF_PIC_END_BIT));
2231
2232 VSYNC_WR_MPEG_REG(
2233 VD2_IF0_LUMA_Y1 + cur_dev->viu_off,
2234 (rs << VDIF_PIC_START_BIT) |
2235 (re << VDIF_PIC_END_BIT));
2236
2237 VSYNC_WR_MPEG_REG(
2238 VD2_IF0_CHROMA_Y1 + cur_dev->viu_off,
2239 ((rs / 2) << VDIF_PIC_START_BIT) |
2240 ((re / 2) << VDIF_PIC_END_BIT));
2241 }
2242 }
2243
2244 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
2245 int t_aligned;
2246 int b_aligned;
2247 int ori_t_aligned;
2248 int ori_b_aligned;
2249 int v_skip = cur_frame_par->vscale_skip_count + 1;
2250 int c_skip = 2;
2251
2252 /* After TL1, afbc supports 420/422/444*/
2253 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2254 if (vf && ((vf->type & VIDTYPE_VIU_444)
2255 || (vf->type & VIDTYPE_VIU_422)))
2256 c_skip = 1;
2257
2258 t_aligned = round_down(zoom_start_y_lines, 4);
2259 b_aligned = round_up(zoom_end_y_lines + 1, 4);
2260
2261 ori_t_aligned = round_down(ori_start_y_lines, 4);
2262 ori_b_aligned = round_up(ori_end_y_lines + 1, 4);
2263 VSYNC_WR_MPEG_REG(AFBC_VD_CFMT_H,
2264 (b_aligned - t_aligned) / c_skip / v_skip);
2265
2266 if (((process_3d_type & MODE_3D_FA)
2267 || (process_3d_type & MODE_FORCE_3D_FA_TB))
2268 && (cur_frame_par->vpp_3d_mode == 2)) {
2269 int block_h;
2270
2271 block_h = ori_b_aligned - ori_t_aligned;
2272 block_h = block_h / 8;
2273 if (toggle_3d_fa_frame == OUT_FA_B_FRAME) {
2274 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
2275 (((ori_t_aligned / 4) + block_h) << 16) |
2276 ((ori_b_aligned / 4) - 1));
2277 } else {
2278 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
2279 ((ori_t_aligned / 4) << 16) |
2280 ((ori_t_aligned / 4) + block_h - 1));
2281 }
2282 } else {
2283 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
2284 ((t_aligned / 4) << 16) |
2285 ((b_aligned / 4) - 1));
2286 }
2287 VSYNC_WR_MPEG_REG(AFBC_PIXEL_VER_SCOPE,
2288 ((zoom_start_y_lines - t_aligned) << 16) |
2289 (zoom_end_y_lines - t_aligned));
2290 /* afbc pixel vertical output region must be
2291 * [0, zoom_end_y_lines - zoom_start_y_lines]
2292 */
2293 VSYNC_WR_MPEG_REG(AFBC_PIXEL_VER_SCOPE,
2294 (zoom_end_y_lines - zoom_start_y_lines));
2295
2296 VSYNC_WR_MPEG_REG(AFBC_SIZE_IN,
2297 (VSYNC_RD_MPEG_REG(AFBC_SIZE_IN)
2298 & 0xffff0000) |
2299 (ori_b_aligned - ori_t_aligned));
2300 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
2301 VSYNC_WR_MPEG_REG(AFBC_SIZE_OUT,
2302 (VSYNC_RD_MPEG_REG(AFBC_SIZE_OUT) &
2303 0xffff0000) |
2304 ((b_aligned - t_aligned) / v_skip));
2305 }
2306 }
2307}
2308
2309static void vd2_zoom_display_vert(struct vframe_s *vf, int vscale)
2310{
2311
2312 u32 ls, le, rs, re;
2313
2314 ls = rs = zoom2_start_y_lines;
2315 le = re = zoom2_end_y_lines;
2316
2317 /* vd2 */
2318 VSYNC_WR_MPEG_REG(
2319 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2320 (ls << VDIF_PIC_START_BIT) |
2321 (le << VDIF_PIC_END_BIT));
2322
2323 VSYNC_WR_MPEG_REG(
2324 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2325 ((ls / 2) << VDIF_PIC_START_BIT) |
2326 ((le / 2) << VDIF_PIC_END_BIT));
2327
2328 VSYNC_WR_MPEG_REG(
2329 VD2_IF0_LUMA_Y1 + cur_dev->viu_off,
2330 (rs << VDIF_PIC_START_BIT) |
2331 (re << VDIF_PIC_END_BIT));
2332
2333 VSYNC_WR_MPEG_REG(
2334 VD2_IF0_CHROMA_Y1 + cur_dev->viu_off,
2335 ((rs / 2) << VDIF_PIC_START_BIT) |
2336 ((re / 2) << VDIF_PIC_END_BIT));
2337
2338 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
2339 int t_aligned;
2340 int b_aligned;
2341 int ori_t_aligned;
2342 int ori_b_aligned;
2343 int v_skip = vscale + 1;
2344 int c_skip = 2;
2345
2346 /* After TL1, afbc supports 420/422/444*/
2347 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2348 if (vf && ((vf->type & VIDTYPE_VIU_444)
2349 || (vf->type & VIDTYPE_VIU_422)))
2350 c_skip = 1;
2351
2352 t_aligned = round_down(zoom2_start_y_lines, 4);
2353 b_aligned = round_up(zoom2_end_y_lines + 1, 4);
2354
2355 ori_t_aligned = round_down(ori2_start_y_lines, 4);
2356 ori_b_aligned = round_up(ori2_end_y_lines + 1, 4);
2357
2358 /* TODO: afbc setting only support 420 for now */
2359 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_H,
2360 (b_aligned - t_aligned) / c_skip / v_skip);
2361
2362 VSYNC_WR_MPEG_REG(VD2_AFBC_MIF_VER_SCOPE,
2363 ((t_aligned / 4) << 16) |
2364 ((b_aligned / 4) - 1));
2365
2366 VSYNC_WR_MPEG_REG(VD2_AFBC_PIXEL_VER_SCOPE,
2367 ((zoom2_start_y_lines - t_aligned) << 16) |
2368 (zoom2_end_y_lines - t_aligned));
2369
2370 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_IN,
2371 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_IN)
2372 & 0xffff0000) |
2373 (ori_b_aligned - ori_t_aligned));
2374 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
2375 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_OUT,
2376 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_OUT)
2377 & 0xffff0000) |
2378 ((b_aligned - t_aligned) / v_skip));
2379 }
2380 }
2381}
2382
2383#ifdef TV_3D_FUNCTION_OPEN
2384/* judge the out mode is 240:LBRBLRBR or 120:LRLRLR */
2385static void judge_3d_fa_out_mode(void)
2386{
2387 if ((process_3d_type & MODE_3D_OUT_FA_MASK)
2388 && pause_one_3d_fl_frame == 2)
2389 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2390 else if ((process_3d_type & MODE_3D_OUT_FA_MASK)
2391 && pause_one_3d_fl_frame == 1)
2392 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2393 else if ((process_3d_type & MODE_3D_OUT_FA_MASK)
2394 && pause_one_3d_fl_frame == 0) {
2395 /* toggle_3d_fa_frame determine*/
2396 /*the out frame is L or R or blank */
2397 if ((process_3d_type & MODE_3D_OUT_FA_L_FIRST)) {
2398 if ((vsync_count % 2) == 0)
2399 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2400 else
2401 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2402 } else if ((process_3d_type & MODE_3D_OUT_FA_R_FIRST)) {
2403 if ((vsync_count % 2) == 0)
2404 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2405 else
2406 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2407 } else if ((process_3d_type & MODE_3D_OUT_FA_LB_FIRST)) {
2408 if ((vsync_count % 4) == 0)
2409 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2410 else if ((vsync_count % 4) == 2)
2411 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2412 else
2413 toggle_3d_fa_frame = OUT_FA_BANK_FRAME;
2414 } else if ((process_3d_type & MODE_3D_OUT_FA_RB_FIRST)) {
2415 if ((vsync_count % 4) == 0)
2416 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2417 else if ((vsync_count % 4) == 2)
2418 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2419 else
2420 toggle_3d_fa_frame = OUT_FA_BANK_FRAME;
2421 }
2422 } else
2423 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2424}
2425
2426#endif
2427
2428static void vframe_canvas_set(struct canvas_config_s *config, u32 planes,
2429 u32 *index)
2430{
2431 int i;
2432 u32 *canvas_index = index;
2433
2434 struct canvas_config_s *cfg = config;
2435
2436 for (i = 0; i < planes; i++, canvas_index++, cfg++)
2437 canvas_config_config(*canvas_index, cfg);
2438}
2439
2440#ifdef PTS_LOGGING
2441static void log_vsync_video_pattern(int pattern)
2442{
2443 int factor1 = 0, factor2 = 0, pattern_range = 0;
2444
2445 if (pattern >= PTS_MAX_NUM_PATTERNS)
2446 return;
2447
2448 if (pattern == PTS_32_PATTERN) {
2449 factor1 = 3;
2450 factor2 = 2;
2451 pattern_range = PTS_32_PATTERN_DETECT_RANGE;
2452 } else if (pattern == PTS_22_PATTERN) {
2453 factor1 = 2;
2454 factor2 = 2;
2455 pattern_range = PTS_22_PATTERN_DETECT_RANGE;
2456 } else if (pattern == PTS_41_PATTERN) {
2457 /* update 2111 mode detection */
2458 if (pts_trace == 2) {
2459 if ((pts_41_pattern_sink[1] == 1) &&
2460 (pts_41_pattern_sink[2] == 1) &&
2461 (pts_41_pattern_sink[3] == 1) &&
2462 (pts_pattern[PTS_41_PATTERN] <
2463 PTS_41_PATTERN_DETECT_RANGE)) {
2464 pts_pattern[PTS_41_PATTERN]++;
2465 if (pts_pattern[PTS_41_PATTERN] ==
2466 PTS_41_PATTERN_DETECT_RANGE) {
2467 pts_pattern_enter_cnt[PTS_41_PATTERN]++;
2468 pts_pattern_detected = pattern;
2469 if (pts_log_enable[PTS_41_PATTERN])
2470 pr_info("video 4:1 mode detected\n");
2471 }
2472 }
2473 pts_41_pattern_sink[0] = 2;
2474 pts_41_pattern_sink_index = 1;
2475 } else if (pts_trace == 1) {
2476 if ((pts_41_pattern_sink_index <
2477 PTS_41_PATTERN_SINK_MAX) &&
2478 (pts_41_pattern_sink_index > 0)) {
2479 pts_41_pattern_sink[pts_41_pattern_sink_index]
2480 = 1;
2481 pts_41_pattern_sink_index++;
2482 } else if (pts_pattern[PTS_41_PATTERN] ==
2483 PTS_41_PATTERN_DETECT_RANGE) {
2484 pts_pattern[PTS_41_PATTERN] = 0;
2485 pts_41_pattern_sink_index = 0;
2486 pts_pattern_exit_cnt[PTS_41_PATTERN]++;
2487 memset(&pts_41_pattern_sink[0], 0,
2488 PTS_41_PATTERN_SINK_MAX);
2489 if (pts_log_enable[PTS_41_PATTERN])
2490 pr_info("video 4:1 mode broken\n");
2491 } else {
2492 pts_pattern[PTS_41_PATTERN] = 0;
2493 pts_41_pattern_sink_index = 0;
2494 memset(&pts_41_pattern_sink[0], 0,
2495 PTS_41_PATTERN_SINK_MAX);
2496 }
2497 } else if (pts_pattern[PTS_41_PATTERN] ==
2498 PTS_41_PATTERN_DETECT_RANGE) {
2499 pts_pattern[PTS_41_PATTERN] = 0;
2500 pts_41_pattern_sink_index = 0;
2501 memset(&pts_41_pattern_sink[0], 0,
2502 PTS_41_PATTERN_SINK_MAX);
2503 pts_pattern_exit_cnt[PTS_41_PATTERN]++;
2504 if (pts_log_enable[PTS_41_PATTERN])
2505 pr_info("video 4:1 mode broken\n");
2506 } else {
2507 pts_pattern[PTS_41_PATTERN] = 0;
2508 pts_41_pattern_sink_index = 0;
2509 memset(&pts_41_pattern_sink[0], 0,
2510 PTS_41_PATTERN_SINK_MAX);
2511 }
2512 return;
2513 }
2514
2515
2516 /* update 3:2 or 2:2 mode detection */
2517 if (((pre_pts_trace == factor1) && (pts_trace == factor2)) ||
2518 ((pre_pts_trace == factor2) && (pts_trace == factor1))) {
2519 if (pts_pattern[pattern] < pattern_range) {
2520 pts_pattern[pattern]++;
2521 if (pts_pattern[pattern] == pattern_range) {
2522 pts_pattern_enter_cnt[pattern]++;
2523 pts_pattern_detected = pattern;
2524 if (pts_log_enable[pattern])
2525 pr_info("video %d:%d mode detected\n",
2526 factor1, factor2);
2527 }
2528 }
2529 } else if (pts_pattern[pattern] == pattern_range) {
2530 pts_pattern[pattern] = 0;
2531 pts_pattern_exit_cnt[pattern]++;
2532 if (pts_log_enable[pattern])
2533 pr_info("video %d:%d mode broken\n", factor1, factor2);
2534 } else
2535 pts_pattern[pattern] = 0;
2536}
2537
2538static void vsync_video_pattern(void)
2539{
2540 /* Check for 3:2*/
2541 log_vsync_video_pattern(PTS_32_PATTERN);
2542 /* Check for 2:2*/
2543 log_vsync_video_pattern(PTS_22_PATTERN);
2544 /* Check for 4:1*/
2545 log_vsync_video_pattern(PTS_41_PATTERN);
2546}
2547#endif
2548
2549static inline void vd1_path_select(bool afbc)
2550{
2551 u32 misc_off = cur_dev->vpp_off;
2552
2553 if (!legacy_vpp) {
2554 VSYNC_WR_MPEG_REG_BITS(
2555 VD1_AFBCD0_MISC_CTRL,
2556 /* go field sel */
2557 (0 << 20) |
2558 /* linebuffer en */
2559 (0 << 16) |
2560 /* vd1 -> dolby -> vpp top */
2561 (0 << 14) |
2562 /* axi sel: vd1 mif or afbc */
2563 ((afbc ? 1 : 0) << 12) |
2564 /* data sel: vd1 & afbc0 (not osd4) */
2565 (0 << 11) |
2566 /* data sel: afbc0 or vd1 */
2567 ((afbc ? 1 : 0) << 10) |
2568 /* afbc0 to vd1 (not di) */
2569 (0 << 9) |
2570 /* vd1 mif to vpp (not di) */
2571 (0 << 8) |
2572 /* afbc0 gclk ctrl */
2573 (0 << 0),
2574 0, 22);
2575 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2576 VSYNC_WR_MPEG_REG_BITS(
2577 VD1_AFBCD0_MISC_CTRL,
2578 /* Vd1_afbc0_mem_sel */
2579 (afbc ? 1 : 0),
2580 22, 1);
2581
2582#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
2583 if (!cpu_after_eq(MESON_CPU_MAJOR_ID_G12A))
2584 return;
2585 if ((DI_POST_REG_RD(DI_POST_CTRL) & 0x100) != 0) {
2586 /* check di_vpp_out_en bit */
2587 VSYNC_WR_MPEG_REG_BITS(
2588 VD1_AFBCD0_MISC_CTRL,
2589 /* vd1 mif to di */
2590 1,
2591 8, 2);
2592 VSYNC_WR_MPEG_REG_BITS(
2593 VD1_AFBCD0_MISC_CTRL,
2594 /* go field select di post */
2595 1,
2596 20, 2);
2597 }
2598#endif
2599 } else {
2600#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
2601 if ((DI_POST_REG_RD(DI_POST_CTRL) & 0x100) == 0)
2602 /* mif sel */
2603#endif
2604 VSYNC_WR_MPEG_REG_BITS(
2605 VIU_MISC_CTRL0 + misc_off,
2606 0, 16, 3);
2607 VSYNC_WR_MPEG_REG_BITS(
2608 VIU_MISC_CTRL0 + misc_off,
2609 (afbc ? 1 : 0), 20, 1);
2610 }
2611}
2612
2613static inline void vd2_path_select(bool afbc)
2614{
2615 u32 misc_off = cur_dev->vpp_off;
2616
2617 if (!legacy_vpp) {
2618 VSYNC_WR_MPEG_REG_BITS(
2619 VD2_AFBCD1_MISC_CTRL,
2620 /* go field sel */
2621 (0 << 20) |
2622 /* linebuffer en */
2623 (0 << 16) |
2624 /* TODO: vd2 -> dolby -> vpp top ?? */
2625 (0 << 14) |
2626 /* axi sel: vd2 mif */
2627 ((afbc ? 1 : 0) << 12) |
2628 /* data sel: vd2 & afbc1 (not osd4) */
2629 (0 << 11) |
2630 /* data sel: afbc1 */
2631 ((afbc ? 1 : 0) << 10) |
2632 /* afbc1 to vd2 (not di) */
2633 (0 << 9) |
2634 /* vd2 mif to vpp (not di) */
2635 (0 << 8) |
2636 /* afbc1 gclk ctrl */
2637 (0 << 0),
2638 0, 22);
2639 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2640 VSYNC_WR_MPEG_REG_BITS(
2641 VD2_AFBCD1_MISC_CTRL,
2642 /* Vd2_afbc0_mem_sel */
2643 (afbc ? 1 : 0),
2644 22, 1);
2645 } else {
2646 VSYNC_WR_MPEG_REG_BITS(
2647 VIU_MISC_CTRL1 + misc_off,
2648 (afbc ? 2 : 0), 0, 2);
2649 }
2650}
2651
2652#ifdef VIDEO_PIP
2653s32 config_vd_pps(
2654 u8 layer_id,
2655 struct vpp_frame_par_s *cur_frame_par,
2656 struct scaler_setting_s *setting,
2657 const struct vinfo_s *info)
2658{
2659 struct vppfilter_mode_s *vpp_filter;
2660
2661 if (!cur_frame_par || !info || !setting)
2662 return -1;
2663
2664 vpp_filter = &cur_frame_par->vpp_filter;
2665 setting->frame_par = cur_frame_par;
2666 setting->id = layer_id;
2667 setting->misc_reg_offt = 0;
2668 /* enable pps as default */
2669 setting->sc_top_enable = true;
2670 setting->sc_h_enable = true;
2671 setting->sc_v_enable = true;
2672
2673 if ((vpp_filter->vpp_hsc_start_phase_step == 0x1000000)
2674 && (vpp_filter->vpp_vsc_start_phase_step == 0x1000000)
2675 && (vpp_filter->vpp_hsc_start_phase_step ==
2676 vpp_filter->vpp_hf_start_phase_step)
2677 && !vpp_filter->vpp_pre_vsc_en
2678 && !vpp_filter->vpp_pre_hsc_en
2679 && !cur_frame_par->supsc0_enable
2680 && !cur_frame_par->supsc1_enable
2681 && bypass_pps)
2682 setting->sc_top_enable = false;
2683
2684 /* old chip: vd2 has no pps */
2685 if ((legacy_vpp || is_meson_tl1_cpu())
2686 && (setting->id != 0))
2687 setting->sc_top_enable = false;
2688
2689 setting->vinfo_width = info->width;
2690 setting->vinfo_height = info->height;
2691 return 0;
2692}
2693
2694static inline void vd2_scaler_setting(
2695 struct scaler_setting_s *setting)
2696{
2697 u32 misc_off, i;
2698 u32 r1, r2, r3;
2699 struct vpp_frame_par_s *frame_par;
2700 struct vppfilter_mode_s *vpp_filter;
2701
2702 if (legacy_vpp || !setting
2703 || !setting->frame_par
2704 || is_meson_tl1_cpu())
2705 return;
2706
2707 frame_par = setting->frame_par;
2708 misc_off = setting->misc_reg_offt;
2709 vpp_filter = &frame_par->vpp_filter;
2710
2711 if (setting->sc_top_enable) {
2712 u32 sc_misc_val;
2713
2714 sc_misc_val = VPP_SC_TOP_EN | VPP_SC_V1OUT_EN;
2715 if (setting->sc_h_enable) {
2716 sc_misc_val |= (((vpp_filter->vpp_pre_hsc_en & 1)
2717 << VPP_SC_PREHORZ_EN_BIT)
2718 | VPP_SC_HORZ_EN);
2719 sc_misc_val |= ((vpp_filter->vpp_horz_coeff[0] & 7)
2720 << VPP_SC_HBANK_LENGTH_BIT);
2721 }
2722
2723 if (setting->sc_v_enable) {
2724 sc_misc_val |= (((vpp_filter->vpp_pre_vsc_en & 1)
2725 << VPP_SC_PREVERT_EN_BIT)
2726 | VPP_SC_VERT_EN);
2727 sc_misc_val |= ((vpp_filter->vpp_pre_vsc_en & 1)
2728 << VPP_LINE_BUFFER_EN_BIT);
2729 sc_misc_val |= ((vpp_filter->vpp_vert_coeff[0] & 7)
2730 << VPP_SC_VBANK_LENGTH_BIT);
2731 }
2732 VSYNC_WR_MPEG_REG(
2733 VD2_SC_MISC + misc_off,
2734 sc_misc_val);
2735 } else {
2736 setting->sc_v_enable = false;
2737 setting->sc_h_enable = false;
2738 VSYNC_WR_MPEG_REG_BITS(
2739 VD2_SC_MISC + misc_off,
2740 0, VPP_SC_TOP_EN_BIT,
2741 VPP_SC_TOP_EN_WID);
2742 }
2743
2744 /* horitontal filter settings */
2745 if (setting->sc_h_enable) {
2746 if (vpp_filter->vpp_horz_coeff[1] & 0x8000) {
2747 VSYNC_WR_MPEG_REG(
2748 VD2_SCALE_COEF_IDX + misc_off,
2749 VPP_COEF_HORZ | VPP_COEF_9BIT);
2750 } else {
2751 VSYNC_WR_MPEG_REG(
2752 VD2_SCALE_COEF_IDX + misc_off,
2753 VPP_COEF_HORZ);
2754 }
2755 for (i = 0; i <
2756 (vpp_filter->vpp_horz_coeff[1] & 0xff); i++) {
2757 VSYNC_WR_MPEG_REG(
2758 VD2_SCALE_COEF + misc_off,
2759 vpp_filter->vpp_horz_coeff[i + 2]);
2760 }
2761 r1 = frame_par->VPP_hsc_linear_startp
2762 - frame_par->VPP_hsc_startp;
2763 r2 = frame_par->VPP_hsc_linear_endp
2764 - frame_par->VPP_hsc_startp;
2765 r3 = frame_par->VPP_hsc_endp
2766 - frame_par->VPP_hsc_startp;
2767
2768 VSYNC_WR_MPEG_REG_BITS(
2769 VD2_HSC_PHASE_CTRL + misc_off,
2770 frame_par->VPP_hf_ini_phase_,
2771 VPP_HSC_TOP_INI_PHASE_BIT,
2772 VPP_HSC_TOP_INI_PHASE_WID);
2773
2774 VSYNC_WR_MPEG_REG(
2775 VD2_HSC_REGION12_STARTP + misc_off,
2776 (0 << VPP_REGION1_BIT) |
2777 ((r1 & VPP_REGION_MASK)
2778 << VPP_REGION2_BIT));
2779 VSYNC_WR_MPEG_REG(
2780 VD2_HSC_REGION34_STARTP + misc_off,
2781 ((r2 & VPP_REGION_MASK)
2782 << VPP_REGION3_BIT) |
2783 ((r3 & VPP_REGION_MASK)
2784 << VPP_REGION4_BIT));
2785 VSYNC_WR_MPEG_REG(
2786 VD2_HSC_REGION4_ENDP + misc_off, r3);
2787
2788 VSYNC_WR_MPEG_REG(
2789 VD2_HSC_START_PHASE_STEP + misc_off,
2790 vpp_filter->vpp_hf_start_phase_step);
2791
2792 VSYNC_WR_MPEG_REG(
2793 VD2_HSC_REGION1_PHASE_SLOPE + misc_off,
2794 vpp_filter->vpp_hf_start_phase_slope);
2795
2796 VSYNC_WR_MPEG_REG(
2797 VD2_HSC_REGION3_PHASE_SLOPE + misc_off,
2798 vpp_filter->vpp_hf_end_phase_slope);
2799 }
2800
2801 /* vertical filter settings */
2802 if (setting->sc_v_enable) {
2803 VSYNC_WR_MPEG_REG_BITS(
2804 VD2_VSC_PHASE_CTRL + misc_off,
2805 (vpp_filter->vpp_vert_coeff[0] == 2) ? 1 : 0,
2806 VPP_PHASECTL_DOUBLELINE_BIT,
2807 VPP_PHASECTL_DOUBLELINE_WID);
2808 VSYNC_WR_MPEG_REG(
2809 VD2_SCALE_COEF_IDX + misc_off,
2810 VPP_COEF_VERT);
2811 for (i = 0; i < vpp_filter->vpp_vert_coeff[1]; i++) {
2812 VSYNC_WR_MPEG_REG(
2813 VD2_SCALE_COEF + misc_off,
2814 vpp_filter->vpp_vert_coeff[i + 2]);
2815 }
2816
2817 /* vertical chroma filter settings */
2818 if (vpp_filter->vpp_vert_chroma_filter_en) {
2819 const u32 *pCoeff =
2820 vpp_filter->vpp_vert_chroma_coeff;
2821 VSYNC_WR_MPEG_REG(
2822 VD2_SCALE_COEF_IDX + misc_off,
2823 VPP_COEF_VERT_CHROMA
2824 |VPP_COEF_SEP_EN);
2825 for (i = 0; i < pCoeff[1]; i++)
2826 VSYNC_WR_MPEG_REG(
2827 VD2_SCALE_COEF + misc_off,
2828 pCoeff[i + 2]);
2829 }
2830
2831 r1 = frame_par->VPP_vsc_endp
2832 - frame_par->VPP_vsc_startp;
2833 VSYNC_WR_MPEG_REG(
2834 VD2_VSC_REGION12_STARTP + misc_off, 0);
2835
2836 VSYNC_WR_MPEG_REG(
2837 VD2_VSC_REGION34_STARTP + misc_off,
2838 ((r1 & VPP_REGION_MASK)
2839 << VPP_REGION3_BIT) |
2840 ((r1 & VPP_REGION_MASK)
2841 << VPP_REGION4_BIT));
2842
2843 VSYNC_WR_MPEG_REG(
2844 VD2_VSC_REGION4_ENDP + misc_off, r1);
2845
2846 VSYNC_WR_MPEG_REG(
2847 VD2_VSC_START_PHASE_STEP + misc_off,
2848 vpp_filter->vpp_vsc_start_phase_step);
2849 }
2850
2851 VSYNC_WR_MPEG_REG(
2852 VPP_VD2_HDR_IN_SIZE + misc_off,
2853 (frame_par->VPP_pic_in_height_ << 16)
2854 | frame_par->VPP_line_in_length_);
2855}
2856
2857s32 config_vd_blend(
2858 u8 layer_id,
2859 struct vpp_frame_par_s *cur_frame_par,
2860 struct vframe_s *vf,
2861 u32 layer_alpha,
2862 struct blend_setting_s *setting)
2863{
2864 /* u32 type = 0; */
2865 u32 vskip, hskip;
2866
2867 if (!cur_frame_par || !setting || !vf)
2868 return -1;
2869
2870 setting->frame_par = cur_frame_par;
2871 setting->id = layer_id;
2872 setting->misc_reg_offt = 0;
2873
2874 setting->layer_alpha = layer_alpha;
2875 setting->preblend_h_start = 0;
2876 setting->preblend_h_end = 4096;
2877 if ((cur_frame_par->VPP_post_blend_vd_v_end_ -
2878 cur_frame_par->VPP_post_blend_vd_v_start_ + 1)
2879 > VPP_PREBLEND_VD_V_END_LIMIT) {
2880 setting->preblend_v_start =
2881 cur_frame_par->VPP_post_blend_vd_v_start_;
2882 setting->preblend_v_end =
2883 cur_frame_par->VPP_post_blend_vd_v_end_;
2884 } else {
2885 setting->preblend_v_start = 0;
2886 setting->preblend_v_end =
2887 VPP_PREBLEND_VD_V_END_LIMIT - 1;
2888 }
2889
2890 setting->preblend_h_size =
2891 cur_frame_par->VPP_line_in_length_;
2892
2893 /* old chip, vd2 has no scaler, so only can use mif setting */
2894 if ((setting->id != 0) &&
2895 (legacy_vpp || is_meson_tl1_cpu())) {
2896 vskip = cur_frame_par->vscale_skip_count;
2897 hskip = cur_frame_par->hscale_skip_count;
2898
2899 setting->postblend_h_start =
2900 cur_frame_par->VPP_hd_start_lines_;
2901 setting->postblend_h_end =
2902 cur_frame_par->VPP_hd_start_lines_ +
2903 (cur_frame_par->VPP_line_in_length_ >> hskip) - 1;
2904 setting->postblend_v_start =
2905 cur_frame_par->VPP_vd_start_lines_;
2906 setting->postblend_v_end =
2907 cur_frame_par->VPP_vd_start_lines_ +
2908 (cur_frame_par->VPP_pic_in_height_ >> vskip) - 1;
2909 setting->postblend_h_size =
2910 cur_frame_par->VPP_post_blend_h_size_;
2911 } else {
2912 setting->postblend_h_start =
2913 cur_frame_par->VPP_hsc_startp;
2914 setting->postblend_h_end =
2915 cur_frame_par->VPP_hsc_endp;
2916 setting->postblend_v_start =
2917 cur_frame_par->VPP_vsc_startp;
2918 setting->postblend_v_end =
2919 cur_frame_par->VPP_vsc_endp;
2920 setting->postblend_h_size =
2921 cur_frame_par->VPP_post_blend_h_size_;
2922 }
2923
2924 if (!legacy_vpp) {
2925 u32 temp_h = cur_frame_par->VPP_pic_in_height_;
2926
2927 temp_h <<= 16;
2928 setting->preblend_h_size |= temp_h;
2929
2930 temp_h =
2931 cur_frame_par->VPP_post_blend_vd_v_end_ + 1;
2932 temp_h <<= 16;
2933 setting->postblend_h_size |= temp_h;
2934 }
2935
2936#if 0
2937 /* TODO: need remove this work around check for afbc */
2938 type = vf->type;
2939 if (cur_frame_par->nocomp)
2940 type &= ~VIDTYPE_COMPRESS;
2941
2942 if (type & VIDTYPE_COMPRESS) {
2943 u32 v_phase;
2944 struct vppfilter_mode_s *vpp_filter =
2945 &cur_frame_par->vpp_filter;
2946 v_phase = vpp_filter->vpp_vsc_start_phase_step;
2947 v_phase *= (cur_frame_par->vscale_skip_count + 1);
2948 if ((v_phase > 0x1000000) &&
2949 (layer->disp_info.layer_top < 0)) {
2950 if ((cur_frame_par->VPP_vsc_endp > 0x6) &&
2951 ((cur_frame_par->VPP_vsc_endp < 0x250)
2952 || (cur_frame_par->VPP_vsc_endp <
2953 cur_frame_par->VPP_post_blend_vd_v_end_/2))) {
2954 setting->postblend_v_end -= 6;
2955 }
2956 }
2957 }
2958#endif
2959 return 0;
2960}
2961
2962static inline void vd2_vpp_blend_setting(
2963 struct blend_setting_s *setting)
2964{
2965 u32 misc_off;
2966 u32 vd_size_mask = VPP_VD_SIZE_MASK;
2967
2968 if (!setting)
2969 return;
2970
2971 /* g12a change to 13 bits */
2972 if (!legacy_vpp)
2973 vd_size_mask = 0x1fff;
2974
2975 misc_off = 0;
2976
2977 /* vd2 preblend size should be same postblend size */
2978 /* preblend setting */
2979 VSYNC_WR_MPEG_REG(
2980 VPP_BLEND_VD2_H_START_END + misc_off,
2981 ((setting->postblend_h_start & vd_size_mask)
2982 << VPP_VD1_START_BIT) |
2983 ((setting->postblend_h_end & vd_size_mask)
2984 << VPP_VD1_END_BIT));
2985
2986 VSYNC_WR_MPEG_REG(
2987 VPP_BLEND_VD2_V_START_END + misc_off,
2988 ((setting->postblend_v_start & vd_size_mask)
2989 << VPP_VD1_START_BIT) |
2990 ((setting->postblend_v_end & vd_size_mask)
2991 << VPP_VD1_END_BIT));
2992}
2993
2994static inline void proc_vd2_vsc_phase_per_vsync(
2995 struct vpp_frame_par_s *frame_par,
2996 struct vframe_s *vf,
2997 u32 vout_type)
2998{
2999 struct f2v_vphase_s *vphase;
3000 u32 misc_off, vin_type;
3001 struct vppfilter_mode_s *vpp_filter;
3002
3003 if (legacy_vpp || is_meson_tl1_cpu()
3004 || !frame_par || !vf)
3005 return;
3006
3007 vpp_filter = &frame_par->vpp_filter;
3008 misc_off = 0;
3009 vin_type = vf->type & VIDTYPE_TYPEMASK;
3010 /* vertical phase */
3011 vphase = &frame_par->VPP_vf_ini_phase_
3012 [vpp_phase_table[vin_type]
3013 [vout_type]];
3014 VSYNC_WR_MPEG_REG(
3015 VD2_VSC_INI_PHASE + misc_off,
3016 ((u32) (vphase->phase) << 8));
3017
3018 if (vphase->repeat_skip >= 0) {
3019 /* skip lines */
3020 VSYNC_WR_MPEG_REG_BITS(
3021 VD2_VSC_PHASE_CTRL + misc_off,
3022 skip_tab[vphase->repeat_skip],
3023 VPP_PHASECTL_INIRCVNUMT_BIT,
3024 VPP_PHASECTL_INIRCVNUM_WID +
3025 VPP_PHASECTL_INIRPTNUM_WID);
3026 } else {
3027 /* repeat first line */
3028 VSYNC_WR_MPEG_REG_BITS(
3029 VD2_VSC_PHASE_CTRL + misc_off,
3030 4,
3031 VPP_PHASECTL_INIRCVNUMT_BIT,
3032 VPP_PHASECTL_INIRCVNUM_WID);
3033 VSYNC_WR_MPEG_REG_BITS(
3034 VD2_VSC_PHASE_CTRL + misc_off,
3035 1 - vphase->repeat_skip,
3036 VPP_PHASECTL_INIRPTNUMT_BIT,
3037 VPP_PHASECTL_INIRPTNUM_WID);
3038 }
3039
3040 VSYNC_WR_MPEG_REG_BITS(
3041 VD2_VSC_PHASE_CTRL + misc_off,
3042 (vpp_filter->vpp_vert_coeff[0] == 2) ? 1 : 0,
3043 VPP_PHASECTL_DOUBLELINE_BIT,
3044 VPP_PHASECTL_DOUBLELINE_WID);
3045}
3046
3047static void pip_toggle_frame(struct vframe_s *vf)
3048{
3049 u32 first_picture = 0;
3050
3051 if (vf == NULL)
3052 return;
3053
3054 ori2_start_x_lines = 0;
3055 ori2_end_x_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3056 vf->compWidth : vf->width) - 1;
3057 ori2_start_y_lines = 0;
3058 ori2_end_y_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3059 vf->compHeight : vf->height) - 1;
3060
3061 if (debug_flag & DEBUG_FLAG_PRINT_TOGGLE_FRAME)
3062 pr_info("%s()\n", __func__);
3063
3064 if ((vf->width == 0) && (vf->height == 0)) {
3065 amlog_level(LOG_LEVEL_ERROR,
3066 "Video: invalid frame dimension\n");
3067 return;
3068 }
3069 if (cur_pipbuf
3070 && (cur_pipbuf != &local_pip)
3071 && (cur_pipbuf != vf)) {
3072 pip_frame_count++;
3073 if (pip_frame_count == 1)
3074 first_picture = 1;
3075#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3076 if (is_vsync_rdma_enable()) {
3077 if (pip_rdma_buf == cur_pipbuf)
3078 pipbuf_to_put = cur_pipbuf;
3079 else
3080 pip_vf_put(cur_pipbuf);
3081 } else {
3082 if (pipbuf_to_put) {
3083 pip_vf_put(
3084 pipbuf_to_put);
3085 pipbuf_to_put = NULL;
3086 }
3087 pip_vf_put(cur_pipbuf);
3088 }
3089#else
3090 pip_vf_put(cur_pipbuf);
3091#endif
3092 } else if (!cur_pipbuf
3093 || (cur_pipbuf == &local_pip))
3094 first_picture = 1;
3095
3096 /* switch buffer */
3097 if (vf->type & VIDTYPE_COMPRESS) {
3098 VSYNC_WR_MPEG_REG(VD2_AFBC_HEAD_BADDR,
3099 vf->compHeadAddr>>4);
3100 VSYNC_WR_MPEG_REG(VD2_AFBC_BODY_BADDR,
3101 vf->compBodyAddr>>4);
3102 }
3103 if (vf->canvas0Addr != 0) {
3104#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3105 if (vf->canvas0Addr != (u32)-1) {
3106 canvas_copy(vf->canvas0Addr & 0xff,
3107 disp_canvas_index[pip_rdma_canvas_id][3]);
3108 canvas_copy((vf->canvas0Addr >> 8) & 0xff,
3109 disp_canvas_index[pip_rdma_canvas_id][4]);
3110 canvas_copy((vf->canvas0Addr >> 16) & 0xff,
3111 disp_canvas_index[pip_rdma_canvas_id][5]);
3112 } else {
3113 vframe_canvas_set(&vf->canvas0_config[0],
3114 vf->plane_num,
3115 &disp_canvas_index[pip_rdma_canvas_id][3]);
3116 }
3117
3118 VSYNC_WR_MPEG_REG(
3119 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3120 disp_canvas[pip_rdma_canvas_id][1]);
3121
3122 pip_next_rdma_canvas_id = pip_rdma_canvas_id ? 0 : 1;
3123#endif
3124 }
3125
3126 if (pip_property_changed) {
3127 first_picture = 1;
3128 pip_property_changed = 0;
3129 }
3130 if (cur_pipbuf != vf)
3131 vf->type_backup = vf->type;
3132
3133 /* enable new config on the new frames */
3134 if ((first_picture) || (cur_pipbuf &&
3135 ((cur_pipbuf->bufWidth != vf->bufWidth) ||
3136 (cur_pipbuf->width != vf->width) ||
3137 (cur_pipbuf->height != vf->height) ||
3138 (cur_pipbuf->bitdepth != vf->bitdepth) ||
3139 (cur_pipbuf->trans_fmt != vf->trans_fmt) ||
3140 (cur_pipbuf->ratio_control != vf->ratio_control) ||
3141 ((cur_pipbuf->type_backup & VIDTYPE_INTERLACE) !=
3142 (vf->type_backup & VIDTYPE_INTERLACE)) ||
3143 (cur_pipbuf->type != vf->type)))) {
3144 int iret;
3145
3146 /* apply new vpp settings */
3147 nextpip_frame_par =
3148 (&pip_frame_parms[0] == nextpip_frame_par) ?
3149 &pip_frame_parms[1] : &pip_frame_parms[0];
3150
3151 update_layer_info(1);
3152 if (legacy_vpp || is_meson_tl1_cpu())
3153 iret = vpp_set_filters_no_scaler(
3154 &glayer_info[1], vf,
3155 nextpip_frame_par, vinfo);
3156 else
3157 iret = vpp_set_filters(
3158 &glayer_info[1], vf,
3159 nextpip_frame_par, vinfo,
3160 true);
3161
3162 if (iret == VppFilter_Success_and_Changed)
3163 pip_property_changed = 1;
3164
3165 pip_frame_ready_to_set = 1;
3166 }
3167
3168 if (((vf->type & VIDTYPE_NO_VIDEO_ENABLE) == 0) &&
3169 (!pip_property_changed || (vf != cur_pipbuf))) {
3170 if (disable_videopip == VIDEO_DISABLE_FORNEXT) {
3171 EnableVideoLayer2();
3172 disable_videopip = VIDEO_DISABLE_NONE;
3173 }
3174 if (first_picture &&
3175 (disable_videopip !=
3176 VIDEO_DISABLE_NORMAL)) {
3177 EnableVideoLayer2();
3178 }
3179 }
3180 cur_pipbuf = vf;
3181 if (first_picture)
3182 pip_frame_ready_to_set = 1;
3183}
3184
3185static void pip_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
3186{
3187 u32 r;
3188 u32 vphase, vini_phase;
3189 u32 pat, loop;
3190 static const u32 vpat[MAX_VSKIP_COUNT + 1] = {
3191 0, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
3192 u32 u, v;
3193 u32 type, bit_mode = 0;
3194
3195 if (!vf || !frame_par) {
3196 pr_err("pip_set_dcu vf is NULL\n");
3197 return;
3198 }
3199
3200 type = vf->type;
3201 pr_debug("pip_set_dcu %p, type:0x%x\n", vf, type);
3202
3203 if (frame_par->nocomp)
3204 type &= ~VIDTYPE_COMPRESS;
3205
3206 if (type & VIDTYPE_COMPRESS) {
3207 r = (3 << 24) |
3208 (vpp_hold_line << 16) |
3209 ((legacy_vpp ? 1 : 2) << 14) | /* burst1 */
3210 (vf->bitdepth & BITDEPTH_MASK);
3211
3212 if (frame_par->hscale_skip_count)
3213 r |= 0x33;
3214 if (frame_par->vscale_skip_count)
3215 r |= 0xcc;
3216
3217#ifdef TV_REVERSE
3218 if (reverse)
3219 r |= (1<<26) | (1<<27);
3220#endif
3221 if (vf->bitdepth & BITDEPTH_SAVING_MODE)
3222 r |= (1<<28); /* mem_saving_mode */
3223 if (type & VIDTYPE_SCATTER)
3224 r |= (1<<29);
3225 VSYNC_WR_MPEG_REG(VD2_AFBC_MODE, r);
3226
3227 r = 0x1700;
3228 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3229 if (vf && (vf->source_type
3230 != VFRAME_SOURCE_TYPE_HDMI))
3231 r |= (1 << 19); /* dos_uncomp */
3232 }
3233 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, r);
3234
3235 r = 0x100;
3236 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3237 if (type & VIDTYPE_VIU_444)
3238 r |= 0;
3239 else if (type & VIDTYPE_VIU_422)
3240 r |= (1 << 12);
3241 else
3242 r |= (2 << 12);
3243 }
3244 VSYNC_WR_MPEG_REG(VD2_AFBC_CONV_CTRL, r);
3245
3246 u = (vf->bitdepth >> (BITDEPTH_U_SHIFT)) & 0x3;
3247 v = (vf->bitdepth >> (BITDEPTH_V_SHIFT)) & 0x3;
3248 VSYNC_WR_MPEG_REG(VD2_AFBC_DEC_DEF_COLOR,
3249 0x3FF00000 | /*Y,bit20+*/
3250 0x80 << (u + 10) |
3251 0x80 << v);
3252 /* chroma formatter */
3253 r = HFORMATTER_EN |
3254 (0x8 << VFORMATTER_PHASE_BIT) |
3255 VFORMATTER_EN;
3256#if 0 /* def CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION */
3257 if (is_meson_txlx_package_962X()
3258 && !is_dolby_vision_stb_mode()
3259 && is_dolby_vision_on()) {
3260 r |= HFORMATTER_REPEAT |
3261 HFORMATTER_YC_RATIO_2_1 |
3262 HFORMATTER_EN |
3263 VFORMATTER_ALWAYS_RPT |
3264 (0 << VFORMATTER_INIPHASE_BIT) |
3265 (0x8 << VFORMATTER_PHASE_BIT) |
3266 VFORMATTER_EN;
3267 } else
3268#endif
3269 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3270 r = HFORMATTER_YC_RATIO_2_1 |
3271 HFORMATTER_EN |
3272 VFORMATTER_RPTLINE0_EN |
3273 (0x8 << VFORMATTER_PHASE_BIT) |
3274 VFORMATTER_EN;
3275
3276 if (is_dolby_vision_on())
3277 r |= HFORMATTER_REPEAT |
3278 (0xc << VFORMATTER_INIPHASE_BIT);
3279 else
3280 r |= HFORMATTER_RRT_PIXEL0 |
3281 (0 << VFORMATTER_INIPHASE_BIT);
3282
3283 if (type & VIDTYPE_VIU_444) {
3284 r &= ~HFORMATTER_EN;
3285 r &= ~VFORMATTER_EN;
3286 r &= ~HFORMATTER_YC_RATIO_2_1;
3287 } else if (type & VIDTYPE_VIU_422) {
3288 r &= ~VFORMATTER_EN;
3289 }
3290 } else {
3291 r = HFORMATTER_YC_RATIO_2_1 |
3292 HFORMATTER_EN |
3293 VFORMATTER_RPTLINE0_EN |
3294 (0x8 << VFORMATTER_PHASE_BIT) |
3295 VFORMATTER_EN;
3296 if (is_dolby_vision_on())
3297 r |= HFORMATTER_REPEAT |
3298 (0xc << VFORMATTER_INIPHASE_BIT);
3299 else
3300 r |= HFORMATTER_RRT_PIXEL0 |
3301 (0 << VFORMATTER_INIPHASE_BIT);
3302 }
3303 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_CTRL, r);
3304
3305 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3306 if (type & VIDTYPE_COMPRESS_LOSS)
3307 VSYNC_WR_MPEG_REG(
3308 VD2_AFBCDEC_IQUANT_ENABLE,
3309 ((1 << 11) |
3310 (1 << 10) |
3311 (1 << 4) |
3312 (1 << 0)));
3313 else
3314 VSYNC_WR_MPEG_REG(
3315 VD2_AFBCDEC_IQUANT_ENABLE, 0);
3316 }
3317
3318 vd2_path_select(true);
3319 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG +
3320 cur_dev->viu_off, 0);
3321 return;
3322 }
3323
3324 if ((vf->bitdepth & BITDEPTH_Y10) &&
3325 (!frame_par->nocomp)) {
3326 if (vf->type & VIDTYPE_VIU_444) {
3327 bit_mode = 2;
3328 } else {
3329 if (vf->bitdepth & FULL_PACK_422_MODE)
3330 bit_mode = 3;
3331 else
3332 bit_mode = 1;
3333 }
3334 } else {
3335 bit_mode = 0;
3336 }
3337 vd2_path_select(false);
3338 if (!legacy_vpp) {
3339 VSYNC_WR_MPEG_REG_BITS(
3340 G12_VD2_IF0_GEN_REG3,
3341 (bit_mode & 0x3), 8, 2);
3342 } else {
3343 VSYNC_WR_MPEG_REG_BITS(
3344 VD2_IF0_GEN_REG3 + cur_dev->viu_off,
3345 (bit_mode&0x3), 8, 2);
3346 }
3347 if (!(VSYNC_RD_MPEG_REG(VIU_MISC_CTRL1) & 0x1))
3348 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
3349 if (type & VIDTYPE_VIU_NV21)
3350 VSYNC_WR_MPEG_REG_BITS(
3351 VD2_IF0_GEN_REG2 +
3352 cur_dev->viu_off, 1, 0, 1);
3353 else
3354 VSYNC_WR_MPEG_REG_BITS(
3355 VD2_IF0_GEN_REG2 +
3356 cur_dev->viu_off, 0, 0, 1);
3357
3358 r = (3 << VDIF_URGENT_BIT) |
3359 (vpp_hold_line << VDIF_HOLD_LINES_BIT) |
3360 VDIF_FORMAT_SPLIT |
3361 VDIF_CHRO_RPT_LAST | VDIF_ENABLE;
3362 /* | VDIF_RESET_ON_GO_FIELD;*/
3363 if (debug_flag & DEBUG_FLAG_GOFIELD_MANUL)
3364 r |= 1<<7; /*for manul triggle gofiled.*/
3365
3366 if ((type & VIDTYPE_VIU_SINGLE_PLANE) == 0)
3367 r |= VDIF_SEPARATE_EN;
3368 else {
3369 if (type & VIDTYPE_VIU_422)
3370 r |= VDIF_FORMAT_422;
3371 else {
3372 r |= VDIF_FORMAT_RGB888_YUV444 |
3373 VDIF_DEMUX_MODE_RGB_444;
3374 }
3375 }
3376
3377 if (frame_par->hscale_skip_count)
3378 r |= VDIF_CHROMA_HZ_AVG | VDIF_LUMA_HZ_AVG;
3379
3380 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG + cur_dev->viu_off, r);
3381
3382#ifdef TV_REVERSE
3383 if (reverse) {
3384 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
3385 cur_dev->viu_off), 0xf, 2, 4);
3386 } else {
3387 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
3388 cur_dev->viu_off), 0, 2, 4);
3389 }
3390#endif
3391
3392 /* chroma formatter */
3393 if (type & VIDTYPE_VIU_444) {
3394 VSYNC_WR_MPEG_REG(
3395 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3396 HFORMATTER_YC_RATIO_1_1);
3397 } else if (type & VIDTYPE_VIU_FIELD) {
3398 vini_phase = 0xc << VFORMATTER_INIPHASE_BIT;
3399 vphase = ((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
3400 << VFORMATTER_PHASE_BIT;
3401 if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
3402 is_meson_txlx_cpu()) {
3403 if ((vf->width >= 3840) &&
3404 (vf->height >= 2160) &&
3405 (type & VIDTYPE_VIU_422)) {
3406 VSYNC_WR_MPEG_REG(
3407 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3408 HFORMATTER_RRT_PIXEL0 |
3409 HFORMATTER_YC_RATIO_2_1 |
3410 HFORMATTER_EN |
3411 VFORMATTER_RPTLINE0_EN |
3412 vini_phase | vphase);
3413 } else {
3414 VSYNC_WR_MPEG_REG(
3415 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3416 HFORMATTER_REPEAT |
3417 HFORMATTER_YC_RATIO_2_1 |
3418 HFORMATTER_EN |
3419 VFORMATTER_RPTLINE0_EN |
3420 vini_phase | vphase |
3421 VFORMATTER_EN);
3422 }
3423 } else {
3424 VSYNC_WR_MPEG_REG(
3425 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3426 HFORMATTER_REPEAT |
3427 HFORMATTER_YC_RATIO_2_1 |
3428 HFORMATTER_EN |
3429 VFORMATTER_RPTLINE0_EN |
3430 vini_phase | vphase |
3431 VFORMATTER_EN);
3432 }
3433 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
3434 VSYNC_WR_MPEG_REG(
3435 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3436 HFORMATTER_YC_RATIO_2_1 |
3437 HFORMATTER_EN |
3438 VFORMATTER_RPTLINE0_EN |
3439 (0xe << VFORMATTER_INIPHASE_BIT) |
3440 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
3441 << VFORMATTER_PHASE_BIT) |
3442 VFORMATTER_EN);
3443 } else {
3444 VSYNC_WR_MPEG_REG(
3445 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3446 HFORMATTER_REPEAT |
3447 HFORMATTER_YC_RATIO_2_1 |
3448 HFORMATTER_EN |
3449 VFORMATTER_RPTLINE0_EN |
3450 (0xc << VFORMATTER_INIPHASE_BIT) |
3451 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
3452 << VFORMATTER_PHASE_BIT) |
3453 VFORMATTER_EN);
3454 }
3455
3456 if (is_meson_txlx_cpu()
3457 || is_meson_g12a_cpu()
3458 || is_meson_g12b_cpu())
3459 VSYNC_WR_MPEG_REG_BITS(
3460 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3461 1, 29, 1);
3462
3463 /* LOOP/SKIP pattern */
3464 pat = vpat[frame_par->vscale_skip_count];
3465
3466 if (type & VIDTYPE_VIU_FIELD) {
3467 loop = 0;
3468
3469 if (type & VIDTYPE_INTERLACE)
3470 pat = vpat[frame_par->vscale_skip_count >> 1];
3471 } else if (type & VIDTYPE_MVC) {
3472 loop = 0x11;
3473 pat = 0x80;
3474 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
3475 loop = 0x11;
3476 pat <<= 4;
3477 } else
3478 loop = 0;
3479
3480 VSYNC_WR_MPEG_REG(
3481 VD2_IF0_RPT_LOOP + cur_dev->viu_off,
3482 (loop << VDIF_CHROMA_LOOP1_BIT) |
3483 (loop << VDIF_LUMA_LOOP1_BIT) |
3484 (loop << VDIF_CHROMA_LOOP0_BIT) |
3485 (loop << VDIF_LUMA_LOOP0_BIT));
3486
3487 VSYNC_WR_MPEG_REG(
3488 VD2_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
3489 VSYNC_WR_MPEG_REG(
3490 VD2_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
3491 VSYNC_WR_MPEG_REG(
3492 VD2_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
3493 VSYNC_WR_MPEG_REG(
3494 VD2_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
3495
3496 VSYNC_WR_MPEG_REG(
3497 VD2_IF0_LUMA_PSEL + cur_dev->viu_off, 0);
3498 VSYNC_WR_MPEG_REG(
3499 VD2_IF0_CHROMA_PSEL + cur_dev->viu_off, 0);
3500}
3501#endif
3502
3503/* for sdr/hdr/single dv switch with dual dv */
3504static u32 last_el_status;
3505/* for dual dv switch with different el size */
3506static u32 last_el_w;
3507bool has_enhanced_layer(struct vframe_s *vf)
3508{
3509 struct provider_aux_req_s req;
3510
3511 if (!vf)
3512 return 0;
3513 if (vf->source_type != VFRAME_SOURCE_TYPE_OTHERS)
3514 return 0;
3515 if (!is_dolby_vision_on())
3516 return 0;
3517
3518 req.vf = vf;
3519 req.bot_flag = 0;
3520 req.aux_buf = NULL;
3521 req.aux_size = 0;
3522 req.dv_enhance_exist = 0;
3523 vf_notify_provider_by_name("dvbldec",
3524 VFRAME_EVENT_RECEIVER_GET_AUX_DATA,
3525 (void *)&req);
3526 return req.dv_enhance_exist;
3527}
3528u32 property_changed_true;
3529
3530static u64 func_div(u64 number, u32 divid)
3531{
3532 u64 tmp = number;
3533
3534 do_div(tmp, divid);
3535 return tmp;
3536}
3537
3538static void vsync_toggle_frame(struct vframe_s *vf)
3539{
3540 u32 first_picture = 0;
3541 unsigned long flags = 0;
3542 bool vf_with_el = false;
3543 bool force_toggle = false;
3544 long long *clk_array;
3545 bool is_mvc = false;
3546
3547 if (vf == NULL)
3548 return;
3549 frame_count++;
3550 toggle_count++;
3551
3552 if (vf->type & VIDTYPE_MVC)
3553 is_mvc = true;
3554
3555 if (is_dolby_vision_enable())
3556 vf_with_el = has_enhanced_layer(vf);
3557
3558#ifdef PTS_TRACE_DEBUG
3559#ifdef PTS_TRACE_START
3560 if (pts_trace_his_rd < 16) {
3561#endif
3562 pts_trace_his[pts_trace_his_rd] = pts_trace;
3563 pts_his[pts_trace_his_rd] = vf->pts;
3564 scr_his[pts_trace_his_rd] = timestamp_pcrscr_get();
3565 pts_trace_his_rd++;
3566 if (pts_trace_his_rd >= 16)
3567 pts_trace_his_rd = 0;
3568#ifdef PTS_TRACE_START
3569 }
3570#endif
3571#endif
3572
3573#ifdef PTS_LOGGING
3574 if (pts_escape_vsync == 1) {
3575 pts_trace++;
3576 pts_escape_vsync = 0;
3577 }
3578 vsync_video_pattern();
3579 pre_pts_trace = pts_trace;
3580#endif
3581
3582#if defined(PTS_LOGGING) || defined(PTS_TRACE_DEBUG)
3583 pts_trace = 0;
3584#endif
3585
3586 ori_start_x_lines = 0;
3587 ori_end_x_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3588 vf->compWidth : vf->width) - 1;
3589 ori_start_y_lines = 0;
3590 ori_end_y_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3591 vf->compHeight : vf->height) - 1;
3592 if (debug_flag & DEBUG_FLAG_PRINT_TOGGLE_FRAME) {
3593 u32 pcr = timestamp_pcrscr_get();
3594 u32 vpts = timestamp_vpts_get();
3595 u32 apts = timestamp_apts_get();
3596
3597 pr_info("%s pts:%d.%06d pcr:%d.%06d vpts:%d.%06d apts:%d.%06d\n",
3598 __func__, (vf->pts) / 90000,
3599 ((vf->pts) % 90000) * 1000 / 90, (pcr) / 90000,
3600 ((pcr) % 90000) * 1000 / 90, (vpts) / 90000,
3601 ((vpts) % 90000) * 1000 / 90, (apts) / 90000,
3602 ((apts) % 90000) * 1000 / 90);
3603 }
3604
3605 if (trickmode_i || trickmode_fffb)
3606 trickmode_duration_count = trickmode_duration;
3607
3608 if (vf->early_process_fun) {
3609 if (vf->early_process_fun(vf->private_data, vf) == 1) {
3610 /* video_property_changed = true; */
3611 first_picture = 1;
3612 }
3613 } else {
3614#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
3615 if ((DI_POST_REG_RD(DI_IF1_GEN_REG) & 0x1) != 0) {
3616 /* check mif enable status, disable post di */
3617 VSYNC_WR_MPEG_REG(DI_POST_CTRL, 0x3 << 30);
3618 VSYNC_WR_MPEG_REG(DI_POST_SIZE,
3619 (32 - 1) | ((128 - 1) << 16));
3620 VSYNC_WR_MPEG_REG(DI_IF1_GEN_REG,
3621 READ_VCBUS_REG(DI_IF1_GEN_REG) &
3622 0xfffffffe);
3623 }
3624#endif
3625 }
3626
3627 timer_count = 0;
3628 if ((vf->width == 0) && (vf->height == 0)) {
3629 amlog_level(LOG_LEVEL_ERROR,
3630 "Video: invalid frame dimension\n");
3631 return;
3632 }
3633
3634 if (hold_video) {
3635 if (cur_dispbuf != vf) {
3636 new_frame_count++;
3637 if (vf->pts != 0) {
3638 amlog_mask(LOG_MASK_TIMESTAMP,
3639 "vpts to: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3640 vf->pts, timestamp_pcrscr_get(),
3641 READ_MPEG_REG(SCR_HIU));
3642
3643 timestamp_vpts_set(vf->pts);
3644 last_frame_duration = vf->duration;
3645 } else if (last_frame_duration) {
3646 amlog_mask(LOG_MASK_TIMESTAMP,
3647 "vpts inc: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3648 timestamp_vpts_get() +
3649 DUR2PTS(cur_dispbuf->duration),
3650 timestamp_pcrscr_get(),
3651 READ_MPEG_REG(SCR_HIU));
3652
3653 timestamp_vpts_inc(DUR2PTS
3654 (last_frame_duration));
3655
3656 vpts_remainder +=
3657 DUR2PTS_RM(last_frame_duration);
3658 if (vpts_remainder >= 0xf) {
3659 vpts_remainder -= 0xf;
3660 timestamp_vpts_inc(-1);
3661 }
3662 }
3663 video_vf_put(vf);
3664 return;
3665 }
3666 }
3667
3668 if ((cur_dispbuf) && (cur_dispbuf != &vf_local) && (cur_dispbuf != vf)
3669 && (video_property_changed != 2)) {
3670 new_frame_count++;
3671 if (new_frame_count == 1)
3672 first_picture = 1;
3673#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3674 if (is_vsync_rdma_enable()) {
3675#ifdef RDMA_RECYCLE_ORDERED_VFRAMES
3676 if (dispbuf_to_put_num < DISPBUF_TO_PUT_MAX) {
3677 dispbuf_to_put[dispbuf_to_put_num] =
3678 cur_dispbuf;
3679 dispbuf_to_put_num++;
3680 } else
3681 video_vf_put(cur_dispbuf);
3682#else
3683 if (cur_rdma_buf == cur_dispbuf) {
3684 dispbuf_to_put[0] = cur_dispbuf;
3685 dispbuf_to_put_num = 1;
3686 } else
3687 video_vf_put(cur_dispbuf);
3688#endif
3689 } else {
3690 int i;
3691
3692 for (i = 0; i < dispbuf_to_put_num; i++) {
3693 if (dispbuf_to_put[i]) {
3694 video_vf_put(
3695 dispbuf_to_put[i]);
3696 dispbuf_to_put[i] = NULL;
3697 }
3698 dispbuf_to_put_num = 0;
3699 }
3700 video_vf_put(cur_dispbuf);
3701 }
3702#else
3703 video_vf_put(cur_dispbuf);
3704#endif
3705 if (debug_flag & DEBUG_FLAG_LATENCY) {
3706 vf->ready_clock[3] = sched_clock();
3707 pr_info(
3708 "video toggle latency %lld ms, video get latency %lld ms, vdin put latency %lld ms, first %lld ms.\n",
3709 func_div(vf->ready_clock[3], 1000),
3710 func_div(vf->ready_clock[2], 1000),
3711 func_div(vf->ready_clock[1], 1000),
3712 func_div(vf->ready_clock[0], 1000));
3713 cur_dispbuf->ready_clock[4] = sched_clock();
3714 clk_array = cur_dispbuf->ready_clock;
3715 pr_info("video put latency %lld ms, video toggle latency %lld ms, video get latency %lld ms, vdin put latency %lld ms, first %lld ms.\n",
3716 func_div(*(clk_array + 4), 1000),
3717 func_div(*(clk_array + 3), 1000),
3718 func_div(*(clk_array + 2), 1000),
3719 func_div(*(clk_array + 1), 1000),
3720 func_div(*clk_array, 1000));
3721 }
3722 } else
3723 first_picture = 1;
3724
3725 if (video_property_changed) {
3726 property_changed_true = 2;
3727 video_property_changed = 0;
3728 first_picture = 1;
3729 }
3730 if (property_changed_true > 0) {
3731 property_changed_true--;
3732 first_picture = 1;
3733 }
3734
3735 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
3736 && first_picture)
3737 pr_info("first picture {%d,%d} pts:%x,\n",
3738 vf->width, vf->height, vf->pts);
3739
3740 /* switch buffer */
3741 post_canvas = vf->canvas0Addr;
3742 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) &&
3743 (vf->type & VIDTYPE_COMPRESS)) {
3744 VSYNC_WR_MPEG_REG(AFBC_HEAD_BADDR, vf->compHeadAddr>>4);
3745 VSYNC_WR_MPEG_REG(AFBC_BODY_BADDR, vf->compBodyAddr>>4);
3746 }
3747 if ((vf->canvas0Addr != 0)
3748#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
3749 && ((DI_POST_REG_RD(DI_POST_CTRL) & 0x1000) == 0)
3750 /* check di_post_viu_link */
3751#endif
3752 ) {
3753
3754#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3755 if (vf->canvas0Addr != (u32)-1) {
3756 canvas_copy(vf->canvas0Addr & 0xff,
3757 disp_canvas_index[rdma_canvas_id][0]);
3758 canvas_copy((vf->canvas0Addr >> 8) & 0xff,
3759 disp_canvas_index[rdma_canvas_id][1]);
3760 canvas_copy((vf->canvas0Addr >> 16) & 0xff,
3761 disp_canvas_index[rdma_canvas_id][2]);
3762 } else {
3763 vframe_canvas_set(&vf->canvas0_config[0],
3764 vf->plane_num,
3765 &disp_canvas_index[rdma_canvas_id][0]);
3766 }
3767 if (is_mvc || process_3d_type) {
3768 if (vf->canvas1Addr != (u32)-1) {
3769 canvas_copy(vf->canvas1Addr & 0xff,
3770 disp_canvas_index[rdma_canvas_id][3]);
3771 canvas_copy((vf->canvas1Addr >> 8) & 0xff,
3772 disp_canvas_index[rdma_canvas_id][4]);
3773 canvas_copy((vf->canvas1Addr >> 16) & 0xff,
3774 disp_canvas_index[rdma_canvas_id][5]);
3775 } else {
3776 vframe_canvas_set(&vf->canvas1_config[0],
3777 vf->plane_num,
3778 &disp_canvas_index[rdma_canvas_id][3]);
3779 }
3780 }
3781
3782 VSYNC_WR_MPEG_REG(
3783 VD1_IF0_CANVAS0 + cur_dev->viu_off,
3784 disp_canvas[rdma_canvas_id][0]);
3785 if (is_mvc)
3786 VSYNC_WR_MPEG_REG(
3787 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3788 disp_canvas[rdma_canvas_id][1]);
3789 if (cur_frame_par &&
3790 (cur_frame_par->vpp_2pic_mode == 1)) {
3791 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3792 cur_dev->viu_off,
3793 disp_canvas[rdma_canvas_id][0]);
3794 if (is_mvc)
3795 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3796 cur_dev->viu_off,
3797 disp_canvas[rdma_canvas_id][0]);
3798 } else {
3799 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3800 cur_dev->viu_off,
3801 disp_canvas[rdma_canvas_id][1]);
3802 if (is_mvc)
3803 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3804 cur_dev->viu_off,
3805 disp_canvas[rdma_canvas_id][0]);
3806 }
3807 if (cur_frame_par
3808 && (process_3d_type & MODE_3D_ENABLE)
3809 && (process_3d_type & MODE_3D_TO_2D_R)
3810 && (cur_frame_par->vpp_2pic_mode
3811 == VPP_SELECT_PIC1)) {
3812 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS0 + cur_dev->viu_off,
3813 disp_canvas[rdma_canvas_id][1]);
3814 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 + cur_dev->viu_off,
3815 disp_canvas[rdma_canvas_id][1]);
3816 if (is_mvc) {
3817 VSYNC_WR_MPEG_REG(
3818 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3819 disp_canvas[rdma_canvas_id][1]);
3820 VSYNC_WR_MPEG_REG(
3821 VD2_IF0_CANVAS1 + cur_dev->viu_off,
3822 disp_canvas[rdma_canvas_id][1]);
3823 }
3824 }
3825 next_rdma_canvas_id = rdma_canvas_id ? 0 : 1;
3826#else
3827 canvas_copy(vf->canvas0Addr & 0xff, disp_canvas_index[0]);
3828 canvas_copy((vf->canvas0Addr >> 8) & 0xff,
3829 disp_canvas_index[1]);
3830 canvas_copy((vf->canvas0Addr >> 16) & 0xff,
3831 disp_canvas_index[2]);
3832 if (is_mvc || process_3d_type) {
3833 canvas_copy(vf->canvas1Addr & 0xff,
3834 disp_canvas_index[3]);
3835 canvas_copy((vf->canvas1Addr >> 8) & 0xff,
3836 disp_canvas_index[4]);
3837 canvas_copy((vf->canvas1Addr >> 16) & 0xff,
3838 disp_canvas_index[5]);
3839 }
3840 VSYNC_WR_MPEG_REG(
3841 VD1_IF0_CANVAS0 + cur_dev->viu_off,
3842 disp_canvas[0]);
3843 if (is_mvc)
3844 VSYNC_WR_MPEG_REG(
3845 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3846 disp_canvas[0]);
3847 if (cur_frame_par &&
3848 (cur_frame_par->vpp_2pic_mode == 1)) {
3849 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3850 cur_dev->viu_off,
3851 disp_canvas[0]);
3852 if (is_mvc)
3853 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3854 cur_dev->viu_off,
3855 disp_canvas[0]);
3856 } else {
3857 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3858 cur_dev->viu_off,
3859 disp_canvas[1]);
3860 if (is_mvc)
3861 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3862 cur_dev->viu_off,
3863 disp_canvas[1]);
3864 }
3865#endif
3866 }
3867 /* set video PTS */
3868 if (cur_dispbuf != vf) {
3869 if (vf->pts != 0) {
3870 amlog_mask(LOG_MASK_TIMESTAMP,
3871 "vpts to: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3872 vf->pts, timestamp_pcrscr_get(),
3873 READ_MPEG_REG(SCR_HIU));
3874 timestamp_vpts_set(vf->pts);
3875 } else if (cur_dispbuf) {
3876 amlog_mask(LOG_MASK_TIMESTAMP,
3877 "vpts inc: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3878 timestamp_vpts_get() +
3879 DUR2PTS(cur_dispbuf->duration),
3880 timestamp_pcrscr_get(),
3881 READ_MPEG_REG(SCR_HIU));
3882
3883 timestamp_vpts_inc(DUR2PTS
3884 (cur_dispbuf->duration));
3885
3886 vpts_remainder +=
3887 DUR2PTS_RM(cur_dispbuf->duration);
3888 if (vpts_remainder >= 0xf) {
3889 vpts_remainder -= 0xf;
3890 timestamp_vpts_inc(-1);
3891 }
3892 }
3893 vf->type_backup = vf->type;
3894 }
3895
3896 if (cur_dispbuf && vf &&
3897 (cur_dispbuf->ratio_control &
3898 DISP_RATIO_ADAPTED_PICMODE) &&
3899 (cur_dispbuf->ratio_control ==
3900 vf->ratio_control) &&
3901 memcmp(&cur_dispbuf->pic_mode, &vf->pic_mode,
3902 sizeof(struct vframe_pic_mode_s)))
3903 force_toggle = true;
3904
3905 if ((last_process_3d_type != process_3d_type)
3906 || (last_el_status != vf_with_el))
3907 force_toggle = true;
3908
3909 /* enable new config on the new frames */
3910 if (first_picture || force_toggle ||
3911 (cur_dispbuf &&
3912 ((cur_dispbuf->bufWidth != vf->bufWidth) ||
3913 (cur_dispbuf->width != vf->width) ||
3914 (cur_dispbuf->height != vf->height) ||
3915 (cur_dispbuf->bitdepth != vf->bitdepth) ||
3916 (cur_dispbuf->trans_fmt != vf->trans_fmt) ||
3917 (cur_dispbuf->ratio_control != vf->ratio_control) ||
3918 ((cur_dispbuf->type_backup & VIDTYPE_INTERLACE) !=
3919 (vf->type_backup & VIDTYPE_INTERLACE)) ||
3920 (cur_dispbuf->type != vf->type)))) {
3921 int iret;
3922
3923 last_process_3d_type = process_3d_type;
3924 atomic_inc(&video_sizechange);
3925 wake_up_interruptible(&amvideo_sizechange_wait);
3926 amlog_mask(LOG_MASK_FRAMEINFO,
3927 "%s %dx%d ar=0x%x\n",
3928 ((vf->type & VIDTYPE_TYPEMASK) ==
3929 VIDTYPE_INTERLACE_TOP) ? "interlace-top"
3930 : ((vf->type & VIDTYPE_TYPEMASK)
3931 == VIDTYPE_INTERLACE_BOTTOM)
3932 ? "interlace-bottom" : "progressive", vf->width,
3933 vf->height, vf->ratio_control);
3934#ifdef TV_3D_FUNCTION_OPEN
3935 amlog_mask(LOG_MASK_FRAMEINFO,
3936 "%s trans_fmt=%u\n", __func__, vf->trans_fmt);
3937
3938#endif
3939 next_frame_par = (&frame_parms[0] == next_frame_par) ?
3940 &frame_parms[1] : &frame_parms[0];
3941
3942 update_layer_info(0);
3943 iret = vpp_set_filters(
3944 &glayer_info[0], vf,
3945 next_frame_par, vinfo,
3946 (is_dolby_vision_on() &&
3947 is_dolby_vision_stb_mode()));
3948
3949 if (iret == VppFilter_Success_and_Changed)
3950 video_property_changed = 1;
3951
3952 /* apply new vpp settings */
3953 frame_par_ready_to_set = 1;
3954
3955 if (((vf->width > 1920) && (vf->height > 1088)) ||
3956 ((vf->type & VIDTYPE_COMPRESS) &&
3957 (vf->compWidth > 1920) &&
3958 (vf->compHeight > 1080))) {
3959 if (vpu_clk_level == 0) {
3960 vpu_clk_level = 1;
3961 spin_lock_irqsave(&lock, flags);
3962 vpu_delay_work_flag |=
3963 VPU_DELAYWORK_VPU_CLK;
3964 spin_unlock_irqrestore(&lock, flags);
3965 }
3966 } else {
3967 if (vpu_clk_level == 1) {
3968 vpu_clk_level = 0;
3969 spin_lock_irqsave(&lock, flags);
3970 vpu_delay_work_flag |=
3971 VPU_DELAYWORK_VPU_CLK;
3972 spin_unlock_irqrestore(&lock, flags);
3973 }
3974 }
3975 }
3976
3977 /* if el is unnecessary, afbc2 need to be closed */
3978 if ((last_el_status == 1) && (vf_with_el == 0))
3979 need_disable_vd2 = true;
3980
3981 if (((vf->type & VIDTYPE_MVC) == 0)
3982 && last_mvc_status)
3983 need_disable_vd2 = true;
3984
3985 last_el_status = vf_with_el;
3986
3987 if (((vf->type & VIDTYPE_NO_VIDEO_ENABLE) == 0) &&
3988 ((!property_changed_true) || (vf != cur_dispbuf))) {
3989 if (disable_video == VIDEO_DISABLE_FORNEXT) {
3990 EnableVideoLayer();
3991 disable_video = VIDEO_DISABLE_NONE;
3992 }
3993 if (first_picture && (disable_video != VIDEO_DISABLE_NORMAL)) {
3994 EnableVideoLayer();
3995 if ((vf->type & VIDTYPE_MVC) ||
3996 (cur_dispbuf2 && (cur_dispbuf2->type & VIDTYPE_VD2)))
3997 EnableVideoLayer2();
3998 else if (cur_dispbuf2 &&
3999 !(cur_dispbuf2->type & VIDTYPE_COMPRESS))
4000 VD2_MEM_POWER_ON();
4001 else if (vf_with_el)
4002 EnableVideoLayer2();
4003 else if (need_disable_vd2)
4004 DisableVideoLayer2();
4005 }
4006 }
4007 if (cur_dispbuf && (cur_dispbuf->type != vf->type)) {
4008 if ((vf->type & VIDTYPE_MVC) ||
4009 (cur_dispbuf2 && (cur_dispbuf2->type & VIDTYPE_VD2)))
4010 EnableVideoLayer2();
4011 else {
4012 if (cur_dispbuf2 &&
4013 !(cur_dispbuf2->type & VIDTYPE_COMPRESS))
4014 VD2_MEM_POWER_ON();
4015 else if (vf_with_el)
4016 EnableVideoLayer2();
4017 else if (need_disable_vd2)
4018 DisableVideoLayer2();
4019 }
4020 }
4021 cur_dispbuf = vf;
4022 if (cur_dispbuf && (cur_dispbuf->type & VIDTYPE_MVC))
4023 last_mvc_status = true;
4024 else
4025 last_mvc_status = false;
4026
4027 if (first_picture) {
4028 frame_par_ready_to_set = 1;
4029 first_frame_toggled = 1;
4030
4031#ifdef VIDEO_PTS_CHASE
4032 av_sync_flag = 0;
4033#endif
4034 }
4035 if (cur_dispbuf != &vf_local)
4036 video_keeper_new_frame_notify();
4037
4038 if ((vf != &vf_local) && (vf) && !vsync_pts_aligned) {
4039#ifdef PTS_TRACE_DEBUG
4040 pr_info("####timestamp_pcrscr_get() = 0x%x, vf->pts = 0x%x, vsync_pts_inc = %d\n",
4041 timestamp_pcrscr_get(), vf->pts, vsync_pts_inc);
4042#endif
4043 if ((abs(timestamp_pcrscr_get() - vf->pts) <= (vsync_pts_inc))
4044 && ((int)(timestamp_pcrscr_get() - vf->pts) >= 0)) {
4045 /*vsync_pts_align = vsync_pts_inc / 4 - */
4046 /* (timestamp_pcrscr_get() - vf->pts);*/
4047 vsync_pts_align = 0;
4048 vsync_pts_aligned = true;
4049#ifdef PTS_TRACE_DEBUG
4050 pts_trace_his_rd = 0;
4051 pr_info("####vsync_pts_align set to %d\n",
4052 vsync_pts_align);
4053#endif
4054 }
4055 }
4056 if (stop_update)
4057 frame_par_ready_to_set = 0;
4058}
4059
4060static void viu_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
4061{
4062 u32 r;
4063 u32 vphase, vini_phase, vformatter;
4064 u32 pat, loop;
4065 static const u32 vpat[MAX_VSKIP_COUNT + 1] = {
4066 0, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
4067 u32 u, v;
4068 u32 type, bit_mode = 0;
4069 bool is_mvc = false;
4070
4071 if (vf == NULL) {
4072 pr_info("viu_set_dcu vf NULL, return\n");
4073 return;
4074 }
4075
4076 type = vf->type;
4077 if (type & VIDTYPE_MVC)
4078 is_mvc = true;
4079
4080 pr_debug("set dcu for vd1 %p, type:0x%x\n", vf, type);
4081 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
4082 if (frame_par->nocomp)
4083 type &= ~VIDTYPE_COMPRESS;
4084
4085 if (type & VIDTYPE_COMPRESS) {
4086 r = (3 << 24) |
4087 (vpp_hold_line << 16) |
4088 ((legacy_vpp ? 1 : 2) << 14) | /* burst1 */
4089 (vf->bitdepth & BITDEPTH_MASK);
4090
4091 if (frame_par->hscale_skip_count)
4092 r |= 0x33;
4093 if (frame_par->vscale_skip_count)
4094 r |= 0xcc;
4095#ifdef TV_REVERSE
4096 if (reverse)
4097 r |= (1<<26) | (1<<27);
4098#endif
4099 if (vf->bitdepth & BITDEPTH_SAVING_MODE)
4100 r |= (1<<28); /* mem_saving_mode */
4101 if (type & VIDTYPE_SCATTER)
4102 r |= (1<<29);
4103 VSYNC_WR_MPEG_REG(AFBC_MODE, r);
4104
4105 r = 0x1700;
4106 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4107 if (vf && (vf->source_type
4108 != VFRAME_SOURCE_TYPE_HDMI))
4109 r |= (1 << 19); /* dos_uncomp */
4110
4111 if (type & VIDTYPE_COMB_MODE)
4112 r |= (1 << 20);
4113 }
4114 VSYNC_WR_MPEG_REG(AFBC_ENABLE, r);
4115
4116 r = 0x100;
4117 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4118 if (type & VIDTYPE_VIU_444)
4119 r |= 0;
4120 else if (type & VIDTYPE_VIU_422)
4121 r |= (1 << 12);
4122 else
4123 r |= (2 << 12);
4124 }
4125 VSYNC_WR_MPEG_REG(AFBC_CONV_CTRL, r);
4126
4127 u = (vf->bitdepth >> (BITDEPTH_U_SHIFT)) & 0x3;
4128 v = (vf->bitdepth >> (BITDEPTH_V_SHIFT)) & 0x3;
4129 VSYNC_WR_MPEG_REG(AFBC_DEC_DEF_COLOR,
4130 0x3FF00000 | /*Y,bit20+*/
4131 0x80 << (u + 10) |
4132 0x80 << v);
4133 /* chroma formatter */
4134
4135 r = 0;
4136#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4137 if (is_meson_txlx_package_962X()
4138 && !is_dolby_vision_stb_mode()
4139 && is_dolby_vision_on()) {
4140 r = HFORMATTER_REPEAT |
4141 HFORMATTER_YC_RATIO_2_1 |
4142 HFORMATTER_EN |
4143 VFORMATTER_ALWAYS_RPT |
4144 (0 << VFORMATTER_INIPHASE_BIT) |
4145 (0x8 << VFORMATTER_PHASE_BIT) |
4146 VFORMATTER_EN;
4147 } else
4148#endif
4149 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4150 r = HFORMATTER_REPEAT |
4151 HFORMATTER_YC_RATIO_2_1 |
4152 HFORMATTER_EN |
4153 VFORMATTER_RPTLINE0_EN |
4154 (0xc << VFORMATTER_INIPHASE_BIT) |
4155 (0x8 << VFORMATTER_PHASE_BIT) |
4156 VFORMATTER_EN;
4157 if (type & VIDTYPE_VIU_444) {
4158 r &= ~HFORMATTER_EN;
4159 r &= ~VFORMATTER_EN;
4160 r &= ~HFORMATTER_YC_RATIO_2_1;
4161 } else if (type & VIDTYPE_VIU_422) {
4162 r &= ~VFORMATTER_EN;
4163 }
4164 } else {
4165 r = HFORMATTER_REPEAT |
4166 HFORMATTER_YC_RATIO_2_1 |
4167 HFORMATTER_EN |
4168 VFORMATTER_RPTLINE0_EN |
4169 (0xc << VFORMATTER_INIPHASE_BIT) |
4170 (0x8 << VFORMATTER_PHASE_BIT) |
4171 VFORMATTER_EN;
4172 }
4173 VSYNC_WR_MPEG_REG(AFBC_VD_CFMT_CTRL, r);
4174
4175 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4176 if (type & VIDTYPE_COMPRESS_LOSS)
4177 VSYNC_WR_MPEG_REG(
4178 AFBCDEC_IQUANT_ENABLE,
4179 ((1 << 11) |
4180 (1 << 10) |
4181 (1 << 4) |
4182 (1 << 0)));
4183 else
4184 VSYNC_WR_MPEG_REG(
4185 AFBCDEC_IQUANT_ENABLE, 0);
4186 }
4187
4188 vd1_path_select(true);
4189
4190 VSYNC_WR_MPEG_REG(
4191 VD1_IF0_GEN_REG + cur_dev->viu_off, 0);
4192 return;
4193
4194 } else {
4195 if ((vf->bitdepth & BITDEPTH_Y10) &&
4196 (!frame_par->nocomp)) {
4197 if (vf->type & VIDTYPE_VIU_444) {
4198 bit_mode = 2;
4199 } else {
4200 if (vf->bitdepth & FULL_PACK_422_MODE)
4201 bit_mode = 3;
4202 else
4203 bit_mode = 1;
4204 }
4205 } else {
4206 bit_mode = 0;
4207 }
4208 if (!legacy_vpp) {
4209 VSYNC_WR_MPEG_REG_BITS(
4210 G12_VD1_IF0_GEN_REG3,
4211 (bit_mode & 0x3), 8, 2);
4212 if (is_mvc)
4213 VSYNC_WR_MPEG_REG_BITS(
4214 G12_VD2_IF0_GEN_REG3,
4215 (bit_mode & 0x3), 8, 2);
4216 } else {
4217 VSYNC_WR_MPEG_REG_BITS(
4218 VD1_IF0_GEN_REG3 +
4219 cur_dev->viu_off,
4220 (bit_mode & 0x3), 8, 2);
4221 if (is_mvc)
4222 VSYNC_WR_MPEG_REG_BITS(
4223 VD2_IF0_GEN_REG3 +
4224 cur_dev->viu_off,
4225 (bit_mode & 0x3), 8, 2);
4226 }
4227#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
4228 DI_POST_WR_REG_BITS(DI_IF1_GEN_REG3,
4229 (bit_mode&0x3), 8, 2);
4230 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXLX))
4231 DI_POST_WR_REG_BITS(DI_IF2_GEN_REG3,
4232 (bit_mode & 0x3), 8, 2);
4233 if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12A))
4234 DI_POST_WR_REG_BITS(DI_IF0_GEN_REG3,
4235 (bit_mode & 0x3), 8, 2);
4236#endif
4237 vd1_path_select(false);
4238 VSYNC_WR_MPEG_REG(AFBC_ENABLE, 0);
4239 }
4240 }
4241
4242 r = (3 << VDIF_URGENT_BIT) |
4243 (vpp_hold_line << VDIF_HOLD_LINES_BIT) |
4244 VDIF_FORMAT_SPLIT |
4245 VDIF_CHRO_RPT_LAST | VDIF_ENABLE;
4246 /* | VDIF_RESET_ON_GO_FIELD;*/
4247 if (debug_flag & DEBUG_FLAG_GOFIELD_MANUL)
4248 r |= 1<<7; /*for manul triggle gofiled.*/
4249
4250 if ((type & VIDTYPE_VIU_SINGLE_PLANE) == 0)
4251 r |= VDIF_SEPARATE_EN;
4252 else {
4253 if (type & VIDTYPE_VIU_422)
4254 r |= VDIF_FORMAT_422;
4255 else {
4256 r |= VDIF_FORMAT_RGB888_YUV444 |
4257 VDIF_DEMUX_MODE_RGB_444;
4258 }
4259 }
4260
4261 if (frame_par->hscale_skip_count)
4262 r |= VDIF_CHROMA_HZ_AVG | VDIF_LUMA_HZ_AVG;
4263
4264 /*enable go field reset default according to vlsi*/
4265 r |= VDIF_RESET_ON_GO_FIELD;
4266 VSYNC_WR_MPEG_REG(VD1_IF0_GEN_REG + cur_dev->viu_off, r);
4267 if (is_mvc)
4268 VSYNC_WR_MPEG_REG(
4269 VD2_IF0_GEN_REG + cur_dev->viu_off, r);
4270
4271 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */
4272 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) {
4273 if (type & VIDTYPE_VIU_NV21) {
4274 VSYNC_WR_MPEG_REG_BITS(VD1_IF0_GEN_REG2 +
4275 cur_dev->viu_off, 1, 0, 1);
4276 } else {
4277 VSYNC_WR_MPEG_REG_BITS(VD1_IF0_GEN_REG2 +
4278 cur_dev->viu_off, 0, 0, 1);
4279 }
4280#ifdef TV_REVERSE
4281 if (reverse) {
4282 VSYNC_WR_MPEG_REG_BITS((VD1_IF0_GEN_REG2 +
4283 cur_dev->viu_off), 0xf, 2, 4);
4284 if (is_mvc)
4285 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4286 cur_dev->viu_off), 0xf, 2, 4);
4287 } else {
4288 VSYNC_WR_MPEG_REG_BITS((VD1_IF0_GEN_REG2 +
4289 cur_dev->viu_off), 0, 2, 4);
4290 if (is_mvc)
4291 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4292 cur_dev->viu_off), 0, 2, 4);
4293 }
4294#endif
4295 }
4296 /* #endif */
4297
4298 /* chroma formatter */
4299 if (type & VIDTYPE_VIU_444) {
4300 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4301 HFORMATTER_YC_RATIO_1_1);
4302 if (is_mvc)
4303 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4304 HFORMATTER_YC_RATIO_1_1);
4305 } else if (type & VIDTYPE_VIU_FIELD) {
4306 vini_phase = 0xc << VFORMATTER_INIPHASE_BIT;
4307 vphase =
4308 ((type & VIDTYPE_VIU_422) ? 0x10 : 0x08) <<
4309 VFORMATTER_PHASE_BIT;
4310
4311 /*vlsi suggest only for yuv420 vformatter shold be 1*/
4312 if (type & VIDTYPE_VIU_NV21)
4313 vformatter = VFORMATTER_EN;
4314 else
4315 vformatter = 0;
4316 if (is_meson_txlx_package_962X()
4317 && !is_dolby_vision_stb_mode()
4318 && is_dolby_vision_on()) {
4319 VSYNC_WR_MPEG_REG(
4320 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4321 HFORMATTER_REPEAT |
4322 HFORMATTER_YC_RATIO_2_1 |
4323 HFORMATTER_EN |
4324 ((type & VIDTYPE_VIU_422) ?
4325 VFORMATTER_RPTLINE0_EN :
4326 VFORMATTER_ALWAYS_RPT) |
4327 (0 << VFORMATTER_INIPHASE_BIT) |
4328 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4329 << VFORMATTER_PHASE_BIT) |
4330 ((type & VIDTYPE_VIU_422) ?
4331 0 :
4332 VFORMATTER_EN));
4333 pr_debug("\tvd1 set fmt(dovi tv)\n");
4334 } else if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
4335 is_meson_txlx_cpu()) {
4336 if ((vf->width >= 3840) &&
4337 (vf->height >= 2160) &&
4338 (type & VIDTYPE_VIU_422)) {
4339 VSYNC_WR_MPEG_REG(
4340 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4341 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4342 VFORMATTER_RPTLINE0_EN | vini_phase | vphase);
4343 if (is_mvc)
4344 VSYNC_WR_MPEG_REG(
4345 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4346 HFORMATTER_RRT_PIXEL0 |
4347 HFORMATTER_YC_RATIO_2_1 |
4348 HFORMATTER_EN |
4349 VFORMATTER_RPTLINE0_EN |
4350 vini_phase | vphase);
4351 } else {
4352 VSYNC_WR_MPEG_REG(
4353 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4354 (is_dolby_vision_on() ?
4355 HFORMATTER_REPEAT : 0) |
4356 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4357 VFORMATTER_RPTLINE0_EN | vini_phase | vphase |
4358 vformatter);
4359 if (is_mvc)
4360 VSYNC_WR_MPEG_REG(
4361 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4362 HFORMATTER_YC_RATIO_2_1 |
4363 HFORMATTER_EN |
4364 VFORMATTER_RPTLINE0_EN |
4365 vini_phase | vphase |
4366 vformatter);
4367 }
4368 } else {
4369 VSYNC_WR_MPEG_REG(
4370 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4371 (is_dolby_vision_on() ?
4372 HFORMATTER_REPEAT : 0) |
4373 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4374 VFORMATTER_RPTLINE0_EN |
4375 vini_phase | vphase |
4376 vformatter);
4377 if (is_mvc)
4378 VSYNC_WR_MPEG_REG(
4379 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4380 HFORMATTER_YC_RATIO_2_1 |
4381 HFORMATTER_EN |
4382 VFORMATTER_RPTLINE0_EN |
4383 vini_phase | vphase |
4384 vformatter);
4385 }
4386 } else if (type & VIDTYPE_MVC) {
4387 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4388 HFORMATTER_YC_RATIO_2_1 |
4389 HFORMATTER_EN |
4390 VFORMATTER_RPTLINE0_EN |
4391 (0xe << VFORMATTER_INIPHASE_BIT) |
4392 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4393 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4394 if (is_mvc)
4395 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4396 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4397 VFORMATTER_RPTLINE0_EN | (0xa <<
4398 VFORMATTER_INIPHASE_BIT) |
4399 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4400 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4401 } else if ((type & VIDTYPE_INTERLACE)
4402 && (((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP))) {
4403 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4404 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4405 VFORMATTER_RPTLINE0_EN | (0xe <<
4406 VFORMATTER_INIPHASE_BIT) |
4407 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4408 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4409 if (is_mvc)
4410 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4411 HFORMATTER_YC_RATIO_2_1 |
4412 HFORMATTER_EN |
4413 VFORMATTER_RPTLINE0_EN |
4414 (0xe << VFORMATTER_INIPHASE_BIT) |
4415 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4416 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4417 } else {
4418 if (is_meson_txlx_package_962X()
4419 && !is_dolby_vision_stb_mode()
4420 && is_dolby_vision_on()) {
4421 VSYNC_WR_MPEG_REG(
4422 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4423 HFORMATTER_REPEAT |
4424 HFORMATTER_YC_RATIO_2_1 |
4425 HFORMATTER_EN |
4426 VFORMATTER_ALWAYS_RPT |
4427 (0 << VFORMATTER_INIPHASE_BIT) |
4428 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4429 << VFORMATTER_PHASE_BIT) |
4430 VFORMATTER_EN);
4431 } else {
4432 VSYNC_WR_MPEG_REG(
4433 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4434 (is_dolby_vision_on() ?
4435 HFORMATTER_REPEAT : 0) |
4436 HFORMATTER_YC_RATIO_2_1 |
4437 HFORMATTER_EN |
4438 VFORMATTER_RPTLINE0_EN |
4439 (0xa << VFORMATTER_INIPHASE_BIT) |
4440 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4441 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4442 }
4443 if (is_mvc)
4444 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4445 HFORMATTER_YC_RATIO_2_1 |
4446 HFORMATTER_EN |
4447 VFORMATTER_RPTLINE0_EN |
4448 (0xa << VFORMATTER_INIPHASE_BIT) |
4449 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4450 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4451 }
4452#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4453 if ((is_meson_txlx_cpu()
4454 || is_meson_g12a_cpu()
4455 || is_meson_g12b_cpu())
4456 && is_dolby_vision_on()
4457 && is_dolby_vision_stb_mode()
4458 && (vf->source_type ==
4459 VFRAME_SOURCE_TYPE_OTHERS))
4460 VSYNC_WR_MPEG_REG_BITS(
4461 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4462 1, 29, 1);
4463#endif
4464 /* LOOP/SKIP pattern */
4465 pat = vpat[frame_par->vscale_skip_count];
4466
4467 if (type & VIDTYPE_VIU_FIELD) {
4468 loop = 0;
4469
4470 if (type & VIDTYPE_INTERLACE)
4471 pat = vpat[frame_par->vscale_skip_count >> 1];
4472 } else if (type & VIDTYPE_MVC) {
4473 loop = 0x11;
4474 if (is_need_framepacking_output()) {
4475 pat = 0;
4476 } else
4477 pat = 0x80;
4478 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
4479 loop = 0x11;
4480 pat <<= 4;
4481 } else
4482 loop = 0;
4483
4484 VSYNC_WR_MPEG_REG(
4485 VD1_IF0_RPT_LOOP + cur_dev->viu_off,
4486 (loop << VDIF_CHROMA_LOOP1_BIT) |
4487 (loop << VDIF_LUMA_LOOP1_BIT) |
4488 (loop << VDIF_CHROMA_LOOP0_BIT) |
4489 (loop << VDIF_LUMA_LOOP0_BIT));
4490 if (is_mvc)
4491 VSYNC_WR_MPEG_REG(
4492 VD2_IF0_RPT_LOOP + cur_dev->viu_off,
4493 (loop << VDIF_CHROMA_LOOP1_BIT) |
4494 (loop << VDIF_LUMA_LOOP1_BIT) |
4495 (loop << VDIF_CHROMA_LOOP0_BIT) |
4496 (loop << VDIF_LUMA_LOOP0_BIT));
4497
4498 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
4499 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
4500 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
4501 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
4502
4503 if (type & VIDTYPE_MVC) {
4504 if (is_need_framepacking_output())
4505 pat = 0;
4506 else
4507 pat = 0x88;
4508 VSYNC_WR_MPEG_REG(
4509 VD2_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
4510 VSYNC_WR_MPEG_REG(
4511 VD2_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
4512 VSYNC_WR_MPEG_REG(
4513 VD2_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
4514 VSYNC_WR_MPEG_REG(
4515 VD2_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
4516 }
4517
4518 /* picture 0/1 control */
4519 if ((((type & VIDTYPE_INTERLACE) == 0) &&
4520 ((type & VIDTYPE_VIU_FIELD) == 0) &&
4521 ((type & VIDTYPE_MVC) == 0)) ||
4522 (frame_par->vpp_2pic_mode & 0x3)) {
4523 /* progressive frame in two pictures */
4524 if (frame_par->vpp_2pic_mode & VPP_PIC1_FIRST) {
4525 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4526 cur_dev->viu_off, (2 << 26) |
4527 /* two pic mode */
4528 (2 << 24) |
4529 /* use own last line */
4530 (1 << 8) |
4531 /* toggle pic 0 and 1, use pic1 first*/
4532 (0x01));
4533 /* loop pattern */
4534 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4535 cur_dev->viu_off, (2 << 26) |
4536 /* two pic mode */
4537 (2 << 24) |
4538 /* use own last line */
4539 (1 << 8) |
4540 /* toggle pic 0 and 1,use pic1 first */
4541 (0x01));
4542 /* loop pattern */
4543 } else {
4544 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4545 cur_dev->viu_off, (2 << 26) |
4546 /* two pic mode */
4547 (2 << 24) |
4548 /* use own last line */
4549 (2 << 8) |
4550 /* toggle pic 0 and 1, use pic0 first */
4551 (0x01));
4552 /* loop pattern */
4553 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4554 cur_dev->viu_off, (2 << 26) |
4555 /* two pic mode */
4556 (2 << 24) |
4557 /* use own last line */
4558 (2 << 8) |
4559 /* toggle pic 0 and 1, use pic0 first */
4560 (0x01));
4561 /* loop pattern */
4562 }
4563 } else if (process_3d_type & MODE_3D_OUT_FA_MASK) {
4564 /*FA LR/TB output , do nothing*/
4565 } else {
4566 if (frame_par->vpp_2pic_mode & VPP_SELECT_PIC1) {
4567 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4568 cur_dev->viu_off, 0);
4569 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4570 cur_dev->viu_off, 0);
4571 if (is_mvc) {
4572 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
4573 cur_dev->viu_off, 0);
4574 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
4575 cur_dev->viu_off, 0);
4576 }
4577 } else {
4578 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4579 cur_dev->viu_off, 0);
4580 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4581 cur_dev->viu_off, 0);
4582 if (is_mvc) {
4583 VSYNC_WR_MPEG_REG(
4584 VD2_IF0_LUMA_PSEL +
4585 cur_dev->viu_off, 0);
4586 VSYNC_WR_MPEG_REG(
4587 VD2_IF0_CHROMA_PSEL +
4588 cur_dev->viu_off, 0);
4589 }
4590 }
4591 }
4592}
4593
4594static void vd2_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
4595{
4596 u32 r;
4597 u32 vphase, vini_phase;
4598 u32 pat, loop;
4599 static const u32 vpat[MAX_VSKIP_COUNT + 1] = {
4600 0, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
4601 u32 u, v;
4602 u32 type, bit_mode = 0;
4603
4604 if (!vf) {
4605 pr_err("vd2_set_dcu vf is NULL\n");
4606 return;
4607 }
4608
4609 type = vf->type;
4610 pr_debug("set dcu for vd2 %p, type:0x%x\n", vf, type);
4611 last_el_w = (vf->type
4612 & VIDTYPE_COMPRESS) ?
4613 vf->compWidth :
4614 vf->width;
4615 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
4616 if (type & VIDTYPE_COMPRESS) {
4617 r = (3 << 24) |
4618 (vpp_hold_line << 16) |
4619 ((legacy_vpp ? 1 : 2) << 14) | /* burst1 */
4620 (vf->bitdepth & BITDEPTH_MASK);
4621
4622 if (frame_par->hscale_skip_count)
4623 r |= 0x33;
4624 if (frame_par->vscale_skip_count)
4625 r |= 0xcc;
4626
4627#ifdef TV_REVERSE
4628 if (reverse)
4629 r |= (1<<26) | (1<<27);
4630#endif
4631 if (vf->bitdepth & BITDEPTH_SAVING_MODE)
4632 r |= (1<<28); /* mem_saving_mode */
4633 if (type & VIDTYPE_SCATTER)
4634 r |= (1<<29);
4635 VSYNC_WR_MPEG_REG(VD2_AFBC_MODE, r);
4636
4637 r = 0x1700;
4638 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4639 if (vf && (vf->source_type
4640 != VFRAME_SOURCE_TYPE_HDMI))
4641 r |= (1 << 19); /* dos_uncomp */
4642 }
4643 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, r);
4644
4645 r = 0x100;
4646 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4647 if (type & VIDTYPE_VIU_444)
4648 r |= 0;
4649 else if (type & VIDTYPE_VIU_422)
4650 r |= (1 << 12);
4651 else
4652 r |= (2 << 12);
4653 }
4654 VSYNC_WR_MPEG_REG(VD2_AFBC_CONV_CTRL, r);
4655
4656 u = (vf->bitdepth >> (BITDEPTH_U_SHIFT)) & 0x3;
4657 v = (vf->bitdepth >> (BITDEPTH_V_SHIFT)) & 0x3;
4658 VSYNC_WR_MPEG_REG(VD2_AFBC_DEC_DEF_COLOR,
4659 0x3FF00000 | /*Y,bit20+*/
4660 0x80 << (u + 10) |
4661 0x80 << v);
4662
4663 /* chroma formatter */
4664 r = HFORMATTER_EN |
4665 (0x8 << VFORMATTER_PHASE_BIT) |
4666 VFORMATTER_EN;
4667#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4668 if (is_meson_txlx_package_962X()
4669 && !is_dolby_vision_stb_mode()
4670 && is_dolby_vision_on()) {
4671 r |= HFORMATTER_REPEAT |
4672 HFORMATTER_YC_RATIO_2_1 |
4673 HFORMATTER_EN |
4674 VFORMATTER_ALWAYS_RPT |
4675 (0 << VFORMATTER_INIPHASE_BIT) |
4676 (0x8 << VFORMATTER_PHASE_BIT) |
4677 VFORMATTER_EN;
4678 } else
4679#endif
4680 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4681 r = HFORMATTER_YC_RATIO_2_1 |
4682 HFORMATTER_EN |
4683 VFORMATTER_RPTLINE0_EN |
4684 (0x8 << VFORMATTER_PHASE_BIT) |
4685 VFORMATTER_EN;
4686
4687 if (is_dolby_vision_on())
4688 r |= HFORMATTER_REPEAT |
4689 (0xc << VFORMATTER_INIPHASE_BIT);
4690 else
4691 r |= HFORMATTER_RRT_PIXEL0 |
4692 (0 << VFORMATTER_INIPHASE_BIT);
4693
4694 if (type & VIDTYPE_VIU_444) {
4695 r &= ~HFORMATTER_EN;
4696 r &= ~VFORMATTER_EN;
4697 r &= ~HFORMATTER_YC_RATIO_2_1;
4698 } else if (type & VIDTYPE_VIU_422) {
4699 r &= ~VFORMATTER_EN;
4700 }
4701 } else {
4702 r = HFORMATTER_YC_RATIO_2_1 |
4703 HFORMATTER_EN |
4704 VFORMATTER_RPTLINE0_EN |
4705 (0x8 << VFORMATTER_PHASE_BIT) |
4706 VFORMATTER_EN;
4707 if (is_dolby_vision_on())
4708 r |= HFORMATTER_REPEAT |
4709 (0xc << VFORMATTER_INIPHASE_BIT);
4710 else
4711 r |= HFORMATTER_RRT_PIXEL0 |
4712 (0 << VFORMATTER_INIPHASE_BIT);
4713 }
4714 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_CTRL, r);
4715
4716 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4717 if (type & VIDTYPE_COMPRESS_LOSS)
4718 VSYNC_WR_MPEG_REG(
4719 VD2_AFBCDEC_IQUANT_ENABLE,
4720 ((1 << 11) |
4721 (1 << 10) |
4722 (1 << 4) |
4723 (1 << 0)));
4724 else
4725 VSYNC_WR_MPEG_REG(
4726 VD2_AFBCDEC_IQUANT_ENABLE, 0);
4727 }
4728
4729 vd2_path_select(true);
4730 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG +
4731 cur_dev->viu_off, 0);
4732 return;
4733 } else {
4734 if ((vf->bitdepth & BITDEPTH_Y10) &&
4735 (!frame_par->nocomp)) {
4736 if (vf->type & VIDTYPE_VIU_444) {
4737 bit_mode = 2;
4738 } else {
4739 if (vf->bitdepth & FULL_PACK_422_MODE)
4740 bit_mode = 3;
4741 else
4742 bit_mode = 1;
4743 }
4744 } else {
4745 bit_mode = 0;
4746 }
4747 vd2_path_select(false);
4748 if (!legacy_vpp) {
4749 VSYNC_WR_MPEG_REG_BITS(
4750 G12_VD2_IF0_GEN_REG3,
4751 (bit_mode & 0x3), 8, 2);
4752 } else {
4753 VSYNC_WR_MPEG_REG_BITS(
4754 VD2_IF0_GEN_REG3 + cur_dev->viu_off,
4755 (bit_mode&0x3), 8, 2);
4756 }
4757 if (!(VSYNC_RD_MPEG_REG(VIU_MISC_CTRL1) & 0x1))
4758 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
4759 if (type & VIDTYPE_VIU_NV21)
4760 VSYNC_WR_MPEG_REG_BITS(
4761 VD2_IF0_GEN_REG2 +
4762 cur_dev->viu_off, 1, 0, 1);
4763 else
4764 VSYNC_WR_MPEG_REG_BITS(
4765 VD2_IF0_GEN_REG2 +
4766 cur_dev->viu_off, 0, 0, 1);
4767 }
4768 }
4769
4770 r = (3 << VDIF_URGENT_BIT) |
4771 (vpp_hold_line << VDIF_HOLD_LINES_BIT) |
4772 VDIF_FORMAT_SPLIT |
4773 VDIF_CHRO_RPT_LAST | VDIF_ENABLE;
4774 /* | VDIF_RESET_ON_GO_FIELD;*/
4775 if (debug_flag & DEBUG_FLAG_GOFIELD_MANUL)
4776 r |= 1<<7; /*for manul triggle gofiled.*/
4777
4778 if ((type & VIDTYPE_VIU_SINGLE_PLANE) == 0)
4779 r |= VDIF_SEPARATE_EN;
4780 else {
4781 if (type & VIDTYPE_VIU_422)
4782 r |= VDIF_FORMAT_422;
4783 else {
4784 r |= VDIF_FORMAT_RGB888_YUV444 |
4785 VDIF_DEMUX_MODE_RGB_444;
4786 }
4787 }
4788
4789 if (frame_par->hscale_skip_count)
4790 r |= VDIF_CHROMA_HZ_AVG | VDIF_LUMA_HZ_AVG;
4791
4792 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG + cur_dev->viu_off, r);
4793
4794#ifdef TV_REVERSE
4795 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) {
4796 if (reverse) {
4797 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4798 cur_dev->viu_off), 0xf, 2, 4);
4799 } else {
4800 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4801 cur_dev->viu_off), 0, 2, 4);
4802 }
4803 }
4804#endif
4805
4806 /* chroma formatter */
4807 if (type & VIDTYPE_VIU_444) {
4808 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4809 HFORMATTER_YC_RATIO_1_1);
4810 } else if (type & VIDTYPE_VIU_FIELD) {
4811 vini_phase = 0xc << VFORMATTER_INIPHASE_BIT;
4812 vphase =
4813 ((type & VIDTYPE_VIU_422) ? 0x10 : 0x08) <<
4814 VFORMATTER_PHASE_BIT;
4815 if (is_meson_txlx_package_962X()
4816 && !is_dolby_vision_stb_mode()
4817 && is_dolby_vision_on()) {
4818 VSYNC_WR_MPEG_REG(
4819 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4820 HFORMATTER_REPEAT |
4821 HFORMATTER_YC_RATIO_2_1 |
4822 HFORMATTER_EN |
4823 VFORMATTER_ALWAYS_RPT |
4824 (0 << VFORMATTER_INIPHASE_BIT) |
4825 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4826 << VFORMATTER_PHASE_BIT) |
4827 VFORMATTER_EN);
4828 pr_debug("\tvd2 set fmt(dovi tv)\n");
4829 } else if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
4830 is_meson_txlx_cpu()) {
4831 if ((vf->width >= 3840) &&
4832 (vf->height >= 2160) &&
4833 (type & VIDTYPE_VIU_422)) {
4834 VSYNC_WR_MPEG_REG(
4835 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4836 HFORMATTER_RRT_PIXEL0 |
4837 HFORMATTER_YC_RATIO_2_1 |
4838 HFORMATTER_EN | VFORMATTER_RPTLINE0_EN |
4839 vini_phase | vphase);
4840 } else {
4841 VSYNC_WR_MPEG_REG(
4842 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4843 (is_dolby_vision_on() ?
4844 HFORMATTER_REPEAT : 0) |
4845 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4846 VFORMATTER_RPTLINE0_EN |
4847 vini_phase | vphase |
4848 VFORMATTER_EN);
4849 }
4850 } else {
4851 VSYNC_WR_MPEG_REG(
4852 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4853 (is_dolby_vision_on() ?
4854 HFORMATTER_REPEAT : 0) |
4855 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4856 VFORMATTER_RPTLINE0_EN | vini_phase | vphase |
4857 VFORMATTER_EN);
4858 }
4859 } else if (type & VIDTYPE_MVC) {
4860 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4861 HFORMATTER_YC_RATIO_2_1 |
4862 HFORMATTER_EN |
4863 VFORMATTER_RPTLINE0_EN |
4864 (0xe << VFORMATTER_INIPHASE_BIT) |
4865 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4866 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4867 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4868 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4869 VFORMATTER_RPTLINE0_EN | (0xa <<
4870 VFORMATTER_INIPHASE_BIT) |
4871 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4872 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4873 } else if ((type & VIDTYPE_INTERLACE)
4874 &&
4875 (((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP))) {
4876 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4877 HFORMATTER_YC_RATIO_2_1 |
4878 HFORMATTER_EN |
4879 VFORMATTER_RPTLINE0_EN |
4880 (0xe << VFORMATTER_INIPHASE_BIT) |
4881 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4882 << VFORMATTER_PHASE_BIT) |
4883 VFORMATTER_EN);
4884 } else {
4885 if (is_meson_txlx_package_962X()
4886 && !is_dolby_vision_stb_mode()
4887 && is_dolby_vision_on()) {
4888 VSYNC_WR_MPEG_REG(
4889 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4890 HFORMATTER_REPEAT |
4891 HFORMATTER_YC_RATIO_2_1 |
4892 HFORMATTER_EN |
4893 VFORMATTER_ALWAYS_RPT |
4894 (0 << VFORMATTER_INIPHASE_BIT) |
4895 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4896 << VFORMATTER_PHASE_BIT) |
4897 VFORMATTER_EN);
4898 pr_info("\tvd2 set fmt(dovi tv)\n");
4899 } else {
4900 VSYNC_WR_MPEG_REG(
4901 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4902 (is_dolby_vision_on() ?
4903 HFORMATTER_REPEAT : 0) |
4904 HFORMATTER_YC_RATIO_2_1 |
4905 HFORMATTER_EN |
4906 VFORMATTER_RPTLINE0_EN |
4907 (0xc << VFORMATTER_INIPHASE_BIT) |
4908 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4909 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4910 pr_info("\tvd2 set fmt(dovi:%d)\n",
4911 /*is_dolby_vision_on()*/0);
4912 }
4913 }
4914#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4915 if ((is_meson_txlx_cpu()
4916 || is_meson_g12a_cpu()
4917 || is_meson_g12b_cpu())
4918 && is_dolby_vision_on()
4919 && is_dolby_vision_stb_mode()
4920 && (vf->source_type ==
4921 VFRAME_SOURCE_TYPE_OTHERS))
4922 VSYNC_WR_MPEG_REG_BITS(
4923 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4924 1, 29, 1);
4925#endif
4926 /* LOOP/SKIP pattern */
4927 pat = vpat[frame_par->vscale_skip_count];
4928
4929 if (type & VIDTYPE_VIU_FIELD) {
4930 loop = 0;
4931
4932 if (type & VIDTYPE_INTERLACE)
4933 pat = vpat[frame_par->vscale_skip_count >> 1];
4934 } else if (type & VIDTYPE_MVC) {
4935 loop = 0x11;
4936 pat = 0x80;
4937 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
4938 loop = 0x11;
4939 pat <<= 4;
4940 } else
4941 loop = 0;
4942
4943 VSYNC_WR_MPEG_REG(
4944 VD2_IF0_RPT_LOOP + cur_dev->viu_off,
4945 (loop << VDIF_CHROMA_LOOP1_BIT) |
4946 (loop << VDIF_LUMA_LOOP1_BIT) |
4947 (loop << VDIF_CHROMA_LOOP0_BIT) |
4948 (loop << VDIF_LUMA_LOOP0_BIT));
4949
4950 if (type & VIDTYPE_MVC)
4951 pat = 0x88;
4952
4953 VSYNC_WR_MPEG_REG(
4954 VD2_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
4955 VSYNC_WR_MPEG_REG(
4956 VD2_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
4957 VSYNC_WR_MPEG_REG(
4958 VD2_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
4959 VSYNC_WR_MPEG_REG(
4960 VD2_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
4961
4962 if (platform_type == 0) {
4963 /* picture 0/1 control */
4964 if (((type & VIDTYPE_INTERLACE) == 0) &&
4965 ((type & VIDTYPE_VIU_FIELD) == 0) &&
4966 ((type & VIDTYPE_MVC) == 0)) {
4967 /* progressive frame in two pictures */
4968
4969 } else {
4970 VSYNC_WR_MPEG_REG(
4971 VD2_IF0_LUMA_PSEL + cur_dev->viu_off, 0);
4972 VSYNC_WR_MPEG_REG(
4973 VD2_IF0_CHROMA_PSEL + cur_dev->viu_off, 0);
4974 }
4975 } else {
4976 /* picture 0/1 control */
4977 if ((((type & VIDTYPE_INTERLACE) == 0) &&
4978 ((type & VIDTYPE_VIU_FIELD) == 0) &&
4979 ((type & VIDTYPE_MVC) == 0)) ||
4980 (next_frame_par->vpp_2pic_mode & 0x3)) {
4981 /* progressive frame in two pictures */
4982
4983 } else {
4984 if (next_frame_par->vpp_2pic_mode & VPP_SELECT_PIC1) {
4985 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
4986 cur_dev->viu_off, 0);
4987 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
4988 cur_dev->viu_off, 0);
4989 } else {
4990 VSYNC_WR_MPEG_REG(
4991 VD2_IF0_LUMA_PSEL +
4992 cur_dev->viu_off, 0);
4993 VSYNC_WR_MPEG_REG(
4994 VD2_IF0_CHROMA_PSEL +
4995 cur_dev->viu_off, 0);
4996 }
4997 }
4998 }
4999}
5000
5001static int detect_vout_type(void)
5002{
5003 int vout_type = VOUT_TYPE_PROG;
5004 if ((vinfo) && (vinfo->field_height != vinfo->height)) {
5005 if ((vinfo->height == 576) || (vinfo->height == 480))
5006 vout_type = (READ_VCBUS_REG(ENCI_INFO_READ) &
5007 (1 << 29)) ?
5008 VOUT_TYPE_BOT_FIELD : VOUT_TYPE_TOP_FIELD;
5009 else if (vinfo->height == 1080)
5010 vout_type = (((READ_VCBUS_REG(ENCP_INFO_READ) >> 16) &
5011 0x1fff) < 562) ?
5012 VOUT_TYPE_TOP_FIELD : VOUT_TYPE_BOT_FIELD;
5013
5014#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
5015 if (is_vsync_rdma_enable()) {
5016 if (vout_type == VOUT_TYPE_TOP_FIELD)
5017 vout_type = VOUT_TYPE_BOT_FIELD;
5018 else if (vout_type == VOUT_TYPE_BOT_FIELD)
5019 vout_type = VOUT_TYPE_TOP_FIELD;
5020 }
5021#endif
5022 }
5023 return vout_type;
5024}
5025
5026#ifdef INTERLACE_FIELD_MATCH_PROCESS
5027static inline bool interlace_field_type_need_match(int vout_type,
5028 struct vframe_s *vf)
5029{
5030 if (DUR2PTS(vf->duration) != vsync_pts_inc)
5031 return false;
5032
5033 if ((vout_type == VOUT_TYPE_TOP_FIELD) &&
5034 ((vf->type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_BOTTOM))
5035 return true;
5036 else if ((vout_type == VOUT_TYPE_BOT_FIELD) &&
5037 ((vf->type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP))
5038 return true;
5039
5040 return false;
5041}
5042#endif
5043
5044static int calc_hold_line(void)
5045{
5046 if ((READ_VCBUS_REG(ENCI_VIDEO_EN) & 1) == 0)
5047 return READ_VCBUS_REG(ENCP_VIDEO_VAVON_BLINE) >> 1;
5048 else
5049 return READ_VCBUS_REG(ENCP_VFIFO2VD_LINE_TOP_START) >> 1;
5050}
5051
5052/* add a new function to check if current display frame has been*/
5053/*displayed for its duration */
5054static inline bool duration_expire(struct vframe_s *cur_vf,
5055 struct vframe_s *next_vf, u32 dur)
5056{
5057 u32 pts;
5058 s32 dur_disp;
5059 static s32 rpt_tab_idx;
5060 static const u32 rpt_tab[4] = { 0x100, 0x100, 0x300, 0x300 };
5061
5062 /* do not switch to new frames in none-normal speed */
5063 if (vsync_slow_factor > 1000)
5064 return false;
5065
5066 if ((cur_vf == NULL) || (cur_dispbuf == &vf_local))
5067 return true;
5068
5069 pts = next_vf->pts;
5070 if (pts == 0)
5071 dur_disp = DUR2PTS(cur_vf->duration);
5072 else
5073 dur_disp = pts - timestamp_vpts_get();
5074
5075 if ((dur << 8) >= (dur_disp * rpt_tab[rpt_tab_idx & 3])) {
5076 rpt_tab_idx = (rpt_tab_idx + 1) & 3;
5077 return true;
5078 } else
5079 return false;
5080}
5081
5082#define VPTS_RESET_THRO
5083
5084#ifdef PTS_LOGGING
5085static inline void vpts_perform_pulldown(struct vframe_s *next_vf,
5086 bool *expired)
5087{
5088 int pattern_range, expected_curr_interval;
5089 int expected_prev_interval;
5090
5091 /* Dont do anything if we have invalid data */
5092 if (!next_vf || !next_vf->pts || !next_vf->next_vf_pts_valid)
5093 return;
5094
5095 switch (pts_pattern_detected) {
5096 case PTS_32_PATTERN:
5097 pattern_range = PTS_32_PATTERN_DETECT_RANGE;
5098 switch (pre_pts_trace) {
5099 case 3:
5100 expected_prev_interval = 3;
5101 expected_curr_interval = 2;
5102 break;
5103 case 2:
5104 expected_prev_interval = 2;
5105 expected_curr_interval = 3;
5106 break;
5107 default:
5108 return;
5109 }
5110 break;
5111 case PTS_22_PATTERN:
5112 if (pre_pts_trace != 2)
5113 return;
5114 pattern_range = PTS_22_PATTERN_DETECT_RANGE;
5115 expected_prev_interval = 2;
5116 expected_curr_interval = 2;
5117 break;
5118 case PTS_41_PATTERN:
5119 /* TODO */
5120 default:
5121 return;
5122 }
5123
5124 /* We do nothing if we dont have enough data*/
5125 if (pts_pattern[pts_pattern_detected] != pattern_range)
5126 return;
5127
5128 if (*expired) {
5129 if (pts_trace < expected_curr_interval) {
5130 /* 2323232323..2233..2323, prev=2, curr=3,*/
5131 /* check if next frame will toggle after 3 vsyncs */
5132 /* 22222...22222 -> 222..2213(2)22...22 */
5133 /* check if next frame will toggle after 3 vsyncs */
5134 int nextPts = timestamp_pcrscr_get() + vsync_pts_align;
5135
5136 if (/*((int)(nextPts + expected_prev_interval * */
5137 /*vsync_pts_inc - next_vf->next_vf_pts) < 0) && */
5138 ((int)(nextPts + (expected_prev_interval + 1) *
5139 vsync_pts_inc - next_vf->next_vf_pts) >= 0)) {
5140 *expired = false;
5141 if (pts_log_enable[PTS_32_PATTERN]
5142 || pts_log_enable[PTS_22_PATTERN])
5143 pr_info("hold frame for pattern: %d",
5144 pts_pattern_detected);
5145 }
5146
5147 /* here need to escape a vsync */
5148 if (timestamp_pcrscr_get() >
5149 (next_vf->pts + vsync_pts_inc)) {
5150 *expired = true;
5151 pts_escape_vsync = 1;
5152 if (pts_log_enable[PTS_32_PATTERN]
5153 || pts_log_enable[PTS_22_PATTERN])
5154 pr_info("escape a vsync pattern: %d",
5155 pts_pattern_detected);
5156 }
5157 }
5158 } else {
5159 if (pts_trace == expected_curr_interval) {
5160 /* 23232323..233223...2323 curr=2, prev=3 */
5161 /* check if this frame will expire next vsyncs and */
5162 /* next frame will expire after 3 vsyncs */
5163 /* 22222...22222 -> 222..223122...22 */
5164 /* check if this frame will expire next vsyncs and */
5165 /* next frame will expire after 2 vsyncs */
5166 int nextPts = timestamp_pcrscr_get() + vsync_pts_align;
5167
5168 if (((int)(nextPts + vsync_pts_inc - next_vf->pts)
5169 >= 0) &&
5170 ((int)(nextPts +
5171 vsync_pts_inc * (expected_prev_interval - 1)
5172 - next_vf->next_vf_pts) < 0) &&
5173 ((int)(nextPts + expected_prev_interval *
5174 vsync_pts_inc - next_vf->next_vf_pts) >= 0)) {
5175 *expired = true;
5176 if (pts_log_enable[PTS_32_PATTERN]
5177 || pts_log_enable[PTS_22_PATTERN])
5178 pr_info("pull frame for pattern: %d",
5179 pts_pattern_detected);
5180 }
5181 }
5182 }
5183}
5184#endif
5185
5186static inline bool vpts_expire(struct vframe_s *cur_vf,
5187 struct vframe_s *next_vf,
5188 int toggled_cnt)
5189{
5190 u32 pts;
5191#ifdef VIDEO_PTS_CHASE
5192 u32 vid_pts, scr_pts;
5193#endif
5194 u32 systime;
5195 u32 adjust_pts, org_vpts;
5196 bool expired;
5197
5198 if (next_vf == NULL)
5199 return false;
5200
5201 if (videopeek) {
5202 videopeek = false;
5203 pr_info("video peek toogle the first frame\n");
5204 return true;
5205 }
5206
5207 if (debug_flag & DEBUG_FLAG_TOGGLE_FRAME_PER_VSYNC)
5208 return true;
5209 if (/*(cur_vf == NULL) || (cur_dispbuf == &vf_local) ||*/ debugflags &
5210 DEBUG_FLAG_FFPLAY)
5211 return true;
5212
5213 if ((freerun_mode == FREERUN_NODUR) || hdmi_in_onvideo)
5214 return true;
5215 /*freerun for game mode*/
5216 if (next_vf->flag & VFRAME_FLAG_GAME_MODE)
5217 return true;
5218
5219 if (step_enable) {
5220 if (step_flag)
5221 return false;
5222 if (!step_flag) {
5223 step_flag = 1;
5224 return true;
5225 }
5226 }
5227
5228 if ((trickmode_i == 1) || ((trickmode_fffb == 1))) {
5229 if (((atomic_read(&trickmode_framedone) == 0)
5230 || (trickmode_i == 1)) && (!to_notify_trick_wait)
5231 && (trickmode_duration_count <= 0)) {
5232#if 0
5233 if (cur_vf)
5234 pts = timestamp_vpts_get() +
5235 trickmode_duration;
5236 else
5237 return true;
5238#else
5239 return true;
5240#endif
5241 } else
5242 return false;
5243 }
5244 if (omx_secret_mode && (!omx_run || !omx_drop_done))
5245 return false;
5246
5247 if (next_vf->duration == 0)
5248
5249 return true;
5250
5251 systime = timestamp_pcrscr_get();
5252 pts = next_vf->pts;
5253
5254 if (((pts == 0) && (cur_dispbuf != &vf_local))
5255 || (freerun_mode == FREERUN_DUR)) {
5256 pts =
5257 timestamp_vpts_get() +
5258 (cur_vf ? DUR2PTS(cur_vf->duration) : 0);
5259 }
5260 /* check video PTS discontinuity */
5261 else if ((enable_video_discontinue_report) &&
5262 (first_frame_toggled) &&
5263 (abs(systime - pts) > tsync_vpts_discontinuity_margin()) &&
5264 ((next_vf->flag & VFRAME_FLAG_NO_DISCONTINUE) == 0)) {
5265 /*
5266 * if paused ignore discontinue
5267 */
5268 if (!timestamp_pcrscr_enable_state()) {
5269 /*pr_info("video pts discontinue,
5270 * but pcrscr is disabled,
5271 * return false\n");
5272 */
5273 return false;
5274 }
5275 pts =
5276 timestamp_vpts_get() +
5277 (cur_vf ? DUR2PTS(cur_vf->duration) : 0);
5278 /* pr_info("system=0x%x vpts=0x%x\n", systime,*/
5279 /*timestamp_vpts_get()); */
5280 if ((int)(systime - pts) >= 0) {
5281 if (next_vf->pts != 0)
5282 tsync_avevent_locked(VIDEO_TSTAMP_DISCONTINUITY,
5283 next_vf->pts);
5284 else if (next_vf->pts == 0 &&
5285 (tsync_get_mode() != TSYNC_MODE_PCRMASTER))
5286 tsync_avevent_locked(VIDEO_TSTAMP_DISCONTINUITY,
5287 pts);
5288
5289 /* pr_info("discontinue,
5290 * systime=0x%x vpts=0x%x next_vf->pts = 0x%x\n",
5291 * systime,
5292 * pts,
5293 * next_vf->pts);
5294 */
5295
5296 /* pts==0 is a keep frame maybe. */
5297 if (systime > next_vf->pts || next_vf->pts == 0)
5298 return true;
5299 if (omx_secret_mode == true)
5300 return true;
5301
5302 return false;
5303 } else if (omx_secret_mode == true)
5304 return true;
5305 } else if (omx_run
5306 && omx_secret_mode
5307 && (omx_pts + omx_pts_interval_upper < next_vf->pts)
5308 && (abs(omx_pts_set_index - next_vf->omx_index) <= 16)
5309 && (omx_pts_set_index >= next_vf->omx_index)) {
5310 pr_info("omx, omx_pts=%d omx_pts_set_index=%d pts=%d omx_index=%d\n",
5311 omx_pts,
5312 omx_pts_set_index,
5313 next_vf->pts,
5314 next_vf->omx_index);
5315 return true;
5316 }
5317#if 1
5318 if (vsync_pts_inc_upint && (!freerun_mode)) {
5319 struct vframe_states frame_states;
5320 u32 delayed_ms, t1, t2;
5321
5322 delayed_ms =
5323 calculation_stream_delayed_ms(PTS_TYPE_VIDEO, &t1, &t2);
5324 if (video_vf_get_states(&frame_states) == 0) {
5325 u32 pcr = timestamp_pcrscr_get();
5326 u32 vpts = timestamp_vpts_get();
5327 u32 diff = pcr - vpts;
5328
5329 if (delayed_ms > 200) {
5330 vsync_freerun++;
5331 if (pcr < next_vf->pts
5332 || pcr < vpts + next_vf->duration) {
5333 if (next_vf->pts > 0) {
5334 timestamp_pcrscr_set
5335 (next_vf->pts);
5336 } else {
5337 timestamp_pcrscr_set(vpts +
5338 next_vf->duration);
5339 }
5340 }
5341 return true;
5342 } else if ((frame_states.buf_avail_num >= 3)
5343 && diff < vsync_pts_inc << 2) {
5344 vsync_pts_inc_adj =
5345 vsync_pts_inc + (vsync_pts_inc >> 2);
5346 vsync_pts_125++;
5347 } else if ((frame_states.buf_avail_num >= 2
5348 && diff < vsync_pts_inc << 1)) {
5349 vsync_pts_inc_adj =
5350 vsync_pts_inc + (vsync_pts_inc >> 3);
5351 vsync_pts_112++;
5352 } else if (frame_states.buf_avail_num >= 1
5353 && diff < vsync_pts_inc - 20) {
5354 vsync_pts_inc_adj = vsync_pts_inc + 10;
5355 vsync_pts_101++;
5356 } else {
5357 vsync_pts_inc_adj = 0;
5358 vsync_pts_100++;
5359 }
5360 }
5361 }
5362#endif
5363
5364#ifdef VIDEO_PTS_CHASE
5365 vid_pts = timestamp_vpts_get();
5366 scr_pts = timestamp_pcrscr_get();
5367 vid_pts += vsync_pts_inc;
5368
5369 if (av_sync_flag) {
5370 if (vpts_chase) {
5371 if ((abs(vid_pts - scr_pts) < 6000)
5372 || (abs(vid_pts - scr_pts) > 90000)) {
5373 vpts_chase = 0;
5374 pr_info("leave vpts chase mode, diff:%d\n",
5375 vid_pts - scr_pts);
5376 }
5377 } else if ((abs(vid_pts - scr_pts) > 9000)
5378 && (abs(vid_pts - scr_pts) < 90000)) {
5379 vpts_chase = 1;
5380 if (vid_pts < scr_pts)
5381 vpts_chase_pts_diff = 50;
5382 else
5383 vpts_chase_pts_diff = -50;
5384 vpts_chase_counter =
5385 ((int)(scr_pts - vid_pts)) / vpts_chase_pts_diff;
5386 pr_info("enter vpts chase mode, diff:%d\n",
5387 vid_pts - scr_pts);
5388 } else if (abs(vid_pts - scr_pts) >= 90000) {
5389 pr_info("video pts discontinue, diff:%d\n",
5390 vid_pts - scr_pts);
5391 }
5392 } else
5393 vpts_chase = 0;
5394
5395 if (vpts_chase) {
5396 u32 curr_pts =
5397 scr_pts - vpts_chase_pts_diff * vpts_chase_counter;
5398
5399 /* pr_info("vchase pts %d, %d, %d, %d, %d\n",*/
5400 /*curr_pts, scr_pts, curr_pts-scr_pts, vid_pts, vpts_chase_counter); */
5401 return ((int)(curr_pts - pts)) >= 0;
5402 } else {
5403 int aud_start = (timestamp_apts_get() != -1);
5404
5405 if (!av_sync_flag && aud_start && (abs(scr_pts - pts) < 9000)
5406 && ((int)(scr_pts - pts) < 0)) {
5407 av_sync_flag = 1;
5408 pr_info("av sync ok\n");
5409 }
5410 return ((int)(scr_pts - pts)) >= 0;
5411 }
5412#else
5413 if (smooth_sync_enable) {
5414 org_vpts = timestamp_vpts_get();
5415 if ((abs(org_vpts + vsync_pts_inc - systime) <
5416 M_PTS_SMOOTH_MAX)
5417 && (abs(org_vpts + vsync_pts_inc - systime) >
5418 M_PTS_SMOOTH_MIN)) {
5419
5420 if (!video_frame_repeat_count) {
5421 vpts_ref = org_vpts;
5422 video_frame_repeat_count++;
5423 }
5424
5425 if ((int)(org_vpts + vsync_pts_inc - systime) > 0) {
5426 adjust_pts =
5427 vpts_ref + (vsync_pts_inc -
5428 M_PTS_SMOOTH_ADJUST) *
5429 video_frame_repeat_count;
5430 } else {
5431 adjust_pts =
5432 vpts_ref + (vsync_pts_inc +
5433 M_PTS_SMOOTH_ADJUST) *
5434 video_frame_repeat_count;
5435 }
5436
5437 return (int)(adjust_pts - pts) >= 0;
5438 }
5439
5440 if (video_frame_repeat_count) {
5441 vpts_ref = 0;
5442 video_frame_repeat_count = 0;
5443 }
5444 }
5445
5446 expired = (int)(timestamp_pcrscr_get() + vsync_pts_align - pts) >= 0;
5447
5448#ifdef PTS_THROTTLE
5449 if (expired && next_vf && next_vf->next_vf_pts_valid &&
5450 (vsync_slow_factor == 1) &&
5451 next_vf->next_vf_pts &&
5452 (toggled_cnt > 0) &&
5453 ((int)(timestamp_pcrscr_get() + vsync_pts_inc +
5454 vsync_pts_align - next_vf->next_vf_pts) < 0)) {
5455 expired = false;
5456 } else if (!expired && next_vf && next_vf->next_vf_pts_valid &&
5457 (vsync_slow_factor == 1) &&
5458 next_vf->next_vf_pts &&
5459 (toggled_cnt == 0) &&
5460 ((int)(timestamp_pcrscr_get() + vsync_pts_inc +
5461 vsync_pts_align - next_vf->next_vf_pts) >= 0)) {
5462 expired = true;
5463 }
5464#endif
5465
5466#ifdef PTS_LOGGING
5467 if (pts_enforce_pulldown) {
5468 /* Perform Pulldown if needed*/
5469 vpts_perform_pulldown(next_vf, &expired);
5470 }
5471#endif
5472 return expired;
5473#endif
5474}
5475
5476static void vsync_notify(void)
5477{
5478 if (video_notify_flag & VIDEO_NOTIFY_TRICK_WAIT) {
5479 wake_up_interruptible(&amvideo_trick_wait);
5480 video_notify_flag &= ~VIDEO_NOTIFY_TRICK_WAIT;
5481 }
5482 if (video_notify_flag & VIDEO_NOTIFY_FRAME_WAIT) {
5483 video_notify_flag &= ~VIDEO_NOTIFY_FRAME_WAIT;
5484 vf_notify_provider(RECEIVER_NAME,
5485 VFRAME_EVENT_RECEIVER_FRAME_WAIT, NULL);
5486 }
5487#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
5488 if (video_notify_flag & VIDEO_NOTIFY_POS_CHANGED) {
5489 video_notify_flag &= ~VIDEO_NOTIFY_POS_CHANGED;
5490 vf_notify_provider(RECEIVER_NAME,
5491 VFRAME_EVENT_RECEIVER_POS_CHANGED, NULL);
5492 }
5493#endif
5494 if (video_notify_flag &
5495 (VIDEO_NOTIFY_PROVIDER_GET | VIDEO_NOTIFY_PROVIDER_PUT)) {
5496 int event = 0;
5497
5498 if (video_notify_flag & VIDEO_NOTIFY_PROVIDER_GET)
5499 event |= VFRAME_EVENT_RECEIVER_GET;
5500 if (video_notify_flag & VIDEO_NOTIFY_PROVIDER_PUT)
5501 event |= VFRAME_EVENT_RECEIVER_PUT;
5502
5503 vf_notify_provider(RECEIVER_NAME, event, NULL);
5504
5505 video_notify_flag &=
5506 ~(VIDEO_NOTIFY_PROVIDER_GET | VIDEO_NOTIFY_PROVIDER_PUT);
5507 }
5508#ifdef CONFIG_CLK81_DFS
5509 check_and_set_clk81();
5510#endif
5511
5512#ifdef CONFIG_GAMMA_PROC
5513 gamma_adjust();
5514#endif
5515
5516}
5517
5518#ifdef FIQ_VSYNC
5519static irqreturn_t vsync_bridge_isr(int irq, void *dev_id)
5520{
5521 vsync_notify();
5522
5523 return IRQ_HANDLED;
5524}
5525#endif
5526
5527int get_vsync_count(unsigned char reset)
5528{
5529 if (reset)
5530 vsync_count = 0;
5531 return vsync_count;
5532}
5533EXPORT_SYMBOL(get_vsync_count);
5534
5535int get_vsync_pts_inc_mode(void)
5536{
5537 return vsync_pts_inc_upint;
5538}
5539EXPORT_SYMBOL(get_vsync_pts_inc_mode);
5540
5541void set_vsync_pts_inc_mode(int inc)
5542{
5543 vsync_pts_inc_upint = inc;
5544}
5545EXPORT_SYMBOL(set_vsync_pts_inc_mode);
5546
5547#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
5548void vsync_rdma_process(void)
5549{
5550 vsync_rdma_config();
5551}
5552#endif
5553
5554/* #ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2 */
5555static enum vmode_e old_vmode = VMODE_MAX;
5556/* #endif */
5557static enum vmode_e new_vmode = VMODE_MAX;
5558static inline bool video_vf_disp_mode_check(struct vframe_s *vf)
5559{
5560 struct provider_disp_mode_req_s req;
5561 int ret = -1;
5562 req.vf = vf;
5563 req.disp_mode = 0;
5564 req.req_mode = 1;
5565
5566 if (is_dolby_vision_enable()) {
5567 ret = vf_notify_provider_by_name("dv_vdin",
5568 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5569 if (ret == -1)
5570 vf_notify_provider_by_name("vdin0",
5571 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5572 } else
5573 vf_notify_provider_by_name("vdin0",
5574 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5575 if (req.disp_mode == VFRAME_DISP_MODE_OK)
5576 return false;
5577 /*whether need to check pts??*/
5578 video_vf_put(vf);
5579 return true;
5580}
5581static enum vframe_disp_mode_e video_vf_disp_mode_get(struct vframe_s *vf)
5582{
5583 struct provider_disp_mode_req_s req;
5584 int ret = -1;
5585 req.vf = vf;
5586 req.disp_mode = 0;
5587 req.req_mode = 0;
5588
5589 if (is_dolby_vision_enable()) {
5590 ret = vf_notify_provider_by_name("dv_vdin",
5591 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5592 if (ret == -1)
5593 vf_notify_provider_by_name("vdin0",
5594 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5595 } else
5596 vf_notify_provider_by_name("vdin0",
5597 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5598 return req.disp_mode;
5599}
5600static inline bool video_vf_dirty_put(struct vframe_s *vf)
5601{
5602 if (!vf->frame_dirty)
5603 return false;
5604 if (cur_dispbuf != vf) {
5605 if (vf->pts != 0) {
5606 amlog_mask(LOG_MASK_TIMESTAMP,
5607 "vpts to vf->pts:0x%x,scr:0x%x,abs_scr: 0x%x\n",
5608 vf->pts, timestamp_pcrscr_get(),
5609 READ_MPEG_REG(SCR_HIU));
5610 timestamp_vpts_set(vf->pts);
5611 } else if (cur_dispbuf) {
5612 amlog_mask(LOG_MASK_TIMESTAMP,
5613 "vpts inc:0x%x,scr: 0x%x, abs_scr: 0x%x\n",
5614 timestamp_vpts_get() +
5615 DUR2PTS(cur_dispbuf->duration),
5616 timestamp_pcrscr_get(),
5617 READ_MPEG_REG(SCR_HIU));
5618 timestamp_vpts_inc(
5619 DUR2PTS(cur_dispbuf->duration));
5620
5621 vpts_remainder +=
5622 DUR2PTS_RM(cur_dispbuf->duration);
5623 if (vpts_remainder >= 0xf) {
5624 vpts_remainder -= 0xf;
5625 timestamp_vpts_inc(-1);
5626 }
5627 }
5628 }
5629 video_vf_put(vf);
5630 return true;
5631
5632}
5633#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
5634struct vframe_s *dolby_vision_toggle_frame(struct vframe_s *vf)
5635{
5636 struct vframe_s *toggle_vf = NULL;
5637 int width_bl, width_el;
5638 int height_bl, height_el;
5639 int ret = dolby_vision_update_metadata(vf);
5640
5641 cur_dispbuf2 = dolby_vision_vf_peek_el(vf);
5642 if (cur_dispbuf2) {
5643 if (cur_dispbuf2->type & VIDTYPE_COMPRESS) {
5644 VSYNC_WR_MPEG_REG(VD2_AFBC_HEAD_BADDR,
5645 cur_dispbuf2->compHeadAddr>>4);
5646 VSYNC_WR_MPEG_REG(VD2_AFBC_BODY_BADDR,
5647 cur_dispbuf2->compBodyAddr>>4);
5648 } else {
5649 vframe_canvas_set(&cur_dispbuf2->canvas0_config[0],
5650 cur_dispbuf2->plane_num,
5651 &disp_canvas_index[rdma_canvas_id][3]);
5652 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS0 + cur_dev->viu_off,
5653 disp_canvas[rdma_canvas_id][1]);
5654 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 + cur_dev->viu_off,
5655 disp_canvas[rdma_canvas_id][1]);
5656 }
5657
5658 width_el = (cur_dispbuf2->type
5659 & VIDTYPE_COMPRESS) ?
5660 cur_dispbuf2->compWidth :
5661 cur_dispbuf2->width;
5662 if (!(cur_dispbuf2->type & VIDTYPE_VD2)) {
5663 width_bl = (vf->type
5664 & VIDTYPE_COMPRESS) ?
5665 vf->compWidth :
5666 vf->width;
5667 if (width_el >= width_bl)
5668 width_el = width_bl;
5669 else if (width_el != width_bl / 2)
5670 width_el = width_bl / 2;
5671 }
5672 ori2_start_x_lines = 0;
5673 ori2_end_x_lines =
5674 width_el - 1;
5675
5676 height_el = (cur_dispbuf2->type
5677 & VIDTYPE_COMPRESS) ?
5678 cur_dispbuf2->compHeight :
5679 cur_dispbuf2->height;
5680 if (!(cur_dispbuf2->type & VIDTYPE_VD2)) {
5681 height_bl = (vf->type
5682 & VIDTYPE_COMPRESS) ?
5683 vf->compHeight :
5684 vf->height;
5685 if (height_el >= height_bl)
5686 height_el = height_bl;
5687 else if (height_el != height_bl / 2)
5688 height_el = height_bl / 2;
5689 }
5690 ori2_start_y_lines = 0;
5691 ori2_end_y_lines =
5692 height_el - 1;
5693 }
5694 if (ret == 0) {
5695 /* setting generated for this frame */
5696 /* or DOVI in bypass mode */
5697 toggle_vf = vf;
5698 dolby_vision_set_toggle_flag(1);
5699 } else {
5700 /* fail generating setting for this frame */
5701 toggle_vf = NULL;
5702 dolby_vision_set_toggle_flag(0);
5703 }
5704 return toggle_vf;
5705}
5706
5707static int dolby_vision_need_wait(void)
5708{
5709 struct vframe_s *vf;
5710
5711 vf = video_vf_peek();
5712 if (!vf || (dolby_vision_wait_metadata(vf) == 1))
5713 return 1;
5714 return 0;
5715}
5716#endif
5717/* patch for 4k2k bandwidth issue, skiw mali and vpu mif */
5718static void dmc_adjust_for_mali_vpu(unsigned int width,
5719 unsigned int height, bool force_adjust)
5720{
5721 if (toggle_count == last_toggle_count)
5722 toggle_same_count++;
5723 else {
5724 last_toggle_count = toggle_count;
5725 toggle_same_count = 0;
5726 }
5727 /*avoid 3840x2160 crop*/
5728 if ((width >= 2000) && (height >= 1400) &&
5729 (((dmc_config_state != 1) && (toggle_same_count < 30))
5730 || force_adjust)) {
5731 if (0) {/* if (is_dolby_vision_enable()) { */
5732 /* vpu dmc */
5733 WRITE_DMCREG(
5734 DMC_AM0_CHAN_CTRL,
5735 0x85f403f4);
5736 WRITE_DMCREG(
5737 DMC_AM1_CHAN_CTRL,
5738 0x85f403f4);
5739 WRITE_DMCREG(
5740 DMC_AM2_CHAN_CTRL,
5741 0x85f403f4);
5742
5743 /* mali dmc */
5744 WRITE_DMCREG(
5745 DMC_AXI1_CHAN_CTRL,
5746 0xff10ff4);
5747 WRITE_DMCREG(
5748 DMC_AXI2_CHAN_CTRL,
5749 0xff10ff4);
5750 WRITE_DMCREG(
5751 DMC_AXI1_HOLD_CTRL,
5752 0x08040804);
5753 WRITE_DMCREG(
5754 DMC_AXI2_HOLD_CTRL,
5755 0x08040804);
5756 } else {
5757 /* vpu dmc */
5758 WRITE_DMCREG(
5759 DMC_AM1_CHAN_CTRL,
5760 0x43028);
5761 WRITE_DMCREG(
5762 DMC_AM1_HOLD_CTRL,
5763 0x18101818);
5764 WRITE_DMCREG(
5765 DMC_AM3_CHAN_CTRL,
5766 0x85f403f4);
5767 WRITE_DMCREG(
5768 DMC_AM4_CHAN_CTRL,
5769 0x85f403f4);
5770 /* mali dmc */
5771 WRITE_DMCREG(
5772 DMC_AXI1_HOLD_CTRL,
5773 0x10080804);
5774 WRITE_DMCREG(
5775 DMC_AXI2_HOLD_CTRL,
5776 0x10080804);
5777 }
5778 dmc_config_state = 1;
5779 } else if (((toggle_same_count >= 30) ||
5780 ((width < 2000) && (height < 1400))) &&
5781 (dmc_config_state != 2)) {
5782 /* vpu dmc */
5783 WRITE_DMCREG(
5784 DMC_AM0_CHAN_CTRL,
5785 0x8FF003C4);
5786 WRITE_DMCREG(
5787 DMC_AM1_CHAN_CTRL,
5788 0x3028);
5789 WRITE_DMCREG(
5790 DMC_AM1_HOLD_CTRL,
5791 0x18101810);
5792 WRITE_DMCREG(
5793 DMC_AM2_CHAN_CTRL,
5794 0x8FF003C4);
5795 WRITE_DMCREG(
5796 DMC_AM2_HOLD_CTRL,
5797 0x3028);
5798 WRITE_DMCREG(
5799 DMC_AM3_CHAN_CTRL,
5800 0x85f003f4);
5801 WRITE_DMCREG(
5802 DMC_AM4_CHAN_CTRL,
5803 0x85f003f4);
5804
5805 /* mali dmc */
5806 WRITE_DMCREG(
5807 DMC_AXI1_CHAN_CTRL,
5808 0x8FF00FF4);
5809 WRITE_DMCREG(
5810 DMC_AXI2_CHAN_CTRL,
5811 0x8FF00FF4);
5812 WRITE_DMCREG(
5813 DMC_AXI1_HOLD_CTRL,
5814 0x18101810);
5815 WRITE_DMCREG(
5816 DMC_AXI2_HOLD_CTRL,
5817 0x18101810);
5818 toggle_same_count = 30;
5819 dmc_config_state = 2;
5820 }
5821}
5822
5823static bool is_sc_enable_before_pps(struct vpp_frame_par_s *par)
5824{
5825 bool ret = false;
5826
5827 if (par) {
5828 if (par->supsc0_enable &&
5829 ((par->supscl_path == CORE0_PPS_CORE1)
5830 || (par->supscl_path == CORE0_BEFORE_PPS)))
5831 ret = true;
5832 else if (par->supsc1_enable &&
5833 (par->supscl_path == CORE1_BEFORE_PPS))
5834 ret = true;
5835 else if ((par->supsc0_enable || par->supsc1_enable)
5836 && (par->supscl_path == CORE0_CORE1_PPS))
5837 ret = true;
5838 }
5839 return ret;
5840}
5841
5842void correct_vd1_mif_size_for_DV(struct vpp_frame_par_s *par)
5843{
5844 u32 aligned_mask = 0xfffffffe;
5845 u32 old_len;
5846 if ((is_dolby_vision_on() == true)
5847 && (par->VPP_line_in_length_ > 0)
5848 && !is_sc_enable_before_pps(par)) {
5849 /* work around to skip the size check when sc enable */
5850 if (cur_dispbuf2) {
5851 /*
5852 *if (cur_dispbuf2->type
5853 * & VIDTYPE_COMPRESS)
5854 * aligned_mask = 0xffffffc0;
5855 *else
5856 */
5857 aligned_mask = 0xfffffffc;
5858 }
5859#if 0 /* def TV_REVERSE */
5860 if (reverse) {
5861 par->VPP_line_in_length_
5862 &= 0xfffffffe;
5863 par->VPP_hd_end_lines_
5864 &= 0xfffffffe;
5865 par->VPP_hd_start_lines_ =
5866 par->VPP_hd_end_lines_ + 1
5867 - par->VPP_line_in_length_;
5868 } else
5869#endif
5870 {
5871 par->VPP_line_in_length_
5872 &= aligned_mask;
5873 par->VPP_hd_start_lines_
5874 &= aligned_mask;
5875 par->VPP_hd_end_lines_ =
5876 par->VPP_hd_start_lines_ +
5877 par->VPP_line_in_length_ - 1;
5878 /* if have el layer, need 2 pixel align by height */
5879 if (cur_dispbuf2) {
5880 old_len =
5881 par->VPP_vd_end_lines_ -
5882 par->VPP_vd_start_lines_ + 1;
5883 if (old_len & 1)
5884 par->VPP_vd_end_lines_--;
5885 if (par->VPP_vd_start_lines_ & 1) {
5886 par->VPP_vd_start_lines_--;
5887 par->VPP_vd_end_lines_--;
5888 }
5889 old_len =
5890 par->VPP_vd_end_lines_ -
5891 par->VPP_vd_start_lines_ + 1;
5892 old_len = old_len >> par->vscale_skip_count;
5893 if (par->VPP_pic_in_height_ < old_len)
5894 par->VPP_pic_in_height_ = old_len;
5895 }
5896 }
5897 }
5898}
5899
5900void correct_vd2_mif_size_for_DV(
5901 struct vpp_frame_par_s *par,
5902 struct vframe_s *bl_vf)
5903{
5904 int width_bl, width_el, line_in_length;
5905 int shift;
5906 if ((is_dolby_vision_on() == true)
5907 && (par->VPP_line_in_length_ > 0)
5908 && !is_sc_enable_before_pps(par)) {
5909 /* work around to skip the size check when sc enable */
5910 width_el = (cur_dispbuf2->type
5911 & VIDTYPE_COMPRESS) ?
5912 cur_dispbuf2->compWidth :
5913 cur_dispbuf2->width;
5914 width_bl = (bl_vf->type
5915 & VIDTYPE_COMPRESS) ?
5916 bl_vf->compWidth :
5917 bl_vf->width;
5918 if (width_el >= width_bl)
5919 shift = 0;
5920 else
5921 shift = 1;
5922 zoom2_start_x_lines =
5923 par->VPP_hd_start_lines_ >> shift;
5924 line_in_length =
5925 par->VPP_line_in_length_ >> shift;
5926 zoom2_end_x_lines
5927 &= 0xfffffffe;
5928 line_in_length
5929 &= 0xfffffffe;
5930 if (line_in_length > 1)
5931 zoom2_end_x_lines =
5932 zoom2_start_x_lines +
5933 line_in_length - 1;
5934 else
5935 zoom2_end_x_lines = zoom2_start_x_lines;
5936
5937 zoom2_start_y_lines =
5938 par->VPP_vd_start_lines_ >> shift;
5939 if (zoom2_start_y_lines >= zoom2_end_y_lines)
5940 zoom2_end_y_lines = zoom2_start_y_lines;
5941 /* TODO: if el len is 0, need disable bl */
5942 }
5943}
5944#if ENABLE_UPDATE_HDR_FROM_USER
5945void set_hdr_to_frame(struct vframe_s *vf)
5946{
5947 unsigned long flags;
5948
5949 spin_lock_irqsave(&omx_hdr_lock, flags);
5950
5951 if (has_hdr_info) {
5952 vf->prop.master_display_colour = vf_hdr;
5953
5954 //config static signal_type for vp9
5955 vf->signal_type = (1 << 29)
5956 | (5 << 26) /* unspecified */
5957 | (0 << 25) /* limit */
5958 | (1 << 24) /* color available */
5959 | (9 << 16) /* 2020 */
5960 | (16 << 8) /* 2084 */
5961 | (9 << 0); /* 2020 */
5962
5963 //pr_info("set_hdr_to_frame %d, signal_type 0x%x",
5964 //vf->prop.master_display_colour.present_flag,vf->signal_type);
5965 }
5966 spin_unlock_irqrestore(&omx_hdr_lock, flags);
5967}
5968#endif
5969
5970static int vpp_zorder_check(void)
5971{
5972 int force_flush = 0;
5973 u32 layer0_sel = 0; /* vd1 */
5974 u32 layer1_sel = 1; /* vd2 */
5975
5976 if (legacy_vpp)
5977 return 0;
5978
5979 if (glayer_info[1].zorder < glayer_info[0].zorder) {
5980 layer0_sel = 1;
5981 layer1_sel = 0;
5982 if ((glayer_info[0].zorder >= reference_zorder)
5983 && (glayer_info[1].zorder < reference_zorder))
5984 layer0_sel++;
5985 } else {
5986 layer0_sel = 0;
5987 layer1_sel = 1;
5988 if ((glayer_info[1].zorder >= reference_zorder)
5989 && (glayer_info[0].zorder < reference_zorder))
5990 layer1_sel++;
5991 }
5992
5993 glayer_info[0].cur_sel_port = layer0_sel;
5994 glayer_info[1].cur_sel_port = layer1_sel;
5995
5996 if ((glayer_info[0].cur_sel_port !=
5997 glayer_info[0].last_sel_port) ||
5998 (glayer_info[1].cur_sel_port !=
5999 glayer_info[1].last_sel_port)) {
6000 force_flush = 1;
6001 glayer_info[0].last_sel_port =
6002 glayer_info[0].cur_sel_port;
6003 glayer_info[1].last_sel_port =
6004 glayer_info[1].cur_sel_port;
6005 }
6006 return force_flush;
6007}
6008
6009#ifdef TV_3D_FUNCTION_OPEN
6010inline void switch_3dView_per_vsync(void)
6011{
6012 u32 start_aligned, end_aligned, block_len;
6013 u32 FA_enable = process_3d_type & MODE_3D_OUT_FA_MASK;
6014
6015 if (FA_enable && (toggle_3d_fa_frame == OUT_FA_A_FRAME)) {
6016 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6017 cur_dev->vpp_off, 1, 14, 1);
6018 /* VPP_VD1_PREBLEND disable */
6019 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6020 cur_dev->vpp_off, 1, 10, 1);
6021 /* VPP_VD1_POSTBLEND disable */
6022 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6023 cur_dev->viu_off, 0x4000000);
6024 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6025 cur_dev->viu_off, 0x4000000);
6026 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6027 cur_dev->viu_off, 0x4000000);
6028 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6029 cur_dev->viu_off, 0x4000000);
6030 if (cur_dispbuf->type & VIDTYPE_COMPRESS) {
6031 if ((process_3d_type & MODE_FORCE_3D_FA_LR)
6032 && (cur_frame_par->vpp_3d_mode == 1)) {
6033 start_aligned = ori_start_x_lines;
6034 end_aligned = ori_end_x_lines + 1;
6035 block_len =
6036 (end_aligned - start_aligned) / 2;
6037 block_len = block_len /
6038 (cur_frame_par->hscale_skip_count + 1);
6039 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
6040 (start_aligned << 16) |
6041 (start_aligned + block_len - 1));
6042 }
6043 if ((process_3d_type & MODE_FORCE_3D_FA_TB)
6044 && (cur_frame_par->vpp_3d_mode == 2)) {
6045 start_aligned =
6046 round_down(ori_start_y_lines, 4);
6047 end_aligned =
6048 round_up(ori_end_y_lines + 1, 4);
6049 block_len = end_aligned - start_aligned;
6050 block_len = block_len / 8;
6051 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
6052 ((start_aligned / 4) << 16) |
6053 ((start_aligned / 4) + block_len - 1));
6054 }
6055 }
6056 } else if (FA_enable &&
6057 (toggle_3d_fa_frame == OUT_FA_B_FRAME)) {
6058 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6059 cur_dev->vpp_off, 1, 14, 1);
6060 /* VPP_VD1_PREBLEND disable */
6061 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6062 cur_dev->vpp_off, 1, 10, 1);
6063 /* VPP_VD1_POSTBLEND disable */
6064 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6065 cur_dev->viu_off, 0);
6066 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6067 cur_dev->viu_off, 0);
6068 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6069 cur_dev->viu_off, 0);
6070 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6071 cur_dev->viu_off, 0);
6072 if (cur_dispbuf->type & VIDTYPE_COMPRESS) {
6073 if ((process_3d_type & MODE_FORCE_3D_FA_LR)
6074 && (cur_frame_par->vpp_3d_mode == 1)) {
6075 start_aligned = ori_start_x_lines;
6076 end_aligned = ori_end_x_lines + 1;
6077 block_len =
6078 (end_aligned - start_aligned) / 2;
6079 block_len = block_len /
6080 (cur_frame_par->hscale_skip_count + 1);
6081 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
6082 ((start_aligned + block_len) << 16) |
6083 (end_aligned - 1));
6084 }
6085 if ((process_3d_type & MODE_FORCE_3D_FA_TB)
6086 && (cur_frame_par->vpp_3d_mode == 2)) {
6087 start_aligned =
6088 round_down(ori_start_y_lines, 4);
6089 end_aligned =
6090 round_up(ori_end_y_lines + 1, 4);
6091 block_len = end_aligned - start_aligned;
6092 block_len = block_len / 8;
6093 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
6094 (((start_aligned / 4) + block_len) << 16) |
6095 ((end_aligned / 4) - 1));
6096 }
6097 }
6098 } else if (FA_enable &&
6099 (toggle_3d_fa_frame == OUT_FA_BANK_FRAME)) {
6100 /* output a banking frame */
6101 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6102 cur_dev->vpp_off, 0, 14, 1);
6103 /* VPP_VD1_PREBLEND disable */
6104 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6105 cur_dev->vpp_off, 0, 10, 1);
6106 /* VPP_VD1_POSTBLEND disable */
6107 }
6108
6109 if ((process_3d_type & MODE_3D_OUT_TB)
6110 || (process_3d_type & MODE_3D_OUT_LR)) {
6111 if (cur_frame_par->vpp_2pic_mode &
6112 VPP_PIC1_FIRST) {
6113 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6114 cur_dev->viu_off, 0x4000000);
6115 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6116 cur_dev->viu_off, 0x4000000);
6117 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6118 cur_dev->viu_off, 0);
6119 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6120 cur_dev->viu_off, 0);
6121 } else {
6122 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6123 cur_dev->viu_off, 0);
6124 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6125 cur_dev->viu_off, 0);
6126 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6127 cur_dev->viu_off, 0x4000000);
6128 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6129 cur_dev->viu_off, 0x4000000);
6130 }
6131 }
6132}
6133#endif
6134
6135#ifdef FIQ_VSYNC
6136void vsync_fisr_in(void)
6137#else
6138static irqreturn_t vsync_isr_in(int irq, void *dev_id)
6139#endif
6140{
6141 int hold_line;
6142 int enc_line;
6143 unsigned char frame_par_di_set = 0;
6144 s32 i, vout_type;
6145 struct vframe_s *vf;
6146 unsigned long flags;
6147#ifdef CONFIG_TVIN_VDIN
6148 struct vdin_v4l2_ops_s *vdin_ops = NULL;
6149 struct vdin_arg_s arg;
6150#endif
6151 bool show_nosync = false;
6152 u32 vpp_misc_save, vpp_misc_set;
6153 int first_set = 0;
6154 int toggle_cnt;
6155 struct vframe_s *toggle_vf = NULL;
6156 struct vframe_s *toggle_frame = NULL;
6157 int video1_off_req = 0;
6158 int video2_off_req = 0;
6159 struct vframe_s *cur_dispbuf_back = cur_dispbuf;
6160 static struct vframe_s *pause_vf;
6161 int force_flush = 0;
6162 static u32 interrupt_count;
6163
6164 if (debug_flag & DEBUG_FLAG_VSYNC_DONONE)
6165 return IRQ_HANDLED;
6166
6167 if (frame_detect_flag == 1 &&
6168 receive_frame_count &&
6169 frame_detect_time &&
6170 !atomic_read(&video_unreg_flag)) {
6171 struct vinfo_s *video_info;
6172
6173 video_info = get_current_vinfo();
6174 if (video_frame_detect.interrupt_count == 0) {
6175 interrupt_count = 0;
6176 video_frame_detect.interrupt_count =
6177 frame_detect_time *
6178 video_info->sync_duration_num /
6179 video_info->sync_duration_den;
6180 if (debug_flag & DEBUG_FLAG_FRAME_DETECT) {
6181 pr_info("sync_duration_num = %d\n",
6182 video_info->sync_duration_num);
6183 pr_info("sync_duration_den = %d\n",
6184 video_info->sync_duration_den);
6185 }
6186 video_frame_detect.start_receive_count =
6187 receive_frame_count;
6188 }
6189
6190 interrupt_count++;
6191
6192 if (interrupt_count == video_frame_detect.interrupt_count + 1) {
6193 u32 receive_count;
6194 u32 expect_frame_count;
6195
6196 receive_count = receive_frame_count -
6197 video_frame_detect.start_receive_count;
6198 expect_frame_count =
6199 video_frame_detect.interrupt_count *
6200 frame_detect_fps *
6201 video_info->sync_duration_den /
6202 video_info->sync_duration_num /
6203 1000;
6204
6205 if (receive_count < expect_frame_count) {
6206 frame_detect_drop_count +=
6207 expect_frame_count -
6208 receive_count;
6209 if (debug_flag & DEBUG_FLAG_FRAME_DETECT) {
6210 pr_info("drop_count = %d\n",
6211 expect_frame_count -
6212 receive_count);
6213 }
6214 frame_detect_receive_count +=
6215 expect_frame_count;
6216 } else
6217 frame_detect_receive_count += receive_count;
6218
6219 if (debug_flag & DEBUG_FLAG_FRAME_DETECT) {
6220 pr_info("expect count = %d\n",
6221 expect_frame_count);
6222 pr_info("receive_count = %d, time = %ds\n",
6223 receive_count,
6224 frame_detect_time);
6225 pr_info("interrupt_count = %d\n",
6226 video_frame_detect.interrupt_count);
6227 pr_info("frame_detect_drop_count = %d\n",
6228 frame_detect_drop_count);
6229 pr_info("frame_detect_receive_count = %d\n",
6230 frame_detect_receive_count);
6231 }
6232 interrupt_count = 0;
6233 memset(&video_frame_detect, 0,
6234 sizeof(struct video_frame_detect_s));
6235 }
6236 }
6237
6238#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
6239 const char *dev_id_s = (const char *)dev_id;
6240 int dev_id_len = strlen(dev_id_s);
6241
6242 if (cur_dev == &video_dev[1]) {
6243 if (cur_dev_idx == 0) {
6244 cur_dev = &video_dev[0];
6245 vinfo = get_current_vinfo();
6246 vsync_pts_inc =
6247 90000 * vinfo->sync_duration_den /
6248 vinfo->sync_duration_num;
6249 vsync_pts_inc_scale = vinfo->sync_duration_den;
6250 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
6251 video_property_changed = 1;
6252 pr_info("Change to video 0\n");
6253 }
6254 } else {
6255 if (cur_dev_idx != 0) {
6256 cur_dev = &video_dev[1];
6257 vinfo = get_current_vinfo2();
6258 vsync_pts_inc =
6259 90000 * vinfo->sync_duration_den /
6260 vinfo->sync_duration_num;
6261 vsync_pts_inc_scale = vinfo->sync_duration_den;
6262 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
6263 video_property_changed = 1;
6264 pr_info("Change to video 1\n");
6265 }
6266 }
6267
6268 if ((dev_id_s[dev_id_len - 1] == '2' && cur_dev_idx == 0) ||
6269 (dev_id_s[dev_id_len - 1] != '2' && cur_dev_idx != 0))
6270 return IRQ_HANDLED;
6271 /* pr_info("%s: %s\n", __func__, dev_id_s); */
6272#endif
6273
6274 if (omx_need_drop_frame_num > 0 && !omx_drop_done && omx_secret_mode) {
6275 struct vframe_s *vf = NULL;
6276
6277 while (1) {
6278 vf = video_vf_peek();
6279
6280#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6281 if (is_dolby_vision_enable()
6282 && vf && is_dovi_frame(vf)) {
6283 pr_info("vsync_isr_in, ignore the omx %d frames drop for dv frame\n",
6284 omx_need_drop_frame_num);
6285 omx_need_drop_frame_num = 0;
6286 omx_drop_done = true;
6287 break;
6288 }
6289#endif
6290 if (vf) {
6291 if (omx_need_drop_frame_num >= vf->omx_index) {
6292 //pr_info("vsync drop omx_index %d\n",
6293 //vf->omx_index);
6294 vf = video_vf_get();
6295 video_vf_put(vf);
6296 } else {
6297 omx_drop_done = true;
6298 break;
6299 }
6300 } else
6301 break;
6302 }
6303 }
6304
6305 vf = video_vf_peek();
6306 if ((vf) && ((vf->type & VIDTYPE_NO_VIDEO_ENABLE) == 0)) {
6307 if ((old_vmode != new_vmode) || (debug_flag == 8)) {
6308 debug_flag = 1;
6309 video_property_changed = 1;
6310 pr_info("detect vout mode change!!!!!!!!!!!!\n");
6311 old_vmode = new_vmode;
6312 }
6313 }
6314 toggle_cnt = 0;
6315 vsync_count++;
6316 timer_count++;
6317
6318#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6319 vlock_process(vf);/*need call every vsync*/
6320#endif
6321
6322 switch (READ_VCBUS_REG(VPU_VIU_VENC_MUX_CTRL) & 0x3) {
6323 case 0:
6324 enc_line = (READ_VCBUS_REG(ENCL_INFO_READ) >> 16) & 0x1fff;
6325 break;
6326 case 1:
6327 enc_line = (READ_VCBUS_REG(ENCI_INFO_READ) >> 16) & 0x1fff;
6328 break;
6329 case 2:
6330 enc_line = (READ_VCBUS_REG(ENCP_INFO_READ) >> 16) & 0x1fff;
6331 break;
6332 case 3:
6333 enc_line = (READ_VCBUS_REG(ENCT_INFO_READ) >> 16) & 0x1fff;
6334 break;
6335 }
6336 if (enc_line > vsync_enter_line_max)
6337 vsync_enter_line_max = enc_line;
6338
6339 if (is_meson_txlx_cpu() && dmc_adjust) {
6340 bool force_adjust = false;
6341 struct vframe_s *chk_vf;
6342
6343 chk_vf = (vf != NULL) ? vf : cur_dispbuf;
6344 if (chk_vf)
6345 force_adjust =
6346 (chk_vf->type & VIDTYPE_VIU_444) ? true : false;
6347 if (chk_vf)
6348 dmc_adjust_for_mali_vpu(
6349 chk_vf->width,
6350 chk_vf->height,
6351 force_adjust);
6352 else
6353 dmc_adjust_for_mali_vpu(
6354 0, 0, force_adjust);
6355 }
6356#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
6357 vsync_rdma_config_pre();
6358
6359 if (to_notify_trick_wait) {
6360 atomic_set(&trickmode_framedone, 1);
6361 video_notify_flag |= VIDEO_NOTIFY_TRICK_WAIT;
6362 to_notify_trick_wait = false;
6363 goto exit;
6364 }
6365
6366 if (debug_flag & DEBUG_FLAG_PRINT_RDMA) {
6367 if (video_property_changed) {
6368 enable_rdma_log_count = 5;
6369 enable_rdma_log(1);
6370 }
6371 if (enable_rdma_log_count > 0)
6372 enable_rdma_log_count--;
6373 }
6374#endif
6375#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6376 /* check video frame before VECM process */
6377 if (is_dolby_vision_enable() && vf)
6378 dolby_vision_check_hdr10(vf);
6379#endif
6380#ifdef CONFIG_TVIN_VDIN
6381 /* patch for m8 4k2k wifidisplay bandwidth bottleneck */
6382 if (get_cpu_type() == MESON_CPU_MAJOR_ID_M8) {
6383 vdin_ops = get_vdin_v4l2_ops();
6384 if (vdin_ops && vdin_ops->tvin_vdin_func) {
6385 arg.cmd = VDIN_CMD_ISR;
6386 vdin_ops->tvin_vdin_func(1, &arg);
6387#ifdef CONFIG_AM_VIDEO2
6388 vdin_ops->tvin_vdin_func(0, &arg);
6389#endif
6390 }
6391 }
6392#endif
6393 vout_type = detect_vout_type();
6394 hold_line = calc_hold_line();
6395 if (vsync_pts_inc_upint) {
6396 if (vsync_pts_inc_adj) {
6397 /* pr_info("adj %d, org %d\n",*/
6398 /*vsync_pts_inc_adj, vsync_pts_inc); */
6399 timestamp_pcrscr_inc(vsync_pts_inc_adj);
6400 timestamp_apts_inc(vsync_pts_inc_adj);
6401 } else {
6402 timestamp_pcrscr_inc(vsync_pts_inc + 1);
6403 timestamp_apts_inc(vsync_pts_inc + 1);
6404 }
6405 } else {
6406 if (vsync_slow_factor == 0) {
6407 pr_info("invalid vsync_slow_factor, set to 1\n");
6408 vsync_slow_factor = 1;
6409 }
6410
6411 if (vsync_slow_factor == 1) {
6412 timestamp_pcrscr_inc_scale(vsync_pts_inc_scale,
6413 vsync_pts_inc_scale_base);
6414 timestamp_apts_inc(vsync_pts_inc / vsync_slow_factor);
6415 videosync_pcrscr_update(vsync_pts_inc_scale,
6416 vsync_pts_inc_scale_base);
6417 } else if (vsync_slow_factor > 1000) {
6418 u32 inc = (vsync_slow_factor / 1000)
6419 * vsync_pts_inc / 1000;
6420
6421 timestamp_pcrscr_inc(inc);
6422 timestamp_apts_inc(inc);
6423 } else {
6424 timestamp_pcrscr_inc(vsync_pts_inc / vsync_slow_factor);
6425 timestamp_apts_inc(vsync_pts_inc / vsync_slow_factor);
6426 }
6427 }
6428 if (omx_secret_mode == true) {
6429 u32 system_time = timestamp_pcrscr_get();
6430 int diff = system_time - omx_pts;
6431
6432 if ((diff - omx_pts_interval_upper) > 0
6433 || (diff - omx_pts_interval_lower) < 0
6434 || (omx_pts_set_from_hwc_count <
6435 OMX_MAX_COUNT_RESET_SYSTEMTIME)) {
6436 timestamp_pcrscr_enable(1);
6437 /*pr_info("system_time=%d, omx_pts=%d, diff=%d\n",*/
6438 /*system_time, omx_pts, diff);*/
6439 /*add greatest common divisor of duration*/
6440 /*1500(60fps) 3000(30fps) 3750(24fps) for some video*/
6441 /*that pts is not evenly*/
6442 timestamp_pcrscr_set(omx_pts + DURATION_GCD);
6443 } else if (is_dolby_vision_enable()
6444 && ((diff - omx_pts_dv_upper) > 0
6445 || (diff - omx_pts_dv_lower) < 0)) {
6446 timestamp_pcrscr_set(omx_pts + DURATION_GCD);
6447 }
6448 } else
6449 omx_pts = 0;
6450 if (trickmode_duration_count > 0)
6451 trickmode_duration_count -= vsync_pts_inc;
6452#ifdef VIDEO_PTS_CHASE
6453 if (vpts_chase)
6454 vpts_chase_counter--;
6455#endif
6456
6457 if (slowsync_repeat_enable)
6458 frame_repeat_count++;
6459
6460 if (smooth_sync_enable) {
6461 if (video_frame_repeat_count)
6462 video_frame_repeat_count++;
6463 }
6464
6465 if (atomic_read(&video_unreg_flag))
6466 goto exit;
6467
6468 if (atomic_read(&video_pause_flag)
6469 && (!((video_global_output == 1)
6470 && (video_enabled != video_status_saved))))
6471 goto exit;
6472
6473#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
6474 if (is_vsync_rdma_enable()) {
6475 rdma_canvas_id = next_rdma_canvas_id;
6476#ifdef VIDEO_PIP
6477 pip_rdma_canvas_id = pip_next_rdma_canvas_id;
6478#endif
6479 } else {
6480 if (rdma_enable_pre)
6481 goto exit;
6482
6483 rdma_canvas_id = 0;
6484 next_rdma_canvas_id = 1;
6485#ifdef VIDEO_PIP
6486 pip_rdma_canvas_id = 0;
6487 pip_next_rdma_canvas_id = 1;
6488#endif
6489 }
6490
6491 for (i = 0; i < dispbuf_to_put_num; i++) {
6492 if (dispbuf_to_put[i]) {
6493 video_vf_put(dispbuf_to_put[i]);
6494 dispbuf_to_put[i] = NULL;
6495 }
6496 dispbuf_to_put_num = 0;
6497 }
6498#ifdef VIDEO_PIP
6499 if (pipbuf_to_put) {
6500 pip_vf_put(pipbuf_to_put);
6501 pipbuf_to_put = NULL;
6502 }
6503#endif
6504#endif
6505
6506 if ((!cur_dispbuf) || (cur_dispbuf == &vf_local)) {
6507
6508 vf = video_vf_peek();
6509
6510 if (vf) {
6511 if (hdmi_in_onvideo == 0) {
6512 if (nopostvideostart == false)
6513 tsync_avevent_locked(VIDEO_START,
6514 (vf->pts) ? vf->pts :
6515 timestamp_vpts_get());
6516 video_start_post = true;
6517 }
6518
6519 if (show_first_frame_nosync || show_first_picture)
6520 show_nosync = true;
6521
6522 if (slowsync_repeat_enable)
6523 frame_repeat_count = 0;
6524
6525 } else if ((cur_dispbuf == &vf_local)
6526 && (video_property_changed)) {
6527 if (!(blackout | force_blackout)) {
6528 if (cur_dispbuf
6529#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
6530 && ((DI_POST_REG_RD(DI_IF1_GEN_REG) & 0x1)
6531 == 0)
6532#endif
6533 ) {
6534 /* setting video display*/
6535 /*property in unregister mode */
6536 u32 cur_index =
6537 READ_VCBUS_REG(VD1_IF0_CANVAS0 +
6538 cur_dev->viu_off);
6539 if ((get_cpu_type() >=
6540 MESON_CPU_MAJOR_ID_GXBB) &&
6541 (cur_dispbuf->type &
6542 VIDTYPE_COMPRESS)) {
6543 cur_dispbuf->compHeadAddr =
6544 READ_VCBUS_REG(AFBC_HEAD_BADDR)
6545 << 4;
6546 } else {
6547 cur_dispbuf->canvas0Addr =
6548 cur_index;
6549 }
6550 }
6551 vsync_toggle_frame(cur_dispbuf);
6552 } else
6553 video_property_changed = 0;
6554 } else {
6555 goto SET_FILTER;
6556 }
6557 }
6558
6559 /* buffer switch management */
6560 vf = video_vf_peek();
6561
6562 /* setting video display property in underflow mode */
6563 if ((!vf) && cur_dispbuf && (video_property_changed))
6564 vsync_toggle_frame(cur_dispbuf);
6565
6566 /*debug info for skip & repeate vframe case*/
6567 if (!vf) {
6568 underflow++;
6569 if (video_dbg_vf&(1<<0))
6570 dump_vframe_status("vdin0");
6571 if (video_dbg_vf&(1<<1))
6572 dump_vframe_status("deinterlace");
6573 if (video_dbg_vf&(1<<2))
6574 dump_vframe_status("amlvideo2");
6575 if (video_dbg_vf&(1<<3))
6576 dump_vframe_status("ppmgr");
6577 if (video_dbg_vf&(1<<4))
6578 dump_vdin_reg();
6579 }
6580 video_get_vf_cnt = 0;
6581 if (platform_type == 1) {
6582 /* toggle_3d_fa_frame*/
6583 /* determine the out frame is L or R or blank */
6584 judge_3d_fa_out_mode();
6585 }
6586 while (vf) {
6587 if (vpts_expire(cur_dispbuf, vf, toggle_cnt) || show_nosync) {
6588 if (debug_flag & DEBUG_FLAG_PTS_TRACE)
6589 pr_info("vpts = 0x%x, c.dur=0x%x, n.pts=0x%x, scr = 0x%x, pcr-pts-diff=%d, ptstrace=%d\n",
6590 timestamp_vpts_get(),
6591 (cur_dispbuf) ?
6592 cur_dispbuf->duration : 0,
6593 vf->pts, timestamp_pcrscr_get(),
6594 timestamp_pcrscr_get() - vf->pts,
6595 pts_trace);
6596 amlog_mask_if(toggle_cnt > 0, LOG_MASK_FRAMESKIP,
6597 "skipped\n");
6598#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6599 if (is_dolby_vision_enable()
6600 && dolby_vision_need_wait())
6601 break;
6602#endif
6603#if ENABLE_UPDATE_HDR_FROM_USER
6604 set_hdr_to_frame(vf);
6605#endif
6606
6607#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6608 refresh_on_vs(vf);
6609 if (amvecm_on_vs(
6610 (cur_dispbuf != &vf_local)
6611 ? cur_dispbuf : NULL,
6612 vf, CSC_FLAG_CHECK_OUTPUT,
6613 cur_frame_par ?
6614 cur_frame_par->supsc1_hori_ratio :
6615 0,
6616 cur_frame_par ?
6617 cur_frame_par->supsc1_vert_ratio :
6618 0) == 1)
6619 break;
6620#endif
6621 /*
6622 *two special case:
6623 *case1:4k display case,input buffer not enough &
6624 * quickly for display
6625 *case2:input buffer all not OK
6626 */
6627 if (vf && hdmiin_frame_check &&
6628 (vf->source_type == VFRAME_SOURCE_TYPE_HDMI) &&
6629 (video_vf_disp_mode_get(vf) ==
6630 VFRAME_DISP_MODE_UNKNOWN) &&
6631 (hdmiin_frame_check_cnt++ < 10))
6632 break;
6633 else
6634 hdmiin_frame_check_cnt = 0;
6635
6636 vf = video_vf_get();
6637 if (!vf)
6638 break;
6639 if (debug_flag & DEBUG_FLAG_LATENCY) {
6640 vf->ready_clock[2] = sched_clock();
6641 pr_info("video get latency %lld ms vdin put latency %lld ms. first %lld ms.\n",
6642 func_div(vf->ready_clock[2], 1000),
6643 func_div(vf->ready_clock[1], 1000),
6644 func_div(vf->ready_clock[0], 1000));
6645 }
6646 if (video_vf_dirty_put(vf))
6647 break;
6648 if (vf && hdmiin_frame_check && (vf->source_type ==
6649 VFRAME_SOURCE_TYPE_HDMI) &&
6650 video_vf_disp_mode_check(vf))
6651 break;
6652 force_blackout = 0;
6653 if ((platform_type == 1) ||
6654 (platform_type == 0)) {
6655 if (vf) {
6656 if (last_mode_3d !=
6657 vf->mode_3d_enable) {
6658 last_mode_3d =
6659 vf->mode_3d_enable;
6660 mode_3d_changed = 1;
6661 }
6662 video_3d_format = vf->trans_fmt;
6663 }
6664 }
6665 vsync_toggle_frame(vf);
6666 toggle_frame = vf;
6667#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6668 if (is_dolby_vision_enable()) {
6669 toggle_vf = dolby_vision_toggle_frame(vf);
6670 video_pause_global = 0;
6671 } else
6672#endif
6673 {
6674 cur_dispbuf2 = NULL;
6675 video_pause_global = 2;
6676 pause_vf = NULL;
6677 }
6678 if (trickmode_fffb == 1) {
6679 trickmode_vpts = vf->pts;
6680#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
6681 #ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
6682 if ((DI_POST_REG_RD(DI_IF1_GEN_REG) & 0x1)
6683 != 0) {
6684 atomic_set(&trickmode_framedone, 1);
6685 video_notify_flag |=
6686 VIDEO_NOTIFY_TRICK_WAIT;
6687 } else
6688 #endif
6689 to_notify_trick_wait = true;
6690#else
6691 atomic_set(&trickmode_framedone, 1);
6692 video_notify_flag |= VIDEO_NOTIFY_TRICK_WAIT;
6693#endif
6694 break;
6695 }
6696 if (slowsync_repeat_enable)
6697 frame_repeat_count = 0;
6698 vf = video_vf_peek();
6699 if (!vf)
6700 next_peek_underflow++;
6701#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6702 if (for_dolby_vision_certification()
6703 && toggle_vf)
6704 break;
6705#endif
6706 if (debug_flag & DEBUG_FLAG_TOGGLE_FRAME_PER_VSYNC)
6707 break;
6708 video_get_vf_cnt++;
6709 if (video_get_vf_cnt >= 2)
6710 video_drop_vf_cnt++;
6711 } else {
6712 /* check if current frame's duration has expired,
6713 *in this example
6714 * it compares current frame display duration
6715 * with 1/1/1/1.5 frame duration
6716 * every 4 frames there will be one frame play
6717 * longer than usual.
6718 * you can adjust this array for any slow sync
6719 * control as you want.
6720 * The playback can be smoother than previous method.
6721 */
6722 if (slowsync_repeat_enable) {
6723 if (duration_expire
6724 (cur_dispbuf, vf,
6725 frame_repeat_count * vsync_pts_inc)
6726 && timestamp_pcrscr_enable_state()) {
6727 amlog_mask(LOG_MASK_SLOWSYNC,
6728 "slow sync toggle,repeat_count = %d\n",
6729 frame_repeat_count);
6730 amlog_mask(LOG_MASK_SLOWSYNC,
6731 "sys.time = 0x%x, video time = 0x%x\n",
6732 timestamp_pcrscr_get(),
6733 timestamp_vpts_get());
6734#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6735 if (is_dolby_vision_enable()
6736 && dolby_vision_need_wait())
6737 break;
6738#endif
6739#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6740 refresh_on_vs(vf);
6741 if (amvecm_on_vs(
6742 (cur_dispbuf != &vf_local)
6743 ? cur_dispbuf : NULL,
6744 vf, CSC_FLAG_CHECK_OUTPUT,
6745 cur_frame_par ?
6746 cur_frame_par->supsc1_hori_ratio
6747 : 0,
6748 cur_frame_par ?
6749 cur_frame_par->supsc1_vert_ratio
6750 : 0) == 1)
6751 break;
6752#endif
6753 vf = video_vf_get();
6754 if (!vf)
6755 break;
6756 vsync_toggle_frame(vf);
6757 toggle_frame = vf;
6758#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6759 if (is_dolby_vision_enable())
6760 toggle_vf =
6761 dolby_vision_toggle_frame(vf);
6762 else
6763#endif
6764 cur_dispbuf2 = NULL;
6765 frame_repeat_count = 0;
6766
6767 vf = video_vf_peek();
6768 } else if ((cur_dispbuf) &&
6769 (cur_dispbuf->duration_pulldown >
6770 vsync_pts_inc)) {
6771 frame_count++;
6772 cur_dispbuf->duration_pulldown -=
6773 PTS2DUR(vsync_pts_inc);
6774 }
6775 } else {
6776 if ((cur_dispbuf)
6777 && (cur_dispbuf->duration_pulldown >
6778 vsync_pts_inc)) {
6779 frame_count++;
6780 cur_dispbuf->duration_pulldown -=
6781 PTS2DUR(vsync_pts_inc);
6782 }
6783 }
6784 /* setting video display property in pause mode */
6785 if (video_property_changed && cur_dispbuf) {
6786 if (blackout | force_blackout) {
6787 if (cur_dispbuf != &vf_local)
6788 vsync_toggle_frame(
6789 cur_dispbuf);
6790 } else
6791 vsync_toggle_frame(cur_dispbuf);
6792 if (is_dolby_vision_enable()) {
6793 pause_vf = cur_dispbuf;
6794 video_pause_global = 1;
6795 } else {
6796 pause_vf = NULL;
6797 video_pause_global = 2;
6798 }
6799 }
6800 if (pause_vf && (video_pause_global == 1)
6801 && is_dolby_vision_enable()) {
6802 toggle_vf = pause_vf;
6803 dolby_vision_parse_metadata(
6804 cur_dispbuf, 0, false);
6805 dolby_vision_set_toggle_flag(1);
6806 }
6807 break;
6808 }
6809
6810 toggle_cnt++;
6811 }
6812
6813#ifdef INTERLACE_FIELD_MATCH_PROCESS
6814 if (interlace_field_type_need_match(vout_type, vf)) {
6815 if (field_matching_count++ == FIELD_MATCH_THRESHOLD) {
6816 field_matching_count = 0;
6817 /* adjust system time to get one more field toggle */
6818 /* at next vsync to match field */
6819 timestamp_pcrscr_inc(vsync_pts_inc);
6820 }
6821 } else
6822 field_matching_count = 0;
6823#endif
6824
6825SET_FILTER:
6826#ifdef VIDEO_PIP
6827 vf = pip_vf_peek();
6828 /* setting video display property in underflow mode */
6829 if ((!vf) && cur_pipbuf && (pip_property_changed))
6830 pip_toggle_frame(cur_pipbuf);
6831 if (vf) {
6832 vf = pip_vf_get();
6833 if (vf) {
6834 if (!vf->frame_dirty)
6835 pip_toggle_frame(vf);
6836 else
6837 pip_vf_put(vf);
6838 }
6839 }
6840#endif
6841#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6842 amvecm_on_vs(
6843 (cur_dispbuf != &vf_local)
6844 ? cur_dispbuf : NULL,
6845 toggle_frame,
6846 toggle_frame ? CSC_FLAG_TOGGLE_FRAME : 0,
6847 cur_frame_par ?
6848 cur_frame_par->supsc1_hori_ratio :
6849 0,
6850 cur_frame_par ?
6851 cur_frame_par->supsc1_vert_ratio :
6852 0);
6853#endif
6854 /* filter setting management */
6855 if ((frame_par_ready_to_set) || (frame_par_force_to_set)) {
6856 cur_frame_par = next_frame_par;
6857 frame_par_di_set = 1;
6858 }
6859#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6860 if (is_dolby_vision_enable()) {
6861 u32 frame_size = 0, h_size, v_size;
6862 u8 pps_state = 0; /* pps no change */
6863
6864 /* force toggle when keeping frame after playing */
6865 if ((cur_dispbuf == &vf_local)
6866 && !toggle_vf
6867 && is_dolby_vision_on()) {
6868 toggle_vf = cur_dispbuf;
6869 dolby_vision_parse_metadata(
6870 cur_dispbuf, 2, false);
6871 dolby_vision_set_toggle_flag(1);
6872 }
6873/* pause mode was moved to video display property */
6874#if 0
6875 /* force toggle in pause mode */
6876 if (cur_dispbuf
6877 && (cur_dispbuf != &vf_local)
6878 && !toggle_vf
6879 && is_dolby_vision_on()
6880 && !for_dolby_vision_certification()) {
6881 toggle_vf = cur_dispbuf;
6882 dolby_vision_parse_metadata(
6883 cur_dispbuf, 0, false);
6884 dolby_vision_set_toggle_flag(1);
6885 }
6886#endif
6887 if (cur_frame_par) {
6888 if (frame_par_ready_to_set || frame_par_force_to_set) {
6889 struct vppfilter_mode_s *vpp_filter =
6890 &cur_frame_par->vpp_filter;
6891 if ((vpp_filter->vpp_hsc_start_phase_step
6892 == 0x1000000) &&
6893 (vpp_filter->vpp_vsc_start_phase_step
6894 == 0x1000000) &&
6895 (vpp_filter->vpp_hsc_start_phase_step ==
6896 vpp_filter->vpp_hf_start_phase_step) &&
6897 !vpp_filter->vpp_pre_vsc_en &&
6898 !vpp_filter->vpp_pre_hsc_en &&
6899 !cur_frame_par->supsc0_enable &&
6900 !cur_frame_par->supsc1_enable &&
6901 bypass_pps)
6902 pps_state = 2; /* pps disable */
6903 else
6904 pps_state = 1; /* pps enable */
6905 }
6906 if (cur_frame_par->VPP_hd_start_lines_
6907 >= cur_frame_par->VPP_hd_end_lines_)
6908 h_size = 0;
6909 else
6910 h_size = cur_frame_par->VPP_hd_end_lines_
6911 - cur_frame_par->VPP_hd_start_lines_ + 1;
6912 h_size /= (cur_frame_par->hscale_skip_count + 1);
6913 if (cur_frame_par->VPP_vd_start_lines_
6914 >= cur_frame_par->VPP_vd_end_lines_)
6915 v_size = 0;
6916 else
6917 v_size = cur_frame_par->VPP_vd_end_lines_
6918 - cur_frame_par->VPP_vd_start_lines_ + 1;
6919 v_size /= (cur_frame_par->vscale_skip_count + 1);
6920 frame_size = (h_size << 16) | v_size;
6921 } else if (toggle_vf) {
6922 h_size = (toggle_vf->type & VIDTYPE_COMPRESS) ?
6923 toggle_vf->compWidth : toggle_vf->width;
6924 v_size = (toggle_vf->type & VIDTYPE_COMPRESS) ?
6925 toggle_vf->compHeight : toggle_vf->height;
6926 frame_size = (h_size << 16) | v_size;
6927 }
6928 dolby_vision_process(toggle_vf, frame_size, pps_state);
6929 dolby_vision_update_setting();
6930 }
6931#endif
6932 if ((platform_type == 1) || (platform_type == 0)) {
6933 if (mode_3d_changed) {
6934 mode_3d_changed = 0;
6935 frame_par_force_to_set = 1;
6936 }
6937 }
6938 if (cur_dispbuf_back != cur_dispbuf) {
6939 display_frame_count++;
6940 drop_frame_count = receive_frame_count - display_frame_count;
6941 }
6942 if (cur_dispbuf) {
6943 struct f2v_vphase_s *vphase;
6944 u32 vin_type = cur_dispbuf->type & VIDTYPE_TYPEMASK;
6945 {
6946 int need_afbc = (cur_dispbuf->type & VIDTYPE_COMPRESS);
6947 int afbc_need_reset =
6948 video_enabled &&
6949 need_afbc &&
6950 (!(READ_VCBUS_REG(AFBC_ENABLE) & 0x100));
6951 /*video on && afbc is off && is compress frame.*/
6952 if (frame_par_ready_to_set || afbc_need_reset) {
6953 if (cur_frame_par) {
6954 viu_set_dcu(cur_frame_par, cur_dispbuf);
6955 if (cur_dispbuf2)
6956 vd2_set_dcu(cur_frame_par,
6957 cur_dispbuf2);
6958 }
6959 } else if (cur_dispbuf2) {
6960 u32 new_el_w =
6961 (cur_dispbuf2->type
6962 & VIDTYPE_COMPRESS) ?
6963 cur_dispbuf2->compWidth :
6964 cur_dispbuf2->width;
6965 if (new_el_w != last_el_w) {
6966 pr_info("reset vd2 dcu for el change, %d->%d, %p--%p\n",
6967 last_el_w, new_el_w,
6968 cur_dispbuf, cur_dispbuf2);
6969 vd2_set_dcu(cur_frame_par,
6970 cur_dispbuf2);
6971 }
6972 } else {
6973 last_el_w = 0;
6974 last_el_status = 0;
6975 }
6976 }
6977
6978 if (cur_frame_par &&
6979 cur_frame_par->hscale_skip_count) {
6980 VSYNC_WR_MPEG_REG_BITS(VIU_VD1_FMT_CTRL +
6981 cur_dev->viu_off, 1, 20, 1);
6982 /* HFORMATTER_EN */
6983#ifdef VIDEO_PIP
6984 if (!cur_pipbuf)
6985#endif
6986 VSYNC_WR_MPEG_REG_BITS(VIU_VD2_FMT_CTRL +
6987 cur_dev->viu_off, 1, 20, 1);
6988 /* HFORMATTER_EN */
6989 }
6990
6991#ifdef TV_3D_FUNCTION_OPEN
6992 switch_3dView_per_vsync();
6993#endif
6994 /* vertical phase */
6995 vphase = &cur_frame_par->VPP_vf_ini_phase_
6996 [vpp_phase_table[vin_type]
6997 [vout_type]];
6998 VSYNC_WR_MPEG_REG(
6999 VPP_VSC_INI_PHASE + cur_dev->vpp_off,
7000 ((u32) (vphase->phase) << 8));
7001
7002 if (vphase->repeat_skip >= 0) {
7003 /* skip lines */
7004 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
7005 cur_dev->vpp_off,
7006 skip_tab[vphase->repeat_skip],
7007 VPP_PHASECTL_INIRCVNUMT_BIT,
7008 VPP_PHASECTL_INIRCVNUM_WID +
7009 VPP_PHASECTL_INIRPTNUM_WID);
7010 } else {
7011 /* repeat first line */
7012 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
7013 cur_dev->vpp_off, 4,
7014 VPP_PHASECTL_INIRCVNUMT_BIT,
7015 VPP_PHASECTL_INIRCVNUM_WID);
7016 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
7017 cur_dev->vpp_off,
7018 1 - vphase->repeat_skip,
7019 VPP_PHASECTL_INIRPTNUMT_BIT,
7020 VPP_PHASECTL_INIRPTNUM_WID);
7021 }
7022 if (force_3d_scaler == 3 &&
7023 cur_frame_par &&
7024 cur_frame_par->vpp_3d_scale) {
7025 VSYNC_WR_MPEG_REG_BITS(
7026 VPP_VSC_PHASE_CTRL, 3,
7027 VPP_PHASECTL_DOUBLELINE_BIT, 2);
7028 } else if (force_3d_scaler == 1 &&
7029 cur_frame_par &&
7030 cur_frame_par->vpp_3d_scale) {
7031 VSYNC_WR_MPEG_REG_BITS(
7032 VPP_VSC_PHASE_CTRL, 1,
7033 VPP_PHASECTL_DOUBLELINE_BIT,
7034 VPP_PHASECTL_DOUBLELINE_WID);
7035 } else if (force_3d_scaler == 2 &&
7036 cur_frame_par &&
7037 cur_frame_par->vpp_3d_scale) {
7038 VSYNC_WR_MPEG_REG_BITS(
7039 VPP_VSC_PHASE_CTRL, 2,
7040 VPP_PHASECTL_DOUBLELINE_BIT, 2);
7041 } else {
7042 VSYNC_WR_MPEG_REG_BITS(
7043 VPP_VSC_PHASE_CTRL, 0,
7044 VPP_PHASECTL_DOUBLELINE_BIT, 2);
7045 }
7046 }
7047#ifdef VIDEO_PIP
7048 if (pip_frame_ready_to_set)
7049 curpip_frame_par = nextpip_frame_par;
7050
7051 if (cur_pipbuf) {
7052 int need_afbc = (cur_pipbuf->type & VIDTYPE_COMPRESS);
7053 int afbc_need_reset =
7054 video2_enabled &&
7055 need_afbc &&
7056 (!(READ_VCBUS_REG(VD2_AFBC_ENABLE) & 0x100));
7057 /*video on && afbc is off && is compress frame.*/
7058 if (pip_frame_ready_to_set || afbc_need_reset)
7059 pip_set_dcu(curpip_frame_par, cur_pipbuf);
7060
7061 if (cur_pipbuf && curpip_frame_par) {
7062 if (curpip_frame_par->hscale_skip_count) {
7063 VSYNC_WR_MPEG_REG_BITS(
7064 VIU_VD2_FMT_CTRL +
7065 cur_dev->viu_off, 1, 20, 1);
7066 /* HFORMATTER_EN */
7067 }
7068 proc_vd2_vsc_phase_per_vsync(
7069 curpip_frame_par, cur_pipbuf, vout_type);
7070 }
7071 }
7072
7073 if (pip_frame_ready_to_set) {
7074#if 0
7075 u32 h_size, v_size;
7076
7077 if (pip_start_x_lines < pip_end_x_lines)
7078 h_size = pip_end_x_lines - pip_start_x_lines + 1;
7079 else
7080 h_size = ori2_end_x_lines - ori2_start_x_lines + 1;
7081
7082 if (pip_start_y_lines < pip_end_y_lines)
7083 v_size = pip_end_y_lines - pip_start_y_lines + 1;
7084 else
7085 v_size = ori2_end_y_lines - ori2_start_y_lines + 1;
7086
7087 zoom2_start_x_lines = ori2_start_x_lines;
7088 zoom2_end_x_lines = ori2_end_x_lines;
7089 zoom2_start_y_lines = ori2_start_y_lines;
7090 zoom2_end_y_lines = ori2_end_y_lines;
7091
7092 if (h_size < (zoom2_end_x_lines - zoom2_start_x_lines + 1))
7093 zoom2_end_x_lines = zoom2_start_x_lines + h_size - 1;
7094 else if (h_size > (zoom2_end_x_lines - zoom2_start_x_lines + 1))
7095 h_size = zoom2_end_x_lines - zoom2_start_x_lines + 1;
7096
7097 if (v_size < (zoom2_end_y_lines - zoom2_start_y_lines + 1))
7098 zoom2_end_y_lines = zoom2_start_y_lines + v_size - 1;
7099 else if (v_size > (zoom2_end_y_lines - zoom2_start_y_lines + 1))
7100 v_size = (zoom2_end_y_lines - zoom2_start_y_lines + 1);
7101
7102 if (vinfo) {
7103 if (pip_start_x_lines + h_size > vinfo->width) {
7104 h_size = vinfo->width - pip_start_x_lines;
7105 zoom2_end_x_lines =
7106 zoom2_start_x_lines + h_size - 1;
7107 }
7108 if (pip_start_y_lines + v_size > vinfo->height) {
7109 v_size = vinfo->height - pip_start_y_lines;
7110 zoom2_end_y_lines =
7111 zoom2_start_y_lines + v_size - 1;
7112 }
7113 }
7114#endif
7115 struct scaler_setting_s local_pps;
7116 struct blend_setting_s local_blend;
7117 struct vpp_frame_par_s *par = curpip_frame_par;
7118
7119 if (cur_pipbuf->type & VIDTYPE_INTERLACE) {
7120 if (cur_pipbuf->type & VIDTYPE_VIU_FIELD) {
7121 zoom2_start_y_lines =
7122 par->VPP_vd_start_lines_ >> 1;
7123 zoom2_end_y_lines =
7124 ((par->VPP_vd_end_lines_ + 1)
7125 >> 1) - 1;
7126 } else {
7127 zoom2_start_y_lines =
7128 par->VPP_vd_start_lines_;
7129 zoom2_end_y_lines =
7130 par->VPP_vd_end_lines_;
7131 }
7132 } else {
7133 if (cur_pipbuf->type & VIDTYPE_VIU_FIELD) {
7134 zoom2_start_y_lines =
7135 par->VPP_vd_start_lines_;
7136 zoom2_end_y_lines =
7137 par->VPP_vd_end_lines_;
7138 } else {
7139 zoom2_start_y_lines =
7140 par->VPP_vd_start_lines_ >> 1;
7141 zoom2_end_y_lines =
7142 ((par->VPP_vd_end_lines_ + 1)
7143 >> 1) - 1;
7144 }
7145 }
7146 zoom2_start_x_lines =
7147 par->VPP_hd_start_lines_;
7148 zoom2_end_x_lines =
7149 par->VPP_hd_end_lines_;
7150 config_vd_pps(
7151 1, par, &local_pps, vinfo);
7152 config_vd_blend(
7153 1, par, cur_pipbuf,
7154 (legacy_vpp ? 0x1ff : 0x100), &local_blend);
7155 vd2_scaler_setting(&local_pps);
7156 vd2_zoom_display_horz(
7157 cur_pipbuf,
7158 par->hscale_skip_count);
7159 vd2_zoom_display_vert(
7160 cur_pipbuf,
7161 par->vscale_skip_count);
7162 vd2_vpp_blend_setting(&local_blend);
7163 pip_frame_ready_to_set = 0;
7164 }
7165#endif
7166
7167 if (((frame_par_ready_to_set) || (frame_par_force_to_set)) &&
7168 (cur_frame_par)) {
7169 struct vppfilter_mode_s *vpp_filter =
7170 &cur_frame_par->vpp_filter;
7171
7172 if (cur_dispbuf) {
7173 u32 zoom_start_y, zoom_end_y;
7174 correct_vd1_mif_size_for_DV(cur_frame_par);
7175 if (cur_dispbuf->type & VIDTYPE_INTERLACE) {
7176 if (cur_dispbuf->type
7177 & VIDTYPE_COMPRESS) {
7178 /* for vdin afbc and interlace case */
7179 zoom_start_y =
7180 cur_frame_par->VPP_vd_start_lines_;
7181 zoom_end_y =
7182 cur_frame_par->VPP_vd_end_lines_;
7183 } else if (cur_dispbuf->type
7184 & VIDTYPE_VIU_FIELD) {
7185 zoom_start_y =
7186 cur_frame_par->VPP_vd_start_lines_
7187 >> 1;
7188 zoom_end_y =
7189 ((cur_frame_par->VPP_vd_end_lines_ + 1)
7190 >> 1) - 1;
7191 } else {
7192 zoom_start_y =
7193 cur_frame_par->VPP_vd_start_lines_;
7194 zoom_end_y =
7195 cur_frame_par->VPP_vd_end_lines_;
7196 }
7197 } else {
7198 if (cur_dispbuf->type & VIDTYPE_VIU_FIELD) {
7199 zoom_start_y =
7200 cur_frame_par->VPP_vd_start_lines_;
7201 zoom_end_y =
7202 cur_frame_par->VPP_vd_end_lines_;
7203 } else {
7204 if (is_need_framepacking_output()) {
7205 zoom_start_y =
7206 cur_frame_par->VPP_vd_start_lines_ >> 1;
7207 zoom_end_y =
7208 ((cur_frame_par->VPP_vd_end_lines_
7209 - framepacking_blank + 1) >> 1) - 1;
7210 } else {
7211 zoom_start_y =
7212 cur_frame_par->VPP_vd_start_lines_ >> 1;
7213 zoom_end_y =
7214 ((cur_frame_par->VPP_vd_end_lines_ + 1) >> 1) - 1;
7215 }
7216 }
7217 }
7218
7219 zoom_start_x_lines =
7220 cur_frame_par->VPP_hd_start_lines_;
7221 zoom_end_x_lines = cur_frame_par->VPP_hd_end_lines_;
7222 zoom_display_horz(cur_dispbuf,
7223 cur_frame_par->hscale_skip_count);
7224
7225 zoom_start_y_lines = zoom_start_y;
7226 zoom_end_y_lines = zoom_end_y;
7227 zoom_display_vert(cur_dispbuf);
7228 if (is_dolby_vision_enable() && cur_dispbuf2) {
7229 zoom2_start_x_lines = ori2_start_x_lines;
7230 zoom2_end_x_lines = ori2_end_x_lines;
7231 zoom2_start_y_lines = ori2_start_y_lines;
7232 zoom2_end_y_lines = ori2_end_y_lines;
7233 correct_vd2_mif_size_for_DV(
7234 cur_frame_par, cur_dispbuf);
7235 vd2_zoom_display_horz(cur_dispbuf2,
7236 cur_frame_par->hscale_skip_count);
7237 vd2_zoom_display_vert(cur_dispbuf2,
7238 cur_frame_par->vscale_skip_count);
7239 }
7240 }
7241 /*vpp input size setting*/
7242 VSYNC_WR_MPEG_REG(VPP_IN_H_V_SIZE,
7243 ((cur_frame_par->video_input_w & 0x1fff) <<
7244 16) | (cur_frame_par->video_input_h & 0x1fff));
7245
7246 /* vpp super scaler */
7247 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB) {
7248 vpp_set_super_scaler_regs(cur_frame_par->supscl_path,
7249 cur_frame_par->supsc0_enable,
7250 cur_frame_par->spsc0_w_in,
7251 cur_frame_par->spsc0_h_in,
7252 cur_frame_par->supsc0_hori_ratio,
7253 cur_frame_par->supsc0_vert_ratio,
7254 cur_frame_par->supsc1_enable,
7255 cur_frame_par->spsc1_w_in,
7256 cur_frame_par->spsc1_h_in,
7257 cur_frame_par->supsc1_hori_ratio,
7258 cur_frame_par->supsc1_vert_ratio,
7259 vinfo->width,
7260 vinfo->height);
7261 if (is_dolby_vision_on() &&
7262 is_dolby_vision_stb_mode() &&
7263 !cur_frame_par->supsc0_enable &&
7264 !cur_frame_par->supsc1_enable) {
7265 VSYNC_WR_MPEG_REG(VPP_SRSHARP0_CTRL, 0);
7266 VSYNC_WR_MPEG_REG(VPP_SRSHARP1_CTRL, 0);
7267 }
7268 }
7269
7270 /* vpp filters */
7271 /* SET_MPEG_REG_MASK(VPP_SC_MISC + cur_dev->vpp_off, */
7272 /* VPP_SC_TOP_EN | VPP_SC_VERT_EN | VPP_SC_HORZ_EN); */
7273#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
7274 if (for_dolby_vision_certification()) {
7275 /* turn off PPS for Dolby Vision certification */
7276 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7277 0, VPP_SC_TOP_EN_BIT, VPP_SC_TOP_EN_WID);
7278 } else
7279#endif
7280 {
7281 VSYNC_WR_MPEG_REG(VPP_SC_MISC + cur_dev->vpp_off,
7282 READ_VCBUS_REG(VPP_SC_MISC +
7283 cur_dev->vpp_off) |
7284 VPP_SC_TOP_EN | VPP_SC_VERT_EN |
7285 VPP_SC_HORZ_EN);
7286
7287 /* pps pre hsc&vsc en */
7288 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7289 vpp_filter->vpp_pre_hsc_en,
7290 VPP_SC_PREHORZ_EN_BIT, 1);
7291 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7292 vpp_filter->vpp_pre_vsc_en,
7293 VPP_SC_PREVERT_EN_BIT, 1);
7294 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7295 vpp_filter->vpp_pre_vsc_en,
7296 VPP_LINE_BUFFER_EN_BIT, 1);
7297 }
7298 /* for bypass pps debug */
7299 if ((vpp_filter->vpp_hsc_start_phase_step == 0x1000000) &&
7300 (vpp_filter->vpp_vsc_start_phase_step == 0x1000000) &&
7301 (vpp_filter->vpp_hsc_start_phase_step ==
7302 vpp_filter->vpp_hf_start_phase_step) &&
7303 !vpp_filter->vpp_pre_vsc_en &&
7304 !vpp_filter->vpp_pre_hsc_en &&
7305 bypass_pps)
7306 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7307 0, VPP_SC_TOP_EN_BIT, VPP_SC_TOP_EN_WID);
7308 /*turn off vertical scaler when 3d display */
7309 /* CLEAR_MPEG_REG_MASK(VPP_SC_MISC,VPP_SC_VERT_EN); */
7310 if (platform_type == 1) {
7311 if (last_mode_3d) {
7312 VSYNC_WR_MPEG_REG(
7313 VPP_SC_MISC + cur_dev->vpp_off,
7314 READ_MPEG_REG(VPP_SC_MISC +
7315 cur_dev->vpp_off) &
7316 (~VPP_SC_VERT_EN));
7317 }
7318 }
7319 /* horitontal filter settings */
7320 VSYNC_WR_MPEG_REG_BITS(
7321 VPP_SC_MISC + cur_dev->vpp_off,
7322 vpp_filter->vpp_horz_coeff[0],
7323 VPP_SC_HBANK_LENGTH_BIT,
7324 VPP_SC_BANK_LENGTH_WID);
7325
7326 /* fix the pps last line dummy issue */
7327 if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12B))
7328 VSYNC_WR_MPEG_REG_BITS(
7329 VPP_SC_MISC + cur_dev->vpp_off,
7330 1, 24, 1);
7331
7332 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
7333 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8)
7334 && !is_meson_mtvd_cpu()) {
7335 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
7336 cur_dev->vpp_off,
7337 (vpp_filter->vpp_vert_coeff[0] == 2) ? 1 : 0,
7338 VPP_PHASECTL_DOUBLELINE_BIT,
7339 VPP_PHASECTL_DOUBLELINE_WID);
7340 }
7341 /* #endif */
7342
7343 if (vpp_filter->vpp_horz_coeff[1] & 0x8000) {
7344 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF_IDX +
7345 cur_dev->vpp_off,
7346 VPP_COEF_HORZ | VPP_COEF_9BIT);
7347 } else {
7348 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF_IDX +
7349 cur_dev->vpp_off,
7350 VPP_COEF_HORZ);
7351 }
7352
7353 for (i = 0; i < (vpp_filter->vpp_horz_coeff[1] & 0xff); i++) {
7354 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF + cur_dev->vpp_off,
7355 vpp_filter->vpp_horz_coeff[i + 2]);
7356 }
7357
7358 /* vertical filter settings */
7359 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7360 vpp_filter->vpp_vert_coeff[0],
7361 VPP_SC_VBANK_LENGTH_BIT,
7362 VPP_SC_BANK_LENGTH_WID);
7363
7364 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF_IDX + cur_dev->vpp_off,
7365 VPP_COEF_VERT);
7366 for (i = 0; i < vpp_filter->vpp_vert_coeff[1]; i++) {
7367 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF + cur_dev->vpp_off,
7368 vpp_filter->vpp_vert_coeff[i + 2]);
7369 }
7370
7371 /* vertical chroma filter settings */
7372 if (vpp_filter->vpp_vert_chroma_filter_en) {
7373 const u32 *pCoeff = vpp_filter->vpp_vert_chroma_coeff;
7374
7375 VSYNC_WR_MPEG_REG(
7376 VPP_SCALE_COEF_IDX + cur_dev->vpp_off,
7377 VPP_COEF_VERT_CHROMA|VPP_COEF_SEP_EN);
7378 for (i = 0; i < pCoeff[1]; i++)
7379 VSYNC_WR_MPEG_REG(
7380 VPP_SCALE_COEF + cur_dev->vpp_off,
7381 pCoeff[i + 2]);
7382 }
7383 /* work around to cut the last green line
7384 *when two layer dv display and do vskip
7385 */
7386 if (is_dolby_vision_on() &&
7387 (cur_frame_par->vscale_skip_count > 0)
7388 && cur_dispbuf2
7389 && (cur_frame_par->VPP_pic_in_height_ > 0))
7390 cur_frame_par->VPP_pic_in_height_--;
7391 VSYNC_WR_MPEG_REG(VPP_PIC_IN_HEIGHT + cur_dev->vpp_off,
7392 cur_frame_par->VPP_pic_in_height_);
7393
7394 VSYNC_WR_MPEG_REG_BITS(VPP_HSC_PHASE_CTRL + cur_dev->vpp_off,
7395 cur_frame_par->VPP_hf_ini_phase_,
7396 VPP_HSC_TOP_INI_PHASE_BIT,
7397 VPP_HSC_TOP_INI_PHASE_WID);
7398 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_H_START_END +
7399 cur_dev->vpp_off,
7400 ((cur_frame_par->VPP_post_blend_vd_h_start_ &
7401 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
7402 ((cur_frame_par->VPP_post_blend_vd_h_end_ &
7403 VPP_VD_SIZE_MASK)
7404 << VPP_VD1_END_BIT));
7405 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
7406 cur_dev->vpp_off,
7407 ((cur_frame_par->VPP_post_blend_vd_v_start_ &
7408 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
7409 ((cur_frame_par->VPP_post_blend_vd_v_end_ &
7410 VPP_VD_SIZE_MASK)
7411 << VPP_VD1_END_BIT));
7412
7413 if ((cur_frame_par->VPP_post_blend_vd_v_end_ -
7414 cur_frame_par->VPP_post_blend_vd_v_start_ + 1) > 1080) {
7415 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
7416 cur_dev->vpp_off,
7417 ((cur_frame_par->VPP_post_blend_vd_v_start_ &
7418 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
7419 ((cur_frame_par->VPP_post_blend_vd_v_end_ &
7420 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
7421 } else {
7422 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
7423 cur_dev->vpp_off,
7424 ((0 & VPP_VD_SIZE_MASK) <<
7425 VPP_VD1_START_BIT) | ((1079 &
7426 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
7427 }
7428
7429 if (!legacy_vpp) {
7430 VSYNC_WR_MPEG_REG(
7431 VPP_PREBLEND_H_SIZE + cur_dev->vpp_off,
7432 (cur_frame_par->video_input_h << 16)
7433 | cur_frame_par->video_input_w);
7434 VSYNC_WR_MPEG_REG(
7435 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7436 ((cur_frame_par->VPP_post_blend_vd_v_end_ + 1)
7437 << 16) |
7438 cur_frame_par->VPP_post_blend_h_size_);
7439 } else {
7440 VSYNC_WR_MPEG_REG(
7441 VPP_PREBLEND_H_SIZE + cur_dev->vpp_off,
7442 cur_frame_par->VPP_line_in_length_);
7443 VSYNC_WR_MPEG_REG(
7444 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7445 cur_frame_par->VPP_post_blend_h_size_);
7446 }
7447
7448 vpp_settings_h(cur_frame_par);
7449 vpp_settings_v(cur_frame_par);
7450 if (is_dolby_vision_enable() && cur_dispbuf2) {
7451 vd2_settings_h(cur_dispbuf2);
7452 vd2_settings_v(cur_dispbuf2);
7453 }
7454 frame_par_ready_to_set = 0;
7455 frame_par_force_to_set = 0;
7456 first_set = 1;
7457 }
7458 /* VPP one time settings */
7459 wait_sync = 0;
7460
7461 if (!legacy_vpp && vinfo) {
7462 u32 read_value = VSYNC_RD_MPEG_REG(
7463 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off);
7464 if (((vinfo->field_height << 16) | vinfo->width)
7465 != read_value)
7466 VSYNC_WR_MPEG_REG(
7467 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7468 ((vinfo->field_height << 16) | vinfo->width));
7469 } else if (vinfo) {
7470 if (VSYNC_RD_MPEG_REG(
7471 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off)
7472 != vinfo->width)
7473 VSYNC_WR_MPEG_REG(
7474 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7475 vinfo->width);
7476 }
7477
7478 if (cur_dispbuf && cur_dispbuf->process_fun) {
7479 /* for new deinterlace driver */
7480#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
7481 if (debug_flag & DEBUG_FLAG_PRINT_RDMA) {
7482 if (enable_rdma_log_count > 0)
7483 pr_info("call process_fun\n");
7484 }
7485#endif
7486 cur_dispbuf->process_fun(cur_dispbuf->private_data,
7487 zoom_start_x_lines |
7488 (cur_frame_par->vscale_skip_count <<
7489 24) | (frame_par_di_set << 16),
7490 zoom_end_x_lines, zoom_start_y_lines,
7491 zoom_end_y_lines, cur_dispbuf);
7492 }
7493
7494 exit:
7495#if defined(PTS_LOGGING) || defined(PTS_TRACE_DEBUG)
7496 pts_trace++;
7497#endif
7498 vpp_misc_save = READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off);
7499 vpp_misc_set = vpp_misc_save;
7500#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM
7501 if (!is_dolby_vision_on())
7502 vpp_misc_set |= VPP_CM_ENABLE;
7503 else
7504 vpp_misc_set &= ~VPP_CM_ENABLE;
7505#endif
7506
7507 if (bypass_cm)
7508 vpp_misc_set &= ~VPP_CM_ENABLE;
7509
7510 if (update_osd_vpp_misc && legacy_vpp) {
7511 vpp_misc_set &= ~osd_vpp_misc_mask;
7512 vpp_misc_set |=
7513 (osd_vpp_misc & osd_vpp_misc_mask);
7514 if (vpp_misc_set &
7515 (VPP_OSD1_POSTBLEND | VPP_OSD2_POSTBLEND))
7516 vpp_misc_set |= VPP_POSTBLEND_EN;
7517 }
7518
7519#ifdef VIDEO_PIP
7520 if (cur_pipbuf && (video2_enabled == 1)
7521 && ((vpp_misc_save & VPP_VD2_POSTBLEND) == 0)
7522 && (video2_onoff_state == VIDEO_ENABLE_STATE_IDLE)) {
7523 vpp_misc_set |=
7524 VPP_VD2_POSTBLEND |
7525 VPP_POSTBLEND_EN;
7526 }
7527#endif
7528
7529 if ((video_enabled == 1) && ((vpp_misc_save & VPP_VD1_POSTBLEND) == 0)
7530 && (video_onoff_state == VIDEO_ENABLE_STATE_IDLE)) {
7531 vpp_misc_set |=
7532 VPP_VD1_PREBLEND |
7533 VPP_VD1_POSTBLEND |
7534 VPP_POSTBLEND_EN;
7535 }
7536 if ((video_enabled == 1) && cur_frame_par
7537 && (cur_dispbuf != &vf_local) && (first_set == 0)
7538 && (video_onoff_state == VIDEO_ENABLE_STATE_IDLE)) {
7539 struct vppfilter_mode_s *vpp_filter =
7540 &cur_frame_par->vpp_filter;
7541 u32 h_phase_step, v_phase_step;
7542
7543 h_phase_step = READ_VCBUS_REG(
7544 VPP_HSC_START_PHASE_STEP + cur_dev->vpp_off);
7545 v_phase_step = READ_VCBUS_REG(
7546 VPP_VSC_START_PHASE_STEP + cur_dev->vpp_off);
7547 if ((vpp_filter->vpp_hf_start_phase_step != h_phase_step) ||
7548 (vpp_filter->vpp_vsc_start_phase_step != v_phase_step)) {
7549 video_property_changed = 1;
7550 /*pr_info("frame info register rdma write fail!\n");*/
7551 }
7552 }
7553 if (likely(video_onoff_state != VIDEO_ENABLE_STATE_IDLE)) {
7554 /* state change for video layer enable/disable */
7555
7556 spin_lock_irqsave(&video_onoff_lock, flags);
7557
7558 if (video_onoff_state == VIDEO_ENABLE_STATE_ON_REQ) {
7559 /*
7560 * the video layer is enabled one vsync later,assumming
7561 * all registers are ready from RDMA.
7562 */
7563 video_onoff_state = VIDEO_ENABLE_STATE_ON_PENDING;
7564 } else if (video_onoff_state ==
7565 VIDEO_ENABLE_STATE_ON_PENDING) {
7566 vpp_misc_set |= VPP_VD1_PREBLEND |
7567 VPP_VD1_POSTBLEND |
7568 VPP_POSTBLEND_EN;
7569
7570 video_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7571 video_onoff_time = jiffies_to_msecs(jiffies);
7572
7573 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7574 pr_info("VsyncEnableVideoLayer\n");
7575 vpu_delay_work_flag |=
7576 VPU_VIDEO_LAYER1_CHANGED;
7577 force_flush = 1;
7578 } else if (video_onoff_state == VIDEO_ENABLE_STATE_OFF_REQ) {
7579 vpp_misc_set &= ~(VPP_VD1_PREBLEND |
7580 VPP_VD1_POSTBLEND);
7581 if (process_3d_type)
7582 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7583 VPP_VD2_POSTBLEND | VPP_PREBLEND_EN);
7584 /*auto disable sr when video off*/
7585 if (!is_meson_txl_cpu() &&
7586 !is_meson_txlx_cpu()) {
7587 VSYNC_WR_MPEG_REG(VPP_SRSHARP0_CTRL, 0);
7588 VSYNC_WR_MPEG_REG(VPP_SRSHARP1_CTRL, 0);
7589 }
7590 video_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7591 video_onoff_time = jiffies_to_msecs(jiffies);
7592 vpu_delay_work_flag |=
7593 VPU_VIDEO_LAYER1_CHANGED;
7594 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7595 pr_info("VsyncDisableVideoLayer\n");
7596 video1_off_req = 1;
7597 force_flush = 1;
7598 }
7599
7600 spin_unlock_irqrestore(&video_onoff_lock, flags);
7601 }
7602
7603 if (likely(video2_onoff_state != VIDEO_ENABLE_STATE_IDLE)) {
7604 /* state change for video layer2 enable/disable */
7605
7606 spin_lock_irqsave(&video2_onoff_lock, flags);
7607
7608 if (video2_onoff_state == VIDEO_ENABLE_STATE_ON_REQ) {
7609 /*
7610 * the video layer 2
7611 * is enabled one vsync later, assumming
7612 * all registers are ready from RDMA.
7613 */
7614 video2_onoff_state = VIDEO_ENABLE_STATE_ON_PENDING;
7615 } else if (video2_onoff_state ==
7616 VIDEO_ENABLE_STATE_ON_PENDING) {
7617 if (is_dolby_vision_on())
7618 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7619 VPP_VD2_POSTBLEND | VPP_PREBLEND_EN);
7620 else if (process_3d_type ||
7621 (cur_dispbuf &&
7622 (cur_dispbuf->type & VIDTYPE_MVC)))
7623 vpp_misc_set |= VPP_VD2_PREBLEND |
7624 VPP_PREBLEND_EN;
7625 else if (!legacy_vpp)
7626 vpp_misc_set |= VPP_VD2_POSTBLEND |
7627 VPP_POSTBLEND_EN;
7628 else
7629 vpp_misc_set |= VPP_VD2_PREBLEND |
7630 VPP_PREBLEND_EN;
7631#ifdef VIDEO_PIP
7632 if (cur_pipbuf) {
7633 vpp_misc_set &=
7634 ~(VPP_PREBLEND_EN | VPP_VD2_PREBLEND);
7635 vpp_misc_set |= VPP_VD2_POSTBLEND;
7636 }
7637#endif
7638 /* g12a has no alpha overflow check in hardware */
7639 if (!legacy_vpp)
7640 vpp_misc_set |= (0x100 << VPP_VD2_ALPHA_BIT);
7641 else
7642 vpp_misc_set |= (0x1ff << VPP_VD2_ALPHA_BIT);
7643 video2_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7644 video_onoff_time = jiffies_to_msecs(jiffies);
7645
7646 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7647 pr_info("VsyncEnableVideoLayer2\n");
7648 force_flush = 1;
7649 } else if (video2_onoff_state == VIDEO_ENABLE_STATE_OFF_REQ) {
7650 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7651 VPP_VD2_POSTBLEND | VPP_PREBLEND_EN
7652 | (0x1ff << VPP_VD2_ALPHA_BIT));
7653 video2_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7654 video_onoff_time = jiffies_to_msecs(jiffies);
7655
7656 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7657 pr_info("VsyncDisableVideoLayer2\n");
7658 video2_off_req = 1;
7659 force_flush = 1;
7660 }
7661 spin_unlock_irqrestore(&video2_onoff_lock, flags);
7662 }
7663
7664 if (video_global_output == 0) {
7665 video_enabled = 0;
7666 vpp_misc_set &= ~(VPP_VD1_PREBLEND |
7667 VPP_VD2_PREBLEND |
7668 VPP_VD2_POSTBLEND |
7669 VPP_VD1_POSTBLEND |
7670 VPP_PREBLEND_EN);
7671#ifdef VIDEO_PIP
7672 /* should keep video2 display */
7673 if (cur_pipbuf && video2_enabled)
7674 vpp_misc_set |= VPP_VD2_POSTBLEND;
7675#endif
7676 } else {
7677 video_enabled = video_status_saved;
7678 }
7679
7680 if (!video_enabled &&
7681 (vpp_misc_set & VPP_VD1_POSTBLEND))
7682 vpp_misc_set &= ~(VPP_VD1_PREBLEND |
7683 VPP_VD1_POSTBLEND |
7684 VPP_PREBLEND_EN);
7685
7686#ifdef VIDEO_PIP
7687 if (pip_global_output == 0) {
7688 video2_enabled = 0;
7689 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7690 VPP_VD2_POSTBLEND);
7691 } else {
7692 video2_enabled = video2_status_saved;
7693 }
7694
7695 if (!video2_enabled &&
7696 (vpp_misc_set & VPP_VD2_POSTBLEND))
7697 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7698 VPP_VD2_POSTBLEND);
7699#endif
7700
7701 if (!legacy_vpp) {
7702 u32 set_value = 0;
7703 force_flush |= vpp_zorder_check();
7704
7705 /* for sr core0, put it between prebld & pps as default */
7706 if (cur_frame_par &&
7707 (cur_frame_par->sr_core_support &
7708 SUPER_CORE0_SUPPORT))
7709 if (cur_frame_par->sr0_position)
7710 vpp_misc_set |=
7711 PREBLD_SR0_VD1_SCALER;
7712 else
7713 vpp_misc_set &=
7714 ~SR0_AFTER_DNLP;
7715 else
7716 vpp_misc_set |=
7717 PREBLD_SR0_VD1_SCALER;
7718 /* for sr core1, put it before post blend as default */
7719 if (cur_frame_par &&
7720 (cur_frame_par->sr_core_support &
7721 SUPER_CORE1_SUPPORT))
7722 if (cur_frame_par->sr1_position)
7723 vpp_misc_set |=
7724 DNLP_SR1_CM;
7725 else
7726 vpp_misc_set &=
7727 ~SR1_AFTER_POSTBLEN;
7728 else
7729 vpp_misc_set |=
7730 DNLP_SR1_CM;
7731
7732 vpp_misc_set &=
7733 ((1 << 29) | VPP_CM_ENABLE |
7734 (0x1ff << VPP_VD2_ALPHA_BIT) |
7735 VPP_VD2_PREBLEND |
7736 VPP_VD1_PREBLEND |
7737 VPP_VD2_POSTBLEND |
7738 VPP_VD1_POSTBLEND |
7739 VPP_PREBLEND_EN |
7740 VPP_POSTBLEND_EN |
7741 0xf);
7742
7743 /* if vd2 is bottom layer, need remove alpha for vd2 */
7744 if (((vpp_misc_set & VPP_VD1_POSTBLEND) == 0)
7745 && (vpp_misc_set & VPP_VD2_POSTBLEND)) {
7746 vpp_misc_set &= ~(0x1ff << VPP_VD2_ALPHA_BIT);
7747 vpp_misc_set |= (0x100 << VPP_VD2_ALPHA_BIT);
7748 }
7749
7750 vpp_misc_save &=
7751 ((1 << 29) | VPP_CM_ENABLE |
7752 (0x1ff << VPP_VD2_ALPHA_BIT) |
7753 VPP_VD2_PREBLEND |
7754 VPP_VD1_PREBLEND |
7755 VPP_VD2_POSTBLEND |
7756 VPP_VD1_POSTBLEND |
7757 VPP_PREBLEND_EN |
7758 VPP_POSTBLEND_EN |
7759 0xf);
7760 if ((vpp_misc_set != vpp_misc_save)
7761 || force_flush) {
7762 u32 port_val[3] = {0, 0, 0};
7763 u32 vd1_port, vd2_port, icnt;
7764 u32 post_blend_reg[3] = {
7765 VD1_BLEND_SRC_CTRL,
7766 VD2_BLEND_SRC_CTRL,
7767 OSD2_BLEND_SRC_CTRL
7768 };
7769
7770 /* just reset the select port */
7771 if ((glayer_info[0].cur_sel_port > 2)
7772 || (glayer_info[1].cur_sel_port > 2)) {
7773 glayer_info[0].cur_sel_port = 0;
7774 glayer_info[1].cur_sel_port = 1;
7775 }
7776
7777 vd1_port = glayer_info[0].cur_sel_port;
7778 vd2_port = glayer_info[1].cur_sel_port;
7779
7780 /* post bld premult*/
7781 port_val[0] |= (1 << 16);
7782
7783 /* vd2 path sel */
7784 if (vpp_misc_set & VPP_VD2_POSTBLEND)
7785 port_val[1] |= (1 << 20);
7786 else
7787 port_val[1] &= ~(1 << 20);
7788
7789 /* osd2 path sel */
7790 port_val[2] |= (1 << 20);
7791
7792 if (vpp_misc_set & VPP_VD1_POSTBLEND) {
7793 /* post src */
7794 port_val[vd1_port] |= (1 << 8);
7795 port_val[0] |=
7796 ((1 << 4) | /* pre bld premult*/
7797 (1 << 0)); /* pre bld src 1 */
7798 } else
7799 port_val[0] &= ~0xff;
7800
7801 if (vpp_misc_set & VPP_VD2_POSTBLEND)
7802 /* post src */
7803 port_val[vd2_port] |= (2 << 8);
7804 else if (vpp_misc_set & VPP_VD2_PREBLEND)
7805 port_val[1] |=
7806 ((1 << 4) | /* pre bld premult*/
7807 (2 << 0)); /* pre bld src 1 */
7808
7809 for (icnt = 0; icnt < 3; icnt++)
7810 VSYNC_WR_MPEG_REG(
7811 post_blend_reg[icnt]
7812 + cur_dev->vpp_off,
7813 port_val[icnt]);
7814
7815 set_value = vpp_misc_set;
7816 set_value &=
7817 ((1 << 29) | VPP_CM_ENABLE |
7818 (0x1ff << VPP_VD2_ALPHA_BIT) |
7819 VPP_VD2_PREBLEND |
7820 VPP_VD1_PREBLEND |
7821 VPP_VD2_POSTBLEND |
7822 VPP_VD1_POSTBLEND |
7823 0xf);
7824 if ((vpp_misc_set & VPP_VD2_PREBLEND)
7825 && (vpp_misc_set & VPP_VD1_PREBLEND))
7826 set_value |= VPP_PREBLEND_EN;
7827 if (bypass_cm)
7828 set_value &= ~VPP_CM_ENABLE;
7829 set_value |= VPP_POSTBLEND_EN;
7830 VSYNC_WR_MPEG_REG(
7831 VPP_MISC + cur_dev->vpp_off,
7832 set_value);
7833 }
7834 } else if (vpp_misc_save != vpp_misc_set)
7835 VSYNC_WR_MPEG_REG(
7836 VPP_MISC + cur_dev->vpp_off,
7837 vpp_misc_set);
7838
7839 /*vpp_misc_set maybe have same,but need off.*/
7840 /* if vd1 off, disable vd2 also */
7841#ifdef VIDEO_PIP
7842 if (video2_off_req && cur_pipbuf) {
7843 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
7844 && video2_off_req)
7845 pr_info("VD2 AFBC off now.\n");
7846 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
7847 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG, 0);
7848 if (!legacy_vpp) {
7849 VSYNC_WR_MPEG_REG(
7850 VD2_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7851 }
7852 if (cur_pipbuf && (cur_pipbuf == &local_pip))
7853 cur_pipbuf = NULL;
7854 } else if (!cur_pipbuf &&
7855 (video2_off_req || video1_off_req)) {
7856 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
7857 && video2_off_req)
7858 pr_info("VD2 AFBC off now.\n");
7859 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
7860 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG, 0);
7861 if (!legacy_vpp) {
7862 VSYNC_WR_MPEG_REG(
7863 VD2_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7864 }
7865 last_el_w = 0;
7866 last_el_status = 0;
7867 if (cur_dispbuf2 && (cur_dispbuf2 == &vf_local2))
7868 cur_dispbuf2 = NULL;
7869 need_disable_vd2 = false;
7870 }
7871#else
7872 if (video2_off_req || video1_off_req) {
7873 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
7874 && video2_off_req)
7875 pr_info("VD2 AFBC off now.\n");
7876 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
7877 VSYNC_WR_MPEG_REG(
7878 VD2_IF0_GEN_REG + cur_dev->viu_off, 0);
7879 if (!legacy_vpp) {
7880 VSYNC_WR_MPEG_REG(
7881 VD2_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7882 }
7883 last_el_w = 0;
7884 last_el_status = 0;
7885 if (cur_dispbuf2 && (cur_dispbuf2 == &vf_local2))
7886 cur_dispbuf2 = NULL;
7887 need_disable_vd2 = false;
7888 }
7889#endif
7890
7891 if (video1_off_req) {
7892 /*
7893 * video layer off, swith off afbc,
7894 * will enabled on new frame coming.
7895 */
7896 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7897 pr_info("AFBC off now.\n");
7898 VSYNC_WR_MPEG_REG(AFBC_ENABLE, 0);
7899 VSYNC_WR_MPEG_REG(
7900 VD1_IF0_GEN_REG + cur_dev->viu_off, 0);
7901 if (!legacy_vpp) {
7902 VSYNC_WR_MPEG_REG(
7903 VD1_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7904 }
7905 if (is_dolby_vision_enable()) {
7906 if (is_meson_txlx_stbmode() ||
7907 is_meson_gxm())
7908 VSYNC_WR_MPEG_REG_BITS(
7909 VIU_MISC_CTRL1,
7910 1, 16, 1); /* bypass core1 */
7911 else if (is_meson_g12a_cpu()
7912 || is_meson_g12b_cpu())
7913 VSYNC_WR_MPEG_REG_BITS(
7914 DOLBY_PATH_CTRL, 1, 0, 1);
7915 }
7916 if (cur_dispbuf && (cur_dispbuf == &vf_local))
7917 cur_dispbuf = NULL;
7918 }
7919#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
7920 cur_rdma_buf = cur_dispbuf;
7921#ifdef VIDEO_PIP
7922 pip_rdma_buf = cur_pipbuf;
7923#endif
7924 /* vsync_rdma_config(); */
7925 vsync_rdma_process();
7926 if (debug_flag & DEBUG_FLAG_PRINT_RDMA) {
7927 if (enable_rdma_log_count == 0)
7928 enable_rdma_log(0);
7929 }
7930 rdma_enable_pre = is_vsync_rdma_enable();
7931#endif
7932
7933 if (timer_count > 50) {
7934 timer_count = 0;
7935 video_notify_flag |= VIDEO_NOTIFY_FRAME_WAIT;
7936#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
7937 if ((video_scaler_mode) && (scaler_pos_changed)) {
7938 video_notify_flag |= VIDEO_NOTIFY_POS_CHANGED;
7939 scaler_pos_changed = 0;
7940 } else {
7941 scaler_pos_changed = 0;
7942 video_notify_flag &= ~VIDEO_NOTIFY_POS_CHANGED;
7943 }
7944#endif
7945 }
7946
7947 switch (READ_VCBUS_REG(VPU_VIU_VENC_MUX_CTRL) & 0x3) {
7948 case 0:
7949 enc_line = (READ_VCBUS_REG(ENCL_INFO_READ) >> 16) & 0x1fff;
7950 break;
7951 case 1:
7952 enc_line = (READ_VCBUS_REG(ENCI_INFO_READ) >> 16) & 0x1fff;
7953 break;
7954 case 2:
7955 enc_line = (READ_VCBUS_REG(ENCP_INFO_READ) >> 16) & 0x1fff;
7956 break;
7957 case 3:
7958 enc_line = (READ_VCBUS_REG(ENCT_INFO_READ) >> 16) & 0x1fff;
7959 break;
7960 }
7961 if (enc_line > vsync_exit_line_max)
7962 vsync_exit_line_max = enc_line;
7963
7964#ifdef FIQ_VSYNC
7965 if (video_notify_flag)
7966 fiq_bridge_pulse_trigger(&vsync_fiq_bridge);
7967#else
7968 if (video_notify_flag)
7969 vsync_notify();
7970
7971 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
7972 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) && !is_meson_mtvd_cpu()) {
7973 if (vpu_delay_work_flag)
7974 schedule_work(&vpu_delay_work);
7975 }
7976 /* #endif */
7977
7978 return IRQ_HANDLED;
7979#endif
7980
7981}
7982
7983
7984#ifdef FIQ_VSYNC
7985void vsync_fisr(void)
7986{
7987 atomic_set(&video_inirq_flag, 1);
7988 vsync_fisr_in();
7989 atomic_set(&video_inirq_flag, 0);
7990}
7991#else
7992static irqreturn_t vsync_isr(int irq, void *dev_id)
7993{
7994 irqreturn_t ret;
7995
7996 atomic_set(&video_inirq_flag, 1);
7997 ret = vsync_isr_in(irq, dev_id);
7998 atomic_set(&video_inirq_flag, 0);
7999 return ret;
8000}
8001#endif
8002
8003
8004/*********************************************************
8005 * FIQ Routines
8006 *********************************************************/
8007
8008static void vsync_fiq_up(void)
8009{
8010#ifdef FIQ_VSYNC
8011 request_fiq(INT_VIU_VSYNC, &vsync_fisr);
8012#else
8013 int r;
8014 /*TODO irq */
8015 r = request_irq(video_vsync, &vsync_isr,
8016 IRQF_SHARED, "vsync", (void *)video_dev_id);
8017
8018#ifdef CONFIG_MESON_TRUSTZONE
8019 if (num_online_cpus() > 1)
8020 irq_set_affinity(INT_VIU_VSYNC, cpumask_of(1));
8021#endif
8022#endif
8023}
8024
8025static void vsync_fiq_down(void)
8026{
8027#ifdef FIQ_VSYNC
8028 free_fiq(INT_VIU_VSYNC, &vsync_fisr);
8029#else
8030 /*TODO irq */
8031 free_irq(video_vsync, (void *)video_dev_id);
8032#endif
8033}
8034
8035#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
8036static void vsync2_fiq_up(void)
8037{
8038 int r;
8039
8040 r = request_irq(INT_VIU2_VSYNC, &vsync_isr,
8041 IRQF_SHARED, "vsync", (void *)video_dev_id2);
8042}
8043
8044static void vsync2_fiq_down(void)
8045{
8046 free_irq(INT_VIU2_VSYNC, (void *)video_dev_id2);
8047}
8048
8049#endif
8050
8051int get_curren_frame_para(int *top, int *left, int *bottom, int *right)
8052{
8053 if (!cur_frame_par)
8054 return -1;
8055 *top = cur_frame_par->VPP_vd_start_lines_;
8056 *left = cur_frame_par->VPP_hd_start_lines_;
8057 *bottom = cur_frame_par->VPP_vd_end_lines_;
8058 *right = cur_frame_par->VPP_hd_end_lines_;
8059 return 0;
8060}
8061
8062int get_current_vscale_skip_count(struct vframe_s *vf)
8063{
8064 int ret = 0;
8065 static struct vpp_frame_par_s frame_par;
8066
8067 vpp_set_filters(
8068 &glayer_info[0],
8069 vf, &frame_par, vinfo,
8070 (is_dolby_vision_on() &&
8071 is_dolby_vision_stb_mode()));
8072 ret = frame_par.vscale_skip_count;
8073 if (cur_frame_par && (process_3d_type & MODE_3D_ENABLE))
8074 ret |= (cur_frame_par->vpp_3d_mode<<8);
8075 return ret;
8076}
8077
8078int query_video_status(int type, int *value)
8079{
8080 if (value == NULL)
8081 return -1;
8082 switch (type) {
8083 case 0:
8084 *value = trickmode_fffb;
8085 break;
8086 case 1:
8087 *value = trickmode_i;
8088 break;
8089 default:
8090 break;
8091 }
8092 return 0;
8093}
8094EXPORT_SYMBOL(query_video_status);
8095
8096static void video_vf_unreg_provider(void)
8097{
8098 ulong flags;
8099 struct vframe_s *el_vf = NULL;
8100 int keeped = 0;
8101 new_frame_count = 0;
8102 first_frame_toggled = 0;
8103 videopeek = 0;
8104 nopostvideostart = false;
8105
8106 atomic_set(&video_unreg_flag, 1);
8107 while (atomic_read(&video_inirq_flag) > 0)
8108 schedule();
8109 memset(&video_frame_detect, 0,
8110 sizeof(struct video_frame_detect_s));
8111 frame_detect_drop_count = 0;
8112 frame_detect_receive_count = 0;
8113 spin_lock_irqsave(&lock, flags);
8114
8115#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8116 dispbuf_to_put_num = DISPBUF_TO_PUT_MAX;
8117 while (dispbuf_to_put_num > 0) {
8118 dispbuf_to_put_num--;
8119 dispbuf_to_put[dispbuf_to_put_num] = NULL;
8120 }
8121 cur_rdma_buf = NULL;
8122#endif
8123 if (cur_dispbuf) {
8124 vf_local = *cur_dispbuf;
8125 cur_dispbuf = &vf_local;
8126 cur_dispbuf->video_angle = 0;
8127 }
8128 if (cur_dispbuf2)
8129 need_disable_vd2 = true;
8130 if (is_dolby_vision_enable()) {
8131 if (cur_dispbuf2 == &vf_local2)
8132 cur_dispbuf2 = NULL;
8133 else if (cur_dispbuf2 != NULL) {
8134 vf_local2 = *cur_dispbuf2;
8135 el_vf = &vf_local2;
8136 }
8137 cur_dispbuf2 = NULL;
8138 }
8139 if (trickmode_fffb) {
8140 atomic_set(&trickmode_framedone, 0);
8141 to_notify_trick_wait = false;
8142 }
8143
8144 vsync_pts_100 = 0;
8145 vsync_pts_112 = 0;
8146 vsync_pts_125 = 0;
8147 vsync_freerun = 0;
8148 vsync_pts_align = 0;
8149 vsync_pts_aligned = false;
8150
8151#ifdef VIDEO_PIP
8152 if (pip_loop) {
8153#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8154 pipbuf_to_put = NULL;
8155 pip_rdma_buf = NULL;
8156#endif
8157 if (cur_pipbuf) {
8158 local_pip = *cur_pipbuf;
8159 cur_pipbuf = &local_pip;
8160 cur_pipbuf->video_angle = 0;
8161 }
8162 pip_frame_count = 0;
8163 }
8164#endif
8165 spin_unlock_irqrestore(&lock, flags);
8166
8167#ifdef VIDEO_PIP
8168 if (pip_loop) {
8169 disable_videopip = VIDEO_DISABLE_FORNEXT;
8170 DisableVideoLayer2();
8171 }
8172#endif
8173
8174 if (blackout | force_blackout) {
8175 safe_disble_videolayer();
8176 try_free_keep_video(1);
8177 }
8178
8179#ifdef CONFIG_GE2D_KEEP_FRAME
8180 if (cur_dispbuf) {
8181 /* TODO: mod gate */
8182 /* switch_mod_gate_by_name("ge2d", 1); */
8183 keeped = vf_keep_current(cur_dispbuf, el_vf);
8184 /* TODO: mod gate */
8185 /* switch_mod_gate_by_name("ge2d", 0); */
8186 }
8187 if ((hdmi_in_onvideo == 0) && (video_start_post)) {
8188 tsync_avevent(VIDEO_STOP, 0);
8189 video_start_post = false;
8190 }
8191#else
8192 /* if (!trickmode_fffb) */
8193 if (cur_dispbuf)
8194 keeped = vf_keep_current(cur_dispbuf, el_vf);
8195 if ((hdmi_in_onvideo == 0) && (video_start_post)) {
8196 tsync_avevent(VIDEO_STOP, 0);
8197 video_start_post = false;
8198 }
8199#endif
8200 if (keeped < 0) {/*keep failed.*/
8201 pr_info("video keep failed, disable video now!\n");
8202 safe_disble_videolayer();
8203 try_free_keep_video(1);
8204 }
8205 atomic_set(&video_unreg_flag, 0);
8206 pr_info("VD1 AFBC 0x%x.\n", READ_VCBUS_REG(AFBC_ENABLE));
8207 enable_video_discontinue_report = 1;
8208 show_first_picture = false;
8209 show_first_frame_nosync = false;
8210
8211#ifdef PTS_LOGGING
8212 {
8213 int pattern;
8214 /* Print what we have right now*/
8215 if (pts_pattern_detected >= PTS_32_PATTERN &&
8216 pts_pattern_detected < PTS_MAX_NUM_PATTERNS) {
8217 pr_info("pattern detected = %d, pts_enter_pattern_cnt =%d, pts_exit_pattern_cnt =%d",
8218 pts_pattern_detected,
8219 pts_pattern_enter_cnt[pts_pattern_detected],
8220 pts_pattern_exit_cnt[pts_pattern_detected]);
8221 }
8222 /* Reset all metrics now*/
8223 for (pattern = 0; pattern < PTS_MAX_NUM_PATTERNS; pattern++) {
8224 pts_pattern[pattern] = 0;
8225 pts_pattern_exit_cnt[pattern] = 0;
8226 pts_pattern_enter_cnt[pattern] = 0;
8227 }
8228 /* Reset 4:1 data*/
8229 memset(&pts_41_pattern_sink[0], 0, PTS_41_PATTERN_SINK_MAX);
8230 pts_pattern_detected = -1;
8231 pre_pts_trace = 0;
8232 pts_escape_vsync = 0;
8233 }
8234#endif
8235}
8236
8237static void video_vf_light_unreg_provider(int need_keep_frame)
8238{
8239 ulong flags;
8240
8241 if (need_keep_frame) {
8242 /* wait for the end of the last toggled frame*/
8243 atomic_set(&video_unreg_flag, 1);
8244 while (atomic_read(&video_inirq_flag) > 0)
8245 schedule();
8246 }
8247
8248 spin_lock_irqsave(&lock, flags);
8249#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8250 dispbuf_to_put_num = DISPBUF_TO_PUT_MAX;
8251 while (dispbuf_to_put_num > 0) {
8252 dispbuf_to_put_num--;
8253 dispbuf_to_put[dispbuf_to_put_num] = NULL;
8254 }
8255 cur_rdma_buf = NULL;
8256#endif
8257
8258 if (cur_dispbuf) {
8259 vf_local = *cur_dispbuf;
8260 cur_dispbuf = &vf_local;
8261 }
8262 spin_unlock_irqrestore(&lock, flags);
8263
8264 if (need_keep_frame) {
8265 /* keep the last toggled frame*/
8266 if (cur_dispbuf) {
8267 unsigned int result;
8268
8269 result = vf_keep_current(cur_dispbuf, NULL);
8270 if (result == 0)
8271 pr_info("%s: keep cur_disbuf failed\n",
8272 __func__);
8273 }
8274 atomic_set(&video_unreg_flag, 0);
8275 }
8276}
8277
8278static int get_display_info(void *data)
8279{
8280 s32 w, h, x, y;
8281 struct vdisplay_info_s *info_para = (struct vdisplay_info_s *)data;
8282 const struct vinfo_s *info = get_current_vinfo();
8283 struct disp_info_s *layer = &glayer_info[0];
8284
8285 if ((!cur_frame_par) || (!info))
8286 return -1;
8287
8288 x = layer->layer_left;
8289 y = layer->layer_top;
8290 w = layer->layer_width;
8291 h = layer->layer_height;
8292
8293 if ((w == 0) || (w > info->width))
8294 w = info->width;
8295 if ((h == 0) || (h > info->height))
8296 h = info->height;
8297
8298 info_para->frame_hd_start_lines_ = cur_frame_par->VPP_hd_start_lines_;
8299 info_para->frame_hd_end_lines_ = cur_frame_par->VPP_hd_end_lines_;
8300 info_para->frame_vd_start_lines_ = cur_frame_par->VPP_vd_start_lines_;
8301 info_para->frame_vd_end_lines_ = cur_frame_par->VPP_vd_end_lines_;
8302 info_para->display_hsc_startp = cur_frame_par->VPP_hsc_startp - x;
8303 info_para->display_hsc_endp =
8304 cur_frame_par->VPP_hsc_endp + (info->width - x - w);
8305 info_para->display_vsc_startp = cur_frame_par->VPP_vsc_startp - y;
8306 info_para->display_vsc_endp =
8307 cur_frame_par->VPP_vsc_endp + (info->height - y - h);
8308 info_para->screen_vd_h_start_ =
8309 cur_frame_par->VPP_post_blend_vd_h_start_;
8310 info_para->screen_vd_h_end_ =
8311 cur_frame_par->VPP_post_blend_vd_h_end_;
8312 info_para->screen_vd_v_start_ =
8313 cur_frame_par->VPP_post_blend_vd_v_start_;
8314 info_para->screen_vd_v_end_ = cur_frame_par->VPP_post_blend_vd_v_end_;
8315
8316 return 0;
8317}
8318#if ENABLE_UPDATE_HDR_FROM_USER
8319void init_hdr_info(void)
8320{
8321 unsigned long flags;
8322
8323 spin_lock_irqsave(&omx_hdr_lock, flags);
8324
8325 has_hdr_info = false;
8326 memset(&vf_hdr, 0, sizeof(vf_hdr));
8327
8328 spin_unlock_irqrestore(&omx_hdr_lock, flags);
8329}
8330#endif
8331static int video_receiver_event_fun(int type, void *data, void *private_data)
8332{
8333#ifdef CONFIG_AM_VIDEO2
8334 char *provider_name;
8335#endif
8336 if (type == VFRAME_EVENT_PROVIDER_UNREG) {
8337 video_vf_unreg_provider();
8338#ifdef CONFIG_AM_VIDEO2
8339 set_clone_frame_rate(android_clone_rate, 200);
8340#endif
8341 drop_frame_count = 0;
8342 receive_frame_count = 0;
8343 display_frame_count = 0;
8344 //init_hdr_info();
8345
8346 } else if (type == VFRAME_EVENT_PROVIDER_RESET) {
8347 video_vf_light_unreg_provider(1);
8348 } else if (type == VFRAME_EVENT_PROVIDER_LIGHT_UNREG)
8349 video_vf_light_unreg_provider(0);
8350 else if (type == VFRAME_EVENT_PROVIDER_REG) {
8351 enable_video_discontinue_report = 1;
8352 drop_frame_count = 0;
8353 receive_frame_count = 0;
8354 display_frame_count = 0;
8355 omx_run = false;
8356 omx_pts_set_from_hwc_count = 0;
8357 omx_check_previous_session = true;
8358 omx_need_drop_frame_num = 0;
8359 omx_drop_done = false;
8360 omx_pts_set_index = 0;
8361 //init_hdr_info();
8362
8363#ifdef CONFIG_AM_VIDEO2
8364 provider_name = (char *)data;
8365 if (strncmp(provider_name, "decoder", 7) == 0
8366 || strncmp(provider_name, "ppmgr", 5) == 0
8367 || strncmp(provider_name, "deinterlace", 11) == 0
8368 || strncmp(provider_name, "d2d3", 11) == 0) {
8369 set_clone_frame_rate(noneseamless_play_clone_rate, 0);
8370 set_clone_frame_rate(video_play_clone_rate, 100);
8371 }
8372#endif
8373/*notify di 3d mode is frame*/
8374/*alternative mode,passing two buffer in one frame */
8375 if (platform_type == 1) {
8376 if ((process_3d_type & MODE_3D_FA) &&
8377 !cur_dispbuf->trans_fmt)
8378 vf_notify_receiver_by_name("deinterlace",
8379 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE,
8380 (void *)1);
8381 }
8382
8383 video_vf_light_unreg_provider(0);
8384 } else if (type == VFRAME_EVENT_PROVIDER_FORCE_BLACKOUT) {
8385 force_blackout = 1;
8386 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
8387 pr_info("%s VFRAME_EVENT_PROVIDER_FORCE_BLACKOUT\n",
8388 __func__);
8389 }
8390 } else if (type == VFRAME_EVENT_PROVIDER_FR_HINT) {
8391#ifdef CONFIG_AM_VOUT
8392 if ((data != NULL) && (video_seek_flag == 0)) {
8393 set_vframe_rate_hint((unsigned long)data);
8394 omx_pts_dv_upper = DUR2PTS((unsigned long)data) * 3 / 2;
8395 omx_pts_dv_lower = 0 - DUR2PTS((unsigned long)data);
8396 }
8397#endif
8398 } else if (type == VFRAME_EVENT_PROVIDER_FR_END_HINT) {
8399#ifdef CONFIG_AM_VOUT
8400 if (video_seek_flag == 0) {
8401 set_vframe_rate_end_hint();
8402 omx_pts_dv_upper = OMX_PTS_DV_DEFAULT_UPPER;
8403 omx_pts_dv_lower = OMX_PTS_DV_DEFAULT_LOWER;
8404 }
8405#endif
8406 } else if (type == VFRAME_EVENT_PROVIDER_QUREY_DISPLAY_INFO) {
8407 get_display_info(data);
8408 } else if (type == VFRAME_EVENT_PROVIDER_PROPERTY_CHANGED)
8409 video_property_changed = 1;
8410 return 0;
8411}
8412
8413#ifdef VIDEO_PIP
8414static void pip_vf_unreg_provider(void)
8415{
8416 ulong flags;
8417
8418 /* atomic_set(&video_unreg_flag, 1); */
8419 while (atomic_read(&video_inirq_flag) > 0)
8420 schedule();
8421 spin_lock_irqsave(&lock, flags);
8422
8423#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8424 pipbuf_to_put = NULL;
8425 pip_rdma_buf = NULL;
8426#endif
8427 if (cur_pipbuf) {
8428 local_pip = *cur_pipbuf;
8429 cur_pipbuf = &local_pip;
8430 cur_pipbuf->video_angle = 0;
8431 }
8432 pip_frame_count = 0;
8433 spin_unlock_irqrestore(&lock, flags);
8434
8435 disable_videopip = VIDEO_DISABLE_FORNEXT;
8436 DisableVideoLayer2();
8437}
8438
8439static void pip_vf_light_unreg_provider(void)
8440{
8441 ulong flags;
8442
8443 spin_lock_irqsave(&lock, flags);
8444#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8445 pipbuf_to_put = NULL;
8446 pip_rdma_buf = NULL;
8447#endif
8448
8449 if (cur_pipbuf) {
8450 local_pip = *cur_pipbuf;
8451 cur_pipbuf = &local_pip;
8452 }
8453 spin_unlock_irqrestore(&lock, flags);
8454}
8455
8456static int pip_receiver_event_fun(
8457 int type, void *data, void *private_data)
8458{
8459 if (type == VFRAME_EVENT_PROVIDER_UNREG)
8460 pip_vf_unreg_provider();
8461 else if (type == VFRAME_EVENT_PROVIDER_RESET)
8462 pip_vf_light_unreg_provider();
8463 else if (type == VFRAME_EVENT_PROVIDER_LIGHT_UNREG)
8464 pip_vf_light_unreg_provider();
8465 else if (type == VFRAME_EVENT_PROVIDER_REG)
8466 pip_vf_light_unreg_provider();
8467 return 0;
8468}
8469#endif
8470
8471unsigned int get_post_canvas(void)
8472{
8473 return post_canvas;
8474}
8475EXPORT_SYMBOL(get_post_canvas);
8476
8477
8478u32 get_blackout_policy(void)
8479{
8480 return blackout | force_blackout;
8481}
8482EXPORT_SYMBOL(get_blackout_policy);
8483
8484u32 set_blackout_policy(int policy)
8485{
8486 blackout = policy;
8487 return 0;
8488}
8489EXPORT_SYMBOL(set_blackout_policy);
8490
8491u8 is_vpp_postblend(void)
8492{
8493 if (READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off) & VPP_VD1_POSTBLEND)
8494 return 1;
8495 return 0;
8496}
8497EXPORT_SYMBOL(is_vpp_postblend);
8498
8499void pause_video(unsigned char pause_flag)
8500{
8501 atomic_set(&video_pause_flag, pause_flag ? 1 : 0);
8502}
8503EXPORT_SYMBOL(pause_video);
8504/*********************************************************
8505 * Utilities
8506 *********************************************************/
8507int _video_set_disable(u32 val)
8508{
8509 if (val > VIDEO_DISABLE_FORNEXT)
8510 return -EINVAL;
8511
8512 disable_video = val;
8513
8514 if (disable_video != VIDEO_DISABLE_NONE) {
8515 safe_disble_videolayer();
8516
8517 if ((disable_video == VIDEO_DISABLE_FORNEXT) && cur_dispbuf
8518 && (cur_dispbuf != &vf_local))
8519 video_property_changed = 1;
8520 try_free_keep_video(0);
8521 } else {
8522 if (cur_dispbuf && (cur_dispbuf != &vf_local)) {
8523 EnableVideoLayer();
8524 video_property_changed = 1;
8525 }
8526 }
8527
8528 return 0;
8529}
8530
8531static void _set_video_crop(
8532 struct disp_info_s *layer, int *p)
8533{
8534 int last_l, last_r, last_t, last_b;
8535 int new_l, new_r, new_t, new_b;
8536
8537 if (!layer)
8538 return;
8539
8540 last_t = layer->crop_top;
8541 last_l = layer->crop_left;
8542 last_b = layer->crop_bottom;
8543 last_r = layer->crop_right;
8544
8545 new_t = layer->crop_top = p[0];
8546 new_l = layer->crop_left = p[1];
8547 new_b = layer->crop_bottom = p[2];
8548 new_r = layer->crop_right = p[3];
8549 if ((new_t != last_t) || (new_l != last_l)
8550 || (new_b != last_b) || (new_r != last_r)) {
8551 if (layer->layer_id == 0)
8552 video_property_changed = 1;
8553#ifdef VIDEO_PIP
8554 else if (layer->layer_id == 1)
8555 pip_property_changed = 1;
8556#endif
8557 }
8558}
8559
8560static void _set_video_window(
8561 struct disp_info_s *layer, int *p)
8562{
8563 int w, h;
8564 int *parsed = p;
8565 int last_x, last_y, last_w, last_h;
8566 int new_x, new_y, new_w, new_h;
8567#ifdef TV_REVERSE
8568 int temp, temp1;
8569 const struct vinfo_s *info = get_current_vinfo();
8570#endif
8571
8572 if (!layer)
8573 return;
8574
8575#ifdef TV_REVERSE
8576 /* FIXME: use layer info */
8577 if (reverse) {
8578 temp = parsed[0];
8579 temp1 = parsed[1];
8580 parsed[0] = info->width - parsed[2] - 1;
8581 parsed[1] = info->height - parsed[3] - 1;
8582 parsed[2] = info->width - temp - 1;
8583 parsed[3] = info->height - temp1 - 1;
8584 }
8585#endif
8586
8587 last_x = layer->layer_left;
8588 last_y = layer->layer_top;
8589 last_w = layer->layer_width;
8590 last_h = layer->layer_height;
8591
8592 if (parsed[0] < 0 && parsed[2] < 2) {
8593 parsed[2] = 2;
8594 parsed[0] = 0;
8595 }
8596 if (parsed[1] < 0 && parsed[3] < 2) {
8597 parsed[3] = 2;
8598 parsed[1] = 0;
8599 }
8600 w = parsed[2] - parsed[0] + 1;
8601 h = parsed[3] - parsed[1] + 1;
8602
8603#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
8604 if (video_scaler_mode) {
8605 if ((w == 1) && (h == 1)) {
8606 w = 0;
8607 h = 0;
8608 }
8609 if ((content_left != parsed[0]) || (content_top != parsed[1])
8610 || (content_w != w) || (content_h != h))
8611 scaler_pos_changed = 1;
8612 content_left = parsed[0];
8613 content_top = parsed[1];
8614 content_w = w;
8615 content_h = h;
8616 /* video_notify_flag =*/
8617 /*video_notify_flag|VIDEO_NOTIFY_POS_CHANGED; */
8618 } else
8619#endif
8620 {
8621 if ((w > 0) && (h > 0)) {
8622 if ((w == 1) && (h == 1)) {
8623 w = 0;
8624 h = 0;
8625 }
8626 layer->layer_left = parsed[0];
8627 layer->layer_top = parsed[1];
8628 layer->layer_width = w;
8629 layer->layer_height = h;
8630 }
8631 }
8632
8633 new_x = layer->layer_left;
8634 new_y = layer->layer_top;
8635 new_w = layer->layer_width;
8636 new_h = layer->layer_height;
8637
8638 if ((last_x != new_x) || (last_y != new_y)
8639 || (last_w != new_w) || (last_h != new_h)) {
8640 if (layer->layer_id == 0)
8641 video_property_changed = 1;
8642#ifdef VIDEO_PIP
8643 else if (layer->layer_id == 1)
8644 pip_property_changed = 1;
8645#endif
8646 }
8647}
8648#if ENABLE_UPDATE_HDR_FROM_USER
8649static void config_hdr_info(const struct vframe_master_display_colour_s p)
8650{
8651 struct vframe_master_display_colour_s tmp = {0};
8652 bool valid_hdr = false;
8653 unsigned long flags;
8654
8655 tmp.present_flag = p.present_flag;
8656 if (tmp.present_flag == 1) {
8657 tmp = p;
8658
8659 if (tmp.primaries[0][0] == 0 &&
8660 tmp.primaries[0][1] == 0 &&
8661 tmp.primaries[1][0] == 0 &&
8662 tmp.primaries[1][1] == 0 &&
8663 tmp.primaries[2][0] == 0 &&
8664 tmp.primaries[2][1] == 0 &&
8665 tmp.white_point[0] == 0 &&
8666 tmp.white_point[1] == 0 &&
8667 tmp.luminance[0] == 0 &&
8668 tmp.luminance[1] == 0 &&
8669 tmp.content_light_level.max_content == 0 &&
8670 tmp.content_light_level.max_pic_average == 0) {
8671 valid_hdr = false;
8672 } else {
8673 valid_hdr = true;
8674 }
8675 }
8676
8677 spin_lock_irqsave(&omx_hdr_lock, flags);
8678 vf_hdr = tmp;
8679 has_hdr_info = valid_hdr;
8680 spin_unlock_irqrestore(&omx_hdr_lock, flags);
8681
8682 pr_debug("has_hdr_info %d\n", has_hdr_info);
8683}
8684#endif
8685static void set_omx_pts(u32 *p)
8686{
8687 u32 tmp_pts = p[0];
8688 /*u32 vision = p[1];*/
8689 u32 set_from_hwc = p[2];
8690 u32 frame_num = p[3];
8691 u32 not_reset = p[4];
8692 u32 session = p[5];
8693 unsigned int try_cnt = 0x1000;
8694
8695 mutex_lock(&omx_mutex);
8696 if (omx_pts_set_index < frame_num)
8697 omx_pts_set_index = frame_num;
8698
8699 if (omx_check_previous_session) {
8700 if (session != omx_cur_session) {
8701 omx_cur_session = session;
8702 omx_check_previous_session = false;
8703 } else {
8704 mutex_unlock(&omx_mutex);
8705 pr_info("check session return: tmp_pts %d"
8706 "session=0x%x\n", tmp_pts, omx_cur_session);
8707 return;
8708 }
8709 }
8710 if (debug_flag & DEBUG_FLAG_PTS_TRACE)
8711 pr_info("[set_omx_pts]tmp_pts:%d, set_from_hwc:%d,frame_num=%d, not_reset=%d\n",
8712 tmp_pts, set_from_hwc, frame_num, not_reset);
8713
8714 if (not_reset == 0)
8715 omx_pts = tmp_pts;
8716 /* kodi may render first frame, then drop dozens of frames */
8717 if (set_from_hwc == 0 && omx_run == true && frame_num <= 2
8718 && not_reset == 0) {
8719 pr_info("reset omx_run to false.\n");
8720 omx_run = false;
8721 }
8722 if (set_from_hwc == 1) {
8723 if (!omx_run) {
8724 omx_need_drop_frame_num =
8725 frame_num > 0 ? frame_num-1 : 0;
8726 if (omx_need_drop_frame_num == 0)
8727 omx_drop_done = true;
8728 pr_info("omx_need_drop_frame_num %d\n",
8729 omx_need_drop_frame_num);
8730 }
8731 omx_run = true;
8732 if (omx_pts_set_from_hwc_count < OMX_MAX_COUNT_RESET_SYSTEMTIME)
8733 omx_pts_set_from_hwc_count++;
8734
8735 } else if (set_from_hwc == 0 && !omx_run) {
8736 struct vframe_s *vf = NULL;
8737 u32 donot_drop = 0;
8738
8739 while (try_cnt--) {
8740 vf = vf_peek(RECEIVER_NAME);
8741#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
8742 if (is_dolby_vision_enable()
8743 && vf && is_dovi_frame(vf)) {
8744 pr_info("set_omx_pts ignore the omx %d frames drop for dv frame\n",
8745 frame_num);
8746 donot_drop = 1;
8747 break;
8748 }
8749#endif
8750 if (vf) {
8751 pr_debug("drop frame_num=%d, vf->omx_index=%d\n",
8752 frame_num, vf->omx_index);
8753 if (frame_num >= vf->omx_index) {
8754 vf = vf_get(RECEIVER_NAME);
8755 if (vf)
8756 vf_put(vf, RECEIVER_NAME);
8757 } else
8758 break;
8759 } else
8760 break;
8761 }
8762 if (donot_drop && omx_pts_set_from_hwc_count > 0) {
8763 pr_info("reset omx_run to true.\n");
8764 omx_run = true;
8765 }
8766 }
8767 mutex_unlock(&omx_mutex);
8768}
8769
8770static int alloc_layer(u32 layer_id)
8771{
8772 int ret = -EINVAL;
8773
8774 if (layer_id == 0) {
8775 if (layer_cap & LAYER0_BUSY) {
8776 ret = -EBUSY;
8777 } else if (layer_cap & LAYER0_AVAIL) {
8778 ret = 0;
8779 layer_cap |= LAYER0_BUSY;
8780 }
8781 } else if (layer_id == 1) {
8782 if (layer_cap & LAYER1_BUSY) {
8783 ret = -EBUSY;
8784 } else if (layer_cap & LAYER1_AVAIL) {
8785 ret = 0;
8786 layer_cap |= LAYER1_BUSY;
8787 }
8788 }
8789 return ret;
8790}
8791
8792static int free_layer(u32 layer_id)
8793{
8794 int ret = -EINVAL;
8795
8796 if (layer_id == 0) {
8797 if ((layer_cap & LAYER0_BUSY)
8798 && (layer_cap & LAYER0_AVAIL)) {
8799 ret = 0;
8800 layer_cap &= ~LAYER0_BUSY;
8801 }
8802 } else if (layer_id == 1) {
8803 if ((layer_cap & LAYER1_BUSY)
8804 && (layer_cap & LAYER1_AVAIL)) {
8805 ret = 0;
8806 layer_cap &= ~LAYER1_BUSY;
8807 }
8808 }
8809 return ret;
8810}
8811
8812/*********************************************************
8813 * /dev/amvideo APIs
8814 ********************************************************
8815 */
8816static int amvideo_open(struct inode *inode, struct file *file)
8817{
8818 file->private_data = NULL;
8819 return 0;
8820}
8821
8822static int amvideo_poll_open(struct inode *inode, struct file *file)
8823{
8824 file->private_data = NULL;
8825 return 0;
8826}
8827
8828static int amvideo_release(struct inode *inode, struct file *file)
8829{
8830 file->private_data = NULL;
8831 return 0;
8832}
8833
8834static int amvideo_poll_release(struct inode *inode, struct file *file)
8835{
8836 file->private_data = NULL;
8837 return 0;
8838}
8839
8840static long amvideo_ioctl(struct file *file, unsigned int cmd, ulong arg)
8841{
8842 long ret = 0;
8843 void __user *argp = (void __user *)arg;
8844 struct disp_info_s *layer = &glayer_info[0];
8845 u32 layer_id;
8846
8847 switch (cmd) {
8848 case AMSTREAM_IOC_GLOBAL_SET_VIDEOPIP_OUTPUT:
8849 case AMSTREAM_IOC_GLOBAL_GET_VIDEOPIP_OUTPUT:
8850 case AMSTREAM_IOC_GET_VIDEOPIP_DISABLE:
8851 case AMSTREAM_IOC_SET_VIDEOPIP_DISABLE:
8852 case AMSTREAM_IOC_GET_VIDEOPIP_AXIS:
8853 case AMSTREAM_IOC_SET_VIDEOPIP_AXIS:
8854 case AMSTREAM_IOC_GET_VIDEOPIP_CROP:
8855 case AMSTREAM_IOC_SET_VIDEOPIP_CROP:
8856 case AMSTREAM_IOC_GET_PIP_SCREEN_MODE:
8857 case AMSTREAM_IOC_SET_PIP_SCREEN_MODE:
8858 case AMSTREAM_IOC_GET_PIP_ZORDER:
8859 case AMSTREAM_IOC_SET_PIP_ZORDER:
8860 layer = &glayer_info[1];
8861 break;
8862 default:
8863 break;
8864 }
8865
8866 if (file->private_data)
8867 layer = (struct disp_info_s *)file->private_data;
8868
8869 switch (cmd) {
8870 case AMSTREAM_IOC_SET_HDR_INFO:{
8871#if ENABLE_UPDATE_HDR_FROM_USER
8872 struct vframe_master_display_colour_s tmp;
8873 if (copy_from_user(&tmp, argp, sizeof(tmp)) == 0)
8874 config_hdr_info(tmp);
8875#endif
8876 }
8877 break;
8878 case AMSTREAM_IOC_SET_OMX_VPTS:{
8879 u32 pts[6];
8880 if (copy_from_user(pts, argp, sizeof(pts)) == 0)
8881 set_omx_pts(pts);
8882 }
8883 break;
8884
8885 case AMSTREAM_IOC_GET_OMX_VPTS:
8886 put_user(omx_pts, (u32 __user *)argp);
8887 break;
8888
8889 case AMSTREAM_IOC_GET_OMX_VERSION:
8890 put_user(omx_version, (u32 __user *)argp);
8891 break;
8892
8893 case AMSTREAM_IOC_GET_OMX_INFO:
8894 put_user(omx_info, (u32 __user *)argp);
8895 break;
8896
8897 case AMSTREAM_IOC_TRICKMODE:
8898 if (arg == TRICKMODE_I)
8899 trickmode_i = 1;
8900 else if (arg == TRICKMODE_FFFB)
8901 trickmode_fffb = 1;
8902 else {
8903 trickmode_i = 0;
8904 trickmode_fffb = 0;
8905 }
8906 to_notify_trick_wait = false;
8907 atomic_set(&trickmode_framedone, 0);
8908 tsync_trick_mode(trickmode_fffb);
8909 break;
8910
8911 case AMSTREAM_IOC_TRICK_STAT:
8912 put_user(atomic_read(&trickmode_framedone),
8913 (u32 __user *)argp);
8914 break;
8915
8916 case AMSTREAM_IOC_GET_TRICK_VPTS:
8917 put_user(trickmode_vpts, (u32 __user *)argp);
8918 break;
8919
8920 case AMSTREAM_IOC_VPAUSE:
8921 tsync_avevent(VIDEO_PAUSE, arg);
8922 break;
8923
8924 case AMSTREAM_IOC_AVTHRESH:
8925 tsync_set_avthresh(arg);
8926 break;
8927
8928 case AMSTREAM_IOC_SYNCTHRESH:
8929 tsync_set_syncthresh(arg);
8930 break;
8931
8932 case AMSTREAM_IOC_SYNCENABLE:
8933 tsync_set_enable(arg);
8934 break;
8935
8936 case AMSTREAM_IOC_SET_SYNC_ADISCON:
8937 tsync_set_sync_adiscont(arg);
8938 break;
8939
8940 case AMSTREAM_IOC_SET_SYNC_VDISCON:
8941 tsync_set_sync_vdiscont(arg);
8942 break;
8943
8944 case AMSTREAM_IOC_GET_SYNC_ADISCON:
8945 put_user(tsync_get_sync_adiscont(), (u32 __user *)argp);
8946 break;
8947
8948 case AMSTREAM_IOC_GET_SYNC_VDISCON:
8949 put_user(tsync_get_sync_vdiscont(), (u32 __user *)argp);
8950 break;
8951
8952 case AMSTREAM_IOC_GET_SYNC_ADISCON_DIFF:
8953 put_user(tsync_get_sync_adiscont_diff(), (u32 __user *)argp);
8954 break;
8955
8956 case AMSTREAM_IOC_GET_SYNC_VDISCON_DIFF:
8957 put_user(tsync_get_sync_vdiscont_diff(), (u32 __user *)argp);
8958 break;
8959
8960 case AMSTREAM_IOC_SET_SYNC_ADISCON_DIFF:
8961 tsync_set_sync_adiscont_diff(arg);
8962 break;
8963
8964 case AMSTREAM_IOC_SET_SYNC_VDISCON_DIFF:
8965 tsync_set_sync_vdiscont_diff(arg);
8966 break;
8967
8968 case AMSTREAM_IOC_VF_STATUS:{
8969 struct vframe_states vfsta;
8970 struct vframe_states states;
8971
8972 video_vf_get_states(&vfsta);
8973 states.vf_pool_size = vfsta.vf_pool_size;
8974 states.buf_avail_num = vfsta.buf_avail_num;
8975 states.buf_free_num = vfsta.buf_free_num;
8976 states.buf_recycle_num = vfsta.buf_recycle_num;
8977 if (copy_to_user(argp, &states, sizeof(states)))
8978 ret = -EFAULT;
8979 }
8980 break;
8981
8982 case AMSTREAM_IOC_GET_VIDEOPIP_DISABLE:
8983 case AMSTREAM_IOC_GET_VIDEO_DISABLE:
8984 if (layer->layer_id == 0)
8985 put_user(disable_video, (u32 __user *)argp);
8986#ifdef VIDEO_PIP
8987 else if (layer->layer_id == 1)
8988 put_user(disable_videopip, (u32 __user *)argp);
8989#endif
8990 break;
8991
8992 case AMSTREAM_IOC_SET_VIDEOPIP_DISABLE:
8993 case AMSTREAM_IOC_SET_VIDEO_DISABLE:
8994 {
8995 u32 val;
8996
8997 if (copy_from_user(&val, argp, sizeof(u32)) == 0) {
8998 if (layer->layer_id == 0)
8999 ret = _video_set_disable(val);
9000#ifdef VIDEO_PIP
9001 else if (layer->layer_id == 1)
9002 ret = _videopip_set_disable(val);
9003#endif
9004 } else
9005 ret = -EFAULT;
9006 }
9007 break;
9008
9009 case AMSTREAM_IOC_GET_VIDEO_DISCONTINUE_REPORT:
9010 put_user(enable_video_discontinue_report, (u32 __user *)argp);
9011 break;
9012
9013 case AMSTREAM_IOC_SET_VIDEO_DISCONTINUE_REPORT:
9014 enable_video_discontinue_report = (arg == 0) ? 0 : 1;
9015 break;
9016
9017 case AMSTREAM_IOC_GET_VIDEOPIP_AXIS:
9018 case AMSTREAM_IOC_GET_VIDEO_AXIS:
9019 {
9020 int axis[4];
9021#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
9022 if (video_scaler_mode && (layer->layer_id == 0)) {
9023 axis[0] = content_left;
9024 axis[1] = content_top;
9025 axis[2] = content_w;
9026 axis[3] = content_h;
9027 } else
9028#endif
9029 {
9030 axis[0] = layer->layer_left;
9031 axis[1] = layer->layer_top;
9032 axis[2] = layer->layer_width;
9033 axis[3] = layer->layer_height;
9034 }
9035
9036 axis[2] = axis[0] + axis[2] - 1;
9037 axis[3] = axis[1] + axis[3] - 1;
9038
9039 if (copy_to_user(argp, &axis[0], sizeof(axis)) != 0)
9040 ret = -EFAULT;
9041 }
9042 break;
9043
9044 case AMSTREAM_IOC_SET_VIDEOPIP_AXIS:
9045 case AMSTREAM_IOC_SET_VIDEO_AXIS:
9046 {
9047 int axis[4];
9048
9049 if (copy_from_user(axis, argp, sizeof(axis)) == 0)
9050 _set_video_window(layer, axis);
9051 else
9052 ret = -EFAULT;
9053 }
9054 break;
9055
9056 case AMSTREAM_IOC_GET_VIDEOPIP_CROP:
9057 case AMSTREAM_IOC_GET_VIDEO_CROP:
9058 {
9059 int crop[4];
9060 {
9061 crop[0] = layer->crop_top;
9062 crop[1] = layer->crop_left;
9063 crop[2] = layer->crop_bottom;
9064 crop[3] = layer->crop_right;
9065 }
9066
9067 if (copy_to_user(argp, &crop[0], sizeof(crop)) != 0)
9068 ret = -EFAULT;
9069 }
9070 break;
9071
9072 case AMSTREAM_IOC_SET_VIDEOPIP_CROP:
9073 case AMSTREAM_IOC_SET_VIDEO_CROP:
9074 {
9075 int crop[4];
9076
9077 if (copy_from_user(crop, argp, sizeof(crop)) == 0)
9078 _set_video_crop(layer, crop);
9079 else
9080 ret = -EFAULT;
9081 }
9082 break;
9083
9084 case AMSTREAM_IOC_GET_PIP_SCREEN_MODE:
9085 case AMSTREAM_IOC_GET_SCREEN_MODE:
9086 if (copy_to_user(argp, &layer->wide_mode, sizeof(u32)) != 0)
9087 ret = -EFAULT;
9088 break;
9089
9090 case AMSTREAM_IOC_SET_PIP_SCREEN_MODE:
9091 case AMSTREAM_IOC_SET_SCREEN_MODE:
9092 {
9093 u32 mode;
9094
9095 if (copy_from_user(&mode, argp, sizeof(u32)) == 0) {
9096 if (mode >= VIDEO_WIDEOPTION_MAX)
9097 ret = -EINVAL;
9098 else if (mode != layer->wide_mode) {
9099 layer->wide_mode = mode;
9100 if (layer->layer_id == 0)
9101 video_property_changed = 1;
9102#ifdef VIDEO_PIP
9103 else if (layer->layer_id == 1)
9104 pip_property_changed = 1;
9105#endif
9106 }
9107 } else
9108 ret = -EFAULT;
9109 }
9110 break;
9111
9112 case AMSTREAM_IOC_GET_BLACKOUT_POLICY:
9113 if (copy_to_user(argp, &blackout, sizeof(u32)) != 0)
9114 ret = -EFAULT;
9115 break;
9116
9117 case AMSTREAM_IOC_SET_BLACKOUT_POLICY:{
9118 u32 mode;
9119
9120 if (copy_from_user(&mode, argp, sizeof(u32)) == 0) {
9121 if (mode > 2)
9122 ret = -EINVAL;
9123 else
9124 blackout = mode;
9125 } else
9126 ret = -EFAULT;
9127 }
9128 break;
9129
9130 case AMSTREAM_IOC_CLEAR_VBUF:{
9131 unsigned long flags;
9132 while (atomic_read(&video_inirq_flag) > 0 ||
9133 atomic_read(&video_unreg_flag) > 0)
9134 schedule();
9135 spin_lock_irqsave(&lock, flags);
9136 cur_dispbuf = NULL;
9137 spin_unlock_irqrestore(&lock, flags);
9138 }
9139 break;
9140
9141 case AMSTREAM_IOC_CLEAR_VIDEO:
9142 if (blackout)
9143 safe_disble_videolayer();
9144 break;
9145
9146 case AMSTREAM_IOC_SET_FREERUN_MODE:
9147 if (arg > FREERUN_DUR)
9148 ret = -EFAULT;
9149 else
9150 freerun_mode = arg;
9151 break;
9152
9153 case AMSTREAM_IOC_GET_FREERUN_MODE:
9154 put_user(freerun_mode, (u32 __user *)argp);
9155 break;
9156
9157 case AMSTREAM_IOC_DISABLE_SLOW_SYNC:
9158 if (arg)
9159 disable_slow_sync = 1;
9160 else
9161 disable_slow_sync = 0;
9162 break;
9163 /*
9164 ***************************************************************
9165 *3d process ioctl
9166 ****************************************************************
9167 */
9168 case AMSTREAM_IOC_SET_3D_TYPE:
9169 {
9170#ifdef TV_3D_FUNCTION_OPEN
9171 unsigned int set_3d =
9172 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE;
9173 unsigned int type = (unsigned int)arg;
9174
9175 if (type != process_3d_type) {
9176 process_3d_type = type;
9177 if (mvc_flag)
9178 process_3d_type |= MODE_3D_MVC;
9179 video_property_changed = 1;
9180 if ((process_3d_type & MODE_3D_FA)
9181 && cur_dispbuf
9182 && !cur_dispbuf->trans_fmt)
9183 /*notify di 3d mode is frame*/
9184 /*alternative mode,passing two*/
9185 /*buffer in one frame */
9186 vf_notify_receiver_by_name(
9187 "deinterlace",
9188 set_3d,
9189 (void *)1);
9190 else
9191 vf_notify_receiver_by_name(
9192 "deinterlace",
9193 set_3d,
9194 (void *)0);
9195 }
9196#endif
9197 break;
9198 }
9199 case AMSTREAM_IOC_GET_3D_TYPE:
9200#ifdef TV_3D_FUNCTION_OPEN
9201 put_user(process_3d_type, (u32 __user *)argp);
9202
9203#endif
9204 break;
9205 case AMSTREAM_IOC_GET_SOURCE_VIDEO_3D_TYPE:
9206#ifdef TV_3D_FUNCTION_OPEN
9207 {
9208 int source_video_3d_type = VPP_3D_MODE_NULL;
9209
9210 if (!cur_frame_par)
9211 source_video_3d_type =
9212 VPP_3D_MODE_NULL;
9213 else
9214 get_vpp_3d_mode(process_3d_type,
9215 cur_frame_par->trans_fmt, &source_video_3d_type);
9216 put_user(source_video_3d_type, (u32 __user *)argp);
9217 }
9218#endif
9219 break;
9220 case AMSTREAM_IOC_SET_VSYNC_UPINT:
9221 vsync_pts_inc_upint = arg;
9222 break;
9223
9224 case AMSTREAM_IOC_GET_VSYNC_SLOW_FACTOR:
9225 put_user(vsync_slow_factor, (u32 __user *)argp);
9226 break;
9227
9228 case AMSTREAM_IOC_SET_VSYNC_SLOW_FACTOR:
9229 vsync_slow_factor = arg;
9230 break;
9231
9232 case AMSTREAM_IOC_GLOBAL_SET_VIDEOPIP_OUTPUT:
9233 case AMSTREAM_IOC_GLOBAL_SET_VIDEO_OUTPUT:
9234 if (layer->layer_id == 0) {
9235 if (arg != 0)
9236 video_global_output = 1;
9237 else
9238 video_global_output = 0;
9239 }
9240#ifdef VIDEO_PIP
9241 else if (layer->layer_id == 1) {
9242 if (arg != 0)
9243 pip_global_output = 1;
9244 else
9245 pip_global_output = 0;
9246 }
9247#endif
9248 break;
9249
9250 case AMSTREAM_IOC_GLOBAL_GET_VIDEOPIP_OUTPUT:
9251 case AMSTREAM_IOC_GLOBAL_GET_VIDEO_OUTPUT:
9252 if (layer->layer_id == 0)
9253 put_user(video_global_output, (u32 __user *)argp);
9254#ifdef VIDEO_PIP
9255 else if (layer->layer_id == 1)
9256 put_user(pip_global_output, (u32 __user *)argp);
9257#endif
9258 break;
9259
9260 case AMSTREAM_IOC_GET_VIDEO_LAYER1_ON: {
9261 u32 vsync_duration;
9262 u32 video_onoff_diff = 0;
9263
9264 vsync_duration = vsync_pts_inc / 90;
9265 video_onoff_diff =
9266 jiffies_to_msecs(jiffies) - video_onoff_time;
9267
9268 if (video_onoff_state == VIDEO_ENABLE_STATE_IDLE) {
9269 /* wait until 5ms after next vsync */
9270 msleep(video_onoff_diff < vsync_duration
9271 ? vsync_duration - video_onoff_diff + 5
9272 : 0);
9273 }
9274 put_user(video_onoff_state, (u32 __user *)argp);
9275 break;
9276 }
9277
9278 case AMSTREAM_IOC_GET_FIRST_FRAME_TOGGLED:
9279 put_user(first_frame_toggled, (u32 __user *)argp);
9280 break;
9281
9282 case AMSTREAM_IOC_SET_VIDEOPEEK:
9283 videopeek = true;
9284 nopostvideostart = true;
9285 break;
9286
9287 case AMSTREAM_IOC_GET_PIP_ZORDER:
9288 case AMSTREAM_IOC_GET_ZORDER:
9289 put_user(layer->zorder, (u32 __user *)argp);
9290 break;
9291
9292 case AMSTREAM_IOC_SET_PIP_ZORDER:
9293 case AMSTREAM_IOC_SET_ZORDER:{
9294 u32 zorder, new_prop = 0;
9295
9296 if (copy_from_user(&zorder, argp, sizeof(u32)) == 0) {
9297 if (layer->zorder != zorder)
9298 new_prop = 1;
9299 layer->zorder = zorder;
9300 if ((layer->layer_id == 0) && new_prop)
9301 video_property_changed = 1;
9302#ifdef VIDEO_PIP
9303 else if ((layer->layer_id == 1) && new_prop)
9304 pip_property_changed = 1;
9305#endif
9306 } else
9307 ret = -EFAULT;
9308 }
9309 break;
9310
9311 case AMSTREAM_IOC_QUERY_LAYER:
9312 mutex_lock(&video_layer_mutex);
9313 put_user(layer_cap, (u32 __user *)argp);
9314 mutex_unlock(&video_layer_mutex);
9315 ret = 0;
9316 break;
9317
9318 case AMSTREAM_IOC_ALLOC_LAYER:
9319 if (copy_from_user(&layer_id, argp, sizeof(u32)) == 0) {
9320 if (layer_id >= MAX_VD_LAYERS) {
9321 ret = -EINVAL;
9322 } else {
9323 mutex_lock(&video_layer_mutex);
9324 if (file->private_data) {
9325 ret = -EBUSY;
9326 } else {
9327 ret = alloc_layer(layer_id);
9328 if (!ret)
9329 file->private_data =
9330 (void *)&glayer_info[layer_id];
9331 }
9332 mutex_unlock(&video_layer_mutex);
9333 }
9334 } else
9335 ret = -EFAULT;
9336 break;
9337
9338 case AMSTREAM_IOC_FREE_LAYER:
9339 mutex_lock(&video_layer_mutex);
9340 if (!file->private_data) {
9341 ret = -EINVAL;
9342 } else {
9343 ret = free_layer(layer->layer_id);
9344 if (!ret)
9345 file->private_data = NULL;
9346 }
9347 mutex_unlock(&video_layer_mutex);
9348 break;
9349
9350 default:
9351 return -EINVAL;
9352 }
9353
9354 return ret;
9355}
9356
9357#ifdef CONFIG_COMPAT
9358static long amvideo_compat_ioctl(struct file *file, unsigned int cmd, ulong arg)
9359{
9360 long ret = 0;
9361
9362 switch (cmd) {
9363 case AMSTREAM_IOC_SET_HDR_INFO:
9364 case AMSTREAM_IOC_SET_OMX_VPTS:
9365 case AMSTREAM_IOC_GET_OMX_VPTS:
9366 case AMSTREAM_IOC_GET_OMX_VERSION:
9367 case AMSTREAM_IOC_GET_OMX_INFO:
9368 case AMSTREAM_IOC_TRICK_STAT:
9369 case AMSTREAM_IOC_GET_TRICK_VPTS:
9370 case AMSTREAM_IOC_GET_SYNC_ADISCON:
9371 case AMSTREAM_IOC_GET_SYNC_VDISCON:
9372 case AMSTREAM_IOC_GET_SYNC_ADISCON_DIFF:
9373 case AMSTREAM_IOC_GET_SYNC_VDISCON_DIFF:
9374 case AMSTREAM_IOC_VF_STATUS:
9375 case AMSTREAM_IOC_GET_VIDEO_DISABLE:
9376 case AMSTREAM_IOC_GET_VIDEO_DISCONTINUE_REPORT:
9377 case AMSTREAM_IOC_GET_VIDEO_AXIS:
9378 case AMSTREAM_IOC_SET_VIDEO_AXIS:
9379 case AMSTREAM_IOC_GET_VIDEO_CROP:
9380 case AMSTREAM_IOC_SET_VIDEO_CROP:
9381 case AMSTREAM_IOC_GET_SCREEN_MODE:
9382 case AMSTREAM_IOC_SET_SCREEN_MODE:
9383 case AMSTREAM_IOC_GET_BLACKOUT_POLICY:
9384 case AMSTREAM_IOC_SET_BLACKOUT_POLICY:
9385 case AMSTREAM_IOC_GET_FREERUN_MODE:
9386 case AMSTREAM_IOC_GET_3D_TYPE:
9387 case AMSTREAM_IOC_GET_SOURCE_VIDEO_3D_TYPE:
9388 case AMSTREAM_IOC_GET_VSYNC_SLOW_FACTOR:
9389 case AMSTREAM_IOC_GLOBAL_GET_VIDEO_OUTPUT:
9390 case AMSTREAM_IOC_GET_VIDEO_LAYER1_ON:
9391 case AMSTREAM_IOC_GLOBAL_SET_VIDEOPIP_OUTPUT:
9392 case AMSTREAM_IOC_GLOBAL_GET_VIDEOPIP_OUTPUT:
9393 case AMSTREAM_IOC_GET_VIDEOPIP_DISABLE:
9394 case AMSTREAM_IOC_SET_VIDEOPIP_DISABLE:
9395 case AMSTREAM_IOC_GET_VIDEOPIP_AXIS:
9396 case AMSTREAM_IOC_SET_VIDEOPIP_AXIS:
9397 case AMSTREAM_IOC_GET_VIDEOPIP_CROP:
9398 case AMSTREAM_IOC_SET_VIDEOPIP_CROP:
9399 case AMSTREAM_IOC_GET_PIP_SCREEN_MODE:
9400 case AMSTREAM_IOC_SET_PIP_SCREEN_MODE:
9401 case AMSTREAM_IOC_GET_PIP_ZORDER:
9402 case AMSTREAM_IOC_SET_PIP_ZORDER:
9403 case AMSTREAM_IOC_GET_ZORDER:
9404 case AMSTREAM_IOC_SET_ZORDER:
9405 case AMSTREAM_IOC_QUERY_LAYER:
9406 case AMSTREAM_IOC_ALLOC_LAYER:
9407 case AMSTREAM_IOC_FREE_LAYER:
9408 arg = (unsigned long) compat_ptr(arg);
9409 case AMSTREAM_IOC_TRICKMODE:
9410 case AMSTREAM_IOC_VPAUSE:
9411 case AMSTREAM_IOC_AVTHRESH:
9412 case AMSTREAM_IOC_SYNCTHRESH:
9413 case AMSTREAM_IOC_SYNCENABLE:
9414 case AMSTREAM_IOC_SET_SYNC_ADISCON:
9415 case AMSTREAM_IOC_SET_SYNC_VDISCON:
9416 case AMSTREAM_IOC_SET_SYNC_ADISCON_DIFF:
9417 case AMSTREAM_IOC_SET_SYNC_VDISCON_DIFF:
9418 case AMSTREAM_IOC_SET_VIDEO_DISABLE:
9419 case AMSTREAM_IOC_SET_VIDEO_DISCONTINUE_REPORT:
9420 case AMSTREAM_IOC_CLEAR_VBUF:
9421 case AMSTREAM_IOC_CLEAR_VIDEO:
9422 case AMSTREAM_IOC_SET_FREERUN_MODE:
9423 case AMSTREAM_IOC_DISABLE_SLOW_SYNC:
9424 case AMSTREAM_IOC_SET_3D_TYPE:
9425 case AMSTREAM_IOC_SET_VSYNC_UPINT:
9426 case AMSTREAM_IOC_SET_VSYNC_SLOW_FACTOR:
9427 case AMSTREAM_IOC_GLOBAL_SET_VIDEO_OUTPUT:
9428 case AMSTREAM_IOC_GET_FIRST_FRAME_TOGGLED:
9429 case AMSTREAM_IOC_SET_VIDEOPEEK:
9430 return amvideo_ioctl(file, cmd, arg);
9431 default:
9432 return -EINVAL;
9433 }
9434
9435 return ret;
9436}
9437#endif
9438
9439static unsigned int amvideo_poll(struct file *file, poll_table *wait_table)
9440{
9441 poll_wait(file, &amvideo_trick_wait, wait_table);
9442
9443 if (atomic_read(&trickmode_framedone)) {
9444 atomic_set(&trickmode_framedone, 0);
9445 return POLLOUT | POLLWRNORM;
9446 }
9447
9448 return 0;
9449}
9450
9451static unsigned int amvideo_poll_poll(struct file *file, poll_table *wait_table)
9452{
9453 poll_wait(file, &amvideo_sizechange_wait, wait_table);
9454
9455 if (atomic_read(&video_sizechange)) {
9456 atomic_set(&video_sizechange, 0);
9457 return POLLIN | POLLWRNORM;
9458 }
9459
9460 return 0;
9461}
9462
9463static const struct file_operations amvideo_fops = {
9464 .owner = THIS_MODULE,
9465 .open = amvideo_open,
9466 .release = amvideo_release,
9467 .unlocked_ioctl = amvideo_ioctl,
9468#ifdef CONFIG_COMPAT
9469 .compat_ioctl = amvideo_compat_ioctl,
9470#endif
9471 .poll = amvideo_poll,
9472};
9473
9474static const struct file_operations amvideo_poll_fops = {
9475 .owner = THIS_MODULE,
9476 .open = amvideo_poll_open,
9477 .release = amvideo_poll_release,
9478 .poll = amvideo_poll_poll,
9479};
9480
9481/*********************************************************
9482 * SYSFS property functions
9483 *********************************************************/
9484#define MAX_NUMBER_PARA 10
9485#define AMVIDEO_CLASS_NAME "video"
9486#define AMVIDEO_POLL_CLASS_NAME "video_poll"
9487
9488static int parse_para(const char *para, int para_num, int *result)
9489{
9490 char *token = NULL;
9491 char *params, *params_base;
9492 int *out = result;
9493 int len = 0, count = 0;
9494 int res = 0;
9495 int ret = 0;
9496
9497 if (!para)
9498 return 0;
9499
9500 params = kstrdup(para, GFP_KERNEL);
9501 params_base = params;
9502 token = params;
9503 if (token) {
9504 len = strlen(token);
9505 do {
9506 token = strsep(&params, " ");
9507 if (!token)
9508 break;
9509 while (token && (isspace(*token)
9510 || !isgraph(*token)) && len) {
9511 token++;
9512 len--;
9513 }
9514 if (len == 0)
9515 break;
9516 ret = kstrtoint(token, 0, &res);
9517 if (ret < 0)
9518 break;
9519 len = strlen(token);
9520 *out++ = res;
9521 count++;
9522 } while ((count < para_num) && (len > 0));
9523 }
9524
9525 kfree(params_base);
9526 return count;
9527}
9528
9529static void set_video_crop(
9530 struct disp_info_s *layer, const char *para)
9531{
9532 int parsed[4];
9533
9534 if (likely(parse_para(para, 4, parsed) == 4))
9535 _set_video_crop(layer, parsed);
9536 amlog_mask(LOG_MASK_SYSFS,
9537 "video crop=>x0:%d,y0:%d,x1:%d,y1:%d\n ",
9538 parsed[0], parsed[1], parsed[2], parsed[3]);
9539}
9540
9541static void set_video_speed_check(const char *para)
9542{
9543 int parsed[2];
9544 struct disp_info_s *layer = &glayer_info[0];
9545
9546 if (likely(parse_para(para, 2, parsed) == 2)) {
9547 layer->speed_check_height = parsed[0];
9548 layer->speed_check_width = parsed[1];
9549 }
9550 amlog_mask(LOG_MASK_SYSFS,
9551 "video speed_check=>h:%d,w:%d\n ", parsed[0], parsed[1]);
9552}
9553
9554static void set_video_window(
9555 struct disp_info_s *layer, const char *para)
9556{
9557 int parsed[4];
9558
9559 if (likely(parse_para(para, 4, parsed) == 4))
9560 _set_video_window(layer, parsed);
9561 amlog_mask(LOG_MASK_SYSFS,
9562 "video=>x0:%d,y0:%d,x1:%d,y1:%d\n ",
9563 parsed[0], parsed[1], parsed[2], parsed[3]);
9564}
9565
9566static ssize_t video_3d_scale_store(struct class *cla,
9567 struct class_attribute *attr,
9568 const char *buf, size_t count)
9569{
9570#ifdef TV_3D_FUNCTION_OPEN
9571 u32 enable;
9572 int r;
9573 struct disp_info_s *layer = &glayer_info[0];
9574
9575 r = kstrtouint(buf, 0, &enable);
9576 if (r < 0)
9577 return -EINVAL;
9578
9579 layer->vpp_3d_scale = enable ? true : false;
9580 video_property_changed = 1;
9581 amlog_mask(LOG_MASK_SYSFS, "%s:%s 3d scale.\n", __func__,
9582 enable ? "enable" : "disable");
9583#endif
9584 return count;
9585}
9586
9587static ssize_t video_sr_show(struct class *cla, struct class_attribute *attr,
9588 char *buf)
9589{
9590 return sprintf(buf, "super_scaler:%d\n", super_scaler);
9591}
9592
9593static ssize_t video_sr_store(struct class *cla,
9594 struct class_attribute *attr,
9595 const char *buf, size_t count)
9596{
9597 int parsed[1];
9598
9599 mutex_lock(&video_module_mutex);
9600 if (likely(parse_para(buf, 1, parsed) == 1)) {
9601 if (super_scaler != (parsed[0] & 0x1)) {
9602 super_scaler = parsed[0] & 0x1;
9603 video_property_changed = 1;
9604 }
9605 }
9606 mutex_unlock(&video_module_mutex);
9607
9608 return strnlen(buf, count);
9609}
9610
9611static ssize_t video_crop_show(struct class *cla, struct class_attribute *attr,
9612 char *buf)
9613{
9614 u32 t, l, b, r;
9615 struct disp_info_s *layer = &glayer_info[0];
9616
9617 t = layer->crop_top;
9618 l = layer->crop_left;
9619 b = layer->crop_bottom;
9620 r = layer->crop_right;
9621 return snprintf(buf, 40, "%d %d %d %d\n", t, l, b, r);
9622}
9623
9624static ssize_t video_crop_store(struct class *cla,
9625 struct class_attribute *attr,
9626 const char *buf, size_t count)
9627{
9628 struct disp_info_s *layer = &glayer_info[0];
9629
9630 mutex_lock(&video_module_mutex);
9631
9632 set_video_crop(layer, buf);
9633
9634 mutex_unlock(&video_module_mutex);
9635
9636 return strnlen(buf, count);
9637}
9638
9639static ssize_t video_state_show(struct class *cla,
9640 struct class_attribute *attr,
9641 char *buf)
9642{
9643 ssize_t len = 0;
9644 struct vppfilter_mode_s *vpp_filter = NULL;
9645
9646 if (!cur_frame_par)
9647 return len;
9648 vpp_filter = &cur_frame_par->vpp_filter;
9649 len += sprintf(buf + len,
9650 "zoom_start_x_lines:%u.zoom_end_x_lines:%u.\n",
9651 zoom_start_x_lines, zoom_end_x_lines);
9652 len += sprintf(buf + len,
9653 "zoom_start_y_lines:%u.zoom_end_y_lines:%u.\n",
9654 zoom_start_y_lines, zoom_end_y_lines);
9655 len += sprintf(buf + len, "frame parameters: pic_in_height %u.\n",
9656 cur_frame_par->VPP_pic_in_height_);
9657 len += sprintf(buf + len,
9658 "frame parameters: VPP_line_in_length_ %u.\n",
9659 cur_frame_par->VPP_line_in_length_);
9660 len += sprintf(buf + len, "vscale_skip_count %u.\n",
9661 cur_frame_par->vscale_skip_count);
9662 len += sprintf(buf + len, "hscale_skip_count %u.\n",
9663 cur_frame_par->hscale_skip_count);
9664 len += sprintf(buf + len, "supscl_path %u.\n",
9665 cur_frame_par->supscl_path);
9666 len += sprintf(buf + len, "supsc0_enable %u.\n",
9667 cur_frame_par->supsc0_enable);
9668 len += sprintf(buf + len, "supsc1_enable %u.\n",
9669 cur_frame_par->supsc1_enable);
9670 len += sprintf(buf + len, "supsc0_hori_ratio %u.\n",
9671 cur_frame_par->supsc0_hori_ratio);
9672 len += sprintf(buf + len, "supsc1_hori_ratio %u.\n",
9673 cur_frame_par->supsc1_hori_ratio);
9674 len += sprintf(buf + len, "supsc0_vert_ratio %u.\n",
9675 cur_frame_par->supsc0_vert_ratio);
9676 len += sprintf(buf + len, "supsc1_vert_ratio %u.\n",
9677 cur_frame_par->supsc1_vert_ratio);
9678 len += sprintf(buf + len, "spsc0_h_in %u.\n",
9679 cur_frame_par->spsc0_h_in);
9680 len += sprintf(buf + len, "spsc1_h_in %u.\n",
9681 cur_frame_par->spsc1_h_in);
9682 len += sprintf(buf + len, "spsc0_w_in %u.\n",
9683 cur_frame_par->spsc0_w_in);
9684 len += sprintf(buf + len, "spsc1_w_in %u.\n",
9685 cur_frame_par->spsc1_w_in);
9686 len += sprintf(buf + len, "video_input_w %u.\n",
9687 cur_frame_par->video_input_w);
9688 len += sprintf(buf + len, "video_input_h %u.\n",
9689 cur_frame_par->video_input_h);
9690 len += sprintf(buf + len, "clk_in_pps %u.\n",
9691 cur_frame_par->clk_in_pps);
9692#ifdef TV_3D_FUNCTION_OPEN
9693 len += sprintf(buf + len, "vpp_2pic_mode %u.\n",
9694 cur_frame_par->vpp_2pic_mode);
9695 len += sprintf(buf + len, "vpp_3d_scale %u.\n",
9696 cur_frame_par->vpp_3d_scale);
9697 len += sprintf(buf + len,
9698 "vpp_3d_mode %u.\n", cur_frame_par->vpp_3d_mode);
9699#endif
9700 len +=
9701 sprintf(buf + len, "hscale phase step 0x%x.\n",
9702 vpp_filter->vpp_hsc_start_phase_step);
9703 len +=
9704 sprintf(buf + len, "vscale phase step 0x%x.\n",
9705 vpp_filter->vpp_vsc_start_phase_step);
9706 len +=
9707 sprintf(buf + len, "pps pre hsc enable %d.\n",
9708 vpp_filter->vpp_pre_hsc_en);
9709 len +=
9710 sprintf(buf + len, "pps pre vsc enable %d.\n",
9711 vpp_filter->vpp_pre_vsc_en);
9712 len +=
9713 sprintf(buf + len, "hscale filter coef %d.\n",
9714 vpp_filter->vpp_horz_filter);
9715 len +=
9716 sprintf(buf + len, "vscale filter coef %d.\n",
9717 vpp_filter->vpp_vert_filter);
9718 len +=
9719 sprintf(buf + len, "vpp_vert_chroma_filter_en %d.\n",
9720 vpp_filter->vpp_vert_chroma_filter_en);
9721 len +=
9722 sprintf(buf + len, "post_blend_vd_h_start 0x%x.\n",
9723 cur_frame_par->VPP_post_blend_vd_h_start_);
9724 len +=
9725 sprintf(buf + len, "post_blend_vd_h_end 0x%x.\n",
9726 cur_frame_par->VPP_post_blend_vd_h_end_);
9727 len +=
9728 sprintf(buf + len, "post_blend_vd_v_start 0x%x.\n",
9729 cur_frame_par->VPP_post_blend_vd_v_start_);
9730 len +=
9731 sprintf(buf + len, "post_blend_vd_v_end 0x%x.\n",
9732 cur_frame_par->VPP_post_blend_vd_v_end_);
9733 len +=
9734 sprintf(buf + len, "VPP_hd_start_lines_ 0x%x.\n",
9735 cur_frame_par->VPP_hd_start_lines_);
9736 len +=
9737 sprintf(buf + len, "VPP_hd_end_lines_ 0x%x.\n",
9738 cur_frame_par->VPP_hd_end_lines_);
9739 len +=
9740 sprintf(buf + len, "VPP_vd_start_lines_ 0x%x.\n",
9741 cur_frame_par->VPP_vd_start_lines_);
9742 len +=
9743 sprintf(buf + len, "VPP_vd_end_lines_ 0x%x.\n",
9744 cur_frame_par->VPP_vd_end_lines_);
9745 len +=
9746 sprintf(buf + len, "VPP_hsc_startp 0x%x.\n",
9747 cur_frame_par->VPP_hsc_startp);
9748 len +=
9749 sprintf(buf + len, "VPP_hsc_endp 0x%x.\n",
9750 cur_frame_par->VPP_hsc_endp);
9751 len +=
9752 sprintf(buf + len, "VPP_vsc_startp 0x%x.\n",
9753 cur_frame_par->VPP_vsc_startp);
9754 len +=
9755 sprintf(buf + len, "VPP_vsc_endp 0x%x.\n",
9756 cur_frame_par->VPP_vsc_endp);
9757 return len;
9758}
9759
9760static ssize_t video_axis_show(struct class *cla,
9761 struct class_attribute *attr,
9762 char *buf)
9763{
9764 int x, y, w, h;
9765 struct disp_info_s *layer = &glayer_info[0];
9766
9767#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
9768 if (video_scaler_mode) {
9769 x = content_left;
9770 y = content_top;
9771 w = content_w;
9772 h = content_h;
9773 } else
9774#endif
9775 {
9776 x = layer->layer_left;
9777 y = layer->layer_top;
9778 w = layer->layer_width;
9779 h = layer->layer_height;
9780 }
9781 return snprintf(buf, 40, "%d %d %d %d\n", x, y, x + w - 1, y + h - 1);
9782}
9783
9784static ssize_t video_axis_store(struct class *cla,
9785 struct class_attribute *attr,
9786 const char *buf, size_t count)
9787{
9788 struct disp_info_s *layer = &glayer_info[0];
9789
9790 mutex_lock(&video_module_mutex);
9791
9792 set_video_window(layer, buf);
9793
9794 mutex_unlock(&video_module_mutex);
9795
9796 return strnlen(buf, count);
9797}
9798
9799static ssize_t video_global_offset_show(struct class *cla,
9800 struct class_attribute *attr, char *buf)
9801{
9802 int x, y;
9803 struct disp_info_s *layer = &glayer_info[0];
9804
9805 x = layer->global_offset_x;
9806 y = layer->global_offset_y;
9807
9808 return snprintf(buf, 40, "%d %d\n", x, y);
9809}
9810
9811static ssize_t video_global_offset_store(struct class *cla,
9812 struct class_attribute *attr,
9813 const char *buf, size_t count)
9814{
9815 int parsed[2];
9816 struct disp_info_s *layer = &glayer_info[0];
9817
9818 mutex_lock(&video_module_mutex);
9819
9820 if (likely(parse_para(buf, 2, parsed) == 2)) {
9821 layer->global_offset_x = parsed[0];
9822 layer->global_offset_y = parsed[1];
9823 video_property_changed = 1;
9824
9825 amlog_mask(LOG_MASK_SYSFS,
9826 "video_offset=>x0:%d,y0:%d\n ",
9827 parsed[0], parsed[1]);
9828 }
9829
9830 mutex_unlock(&video_module_mutex);
9831
9832 return count;
9833}
9834
9835static ssize_t video_zoom_show(struct class *cla,
9836 struct class_attribute *attr,
9837 char *buf)
9838{
9839 u32 r;
9840 struct disp_info_s *layer = &glayer_info[0];
9841
9842 r = layer->zoom_ratio;
9843
9844 return snprintf(buf, 40, "%d\n", r);
9845}
9846
9847static ssize_t video_zoom_store(struct class *cla,
9848 struct class_attribute *attr,
9849 const char *buf, size_t count)
9850{
9851 unsigned long r;
9852 int ret = 0;
9853 struct disp_info_s *layer = &glayer_info[0];
9854
9855 ret = kstrtoul(buf, 0, (unsigned long *)&r);
9856 if (ret < 0)
9857 return -EINVAL;
9858
9859 if ((r <= MAX_ZOOM_RATIO) && (r != layer->zoom_ratio)) {
9860 layer->zoom_ratio = r;
9861 video_property_changed = 1;
9862 }
9863
9864 return count;
9865}
9866
9867static ssize_t video_screen_mode_show(struct class *cla,
9868 struct class_attribute *attr, char *buf)
9869{
9870 struct disp_info_s *layer = &glayer_info[0];
9871 static const char * const wide_str[] = {
9872 "normal", "full stretch", "4-3", "16-9", "non-linear",
9873 "normal-noscaleup",
9874 "4-3 ignore", "4-3 letter box", "4-3 pan scan", "4-3 combined",
9875 "16-9 ignore", "16-9 letter box", "16-9 pan scan",
9876 "16-9 combined", "Custom AR", "AFD"
9877 };
9878
9879 if (layer->wide_mode < ARRAY_SIZE(wide_str)) {
9880 return sprintf(buf, "%d:%s\n",
9881 layer->wide_mode,
9882 wide_str[layer->wide_mode]);
9883 } else
9884 return 0;
9885}
9886
9887static ssize_t video_screen_mode_store(struct class *cla,
9888 struct class_attribute *attr,
9889 const char *buf, size_t count)
9890{
9891 unsigned long mode;
9892 int ret = 0;
9893 struct disp_info_s *layer = &glayer_info[0];
9894
9895 ret = kstrtoul(buf, 0, (unsigned long *)&mode);
9896 if (ret < 0)
9897 return -EINVAL;
9898
9899 if ((mode < VIDEO_WIDEOPTION_MAX)
9900 && (mode != layer->wide_mode)) {
9901 layer->wide_mode = mode;
9902 video_property_changed = 1;
9903 }
9904
9905 return count;
9906}
9907
9908static ssize_t video_blackout_policy_show(struct class *cla,
9909 struct class_attribute *attr,
9910 char *buf)
9911{
9912 return sprintf(buf, "%d\n", blackout);
9913}
9914
9915static ssize_t video_blackout_policy_store(struct class *cla,
9916 struct class_attribute *attr,
9917 const char *buf, size_t count)
9918{
9919 int r;
9920
9921 r = kstrtoint(buf, 0, &blackout);
9922 if (r < 0)
9923 return -EINVAL;
9924
9925 if (debug_flag & DEBUG_FLAG_BLACKOUT)
9926 pr_info("%s(%d)\n", __func__, blackout);
9927
9928 return count;
9929}
9930
9931static ssize_t video_seek_flag_show(struct class *cla,
9932 struct class_attribute *attr,
9933 char *buf)
9934{
9935 return sprintf(buf, "%d\n", video_seek_flag);
9936}
9937
9938static ssize_t video_seek_flag_store(struct class *cla,
9939 struct class_attribute *attr,
9940 const char *buf, size_t count)
9941{
9942 int r;
9943
9944 r = kstrtoint(buf, 0, &video_seek_flag);
9945 if (r < 0)
9946 return -EINVAL;
9947
9948 return count;
9949}
9950
9951#ifdef PTS_TRACE_DEBUG
9952static ssize_t pts_trace_show(struct class *cla,
9953 struct class_attribute *attr, char *buf)
9954{
9955 return sprintf(buf, "%d %d %d %d %d %d %d %d\n"
9956 "%d %d %d %d %d %d %d %d\n"
9957 "%0x %0x %0x %0x %0x %0x %0x %0x\n"
9958 "%0x %0x %0x %0x %0x %0x %0x %0x\n"
9959 "%0x %0x %0x %0x %0x %0x %0x %0x\n"
9960 "%0x %0x %0x %0x %0x %0x %0x %0x\n",
9961 pts_trace_his[0], pts_trace_his[1], pts_trace_his[2],
9962 pts_trace_his[3], pts_trace_his[4], pts_trace_his[5],
9963 pts_trace_his[6], pts_trace_his[7], pts_trace_his[8],
9964 pts_trace_his[9], pts_trace_his[10], pts_trace_his[11],
9965 pts_trace_his[12], pts_trace_his[13], pts_trace_his[14],
9966 pts_trace_his[15],
9967 pts_his[0], pts_his[1], pts_his[2], pts_his[3],
9968 pts_his[4], pts_his[5], pts_his[6], pts_his[7],
9969 pts_his[8], pts_his[9], pts_his[10], pts_his[11],
9970 pts_his[12], pts_his[13], pts_his[14], pts_his[15],
9971 scr_his[0], scr_his[1], scr_his[2], scr_his[3],
9972 scr_his[4], scr_his[5], scr_his[6], scr_his[7],
9973 scr_his[8], scr_his[9], scr_his[10], scr_his[11],
9974 scr_his[12], scr_his[13], scr_his[14], scr_his[15]);
9975}
9976#endif
9977
9978static ssize_t video_brightness_show(struct class *cla,
9979 struct class_attribute *attr, char *buf)
9980{
9981 s32 val = (READ_VCBUS_REG(VPP_VADJ1_Y + cur_dev->vpp_off) >> 8) &
9982 0x1ff;
9983
9984 val = (val << 23) >> 23;
9985
9986 return sprintf(buf, "%d\n", val);
9987}
9988
9989static ssize_t video_brightness_store(struct class *cla,
9990 struct class_attribute *attr,
9991 const char *buf, size_t count)
9992{
9993 int r;
9994 int val;
9995
9996 r = kstrtoint(buf, 0, &val);
9997 if ((r < 0) || (val < -255) || (val > 255))
9998 return -EINVAL;
9999
10000 if (get_cpu_type() <= MESON_CPU_MAJOR_ID_GXTVBB)
10001 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y +
10002 cur_dev->vpp_off, val, 8, 9);
10003 else
10004 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y +
10005 cur_dev->vpp_off, val << 1, 8, 10);
10006
10007 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ1_EN);
10008
10009 return count;
10010}
10011
10012static ssize_t video_contrast_show(struct class *cla,
10013 struct class_attribute *attr, char *buf)
10014{
10015 return sprintf(buf, "%d\n",
10016 (int)(READ_VCBUS_REG(VPP_VADJ1_Y + cur_dev->vpp_off) &
10017 0xff) - 0x80);
10018}
10019
10020static ssize_t video_contrast_store(struct class *cla,
10021 struct class_attribute *attr,
10022 const char *buf, size_t count)
10023{
10024 int r;
10025 int val;
10026
10027 r = kstrtoint(buf, 0, &val);
10028 if ((r < 0) || (val < -127) || (val > 127))
10029 return -EINVAL;
10030
10031 val += 0x80;
10032
10033 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y + cur_dev->vpp_off, val, 0, 8);
10034 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ1_EN);
10035
10036 return count;
10037}
10038
10039static ssize_t vpp_brightness_show(struct class *cla,
10040 struct class_attribute *attr, char *buf)
10041{
10042 s32 val = (READ_VCBUS_REG(VPP_VADJ2_Y +
10043 cur_dev->vpp_off) >> 8) & 0x1ff;
10044
10045 val = (val << 23) >> 23;
10046
10047 return sprintf(buf, "%d\n", val);
10048}
10049
10050static ssize_t vpp_brightness_store(struct class *cla,
10051 struct class_attribute *attr,
10052 const char *buf, size_t count)
10053{
10054 int r;
10055 int val;
10056
10057 r = kstrtoint(buf, 0, &val);
10058 if ((r < 0) || (val < -255) || (val > 255))
10059 return -EINVAL;
10060
10061 if (get_cpu_type() <= MESON_CPU_MAJOR_ID_GXTVBB)
10062 WRITE_VCBUS_REG_BITS(VPP_VADJ2_Y +
10063 cur_dev->vpp_off, val, 8, 9);
10064 else
10065 WRITE_VCBUS_REG_BITS(VPP_VADJ2_Y +
10066 cur_dev->vpp_off, val << 1, 8, 10);
10067
10068 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ2_EN);
10069
10070 return count;
10071}
10072
10073static ssize_t vpp_contrast_show(struct class *cla,
10074 struct class_attribute *attr, char *buf)
10075{
10076 return sprintf(buf, "%d\n",
10077 (int)(READ_VCBUS_REG(VPP_VADJ2_Y + cur_dev->vpp_off) &
10078 0xff) - 0x80);
10079}
10080
10081static ssize_t vpp_contrast_store(struct class *cla,
10082 struct class_attribute *attr, const char *buf,
10083 size_t count)
10084{
10085 int r;
10086 int val;
10087
10088 r = kstrtoint(buf, 0, &val);
10089 if ((r < 0) || (val < -127) || (val > 127))
10090 return -EINVAL;
10091
10092 val += 0x80;
10093
10094 WRITE_VCBUS_REG_BITS(VPP_VADJ2_Y + cur_dev->vpp_off, val, 0, 8);
10095 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ2_EN);
10096
10097 return count;
10098}
10099
10100static ssize_t video_saturation_show(struct class *cla,
10101 struct class_attribute *attr, char *buf)
10102{
10103 return sprintf(buf, "%d\n",
10104 READ_VCBUS_REG(VPP_VADJ1_Y + cur_dev->vpp_off) & 0xff);
10105}
10106
10107static ssize_t video_saturation_store(struct class *cla,
10108 struct class_attribute *attr,
10109 const char *buf, size_t count)
10110{
10111 int r;
10112 int val;
10113
10114 r = kstrtoint(buf, 0, &val);
10115 if ((r < 0) || (val < -127) || (val > 127))
10116 return -EINVAL;
10117
10118 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y + cur_dev->vpp_off, val, 0, 8);
10119 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ1_EN);
10120
10121 return count;
10122}
10123
10124static ssize_t vpp_saturation_hue_show(struct class *cla,
10125 struct class_attribute *attr, char *buf)
10126{
10127 return sprintf(buf, "0x%x\n", READ_VCBUS_REG(VPP_VADJ2_MA_MB));
10128}
10129
10130static ssize_t vpp_saturation_hue_store(struct class *cla,
10131 struct class_attribute *attr,
10132 const char *buf, size_t count)
10133{
10134 int r;
10135 s32 mab = 0;
10136 s16 mc = 0, md = 0;
10137
10138 r = kstrtoint(buf, 0, &mab);
10139 if ((r < 0) || (mab & 0xfc00fc00))
10140 return -EINVAL;
10141
10142 WRITE_VCBUS_REG(VPP_VADJ2_MA_MB, mab);
10143 mc = (s16) ((mab << 22) >> 22); /* mc = -mb */
10144 mc = 0 - mc;
10145 if (mc > 511)
10146 mc = 511;
10147 if (mc < -512)
10148 mc = -512;
10149 md = (s16) ((mab << 6) >> 22); /* md = ma; */
10150 mab = ((mc & 0x3ff) << 16) | (md & 0x3ff);
10151 WRITE_VCBUS_REG(VPP_VADJ2_MC_MD, mab);
10152 /* WRITE_MPEG_REG(VPP_VADJ_CTRL, 1); */
10153 WRITE_VCBUS_REG_BITS(VPP_VADJ_CTRL + cur_dev->vpp_off, 1, 2, 1);
10154#ifdef PQ_DEBUG_EN
10155 pr_info("\n[amvideo..] set vpp_saturation OK!!!\n");
10156#endif
10157 return count;
10158}
10159
10160/* [ 24] 1/enable, 0/disable */
10161/* [23:16] Y */
10162/* [15: 8] Cb */
10163/* [ 7: 0] Cr */
10164static ssize_t video_test_screen_show(struct class *cla,
10165 struct class_attribute *attr, char *buf)
10166{
10167 return sprintf(buf, "0x%x\n", test_screen);
10168}
10169static ssize_t video_rgb_screen_show(struct class *cla,
10170 struct class_attribute *attr, char *buf)
10171{
10172 return sprintf(buf, "0x%x\n", rgb_screen);
10173}
10174
10175#define SCALE 6
10176
10177static short R_Cr[] = { -11484, -11394, -11305, -11215, -11125,
10178-11036, -10946, -10856, -10766, -10677, -10587, -10497, -10407,
10179-10318, -10228, -10138, -10049, -9959, -9869, -9779, -9690, -9600,
10180-9510, -9420, -9331, -9241, -9151, -9062, -8972, -8882, -8792, -8703,
10181-8613, -8523, -8433, -8344, -8254, -8164, -8075, -7985, -7895, -7805,
10182-7716, -7626, -7536, -7446, -7357, -7267, -7177, -7088, -6998, -6908,
10183-6818, -6729, -6639, -6549, -6459, -6370, -6280, -6190, -6101, -6011,
10184-5921, -5831, -5742, -5652, -5562, -5472, -5383, -5293, -5203, -5113,
10185-5024, -4934, -4844, -4755, -4665, -4575, -4485, -4396, -4306, -4216,
10186-4126, -4037, -3947, -3857, -3768, -3678, -3588, -3498, -3409, -3319,
10187-3229, -3139, -3050, -2960, -2870, -2781, -2691, -2601, -2511, -2422,
10188-2332, -2242, -2152, -2063, -1973, -1883, -1794, -1704, -1614, -1524,
10189-1435, -1345, -1255, -1165, -1076, -986, -896, -807, -717, -627, -537,
10190-448, -358, -268, -178, -89, 0, 90, 179, 269, 359, 449, 538, 628, 718,
10191808, 897, 987, 1077, 1166, 1256, 1346, 1436, 1525, 1615, 1705, 1795,
101921884, 1974, 2064, 2153, 2243, 2333, 2423, 2512, 2602, 2692, 2782,
101932871, 2961, 3051, 3140, 3230, 3320, 3410, 3499, 3589, 3679, 3769,
101943858, 3948, 4038, 4127, 4217, 4307, 4397, 4486, 4576, 4666, 4756,
101954845, 4935, 5025, 5114, 5204, 5294, 5384, 5473, 5563, 5653, 5743,
101965832, 5922, 6012, 6102, 6191, 6281, 6371, 6460, 6550, 6640, 6730,
101976819, 6909, 6999, 7089, 7178, 7268, 7358, 7447, 7537, 7627, 7717,
101987806, 7896, 7986, 8076, 8165, 8255, 8345, 8434, 8524, 8614, 8704,
101998793, 8883, 8973, 9063, 9152, 9242, 9332, 9421, 9511, 9601, 9691,
102009780, 9870, 9960, 10050, 10139, 10229, 10319, 10408, 10498, 10588,
1020110678, 10767, 10857, 10947, 11037, 11126, 11216, 11306, 11395 };
10202
10203static short G_Cb[] = { 2819, 2797, 2775, 2753, 2731, 2709, 2687,
102042665, 2643, 2621, 2599, 2577, 2555, 2533, 2511, 2489, 2467, 2445,
102052423, 2401, 2379, 2357, 2335, 2313, 2291, 2269, 2247, 2225, 2202,
102062180, 2158, 2136, 2114, 2092, 2070, 2048, 2026, 2004, 1982, 1960,
102071938, 1916, 1894, 1872, 1850, 1828, 1806, 1784, 1762, 1740, 1718,
102081696, 1674, 1652, 1630, 1608, 1586, 1564, 1542, 1520, 1498, 1476,
102091454, 1432, 1410, 1388, 1366, 1344, 1321, 1299, 1277, 1255, 1233,
102101211, 1189, 1167, 1145, 1123, 1101, 1079, 1057, 1035, 1013, 991, 969,
10211947, 925, 903, 881, 859, 837, 815, 793, 771, 749, 727, 705, 683, 661,
10212639, 617, 595, 573, 551, 529, 507, 485, 463, 440, 418, 396, 374, 352,
10213330, 308, 286, 264, 242, 220, 198, 176, 154, 132, 110, 88, 66, 44, 22,
102140, -21, -43, -65, -87, -109, -131, -153, -175, -197, -219, -241, -263,
10215-285, -307, -329, -351, -373, -395, -417, -439, -462, -484, -506,
10216-528, -550, -572, -594, -616, -638, -660, -682, -704, -726, -748,
10217-770, -792, -814, -836, -858, -880, -902, -924, -946, -968, -990,
10218-1012, -1034, -1056, -1078, -1100, -1122, -1144, -1166, -1188, -1210,
10219-1232, -1254, -1276, -1298, -1320, -1343, -1365, -1387, -1409, -1431,
10220-1453, -1475, -1497, -1519, -1541, -1563, -1585, -1607, -1629, -1651,
10221-1673, -1695, -1717, -1739, -1761, -1783, -1805, -1827, -1849, -1871,
10222-1893, -1915, -1937, -1959, -1981, -2003, -2025, -2047, -2069, -2091,
10223-2113, -2135, -2157, -2179, -2201, -2224, -2246, -2268, -2290, -2312,
10224-2334, -2356, -2378, -2400, -2422, -2444, -2466, -2488, -2510, -2532,
10225-2554, -2576, -2598, -2620, -2642, -2664, -2686, -2708, -2730, -2752,
10226-2774, -2796 };
10227
10228static short G_Cr[] = { 5850, 5805, 5759, 5713, 5667, 5622, 5576,
102295530, 5485, 5439, 5393, 5347, 5302, 5256, 5210, 5165, 5119, 5073,
102305028, 4982, 4936, 4890, 4845, 4799, 4753, 4708, 4662, 4616, 4570,
102314525, 4479, 4433, 4388, 4342, 4296, 4251, 4205, 4159, 4113, 4068,
102324022, 3976, 3931, 3885, 3839, 3794, 3748, 3702, 3656, 3611, 3565,
102333519, 3474, 3428, 3382, 3336, 3291, 3245, 3199, 3154, 3108, 3062,
102343017, 2971, 2925, 2879, 2834, 2788, 2742, 2697, 2651, 2605, 2559,
102352514, 2468, 2422, 2377, 2331, 2285, 2240, 2194, 2148, 2102, 2057,
102362011, 1965, 1920, 1874, 1828, 1782, 1737, 1691, 1645, 1600, 1554,
102371508, 1463, 1417, 1371, 1325, 1280, 1234, 1188, 1143, 1097, 1051,
102381006, 960, 914, 868, 823, 777, 731, 686, 640, 594, 548, 503, 457, 411,
10239366, 320, 274, 229, 183, 137, 91, 46, 0, -45, -90, -136, -182, -228,
10240-273, -319, -365, -410, -456, -502, -547, -593, -639, -685, -730,
10241-776, -822, -867, -913, -959, -1005, -1050, -1096, -1142, -1187,
10242-1233, -1279, -1324, -1370, -1416, -1462, -1507, -1553, -1599, -1644,
10243-1690, -1736, -1781, -1827, -1873, -1919, -1964, -2010, -2056, -2101,
10244-2147, -2193, -2239, -2284, -2330, -2376, -2421, -2467, -2513, -2558,
10245-2604, -2650, -2696, -2741, -2787, -2833, -2878, -2924, -2970, -3016,
10246-3061, -3107, -3153, -3198, -3244, -3290, -3335, -3381, -3427, -3473,
10247-3518, -3564, -3610, -3655, -3701, -3747, -3793, -3838, -3884, -3930,
10248-3975, -4021, -4067, -4112, -4158, -4204, -4250, -4295, -4341, -4387,
10249-4432, -4478, -4524, -4569, -4615, -4661, -4707, -4752, -4798, -4844,
10250-4889, -4935, -4981, -5027, -5072, -5118, -5164, -5209, -5255, -5301,
10251-5346, -5392, -5438, -5484, -5529, -5575, -5621, -5666, -5712, -5758,
10252-5804 };
10253
10254static short B_Cb[] = { -14515, -14402, -14288, -14175, -14062,
10255-13948, -13835, -13721, -13608, -13495, -13381, -13268, -13154,
10256-13041, -12928, -12814, -12701, -12587, -12474, -12360, -12247,
10257-12134, -12020, -11907, -11793, -11680, -11567, -11453, -11340,
10258-11226, -11113, -11000, -10886, -10773, -10659, -10546, -10433,
10259-10319, -10206, -10092, -9979, -9865, -9752, -9639, -9525, -9412,
10260-9298, -9185, -9072, -8958, -8845, -8731, -8618, -8505, -8391, -8278,
10261-8164, -8051, -7938, -7824, -7711, -7597, -7484, -7371, -7257, -7144,
10262-7030, -6917, -6803, -6690, -6577, -6463, -6350, -6236, -6123, -6010,
10263-5896, -5783, -5669, -5556, -5443, -5329, -5216, -5102, -4989, -4876,
10264-4762, -4649, -4535, -4422, -4309, -4195, -4082, -3968, -3855, -3741,
10265-3628, -3515, -3401, -3288, -3174, -3061, -2948, -2834, -2721, -2607,
10266-2494, -2381, -2267, -2154, -2040, -1927, -1814, -1700, -1587, -1473,
10267-1360, -1246, -1133, -1020, -906, -793, -679, -566, -453, -339, -226,
10268-112, 0, 113, 227, 340, 454, 567, 680, 794, 907, 1021, 1134, 1247,
102691361, 1474, 1588, 1701, 1815, 1928, 2041, 2155, 2268, 2382, 2495,
102702608, 2722, 2835, 2949, 3062, 3175, 3289, 3402, 3516, 3629, 3742,
102713856, 3969, 4083, 4196, 4310, 4423, 4536, 4650, 4763, 4877, 4990,
102725103, 5217, 5330, 5444, 5557, 5670, 5784, 5897, 6011, 6124, 6237,
102736351, 6464, 6578, 6691, 6804, 6918, 7031, 7145, 7258, 7372, 7485,
102747598, 7712, 7825, 7939, 8052, 8165, 8279, 8392, 8506, 8619, 8732,
102758846, 8959, 9073, 9186, 9299, 9413, 9526, 9640, 9753, 9866, 9980,
1027610093, 10207, 10320, 10434, 10547, 10660, 10774, 10887, 11001, 11114,
1027711227, 11341, 11454, 11568, 11681, 11794, 11908, 12021, 12135, 12248,
1027812361, 12475, 12588, 12702, 12815, 12929, 13042, 13155, 13269, 13382,
1027913496, 13609, 13722, 13836, 13949, 14063, 14176, 14289, 14403
10280};
10281
10282static u32 yuv2rgb(u32 yuv)
10283{
10284 int y = (yuv >> 16) & 0xff;
10285 int cb = (yuv >> 8) & 0xff;
10286 int cr = yuv & 0xff;
10287 int r, g, b;
10288
10289 r = y + ((R_Cr[cr]) >> SCALE);
10290 g = y + ((G_Cb[cb] + G_Cr[cr]) >> SCALE);
10291 b = y + ((B_Cb[cb]) >> SCALE);
10292
10293 r = r - 16;
10294 if (r < 0)
10295 r = 0;
10296 r = r*1164/1000;
10297 g = g - 16;
10298 if (g < 0)
10299 g = 0;
10300 g = g*1164/1000;
10301 b = b - 16;
10302 if (b < 0)
10303 b = 0;
10304 b = b*1164/1000;
10305
10306 r = (r <= 0) ? 0 : (r >= 255) ? 255 : r;
10307 g = (g <= 0) ? 0 : (g >= 255) ? 255 : g;
10308 b = (b <= 0) ? 0 : (b >= 255) ? 255 : b;
10309
10310 return (r << 16) | (g << 8) | b;
10311}
10312/* 8bit convert to 10bit */
10313static u32 eight2ten(u32 yuv)
10314{
10315 int y = (yuv >> 16) & 0xff;
10316 int cb = (yuv >> 8) & 0xff;
10317 int cr = yuv & 0xff;
10318 u32 data32;
10319
10320 /* txlx need check vd1 path bit width by s2u registers */
10321 if (get_cpu_type() == MESON_CPU_MAJOR_ID_TXLX) {
10322 data32 = READ_VCBUS_REG(0x1d94) & 0xffff;
10323 if ((data32 == 0x2000) ||
10324 (data32 == 0x800))
10325 return ((y << 20)<<2) | ((cb << 10)<<2) | (cr<<2);
10326 else
10327 return (y << 20) | (cb << 10) | cr;
10328 } else
10329 return (y << 20) | (cb << 10) | cr;
10330}
10331
10332static u32 rgb2yuv(u32 rgb)
10333{
10334 int r = (rgb >> 16) & 0xff;
10335 int g = (rgb >> 8) & 0xff;
10336 int b = rgb & 0xff;
10337 int y, u, v;
10338
10339 y = ((47*r + 157*g + 16*b + 128) >> 8) + 16;
10340 u = ((-26*r - 87*g + 112*b + 128) >> 8) + 128;
10341 v = ((112*r - 102*g - 10*b + 128) >> 8) + 128;
10342
10343 return (y << 16) | (u << 8) | v;
10344}
10345
10346static ssize_t video_test_screen_store(struct class *cla,
10347 struct class_attribute *attr,
10348 const char *buf, size_t count)
10349{
10350 int r;
10351 unsigned int data = 0x0;
10352
10353 r = kstrtoint(buf, 0, &test_screen);
10354 if (r < 0)
10355 return -EINVAL;
10356#if 0/*no use now*/
10357 /* vdin0 pre post blend enable or disabled */
10358 data = READ_VCBUS_REG(VPP_MISC);
10359 if (test_screen & 0x01000000)
10360 data |= VPP_VD1_PREBLEND;
10361 else
10362 data &= (~VPP_VD1_PREBLEND);
10363
10364 if (test_screen & 0x02000000)
10365 data |= VPP_VD1_POSTBLEND;
10366 else
10367 data &= (~VPP_VD1_POSTBLEND);
10368#endif
10369
10370#if DEBUG_TMP
10371 if (test_screen & 0x04000000)
10372 data |= VPP_VD2_PREBLEND;
10373 else
10374 data &= (~VPP_VD2_PREBLEND);
10375
10376 if (test_screen & 0x08000000)
10377 data |= VPP_VD2_POSTBLEND;
10378 else
10379 data &= (~VPP_VD2_POSTBLEND);
10380#endif
10381
10382 /* show test screen YUV blend*/
10383 if (!legacy_vpp)
10384 WRITE_VCBUS_REG(
10385 VPP_POST_BLEND_BLEND_DUMMY_DATA,
10386 test_screen & 0x00ffffff);
10387 else if (is_meson_gxm_cpu() ||
10388 (get_cpu_type() == MESON_CPU_MAJOR_ID_TXLX))
10389 /* bit width change to 10bit in gxm, 10/12 in txlx*/
10390 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10391 eight2ten(test_screen & 0x00ffffff));
10392 else if (get_cpu_type() == MESON_CPU_MAJOR_ID_GXTVBB)
10393 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10394 yuv2rgb(test_screen & 0x00ffffff));
10395 else if (get_cpu_type() < MESON_CPU_MAJOR_ID_GXTVBB)
10396 if (READ_VCBUS_REG(VIU_OSD1_BLK0_CFG_W0) & 0x80)
10397 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10398 test_screen & 0x00ffffff);
10399 else /* RGB blend */
10400 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10401 yuv2rgb(test_screen & 0x00ffffff));
10402 else
10403 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10404 test_screen & 0x00ffffff);
10405#if 0/*no use*/
10406 WRITE_VCBUS_REG(VPP_MISC, data);
10407#endif
10408 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
10409 pr_info("%s write(VPP_MISC,%x) write(VPP_DUMMY_DATA1, %x)\n",
10410 __func__, data, test_screen & 0x00ffffff);
10411 }
10412 return count;
10413}
10414
10415static ssize_t video_rgb_screen_store(struct class *cla,
10416 struct class_attribute *attr,
10417 const char *buf, size_t count)
10418{
10419 int r;
10420 u32 yuv_eight;
10421
10422 /* unsigned data = 0x0; */
10423 r = kstrtoint(buf, 0, &rgb_screen);
10424 if (r < 0)
10425 return -EINVAL;
10426
10427#if DEBUG_TMP
10428 /* vdin0 pre post blend enable or disabled */
10429
10430 data = READ_VCBUS_REG(VPP_MISC);
10431 if (rgb_screen & 0x01000000)
10432 data |= VPP_VD1_PREBLEND;
10433 else
10434 data &= (~VPP_VD1_PREBLEND);
10435
10436 if (rgb_screen & 0x02000000)
10437 data |= VPP_VD1_POSTBLEND;
10438 else
10439 data &= (~VPP_VD1_POSTBLEND);
10440
10441 if (test_screen & 0x04000000)
10442 data |= VPP_VD2_PREBLEND;
10443 else
10444 data &= (~VPP_VD2_PREBLEND);
10445
10446 if (test_screen & 0x08000000)
10447 data |= VPP_VD2_POSTBLEND;
10448 else
10449 data &= (~VPP_VD2_POSTBLEND);
10450#endif
10451 /* show test screen YUV blend*/
10452 yuv_eight = rgb2yuv(rgb_screen & 0x00ffffff);
10453 if (!legacy_vpp) {
10454 WRITE_VCBUS_REG(
10455 VPP_POST_BLEND_BLEND_DUMMY_DATA,
10456 yuv_eight & 0x00ffffff);
10457 } else if (is_meson_gxtvbb_cpu()) {
10458 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10459 rgb_screen & 0x00ffffff);
10460 } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL)) {
10461 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10462 eight2ten(yuv_eight & 0x00ffffff));
10463 }
10464 /* WRITE_VCBUS_REG(VPP_MISC, data); */
10465
10466 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
10467 pr_info("%s write(VPP_DUMMY_DATA1, %x)\n",
10468 __func__, rgb_screen & 0x00ffffff);
10469 }
10470 return count;
10471}
10472
10473
10474
10475static ssize_t video_nonlinear_factor_show(struct class *cla,
10476 struct class_attribute *attr,
10477 char *buf)
10478{
10479 u32 factor;
10480 struct disp_info_s *layer = &glayer_info[0];
10481
10482 factor = vpp_get_nonlinear_factor(layer);
10483
10484 return sprintf(buf, "%d\n", factor);
10485}
10486
10487static ssize_t video_nonlinear_factor_store(struct class *cla,
10488 struct class_attribute *attr,
10489 const char *buf, size_t count)
10490{
10491 int r;
10492 u32 factor;
10493 struct disp_info_s *layer = &glayer_info[0];
10494
10495 r = kstrtoint(buf, 0, &factor);
10496 if (r < 0)
10497 return -EINVAL;
10498
10499 if (vpp_set_nonlinear_factor(layer, factor) == 0)
10500 video_property_changed = 1;
10501
10502 return count;
10503}
10504
10505static ssize_t video_disable_show(struct class *cla,
10506 struct class_attribute *attr, char *buf)
10507{
10508 return sprintf(buf, "%d\n", disable_video);
10509}
10510
10511static ssize_t video_disable_store(struct class *cla,
10512 struct class_attribute *attr,
10513 const char *buf, size_t count)
10514{
10515 int r;
10516 int val;
10517
10518 if (debug_flag & DEBUG_FLAG_BLACKOUT)
10519 pr_info("%s(%s)\n", __func__, buf);
10520
10521 r = kstrtoint(buf, 0, &val);
10522 if (r < 0)
10523 return -EINVAL;
10524
10525 if (_video_set_disable(val) < 0)
10526 return -EINVAL;
10527
10528 return count;
10529}
10530
10531static ssize_t video_global_output_show(struct class *cla,
10532 struct class_attribute *attr, char *buf)
10533{
10534 return sprintf(buf, "%d\n", video_global_output);
10535}
10536
10537static ssize_t video_global_output_store(struct class *cla,
10538 struct class_attribute *attr,
10539 const char *buf, size_t count)
10540{
10541 int r;
10542
10543 r = kstrtoint(buf, 0, &video_global_output);
10544 if (r < 0)
10545 return -EINVAL;
10546
10547 pr_info("%s(%d)\n", __func__, video_global_output);
10548
10549 return count;
10550}
10551
10552static ssize_t video_hold_show(struct class *cla,
10553 struct class_attribute *attr, char *buf)
10554{
10555 return sprintf(buf, "%d\n", hold_video);
10556}
10557
10558static ssize_t video_hold_store(struct class *cla,
10559 struct class_attribute *attr,
10560 const char *buf, size_t count)
10561{
10562 int r;
10563
10564 if (debug_flag & DEBUG_FLAG_BLACKOUT)
10565 pr_info("%s(%s)\n", __func__, buf);
10566
10567 r = kstrtoint(buf, 0, &hold_video);
10568 if (r < 0)
10569 return -EINVAL;
10570
10571 return count;
10572}
10573
10574static ssize_t video_freerun_mode_show(struct class *cla,
10575 struct class_attribute *attr, char *buf)
10576{
10577 return sprintf(buf, "%d\n", freerun_mode);
10578}
10579
10580static ssize_t video_freerun_mode_store(struct class *cla,
10581 struct class_attribute *attr,
10582 const char *buf, size_t count)
10583{
10584 int r;
10585
10586 r = kstrtoint(buf, 0, &freerun_mode);
10587 if (r < 0)
10588 return -EINVAL;
10589
10590 if (debug_flag)
10591 pr_info("%s(%d)\n", __func__, freerun_mode);
10592
10593 return count;
10594}
10595
10596static ssize_t video_speed_check_show(struct class *cla,
10597 struct class_attribute *attr, char *buf)
10598{
10599 u32 h, w;
10600 struct disp_info_s *layer = &glayer_info[0];
10601
10602 h = layer->speed_check_height;
10603 w = layer->speed_check_width;
10604
10605 return snprintf(buf, 40, "%d %d\n", h, w);
10606}
10607
10608static ssize_t video_speed_check_store(struct class *cla,
10609 struct class_attribute *attr,
10610 const char *buf, size_t count)
10611{
10612 set_video_speed_check(buf);
10613 return strnlen(buf, count);
10614}
10615
10616static ssize_t threedim_mode_store(struct class *cla,
10617 struct class_attribute *attr,
10618 const char *buf, size_t len)
10619{
10620#ifdef TV_3D_FUNCTION_OPEN
10621
10622 u32 type;
10623 int r;
10624
10625 r = kstrtoint(buf, 0, &type);
10626 if (r < 0)
10627 return -EINVAL;
10628
10629 if (type != process_3d_type) {
10630 process_3d_type = type;
10631 if (mvc_flag)
10632 process_3d_type |= MODE_3D_MVC;
10633 video_property_changed = 1;
10634 if ((process_3d_type & MODE_3D_FA)
10635 && cur_dispbuf && !cur_dispbuf->trans_fmt)
10636 /*notify di 3d mode is frame alternative mode,1*/
10637 /*passing two buffer in one frame */
10638 vf_notify_receiver_by_name("deinterlace",
10639 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE,
10640 (void *)1);
10641 else
10642 vf_notify_receiver_by_name("deinterlace",
10643 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE,
10644 (void *)0);
10645 }
10646#endif
10647 return len;
10648}
10649
10650static ssize_t threedim_mode_show(struct class *cla,
10651 struct class_attribute *attr, char *buf)
10652{
10653#ifdef TV_3D_FUNCTION_OPEN
10654 return sprintf(buf, "process type 0x%x,trans fmt %u.\n",
10655 process_3d_type, video_3d_format);
10656#else
10657 return 0;
10658#endif
10659}
10660
10661static ssize_t frame_addr_show(struct class *cla, struct class_attribute *attr,
10662 char *buf)
10663{
10664 struct canvas_s canvas;
10665 u32 addr[3];
10666
10667 if (cur_dispbuf) {
10668 canvas_read(cur_dispbuf->canvas0Addr & 0xff, &canvas);
10669 addr[0] = canvas.addr;
10670 canvas_read((cur_dispbuf->canvas0Addr >> 8) & 0xff, &canvas);
10671 addr[1] = canvas.addr;
10672 canvas_read((cur_dispbuf->canvas0Addr >> 16) & 0xff, &canvas);
10673 addr[2] = canvas.addr;
10674
10675 return sprintf(buf, "0x%x-0x%x-0x%x\n", addr[0], addr[1],
10676 addr[2]);
10677 }
10678
10679 return sprintf(buf, "NA\n");
10680}
10681
10682static ssize_t frame_canvas_width_show(struct class *cla,
10683 struct class_attribute *attr, char *buf)
10684{
10685 struct canvas_s canvas;
10686 u32 width[3];
10687
10688 if (cur_dispbuf) {
10689 canvas_read(cur_dispbuf->canvas0Addr & 0xff, &canvas);
10690 width[0] = canvas.width;
10691 canvas_read((cur_dispbuf->canvas0Addr >> 8) & 0xff, &canvas);
10692 width[1] = canvas.width;
10693 canvas_read((cur_dispbuf->canvas0Addr >> 16) & 0xff, &canvas);
10694 width[2] = canvas.width;
10695
10696 return sprintf(buf, "%d-%d-%d\n",
10697 width[0], width[1], width[2]);
10698 }
10699
10700 return sprintf(buf, "NA\n");
10701}
10702
10703static ssize_t frame_canvas_height_show(struct class *cla,
10704 struct class_attribute *attr, char *buf)
10705{
10706 struct canvas_s canvas;
10707 u32 height[3];
10708
10709 if (cur_dispbuf) {
10710 canvas_read(cur_dispbuf->canvas0Addr & 0xff, &canvas);
10711 height[0] = canvas.height;
10712 canvas_read((cur_dispbuf->canvas0Addr >> 8) & 0xff, &canvas);
10713 height[1] = canvas.height;
10714 canvas_read((cur_dispbuf->canvas0Addr >> 16) & 0xff, &canvas);
10715 height[2] = canvas.height;
10716
10717 return sprintf(buf, "%d-%d-%d\n", height[0], height[1],
10718 height[2]);
10719 }
10720
10721 return sprintf(buf, "NA\n");
10722}
10723
10724static ssize_t frame_width_show(struct class *cla,
10725 struct class_attribute *attr,
10726 char *buf)
10727{
10728 if (cur_dispbuf) {
10729 if (cur_dispbuf->type & VIDTYPE_COMPRESS)
10730 return sprintf(buf, "%d\n", cur_dispbuf->compWidth);
10731 else
10732 return sprintf(buf, "%d\n", cur_dispbuf->width);
10733 }
10734
10735 return sprintf(buf, "NA\n");
10736}
10737
10738static ssize_t frame_height_show(struct class *cla,
10739 struct class_attribute *attr, char *buf)
10740{
10741 if (cur_dispbuf) {
10742 if (cur_dispbuf->type & VIDTYPE_COMPRESS)
10743 return sprintf(buf, "%d\n", cur_dispbuf->compHeight);
10744 else
10745 return sprintf(buf, "%d\n", cur_dispbuf->height);
10746 }
10747
10748 return sprintf(buf, "NA\n");
10749}
10750
10751static ssize_t frame_format_show(struct class *cla,
10752 struct class_attribute *attr, char *buf)
10753{
10754 ssize_t ret = 0;
10755
10756 if (cur_dispbuf) {
10757 if ((cur_dispbuf->type & VIDTYPE_TYPEMASK) ==
10758 VIDTYPE_INTERLACE_TOP)
10759 ret = sprintf(buf, "interlace-top\n");
10760 else if ((cur_dispbuf->type & VIDTYPE_TYPEMASK) ==
10761 VIDTYPE_INTERLACE_BOTTOM)
10762 ret = sprintf(buf, "interlace-bottom\n");
10763 else
10764 ret = sprintf(buf, "progressive\n");
10765
10766 if (cur_dispbuf->type & VIDTYPE_COMPRESS)
10767 ret += sprintf(buf + ret, "Compressed\n");
10768
10769 return ret;
10770 }
10771
10772 return sprintf(buf, "NA\n");
10773}
10774
10775static ssize_t frame_aspect_ratio_show(struct class *cla,
10776 struct class_attribute *attr, char *buf)
10777{
10778 if (cur_dispbuf) {
10779 u32 ar = (cur_dispbuf->ratio_control &
10780 DISP_RATIO_ASPECT_RATIO_MASK) >>
10781 DISP_RATIO_ASPECT_RATIO_BIT;
10782
10783 if (ar)
10784 return sprintf(buf, "0x%x\n", ar);
10785 else
10786 return sprintf(buf, "0x%x\n",
10787 (cur_dispbuf->width << 8) /
10788 cur_dispbuf->height);
10789 }
10790
10791 return sprintf(buf, "NA\n");
10792}
10793
10794static ssize_t frame_rate_show(struct class *cla, struct class_attribute *attr,
10795 char *buf)
10796{
10797 u32 cnt = frame_count - last_frame_count;
10798 u32 time = jiffies;
10799 u32 tmp = time;
10800 u32 rate = 0;
10801 u32 vsync_rate;
10802 ssize_t ret = 0;
10803
10804 time -= last_frame_time;
10805 last_frame_time = tmp;
10806 last_frame_count = frame_count;
10807 if (time == 0)
10808 return 0;
10809 rate = 100 * cnt * HZ / time;
10810 vsync_rate = 100 * vsync_count * HZ / time;
10811 if (vinfo->sync_duration_den > 0) {
10812 ret =
10813 sprintf(buf,
10814 "VF.fps=%d.%02d panel fps %d, dur/is: %d,v/s=%d.%02d,inc=%d\n",
10815 rate / 100, rate % 100,
10816 vinfo->sync_duration_num /
10817 vinfo->sync_duration_den,
10818 time, vsync_rate / 100, vsync_rate % 100,
10819 vsync_pts_inc);
10820 }
10821 if ((debugflags & DEBUG_FLAG_CALC_PTS_INC) && time > HZ * 10
10822 && vsync_rate > 0) {
10823 if ((vsync_rate * vsync_pts_inc / 100) != 90000)
10824 vsync_pts_inc = 90000 * 100 / (vsync_rate);
10825 }
10826 vsync_count = 0;
10827 return ret;
10828}
10829
10830static ssize_t vframe_states_show(struct class *cla,
10831 struct class_attribute *attr, char *buf)
10832{
10833 int ret = 0;
10834 struct vframe_states states;
10835 unsigned long flags;
10836 struct vframe_s *vf;
10837
10838 if (video_vf_get_states(&states) == 0) {
10839 ret += sprintf(buf + ret, "vframe_pool_size=%d\n",
10840 states.vf_pool_size);
10841 ret += sprintf(buf + ret, "vframe buf_free_num=%d\n",
10842 states.buf_free_num);
10843 ret += sprintf(buf + ret, "vframe buf_recycle_num=%d\n",
10844 states.buf_recycle_num);
10845 ret += sprintf(buf + ret, "vframe buf_avail_num=%d\n",
10846 states.buf_avail_num);
10847
10848 spin_lock_irqsave(&lock, flags);
10849
10850 vf = video_vf_peek();
10851 if (vf) {
10852 ret += sprintf(buf + ret,
10853 "vframe ready frame delayed =%dms\n",
10854 (int)(jiffies_64 -
10855 vf->ready_jiffies64) * 1000 /
10856 HZ);
10857 ret += sprintf(buf + ret,
10858 "vf index=%d\n", vf->index);
10859 ret += sprintf(buf + ret,
10860 "vf->pts=%d\n", vf->pts);
10861 ret += sprintf(buf + ret,
10862 "cur vpts=%d\n",
10863 timestamp_vpts_get());
10864 ret += sprintf(buf + ret,
10865 "vf type=%d\n",
10866 vf->type);
10867 if (vf->type & VIDTYPE_COMPRESS) {
10868 ret += sprintf(buf + ret,
10869 "vf compHeadAddr=%x\n",
10870 vf->compHeadAddr);
10871 ret += sprintf(buf + ret,
10872 "vf compBodyAddr =%x\n",
10873 vf->compBodyAddr);
10874 } else {
10875 ret += sprintf(buf + ret,
10876 "vf canvas0Addr=%x\n",
10877 vf->canvas0Addr);
10878 ret += sprintf(buf + ret,
10879 "vf canvas1Addr=%x\n",
10880 vf->canvas1Addr);
10881 ret += sprintf(buf + ret,
10882 "vf canvas0Addr.y.addr=%x(%d)\n",
10883 canvas_get_addr(
10884 canvasY(vf->canvas0Addr)),
10885 canvas_get_addr(
10886 canvasY(vf->canvas0Addr)));
10887 ret += sprintf(buf + ret,
10888 "vf canvas0Adr.uv.adr=%x(%d)\n",
10889 canvas_get_addr(
10890 canvasUV(vf->canvas0Addr)),
10891 canvas_get_addr(
10892 canvasUV(vf->canvas0Addr)));
10893 }
10894 }
10895 spin_unlock_irqrestore(&lock, flags);
10896
10897 } else
10898 ret += sprintf(buf + ret, "vframe no states\n");
10899
10900 return ret;
10901}
10902
10903#ifdef CONFIG_AM_VOUT
10904static ssize_t device_resolution_show(struct class *cla,
10905 struct class_attribute *attr, char *buf)
10906{
10907#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
10908 const struct vinfo_s *info;
10909
10910 if (cur_dev == &video_dev[0])
10911 info = get_current_vinfo();
10912 else
10913 info = get_current_vinfo2();
10914#else
10915 const struct vinfo_s *info = get_current_vinfo();
10916#endif
10917
10918 if (info != NULL)
10919 return sprintf(buf, "%dx%d\n", info->width, info->height);
10920 else
10921 return sprintf(buf, "0x0\n");
10922}
10923#endif
10924
10925static ssize_t video_filename_show(struct class *cla,
10926 struct class_attribute *attr, char *buf)
10927{
10928 return sprintf(buf, "%s\n", file_name);
10929}
10930
10931static ssize_t video_filename_store(struct class *cla,
10932 struct class_attribute *attr,
10933 const char *buf, size_t count)
10934{
10935 size_t r;
10936
10937 /* check input buf to mitigate buffer overflow issue */
10938 if (strlen(buf) >= sizeof(file_name)) {
10939 memcpy(file_name, buf, sizeof(file_name));
10940 file_name[sizeof(file_name)-1] = '\0';
10941 r = 1;
10942 } else
10943 r = sscanf(buf, "%s", file_name);
10944 if (r != 1)
10945 return -EINVAL;
10946
10947 return r;
10948}
10949
10950static ssize_t video_debugflags_show(struct class *cla,
10951 struct class_attribute *attr, char *buf)
10952{
10953 int len = 0;
10954
10955 len += sprintf(buf + len, "value=%d\n", debugflags);
10956 len += sprintf(buf + len, "bit0:playing as fast!\n");
10957 len += sprintf(buf + len,
10958 "bit1:enable calc pts inc in frame rate show\n");
10959 return len;
10960}
10961
10962static ssize_t video_debugflags_store(struct class *cla,
10963 struct class_attribute *attr,
10964 const char *buf, size_t count)
10965{
10966 int r;
10967 int value = -1;
10968
10969/*
10970 * r = sscanf(buf, "%d", &value);
10971 * if (r == 1) {
10972 * debugflags = value;
10973 * seted = 1;
10974 * } else {
10975 * r = sscanf(buf, "0x%x", &value);
10976 * if (r == 1) {
10977 * debugflags = value;
10978 * seted = 1;
10979 * }
10980 * }
10981 */
10982
10983 r = kstrtoint(buf, 0, &value);
10984 if (r < 0)
10985 return -EINVAL;
10986
10987 debugflags = value;
10988
10989 pr_info("debugflags changed to %d(%x)\n", debugflags,
10990 debugflags);
10991 return count;
10992
10993}
10994
10995static ssize_t trickmode_duration_show(struct class *cla,
10996 struct class_attribute *attr, char *buf)
10997{
10998 return sprintf(buf, "trickmode frame duration %d\n",
10999 trickmode_duration / 9000);
11000}
11001
11002static ssize_t trickmode_duration_store(struct class *cla,
11003 struct class_attribute *attr,
11004 const char *buf, size_t count)
11005{
11006 int r;
11007 u32 s_value;
11008
11009 r = kstrtoint(buf, 0, &s_value);
11010 if (r < 0)
11011 return -EINVAL;
11012
11013 trickmode_duration = s_value * 9000;
11014
11015 return count;
11016}
11017
11018static ssize_t video_vsync_pts_inc_upint_show(struct class *cla,
11019 struct class_attribute *attr,
11020 char *buf)
11021{
11022 if (vsync_pts_inc_upint)
11023 return sprintf(buf,
11024 "%d,freerun %d,1.25xInc %d,1.12xInc %d,inc+10 %d,1xInc %d\n",
11025 vsync_pts_inc_upint, vsync_freerun,
11026 vsync_pts_125, vsync_pts_112, vsync_pts_101,
11027 vsync_pts_100);
11028 else
11029 return sprintf(buf, "%d\n", vsync_pts_inc_upint);
11030}
11031
11032static ssize_t video_vsync_pts_inc_upint_store(struct class *cla,
11033 struct class_attribute *attr,
11034 const char *buf, size_t count)
11035{
11036 int r;
11037
11038 r = kstrtoint(buf, 0, &vsync_pts_inc_upint);
11039 if (r < 0)
11040 return -EINVAL;
11041
11042 if (debug_flag)
11043 pr_info("%s(%d)\n", __func__, vsync_pts_inc_upint);
11044
11045 return count;
11046}
11047
11048static ssize_t slowsync_repeat_enable_show(struct class *cla,
11049 struct class_attribute *attr,
11050 char *buf)
11051{
11052 return sprintf(buf, "slowsync repeate enable = %d\n",
11053 slowsync_repeat_enable);
11054}
11055
11056static ssize_t slowsync_repeat_enable_store(struct class *cla,
11057 struct class_attribute *attr,
11058 const char *buf, size_t count)
11059{
11060 int r;
11061
11062 r = kstrtoint(buf, 0, &slowsync_repeat_enable);
11063 if (r < 0)
11064 return -EINVAL;
11065
11066 if (debug_flag)
11067 pr_info("%s(%d)\n", __func__, slowsync_repeat_enable);
11068
11069 return count;
11070}
11071
11072static ssize_t video_vsync_slow_factor_show(struct class *cla,
11073 struct class_attribute *attr,
11074 char *buf)
11075{
11076 return sprintf(buf, "%d\n", vsync_slow_factor);
11077}
11078
11079static ssize_t video_vsync_slow_factor_store(struct class *cla,
11080 struct class_attribute *attr,
11081 const char *buf, size_t count)
11082{
11083 int r;
11084
11085 r = kstrtoint(buf, 0, &vsync_slow_factor);
11086 if (r < 0)
11087 return -EINVAL;
11088
11089 if (debug_flag)
11090 pr_info("%s(%d)\n", __func__, vsync_slow_factor);
11091
11092 return count;
11093}
11094
11095static ssize_t fps_info_show(struct class *cla, struct class_attribute *attr,
11096 char *buf)
11097{
11098 u32 cnt = frame_count - last_frame_count;
11099 u32 time = jiffies;
11100 u32 input_fps = 0;
11101 u32 tmp = time;
11102
11103 time -= last_frame_time;
11104 last_frame_time = tmp;
11105 last_frame_count = frame_count;
11106 if (time != 0)
11107 output_fps = cnt * HZ / time;
11108 if (cur_dispbuf && cur_dispbuf->duration > 0) {
11109 input_fps = 96000 / cur_dispbuf->duration;
11110 if (output_fps > input_fps)
11111 output_fps = input_fps;
11112 } else
11113 input_fps = output_fps;
11114 return sprintf(buf, "input_fps:0x%x output_fps:0x%x drop_fps:0x%x\n",
11115 input_fps, output_fps, input_fps - output_fps);
11116}
11117
11118static ssize_t video_layer1_state_show(struct class *cla,
11119 struct class_attribute *attr, char *buf)
11120{
11121 /*return sprintf(buf, "%d\n",*/
11122 /*(READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off)*/
11123 /*& VPP_VD1_PREBLEND) ? 1 : 0);*/
11124 return sprintf(buf, "%d\n", video_enabled);
11125}
11126
11127void set_video_angle(u32 s_value)
11128{
11129 struct disp_info_s *layer = &glayer_info[0];
11130
11131 if ((s_value <= 3) && (layer->angle != s_value)) {
11132 layer->angle = s_value;
11133 pr_info("video angle:%d\n", layer->angle);
11134 }
11135}
11136EXPORT_SYMBOL(set_video_angle);
11137
11138static ssize_t video_angle_show(struct class *cla, struct class_attribute *attr,
11139 char *buf)
11140{
11141 struct disp_info_s *layer = &glayer_info[0];
11142
11143 return snprintf(buf, 40, "%d\n", layer->angle);
11144}
11145
11146static ssize_t video_angle_store(struct class *cla,
11147 struct class_attribute *attr, const char *buf,
11148 size_t count)
11149{
11150 int r;
11151 u32 s_value;
11152
11153 r = kstrtoint(buf, 0, &s_value);
11154 if (r < 0)
11155 return -EINVAL;
11156
11157 set_video_angle(s_value);
11158 return strnlen(buf, count);
11159}
11160
11161static ssize_t show_first_frame_nosync_show(struct class *cla,
11162 struct class_attribute *attr,
11163 char *buf)
11164{
11165 return sprintf(buf, "%d\n", show_first_frame_nosync ? 1 : 0);
11166}
11167
11168static ssize_t show_first_frame_nosync_store(struct class *cla,
11169 struct class_attribute *attr,
11170 const char *buf, size_t count)
11171{
11172 int r;
11173 int value;
11174
11175 r = kstrtoint(buf, 0, &value);
11176 if (r < 0)
11177 return -EINVAL;
11178
11179 if (value == 0)
11180 show_first_frame_nosync = false;
11181 else
11182 show_first_frame_nosync = true;
11183
11184 return count;
11185}
11186
11187static ssize_t show_first_picture_store(struct class *cla,
11188 struct class_attribute *attr,
11189 const char *buf, size_t count)
11190{
11191 int r;
11192 int value;
11193
11194 r = kstrtoint(buf, 0, &value);
11195 if (r < 0)
11196 return -EINVAL;
11197
11198 if (value == 0)
11199 show_first_picture = false;
11200 else
11201 show_first_picture = true;
11202
11203 return count;
11204}
11205
11206static ssize_t video_free_keep_buffer_store(struct class *cla,
11207 struct class_attribute *attr,
11208 const char *buf, size_t count)
11209{
11210 int r;
11211 int val;
11212
11213 if (debug_flag & DEBUG_FLAG_BLACKOUT)
11214 pr_info("%s(%s)\n", __func__, buf);
11215 r = kstrtoint(buf, 0, &val);
11216 if (r < 0)
11217 return -EINVAL;
11218 if (val == 1)
11219 try_free_keep_video(1);
11220 return count;
11221}
11222
11223
11224static ssize_t free_cma_buffer_store(struct class *cla,
11225 struct class_attribute *attr,
11226 const char *buf, size_t count)
11227{
11228 int r;
11229 int val;
11230
11231 r = kstrtoint(buf, 0, &val);
11232 if (r < 0)
11233 return -EINVAL;
11234 if (val == 1) {
11235 pr_info("start to free cma buffer\n");
11236#if DEBUG_TMP
11237 vh265_free_cmabuf();
11238 vh264_4k_free_cmabuf();
11239 vdec_free_cmabuf();
11240#endif
11241 }
11242 return count;
11243}
11244
11245static ssize_t pic_mode_info_show(struct class *cla,
11246 struct class_attribute *attr, char *buf)
11247{
11248 int ret = 0;
11249
11250 if (cur_dispbuf) {
11251 u32 adapted_mode = (cur_dispbuf->ratio_control
11252 & DISP_RATIO_ADAPTED_PICMODE) ? 1 : 0;
11253 u32 info_frame = (cur_dispbuf->ratio_control
11254 & DISP_RATIO_INFOFRAME_AVAIL) ? 1 : 0;
11255
11256 ret += sprintf(buf + ret, "ratio_control=0x%x\n",
11257 cur_dispbuf->ratio_control);
11258 ret += sprintf(buf + ret, "adapted_mode=%d\n",
11259 adapted_mode);
11260 ret += sprintf(buf + ret, "info_frame=%d\n",
11261 info_frame);
11262 ret += sprintf(buf + ret,
11263 "hs=%d, he=%d, vs=%d, ve=%d\n",
11264 cur_dispbuf->pic_mode.hs,
11265 cur_dispbuf->pic_mode.he,
11266 cur_dispbuf->pic_mode.vs,
11267 cur_dispbuf->pic_mode.ve);
11268 ret += sprintf(buf + ret, "screen_mode=%d\n",
11269 cur_dispbuf->pic_mode.screen_mode);
11270 ret += sprintf(buf + ret, "custom_ar=%d\n",
11271 cur_dispbuf->pic_mode.custom_ar);
11272 ret += sprintf(buf + ret, "AFD_enable=%d\n",
11273 cur_dispbuf->pic_mode.AFD_enable);
11274 return ret;
11275 }
11276 return sprintf(buf, "NA\n");
11277}
11278
11279static ssize_t video_inuse_show(struct class *class,
11280 struct class_attribute *attr, char *buf)
11281{
11282 size_t r;
11283
11284 mutex_lock(&video_inuse_mutex);
11285 if (video_inuse == 0) {
11286 r = sprintf(buf, "%d\n", video_inuse);
11287 video_inuse = 1;
11288 pr_info("video_inuse return 0,set 1\n");
11289 } else {
11290 r = sprintf(buf, "%d\n", video_inuse);
11291 pr_info("video_inuse = %d\n", video_inuse);
11292 }
11293 mutex_unlock(&video_inuse_mutex);
11294 return r;
11295}
11296
11297static ssize_t video_inuse_store(struct class *class,
11298 struct class_attribute *attr,
11299 const char *buf, size_t count)
11300{
11301 size_t r;
11302 int val;
11303
11304 mutex_lock(&video_inuse_mutex);
11305 r = kstrtoint(buf, 0, &val);
11306 pr_info("set video_inuse val:%d\n", val);
11307 video_inuse = val;
11308 mutex_unlock(&video_inuse_mutex);
11309 if (r != 1)
11310 return -EINVAL;
11311
11312 return count;
11313}
11314
11315static ssize_t video_zorder_show(
11316 struct class *cla,
11317 struct class_attribute *attr,
11318 char *buf)
11319{
11320 struct disp_info_s *layer = &glayer_info[0];
11321
11322 return sprintf(buf, "%d\n", layer->zorder);
11323}
11324
11325static ssize_t video_zorder_store(
11326 struct class *cla,
11327 struct class_attribute *attr,
11328 const char *buf, size_t count)
11329{
11330 int zorder;
11331 int ret = 0;
11332 struct disp_info_s *layer = &glayer_info[0];
11333
11334 ret = kstrtoint(buf, 0, &zorder);
11335 if (ret < 0)
11336 return -EINVAL;
11337
11338 if (zorder != layer->zorder) {
11339 layer->zorder = zorder;
11340 video_property_changed = 1;
11341 }
11342 return count;
11343}
11344
11345#ifdef VIDEO_PIP
11346static int _videopip_set_disable(u32 val)
11347{
11348 if (val > VIDEO_DISABLE_FORNEXT)
11349 return -EINVAL;
11350
11351 disable_videopip = val;
11352
11353 if (disable_videopip != VIDEO_DISABLE_NONE) {
11354 DisableVideoLayer2();
11355
11356 if ((disable_videopip == VIDEO_DISABLE_FORNEXT)
11357 && cur_pipbuf && (cur_pipbuf != &local_pip))
11358 pip_property_changed = 1;
11359 } else {
11360 if (cur_pipbuf && (cur_pipbuf != &local_pip))
11361 EnableVideoLayer2();
11362 }
11363
11364 return 0;
11365}
11366
11367static ssize_t videopip_axis_show(
11368 struct class *cla,
11369 struct class_attribute *attr,
11370 char *buf)
11371{
11372 int x0, y0, x1, y1;
11373 struct disp_info_s *layer = &glayer_info[1];
11374
11375 x0 = layer->layer_left;
11376 y0 = layer->layer_top;
11377 x1 = layer->layer_width + x0 - 1;
11378 y1 = layer->layer_height + y0 - 1;
11379 return snprintf(buf, 40, "%d %d %d %d\n", x0, y0, x1, y1);
11380}
11381
11382static ssize_t videopip_axis_store(
11383 struct class *cla,
11384 struct class_attribute *attr,
11385 const char *buf, size_t count)
11386{
11387 struct disp_info_s *layer = &glayer_info[1];
11388
11389 mutex_lock(&video_module_mutex);
11390
11391 set_video_window(layer, buf);
11392
11393 mutex_unlock(&video_module_mutex);
11394
11395 return strnlen(buf, count);
11396}
11397
11398static ssize_t videopip_crop_show(
11399 struct class *cla,
11400 struct class_attribute *attr,
11401 char *buf)
11402{
11403 u32 t, l, b, r;
11404 struct disp_info_s *layer = &glayer_info[1];
11405
11406 t = layer->crop_top;
11407 l = layer->crop_left;
11408 b = layer->crop_bottom;
11409 r = layer->crop_right;
11410 return snprintf(buf, 40, "%d %d %d %d\n", t, l, b, r);
11411}
11412
11413static ssize_t videopip_crop_store(
11414 struct class *cla,
11415 struct class_attribute *attr,
11416 const char *buf, size_t count)
11417{
11418 struct disp_info_s *layer = &glayer_info[1];
11419
11420 mutex_lock(&video_module_mutex);
11421
11422 set_video_crop(layer, buf);
11423
11424 mutex_unlock(&video_module_mutex);
11425
11426 return strnlen(buf, count);
11427}
11428
11429static ssize_t videopip_disable_show(
11430 struct class *cla, struct class_attribute *attr, char *buf)
11431{
11432 return sprintf(buf, "%d\n", disable_videopip);
11433}
11434
11435static ssize_t videopip_disable_store(
11436 struct class *cla,
11437 struct class_attribute *attr,
11438 const char *buf, size_t count)
11439{
11440 int r;
11441 int val;
11442
11443 if (debug_flag & DEBUG_FLAG_BLACKOUT)
11444 pr_info("%s(%s)\n", __func__, buf);
11445
11446 r = kstrtoint(buf, 0, &val);
11447 if (r < 0)
11448 return -EINVAL;
11449
11450 if (_videopip_set_disable(val) < 0)
11451 return -EINVAL;
11452
11453 return count;
11454}
11455
11456static ssize_t videopip_screen_mode_show(
11457 struct class *cla,
11458 struct class_attribute *attr,
11459 char *buf)
11460{
11461 struct disp_info_s *layer = &glayer_info[1];
11462 static const char * const wide_str[] = {
11463 "normal", "full stretch", "4-3", "16-9", "non-linear",
11464 "normal-noscaleup",
11465 "4-3 ignore", "4-3 letter box", "4-3 pan scan", "4-3 combined",
11466 "16-9 ignore", "16-9 letter box", "16-9 pan scan",
11467 "16-9 combined", "Custom AR", "AFD"
11468 };
11469
11470 if (layer->wide_mode < ARRAY_SIZE(wide_str)) {
11471 return sprintf(buf, "%d:%s\n",
11472 layer->wide_mode,
11473 wide_str[layer->wide_mode]);
11474 } else
11475 return 0;
11476}
11477
11478static ssize_t videopip_screen_mode_store(
11479 struct class *cla,
11480 struct class_attribute *attr,
11481 const char *buf, size_t count)
11482{
11483 unsigned long mode;
11484 int ret = 0;
11485 struct disp_info_s *layer = &glayer_info[1];
11486
11487 ret = kstrtoul(buf, 0, (unsigned long *)&mode);
11488 if (ret < 0)
11489 return -EINVAL;
11490
11491 if ((mode < VIDEO_WIDEOPTION_MAX)
11492 && (mode != layer->wide_mode)) {
11493 layer->wide_mode = mode;
11494 pip_property_changed = 1;
11495 }
11496 return count;
11497}
11498
11499static ssize_t videopip_loop_show(
11500 struct class *cla, struct class_attribute *attr, char *buf)
11501{
11502 return sprintf(buf, "%d\n", pip_loop);
11503}
11504
11505static ssize_t videopip_loop_store(
11506 struct class *cla,
11507 struct class_attribute *attr,
11508 const char *buf, size_t count)
11509{
11510 int r;
11511 int val;
11512
11513 r = kstrtoint(buf, 0, &val);
11514 if (r < 0)
11515 return -EINVAL;
11516
11517 pip_loop = val;
11518 return count;
11519}
11520
11521static ssize_t videopip_global_output_show(
11522 struct class *cla,
11523 struct class_attribute *attr,
11524 char *buf)
11525{
11526 return sprintf(buf, "%d\n", pip_global_output);
11527}
11528
11529static ssize_t videopip_global_output_store(
11530 struct class *cla,
11531 struct class_attribute *attr,
11532 const char *buf, size_t count)
11533{
11534 int r;
11535
11536 r = kstrtoint(buf, 0, &pip_global_output);
11537 if (r < 0)
11538 return -EINVAL;
11539
11540 pr_info("%s(%d)\n", __func__, pip_global_output);
11541
11542 return count;
11543}
11544
11545static ssize_t videopip_zorder_show(
11546 struct class *cla,
11547 struct class_attribute *attr,
11548 char *buf)
11549{
11550 struct disp_info_s *layer = &glayer_info[1];
11551
11552 return sprintf(buf, "%d\n", layer->zorder);
11553}
11554
11555static ssize_t videopip_zorder_store(
11556 struct class *cla,
11557 struct class_attribute *attr,
11558 const char *buf, size_t count)
11559{
11560 int zorder;
11561 int ret = 0;
11562 struct disp_info_s *layer = &glayer_info[1];
11563
11564 ret = kstrtoint(buf, 0, &zorder);
11565 if (ret < 0)
11566 return -EINVAL;
11567
11568 if (zorder != layer->zorder) {
11569 layer->zorder = zorder;
11570 pip_property_changed = 1;
11571 }
11572 return count;
11573}
11574
11575static ssize_t videopip_state_show(
11576 struct class *cla,
11577 struct class_attribute *attr,
11578 char *buf)
11579{
11580 ssize_t len = 0;
11581 struct vppfilter_mode_s *vpp_filter = NULL;
11582
11583 if (!curpip_frame_par)
11584 return len;
11585 vpp_filter = &curpip_frame_par->vpp_filter;
11586 len += sprintf(buf + len,
11587 "zoom2_start_x_lines:%u.zoom2_end_x_lines:%u.\n",
11588 zoom2_start_x_lines, zoom2_end_x_lines);
11589 len += sprintf(buf + len,
11590 "zoom2_start_y_lines:%u.zoom2_end_y_lines:%u.\n",
11591 zoom2_start_y_lines, zoom2_end_y_lines);
11592 len += sprintf(buf + len, "frame parameters: pic_in_height %u.\n",
11593 curpip_frame_par->VPP_pic_in_height_);
11594 len += sprintf(buf + len,
11595 "frame parameters: VPP_line_in_length_ %u.\n",
11596 curpip_frame_par->VPP_line_in_length_);
11597 len += sprintf(buf + len, "vscale_skip_count %u.\n",
11598 curpip_frame_par->vscale_skip_count);
11599 len += sprintf(buf + len, "hscale_skip_count %u.\n",
11600 curpip_frame_par->hscale_skip_count);
11601 len += sprintf(buf + len, "supscl_path %u.\n",
11602 curpip_frame_par->supscl_path);
11603 len += sprintf(buf + len, "supsc0_enable %u.\n",
11604 curpip_frame_par->supsc0_enable);
11605 len += sprintf(buf + len, "supsc1_enable %u.\n",
11606 curpip_frame_par->supsc1_enable);
11607 len += sprintf(buf + len, "supsc0_hori_ratio %u.\n",
11608 curpip_frame_par->supsc0_hori_ratio);
11609 len += sprintf(buf + len, "supsc1_hori_ratio %u.\n",
11610 curpip_frame_par->supsc1_hori_ratio);
11611 len += sprintf(buf + len, "supsc0_vert_ratio %u.\n",
11612 curpip_frame_par->supsc0_vert_ratio);
11613 len += sprintf(buf + len, "supsc1_vert_ratio %u.\n",
11614 curpip_frame_par->supsc1_vert_ratio);
11615 len += sprintf(buf + len, "spsc0_h_in %u.\n",
11616 curpip_frame_par->spsc0_h_in);
11617 len += sprintf(buf + len, "spsc1_h_in %u.\n",
11618 curpip_frame_par->spsc1_h_in);
11619 len += sprintf(buf + len, "spsc0_w_in %u.\n",
11620 curpip_frame_par->spsc0_w_in);
11621 len += sprintf(buf + len, "spsc1_w_in %u.\n",
11622 curpip_frame_par->spsc1_w_in);
11623 len += sprintf(buf + len, "video_input_w %u.\n",
11624 curpip_frame_par->video_input_w);
11625 len += sprintf(buf + len, "video_input_h %u.\n",
11626 curpip_frame_par->video_input_h);
11627 len += sprintf(buf + len, "clk_in_pps %u.\n",
11628 curpip_frame_par->clk_in_pps);
11629 len +=
11630 sprintf(buf + len, "hscale phase step 0x%x.\n",
11631 vpp_filter->vpp_hsc_start_phase_step);
11632 len +=
11633 sprintf(buf + len, "vscale phase step 0x%x.\n",
11634 vpp_filter->vpp_vsc_start_phase_step);
11635 len +=
11636 sprintf(buf + len, "pps pre hsc enable %d.\n",
11637 vpp_filter->vpp_pre_hsc_en);
11638 len +=
11639 sprintf(buf + len, "pps pre vsc enable %d.\n",
11640 vpp_filter->vpp_pre_vsc_en);
11641 len +=
11642 sprintf(buf + len, "hscale filter coef %d.\n",
11643 vpp_filter->vpp_horz_filter);
11644 len +=
11645 sprintf(buf + len, "vscale filter coef %d.\n",
11646 vpp_filter->vpp_vert_filter);
11647 len +=
11648 sprintf(buf + len, "vpp_vert_chroma_filter_en %d.\n",
11649 vpp_filter->vpp_vert_chroma_filter_en);
11650 len +=
11651 sprintf(buf + len, "post_blend_vd_h_start 0x%x.\n",
11652 curpip_frame_par->VPP_post_blend_vd_h_start_);
11653 len +=
11654 sprintf(buf + len, "post_blend_vd_h_end 0x%x.\n",
11655 curpip_frame_par->VPP_post_blend_vd_h_end_);
11656 len +=
11657 sprintf(buf + len, "post_blend_vd_v_start 0x%x.\n",
11658 curpip_frame_par->VPP_post_blend_vd_v_start_);
11659 len +=
11660 sprintf(buf + len, "post_blend_vd_v_end 0x%x.\n",
11661 curpip_frame_par->VPP_post_blend_vd_v_end_);
11662 len +=
11663 sprintf(buf + len, "VPP_hd_start_lines_ 0x%x.\n",
11664 curpip_frame_par->VPP_hd_start_lines_);
11665 len +=
11666 sprintf(buf + len, "VPP_hd_end_lines_ 0x%x.\n",
11667 curpip_frame_par->VPP_hd_end_lines_);
11668 len +=
11669 sprintf(buf + len, "VPP_vd_start_lines_ 0x%x.\n",
11670 curpip_frame_par->VPP_vd_start_lines_);
11671 len +=
11672 sprintf(buf + len, "VPP_vd_end_lines_ 0x%x.\n",
11673 curpip_frame_par->VPP_vd_end_lines_);
11674 len +=
11675 sprintf(buf + len, "VPP_hsc_startp 0x%x.\n",
11676 curpip_frame_par->VPP_hsc_startp);
11677 len +=
11678 sprintf(buf + len, "VPP_hsc_endp 0x%x.\n",
11679 curpip_frame_par->VPP_hsc_endp);
11680 len +=
11681 sprintf(buf + len, "VPP_vsc_startp 0x%x.\n",
11682 curpip_frame_par->VPP_vsc_startp);
11683 len +=
11684 sprintf(buf + len, "VPP_vsc_endp 0x%x.\n",
11685 curpip_frame_par->VPP_vsc_endp);
11686 return len;
11687}
11688
11689#endif
11690
11691static struct class_attribute amvideo_class_attrs[] = {
11692 __ATTR(axis,
11693 0664,
11694 video_axis_show,
11695 video_axis_store),
11696 __ATTR(crop,
11697 0644,
11698 video_crop_show,
11699 video_crop_store),
11700 __ATTR(sr,
11701 0644,
11702 video_sr_show,
11703 video_sr_store),
11704 __ATTR(global_offset,
11705 0644,
11706 video_global_offset_show,
11707 video_global_offset_store),
11708 __ATTR(screen_mode,
11709 0664,
11710 video_screen_mode_show,
11711 video_screen_mode_store),
11712 __ATTR(blackout_policy,
11713 0664,
11714 video_blackout_policy_show,
11715 video_blackout_policy_store),
11716 __ATTR(video_seek_flag,
11717 0664,
11718 video_seek_flag_show,
11719 video_seek_flag_store),
11720 __ATTR(disable_video,
11721 0664,
11722 video_disable_show,
11723 video_disable_store),
11724 __ATTR(video_global_output,
11725 0664,
11726 video_global_output_show,
11727 video_global_output_store),
11728 __ATTR(hold_video,
11729 0664,
11730 video_hold_show,
11731 video_hold_store),
11732 __ATTR(zoom,
11733 0664,
11734 video_zoom_show,
11735 video_zoom_store),
11736 __ATTR(brightness,
11737 0644,
11738 video_brightness_show,
11739 video_brightness_store),
11740 __ATTR(contrast,
11741 0644,
11742 video_contrast_show,
11743 video_contrast_store),
11744 __ATTR(vpp_brightness,
11745 0644,
11746 vpp_brightness_show,
11747 vpp_brightness_store),
11748 __ATTR(vpp_contrast,
11749 0644,
11750 vpp_contrast_show,
11751 vpp_contrast_store),
11752 __ATTR(saturation,
11753 0644,
11754 video_saturation_show,
11755 video_saturation_store),
11756 __ATTR(vpp_saturation_hue,
11757 0644,
11758 vpp_saturation_hue_show,
11759 vpp_saturation_hue_store),
11760 __ATTR(test_screen,
11761 0644,
11762 video_test_screen_show,
11763 video_test_screen_store),
11764 __ATTR(rgb_screen,
11765 0644,
11766 video_rgb_screen_show,
11767 video_rgb_screen_store),
11768 __ATTR(file_name,
11769 0644,
11770 video_filename_show,
11771 video_filename_store),
11772 __ATTR(debugflags,
11773 0644,
11774 video_debugflags_show,
11775 video_debugflags_store),
11776 __ATTR(trickmode_duration,
11777 0644,
11778 trickmode_duration_show,
11779 trickmode_duration_store),
11780 __ATTR(nonlinear_factor,
11781 0644,
11782 video_nonlinear_factor_show,
11783 video_nonlinear_factor_store),
11784 __ATTR(freerun_mode,
11785 0644,
11786 video_freerun_mode_show,
11787 video_freerun_mode_store),
11788 __ATTR(video_speed_check_h_w,
11789 0644,
11790 video_speed_check_show,
11791 video_speed_check_store),
11792 __ATTR(threedim_mode,
11793 0644,
11794 threedim_mode_show,
11795 threedim_mode_store),
11796 __ATTR(vsync_pts_inc_upint,
11797 0644,
11798 video_vsync_pts_inc_upint_show,
11799 video_vsync_pts_inc_upint_store),
11800 __ATTR(vsync_slow_factor,
11801 0644,
11802 video_vsync_slow_factor_show,
11803 video_vsync_slow_factor_store),
11804 __ATTR(angle,
11805 0644,
11806 video_angle_show,
11807 video_angle_store),
11808 __ATTR(stereo_scaler,
11809 0644, NULL,
11810 video_3d_scale_store),
11811 __ATTR(show_first_frame_nosync,
11812 0644,
11813 show_first_frame_nosync_show,
11814 show_first_frame_nosync_store),
11815 __ATTR(show_first_picture,
11816 0664, NULL,
11817 show_first_picture_store),
11818 __ATTR(slowsync_repeat_enable,
11819 0644,
11820 slowsync_repeat_enable_show,
11821 slowsync_repeat_enable_store),
11822 __ATTR(free_keep_buffer,
11823 0664, NULL,
11824 video_free_keep_buffer_store),
11825 __ATTR(free_cma_buffer,
11826 0664, NULL,
11827 free_cma_buffer_store),
11828#ifdef CONFIG_AM_VOUT
11829 __ATTR_RO(device_resolution),
11830#endif
11831#ifdef PTS_TRACE_DEBUG
11832 __ATTR_RO(pts_trace),
11833#endif
11834 __ATTR(video_inuse,
11835 0664,
11836 video_inuse_show,
11837 video_inuse_store),
11838 __ATTR(video_zorder,
11839 0664,
11840 video_zorder_show,
11841 video_zorder_store),
11842 __ATTR_RO(frame_addr),
11843 __ATTR_RO(frame_canvas_width),
11844 __ATTR_RO(frame_canvas_height),
11845 __ATTR_RO(frame_width),
11846 __ATTR_RO(frame_height),
11847 __ATTR_RO(frame_format),
11848 __ATTR_RO(frame_aspect_ratio),
11849 __ATTR_RO(frame_rate),
11850 __ATTR_RO(vframe_states),
11851 __ATTR_RO(video_state),
11852 __ATTR_RO(fps_info),
11853 __ATTR_RO(video_layer1_state),
11854 __ATTR_RO(pic_mode_info),
11855#ifdef VIDEO_PIP
11856 __ATTR(axis_pip,
11857 0664,
11858 videopip_axis_show,
11859 videopip_axis_store),
11860 __ATTR(crop_pip,
11861 0664,
11862 videopip_crop_show,
11863 videopip_crop_store),
11864 __ATTR(disable_videopip,
11865 0664,
11866 videopip_disable_show,
11867 videopip_disable_store),
11868 __ATTR(screen_mode_pip,
11869 0664,
11870 videopip_screen_mode_show,
11871 videopip_screen_mode_store),
11872 __ATTR(videopip_loop,
11873 0664,
11874 videopip_loop_show,
11875 videopip_loop_store),
11876 __ATTR(pip_global_output,
11877 0664,
11878 videopip_global_output_show,
11879 videopip_global_output_store),
11880 __ATTR(videopip_zorder,
11881 0664,
11882 videopip_zorder_show,
11883 videopip_zorder_store),
11884 __ATTR_RO(videopip_state),
11885#endif
11886 __ATTR_NULL
11887};
11888
11889static struct class_attribute amvideo_poll_class_attrs[] = {
11890 __ATTR_RO(frame_width),
11891 __ATTR_RO(frame_height),
11892 __ATTR_RO(vframe_states),
11893 __ATTR_RO(video_state),
11894 __ATTR_NULL
11895};
11896
11897#ifdef CONFIG_PM
11898static int amvideo_class_suspend(struct device *dev, pm_message_t state)
11899{
11900#if 0
11901
11902 pm_state.event = state.event;
11903
11904 if (state.event == PM_EVENT_SUSPEND) {
11905 pm_state.vpp_misc =
11906 READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off);
11907
11908 DisableVideoLayer_NoDelay();
11909
11910 msleep(50);
11911 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
11912 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8)
11913 && !is_meson_mtvd_cpu()) {
11914 vpu_delay_work_flag = 0;
11915 }
11916 /* #endif */
11917
11918 }
11919#endif
11920 return 0;
11921}
11922
11923static int amvideo_class_resume(struct device *dev)
11924{
11925#if 0
11926#define VPP_MISC_VIDEO_BITS_MASK \
11927 ((VPP_VD2_ALPHA_MASK << VPP_VD2_ALPHA_BIT) | \
11928 VPP_VD2_PREBLEND | VPP_VD1_PREBLEND |\
11929 VPP_VD2_POSTBLEND | VPP_VD1_POSTBLEND | VPP_POSTBLEND_EN)\
11930
11931 if (pm_state.event == PM_EVENT_SUSPEND) {
11932 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
11933 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8)
11934 && !is_meson_mtvd_cpu()) {
11935 switch_vpu_mem_pd_vmod(VPU_VIU_VD1,
11936 pm_state.mem_pd_vd1);
11937 switch_vpu_mem_pd_vmod(VPU_VIU_VD2,
11938 pm_state.mem_pd_vd2);
11939 switch_vpu_mem_pd_vmod(VPU_DI_POST,
11940 pm_state.mem_pd_di_post);
11941 }
11942 /* #endif */
11943 WRITE_VCBUS_REG(VPP_MISC + cur_dev->vpp_off,
11944 (READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off) &
11945 (~VPP_MISC_VIDEO_BITS_MASK)) |
11946 (pm_state.vpp_misc & VPP_MISC_VIDEO_BITS_MASK));
11947 WRITE_VCBUS_REG(VPP_MISC +
11948 cur_dev->vpp_off, pm_state.vpp_misc);
11949
11950 pm_state.event = -1;
11951 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
11952 pr_info("%s write(VPP_MISC,%x)\n", __func__,
11953 pm_state.vpp_misc);
11954 }
11955 }
11956#ifdef CONFIG_SCREEN_ON_EARLY
11957 if (power_key_pressed) {
11958 vout_pll_resume_early();
11959 osd_resume_early();
11960 resume_vout_early();
11961 power_key_pressed = 0;
11962 }
11963#endif
11964#endif
11965 return 0;
11966}
11967#endif
11968
11969static struct class amvideo_class = {
11970 .name = AMVIDEO_CLASS_NAME,
11971 .class_attrs = amvideo_class_attrs,
11972#ifdef CONFIG_PM
11973 .suspend = amvideo_class_suspend,
11974 .resume = amvideo_class_resume,
11975#endif
11976};
11977
11978static struct class amvideo_poll_class = {
11979 .name = AMVIDEO_POLL_CLASS_NAME,
11980 .class_attrs = amvideo_poll_class_attrs,
11981};
11982
11983#ifdef TV_REVERSE
11984static int __init vpp_axis_reverse(char *str)
11985{
11986 unsigned char *ptr = str;
11987
11988 pr_info("%s: bootargs is %s\n", __func__, str);
11989 if (strstr(ptr, "1"))
11990 reverse = true;
11991 else
11992 reverse = false;
11993
11994 return 0;
11995}
11996
11997__setup("video_reverse=", vpp_axis_reverse);
11998#endif
11999
12000struct vframe_s *get_cur_dispbuf(void)
12001{
12002 return cur_dispbuf;
12003}
12004
12005#ifdef CONFIG_AM_VOUT
12006int vout_notify_callback(struct notifier_block *block, unsigned long cmd,
12007 void *para)
12008{
12009 const struct vinfo_s *info;
12010 ulong flags;
12011
12012#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12013 if (cur_dev != &video_dev[0])
12014 return 0;
12015#endif
12016 switch (cmd) {
12017 case VOUT_EVENT_MODE_CHANGE:
12018 info = get_current_vinfo();
12019 spin_lock_irqsave(&lock, flags);
12020 vinfo = info;
12021 /* pre-calculate vsync_pts_inc in 90k unit */
12022 vsync_pts_inc = 90000 * vinfo->sync_duration_den /
12023 vinfo->sync_duration_num;
12024 vsync_pts_inc_scale = vinfo->sync_duration_den;
12025 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
12026 spin_unlock_irqrestore(&lock, flags);
12027 new_vmode = vinfo->mode;
12028 break;
12029 case VOUT_EVENT_OSD_PREBLEND_ENABLE:
12030 break;
12031 case VOUT_EVENT_OSD_DISP_AXIS:
12032 break;
12033 }
12034 return 0;
12035}
12036
12037#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12038int vout2_notify_callback(struct notifier_block *block, unsigned long cmd,
12039 void *para)
12040{
12041 const struct vinfo_s *info;
12042 ulong flags;
12043
12044 if (cur_dev != &video_dev[1])
12045 return 0;
12046
12047 switch (cmd) {
12048 case VOUT_EVENT_MODE_CHANGE:
12049 info = get_current_vinfo2();
12050 spin_lock_irqsave(&lock, flags);
12051 vinfo = info;
12052 /* pre-calculate vsync_pts_inc in 90k unit */
12053 vsync_pts_inc = 90000 * vinfo->sync_duration_den /
12054 vinfo->sync_duration_num;
12055 vsync_pts_inc_scale = vinfo->sync_duration_den;
12056 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
12057 spin_unlock_irqrestore(&lock, flags);
12058 break;
12059 case VOUT_EVENT_OSD_PREBLEND_ENABLE:
12060 break;
12061 case VOUT_EVENT_OSD_DISP_AXIS:
12062 break;
12063 }
12064 return 0;
12065}
12066#endif
12067
12068
12069static struct notifier_block vout_notifier = {
12070 .notifier_call = vout_notify_callback,
12071};
12072
12073#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12074static struct notifier_block vout2_notifier = {
12075 .notifier_call = vout2_notify_callback,
12076};
12077#endif
12078
12079
12080static void vout_hook(void)
12081{
12082 vout_register_client(&vout_notifier);
12083
12084#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12085 vout2_register_client(&vout2_notifier);
12086#endif
12087
12088 vinfo = get_current_vinfo();
12089
12090 if (!vinfo) {
12091#if DEBUG_TMP
12092 set_current_vmode(VMODE_720P);
12093#endif
12094 vinfo = get_current_vinfo();
12095 }
12096
12097 if (vinfo) {
12098 vsync_pts_inc = 90000 * vinfo->sync_duration_den /
12099 vinfo->sync_duration_num;
12100 vsync_pts_inc_scale = vinfo->sync_duration_den;
12101 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
12102 old_vmode = new_vmode = vinfo->mode;
12103 }
12104#ifdef CONFIG_AM_VIDEO_LOG
12105 if (vinfo) {
12106 amlog_mask(LOG_MASK_VINFO, "vinfo = %p\n", vinfo);
12107 amlog_mask(LOG_MASK_VINFO, "display platform %s:\n",
12108 vinfo->name);
12109 amlog_mask(LOG_MASK_VINFO, "\tresolution %d x %d\n",
12110 vinfo->width, vinfo->height);
12111 amlog_mask(LOG_MASK_VINFO, "\taspect ratio %d : %d\n",
12112 vinfo->aspect_ratio_num, vinfo->aspect_ratio_den);
12113 amlog_mask(LOG_MASK_VINFO, "\tsync duration %d : %d\n",
12114 vinfo->sync_duration_num, vinfo->sync_duration_den);
12115 }
12116#endif
12117}
12118#endif
12119
12120static int amvideo_notify_callback(
12121 struct notifier_block *block,
12122 unsigned long cmd,
12123 void *para)
12124{
12125 u32 *p, val;
12126
12127 switch (cmd) {
12128 case AMVIDEO_UPDATE_OSD_MODE:
12129 p = (u32 *)para;
12130 if (!update_osd_vpp_misc)
12131 osd_vpp_misc_mask = p[1];
12132 val = osd_vpp_misc
12133 & (~osd_vpp_misc_mask);
12134 val |= (p[0] & osd_vpp_misc_mask);
12135 osd_vpp_misc = val;
12136 if (!update_osd_vpp_misc)
12137 update_osd_vpp_misc = true;
12138 break;
12139 default:
12140 break;
12141 }
12142 return 0;
12143}
12144
12145static struct notifier_block amvideo_notifier = {
12146 .notifier_call = amvideo_notify_callback,
12147};
12148
12149static RAW_NOTIFIER_HEAD(amvideo_notifier_list);
12150int amvideo_register_client(struct notifier_block *nb)
12151{
12152 return raw_notifier_chain_register(&amvideo_notifier_list, nb);
12153}
12154EXPORT_SYMBOL(amvideo_register_client);
12155
12156int amvideo_unregister_client(struct notifier_block *nb)
12157{
12158 return raw_notifier_chain_unregister(&amvideo_notifier_list, nb);
12159}
12160EXPORT_SYMBOL(amvideo_unregister_client);
12161
12162int amvideo_notifier_call_chain(unsigned long val, void *v)
12163{
12164 return raw_notifier_call_chain(&amvideo_notifier_list, val, v);
12165}
12166EXPORT_SYMBOL_GPL(amvideo_notifier_call_chain);
12167
12168#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
12169
12170static void do_vpu_delay_work(struct work_struct *work)
12171{
12172 unsigned long flags;
12173 unsigned int r;
12174
12175#if DEBUG_TMP
12176 if (vpu_delay_work_flag & VPU_VIDEO_LAYER1_CHANGED) {
12177 vpu_delay_work_flag &= ~VPU_VIDEO_LAYER1_CHANGED;
12178
12179 switch_set_state(&video1_state_sdev, !!video_enabled);
12180 }
12181#endif
12182 spin_lock_irqsave(&delay_work_lock, flags);
12183
12184 if (vpu_delay_work_flag & VPU_DELAYWORK_VPU_CLK) {
12185 vpu_delay_work_flag &= ~VPU_DELAYWORK_VPU_CLK;
12186
12187 spin_unlock_irqrestore(&delay_work_lock, flags);
12188
12189 if (vpu_clk_level > 0)
12190 request_vpu_clk_vmod(360000000, VPU_VIU_VD1);
12191 else
12192 release_vpu_clk_vmod(VPU_VIU_VD1);
12193
12194 spin_lock_irqsave(&delay_work_lock, flags);
12195 }
12196
12197 r = READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off);
12198
12199 if (vpu_mem_power_off_count > 0) {
12200 vpu_mem_power_off_count--;
12201
12202 if (vpu_mem_power_off_count == 0) {
12203 if ((vpu_delay_work_flag &
12204 VPU_DELAYWORK_MEM_POWER_OFF_VD1)
12205 && ((r & VPP_VD1_PREBLEND) == 0)) {
12206 vpu_delay_work_flag &=
12207 ~VPU_DELAYWORK_MEM_POWER_OFF_VD1;
12208
12209 switch_vpu_mem_pd_vmod(
12210 VPU_VIU_VD1,
12211 VPU_MEM_POWER_DOWN);
12212 switch_vpu_mem_pd_vmod(
12213 VPU_AFBC_DEC,
12214 VPU_MEM_POWER_DOWN);
12215 switch_vpu_mem_pd_vmod(
12216 VPU_DI_POST,
12217 VPU_MEM_POWER_DOWN);
12218 if (!legacy_vpp)
12219 switch_vpu_mem_pd_vmod(
12220 VPU_VD1_SCALE,
12221 VPU_MEM_POWER_DOWN);
12222 }
12223
12224 if ((vpu_delay_work_flag &
12225 VPU_DELAYWORK_MEM_POWER_OFF_VD2)
12226 && ((r & VPP_VD2_PREBLEND) == 0)) {
12227 vpu_delay_work_flag &=
12228 ~VPU_DELAYWORK_MEM_POWER_OFF_VD2;
12229
12230 switch_vpu_mem_pd_vmod(
12231 VPU_VIU_VD2,
12232 VPU_MEM_POWER_DOWN);
12233 switch_vpu_mem_pd_vmod(
12234 VPU_AFBC_DEC1,
12235 VPU_MEM_POWER_DOWN);
12236 if (!legacy_vpp)
12237 switch_vpu_mem_pd_vmod(
12238 VPU_VD2_SCALE,
12239 VPU_MEM_POWER_DOWN);
12240 }
12241
12242 if ((vpu_delay_work_flag &
12243 VPU_DELAYWORK_MEM_POWER_OFF_PROT)
12244 && ((r & VPP_VD1_PREBLEND) == 0)) {
12245 vpu_delay_work_flag &=
12246 ~VPU_DELAYWORK_MEM_POWER_OFF_PROT;
12247 }
12248 }
12249 }
12250
12251 spin_unlock_irqrestore(&delay_work_lock, flags);
12252}
12253#endif
12254
12255/*********************************************************/
12256struct device *get_video_device(void)
12257{
12258 return amvideo_dev;
12259}
12260
12261static int __init video_early_init(void)
12262{
12263 /* todo: move this to clock tree, enable VPU clock */
12264 /* WRITE_CBUS_REG(HHI_VPU_CLK_CNTL,*/
12265 /*(1<<9) | (1<<8) | (3)); // fclk_div3/4 = ~200M */
12266 /* WRITE_CBUS_REG(HHI_VPU_CLK_CNTL,*/
12267 /*(3<<9) | (1<<8) | (0)); // fclk_div7/1 = 364M*/
12268 /*moved to vpu.c, default config by dts */
12269
12270 u32 cur_hold_line;
12271
12272 if (!legacy_vpp) {
12273 WRITE_VCBUS_REG_BITS(VPP_OFIFO_SIZE, 0x1000,
12274 VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID);
12275 WRITE_VCBUS_REG_BITS(
12276 VPP_MATRIX_CTRL, 0, 10, 5);
12277 } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXTVBB))
12278 WRITE_VCBUS_REG_BITS(VPP_OFIFO_SIZE, 0xfff,
12279 VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID);
12280
12281 WRITE_VCBUS_REG(VPP_PREBLEND_VD1_H_START_END, 4096);
12282 WRITE_VCBUS_REG(VPP_BLEND_VD2_H_START_END, 4096);
12283
12284 if (is_meson_txl_cpu() || is_meson_txlx_cpu()) {
12285 /* fifo max size on txl :128*3=384[0x180] */
12286 WRITE_VCBUS_REG(
12287 VD1_IF0_LUMA_FIFO_SIZE + cur_dev->viu_off, 0x180);
12288 WRITE_VCBUS_REG(
12289 VD2_IF0_LUMA_FIFO_SIZE + cur_dev->viu_off, 0x180);
12290 }
12291
12292#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12293 WRITE_VCBUS_REG_BITS(VPP2_OFIFO_SIZE, 0x800,
12294 VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID);
12295 /*
12296 *WRITE_VCBUS_REG_BITS(VPU_OSD3_MMC_CTRL, 1, 12, 2);
12297 *select vdisp_mmc_arb for VIU2_OSD1 request
12298 */
12299 WRITE_VCBUS_REG_BITS(VPU_OSD3_MMC_CTRL, 2, 12, 2);
12300 /* select vdin_mmc_arb for VIU2_OSD1 request */
12301#endif
12302 /* default 10bit setting for gxm */
12303 if (is_meson_gxm_cpu()) {
12304 WRITE_VCBUS_REG_BITS(VIU_MISC_CTRL1, 0xff, 16, 8);
12305 WRITE_VCBUS_REG(VPP_DOLBY_CTRL, 0x22000);
12306 /*
12307 *default setting is black for dummy data1& dumy data0,
12308 *for dummy data1 the y/cb/cr data width is 10bit on gxm,
12309 *for dummy data the y/cb/cr data width is 8bit but
12310 *vpp_dummy_data will be left shift 2bit auto on gxm!!!
12311 */
12312 WRITE_VCBUS_REG(VPP_DUMMY_DATA1, 0x1020080);
12313 WRITE_VCBUS_REG(VPP_DUMMY_DATA, 0x42020);
12314 } else if (is_meson_txlx_cpu() ||
12315 cpu_after_eq(MESON_CPU_MAJOR_ID_G12A)) {
12316 /*black 10bit*/
12317 WRITE_VCBUS_REG(VPP_DUMMY_DATA, 0x4080200);
12318 }
12319 /* temp: enable VPU arb mem */
12320 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB)
12321 switch_vpu_mem_pd_vmod(VPU_VPU_ARB, VPU_MEM_POWER_ON);
12322
12323 /*disable sr default when power up*/
12324 WRITE_VCBUS_REG(VPP_SRSHARP0_CTRL, 0);
12325 WRITE_VCBUS_REG(VPP_SRSHARP1_CTRL, 0);
12326
12327 cur_hold_line = READ_VCBUS_REG(VPP_HOLD_LINES + cur_dev->vpp_off);
12328 cur_hold_line = cur_hold_line & 0xff;
12329
12330 if (cur_hold_line > 0x1f)
12331 vpp_hold_line = 0x1f;
12332 else
12333 vpp_hold_line = cur_hold_line;
12334
12335 /* Temp force set dmc */
12336 if (!legacy_vpp) {
12337 WRITE_DMCREG(
12338 DMC_AM0_CHAN_CTRL,
12339 0x8ff403cf);
12340 /* for vd1 & vd2 dummy alpha*/
12341 WRITE_VCBUS_REG(
12342 VPP_POST_BLEND_DUMMY_ALPHA,
12343 0x7fffffff);
12344 WRITE_VCBUS_REG_BITS(
12345 VPP_MISC1, 0x100, 0, 9);
12346 }
12347 if (is_meson_tl1_cpu()) {
12348 /* force bypass dolby for TL1, no dolby function */
12349 WRITE_VCBUS_REG_BITS(
12350 DOLBY_PATH_CTRL, 0xf, 0, 6);
12351 /* disable latch for sr core0/1 scaler */
12352 WRITE_VCBUS_REG_BITS(
12353 SRSHARP0_SHARP_SYNC_CTRL, 1, 0, 1);
12354 WRITE_VCBUS_REG_BITS(
12355 SRSHARP1_SHARP_SYNC_CTRL, 1, 8, 1);
12356 }
12357 if (is_meson_g12b_cpu())
12358 WRITE_VCBUS_REG_BITS(
12359 SRSHARP0_SHARP_SYNC_CTRL, 1, 0, 1);
12360 return 0;
12361}
12362
12363static struct mconfig video_configs[] = {
12364 MC_PI32("pause_one_3d_fl_frame", &pause_one_3d_fl_frame),
12365 MC_PI32("debug_flag", &debug_flag),
12366 MC_PU32("force_3d_scaler", &force_3d_scaler),
12367 MC_PU32("video_3d_format", &video_3d_format),
12368 MC_PI32("vsync_enter_line_max", &vsync_enter_line_max),
12369 MC_PI32("vsync_exit_line_max", &vsync_exit_line_max),
12370#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
12371 MC_PI32("vsync_rdma_line_max", &vsync_rdma_line_max),
12372#endif
12373 MC_PU32("underflow", &underflow),
12374 MC_PU32("next_peek_underflow", &next_peek_underflow),
12375 MC_PU32("smooth_sync_enable", &smooth_sync_enable),
12376 MC_PU32("hdmi_in_onvideo", &hdmi_in_onvideo),
12377#ifdef CONFIG_AM_VIDEO2
12378 MC_PI32("video_play_clone_rate", &video_play_clone_rate),
12379 MC_PI32("android_clone_rate", &android_clone_rate),
12380 MC_PI32("video_play_clone_rate", &video_play_clone_rate),
12381 MC_PI32("android_clone_rate", &android_clone_rate),
12382 MC_PI32("noneseamless_play_clone_rate", &noneseamless_play_clone_rate),
12383#endif
12384 MC_PU32("smooth_sync_enable", &smooth_sync_enable),
12385 MC_PU32("hdmi_in_onvideo", &hdmi_in_onvideo),
12386 MC_PI32("cur_dev_idx", &cur_dev_idx),
12387 MC_PU32("new_frame_count", &new_frame_count),
12388 MC_PU32("omx_pts", &omx_pts),
12389 MC_PU32("omx_pts_set_index", &omx_pts_set_index),
12390 MC_PBOOL("omx_run", &omx_run),
12391 MC_PU32("omx_version", &omx_version),
12392 MC_PU32("omx_info", &omx_info),
12393 MC_PI32("omx_need_drop_frame_num", &omx_need_drop_frame_num),
12394 MC_PBOOL("omx_drop_done", &omx_drop_done),
12395 MC_PI32("omx_pts_interval_upper", &omx_pts_interval_upper),
12396 MC_PI32("omx_pts_interval_lower", &omx_pts_interval_lower),
12397 MC_PBOOL("bypass_pps", &bypass_pps),
12398 MC_PBOOL("platform_type", &platform_type),
12399 MC_PU32("process_3d_type", &process_3d_type),
12400 MC_PU32("omx_pts", &omx_pts),
12401 MC_PU32("framepacking_support", &framepacking_support),
12402 MC_PU32("framepacking_width", &framepacking_width),
12403 MC_PU32("framepacking_height", &framepacking_height),
12404 MC_PU32("framepacking_blank", &framepacking_blank),
12405 MC_PU32("video_seek_flag", &video_seek_flag),
12406 MC_PU32("slowsync_repeat_enable", &slowsync_repeat_enable),
12407 MC_PU32("toggle_count", &toggle_count),
12408 MC_PBOOL("show_first_frame_nosync", &show_first_frame_nosync),
12409#ifdef TV_REVERSE
12410 MC_PBOOL("reverse", &reverse),
12411#endif
12412};
12413
12414#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
12415static void video_early_suspend(struct early_suspend *h)
12416{
12417 DisableVideoLayer();
12418 DisableVideoLayer2();
12419 pr_info("video_early_suspend ok\n");
12420}
12421
12422static void video_late_resume(struct early_suspend *h)
12423{
12424 pr_info("video_late_resume ok\n");
12425};
12426
12427static struct early_suspend video_early_suspend_handler = {
12428 .suspend = video_early_suspend,
12429 .resume = video_late_resume,
12430};
12431#endif
12432
12433static int amvideom_probe(struct platform_device *pdev)
12434{
12435 int ret = 0;
12436
12437 video_early_init();
12438
12439 DisableVideoLayer();
12440 DisableVideoLayer2();
12441
12442 /* get interrupt resource */
12443 video_vsync = platform_get_irq_byname(pdev, "vsync");
12444 if (video_vsync == -ENXIO) {
12445 pr_info("cannot get amvideom irq resource\n");
12446
12447 return video_vsync;
12448 }
12449
12450 pr_info("amvideom vsync irq: %d\n", video_vsync);
12451
12452#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
12453 register_early_suspend(&video_early_suspend_handler);
12454#endif
12455 return ret;
12456}
12457
12458static int amvideom_remove(struct platform_device *pdev)
12459{
12460#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
12461 unregister_early_suspend(&video_early_suspend_handler);
12462#endif
12463 return 0;
12464}
12465
12466static const struct of_device_id amlogic_amvideom_dt_match[] = {
12467 {
12468 .compatible = "amlogic, amvideom",
12469 },
12470 {},
12471};
12472
12473static struct platform_driver amvideom_driver = {
12474 .probe = amvideom_probe,
12475 .remove = amvideom_remove,
12476 .driver = {
12477 .name = "amvideom",
12478 .of_match_table = amlogic_amvideom_dt_match,
12479 }
12480};
12481
12482static int __init video_init(void)
12483{
12484 int r = 0, i;
12485 /*
12486 *#ifdef CONFIG_ARCH_MESON1
12487 *ulong clk = clk_get_rate(clk_get_sys("clk_other_pll", NULL));
12488 *#elif !defined(CONFIG_ARCH_MESON3) && !defined(CONFIG_ARCH_MESON6)
12489 *ulong clk = clk_get_rate(clk_get_sys("clk_misc_pll", NULL));
12490 *#endif
12491 */
12492
12493#ifdef CONFIG_ARCH_MESON1
12494 no to here ulong clk =
12495 clk_get_rate(clk_get_sys("clk_other_pll", NULL));
12496#elif defined(CONFIG_ARCH_MESON2)
12497 not to here ulong clk =
12498 clk_get_rate(clk_get_sys("clk_misc_pll", NULL));
12499#endif
12500 /* #if !defined(CONFIG_ARCH_MESON3) && !defined(CONFIG_ARCH_MESON6) */
12501#if 0 /* MESON_CPU_TYPE <= MESON_CPU_TYPE_MESON2 */
12502 /* MALI clock settings */
12503 if ((clk <= 750000000) && (clk >= 600000000)) {
12504 WRITE_VCBUS_REG(HHI_MALI_CLK_CNTL,
12505 (2 << 9) | /* select misc pll as clock source */
12506 (1 << 8) | /* enable clock gating */
12507 (2 << 0)); /* Misc clk / 3 */
12508 } else {
12509 WRITE_VCBUS_REG(HHI_MALI_CLK_CNTL,
12510 (3 << 9) | /* select DDR clock as clock source */
12511 (1 << 8) | /* enable clock gating */
12512 (1 << 0)); /* DDR clk / 2 */
12513 }
12514#endif
12515
12516 if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
12517 || is_meson_tl1_cpu()) {
12518 cur_dev->viu_off = 0x3200 - 0x1a50;
12519 legacy_vpp = false;
12520 }
12521 if (platform_driver_register(&amvideom_driver)) {
12522 pr_info("failed to amvideom driver!\n");
12523 return -ENODEV;
12524 }
12525
12526 /* check super scaler support status */
12527 vpp_super_scaler_support();
12528 /* adaptive config bypass ratio */
12529 vpp_bypass_ratio_config();
12530
12531#ifndef CONFIG_AM_VIDEO2
12532 /*DisableVPP2VideoLayer();*/
12533#endif
12534
12535 cur_dispbuf = NULL;
12536 cur_dispbuf2 = NULL;
12537 amvideo_register_client(&amvideo_notifier);
12538
12539#ifdef FIQ_VSYNC
12540 /* enable fiq bridge */
12541 vsync_fiq_bridge.handle = vsync_bridge_isr;
12542 vsync_fiq_bridge.key = (u32) vsync_bridge_isr;
12543 vsync_fiq_bridge.name = "vsync_bridge_isr";
12544
12545 r = register_fiq_bridge_handle(&vsync_fiq_bridge);
12546
12547 if (r) {
12548 amlog_level(LOG_LEVEL_ERROR,
12549 "video fiq bridge register error.\n");
12550 r = -ENOENT;
12551 goto err0;
12552 }
12553#endif
12554
12555 /* sysfs node creation */
12556 r = class_register(&amvideo_poll_class);
12557 if (r) {
12558 amlog_level(LOG_LEVEL_ERROR, "create video_poll class fail.\n");
12559#ifdef FIQ_VSYNC
12560 free_irq(BRIDGE_IRQ, (void *)video_dev_id);
12561#else
12562 free_irq(INT_VIU_VSYNC, (void *)video_dev_id);
12563#endif
12564 goto err1;
12565 }
12566
12567 r = class_register(&amvideo_class);
12568 if (r) {
12569 amlog_level(LOG_LEVEL_ERROR, "create video class fail.\n");
12570#ifdef FIQ_VSYNC
12571 free_irq(BRIDGE_IRQ, (void *)video_dev_id);
12572#else
12573 free_irq(INT_VIU_VSYNC, (void *)video_dev_id);
12574#endif
12575 goto err1;
12576 }
12577
12578 /* create video device */
12579 r = register_chrdev(AMVIDEO_MAJOR, "amvideo", &amvideo_fops);
12580 if (r < 0) {
12581 amlog_level(LOG_LEVEL_ERROR,
12582 "Can't register major for amvideo device\n");
12583 goto err2;
12584 }
12585
12586 r = register_chrdev(0, "amvideo_poll", &amvideo_poll_fops);
12587 if (r < 0) {
12588 amlog_level(LOG_LEVEL_ERROR,
12589 "Can't register major for amvideo_poll device\n");
12590 goto err3;
12591 }
12592
12593 amvideo_poll_major = r;
12594
12595 amvideo_dev = device_create(&amvideo_class, NULL,
12596 MKDEV(AMVIDEO_MAJOR, 0), NULL, DEVICE_NAME);
12597
12598 if (IS_ERR(amvideo_dev)) {
12599 amlog_level(LOG_LEVEL_ERROR, "Can't create amvideo device\n");
12600 goto err4;
12601 }
12602
12603 amvideo_poll_dev = device_create(&amvideo_poll_class, NULL,
12604 MKDEV(amvideo_poll_major, 0), NULL, "amvideo_poll");
12605
12606 if (IS_ERR(amvideo_poll_dev)) {
12607 amlog_level(LOG_LEVEL_ERROR,
12608 "Can't create amvideo_poll device\n");
12609 goto err5;
12610 }
12611
12612 /* make vd1 below vd2 */
12613 for (i = 0; i < MAX_VD_LAYERS; i++) {
12614 vpp_disp_info_init(&glayer_info[i], i);
12615 glayer_info[i].wide_mode = 1;
12616 glayer_info[i].zorder = reference_zorder - 2 + i;
12617 glayer_info[i].cur_sel_port = i;
12618 glayer_info[i].last_sel_port = i;
12619 }
12620
12621 if (legacy_vpp)
12622 layer_cap =
12623 LAYER1_AFBC |
12624 LAYER1_AVAIL |
12625 LAYER0_AFBC |
12626 LAYER0_SCALER |
12627 LAYER0_AVAIL;
12628 else if (is_meson_tl1_cpu())
12629 layer_cap =
12630 LAYER1_AVAIL |
12631 LAYER0_AFBC |
12632 LAYER0_SCALER |
12633 LAYER0_AVAIL;
12634 else
12635 layer_cap =
12636 LAYER1_AFBC |
12637 LAYER1_SCALER |
12638 LAYER1_AVAIL |
12639 LAYER0_AFBC |
12640 LAYER0_SCALER |
12641 LAYER0_AVAIL;
12642
12643 init_waitqueue_head(&amvideo_trick_wait);
12644 init_waitqueue_head(&amvideo_sizechange_wait);
12645#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
12646 INIT_WORK(&vpu_delay_work, do_vpu_delay_work);
12647#endif
12648
12649#ifdef CONFIG_AM_VOUT
12650 vout_hook();
12651#endif
12652
12653#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
12654 dispbuf_to_put_num = DISPBUF_TO_PUT_MAX;
12655 while (dispbuf_to_put_num > 0) {
12656 dispbuf_to_put_num--;
12657 dispbuf_to_put[dispbuf_to_put_num] = NULL;
12658 }
12659
12660 disp_canvas[0][0] =
12661 (disp_canvas_index[0][2] << 16) | (disp_canvas_index[0][1] << 8) |
12662 disp_canvas_index[0][0];
12663 disp_canvas[0][1] =
12664 (disp_canvas_index[0][5] << 16) | (disp_canvas_index[0][4] << 8) |
12665 disp_canvas_index[0][3];
12666
12667 disp_canvas[1][0] =
12668 (disp_canvas_index[1][2] << 16) | (disp_canvas_index[1][1] << 8) |
12669 disp_canvas_index[1][0];
12670 disp_canvas[1][1] =
12671 (disp_canvas_index[1][5] << 16) | (disp_canvas_index[1][4] << 8) |
12672 disp_canvas_index[1][3];
12673#else
12674
12675 disp_canvas[0] =
12676 (disp_canvas_index[2] << 16) | (disp_canvas_index[1] << 8) |
12677 disp_canvas_index[0];
12678 disp_canvas[1] =
12679 (disp_canvas_index[5] << 16) | (disp_canvas_index[4] << 8) |
12680 disp_canvas_index[3];
12681#endif
12682
12683 vsync_fiq_up();
12684#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12685 vsync2_fiq_up();
12686#endif
12687
12688 vf_receiver_init(&video_vf_recv, RECEIVER_NAME, &video_vf_receiver,
12689 NULL);
12690 vf_reg_receiver(&video_vf_recv);
12691
12692#ifdef VIDEO_PIP
12693 vf_receiver_init(
12694 &videopip_vf_recv, RECEIVERPIP_NAME,
12695 &videopip_vf_receiver, NULL);
12696 vf_reg_receiver(&videopip_vf_recv);
12697#endif
12698
12699#if DEBUG_TMP
12700 switch_dev_register(&video1_state_sdev);
12701 switch_set_state(&video1_state_sdev, 0);
12702#endif
12703 video_keeper_init();
12704#ifdef CONFIG_AM_VIDEO2
12705 set_clone_frame_rate(android_clone_rate, 0);
12706#endif
12707 REG_PATH_CONFIGS("media.video", video_configs);
12708 video_debugfs_init();
12709 return 0;
12710 err5:
12711 device_destroy(&amvideo_class, MKDEV(AMVIDEO_MAJOR, 0));
12712 err4:
12713 unregister_chrdev(amvideo_poll_major, "amvideo_poll");
12714 err3:
12715 unregister_chrdev(AMVIDEO_MAJOR, DEVICE_NAME);
12716
12717 err2:
12718#ifdef FIQ_VSYNC
12719 unregister_fiq_bridge_handle(&vsync_fiq_bridge);
12720#endif
12721 class_unregister(&amvideo_class);
12722 err1:
12723 class_unregister(&amvideo_poll_class);
12724#ifdef FIQ_VSYNC
12725 err0:
12726#endif
12727 amvideo_unregister_client(&amvideo_notifier);
12728 platform_driver_unregister(&amvideom_driver);
12729
12730 return r;
12731}
12732
12733
12734static void __exit video_exit(void)
12735{
12736 video_debugfs_exit();
12737 vf_unreg_receiver(&video_vf_recv);
12738
12739#ifdef VIDEO_PIP
12740 vf_unreg_receiver(&videopip_vf_recv);
12741#endif
12742 DisableVideoLayer();
12743 DisableVideoLayer2();
12744
12745 vsync_fiq_down();
12746#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12747 vsync2_fiq_down();
12748#endif
12749 device_destroy(&amvideo_class, MKDEV(AMVIDEO_MAJOR, 0));
12750 device_destroy(&amvideo_poll_class, MKDEV(amvideo_poll_major, 0));
12751
12752 unregister_chrdev(AMVIDEO_MAJOR, DEVICE_NAME);
12753 unregister_chrdev(amvideo_poll_major, "amvideo_poll");
12754
12755#ifdef FIQ_VSYNC
12756 unregister_fiq_bridge_handle(&vsync_fiq_bridge);
12757#endif
12758
12759 class_unregister(&amvideo_class);
12760 class_unregister(&amvideo_poll_class);
12761 amvideo_unregister_client(&amvideo_notifier);
12762}
12763
12764
12765
12766MODULE_PARM_DESC(debug_flag, "\n debug_flag\n");
12767module_param(debug_flag, uint, 0664);
12768
12769#ifdef TV_3D_FUNCTION_OPEN
12770MODULE_PARM_DESC(force_3d_scaler, "\n force_3d_scaler\n");
12771module_param(force_3d_scaler, uint, 0664);
12772
12773MODULE_PARM_DESC(video_3d_format, "\n video_3d_format\n");
12774module_param(video_3d_format, uint, 0664);
12775
12776#endif
12777
12778MODULE_PARM_DESC(vsync_enter_line_max, "\n vsync_enter_line_max\n");
12779module_param(vsync_enter_line_max, uint, 0664);
12780
12781MODULE_PARM_DESC(vsync_exit_line_max, "\n vsync_exit_line_max\n");
12782module_param(vsync_exit_line_max, uint, 0664);
12783
12784#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
12785MODULE_PARM_DESC(vsync_rdma_line_max, "\n vsync_rdma_line_max\n");
12786module_param(vsync_rdma_line_max, uint, 0664);
12787#endif
12788
12789module_param(underflow, uint, 0664);
12790MODULE_PARM_DESC(underflow, "\n Underflow count\n");
12791
12792module_param(next_peek_underflow, uint, 0664);
12793MODULE_PARM_DESC(skip, "\n Underflow count\n");
12794
12795module_param(hdmiin_frame_check, uint, 0664);
12796MODULE_PARM_DESC(hdmiin_frame_check, "\n hdmiin_frame_check\n");
12797
12798module_param(step_enable, uint, 0664);
12799MODULE_PARM_DESC(step_enable, "\n step_enable\n");
12800
12801module_param(step_flag, uint, 0664);
12802MODULE_PARM_DESC(step_flag, "\n step_flag\n");
12803
12804/*arch_initcall(video_early_init);*/
12805
12806module_init(video_init);
12807module_exit(video_exit);
12808
12809MODULE_PARM_DESC(smooth_sync_enable, "\n smooth_sync_enable\n");
12810module_param(smooth_sync_enable, uint, 0664);
12811
12812MODULE_PARM_DESC(hdmi_in_onvideo, "\n hdmi_in_onvideo\n");
12813module_param(hdmi_in_onvideo, uint, 0664);
12814
12815#ifdef CONFIG_AM_VIDEO2
12816MODULE_PARM_DESC(video_play_clone_rate, "\n video_play_clone_rate\n");
12817module_param(video_play_clone_rate, uint, 0664);
12818
12819MODULE_PARM_DESC(android_clone_rate, "\n android_clone_rate\n");
12820module_param(android_clone_rate, uint, 0664);
12821
12822MODULE_PARM_DESC(noneseamless_play_clone_rate,
12823 "\n noneseamless_play_clone_rate\n");
12824module_param(noneseamless_play_clone_rate, uint, 0664);
12825
12826#endif
12827MODULE_PARM_DESC(vsync_count, "\n vsync_count\n");
12828module_param(vsync_count, uint, 0664);
12829
12830
12831MODULE_PARM_DESC(cur_dev_idx, "\n cur_dev_idx\n");
12832module_param(cur_dev_idx, uint, 0664);
12833
12834MODULE_PARM_DESC(new_frame_count, "\n new_frame_count\n");
12835module_param(new_frame_count, uint, 0664);
12836
12837MODULE_PARM_DESC(first_frame_toggled, "\n first_frame_toggled\n");
12838module_param(first_frame_toggled, uint, 0664);
12839
12840MODULE_PARM_DESC(omx_pts, "\n omx_pts\n");
12841module_param(omx_pts, uint, 0664);
12842
12843MODULE_PARM_DESC(omx_run, "\n omx_run\n");
12844module_param(omx_run, bool, 0664);
12845
12846MODULE_PARM_DESC(omx_pts_set_index, "\n omx_pts_set_index\n");
12847module_param(omx_pts_set_index, uint, 0664);
12848
12849MODULE_PARM_DESC(omx_version, "\n omx_version\n");
12850module_param(omx_version, uint, 0664);
12851
12852MODULE_PARM_DESC(omx_info, "\n omx_info\n");
12853module_param(omx_info, uint, 0664);
12854
12855MODULE_PARM_DESC(omx_need_drop_frame_num, "\n omx_need_drop_frame_num\n");
12856module_param(omx_need_drop_frame_num, int, 0664);
12857
12858MODULE_PARM_DESC(omx_drop_done, "\n omx_drop_done\n");
12859module_param(omx_drop_done, bool, 0664);
12860
12861MODULE_PARM_DESC(omx_pts_interval_upper, "\n omx_pts_interval\n");
12862module_param(omx_pts_interval_upper, int, 0664);
12863
12864MODULE_PARM_DESC(omx_pts_interval_lower, "\n omx_pts_interval\n");
12865module_param(omx_pts_interval_lower, int, 0664);
12866
12867MODULE_PARM_DESC(drop_frame_count, "\n drop_frame_count\n");
12868module_param(drop_frame_count, int, 0664);
12869
12870MODULE_PARM_DESC(receive_frame_count, "\n receive_frame_count\n");
12871module_param(receive_frame_count, int, 0664);
12872
12873MODULE_PARM_DESC(display_frame_count, "\n display_frame_count\n");
12874module_param(display_frame_count, int, 0664);
12875
12876module_param(frame_detect_time, uint, 0664);
12877MODULE_PARM_DESC(frame_detect_time, "\n frame_detect_time\n");
12878
12879module_param(frame_detect_flag, uint, 0664);
12880MODULE_PARM_DESC(frame_detect_flag, "\n frame_detect_flag\n");
12881
12882module_param(frame_detect_fps, uint, 0664);
12883MODULE_PARM_DESC(frame_detect_fps, "\n frame_detect_fps\n");
12884
12885module_param(frame_detect_receive_count, uint, 0664);
12886MODULE_PARM_DESC(frame_detect_receive_count, "\n frame_detect_receive_count\n");
12887
12888module_param(frame_detect_drop_count, uint, 0664);
12889MODULE_PARM_DESC(frame_detect_drop_count, "\n frame_detect_drop_count\n");
12890
12891
12892
12893
12894MODULE_PARM_DESC(bypass_pps, "\n pps_bypass\n");
12895module_param(bypass_pps, bool, 0664);
12896
12897MODULE_PARM_DESC(platform_type, "\n platform_type\n");
12898module_param(platform_type, bool, 0664);
12899
12900MODULE_PARM_DESC(process_3d_type, "\n process_3d_type\n");
12901module_param(process_3d_type, uint, 0664);
12902
12903
12904MODULE_PARM_DESC(framepacking_support, "\n framepacking_support\n");
12905module_param(framepacking_support, uint, 0664);
12906
12907MODULE_PARM_DESC(framepacking_width, "\n framepacking_width\n");
12908module_param(framepacking_width, uint, 0664);
12909
12910MODULE_PARM_DESC(framepacking_height, "\n framepacking_height\n");
12911module_param(framepacking_height, uint, 0664);
12912
12913MODULE_PARM_DESC(framepacking_blank, "\n framepacking_blank\n");
12914module_param(framepacking_blank, uint, 0664);
12915
12916MODULE_PARM_DESC(bypass_cm, "\n bypass_cm\n");
12917module_param(bypass_cm, bool, 0664);
12918
12919#ifdef TV_REVERSE
12920module_param(reverse, bool, 0644);
12921MODULE_PARM_DESC(reverse, "reverse /disable reverse");
12922#endif
12923
12924MODULE_PARM_DESC(toggle_count, "\n toggle count\n");
12925module_param(toggle_count, uint, 0664);
12926
12927MODULE_PARM_DESC(vpp_hold_line, "\n vpp_hold_line\n");
12928module_param(vpp_hold_line, uint, 0664);
12929
12930MODULE_PARM_DESC(stop_update, "\n stop_update\n");
12931module_param(stop_update, uint, 0664);
12932
12933MODULE_PARM_DESC(reference_zorder, "\n reference_zorder\n");
12934module_param(reference_zorder, uint, 0664);
12935
12936MODULE_DESCRIPTION("AMLOGIC video output driver");
12937MODULE_LICENSE("GPL");
12938MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>");
12939
generated by cgit at 2024-05-17 06:30:25 (GMT)