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path: root/drivers/amlogic/media/video_sink/video.c (plain)
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1/*
2 * drivers/amlogic/media/video_sink/video.c
3 *
4 * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18#include <linux/version.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/spinlock.h>
22#include <linux/interrupt.h>
23#include <linux/fs.h>
24#include <linux/string.h>
25#include <linux/io.h>
26#include <linux/mm.h>
27#include <linux/amlogic/major.h>
28#include <linux/err.h>
29#include <linux/mutex.h>
30#include <linux/platform_device.h>
31#include <linux/ctype.h>
32#include <linux/amlogic/media/frame_sync/ptsserv.h>
33#include <linux/amlogic/media/frame_sync/timestamp.h>
34#include <linux/amlogic/media/frame_sync/tsync.h>
35#include <linux/amlogic/media/vfm/vframe.h>
36#include <linux/amlogic/media/vfm/vframe_provider.h>
37#include <linux/amlogic/media/vfm/vframe_receiver.h>
38#include <linux/amlogic/media/utils/amstream.h>
39#include <linux/amlogic/media/vout/vout_notify.h>
40#include <linux/sched.h>
41#include <linux/slab.h>
42#include <linux/poll.h>
43#include <linux/clk.h>
44#include <linux/debugfs.h>
45#include <linux/amlogic/media/canvas/canvas.h>
46#include <linux/amlogic/media/canvas/canvas_mgr.h>
47#include <linux/dma-mapping.h>
48#include <linux/dma-contiguous.h>
49#include <linux/sched.h>
50#include <linux/amlogic/media/video_sink/video_keeper.h>
51#include "video_priv.h"
52#include <trace/events/meson_atrace.h>
53
54#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
55#include <linux/amlogic/media/amvecm/amvecm.h>
56#endif
57#include <linux/amlogic/media/utils/vdec_reg.h>
58
59#ifdef CONFIG_PM
60#include <linux/delay.h>
61#include <linux/pm.h>
62#endif
63
64#include <linux/amlogic/media/registers/register.h>
65#include <linux/uaccess.h>
66#include <linux/amlogic/media/utils/amports_config.h>
67#include <linux/amlogic/media/vpu/vpu.h>
68#include "videolog.h"
69#ifdef CONFIG_AMLOGIC_MEDIA_VIDEOCAPTURE
70#include "amvideocap_priv.h"
71#endif
72#ifdef CONFIG_AM_VIDEO_LOG
73#define AMLOG
74#endif
75#include <linux/amlogic/media/utils/amlog.h>
76MODULE_AMLOG(LOG_LEVEL_ERROR, 0, LOG_DEFAULT_LEVEL_DESC, LOG_MASK_DESC);
77
78#include <linux/amlogic/media/video_sink/vpp.h>
79#include "linux/amlogic/media/frame_provider/tvin/tvin_v4l2.h"
80#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
81#define DISPLAY_CANVAS_BASE_INDEX2 0x10
82#define DISPLAY_CANVAS_MAX_INDEX2 0x15
83#include "../common/rdma/rdma.h"
84#endif
85#include <linux/amlogic/media/video_sink/video.h>
86#include <linux/amlogic/media/codec_mm/configs.h>
87
88#include "../common/vfm/vfm.h"
89#include <linux/amlogic/media/amdolbyvision/dolby_vision.h>
90
91#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
92#include <linux/amlogic/pm.h>
93#endif
94
95#define VIDEO_PIP
96
97static u32 osd_vpp_misc;
98static u32 osd_vpp_misc_mask;
99static bool update_osd_vpp_misc;
100int video_vsync = -ENXIO;
101/*global video manage cmd. */
102
103static bool legacy_vpp = true;
104
105#define DEBUG_TMP 0
106
107static int video_global_output = 1;
108/* video_pause_global: 0 is play, 1 is pause, 2 is invalid */
109static int video_pause_global = 1;
110
111#ifdef CONFIG_GE2D_KEEP_FRAME
112/* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */
113/* #include <mach/mod_gate.h> */
114/* #endif */
115/* #include "mach/meson-secure.h" */
116#endif
117
118#if 1
119/*TODO for logo*/
120struct platform_resource_s {
121 char name[10];
122 int mem_start;
123 int mem_end;
124};
125#endif
126
127struct video_frame_detect_s {
128 u32 interrupt_count;
129 u32 start_receive_count;
130};
131
132static int debugflags;
133static int output_fps;
134static u32 omx_pts;
135static u32 omx_pts_set_index;
136static bool omx_run;
137static u32 omx_version = 3;
138#define OMX_PTS_DV_DEFAULT_UPPER 2500
139#define OMX_PTS_DV_DEFAULT_LOWER -1600
140static int omx_pts_interval_upper = 11000;
141static int omx_pts_interval_lower = -5500;
142static int omx_pts_dv_upper = OMX_PTS_DV_DEFAULT_UPPER;
143static int omx_pts_dv_lower = OMX_PTS_DV_DEFAULT_LOWER;
144static int omx_pts_set_from_hwc_count;
145static bool omx_check_previous_session;
146static u32 omx_cur_session = 0xffffffff;
147static int drop_frame_count;
148#define OMX_MAX_COUNT_RESET_SYSTEMTIME 2
149static int receive_frame_count;
150static int display_frame_count;
151static int omx_need_drop_frame_num;
152static bool omx_drop_done;
153static bool video_start_post;
154static bool videopeek;
155static bool nopostvideostart;
156static struct video_frame_detect_s video_frame_detect;
157
158/*----omx_info bit0: keep_last_frame, bit1~31: unused----*/
159static u32 omx_info = 0x1;
160
161#define ENABLE_UPDATE_HDR_FROM_USER 0
162#if ENABLE_UPDATE_HDR_FROM_USER
163static struct vframe_master_display_colour_s vf_hdr;
164static bool has_hdr_info;
165#endif
166static DEFINE_MUTEX(omx_mutex);
167
168#define DURATION_GCD 750
169
170static bool bypass_cm;
171
172static bool bypass_pps = true;
173/*For 3D usage ----0: mbx 1: tv */
174bool platform_type = 1;
175
176/* for bit depth setting. */
177int bit_depth_flag = 8;
178
179bool omx_secret_mode;
180#define DEBUG_FLAG_FFPLAY (1<<0)
181#define DEBUG_FLAG_CALC_PTS_INC (1<<1)
182
183#define RECEIVER_NAME "amvideo"
184
185static s32 amvideo_poll_major;
186/*static s8 dolby_first_delay;*/ /* for bug 145902 */
187
188static int video_receiver_event_fun(int type, void *data, void *);
189
190static const struct vframe_receiver_op_s video_vf_receiver = {
191 .event_cb = video_receiver_event_fun
192};
193
194static struct vframe_receiver_s video_vf_recv;
195
196#ifdef VIDEO_PIP
197#define RECEIVERPIP_NAME "videopip"
198static int pip_receiver_event_fun(int type, void *data, void *);
199
200static const struct vframe_receiver_op_s videopip_vf_receiver = {
201 .event_cb = pip_receiver_event_fun
202};
203
204static struct vframe_receiver_s videopip_vf_recv;
205
206static struct vpp_frame_par_s *curpip_frame_par, *nextpip_frame_par;
207static struct vpp_frame_par_s pip_frame_parms[2];
208static struct vframe_s *cur_pipbuf;
209static struct vframe_s local_pip;
210static int _videopip_set_disable(u32 val);
211#endif
212
213static struct device *amvideo_dev;
214static struct device *amvideo_poll_dev;
215
216#define DRIVER_NAME "amvideo"
217#define MODULE_NAME "amvideo"
218#define DEVICE_NAME "amvideo"
219
220#ifdef CONFIG_AML_VSYNC_FIQ_ENABLE
221#define FIQ_VSYNC
222#endif
223
224/* #define SLOW_SYNC_REPEAT */
225/* #define INTERLACE_FIELD_MATCH_PROCESS */
226bool disable_slow_sync;
227
228#ifdef INTERLACE_FIELD_MATCH_PROCESS
229#define FIELD_MATCH_THRESHOLD 10
230static int field_matching_count;
231#endif
232
233#define M_PTS_SMOOTH_MAX 45000
234#define M_PTS_SMOOTH_MIN 2250
235#define M_PTS_SMOOTH_ADJUST 900
236static u32 underflow;
237static u32 next_peek_underflow;
238
239#define VIDEO_ENABLE_STATE_IDLE 0
240#define VIDEO_ENABLE_STATE_ON_REQ 1
241#define VIDEO_ENABLE_STATE_ON_PENDING 2
242#define VIDEO_ENABLE_STATE_OFF_REQ 3
243
244static DEFINE_SPINLOCK(video_onoff_lock);
245static int video_onoff_state = VIDEO_ENABLE_STATE_IDLE;
246static u32 video_onoff_time;
247static DEFINE_SPINLOCK(video2_onoff_lock);
248static int video2_onoff_state = VIDEO_ENABLE_STATE_IDLE;
249static u32 hdmiin_frame_check;
250static u32 hdmiin_frame_check_cnt;
251
252
253/*frame_detect_flag: 1 enable, 0 disable */
254/*frame_detect_time: */
255/* How often "frame_detect_receive_count" and */
256/* "frame_detect_drop_count" are updated, suggested set 1(s) */
257/*frame_detect_fps: Set fps based on the video file, */
258/* If the FPS is 60, set it to 60000. */
259/*frame_detect_receive_count: */
260/* The number of frame that should be obtained during the test time. */
261/*frame_detect_drop_count: */
262/* The number of frame lost during test time. */
263
264
265static u32 frame_detect_flag;
266static u32 frame_detect_time = 1;
267static u32 frame_detect_fps = 60000;
268static u32 frame_detect_receive_count;
269static u32 frame_detect_drop_count;
270
271#ifdef FIQ_VSYNC
272#define BRIDGE_IRQ INT_TIMER_C
273#define BRIDGE_IRQ_SET() WRITE_CBUS_REG(ISA_TIMERC, 1)
274#endif
275
276#define VD1_MEM_POWER_ON() \
277 do { \
278 unsigned long flags; \
279 spin_lock_irqsave(&delay_work_lock, flags); \
280 vpu_delay_work_flag &= ~VPU_DELAYWORK_MEM_POWER_OFF_VD1; \
281 spin_unlock_irqrestore(&delay_work_lock, flags); \
282 switch_vpu_mem_pd_vmod(VPU_VIU_VD1, VPU_MEM_POWER_ON); \
283 switch_vpu_mem_pd_vmod(VPU_AFBC_DEC, VPU_MEM_POWER_ON); \
284 switch_vpu_mem_pd_vmod(VPU_DI_POST, VPU_MEM_POWER_ON); \
285 if (!legacy_vpp) \
286 switch_vpu_mem_pd_vmod( \
287 VPU_VD1_SCALE, VPU_MEM_POWER_ON); \
288 } while (0)
289#define VD2_MEM_POWER_ON() \
290 do { \
291 unsigned long flags; \
292 spin_lock_irqsave(&delay_work_lock, flags); \
293 vpu_delay_work_flag &= ~VPU_DELAYWORK_MEM_POWER_OFF_VD2; \
294 spin_unlock_irqrestore(&delay_work_lock, flags); \
295 switch_vpu_mem_pd_vmod(VPU_VIU_VD2, VPU_MEM_POWER_ON); \
296 switch_vpu_mem_pd_vmod(VPU_AFBC_DEC1, VPU_MEM_POWER_ON); \
297 if (!legacy_vpp) \
298 switch_vpu_mem_pd_vmod( \
299 VPU_VD2_SCALE, VPU_MEM_POWER_ON); \
300 } while (0)
301#define VD1_MEM_POWER_OFF() \
302 do { \
303 unsigned long flags; \
304 spin_lock_irqsave(&delay_work_lock, flags); \
305 vpu_delay_work_flag |= VPU_DELAYWORK_MEM_POWER_OFF_VD1; \
306 vpu_mem_power_off_count = VPU_MEM_POWEROFF_DELAY; \
307 spin_unlock_irqrestore(&delay_work_lock, flags); \
308 } while (0)
309#define VD2_MEM_POWER_OFF() \
310 do { \
311 unsigned long flags; \
312 spin_lock_irqsave(&delay_work_lock, flags); \
313 vpu_delay_work_flag |= VPU_DELAYWORK_MEM_POWER_OFF_VD2; \
314 vpu_mem_power_off_count = VPU_MEM_POWEROFF_DELAY; \
315 spin_unlock_irqrestore(&delay_work_lock, flags); \
316 } while (0)
317
318#define VIDEO_LAYER_ON() \
319 do { \
320 unsigned long flags; \
321 spin_lock_irqsave(&video_onoff_lock, flags); \
322 video_onoff_state = VIDEO_ENABLE_STATE_ON_REQ; \
323 video_enabled = 1; \
324 video_status_saved = 1; \
325 spin_unlock_irqrestore(&video_onoff_lock, flags); \
326 } while (0)
327
328#define VIDEO_LAYER_OFF() \
329 do { \
330 unsigned long flags; \
331 spin_lock_irqsave(&video_onoff_lock, flags); \
332 video_onoff_state = VIDEO_ENABLE_STATE_OFF_REQ; \
333 video_enabled = 0; \
334 video_status_saved = 0; \
335 spin_unlock_irqrestore(&video_onoff_lock, flags); \
336 } while (0)
337
338#define VIDEO_LAYER2_ON() \
339 do { \
340 unsigned long flags; \
341 spin_lock_irqsave(&video2_onoff_lock, flags); \
342 video2_onoff_state = VIDEO_ENABLE_STATE_ON_REQ; \
343 video2_enabled = 1; \
344 video2_status_saved = 1; \
345 spin_unlock_irqrestore(&video2_onoff_lock, flags); \
346 } while (0)
347
348#define VIDEO_LAYER2_OFF() \
349 do { \
350 unsigned long flags; \
351 spin_lock_irqsave(&video2_onoff_lock, flags); \
352 video2_onoff_state = VIDEO_ENABLE_STATE_OFF_REQ; \
353 video2_enabled = 0; \
354 video2_status_saved = 0; \
355 spin_unlock_irqrestore(&video2_onoff_lock, flags); \
356 } while (0)
357
358#define EnableVideoLayer() \
359 do { \
360 VD1_MEM_POWER_ON(); \
361 VIDEO_LAYER_ON(); \
362 } while (0)
363
364#define EnableVideoLayer2() \
365 do { \
366 VD2_MEM_POWER_ON(); \
367 VIDEO_LAYER2_ON(); \
368 } while (0)
369
370#define VSYNC_EnableVideoLayer2() \
371 do { \
372 VD2_MEM_POWER_ON(); \
373 VSYNC_WR_MPEG_REG(VPP_MISC + cur_dev->vpp_off, \
374 READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off) |\
375 VPP_VD2_PREBLEND | (0x1ff << VPP_VD2_ALPHA_BIT)); \
376 } while (0)
377
378#define DisableVideoLayer() \
379 do { \
380 CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
381 VPP_VD1_PREBLEND | VPP_VD1_POSTBLEND); \
382 if (!legacy_vpp) { \
383 WRITE_VCBUS_REG( \
384 VD1_BLEND_SRC_CTRL + cur_dev->vpp_off, 0); \
385 } \
386 WRITE_VCBUS_REG(AFBC_ENABLE, 0);\
387 VIDEO_LAYER_OFF(); \
388 VD1_MEM_POWER_OFF(); \
389 if (debug_flag & DEBUG_FLAG_BLACKOUT) { \
390 pr_info("DisableVideoLayer()\n"); \
391 } \
392 } while (0)
393
394#define DisableVideoLayer_NoDelay() \
395 do { \
396 CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
397 VPP_VD1_PREBLEND | VPP_VD2_PREBLEND|\
398 VPP_VD2_POSTBLEND | VPP_VD1_POSTBLEND); \
399 if (!legacy_vpp) { \
400 WRITE_VCBUS_REG( \
401 VD1_BLEND_SRC_CTRL + cur_dev->vpp_off, 0); \
402 } \
403 WRITE_VCBUS_REG(AFBC_ENABLE, 0);\
404 if (debug_flag & DEBUG_FLAG_BLACKOUT) { \
405 pr_info("DisableVideoLayer_NoDelay()\n"); \
406 } \
407 } while (0)
408
409#define DisableVideoLayer2() \
410 do { \
411 CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
412 VPP_VD2_POSTBLEND | VPP_VD2_PREBLEND); \
413 VIDEO_LAYER2_OFF(); \
414 VD2_MEM_POWER_OFF(); \
415 } while (0)
416
417#define DisableVideoLayer_PREBELEND() \
418 do { CLEAR_VCBUS_REG_MASK(VPP_MISC + cur_dev->vpp_off, \
419 VPP_VD1_PREBLEND | VPP_VD2_PREBLEND); \
420 WRITE_VCBUS_REG(AFBC_ENABLE, 0);\
421 if (debug_flag & DEBUG_FLAG_BLACKOUT) { \
422 pr_info("DisableVideoLayer_PREBELEND()\n"); \
423 } \
424 } while (0)
425
426/*********************************************************/
427#if DEBUG_TMP
428static struct switch_dev video1_state_sdev = {
429/* android video layer switch device */
430 .name = "video_layer1",
431};
432#endif
433
434static DEFINE_MUTEX(video_layer_mutex);
435
436static u32 layer_cap;
437
438static struct disp_info_s glayer_info[MAX_VD_LAYERS];
439
440static u32 reference_zorder = 128;
441
442#define MAX_ZOOM_RATIO 300
443
444#define VPP_PREBLEND_VD_V_END_LIMIT 2304
445
446#define DUR2PTS(x) ((x) - ((x) >> 4))
447#define DUR2PTS_RM(x) ((x) & 0xf)
448#define PTS2DUR(x) (((x) << 4) / 15)
449
450#ifdef VIDEO_PTS_CHASE
451static int vpts_chase;
452static int av_sync_flag;
453static int vpts_chase_counter;
454static int vpts_chase_pts_diff;
455#endif
456
457static int step_enable;
458static int step_flag;
459
460/*seek values on.video_define.h*/
461static int debug_flag;
462int get_video_debug_flags(void)
463{
464 return debug_flag;
465}
466
467/* DEBUG_FLAG_BLACKOUT; */
468
469static int vsync_enter_line_max;
470static int vsync_exit_line_max;
471
472#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
473static int vsync_rdma_line_max;
474#endif
475static u32 framepacking_support __nosavedata;
476static unsigned int framepacking_width = 1920;
477static unsigned int framepacking_height = 2205;
478static unsigned int framepacking_blank = 45;
479static unsigned int process_3d_type;
480static unsigned int last_process_3d_type;
481#ifdef TV_3D_FUNCTION_OPEN
482/* toggle_3d_fa_frame is for checking the vpts_expire in 2 vsnyc */
483static int toggle_3d_fa_frame = 1;
484/*the pause_one_3d_fl_frame is for close*/
485/*the A/B register switch in every sync at pause mode. */
486static int pause_one_3d_fl_frame;
487MODULE_PARM_DESC(pause_one_3d_fl_frame, "\n pause_one_3d_fl_frame\n");
488module_param(pause_one_3d_fl_frame, uint, 0664);
489
490/*debug info control for skip & repeate vframe case*/
491static unsigned int video_dbg_vf;
492MODULE_PARM_DESC(video_dbg_vf, "\n video_dbg_vf\n");
493module_param(video_dbg_vf, uint, 0664);
494
495static unsigned int video_get_vf_cnt;
496static unsigned int video_drop_vf_cnt;
497MODULE_PARM_DESC(video_drop_vf_cnt, "\n video_drop_vf_cnt\n");
498module_param(video_drop_vf_cnt, uint, 0664);
499
500enum toggle_out_fl_frame_e {
501 OUT_FA_A_FRAME,
502 OUT_FA_BANK_FRAME,
503 OUT_FA_B_FRAME
504};
505
506static unsigned int video_3d_format;
507static unsigned int mvc_flag;
508static unsigned int force_3d_scaler = 3;
509static int mode_3d_changed;
510static int last_mode_3d;
511#endif
512
513#ifdef TV_REVERSE
514bool reverse;
515#endif
516
517const char video_dev_id[] = "amvideo-dev";
518
519const char video_dev_id2[] = "amvideo-dev2";
520
521int onwaitendframe;
522
523static u32 vpp_hold_line = 8;
524static u32 stop_update;
525
526struct video_dev_s video_dev[2] = {
527 {0x1d00 - 0x1d00, 0x1a50 - 0x1a50},
528 {0x1900 - 0x1d00, 0x1e00 - 0x1a50}
529};
530
531struct video_dev_s *cur_dev = &video_dev[0];
532struct video_dev_s *get_video_cur_dev(void)
533{
534 return cur_dev;
535}
536static int cur_dev_idx;
537
538#ifdef CONFIG_PM
539struct video_pm_state_s {
540 int event;
541 u32 vpp_misc;
542 int mem_pd_vd1;
543 int mem_pd_vd2;
544 int mem_pd_di_post;
545};
546#endif
547
548#define PTS_LOGGING
549#define PTS_THROTTLE
550/* #define PTS_TRACE_DEBUG */
551/* #define PTS_TRACE_START */
552
553#ifdef PTS_TRACE_DEBUG
554static int pts_trace_his[16];
555static u32 pts_his[16];
556static u32 scr_his[16];
557static int pts_trace_his_rd;
558#endif
559
560#if defined(PTS_LOGGING) || defined(PTS_TRACE_DEBUG)
561static int pts_trace;
562#endif
563
564#if defined(PTS_LOGGING)
565#define PTS_32_PATTERN_DETECT_RANGE 10
566#define PTS_22_PATTERN_DETECT_RANGE 10
567#define PTS_41_PATTERN_DETECT_RANGE 2
568
569enum video_refresh_pattern {
570 PTS_32_PATTERN = 0,
571 PTS_22_PATTERN,
572 PTS_41_PATTERN,
573 PTS_MAX_NUM_PATTERNS
574};
575
576int n_patterns = PTS_MAX_NUM_PATTERNS;
577
578static int pts_pattern[3] = {0, 0, 0};
579static int pts_pattern_enter_cnt[3] = {0, 0, 0};
580static int pts_pattern_exit_cnt[3] = {0, 0, 0};
581static int pts_log_enable[3] = {0, 0, 0};
582static int pre_pts_trace;
583static int pts_escape_vsync = -1;
584
585#define PTS_41_PATTERN_SINK_MAX 4
586static int pts_41_pattern_sink[PTS_41_PATTERN_SINK_MAX];
587static int pts_41_pattern_sink_index;
588static int pts_pattern_detected = -1;
589static bool pts_enforce_pulldown = true;
590#endif
591
592static DEFINE_MUTEX(video_module_mutex);
593static DEFINE_MUTEX(video_inuse_mutex);
594static DEFINE_SPINLOCK(lock);
595#if ENABLE_UPDATE_HDR_FROM_USER
596static DEFINE_SPINLOCK(omx_hdr_lock);
597#endif
598static u32 frame_par_ready_to_set, frame_par_force_to_set;
599static u32 vpts_remainder;
600static int video_property_changed;
601static u32 video_notify_flag;
602static int enable_video_discontinue_report = 1;
603
604#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
605static u32 video_scaler_mode;
606static int content_top = 0, content_left = 0, content_w = 0, content_h;
607static int scaler_pos_changed;
608#endif
609
610#ifndef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
611bool is_dolby_vision_enable(void)
612{
613 return 0;
614}
615bool is_dolby_vision_on(void)
616{
617 return 0;
618}
619bool is_dolby_vision_stb_mode(void)
620{
621 return 0;
622}
623#endif
624
625static struct amvideocap_req *capture_frame_req;
626u32 get_video_angle(void)
627{
628 return glayer_info[0].angle;
629}
630EXPORT_SYMBOL(get_video_angle);
631
632/*for video related files only.*/
633void video_module_lock(void)
634{
635 mutex_lock(&video_module_mutex);
636}
637void video_module_unlock(void)
638{
639 mutex_unlock(&video_module_mutex);
640}
641
642int video_property_notify(int flag)
643{
644 video_property_changed = flag;
645 return 0;
646}
647
648#if defined(PTS_LOGGING)
649static ssize_t pts_pattern_enter_cnt_read_file(struct file *file,
650 char __user *userbuf, size_t count, loff_t *ppos)
651{
652 char buf[20];
653 ssize_t len;
654
655 len = snprintf(buf, 20, "%d,%d,%d\n", pts_pattern_enter_cnt[0],
656 pts_pattern_enter_cnt[1], pts_pattern_enter_cnt[2]);
657 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
658}
659
660static ssize_t pts_pattern_exit_cnt_read_file(struct file *file,
661 char __user *userbuf, size_t count, loff_t *ppos)
662{
663 char buf[20];
664 ssize_t len;
665
666 len = snprintf(buf, 20, "%d,%d,%d\n", pts_pattern_exit_cnt[0],
667 pts_pattern_exit_cnt[1], pts_pattern_exit_cnt[2]);
668 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
669}
670
671static ssize_t pts_log_enable_read_file(struct file *file,
672 char __user *userbuf, size_t count, loff_t *ppos)
673{
674 char buf[20];
675 ssize_t len;
676
677 len = snprintf(buf, 20, "%d,%d,%d\n", pts_log_enable[0],
678 pts_log_enable[1], pts_log_enable[2]);
679 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
680}
681
682static ssize_t pts_log_enable_write_file(struct file *file,
683 const char __user *userbuf, size_t count, loff_t *ppos)
684{
685 char buf[20];
686 int ret;
687
688 count = min_t(size_t, count, (sizeof(buf)-1));
689 if (copy_from_user(buf, userbuf, count))
690 return -EFAULT;
691 buf[count] = 0;
692 /* pts_pattern_log_enable (3:2) (2:2) (4:1) */
693 ret = sscanf(buf, "%d,%d,%d", &pts_log_enable[0], &pts_log_enable[1],
694 &pts_log_enable[2]);
695 if (ret != 3) {
696 pr_info("use echo 0/1,0/1,0/1 > /sys/kernel/debug/pts_log_enable\n");
697 } else {
698 pr_info("pts_log_enable: %d,%d,%d\n", pts_log_enable[0],
699 pts_log_enable[1], pts_log_enable[2]);
700 }
701 return count;
702}
703static ssize_t pts_enforce_pulldown_read_file(struct file *file,
704 char __user *userbuf, size_t count, loff_t *ppos)
705{
706 char buf[16];
707 ssize_t len;
708
709 len = snprintf(buf, 16, "%d\n", pts_enforce_pulldown);
710 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
711}
712
713static ssize_t pts_enforce_pulldown_write_file(struct file *file,
714 const char __user *userbuf, size_t count, loff_t *ppos)
715{
716 unsigned int write_val;
717 char buf[16];
718 int ret;
719
720 count = min_t(size_t, count, (sizeof(buf)-1));
721 if (copy_from_user(buf, userbuf, count))
722 return -EFAULT;
723 buf[count] = 0;
724 ret = kstrtoint(buf, 0, &write_val);
725 if (ret != 0)
726 return -EINVAL;
727 pr_info("pts_enforce_pulldown: %d->%d\n",
728 pts_enforce_pulldown, write_val);
729 pts_enforce_pulldown = write_val;
730 return count;
731}
732
733static const struct file_operations pts_pattern_enter_cnt_file_ops = {
734 .open = simple_open,
735 .read = pts_pattern_enter_cnt_read_file,
736};
737
738static const struct file_operations pts_pattern_exit_cnt_file_ops = {
739 .open = simple_open,
740 .read = pts_pattern_exit_cnt_read_file,
741};
742
743static const struct file_operations pts_log_enable_file_ops = {
744 .open = simple_open,
745 .read = pts_log_enable_read_file,
746 .write = pts_log_enable_write_file,
747};
748
749static const struct file_operations pts_enforce_pulldown_file_ops = {
750 .open = simple_open,
751 .read = pts_enforce_pulldown_read_file,
752 .write = pts_enforce_pulldown_write_file,
753};
754#endif
755
756struct video_debugfs_files_s {
757 const char *name;
758 const umode_t mode;
759 const struct file_operations *fops;
760};
761
762static struct video_debugfs_files_s video_debugfs_files[] = {
763#if defined(PTS_LOGGING)
764 {"pts_pattern_enter_cnt", S_IFREG | 0444,
765 &pts_pattern_enter_cnt_file_ops
766 },
767 {"pts_pattern_exit_cnt", S_IFREG | 0444,
768 &pts_pattern_exit_cnt_file_ops
769 },
770 {"pts_log_enable", S_IFREG | 0644,
771 &pts_log_enable_file_ops
772 },
773 {"pts_enforce_pulldown", S_IFREG | 0644,
774 &pts_enforce_pulldown_file_ops
775 },
776#endif
777};
778
779static struct dentry *video_debugfs_root;
780static void video_debugfs_init(void)
781{
782 struct dentry *ent;
783 int i;
784
785 if (video_debugfs_root)
786 return;
787 video_debugfs_root = debugfs_create_dir("video", NULL);
788 if (!video_debugfs_root)
789 pr_err("can't create video debugfs dir\n");
790
791 for (i = 0; i < ARRAY_SIZE(video_debugfs_files); i++) {
792 ent = debugfs_create_file(video_debugfs_files[i].name,
793 video_debugfs_files[i].mode,
794 video_debugfs_root, NULL,
795 video_debugfs_files[i].fops);
796 if (!ent)
797 pr_info("debugfs create file %s failed\n",
798 video_debugfs_files[i].name);
799 }
800}
801
802static void video_debugfs_exit(void)
803{
804 debugfs_remove(video_debugfs_root);
805}
806
807#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
808int video_scaler_notify(int flag)
809{
810 video_scaler_mode = flag;
811 video_property_changed = 1;
812 return 0;
813}
814
815u32 amvideo_get_scaler_para(int *x, int *y, int *w, int *h, u32 *ratio)
816{
817 *x = content_left;
818 *y = content_top;
819 *w = content_w;
820 *h = content_h;
821 /* *ratio = 100; */
822 return video_scaler_mode;
823}
824
825void amvideo_set_scaler_para(int x, int y, int w, int h, int flag)
826{
827 struct disp_info_s *layer = &glayer_info[0];
828
829 mutex_lock(&video_module_mutex);
830 if (w < 2)
831 w = 0;
832 if (h < 2)
833 h = 0;
834 if (flag) {
835 if ((content_left != x) || (content_top != y)
836 || (content_w != w) || (content_h != h))
837 scaler_pos_changed = 1;
838 content_left = x;
839 content_top = y;
840 content_w = w;
841 content_h = h;
842 } else {
843 layer->layer_left = x;
844 layer->layer_top = y;
845 layer->layer_width = w;
846 layer->layer_height = h;
847 }
848 video_property_changed = 1;
849 mutex_unlock(&video_module_mutex);
850}
851
852u32 amvideo_get_scaler_mode(void)
853{
854 return video_scaler_mode;
855}
856#endif
857
858bool to_notify_trick_wait;
859/* display canvas */
860#define DISPLAY_CANVAS_BASE_INDEX 0x60
861
862#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
863static struct vframe_s *cur_rdma_buf;
864/*
865 *void vsync_rdma_config(void);
866 *void vsync_rdma_config_pre(void);
867 *bool is_vsync_rdma_enable(void);
868 *void start_rdma(void);
869 *void enable_rdma_log(int flag);
870 */
871static int enable_rdma_log_count;
872
873bool rdma_enable_pre;
874
875u32 disp_canvas_index[2][6] = {
876 {
877 DISPLAY_CANVAS_BASE_INDEX,
878 DISPLAY_CANVAS_BASE_INDEX + 1,
879 DISPLAY_CANVAS_BASE_INDEX + 2,
880 DISPLAY_CANVAS_BASE_INDEX + 3,
881 DISPLAY_CANVAS_BASE_INDEX + 4,
882 DISPLAY_CANVAS_BASE_INDEX + 5,
883 },
884 {
885 DISPLAY_CANVAS_BASE_INDEX2,
886 DISPLAY_CANVAS_BASE_INDEX2 + 1,
887 DISPLAY_CANVAS_BASE_INDEX2 + 2,
888 DISPLAY_CANVAS_BASE_INDEX2 + 3,
889 DISPLAY_CANVAS_BASE_INDEX2 + 4,
890 DISPLAY_CANVAS_BASE_INDEX2 + 5,
891 }
892};
893
894static u32 disp_canvas[2][2];
895static u32 rdma_canvas_id;
896static u32 next_rdma_canvas_id = 1;
897
898#ifdef VIDEO_PIP
899static u32 pip_rdma_canvas_id;
900static u32 pip_next_rdma_canvas_id = 1;
901static struct vframe_s *pip_rdma_buf;
902static struct vframe_s *pipbuf_to_put;
903#endif
904
905#define DISPBUF_TO_PUT_MAX 8
906static struct vframe_s *dispbuf_to_put[DISPBUF_TO_PUT_MAX];
907static int dispbuf_to_put_num;
908#else
909static u32 disp_canvas_index[6] = {
910 DISPLAY_CANVAS_BASE_INDEX,
911 DISPLAY_CANVAS_BASE_INDEX + 1,
912 DISPLAY_CANVAS_BASE_INDEX + 2,
913 DISPLAY_CANVAS_BASE_INDEX + 3,
914 DISPLAY_CANVAS_BASE_INDEX + 4,
915 DISPLAY_CANVAS_BASE_INDEX + 5,
916};
917
918static u32 disp_canvas[2];
919#endif
920
921static u32 post_canvas;
922
923
924/* zoom information */
925static u32 zoom_start_x_lines;
926static u32 zoom_end_x_lines;
927static u32 zoom_start_y_lines;
928static u32 zoom_end_y_lines;
929
930static u32 ori_start_x_lines;
931static u32 ori_end_x_lines;
932static u32 ori_start_y_lines;
933static u32 ori_end_y_lines;
934
935static u32 zoom2_start_x_lines;
936static u32 zoom2_end_x_lines;
937static u32 zoom2_start_y_lines;
938static u32 zoom2_end_y_lines;
939
940static u32 ori2_start_x_lines;
941static u32 ori2_end_x_lines;
942static u32 ori2_start_y_lines;
943static u32 ori2_end_y_lines;
944
945/* black out policy */
946#if defined(CONFIG_JPEGLOGO)
947static u32 blackout;
948#else
949static u32 blackout = 1;
950#endif
951static u32 force_blackout;
952
953/* disable video */
954
955#ifdef VIDEO_PIP
956static u32 pip_frame_count;
957static u32 disable_videopip = VIDEO_DISABLE_FORNEXT;
958static int pip_property_changed;
959static u32 pip_frame_ready_to_set;
960static u32 pip_global_output = 1;
961#if 0
962static u32 pip_v_skip;
963static u32 pip_h_skip;
964static u32 pip_start_x_lines;
965static u32 pip_end_x_lines;
966static u32 pip_start_y_lines;
967static u32 pip_end_y_lines;
968#endif
969static u32 pip_loop;
970#endif
971
972static u32 disable_video = VIDEO_DISABLE_NONE;
973static u32 video_enabled __nosavedata;
974static u32 video2_enabled __nosavedata;
975static u32 video_status_saved __nosavedata;
976static u32 video2_status_saved __nosavedata;
977static u32 hold_video;
978
979u32 get_video_enabled(void)
980{
981 return video_enabled;
982}
983/* show first frame*/
984static bool show_first_frame_nosync;
985bool show_first_picture;
986/* static bool first_frame=false; */
987
988/* test screen*/
989static u32 test_screen;
990/* rgb screen*/
991static u32 rgb_screen;
992
993/* video frame repeat count */
994static u32 frame_repeat_count;
995
996/* vout */
997static const struct vinfo_s *vinfo;
998
999/* config */
1000static struct vframe_s *cur_dispbuf;
1001static struct vframe_s *cur_dispbuf2;
1002static bool need_disable_vd2;
1003static bool last_mvc_status;
1004void update_cur_dispbuf(void *buf)
1005{
1006 cur_dispbuf = buf;
1007}
1008
1009static struct vframe_s vf_local, vf_local2;
1010static u32 vsync_pts_inc;
1011static u32 vsync_pts_inc_scale;
1012static u32 vsync_pts_inc_scale_base = 1;
1013static u32 vsync_pts_inc_upint;
1014static u32 vsync_pts_inc_adj;
1015static u32 vsync_pts_125;
1016static u32 vsync_pts_112;
1017static u32 vsync_pts_101;
1018static u32 vsync_pts_100;
1019static u32 vsync_freerun;
1020/* extend this value to support both slow and fast playback
1021 * 0,1: normal playback
1022 * [2,1000]: speed/vsync_slow_factor
1023 * >1000: speed*(vsync_slow_factor/1000000)
1024 */
1025static u32 vsync_slow_factor = 1;
1026
1027/* pts alignment */
1028static bool vsync_pts_aligned;
1029static s32 vsync_pts_align;
1030
1031/* frame rate calculate */
1032static u32 last_frame_count;
1033static u32 frame_count;
1034static u32 new_frame_count;
1035static u32 first_frame_toggled;
1036static u32 toggle_count;
1037static u32 last_frame_time;
1038static u32 timer_count;
1039static u32 vsync_count;
1040static u64 last_frame_duration;
1041
1042static struct vpp_frame_par_s *cur_frame_par, *next_frame_par;
1043static struct vpp_frame_par_s frame_parms[2];
1044
1045/* vsync pass flag */
1046static u32 wait_sync;
1047
1048/* is fffb or seeking*/
1049static u32 video_seek_flag;
1050
1051#ifdef FIQ_VSYNC
1052static bridge_item_t vsync_fiq_bridge;
1053#endif
1054
1055/* trickmode i frame*/
1056u32 trickmode_i;
1057EXPORT_SYMBOL(trickmode_i);
1058
1059/* trickmode ff/fb */
1060u32 trickmode_fffb;
1061atomic_t trickmode_framedone = ATOMIC_INIT(0);
1062atomic_t video_sizechange = ATOMIC_INIT(0);
1063atomic_t video_unreg_flag = ATOMIC_INIT(0);
1064atomic_t video_inirq_flag = ATOMIC_INIT(0);
1065atomic_t video_pause_flag = ATOMIC_INIT(0);
1066int trickmode_duration;
1067int trickmode_duration_count;
1068u32 trickmode_vpts;
1069/* last_playback_filename */
1070char file_name[512];
1071
1072/* video freerun mode */
1073#define FREERUN_NONE 0 /* no freerun mode */
1074#define FREERUN_NODUR 1 /* freerun without duration */
1075#define FREERUN_DUR 2 /* freerun with duration */
1076static u32 freerun_mode;
1077static u32 slowsync_repeat_enable;
1078static bool dmc_adjust = true;
1079module_param_named(dmc_adjust, dmc_adjust, bool, 0644);
1080static u32 dmc_config_state;
1081static u32 last_toggle_count;
1082static u32 toggle_same_count;
1083
1084/* video_inuse */
1085static u32 video_inuse;
1086
1087void set_freerun_mode(int mode)
1088{
1089 freerun_mode = mode;
1090}
1091EXPORT_SYMBOL(set_freerun_mode);
1092
1093void set_pts_realign(void)
1094{
1095 vsync_pts_aligned = false;
1096}
1097EXPORT_SYMBOL(set_pts_realign);
1098
1099static const enum f2v_vphase_type_e vpp_phase_table[4][3] = {
1100 {F2V_P2IT, F2V_P2IB, F2V_P2P}, /* VIDTYPE_PROGRESSIVE */
1101 {F2V_IT2IT, F2V_IT2IB, F2V_IT2P}, /* VIDTYPE_INTERLACE_TOP */
1102 {F2V_P2IT, F2V_P2IB, F2V_P2P},
1103 {F2V_IB2IT, F2V_IB2IB, F2V_IB2P} /* VIDTYPE_INTERLACE_BOTTOM */
1104};
1105
1106static const u8 skip_tab[6] = { 0x24, 0x04, 0x68, 0x48, 0x28, 0x08 };
1107
1108/* wait queue for poll */
1109static wait_queue_head_t amvideo_trick_wait;
1110
1111/* wait queue for poll */
1112static wait_queue_head_t amvideo_sizechange_wait;
1113
1114#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
1115#define VPU_DELAYWORK_VPU_CLK 1
1116#define VPU_DELAYWORK_MEM_POWER_OFF_VD1 2
1117#define VPU_DELAYWORK_MEM_POWER_OFF_VD2 4
1118#define VPU_DELAYWORK_MEM_POWER_OFF_PROT 8
1119#define VPU_VIDEO_LAYER1_CHANGED 16
1120#define VPU_UPDATE_DOLBY_VISION 32
1121
1122#define VPU_MEM_POWEROFF_DELAY 100
1123static struct work_struct vpu_delay_work;
1124static int vpu_clk_level;
1125static DEFINE_SPINLOCK(delay_work_lock);
1126static int vpu_delay_work_flag;
1127static int vpu_mem_power_off_count;
1128#endif
1129
1130static u32 vpts_ref;
1131static u32 video_frame_repeat_count;
1132static u32 smooth_sync_enable;
1133static u32 hdmi_in_onvideo;
1134#ifdef CONFIG_AM_VIDEO2
1135static int video_play_clone_rate = 60;
1136static int android_clone_rate = 30;
1137static int noneseamless_play_clone_rate = 5;
1138#endif
1139
1140#define CONFIG_AM_VOUT
1141
1142void safe_disble_videolayer(void)
1143{
1144#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
1145 if (video_scaler_mode)
1146 DisableVideoLayer_PREBELEND();
1147 else
1148 DisableVideoLayer();
1149#else
1150 DisableVideoLayer();
1151#endif
1152}
1153
1154
1155/*********************************************************/
1156#ifdef VIDEO_PIP
1157static inline struct vframe_s *pip_vf_peek(void)
1158{
1159 if (pip_loop)
1160 return cur_dispbuf;
1161 return vf_peek(RECEIVERPIP_NAME);
1162}
1163
1164static inline struct vframe_s *pip_vf_get(void)
1165{
1166 struct vframe_s *vf = NULL;
1167
1168 if (pip_loop)
1169 return cur_dispbuf;
1170
1171 vf = vf_get(RECEIVERPIP_NAME);
1172
1173 if (vf) {
1174 /* video_notify_flag |= VIDEO_NOTIFY_PROVIDER_GET; */
1175 atomic_set(&vf->use_cnt, 1);
1176 }
1177 return vf;
1178
1179}
1180
1181#if 0
1182static int pip_vf_get_states(struct vframe_states *states)
1183{
1184 int ret = -1;
1185 unsigned long flags;
1186
1187 spin_lock_irqsave(&lock, flags);
1188 ret = vf_get_states_by_name(RECEIVERPIP_NAME, states);
1189 spin_unlock_irqrestore(&lock, flags);
1190 return ret;
1191}
1192#endif
1193
1194static inline void pip_vf_put(struct vframe_s *vf)
1195{
1196 struct vframe_provider_s *vfp = vf_get_provider(RECEIVERPIP_NAME);
1197
1198 if (pip_loop)
1199 return;
1200
1201 if (vfp && vf && atomic_dec_and_test(&vf->use_cnt)) {
1202 vf_put(vf, RECEIVERPIP_NAME);
1203 /* video_notify_flag |= VIDEO_NOTIFY_PROVIDER_PUT; */
1204 }
1205}
1206#endif
1207
1208static inline struct vframe_s *video_vf_peek(void)
1209{
1210 struct vframe_s *vf = vf_peek(RECEIVER_NAME);
1211
1212 if (vf && vf->disp_pts && vf->disp_pts_us64) {
1213 vf->pts = vf->disp_pts;
1214 vf->pts_us64 = vf->disp_pts_us64;
1215 vf->disp_pts = 0;
1216 vf->disp_pts_us64 = 0;
1217 }
1218 return vf;
1219}
1220
1221static inline struct vframe_s *video_vf_get(void)
1222{
1223 struct vframe_s *vf = NULL;
1224 int frame_width, frame_height;
1225
1226 vf = vf_get(RECEIVER_NAME);
1227
1228 if (vf) {
1229 if (vf->disp_pts && vf->disp_pts_us64) {
1230 vf->pts = vf->disp_pts;
1231 vf->pts_us64 = vf->disp_pts_us64;
1232 vf->disp_pts = 0;
1233 vf->disp_pts_us64 = 0;
1234 }
1235 if (vf->type & VIDTYPE_COMPRESS) {
1236 frame_width = vf->compWidth;
1237 frame_height = vf->compHeight;
1238 } else {
1239 frame_width = vf->width;
1240 frame_height = vf->height;
1241 }
1242 video_notify_flag |= VIDEO_NOTIFY_PROVIDER_GET;
1243 atomic_set(&vf->use_cnt, 1);
1244 /*always to 1,for first get from vfm provider */
1245 if ((vf->type & VIDTYPE_MVC) && (framepacking_support)
1246 &&(framepacking_width) && (framepacking_height)) {
1247 vf->width = framepacking_width;
1248 vf->height = framepacking_height;
1249 }
1250#ifdef TV_3D_FUNCTION_OPEN
1251 /*can be moved to h264mvc.c */
1252 if ((vf->type & VIDTYPE_MVC)
1253 && (process_3d_type & MODE_3D_ENABLE) && vf->trans_fmt) {
1254 vf->type = VIDTYPE_PROGRESSIVE | VIDTYPE_VIU_FIELD;
1255 process_3d_type |= MODE_3D_MVC;
1256 mvc_flag = 1;
1257 } else {
1258 process_3d_type &= (~MODE_3D_MVC);
1259 mvc_flag = 0;
1260 }
1261 if (((process_3d_type & MODE_FORCE_3D_TO_2D_LR)
1262 || (process_3d_type & MODE_FORCE_3D_LR)
1263 || (process_3d_type & MODE_FORCE_3D_FA_LR))
1264 && (!(vf->type & VIDTYPE_MVC))
1265 && (vf->trans_fmt != TVIN_TFMT_3D_FP)) {
1266 vf->trans_fmt = TVIN_TFMT_3D_DET_LR;
1267 vf->left_eye.start_x = 0;
1268 vf->left_eye.start_y = 0;
1269 vf->left_eye.width = frame_width / 2;
1270 vf->left_eye.height = frame_height;
1271
1272 vf->right_eye.start_x = frame_width / 2;
1273 vf->right_eye.start_y = 0;
1274 vf->right_eye.width = frame_width / 2;
1275 vf->right_eye.height = frame_height;
1276 }
1277 if (((process_3d_type & MODE_FORCE_3D_TO_2D_TB)
1278 || (process_3d_type & MODE_FORCE_3D_TB)
1279 || (process_3d_type & MODE_FORCE_3D_FA_TB))
1280 && (!(vf->type & VIDTYPE_MVC))
1281 && (vf->trans_fmt != TVIN_TFMT_3D_FP)) {
1282 vf->trans_fmt = TVIN_TFMT_3D_TB;
1283 vf->left_eye.start_x = 0;
1284 vf->left_eye.start_y = 0;
1285 vf->left_eye.width = frame_width;
1286 vf->left_eye.height = frame_height/2;
1287
1288 vf->right_eye.start_x = 0;
1289 vf->right_eye.start_y = frame_height/2;
1290 vf->right_eye.width = frame_width;
1291 vf->right_eye.height = frame_height/2;
1292 }
1293 receive_frame_count++;
1294#endif
1295 }
1296 return vf;
1297
1298}
1299
1300static int video_vf_get_states(struct vframe_states *states)
1301{
1302 int ret = -1;
1303 unsigned long flags;
1304
1305 spin_lock_irqsave(&lock, flags);
1306 ret = vf_get_states_by_name(RECEIVER_NAME, states);
1307 spin_unlock_irqrestore(&lock, flags);
1308 return ret;
1309}
1310
1311static inline void video_vf_put(struct vframe_s *vf)
1312{
1313 struct vframe_provider_s *vfp = vf_get_provider(RECEIVER_NAME);
1314
1315 if (vfp && vf && atomic_dec_and_test(&vf->use_cnt)) {
1316 vf_put(vf, RECEIVER_NAME);
1317#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
1318 if (is_dolby_vision_enable())
1319 dolby_vision_vf_put(vf);
1320#endif
1321 video_notify_flag |= VIDEO_NOTIFY_PROVIDER_PUT;
1322 }
1323}
1324
1325int ext_get_cur_video_frame(struct vframe_s **vf, int *canvas_index)
1326{
1327 if (cur_dispbuf == NULL)
1328 return -1;
1329 atomic_inc(&cur_dispbuf->use_cnt);
1330 *canvas_index = READ_VCBUS_REG(VD1_IF0_CANVAS0 + cur_dev->viu_off);
1331 *vf = cur_dispbuf;
1332 return 0;
1333}
1334static void dump_vframe_status(const char *name)
1335{
1336 int ret = -1;
1337 struct vframe_states states;
1338 struct vframe_provider_s *vfp;
1339
1340 vfp = vf_get_provider_by_name(name);
1341 if (vfp && vfp->ops && vfp->ops->vf_states)
1342 ret = vfp->ops->vf_states(&states, vfp->op_arg);
1343
1344 if (ret == 0) {
1345 ret += pr_info("%s_pool_size=%d\n",
1346 name, states.vf_pool_size);
1347 ret += pr_info("%s buf_free_num=%d\n",
1348 name, states.buf_free_num);
1349 ret += pr_info("%s buf_avail_num=%d\n",
1350 name, states.buf_avail_num);
1351 } else {
1352 ret += pr_info("%s vframe no states\n", name);
1353 }
1354}
1355
1356static void dump_vdin_reg(void)
1357{
1358 unsigned int reg001, reg002;
1359
1360 reg001 = READ_VCBUS_REG(0x1204);
1361 reg002 = READ_VCBUS_REG(0x1205);
1362 pr_info("VDIN_LCNT_STATUS:0x%x,VDIN_COM_STATUS0:0x%x\n",
1363 reg001, reg002);
1364}
1365
1366#ifdef CONFIG_AMLOGIC_MEDIA_VIDEOCAPTURE
1367
1368int ext_put_video_frame(struct vframe_s *vf)
1369{
1370 if (vf == &vf_local)
1371 return 0;
1372 video_vf_put(vf);
1373 return 0;
1374}
1375
1376static int is_need_framepacking_output(void)
1377{
1378 int ret = 0;
1379
1380 if ((framepacking_support) &&
1381 (cur_dispbuf) && (cur_dispbuf->type & VIDTYPE_MVC)) {
1382 ret = 1;
1383 }
1384 return ret;
1385}
1386
1387int ext_register_end_frame_callback(struct amvideocap_req *req)
1388{
1389 mutex_lock(&video_module_mutex);
1390 capture_frame_req = req;
1391 mutex_unlock(&video_module_mutex);
1392 return 0;
1393}
1394int ext_frame_capture_poll(int endflags)
1395{
1396 mutex_lock(&video_module_mutex);
1397 if (capture_frame_req && capture_frame_req->callback) {
1398 struct vframe_s *vf;
1399 int index;
1400 int ret;
1401 struct amvideocap_req *req = capture_frame_req;
1402
1403 ret = ext_get_cur_video_frame(&vf, &index);
1404 if (!ret) {
1405 req->callback(req->data, vf, index);
1406 capture_frame_req = NULL;
1407 }
1408 }
1409 mutex_unlock(&video_module_mutex);
1410 return 0;
1411}
1412#endif
1413
1414static void update_layer_info(u8 layer_id)
1415{
1416 struct disp_info_s *layer;
1417
1418 if (layer_id >= MAX_VD_LAYERS)
1419 return;
1420
1421 if (layer_id == 0) {
1422 layer = &glayer_info[0];
1423 layer->reverse = reverse;
1424 layer->proc_3d_type = process_3d_type;
1425 } else if (layer_id == 1) {
1426 layer = &glayer_info[1];
1427 layer->reverse = reverse;
1428 layer->proc_3d_type = 0;
1429 }
1430}
1431
1432static void vpp_settings_h(struct vpp_frame_par_s *framePtr)
1433{
1434 struct vppfilter_mode_s *vpp_filter = &framePtr->vpp_filter;
1435 u32 r1, r2, r3;
1436
1437 u32 x_lines;
1438
1439 r1 = framePtr->VPP_hsc_linear_startp - framePtr->VPP_hsc_startp;
1440 r2 = framePtr->VPP_hsc_linear_endp - framePtr->VPP_hsc_startp;
1441 r3 = framePtr->VPP_hsc_endp - framePtr->VPP_hsc_startp;
1442
1443 if ((framePtr->supscl_path == CORE0_PPS_CORE1) ||
1444 (framePtr->supscl_path == CORE1_AFTER_PPS) ||
1445 (framePtr->supscl_path == PPS_CORE0_CORE1) ||
1446 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1447 r3 >>= framePtr->supsc1_hori_ratio;
1448 if ((framePtr->supscl_path == CORE0_AFTER_PPS) ||
1449 (framePtr->supscl_path == PPS_CORE0_CORE1) ||
1450 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1451 r3 >>= framePtr->supsc0_hori_ratio;
1452
1453 x_lines = zoom_end_x_lines / (framePtr->hscale_skip_count + 1);
1454 if (process_3d_type & MODE_3D_OUT_TB) {
1455 /* vd1 and vd2 do pre blend */
1456 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_H_START_END,
1457 ((zoom_start_x_lines & VPP_VD_SIZE_MASK) <<
1458 VPP_VD1_START_BIT) | (((zoom_end_x_lines) &
1459 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1460 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_H_START_END,
1461 ((zoom_start_x_lines & VPP_VD_SIZE_MASK) <<
1462 VPP_VD1_START_BIT) | (((zoom_end_x_lines) &
1463 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1464 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_H_START_END +
1465 cur_dev->vpp_off,
1466 ((framePtr->VPP_hsc_startp & VPP_VD_SIZE_MASK)
1467 << VPP_VD1_START_BIT) |
1468 ((framePtr->VPP_hsc_endp & VPP_VD_SIZE_MASK)
1469 << VPP_VD1_END_BIT));
1470 } else if (process_3d_type & MODE_3D_OUT_LR) {
1471 /* vd1 and vd2 do pre blend */
1472 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_H_START_END,
1473 ((zoom_start_x_lines & VPP_VD_SIZE_MASK) <<
1474 VPP_VD1_START_BIT) | (((x_lines >> 1) &
1475 VPP_VD_SIZE_MASK) <<
1476 VPP_VD1_END_BIT));
1477 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_H_START_END,
1478 ((((x_lines + 1) >> 1) & VPP_VD_SIZE_MASK) <<
1479 VPP_VD1_START_BIT) | ((x_lines &
1480 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1481 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_H_START_END +
1482 cur_dev->vpp_off,
1483 ((framePtr->VPP_hsc_startp & VPP_VD_SIZE_MASK)
1484 << VPP_VD1_START_BIT) |
1485 ((framePtr->VPP_hsc_endp & VPP_VD_SIZE_MASK)
1486 << VPP_VD1_END_BIT));
1487 } else{
1488 if (!legacy_vpp) {
1489 x_lines = (zoom_end_x_lines -
1490 zoom_start_x_lines + 1)
1491 / (framePtr->hscale_skip_count + 1);
1492 VSYNC_WR_MPEG_REG(
1493 VPP_PREBLEND_VD1_H_START_END,
1494 ((0 & VPP_VD_SIZE_MASK) <<
1495 VPP_VD1_START_BIT) | (((x_lines - 1) &
1496 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1497 }
1498 VSYNC_WR_MPEG_REG(
1499 VPP_POSTBLEND_VD1_H_START_END +
1500 cur_dev->vpp_off,
1501 ((framePtr->VPP_hsc_startp & VPP_VD_SIZE_MASK)
1502 << VPP_VD1_START_BIT) |
1503 ((framePtr->VPP_hsc_endp & VPP_VD_SIZE_MASK)
1504 << VPP_VD1_END_BIT));
1505#ifdef VIDEO_PIP
1506 if (!cur_pipbuf)
1507#endif
1508 {
1509 VSYNC_WR_MPEG_REG(
1510 VPP_BLEND_VD2_H_START_END +
1511 cur_dev->vpp_off,
1512 ((framePtr->VPP_hd_start_lines_ &
1513 VPP_VD_SIZE_MASK)
1514 << VPP_VD1_START_BIT) |
1515 ((framePtr->VPP_hd_end_lines_ &
1516 VPP_VD_SIZE_MASK)
1517 << VPP_VD1_END_BIT));
1518 }
1519 }
1520
1521 VSYNC_WR_MPEG_REG(VPP_HSC_REGION12_STARTP +
1522 cur_dev->vpp_off,
1523 (0 << VPP_REGION1_BIT) |
1524 ((r1 & VPP_REGION_MASK) << VPP_REGION2_BIT));
1525
1526 VSYNC_WR_MPEG_REG(VPP_HSC_REGION34_STARTP + cur_dev->vpp_off,
1527 ((r2 & VPP_REGION_MASK) << VPP_REGION3_BIT) |
1528 ((r3 & VPP_REGION_MASK) << VPP_REGION4_BIT));
1529 VSYNC_WR_MPEG_REG(VPP_HSC_REGION4_ENDP + cur_dev->vpp_off, r3);
1530
1531 VSYNC_WR_MPEG_REG(VPP_HSC_START_PHASE_STEP + cur_dev->vpp_off,
1532 vpp_filter->vpp_hf_start_phase_step);
1533
1534 VSYNC_WR_MPEG_REG(VPP_HSC_REGION1_PHASE_SLOPE + cur_dev->vpp_off,
1535 vpp_filter->vpp_hf_start_phase_slope);
1536
1537 VSYNC_WR_MPEG_REG(VPP_HSC_REGION3_PHASE_SLOPE + cur_dev->vpp_off,
1538 vpp_filter->vpp_hf_end_phase_slope);
1539
1540 VSYNC_WR_MPEG_REG(VPP_LINE_IN_LENGTH + cur_dev->vpp_off,
1541 framePtr->VPP_line_in_length_);
1542}
1543
1544static void vd2_settings_h(struct vframe_s *vf)
1545{
1546 u32 VPP_hd_start_lines_;
1547 u32 VPP_hd_end_lines_;
1548
1549 if (vf) {
1550 VPP_hd_start_lines_ = 0;
1551 VPP_hd_end_lines_ = ((vf->type & VIDTYPE_COMPRESS) ?
1552 vf->compWidth : vf->width) - 1;
1553
1554 VSYNC_WR_MPEG_REG(
1555 VPP_BLEND_VD2_H_START_END +
1556 cur_dev->vpp_off,
1557 ((VPP_hd_start_lines_ &
1558 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1559 ((VPP_hd_end_lines_ &
1560 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1561 }
1562}
1563
1564static void vpp_settings_v(struct vpp_frame_par_s *framePtr)
1565{
1566 struct vppfilter_mode_s *vpp_filter = &framePtr->vpp_filter;
1567 u32 r, afbc_enble_flag;
1568 u32 y_lines;
1569 u32 v_phase;
1570 u32 v_skip_flag = 0;
1571 int x, y, w, h;
1572 struct disp_info_s *layer = &glayer_info[0];
1573
1574 r = framePtr->VPP_vsc_endp - framePtr->VPP_vsc_startp;
1575 afbc_enble_flag = 0;
1576 if (is_meson_gxbb_cpu())
1577 afbc_enble_flag = READ_VCBUS_REG(AFBC_ENABLE) & 0x100;
1578 if ((vpp_filter->vpp_vsc_start_phase_step > 0x1000000)
1579 && afbc_enble_flag)
1580 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
1581 cur_dev->vpp_off, ((framePtr->VPP_vsc_startp &
1582 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT)
1583 | (((framePtr->VPP_vsc_endp + 1) & VPP_VD_SIZE_MASK) <<
1584 VPP_VD1_END_BIT));
1585 else {
1586 afbc_enble_flag = READ_VCBUS_REG(AFBC_ENABLE) & 0x100;
1587 v_phase = vpp_filter->vpp_vsc_start_phase_step;
1588
1589 x = layer->layer_left;
1590 y = layer->layer_top;
1591 w = layer->layer_width;
1592 h = layer->layer_height;
1593 if (v_phase * (framePtr->vscale_skip_count + 1) > 0x1000000) {
1594 if ((afbc_enble_flag) && (y < 0)) {
1595 if ((framePtr->VPP_vsc_endp < 0x250) ||
1596 (framePtr->VPP_vsc_endp <
1597 framePtr->VPP_post_blend_vd_v_end_/2)) {
1598 if (framePtr->VPP_vsc_endp > 0x6)
1599 v_skip_flag = 1;
1600 }
1601 }
1602 }
1603 if (v_skip_flag == 1) {
1604 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
1605 cur_dev->vpp_off, ((framePtr->VPP_vsc_startp &
1606 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT)
1607 | (((framePtr->VPP_vsc_endp - 6) & VPP_VD_SIZE_MASK) <<
1608 VPP_VD1_END_BIT));
1609 } else {
1610 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
1611 cur_dev->vpp_off, ((framePtr->VPP_vsc_startp &
1612 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT)
1613 | ((framePtr->VPP_vsc_endp & VPP_VD_SIZE_MASK) <<
1614 VPP_VD1_END_BIT));
1615 }
1616 }
1617
1618 y_lines = zoom_end_y_lines / (framePtr->vscale_skip_count + 1);
1619 if (process_3d_type & MODE_3D_OUT_TB) {
1620 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END,
1621 ((zoom_start_y_lines & VPP_VD_SIZE_MASK) <<
1622 VPP_VD1_START_BIT) | (((y_lines >> 1) &
1623 VPP_VD_SIZE_MASK) <<
1624 VPP_VD1_END_BIT));
1625 VSYNC_WR_MPEG_REG(
1626 VPP_BLEND_VD2_V_START_END,
1627 ((((y_lines + 1) >> 1) & VPP_VD_SIZE_MASK) <<
1628 VPP_VD1_START_BIT) |
1629 ((y_lines & VPP_VD_SIZE_MASK) <<
1630 VPP_VD1_END_BIT));
1631 } else if (process_3d_type & MODE_3D_OUT_LR) {
1632 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END,
1633 ((zoom_start_y_lines & VPP_VD_SIZE_MASK) <<
1634 VPP_VD1_START_BIT) | ((zoom_end_y_lines &
1635 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1636 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_V_START_END,
1637 ((zoom_start_y_lines & VPP_VD_SIZE_MASK) <<
1638 VPP_VD1_START_BIT) | ((zoom_end_y_lines &
1639 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1640 } else {
1641 if ((framePtr->VPP_post_blend_vd_v_end_ -
1642 framePtr->VPP_post_blend_vd_v_start_ + 1) >
1643 VPP_PREBLEND_VD_V_END_LIMIT) {
1644 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
1645 cur_dev->vpp_off,
1646 ((framePtr->VPP_post_blend_vd_v_start_
1647 & VPP_VD_SIZE_MASK) <<
1648 VPP_VD1_START_BIT) |
1649 ((framePtr->VPP_post_blend_vd_v_end_ &
1650 VPP_VD_SIZE_MASK)
1651 << VPP_VD1_END_BIT));
1652 } else {
1653 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
1654 cur_dev->vpp_off,
1655 ((0 & VPP_VD_SIZE_MASK) <<
1656 VPP_VD1_START_BIT) |
1657 (((VPP_PREBLEND_VD_V_END_LIMIT - 1) &
1658 VPP_VD_SIZE_MASK) <<
1659 VPP_VD1_END_BIT));
1660 }
1661#ifdef VIDEO_PIP
1662 if (!cur_pipbuf)
1663#endif
1664 {
1665 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_V_START_END +
1666 cur_dev->vpp_off,
1667 ((((framePtr->VPP_vd_end_lines_ + 1) / 2) &
1668 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1669 (((framePtr->VPP_vd_end_lines_) &
1670 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1671 }
1672 if (is_need_framepacking_output()) {
1673 VSYNC_WR_MPEG_REG(
1674 VPP_BLEND_VD2_V_START_END +
1675 cur_dev->vpp_off,
1676 (((((framePtr->VPP_vd_end_lines_ -
1677 framepacking_blank + 1) / 2) + framepacking_blank) &
1678 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1679 (((framePtr->VPP_vd_end_lines_) &
1680 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1681 }
1682 }
1683 VSYNC_WR_MPEG_REG(VPP_VSC_REGION12_STARTP + cur_dev->vpp_off, 0);
1684 VSYNC_WR_MPEG_REG(VPP_VSC_REGION34_STARTP + cur_dev->vpp_off,
1685 ((r & VPP_REGION_MASK) << VPP_REGION3_BIT) |
1686 ((r & VPP_REGION_MASK) << VPP_REGION4_BIT));
1687
1688 if ((framePtr->supscl_path == CORE0_PPS_CORE1) ||
1689 (framePtr->supscl_path == CORE1_AFTER_PPS) ||
1690 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1691 r >>= framePtr->supsc1_vert_ratio;
1692 if ((framePtr->supscl_path == CORE0_AFTER_PPS) ||
1693 (framePtr->supscl_path == PPS_CORE0_CORE1) ||
1694 (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
1695 r >>= framePtr->supsc0_vert_ratio;
1696
1697 VSYNC_WR_MPEG_REG(VPP_VSC_REGION4_ENDP + cur_dev->vpp_off, r);
1698
1699 VSYNC_WR_MPEG_REG(VPP_VSC_START_PHASE_STEP + cur_dev->vpp_off,
1700 vpp_filter->vpp_vsc_start_phase_step);
1701}
1702
1703static void vd2_settings_v(struct vframe_s *vf)
1704{
1705 u32 VPP_vd_start_lines_;
1706 u32 VPP_vd_end_lines_;
1707
1708 if (vf) {
1709 VPP_vd_start_lines_ = 0;
1710 VPP_vd_end_lines_ = ((vf->type & VIDTYPE_COMPRESS) ?
1711 vf->compHeight : vf->height) - 1;
1712
1713 VSYNC_WR_MPEG_REG(VPP_BLEND_VD2_V_START_END +
1714 cur_dev->vpp_off,
1715 ((VPP_vd_start_lines_ &
1716 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
1717 (((VPP_vd_end_lines_) &
1718 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
1719 }
1720}
1721
1722#ifdef TV_3D_FUNCTION_OPEN
1723static void zoom_get_horz_pos(struct vframe_s *vf, u32 vpp_3d_mode, u32 *ls,
1724 u32 *le, u32 *rs, u32 *re)
1725{
1726 u32 crop_sx, crop_ex, crop_sy, crop_ey;
1727 int frame_width, frame_height;
1728 struct disp_info_s *layer = &glayer_info[0];
1729
1730 if (!vf)
1731 return;
1732
1733 crop_sy = layer->crop_top;
1734 crop_sx = layer->crop_left;
1735 crop_ey = layer->crop_bottom;
1736 crop_ex = layer->crop_right;
1737
1738 if (vf->type & VIDTYPE_COMPRESS) {
1739 frame_width = vf->compWidth;
1740 frame_height = vf->compHeight;
1741 } else {
1742 frame_width = vf->width;
1743 frame_height = vf->height;
1744 }
1745
1746 switch (vpp_3d_mode) {
1747 case VPP_3D_MODE_LR:
1748 /*half width,double height */
1749 *ls = zoom_start_x_lines;
1750 *le = zoom_end_x_lines;
1751 *rs = *ls + (frame_width >> 1);
1752 *re = *le + (frame_width >> 1);
1753 if (process_3d_type & MODE_3D_OUT_LR) {
1754 *ls = zoom_start_x_lines;
1755 *le = zoom_end_x_lines >> 1;
1756 *rs = *ls + (frame_width >> 1);
1757 *re = *le + (frame_width >> 1);
1758 }
1759 break;
1760 case VPP_3D_MODE_TB:
1761 case VPP_3D_MODE_LA:
1762 case VPP_3D_MODE_FA:
1763 default:
1764 if (vf->trans_fmt == TVIN_TFMT_3D_FP) {
1765 *ls = vf->left_eye.start_x + crop_sx;
1766 *le = vf->left_eye.start_x + vf->left_eye.width -
1767 crop_ex - 1;
1768 *rs = vf->right_eye.start_x + crop_sx;
1769 *re = vf->right_eye.start_x + vf->right_eye.width -
1770 crop_ex - 1;
1771 } else if (process_3d_type & MODE_3D_OUT_LR) {
1772 *ls = zoom_start_x_lines;
1773 *le = zoom_end_x_lines >> 1;
1774 *rs = *ls;
1775 *re = *le;
1776 /* *rs = *ls + (vf->width); */
1777 /* *re = *le + (vf->width); */
1778 } else {
1779 *ls = *rs = zoom_start_x_lines;
1780 *le = *re = zoom_end_x_lines;
1781 }
1782 break;
1783 }
1784}
1785
1786static void zoom_get_vert_pos(struct vframe_s *vf, u32 vpp_3d_mode, u32 *ls,
1787 u32 *le, u32 *rs, u32 *re)
1788{
1789 u32 crop_sx, crop_ex, crop_sy, crop_ey, height;
1790 int frame_width, frame_height;
1791 struct disp_info_s *layer = &glayer_info[0];
1792
1793 if (!vf)
1794 return;
1795
1796 crop_sy = layer->crop_top;
1797 crop_sx = layer->crop_left;
1798 crop_ey = layer->crop_bottom;
1799 crop_ex = layer->crop_right;
1800
1801 if (vf->type & VIDTYPE_COMPRESS) {
1802 frame_width = vf->compWidth;
1803 frame_height = vf->compHeight;
1804 } else {
1805 frame_width = vf->width;
1806 frame_height = vf->height;
1807 }
1808
1809 if (vf->type & VIDTYPE_INTERLACE)
1810 height = frame_height >> 1;
1811 else
1812 height = frame_height;
1813
1814 switch (vpp_3d_mode) {
1815 case VPP_3D_MODE_TB:
1816 if (vf->trans_fmt == TVIN_TFMT_3D_FP) {
1817 if (vf->type & VIDTYPE_INTERLACE) {
1818 /*if input is interlace vertical*/
1819 /*crop will be reduce by half */
1820 *ls =
1821 (vf->left_eye.start_y +
1822 (crop_sy >> 1)) >> 1;
1823 *le =
1824 ((vf->left_eye.start_y +
1825 vf->left_eye.height -
1826 (crop_ey >> 1)) >> 1) - 1;
1827 *rs =
1828 (vf->right_eye.start_y +
1829 (crop_sy >> 1)) >> 1;
1830 *re =
1831 ((vf->right_eye.start_y +
1832 vf->left_eye.height -
1833 (crop_ey >> 1)) >> 1) - 1;
1834 } else {
1835 *ls = vf->left_eye.start_y + (crop_sy >> 1);
1836 *le = vf->left_eye.start_y +
1837 vf->left_eye.height -
1838 (crop_ey >> 1) - 1;
1839 *rs = vf->right_eye.start_y + (crop_sy >> 1);
1840 *re =
1841 vf->right_eye.start_y +
1842 vf->left_eye.height - (crop_ey >> 1) - 1;
1843 }
1844 } else {
1845 if ((vf->type & VIDTYPE_VIU_FIELD)
1846 && (vf->type & VIDTYPE_INTERLACE)) {
1847 *ls = zoom_start_y_lines >> 1;
1848 *le = zoom_end_y_lines >> 1;
1849 *rs = *ls + (height >> 1);
1850 *re = *le + (height >> 1);
1851
1852 } else if (vf->type & VIDTYPE_INTERLACE) {
1853 *ls = zoom_start_y_lines >> 1;
1854 *le = zoom_end_y_lines >> 1;
1855 *rs = *ls + height;
1856 *re = *le + height;
1857
1858 } else {
1859 /* same width,same height */
1860 *ls = zoom_start_y_lines >> 1;
1861 *le = zoom_end_y_lines >> 1;
1862 *rs = *ls + (height >> 1);
1863 *re = *le + (height >> 1);
1864 }
1865 if ((process_3d_type & MODE_3D_TO_2D_MASK)
1866 || (process_3d_type & MODE_3D_OUT_LR)) {
1867 /* same width,half height */
1868 *ls = zoom_start_y_lines;
1869 *le = zoom_end_y_lines;
1870 *rs = zoom_start_y_lines + (height >> 1);
1871 *re = zoom_end_y_lines + (height >> 1);
1872 }
1873 }
1874 break;
1875 case VPP_3D_MODE_LR:
1876 /* half width,double height */
1877 *ls = *rs = zoom_start_y_lines >> 1;
1878 *le = *re = zoom_end_y_lines >> 1;
1879 if ((process_3d_type & MODE_3D_TO_2D_MASK)
1880 || (process_3d_type & MODE_3D_OUT_LR)) {
1881 /*half width ,same height */
1882 *ls = *rs = zoom_start_y_lines;
1883 *le = *re = zoom_end_y_lines;
1884 }
1885 break;
1886 case VPP_3D_MODE_FA:
1887 /*same width same heiht */
1888 if ((process_3d_type & MODE_3D_TO_2D_MASK)
1889 || (process_3d_type & MODE_3D_OUT_LR)) {
1890 *ls = *rs = zoom_start_y_lines;
1891 *le = *re = zoom_end_y_lines;
1892 } else {
1893 *ls = *rs = (zoom_start_y_lines + crop_sy) >> 1;
1894 *le = *re = (zoom_end_y_lines + crop_ey) >> 1;
1895 }
1896 break;
1897 case VPP_3D_MODE_LA:
1898 *ls = *rs = zoom_start_y_lines;
1899 if ((process_3d_type & MODE_3D_LR_SWITCH)
1900 || (process_3d_type & MODE_3D_TO_2D_R))
1901 *ls = *rs = zoom_start_y_lines + 1;
1902 if (process_3d_type & MODE_3D_TO_2D_L)
1903 *ls = *rs = zoom_start_y_lines;
1904 *le = *re = zoom_end_y_lines;
1905 if ((process_3d_type & MODE_3D_OUT_FA_MASK)
1906 || (process_3d_type & MODE_3D_OUT_TB)
1907 || (process_3d_type & MODE_3D_OUT_LR)) {
1908 *rs = zoom_start_y_lines + 1;
1909 *ls = zoom_start_y_lines;
1910 /* *le = zoom_end_y_lines; */
1911 /* *re = zoom_end_y_lines; */
1912 }
1913 break;
1914 default:
1915 *ls = *rs = zoom_start_y_lines;
1916 *le = *re = zoom_end_y_lines;
1917 break;
1918 }
1919}
1920
1921#endif
1922static void zoom_display_horz(struct vframe_s *vf, int hscale)
1923{
1924 u32 ls = 0, le = 0, rs = 0, re = 0;
1925#ifdef TV_REVERSE
1926 int content_w, content_l, content_r;
1927#endif
1928#ifdef TV_3D_FUNCTION_OPEN
1929 if (process_3d_type & MODE_3D_ENABLE) {
1930 zoom_get_horz_pos(vf, cur_frame_par->vpp_3d_mode, &ls,
1931 &le, &rs, &re);
1932 } else {
1933 ls = rs = zoom_start_x_lines;
1934 le = re = zoom_end_x_lines;
1935 }
1936#else
1937 ls = rs = zoom_start_x_lines;
1938 le = re = zoom_end_x_lines;
1939#endif
1940 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_X0 + cur_dev->viu_off,
1941 (ls << VDIF_PIC_START_BIT) |
1942 (le << VDIF_PIC_END_BIT));
1943
1944 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_X0 + cur_dev->viu_off,
1945 (ls / 2 << VDIF_PIC_START_BIT) |
1946 (le / 2 << VDIF_PIC_END_BIT));
1947
1948 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_X1 + cur_dev->viu_off,
1949 (rs << VDIF_PIC_START_BIT) |
1950 (re << VDIF_PIC_END_BIT));
1951
1952 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_X1 + cur_dev->viu_off,
1953 (rs / 2 << VDIF_PIC_START_BIT) |
1954 (re / 2 << VDIF_PIC_END_BIT));
1955
1956 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_W + cur_dev->viu_off,
1957 (((zoom_end_x_lines - zoom_start_x_lines +
1958 1) >> hscale) << VD1_FMT_LUMA_WIDTH_BIT) |
1959 (((zoom_end_x_lines / 2 - zoom_start_x_lines / 2 +
1960 1) >> hscale) << VD1_FMT_CHROMA_WIDTH_BIT));
1961
1962 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
1963 int l_aligned;
1964 int r_aligned;
1965 int h_skip = cur_frame_par->hscale_skip_count + 1;
1966 int c_skip = 2;
1967
1968 /* After TL1, afbc supports 420/422/444*/
1969 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
1970 if (vf && (vf->type & VIDTYPE_VIU_444))
1971 c_skip = 1;
1972
1973 if ((zoom_start_x_lines > 0) ||
1974 (zoom_end_x_lines < ori_end_x_lines)) {
1975 l_aligned = round_down(ori_start_x_lines, 32);
1976 r_aligned = round_up(ori_end_x_lines + 1, 32);
1977 } else {
1978 l_aligned = round_down(zoom_start_x_lines, 32);
1979 r_aligned = round_up(zoom_end_x_lines + 1, 32);
1980 }
1981 VSYNC_WR_MPEG_REG(AFBC_VD_CFMT_W,
1982 (((r_aligned - l_aligned) / h_skip) << 16) |
1983 ((r_aligned / c_skip - l_aligned / c_skip) / h_skip));
1984
1985 VSYNC_WR_MPEG_REG(AFBC_MIF_HOR_SCOPE,
1986 ((l_aligned / 32) << 16) |
1987 ((r_aligned / 32) - 1));
1988
1989 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
1990 VSYNC_WR_MPEG_REG(AFBC_SIZE_OUT,
1991 (VSYNC_RD_MPEG_REG(AFBC_SIZE_OUT)
1992 & 0xffff) |
1993 (((r_aligned - l_aligned) / h_skip) << 16));
1994 }
1995#ifdef TV_REVERSE
1996 if (reverse) {
1997 content_w = zoom_end_x_lines - zoom_start_x_lines + 1;
1998 content_l = (r_aligned - zoom_end_x_lines - 1);
1999 content_r = content_l + content_w - 1;
2000 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
2001 (((content_l << 16)) | content_r) / h_skip);
2002 } else
2003#endif
2004 {
2005 if (((process_3d_type & MODE_3D_FA)
2006 || (process_3d_type & MODE_FORCE_3D_FA_LR))
2007 && (cur_frame_par->vpp_3d_mode == 1)) {
2008 /* do nothing*/
2009 } else {
2010 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
2011 (((zoom_start_x_lines - l_aligned) << 16) |
2012 (zoom_end_x_lines - l_aligned)) / h_skip);
2013 }
2014 }
2015 VSYNC_WR_MPEG_REG(AFBC_SIZE_IN,
2016 (VSYNC_RD_MPEG_REG(AFBC_SIZE_IN) & 0xffff) |
2017 ((r_aligned - l_aligned) << 16));
2018 }
2019
2020#ifdef VIDEO_PIP
2021 if (!cur_pipbuf)
2022#endif
2023 {
2024 VSYNC_WR_MPEG_REG(
2025 VD2_IF0_LUMA_X0 + cur_dev->viu_off,
2026 (ls << VDIF_PIC_START_BIT) |
2027 (le << VDIF_PIC_END_BIT));
2028
2029 VSYNC_WR_MPEG_REG(
2030 VD2_IF0_CHROMA_X0 + cur_dev->viu_off,
2031 (ls / 2 << VDIF_PIC_START_BIT) |
2032 (le / 2 << VDIF_PIC_END_BIT));
2033
2034 VSYNC_WR_MPEG_REG(
2035 VD2_IF0_LUMA_X1 + cur_dev->viu_off,
2036 (rs << VDIF_PIC_START_BIT) |
2037 (re << VDIF_PIC_END_BIT));
2038
2039 VSYNC_WR_MPEG_REG(
2040 VD2_IF0_CHROMA_X1 + cur_dev->viu_off,
2041 (rs / 2 << VDIF_PIC_START_BIT) |
2042 (re / 2 << VDIF_PIC_END_BIT));
2043
2044 VSYNC_WR_MPEG_REG(
2045 VIU_VD2_FMT_W + cur_dev->viu_off,
2046 (((zoom_end_x_lines - zoom_start_x_lines +
2047 1) >> hscale) << VD1_FMT_LUMA_WIDTH_BIT) |
2048 (((zoom_end_x_lines / 2 - zoom_start_x_lines / 2 +
2049 1) >> hscale) << VD1_FMT_CHROMA_WIDTH_BIT));
2050 }
2051}
2052
2053static void vd2_zoom_display_horz(struct vframe_s *vf, int hscale)
2054{
2055 u32 ls, le, rs, re;
2056#ifdef TV_REVERSE
2057 int content_w, content_l, content_r;
2058#endif
2059 ls = rs = zoom2_start_x_lines;
2060 le = re = zoom2_end_x_lines;
2061
2062 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
2063 int l_aligned;
2064 int r_aligned;
2065 int h_skip = hscale + 1;
2066 int c_skip = 2;
2067
2068 /* After TL1, afbc supports 420/422/444*/
2069 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2070 if (vf && (vf->type & VIDTYPE_VIU_444))
2071 c_skip = 1;
2072
2073 if ((zoom2_start_x_lines > 0) ||
2074 (zoom2_end_x_lines < ori2_end_x_lines)) {
2075 l_aligned = round_down(ori2_start_x_lines, 32);
2076 r_aligned = round_up(ori2_end_x_lines + 1, 32);
2077 } else {
2078 l_aligned = round_down(zoom2_start_x_lines, 32);
2079 r_aligned = round_up(zoom2_end_x_lines + 1, 32);
2080 }
2081 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_W,
2082 (((r_aligned - l_aligned) / h_skip) << 16) |
2083 ((r_aligned / c_skip - l_aligned / c_skip) / h_skip));
2084
2085 VSYNC_WR_MPEG_REG(VD2_AFBC_MIF_HOR_SCOPE,
2086 ((l_aligned / 32) << 16) |
2087 ((r_aligned / 32) - 1));
2088 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
2089 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_OUT,
2090 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_OUT)
2091 & 0xffff) |
2092 (((r_aligned - l_aligned) / h_skip) << 16));
2093 }
2094#ifdef TV_REVERSE
2095 if (reverse) {
2096 content_w = zoom2_end_x_lines - zoom2_start_x_lines + 1;
2097 content_l = (r_aligned - zoom2_end_x_lines - 1) +
2098 (zoom2_start_x_lines - l_aligned);
2099 content_r = content_l + content_w - 1;
2100 VSYNC_WR_MPEG_REG(VD2_AFBC_PIXEL_HOR_SCOPE,
2101 (content_l << 16) | content_r);
2102 } else
2103#endif
2104 {
2105 VSYNC_WR_MPEG_REG(VD2_AFBC_PIXEL_HOR_SCOPE,
2106 ((zoom2_start_x_lines - l_aligned) << 16) |
2107 (zoom2_end_x_lines - l_aligned));
2108 }
2109 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_IN,
2110 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_IN) & 0xffff) |
2111 ((r_aligned - l_aligned) << 16));
2112 }
2113
2114 VSYNC_WR_MPEG_REG(
2115 VD2_IF0_LUMA_X0 + cur_dev->viu_off,
2116 (ls << VDIF_PIC_START_BIT) |
2117 (le << VDIF_PIC_END_BIT));
2118
2119 VSYNC_WR_MPEG_REG(
2120 VD2_IF0_CHROMA_X0 + cur_dev->viu_off,
2121 (ls / 2 << VDIF_PIC_START_BIT) |
2122 (le / 2 << VDIF_PIC_END_BIT));
2123
2124 VSYNC_WR_MPEG_REG(
2125 VD2_IF0_LUMA_X1 + cur_dev->viu_off,
2126 (rs << VDIF_PIC_START_BIT) |
2127 (re << VDIF_PIC_END_BIT));
2128
2129 VSYNC_WR_MPEG_REG(
2130 VD2_IF0_CHROMA_X1 + cur_dev->viu_off,
2131 (rs / 2 << VDIF_PIC_START_BIT) |
2132 (re / 2 << VDIF_PIC_END_BIT));
2133
2134 VSYNC_WR_MPEG_REG(
2135 VIU_VD2_FMT_W + cur_dev->viu_off,
2136 (((le - ls + 1) >> hscale)
2137 << VD1_FMT_LUMA_WIDTH_BIT) |
2138 (((le / 2 - ls / 2 + 1) >> hscale)
2139 << VD1_FMT_CHROMA_WIDTH_BIT));
2140}
2141
2142static void zoom_display_vert(struct vframe_s *vf)
2143{
2144
2145 u32 ls = 0, le = 0, rs = 0, re = 0;
2146
2147 if (process_3d_type & MODE_3D_ENABLE) {
2148 zoom_get_vert_pos(vf,
2149 cur_frame_par->vpp_3d_mode, &ls,
2150 &le, &rs, &re);
2151 } else {
2152 ls = rs = zoom_start_y_lines;
2153 le = re = zoom_end_y_lines;
2154 }
2155
2156 if ((vf) && (vf->type & VIDTYPE_MVC)) {
2157 if (is_need_framepacking_output()) {
2158 VSYNC_WR_MPEG_REG(
2159 VD1_IF0_LUMA_Y0 + cur_dev->viu_off,
2160 (ls << VDIF_PIC_START_BIT) |
2161 (le << VDIF_PIC_END_BIT));
2162
2163 VSYNC_WR_MPEG_REG(
2164 VD1_IF0_CHROMA_Y0 + cur_dev->viu_off,
2165 ((ls / 2) << VDIF_PIC_START_BIT) |
2166 ((le / 2) << VDIF_PIC_END_BIT));
2167
2168 VSYNC_WR_MPEG_REG(
2169 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2170 (rs << VDIF_PIC_START_BIT) |
2171 (re << VDIF_PIC_END_BIT));
2172
2173 VSYNC_WR_MPEG_REG(
2174 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2175 ((rs / 2) << VDIF_PIC_START_BIT) |
2176 ((re / 2) << VDIF_PIC_END_BIT));
2177 } else {
2178 VSYNC_WR_MPEG_REG(
2179 VD1_IF0_LUMA_Y0 + cur_dev->viu_off,
2180 (ls * 2 << VDIF_PIC_START_BIT) |
2181 ((le * 2 - 1) << VDIF_PIC_END_BIT));
2182
2183 VSYNC_WR_MPEG_REG(
2184 VD1_IF0_CHROMA_Y0 + cur_dev->viu_off,
2185 ((ls) << VDIF_PIC_START_BIT) |
2186 ((le - 1) << VDIF_PIC_END_BIT));
2187
2188 VSYNC_WR_MPEG_REG(
2189 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2190 (ls * 2 << VDIF_PIC_START_BIT) |
2191 ((le * 2 - 1) << VDIF_PIC_END_BIT));
2192
2193 VSYNC_WR_MPEG_REG(
2194 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2195 ((ls) << VDIF_PIC_START_BIT) |
2196 ((le - 1) << VDIF_PIC_END_BIT));
2197 }
2198 } else {
2199 VSYNC_WR_MPEG_REG(
2200 VD1_IF0_LUMA_Y0 + cur_dev->viu_off,
2201 (ls << VDIF_PIC_START_BIT) |
2202 (le << VDIF_PIC_END_BIT));
2203
2204 VSYNC_WR_MPEG_REG(
2205 VD1_IF0_CHROMA_Y0 + cur_dev->viu_off,
2206 ((ls / 2) << VDIF_PIC_START_BIT) |
2207 ((le / 2) << VDIF_PIC_END_BIT));
2208
2209 VSYNC_WR_MPEG_REG(
2210 VD1_IF0_LUMA_Y1 + cur_dev->viu_off,
2211 (rs << VDIF_PIC_START_BIT) |
2212 (re << VDIF_PIC_END_BIT));
2213
2214 VSYNC_WR_MPEG_REG(
2215 VD1_IF0_CHROMA_Y1 + cur_dev->viu_off,
2216 ((rs / 2) << VDIF_PIC_START_BIT) |
2217 ((re / 2) << VDIF_PIC_END_BIT));
2218
2219#ifdef VIDEO_PIP
2220 if (!cur_pipbuf)
2221#endif
2222 {
2223 VSYNC_WR_MPEG_REG(
2224 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2225 (ls << VDIF_PIC_START_BIT) |
2226 (le << VDIF_PIC_END_BIT));
2227
2228 VSYNC_WR_MPEG_REG(
2229 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2230 ((ls / 2) << VDIF_PIC_START_BIT) |
2231 ((le / 2) << VDIF_PIC_END_BIT));
2232
2233 VSYNC_WR_MPEG_REG(
2234 VD2_IF0_LUMA_Y1 + cur_dev->viu_off,
2235 (rs << VDIF_PIC_START_BIT) |
2236 (re << VDIF_PIC_END_BIT));
2237
2238 VSYNC_WR_MPEG_REG(
2239 VD2_IF0_CHROMA_Y1 + cur_dev->viu_off,
2240 ((rs / 2) << VDIF_PIC_START_BIT) |
2241 ((re / 2) << VDIF_PIC_END_BIT));
2242 }
2243 }
2244
2245 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
2246 int t_aligned;
2247 int b_aligned;
2248 int ori_t_aligned;
2249 int ori_b_aligned;
2250 int v_skip = cur_frame_par->vscale_skip_count + 1;
2251 int c_skip = 2;
2252
2253 /* After TL1, afbc supports 420/422/444*/
2254 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2255 if (vf && ((vf->type & VIDTYPE_VIU_444)
2256 || (vf->type & VIDTYPE_VIU_422)))
2257 c_skip = 1;
2258
2259 t_aligned = round_down(zoom_start_y_lines, 4);
2260 b_aligned = round_up(zoom_end_y_lines + 1, 4);
2261
2262 ori_t_aligned = round_down(ori_start_y_lines, 4);
2263 ori_b_aligned = round_up(ori_end_y_lines + 1, 4);
2264 VSYNC_WR_MPEG_REG(AFBC_VD_CFMT_H,
2265 (b_aligned - t_aligned) / c_skip / v_skip);
2266
2267 if (((process_3d_type & MODE_3D_FA)
2268 || (process_3d_type & MODE_FORCE_3D_FA_TB))
2269 && (cur_frame_par->vpp_3d_mode == 2)) {
2270 int block_h;
2271
2272 block_h = ori_b_aligned - ori_t_aligned;
2273 block_h = block_h / 8;
2274 if (toggle_3d_fa_frame == OUT_FA_B_FRAME) {
2275 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
2276 (((ori_t_aligned / 4) + block_h) << 16) |
2277 ((ori_b_aligned / 4) - 1));
2278 } else {
2279 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
2280 ((ori_t_aligned / 4) << 16) |
2281 ((ori_t_aligned / 4) + block_h - 1));
2282 }
2283 } else {
2284 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
2285 ((t_aligned / 4) << 16) |
2286 ((b_aligned / 4) - 1));
2287 }
2288 VSYNC_WR_MPEG_REG(AFBC_PIXEL_VER_SCOPE,
2289 ((zoom_start_y_lines - t_aligned) << 16) |
2290 (zoom_end_y_lines - t_aligned));
2291 /* afbc pixel vertical output region must be
2292 * [0, zoom_end_y_lines - zoom_start_y_lines]
2293 */
2294 VSYNC_WR_MPEG_REG(AFBC_PIXEL_VER_SCOPE,
2295 (zoom_end_y_lines - zoom_start_y_lines));
2296
2297 VSYNC_WR_MPEG_REG(AFBC_SIZE_IN,
2298 (VSYNC_RD_MPEG_REG(AFBC_SIZE_IN)
2299 & 0xffff0000) |
2300 (ori_b_aligned - ori_t_aligned));
2301 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
2302 VSYNC_WR_MPEG_REG(AFBC_SIZE_OUT,
2303 (VSYNC_RD_MPEG_REG(AFBC_SIZE_OUT) &
2304 0xffff0000) |
2305 ((b_aligned - t_aligned) / v_skip));
2306 }
2307 }
2308}
2309
2310static void vd2_zoom_display_vert(struct vframe_s *vf, int vscale)
2311{
2312
2313 u32 ls, le, rs, re;
2314
2315 ls = rs = zoom2_start_y_lines;
2316 le = re = zoom2_end_y_lines;
2317
2318 /* vd2 */
2319 VSYNC_WR_MPEG_REG(
2320 VD2_IF0_LUMA_Y0 + cur_dev->viu_off,
2321 (ls << VDIF_PIC_START_BIT) |
2322 (le << VDIF_PIC_END_BIT));
2323
2324 VSYNC_WR_MPEG_REG(
2325 VD2_IF0_CHROMA_Y0 + cur_dev->viu_off,
2326 ((ls / 2) << VDIF_PIC_START_BIT) |
2327 ((le / 2) << VDIF_PIC_END_BIT));
2328
2329 VSYNC_WR_MPEG_REG(
2330 VD2_IF0_LUMA_Y1 + cur_dev->viu_off,
2331 (rs << VDIF_PIC_START_BIT) |
2332 (re << VDIF_PIC_END_BIT));
2333
2334 VSYNC_WR_MPEG_REG(
2335 VD2_IF0_CHROMA_Y1 + cur_dev->viu_off,
2336 ((rs / 2) << VDIF_PIC_START_BIT) |
2337 ((re / 2) << VDIF_PIC_END_BIT));
2338
2339 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
2340 int t_aligned;
2341 int b_aligned;
2342 int ori_t_aligned;
2343 int ori_b_aligned;
2344 int v_skip = vscale + 1;
2345 int c_skip = 2;
2346
2347 /* After TL1, afbc supports 420/422/444*/
2348 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2349 if (vf && ((vf->type & VIDTYPE_VIU_444)
2350 || (vf->type & VIDTYPE_VIU_422)))
2351 c_skip = 1;
2352
2353 t_aligned = round_down(zoom2_start_y_lines, 4);
2354 b_aligned = round_up(zoom2_end_y_lines + 1, 4);
2355
2356 ori_t_aligned = round_down(ori2_start_y_lines, 4);
2357 ori_b_aligned = round_up(ori2_end_y_lines + 1, 4);
2358
2359 /* TODO: afbc setting only support 420 for now */
2360 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_H,
2361 (b_aligned - t_aligned) / c_skip / v_skip);
2362
2363 VSYNC_WR_MPEG_REG(VD2_AFBC_MIF_VER_SCOPE,
2364 ((t_aligned / 4) << 16) |
2365 ((b_aligned / 4) - 1));
2366
2367 VSYNC_WR_MPEG_REG(VD2_AFBC_PIXEL_VER_SCOPE,
2368 ((zoom2_start_y_lines - t_aligned) << 16) |
2369 (zoom2_end_y_lines - t_aligned));
2370
2371 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_IN,
2372 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_IN)
2373 & 0xffff0000) |
2374 (ori_b_aligned - ori_t_aligned));
2375 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) {
2376 VSYNC_WR_MPEG_REG(VD2_AFBC_SIZE_OUT,
2377 (VSYNC_RD_MPEG_REG(VD2_AFBC_SIZE_OUT)
2378 & 0xffff0000) |
2379 ((b_aligned - t_aligned) / v_skip));
2380 }
2381 }
2382}
2383
2384#ifdef TV_3D_FUNCTION_OPEN
2385/* judge the out mode is 240:LBRBLRBR or 120:LRLRLR */
2386static void judge_3d_fa_out_mode(void)
2387{
2388 if ((process_3d_type & MODE_3D_OUT_FA_MASK)
2389 && pause_one_3d_fl_frame == 2)
2390 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2391 else if ((process_3d_type & MODE_3D_OUT_FA_MASK)
2392 && pause_one_3d_fl_frame == 1)
2393 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2394 else if ((process_3d_type & MODE_3D_OUT_FA_MASK)
2395 && pause_one_3d_fl_frame == 0) {
2396 /* toggle_3d_fa_frame determine*/
2397 /*the out frame is L or R or blank */
2398 if ((process_3d_type & MODE_3D_OUT_FA_L_FIRST)) {
2399 if ((vsync_count % 2) == 0)
2400 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2401 else
2402 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2403 } else if ((process_3d_type & MODE_3D_OUT_FA_R_FIRST)) {
2404 if ((vsync_count % 2) == 0)
2405 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2406 else
2407 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2408 } else if ((process_3d_type & MODE_3D_OUT_FA_LB_FIRST)) {
2409 if ((vsync_count % 4) == 0)
2410 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2411 else if ((vsync_count % 4) == 2)
2412 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2413 else
2414 toggle_3d_fa_frame = OUT_FA_BANK_FRAME;
2415 } else if ((process_3d_type & MODE_3D_OUT_FA_RB_FIRST)) {
2416 if ((vsync_count % 4) == 0)
2417 toggle_3d_fa_frame = OUT_FA_B_FRAME;
2418 else if ((vsync_count % 4) == 2)
2419 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2420 else
2421 toggle_3d_fa_frame = OUT_FA_BANK_FRAME;
2422 }
2423 } else
2424 toggle_3d_fa_frame = OUT_FA_A_FRAME;
2425}
2426
2427#endif
2428
2429static void vframe_canvas_set(struct canvas_config_s *config, u32 planes,
2430 u32 *index)
2431{
2432 int i;
2433 u32 *canvas_index = index;
2434
2435 struct canvas_config_s *cfg = config;
2436
2437 for (i = 0; i < planes; i++, canvas_index++, cfg++)
2438 canvas_config_config(*canvas_index, cfg);
2439}
2440
2441#ifdef PTS_LOGGING
2442static void log_vsync_video_pattern(int pattern)
2443{
2444 int factor1 = 0, factor2 = 0, pattern_range = 0;
2445
2446 if (pattern >= PTS_MAX_NUM_PATTERNS)
2447 return;
2448
2449 if (pattern == PTS_32_PATTERN) {
2450 factor1 = 3;
2451 factor2 = 2;
2452 pattern_range = PTS_32_PATTERN_DETECT_RANGE;
2453 } else if (pattern == PTS_22_PATTERN) {
2454 factor1 = 2;
2455 factor2 = 2;
2456 pattern_range = PTS_22_PATTERN_DETECT_RANGE;
2457 } else if (pattern == PTS_41_PATTERN) {
2458 /* update 2111 mode detection */
2459 if (pts_trace == 2) {
2460 if ((pts_41_pattern_sink[1] == 1) &&
2461 (pts_41_pattern_sink[2] == 1) &&
2462 (pts_41_pattern_sink[3] == 1) &&
2463 (pts_pattern[PTS_41_PATTERN] <
2464 PTS_41_PATTERN_DETECT_RANGE)) {
2465 pts_pattern[PTS_41_PATTERN]++;
2466 if (pts_pattern[PTS_41_PATTERN] ==
2467 PTS_41_PATTERN_DETECT_RANGE) {
2468 pts_pattern_enter_cnt[PTS_41_PATTERN]++;
2469 pts_pattern_detected = pattern;
2470 if (pts_log_enable[PTS_41_PATTERN])
2471 pr_info("video 4:1 mode detected\n");
2472 }
2473 }
2474 pts_41_pattern_sink[0] = 2;
2475 pts_41_pattern_sink_index = 1;
2476 } else if (pts_trace == 1) {
2477 if ((pts_41_pattern_sink_index <
2478 PTS_41_PATTERN_SINK_MAX) &&
2479 (pts_41_pattern_sink_index > 0)) {
2480 pts_41_pattern_sink[pts_41_pattern_sink_index]
2481 = 1;
2482 pts_41_pattern_sink_index++;
2483 } else if (pts_pattern[PTS_41_PATTERN] ==
2484 PTS_41_PATTERN_DETECT_RANGE) {
2485 pts_pattern[PTS_41_PATTERN] = 0;
2486 pts_41_pattern_sink_index = 0;
2487 pts_pattern_exit_cnt[PTS_41_PATTERN]++;
2488 memset(&pts_41_pattern_sink[0], 0,
2489 PTS_41_PATTERN_SINK_MAX);
2490 if (pts_log_enable[PTS_41_PATTERN])
2491 pr_info("video 4:1 mode broken\n");
2492 } else {
2493 pts_pattern[PTS_41_PATTERN] = 0;
2494 pts_41_pattern_sink_index = 0;
2495 memset(&pts_41_pattern_sink[0], 0,
2496 PTS_41_PATTERN_SINK_MAX);
2497 }
2498 } else if (pts_pattern[PTS_41_PATTERN] ==
2499 PTS_41_PATTERN_DETECT_RANGE) {
2500 pts_pattern[PTS_41_PATTERN] = 0;
2501 pts_41_pattern_sink_index = 0;
2502 memset(&pts_41_pattern_sink[0], 0,
2503 PTS_41_PATTERN_SINK_MAX);
2504 pts_pattern_exit_cnt[PTS_41_PATTERN]++;
2505 if (pts_log_enable[PTS_41_PATTERN])
2506 pr_info("video 4:1 mode broken\n");
2507 } else {
2508 pts_pattern[PTS_41_PATTERN] = 0;
2509 pts_41_pattern_sink_index = 0;
2510 memset(&pts_41_pattern_sink[0], 0,
2511 PTS_41_PATTERN_SINK_MAX);
2512 }
2513 return;
2514 }
2515
2516
2517 /* update 3:2 or 2:2 mode detection */
2518 if (((pre_pts_trace == factor1) && (pts_trace == factor2)) ||
2519 ((pre_pts_trace == factor2) && (pts_trace == factor1))) {
2520 if (pts_pattern[pattern] < pattern_range) {
2521 pts_pattern[pattern]++;
2522 if (pts_pattern[pattern] == pattern_range) {
2523 pts_pattern_enter_cnt[pattern]++;
2524 pts_pattern_detected = pattern;
2525 if (pts_log_enable[pattern])
2526 pr_info("video %d:%d mode detected\n",
2527 factor1, factor2);
2528 }
2529 }
2530 } else if (pts_pattern[pattern] == pattern_range) {
2531 pts_pattern[pattern] = 0;
2532 pts_pattern_exit_cnt[pattern]++;
2533 if (pts_log_enable[pattern])
2534 pr_info("video %d:%d mode broken\n", factor1, factor2);
2535 } else
2536 pts_pattern[pattern] = 0;
2537}
2538
2539static void vsync_video_pattern(void)
2540{
2541 /* Check for 3:2*/
2542 log_vsync_video_pattern(PTS_32_PATTERN);
2543 /* Check for 2:2*/
2544 log_vsync_video_pattern(PTS_22_PATTERN);
2545 /* Check for 4:1*/
2546 log_vsync_video_pattern(PTS_41_PATTERN);
2547}
2548#endif
2549
2550static inline void vd1_path_select(bool afbc)
2551{
2552 u32 misc_off = cur_dev->vpp_off;
2553
2554 if (!legacy_vpp) {
2555 VSYNC_WR_MPEG_REG_BITS(
2556 VD1_AFBCD0_MISC_CTRL,
2557 /* go field sel */
2558 (0 << 20) |
2559 /* linebuffer en */
2560 (0 << 16) |
2561 /* vd1 -> dolby -> vpp top */
2562 (0 << 14) |
2563 /* axi sel: vd1 mif or afbc */
2564 ((afbc ? 1 : 0) << 12) |
2565 /* data sel: vd1 & afbc0 (not osd4) */
2566 (0 << 11) |
2567 /* data sel: afbc0 or vd1 */
2568 ((afbc ? 1 : 0) << 10) |
2569 /* afbc0 to vd1 (not di) */
2570 (0 << 9) |
2571 /* vd1 mif to vpp (not di) */
2572 (0 << 8) |
2573 /* afbc0 gclk ctrl */
2574 (0 << 0),
2575 0, 22);
2576 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2577 VSYNC_WR_MPEG_REG_BITS(
2578 VD1_AFBCD0_MISC_CTRL,
2579 /* Vd1_afbc0_mem_sel */
2580 (afbc ? 1 : 0),
2581 22, 1);
2582
2583#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
2584 if (!cpu_after_eq(MESON_CPU_MAJOR_ID_G12A))
2585 return;
2586 if ((DI_POST_REG_RD(DI_POST_CTRL) & 0x100) != 0) {
2587 /* check di_vpp_out_en bit */
2588 VSYNC_WR_MPEG_REG_BITS(
2589 VD1_AFBCD0_MISC_CTRL,
2590 /* vd1 mif to di */
2591 1,
2592 8, 2);
2593 VSYNC_WR_MPEG_REG_BITS(
2594 VD1_AFBCD0_MISC_CTRL,
2595 /* go field select di post */
2596 1,
2597 20, 2);
2598 }
2599#endif
2600 } else {
2601#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
2602 if ((DI_POST_REG_RD(DI_POST_CTRL) & 0x100) == 0)
2603 /* mif sel */
2604#endif
2605 VSYNC_WR_MPEG_REG_BITS(
2606 VIU_MISC_CTRL0 + misc_off,
2607 0, 16, 3);
2608 VSYNC_WR_MPEG_REG_BITS(
2609 VIU_MISC_CTRL0 + misc_off,
2610 (afbc ? 1 : 0), 20, 1);
2611 }
2612}
2613
2614static inline void vd2_path_select(bool afbc)
2615{
2616 u32 misc_off = cur_dev->vpp_off;
2617
2618 if (!legacy_vpp) {
2619 VSYNC_WR_MPEG_REG_BITS(
2620 VD2_AFBCD1_MISC_CTRL,
2621 /* go field sel */
2622 (0 << 20) |
2623 /* linebuffer en */
2624 (0 << 16) |
2625 /* TODO: vd2 -> dolby -> vpp top ?? */
2626 (0 << 14) |
2627 /* axi sel: vd2 mif */
2628 ((afbc ? 1 : 0) << 12) |
2629 /* data sel: vd2 & afbc1 (not osd4) */
2630 (0 << 11) |
2631 /* data sel: afbc1 */
2632 ((afbc ? 1 : 0) << 10) |
2633 /* afbc1 to vd2 (not di) */
2634 (0 << 9) |
2635 /* vd2 mif to vpp (not di) */
2636 (0 << 8) |
2637 /* afbc1 gclk ctrl */
2638 (0 << 0),
2639 0, 22);
2640 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1))
2641 VSYNC_WR_MPEG_REG_BITS(
2642 VD2_AFBCD1_MISC_CTRL,
2643 /* Vd2_afbc0_mem_sel */
2644 (afbc ? 1 : 0),
2645 22, 1);
2646 } else {
2647 VSYNC_WR_MPEG_REG_BITS(
2648 VIU_MISC_CTRL1 + misc_off,
2649 (afbc ? 2 : 0), 0, 2);
2650 }
2651}
2652
2653#ifdef VIDEO_PIP
2654s32 config_vd_pps(
2655 u8 layer_id,
2656 struct vpp_frame_par_s *cur_frame_par,
2657 struct scaler_setting_s *setting,
2658 const struct vinfo_s *info)
2659{
2660 struct vppfilter_mode_s *vpp_filter;
2661
2662 if (!cur_frame_par || !info || !setting)
2663 return -1;
2664
2665 vpp_filter = &cur_frame_par->vpp_filter;
2666 setting->frame_par = cur_frame_par;
2667 setting->id = layer_id;
2668 setting->misc_reg_offt = 0;
2669 /* enable pps as default */
2670 setting->sc_top_enable = true;
2671 setting->sc_h_enable = true;
2672 setting->sc_v_enable = true;
2673
2674 if ((vpp_filter->vpp_hsc_start_phase_step == 0x1000000)
2675 && (vpp_filter->vpp_vsc_start_phase_step == 0x1000000)
2676 && (vpp_filter->vpp_hsc_start_phase_step ==
2677 vpp_filter->vpp_hf_start_phase_step)
2678 && !vpp_filter->vpp_pre_vsc_en
2679 && !vpp_filter->vpp_pre_hsc_en
2680 && !cur_frame_par->supsc0_enable
2681 && !cur_frame_par->supsc1_enable
2682 && bypass_pps)
2683 setting->sc_top_enable = false;
2684
2685 /* old chip: vd2 has no pps */
2686 if ((legacy_vpp || is_meson_tl1_cpu())
2687 && (setting->id != 0))
2688 setting->sc_top_enable = false;
2689
2690 setting->vinfo_width = info->width;
2691 setting->vinfo_height = info->height;
2692 return 0;
2693}
2694
2695static inline void vd2_scaler_setting(
2696 struct scaler_setting_s *setting)
2697{
2698 u32 misc_off, i;
2699 u32 r1, r2, r3;
2700 struct vpp_frame_par_s *frame_par;
2701 struct vppfilter_mode_s *vpp_filter;
2702
2703 if (legacy_vpp || !setting
2704 || !setting->frame_par
2705 || is_meson_tl1_cpu())
2706 return;
2707
2708 frame_par = setting->frame_par;
2709 misc_off = setting->misc_reg_offt;
2710 vpp_filter = &frame_par->vpp_filter;
2711
2712 if (setting->sc_top_enable) {
2713 u32 sc_misc_val;
2714
2715 sc_misc_val = VPP_SC_TOP_EN | VPP_SC_V1OUT_EN;
2716 if (setting->sc_h_enable) {
2717 sc_misc_val |= (((vpp_filter->vpp_pre_hsc_en & 1)
2718 << VPP_SC_PREHORZ_EN_BIT)
2719 | VPP_SC_HORZ_EN);
2720 sc_misc_val |= ((vpp_filter->vpp_horz_coeff[0] & 7)
2721 << VPP_SC_HBANK_LENGTH_BIT);
2722 }
2723
2724 if (setting->sc_v_enable) {
2725 sc_misc_val |= (((vpp_filter->vpp_pre_vsc_en & 1)
2726 << VPP_SC_PREVERT_EN_BIT)
2727 | VPP_SC_VERT_EN);
2728 sc_misc_val |= ((vpp_filter->vpp_pre_vsc_en & 1)
2729 << VPP_LINE_BUFFER_EN_BIT);
2730 sc_misc_val |= ((vpp_filter->vpp_vert_coeff[0] & 7)
2731 << VPP_SC_VBANK_LENGTH_BIT);
2732 }
2733 VSYNC_WR_MPEG_REG(
2734 VD2_SC_MISC + misc_off,
2735 sc_misc_val);
2736 } else {
2737 setting->sc_v_enable = false;
2738 setting->sc_h_enable = false;
2739 VSYNC_WR_MPEG_REG_BITS(
2740 VD2_SC_MISC + misc_off,
2741 0, VPP_SC_TOP_EN_BIT,
2742 VPP_SC_TOP_EN_WID);
2743 }
2744
2745 /* horitontal filter settings */
2746 if (setting->sc_h_enable) {
2747 if (vpp_filter->vpp_horz_coeff[1] & 0x8000) {
2748 VSYNC_WR_MPEG_REG(
2749 VD2_SCALE_COEF_IDX + misc_off,
2750 VPP_COEF_HORZ | VPP_COEF_9BIT);
2751 } else {
2752 VSYNC_WR_MPEG_REG(
2753 VD2_SCALE_COEF_IDX + misc_off,
2754 VPP_COEF_HORZ);
2755 }
2756 for (i = 0; i <
2757 (vpp_filter->vpp_horz_coeff[1] & 0xff); i++) {
2758 VSYNC_WR_MPEG_REG(
2759 VD2_SCALE_COEF + misc_off,
2760 vpp_filter->vpp_horz_coeff[i + 2]);
2761 }
2762 r1 = frame_par->VPP_hsc_linear_startp
2763 - frame_par->VPP_hsc_startp;
2764 r2 = frame_par->VPP_hsc_linear_endp
2765 - frame_par->VPP_hsc_startp;
2766 r3 = frame_par->VPP_hsc_endp
2767 - frame_par->VPP_hsc_startp;
2768
2769 VSYNC_WR_MPEG_REG_BITS(
2770 VD2_HSC_PHASE_CTRL + misc_off,
2771 frame_par->VPP_hf_ini_phase_,
2772 VPP_HSC_TOP_INI_PHASE_BIT,
2773 VPP_HSC_TOP_INI_PHASE_WID);
2774
2775 VSYNC_WR_MPEG_REG(
2776 VD2_HSC_REGION12_STARTP + misc_off,
2777 (0 << VPP_REGION1_BIT) |
2778 ((r1 & VPP_REGION_MASK)
2779 << VPP_REGION2_BIT));
2780 VSYNC_WR_MPEG_REG(
2781 VD2_HSC_REGION34_STARTP + misc_off,
2782 ((r2 & VPP_REGION_MASK)
2783 << VPP_REGION3_BIT) |
2784 ((r3 & VPP_REGION_MASK)
2785 << VPP_REGION4_BIT));
2786 VSYNC_WR_MPEG_REG(
2787 VD2_HSC_REGION4_ENDP + misc_off, r3);
2788
2789 VSYNC_WR_MPEG_REG(
2790 VD2_HSC_START_PHASE_STEP + misc_off,
2791 vpp_filter->vpp_hf_start_phase_step);
2792
2793 VSYNC_WR_MPEG_REG(
2794 VD2_HSC_REGION1_PHASE_SLOPE + misc_off,
2795 vpp_filter->vpp_hf_start_phase_slope);
2796
2797 VSYNC_WR_MPEG_REG(
2798 VD2_HSC_REGION3_PHASE_SLOPE + misc_off,
2799 vpp_filter->vpp_hf_end_phase_slope);
2800 }
2801
2802 /* vertical filter settings */
2803 if (setting->sc_v_enable) {
2804 VSYNC_WR_MPEG_REG_BITS(
2805 VD2_VSC_PHASE_CTRL + misc_off,
2806 (vpp_filter->vpp_vert_coeff[0] == 2) ? 1 : 0,
2807 VPP_PHASECTL_DOUBLELINE_BIT,
2808 VPP_PHASECTL_DOUBLELINE_WID);
2809 VSYNC_WR_MPEG_REG(
2810 VD2_SCALE_COEF_IDX + misc_off,
2811 VPP_COEF_VERT);
2812 for (i = 0; i < vpp_filter->vpp_vert_coeff[1]; i++) {
2813 VSYNC_WR_MPEG_REG(
2814 VD2_SCALE_COEF + misc_off,
2815 vpp_filter->vpp_vert_coeff[i + 2]);
2816 }
2817
2818 /* vertical chroma filter settings */
2819 if (vpp_filter->vpp_vert_chroma_filter_en) {
2820 const u32 *pCoeff =
2821 vpp_filter->vpp_vert_chroma_coeff;
2822 VSYNC_WR_MPEG_REG(
2823 VD2_SCALE_COEF_IDX + misc_off,
2824 VPP_COEF_VERT_CHROMA
2825 |VPP_COEF_SEP_EN);
2826 for (i = 0; i < pCoeff[1]; i++)
2827 VSYNC_WR_MPEG_REG(
2828 VD2_SCALE_COEF + misc_off,
2829 pCoeff[i + 2]);
2830 }
2831
2832 r1 = frame_par->VPP_vsc_endp
2833 - frame_par->VPP_vsc_startp;
2834 VSYNC_WR_MPEG_REG(
2835 VD2_VSC_REGION12_STARTP + misc_off, 0);
2836
2837 VSYNC_WR_MPEG_REG(
2838 VD2_VSC_REGION34_STARTP + misc_off,
2839 ((r1 & VPP_REGION_MASK)
2840 << VPP_REGION3_BIT) |
2841 ((r1 & VPP_REGION_MASK)
2842 << VPP_REGION4_BIT));
2843
2844 VSYNC_WR_MPEG_REG(
2845 VD2_VSC_REGION4_ENDP + misc_off, r1);
2846
2847 VSYNC_WR_MPEG_REG(
2848 VD2_VSC_START_PHASE_STEP + misc_off,
2849 vpp_filter->vpp_vsc_start_phase_step);
2850 }
2851
2852 VSYNC_WR_MPEG_REG(
2853 VPP_VD2_HDR_IN_SIZE + misc_off,
2854 (frame_par->VPP_pic_in_height_ << 16)
2855 | frame_par->VPP_line_in_length_);
2856}
2857
2858s32 config_vd_blend(
2859 u8 layer_id,
2860 struct vpp_frame_par_s *cur_frame_par,
2861 struct vframe_s *vf,
2862 u32 layer_alpha,
2863 struct blend_setting_s *setting)
2864{
2865 /* u32 type = 0; */
2866 u32 vskip, hskip;
2867
2868 if (!cur_frame_par || !setting || !vf)
2869 return -1;
2870
2871 setting->frame_par = cur_frame_par;
2872 setting->id = layer_id;
2873 setting->misc_reg_offt = 0;
2874
2875 setting->layer_alpha = layer_alpha;
2876 setting->preblend_h_start = 0;
2877 setting->preblend_h_end = 4096;
2878 if ((cur_frame_par->VPP_post_blend_vd_v_end_ -
2879 cur_frame_par->VPP_post_blend_vd_v_start_ + 1)
2880 > VPP_PREBLEND_VD_V_END_LIMIT) {
2881 setting->preblend_v_start =
2882 cur_frame_par->VPP_post_blend_vd_v_start_;
2883 setting->preblend_v_end =
2884 cur_frame_par->VPP_post_blend_vd_v_end_;
2885 } else {
2886 setting->preblend_v_start = 0;
2887 setting->preblend_v_end =
2888 VPP_PREBLEND_VD_V_END_LIMIT - 1;
2889 }
2890
2891 setting->preblend_h_size =
2892 cur_frame_par->VPP_line_in_length_;
2893
2894 /* old chip, vd2 has no scaler, so only can use mif setting */
2895 if ((setting->id != 0) &&
2896 (legacy_vpp || is_meson_tl1_cpu())) {
2897 vskip = cur_frame_par->vscale_skip_count;
2898 hskip = cur_frame_par->hscale_skip_count;
2899
2900 setting->postblend_h_start =
2901 cur_frame_par->VPP_hd_start_lines_;
2902 setting->postblend_h_end =
2903 cur_frame_par->VPP_hd_start_lines_ +
2904 (cur_frame_par->VPP_line_in_length_ >> hskip) - 1;
2905 setting->postblend_v_start =
2906 cur_frame_par->VPP_vd_start_lines_;
2907 setting->postblend_v_end =
2908 cur_frame_par->VPP_vd_start_lines_ +
2909 (cur_frame_par->VPP_pic_in_height_ >> vskip) - 1;
2910 setting->postblend_h_size =
2911 cur_frame_par->VPP_post_blend_h_size_;
2912 } else {
2913 setting->postblend_h_start =
2914 cur_frame_par->VPP_hsc_startp;
2915 setting->postblend_h_end =
2916 cur_frame_par->VPP_hsc_endp;
2917 setting->postblend_v_start =
2918 cur_frame_par->VPP_vsc_startp;
2919 setting->postblend_v_end =
2920 cur_frame_par->VPP_vsc_endp;
2921 setting->postblend_h_size =
2922 cur_frame_par->VPP_post_blend_h_size_;
2923 }
2924
2925 if (!legacy_vpp) {
2926 u32 temp_h = cur_frame_par->VPP_pic_in_height_;
2927
2928 temp_h <<= 16;
2929 setting->preblend_h_size |= temp_h;
2930
2931 temp_h =
2932 cur_frame_par->VPP_post_blend_vd_v_end_ + 1;
2933 temp_h <<= 16;
2934 setting->postblend_h_size |= temp_h;
2935 }
2936
2937#if 0
2938 /* TODO: need remove this work around check for afbc */
2939 type = vf->type;
2940 if (cur_frame_par->nocomp)
2941 type &= ~VIDTYPE_COMPRESS;
2942
2943 if (type & VIDTYPE_COMPRESS) {
2944 u32 v_phase;
2945 struct vppfilter_mode_s *vpp_filter =
2946 &cur_frame_par->vpp_filter;
2947 v_phase = vpp_filter->vpp_vsc_start_phase_step;
2948 v_phase *= (cur_frame_par->vscale_skip_count + 1);
2949 if ((v_phase > 0x1000000) &&
2950 (layer->disp_info.layer_top < 0)) {
2951 if ((cur_frame_par->VPP_vsc_endp > 0x6) &&
2952 ((cur_frame_par->VPP_vsc_endp < 0x250)
2953 || (cur_frame_par->VPP_vsc_endp <
2954 cur_frame_par->VPP_post_blend_vd_v_end_/2))) {
2955 setting->postblend_v_end -= 6;
2956 }
2957 }
2958 }
2959#endif
2960 return 0;
2961}
2962
2963static inline void vd2_vpp_blend_setting(
2964 struct blend_setting_s *setting)
2965{
2966 u32 misc_off;
2967 u32 vd_size_mask = VPP_VD_SIZE_MASK;
2968
2969 if (!setting)
2970 return;
2971
2972 /* g12a change to 13 bits */
2973 if (!legacy_vpp)
2974 vd_size_mask = 0x1fff;
2975
2976 misc_off = 0;
2977
2978 /* vd2 preblend size should be same postblend size */
2979 /* preblend setting */
2980 VSYNC_WR_MPEG_REG(
2981 VPP_BLEND_VD2_H_START_END + misc_off,
2982 ((setting->postblend_h_start & vd_size_mask)
2983 << VPP_VD1_START_BIT) |
2984 ((setting->postblend_h_end & vd_size_mask)
2985 << VPP_VD1_END_BIT));
2986
2987 VSYNC_WR_MPEG_REG(
2988 VPP_BLEND_VD2_V_START_END + misc_off,
2989 ((setting->postblend_v_start & vd_size_mask)
2990 << VPP_VD1_START_BIT) |
2991 ((setting->postblend_v_end & vd_size_mask)
2992 << VPP_VD1_END_BIT));
2993}
2994
2995static inline void proc_vd2_vsc_phase_per_vsync(
2996 struct vpp_frame_par_s *frame_par,
2997 struct vframe_s *vf,
2998 u32 vout_type)
2999{
3000 struct f2v_vphase_s *vphase;
3001 u32 misc_off, vin_type;
3002 struct vppfilter_mode_s *vpp_filter;
3003
3004 if (legacy_vpp || is_meson_tl1_cpu()
3005 || !frame_par || !vf)
3006 return;
3007
3008 vpp_filter = &frame_par->vpp_filter;
3009 misc_off = 0;
3010 vin_type = vf->type & VIDTYPE_TYPEMASK;
3011 /* vertical phase */
3012 vphase = &frame_par->VPP_vf_ini_phase_
3013 [vpp_phase_table[vin_type]
3014 [vout_type]];
3015 VSYNC_WR_MPEG_REG(
3016 VD2_VSC_INI_PHASE + misc_off,
3017 ((u32) (vphase->phase) << 8));
3018
3019 if (vphase->repeat_skip >= 0) {
3020 /* skip lines */
3021 VSYNC_WR_MPEG_REG_BITS(
3022 VD2_VSC_PHASE_CTRL + misc_off,
3023 skip_tab[vphase->repeat_skip],
3024 VPP_PHASECTL_INIRCVNUMT_BIT,
3025 VPP_PHASECTL_INIRCVNUM_WID +
3026 VPP_PHASECTL_INIRPTNUM_WID);
3027 } else {
3028 /* repeat first line */
3029 VSYNC_WR_MPEG_REG_BITS(
3030 VD2_VSC_PHASE_CTRL + misc_off,
3031 4,
3032 VPP_PHASECTL_INIRCVNUMT_BIT,
3033 VPP_PHASECTL_INIRCVNUM_WID);
3034 VSYNC_WR_MPEG_REG_BITS(
3035 VD2_VSC_PHASE_CTRL + misc_off,
3036 1 - vphase->repeat_skip,
3037 VPP_PHASECTL_INIRPTNUMT_BIT,
3038 VPP_PHASECTL_INIRPTNUM_WID);
3039 }
3040
3041 VSYNC_WR_MPEG_REG_BITS(
3042 VD2_VSC_PHASE_CTRL + misc_off,
3043 (vpp_filter->vpp_vert_coeff[0] == 2) ? 1 : 0,
3044 VPP_PHASECTL_DOUBLELINE_BIT,
3045 VPP_PHASECTL_DOUBLELINE_WID);
3046}
3047
3048static void pip_toggle_frame(struct vframe_s *vf)
3049{
3050 u32 first_picture = 0;
3051
3052 if (vf == NULL)
3053 return;
3054
3055 ori2_start_x_lines = 0;
3056 ori2_end_x_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3057 vf->compWidth : vf->width) - 1;
3058 ori2_start_y_lines = 0;
3059 ori2_end_y_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3060 vf->compHeight : vf->height) - 1;
3061
3062 if (debug_flag & DEBUG_FLAG_PRINT_TOGGLE_FRAME)
3063 pr_info("%s()\n", __func__);
3064
3065 if ((vf->width == 0) && (vf->height == 0)) {
3066 amlog_level(LOG_LEVEL_ERROR,
3067 "Video: invalid frame dimension\n");
3068 return;
3069 }
3070 if (cur_pipbuf
3071 && (cur_pipbuf != &local_pip)
3072 && (cur_pipbuf != vf)) {
3073 pip_frame_count++;
3074 if (pip_frame_count == 1)
3075 first_picture = 1;
3076#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3077 if (is_vsync_rdma_enable()) {
3078 if (pip_rdma_buf == cur_pipbuf)
3079 pipbuf_to_put = cur_pipbuf;
3080 else
3081 pip_vf_put(cur_pipbuf);
3082 } else {
3083 if (pipbuf_to_put) {
3084 pip_vf_put(
3085 pipbuf_to_put);
3086 pipbuf_to_put = NULL;
3087 }
3088 pip_vf_put(cur_pipbuf);
3089 }
3090#else
3091 pip_vf_put(cur_pipbuf);
3092#endif
3093 } else if (!cur_pipbuf
3094 || (cur_pipbuf == &local_pip))
3095 first_picture = 1;
3096
3097 /* switch buffer */
3098 if (vf->type & VIDTYPE_COMPRESS) {
3099 VSYNC_WR_MPEG_REG(VD2_AFBC_HEAD_BADDR,
3100 vf->compHeadAddr>>4);
3101 VSYNC_WR_MPEG_REG(VD2_AFBC_BODY_BADDR,
3102 vf->compBodyAddr>>4);
3103 }
3104 if (vf->canvas0Addr != 0) {
3105#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3106 if (vf->canvas0Addr != (u32)-1) {
3107 canvas_copy(vf->canvas0Addr & 0xff,
3108 disp_canvas_index[pip_rdma_canvas_id][3]);
3109 canvas_copy((vf->canvas0Addr >> 8) & 0xff,
3110 disp_canvas_index[pip_rdma_canvas_id][4]);
3111 canvas_copy((vf->canvas0Addr >> 16) & 0xff,
3112 disp_canvas_index[pip_rdma_canvas_id][5]);
3113 } else {
3114 vframe_canvas_set(&vf->canvas0_config[0],
3115 vf->plane_num,
3116 &disp_canvas_index[pip_rdma_canvas_id][3]);
3117 }
3118
3119 VSYNC_WR_MPEG_REG(
3120 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3121 disp_canvas[pip_rdma_canvas_id][1]);
3122
3123 pip_next_rdma_canvas_id = pip_rdma_canvas_id ? 0 : 1;
3124#endif
3125 }
3126
3127 if (pip_property_changed) {
3128 first_picture = 1;
3129 pip_property_changed = 0;
3130 }
3131 if (cur_pipbuf != vf)
3132 vf->type_backup = vf->type;
3133
3134 /* enable new config on the new frames */
3135 if ((first_picture) || (cur_pipbuf &&
3136 ((cur_pipbuf->bufWidth != vf->bufWidth) ||
3137 (cur_pipbuf->width != vf->width) ||
3138 (cur_pipbuf->height != vf->height) ||
3139 (cur_pipbuf->bitdepth != vf->bitdepth) ||
3140 (cur_pipbuf->trans_fmt != vf->trans_fmt) ||
3141 (cur_pipbuf->ratio_control != vf->ratio_control) ||
3142 ((cur_pipbuf->type_backup & VIDTYPE_INTERLACE) !=
3143 (vf->type_backup & VIDTYPE_INTERLACE)) ||
3144 (cur_pipbuf->type != vf->type)))) {
3145 int iret;
3146
3147 /* apply new vpp settings */
3148 nextpip_frame_par =
3149 (&pip_frame_parms[0] == nextpip_frame_par) ?
3150 &pip_frame_parms[1] : &pip_frame_parms[0];
3151
3152 update_layer_info(1);
3153 if (legacy_vpp || is_meson_tl1_cpu())
3154 iret = vpp_set_filters_no_scaler(
3155 &glayer_info[1], vf,
3156 nextpip_frame_par, vinfo);
3157 else
3158 iret = vpp_set_filters(
3159 &glayer_info[1], vf,
3160 nextpip_frame_par, vinfo,
3161 true);
3162
3163 if (iret == VppFilter_Success_and_Changed)
3164 pip_property_changed = 1;
3165
3166 pip_frame_ready_to_set = 1;
3167 }
3168
3169 if (((vf->type & VIDTYPE_NO_VIDEO_ENABLE) == 0) &&
3170 (!pip_property_changed || (vf != cur_pipbuf))) {
3171 if (disable_videopip == VIDEO_DISABLE_FORNEXT) {
3172 EnableVideoLayer2();
3173 disable_videopip = VIDEO_DISABLE_NONE;
3174 }
3175 if (first_picture &&
3176 (disable_videopip !=
3177 VIDEO_DISABLE_NORMAL)) {
3178 EnableVideoLayer2();
3179 }
3180 }
3181 cur_pipbuf = vf;
3182 if (first_picture)
3183 pip_frame_ready_to_set = 1;
3184}
3185
3186static void pip_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
3187{
3188 u32 r;
3189 u32 vphase, vini_phase;
3190 u32 pat, loop;
3191 static const u32 vpat[MAX_VSKIP_COUNT + 1] = {
3192 0, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
3193 u32 u, v;
3194 u32 type, bit_mode = 0;
3195
3196 if (!vf || !frame_par) {
3197 pr_err("pip_set_dcu vf is NULL\n");
3198 return;
3199 }
3200
3201 type = vf->type;
3202 pr_debug("pip_set_dcu %p, type:0x%x\n", vf, type);
3203
3204 if (frame_par->nocomp)
3205 type &= ~VIDTYPE_COMPRESS;
3206
3207 if (type & VIDTYPE_COMPRESS) {
3208 r = (3 << 24) |
3209 (vpp_hold_line << 16) |
3210 ((legacy_vpp ? 1 : 2) << 14) | /* burst1 */
3211 (vf->bitdepth & BITDEPTH_MASK);
3212
3213 if (frame_par->hscale_skip_count)
3214 r |= 0x33;
3215 if (frame_par->vscale_skip_count)
3216 r |= 0xcc;
3217
3218#ifdef TV_REVERSE
3219 if (reverse)
3220 r |= (1<<26) | (1<<27);
3221#endif
3222 if (vf->bitdepth & BITDEPTH_SAVING_MODE)
3223 r |= (1<<28); /* mem_saving_mode */
3224 if (type & VIDTYPE_SCATTER)
3225 r |= (1<<29);
3226 VSYNC_WR_MPEG_REG(VD2_AFBC_MODE, r);
3227
3228 r = 0x1700;
3229 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3230 if (vf && (vf->source_type
3231 != VFRAME_SOURCE_TYPE_HDMI))
3232 r |= (1 << 19); /* dos_uncomp */
3233 }
3234 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, r);
3235
3236 r = 0x100;
3237 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3238 if (type & VIDTYPE_VIU_444)
3239 r |= 0;
3240 else if (type & VIDTYPE_VIU_422)
3241 r |= (1 << 12);
3242 else
3243 r |= (2 << 12);
3244 }
3245 VSYNC_WR_MPEG_REG(VD2_AFBC_CONV_CTRL, r);
3246
3247 u = (vf->bitdepth >> (BITDEPTH_U_SHIFT)) & 0x3;
3248 v = (vf->bitdepth >> (BITDEPTH_V_SHIFT)) & 0x3;
3249 VSYNC_WR_MPEG_REG(VD2_AFBC_DEC_DEF_COLOR,
3250 0x3FF00000 | /*Y,bit20+*/
3251 0x80 << (u + 10) |
3252 0x80 << v);
3253 /* chroma formatter */
3254 r = HFORMATTER_EN |
3255 (0x8 << VFORMATTER_PHASE_BIT) |
3256 VFORMATTER_EN;
3257#if 0 /* def CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION */
3258 if (is_meson_txlx_package_962X()
3259 && !is_dolby_vision_stb_mode()
3260 && is_dolby_vision_on()) {
3261 r |= HFORMATTER_REPEAT |
3262 HFORMATTER_YC_RATIO_2_1 |
3263 HFORMATTER_EN |
3264 VFORMATTER_ALWAYS_RPT |
3265 (0 << VFORMATTER_INIPHASE_BIT) |
3266 (0x8 << VFORMATTER_PHASE_BIT) |
3267 VFORMATTER_EN;
3268 } else
3269#endif
3270 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3271 r = HFORMATTER_YC_RATIO_2_1 |
3272 HFORMATTER_EN |
3273 VFORMATTER_RPTLINE0_EN |
3274 (0x8 << VFORMATTER_PHASE_BIT) |
3275 VFORMATTER_EN;
3276
3277 if (is_dolby_vision_on())
3278 r |= HFORMATTER_REPEAT |
3279 (0xc << VFORMATTER_INIPHASE_BIT);
3280 else
3281 r |= HFORMATTER_RRT_PIXEL0 |
3282 (0 << VFORMATTER_INIPHASE_BIT);
3283
3284 if (type & VIDTYPE_VIU_444) {
3285 r &= ~HFORMATTER_EN;
3286 r &= ~VFORMATTER_EN;
3287 r &= ~HFORMATTER_YC_RATIO_2_1;
3288 } else if (type & VIDTYPE_VIU_422) {
3289 r &= ~VFORMATTER_EN;
3290 }
3291 } else {
3292 r = HFORMATTER_YC_RATIO_2_1 |
3293 HFORMATTER_EN |
3294 VFORMATTER_RPTLINE0_EN |
3295 (0x8 << VFORMATTER_PHASE_BIT) |
3296 VFORMATTER_EN;
3297 if (is_dolby_vision_on())
3298 r |= HFORMATTER_REPEAT |
3299 (0xc << VFORMATTER_INIPHASE_BIT);
3300 else
3301 r |= HFORMATTER_RRT_PIXEL0 |
3302 (0 << VFORMATTER_INIPHASE_BIT);
3303 }
3304 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_CTRL, r);
3305
3306 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
3307 if (type & VIDTYPE_COMPRESS_LOSS)
3308 VSYNC_WR_MPEG_REG(
3309 VD2_AFBCDEC_IQUANT_ENABLE,
3310 ((1 << 11) |
3311 (1 << 10) |
3312 (1 << 4) |
3313 (1 << 0)));
3314 else
3315 VSYNC_WR_MPEG_REG(
3316 VD2_AFBCDEC_IQUANT_ENABLE, 0);
3317 }
3318
3319 vd2_path_select(true);
3320 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG +
3321 cur_dev->viu_off, 0);
3322 return;
3323 }
3324
3325 if ((vf->bitdepth & BITDEPTH_Y10) &&
3326 (!frame_par->nocomp)) {
3327 if (vf->type & VIDTYPE_VIU_444) {
3328 bit_mode = 2;
3329 } else {
3330 if (vf->bitdepth & FULL_PACK_422_MODE)
3331 bit_mode = 3;
3332 else
3333 bit_mode = 1;
3334 }
3335 } else {
3336 bit_mode = 0;
3337 }
3338 vd2_path_select(false);
3339 if (!legacy_vpp) {
3340 VSYNC_WR_MPEG_REG_BITS(
3341 G12_VD2_IF0_GEN_REG3,
3342 (bit_mode & 0x3), 8, 2);
3343 } else {
3344 VSYNC_WR_MPEG_REG_BITS(
3345 VD2_IF0_GEN_REG3 + cur_dev->viu_off,
3346 (bit_mode&0x3), 8, 2);
3347 }
3348 if (!(VSYNC_RD_MPEG_REG(VIU_MISC_CTRL1) & 0x1))
3349 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
3350 if (type & VIDTYPE_VIU_NV21)
3351 VSYNC_WR_MPEG_REG_BITS(
3352 VD2_IF0_GEN_REG2 +
3353 cur_dev->viu_off, 1, 0, 1);
3354 else
3355 VSYNC_WR_MPEG_REG_BITS(
3356 VD2_IF0_GEN_REG2 +
3357 cur_dev->viu_off, 0, 0, 1);
3358
3359 r = (3 << VDIF_URGENT_BIT) |
3360 (vpp_hold_line << VDIF_HOLD_LINES_BIT) |
3361 VDIF_FORMAT_SPLIT |
3362 VDIF_CHRO_RPT_LAST | VDIF_ENABLE;
3363 /* | VDIF_RESET_ON_GO_FIELD;*/
3364 if (debug_flag & DEBUG_FLAG_GOFIELD_MANUL)
3365 r |= 1<<7; /*for manul triggle gofiled.*/
3366
3367 if ((type & VIDTYPE_VIU_SINGLE_PLANE) == 0)
3368 r |= VDIF_SEPARATE_EN;
3369 else {
3370 if (type & VIDTYPE_VIU_422)
3371 r |= VDIF_FORMAT_422;
3372 else {
3373 r |= VDIF_FORMAT_RGB888_YUV444 |
3374 VDIF_DEMUX_MODE_RGB_444;
3375 }
3376 }
3377
3378 if (frame_par->hscale_skip_count)
3379 r |= VDIF_CHROMA_HZ_AVG | VDIF_LUMA_HZ_AVG;
3380
3381 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG + cur_dev->viu_off, r);
3382
3383#ifdef TV_REVERSE
3384 if (reverse) {
3385 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
3386 cur_dev->viu_off), 0xf, 2, 4);
3387 } else {
3388 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
3389 cur_dev->viu_off), 0, 2, 4);
3390 }
3391#endif
3392
3393 /* chroma formatter */
3394 if (type & VIDTYPE_VIU_444) {
3395 VSYNC_WR_MPEG_REG(
3396 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3397 HFORMATTER_YC_RATIO_1_1);
3398 } else if (type & VIDTYPE_VIU_FIELD) {
3399 vini_phase = 0xc << VFORMATTER_INIPHASE_BIT;
3400 vphase = ((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
3401 << VFORMATTER_PHASE_BIT;
3402 if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
3403 is_meson_txlx_cpu()) {
3404 if ((vf->width >= 3840) &&
3405 (vf->height >= 2160) &&
3406 (type & VIDTYPE_VIU_422)) {
3407 VSYNC_WR_MPEG_REG(
3408 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3409 HFORMATTER_RRT_PIXEL0 |
3410 HFORMATTER_YC_RATIO_2_1 |
3411 HFORMATTER_EN |
3412 VFORMATTER_RPTLINE0_EN |
3413 vini_phase | vphase);
3414 } else {
3415 VSYNC_WR_MPEG_REG(
3416 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3417 HFORMATTER_REPEAT |
3418 HFORMATTER_YC_RATIO_2_1 |
3419 HFORMATTER_EN |
3420 VFORMATTER_RPTLINE0_EN |
3421 vini_phase | vphase |
3422 VFORMATTER_EN);
3423 }
3424 } else {
3425 VSYNC_WR_MPEG_REG(
3426 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3427 HFORMATTER_REPEAT |
3428 HFORMATTER_YC_RATIO_2_1 |
3429 HFORMATTER_EN |
3430 VFORMATTER_RPTLINE0_EN |
3431 vini_phase | vphase |
3432 VFORMATTER_EN);
3433 }
3434 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
3435 VSYNC_WR_MPEG_REG(
3436 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3437 HFORMATTER_YC_RATIO_2_1 |
3438 HFORMATTER_EN |
3439 VFORMATTER_RPTLINE0_EN |
3440 (0xe << VFORMATTER_INIPHASE_BIT) |
3441 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
3442 << VFORMATTER_PHASE_BIT) |
3443 VFORMATTER_EN);
3444 } else {
3445 VSYNC_WR_MPEG_REG(
3446 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3447 HFORMATTER_REPEAT |
3448 HFORMATTER_YC_RATIO_2_1 |
3449 HFORMATTER_EN |
3450 VFORMATTER_RPTLINE0_EN |
3451 (0xc << VFORMATTER_INIPHASE_BIT) |
3452 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
3453 << VFORMATTER_PHASE_BIT) |
3454 VFORMATTER_EN);
3455 }
3456
3457 if (is_meson_txlx_cpu()
3458 || is_meson_g12a_cpu()
3459 || is_meson_g12b_cpu())
3460 VSYNC_WR_MPEG_REG_BITS(
3461 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
3462 1, 29, 1);
3463
3464 /* LOOP/SKIP pattern */
3465 pat = vpat[frame_par->vscale_skip_count];
3466
3467 if (type & VIDTYPE_VIU_FIELD) {
3468 loop = 0;
3469
3470 if (type & VIDTYPE_INTERLACE)
3471 pat = vpat[frame_par->vscale_skip_count >> 1];
3472 } else if (type & VIDTYPE_MVC) {
3473 loop = 0x11;
3474 pat = 0x80;
3475 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
3476 loop = 0x11;
3477 pat <<= 4;
3478 } else
3479 loop = 0;
3480
3481 VSYNC_WR_MPEG_REG(
3482 VD2_IF0_RPT_LOOP + cur_dev->viu_off,
3483 (loop << VDIF_CHROMA_LOOP1_BIT) |
3484 (loop << VDIF_LUMA_LOOP1_BIT) |
3485 (loop << VDIF_CHROMA_LOOP0_BIT) |
3486 (loop << VDIF_LUMA_LOOP0_BIT));
3487
3488 VSYNC_WR_MPEG_REG(
3489 VD2_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
3490 VSYNC_WR_MPEG_REG(
3491 VD2_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
3492 VSYNC_WR_MPEG_REG(
3493 VD2_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
3494 VSYNC_WR_MPEG_REG(
3495 VD2_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
3496
3497 VSYNC_WR_MPEG_REG(
3498 VD2_IF0_LUMA_PSEL + cur_dev->viu_off, 0);
3499 VSYNC_WR_MPEG_REG(
3500 VD2_IF0_CHROMA_PSEL + cur_dev->viu_off, 0);
3501}
3502#endif
3503
3504/* for sdr/hdr/single dv switch with dual dv */
3505static u32 last_el_status;
3506/* for dual dv switch with different el size */
3507static u32 last_el_w;
3508bool has_enhanced_layer(struct vframe_s *vf)
3509{
3510 struct provider_aux_req_s req;
3511
3512 if (!vf)
3513 return 0;
3514 if (vf->source_type != VFRAME_SOURCE_TYPE_OTHERS)
3515 return 0;
3516 if (!is_dolby_vision_on())
3517 return 0;
3518
3519 req.vf = vf;
3520 req.bot_flag = 0;
3521 req.aux_buf = NULL;
3522 req.aux_size = 0;
3523 req.dv_enhance_exist = 0;
3524 vf_notify_provider_by_name("dvbldec",
3525 VFRAME_EVENT_RECEIVER_GET_AUX_DATA,
3526 (void *)&req);
3527 return req.dv_enhance_exist;
3528}
3529u32 property_changed_true;
3530
3531static u64 func_div(u64 number, u32 divid)
3532{
3533 u64 tmp = number;
3534
3535 do_div(tmp, divid);
3536 return tmp;
3537}
3538
3539static void vsync_toggle_frame(struct vframe_s *vf, int line)
3540{
3541 static u32 last_pts;
3542 u32 diff_pts;
3543 u32 first_picture = 0;
3544 unsigned long flags = 0;
3545 bool vf_with_el = false;
3546 bool force_toggle = false;
3547 long long *clk_array;
3548 bool is_mvc = false;
3549
3550 ATRACE_COUNTER(__func__, line);
3551 if (vf == NULL)
3552 return;
3553 ATRACE_COUNTER("vsync_toggle_frame_pts", vf->pts);
3554
3555 diff_pts = vf->pts - last_pts;
3556 if (last_pts && diff_pts < 90000)
3557 ATRACE_COUNTER("vsync_toggle_frame_inc", diff_pts);
3558 else
3559 ATRACE_COUNTER("vsync_toggle_frame_inc", 0); /* discontinue */
3560 last_pts = vf->pts;
3561
3562 frame_count++;
3563 toggle_count++;
3564
3565 if (vf->type & VIDTYPE_MVC)
3566 is_mvc = true;
3567
3568 if (is_dolby_vision_enable())
3569 vf_with_el = has_enhanced_layer(vf);
3570
3571#ifdef PTS_TRACE_DEBUG
3572#ifdef PTS_TRACE_START
3573 if (pts_trace_his_rd < 16) {
3574#endif
3575 pts_trace_his[pts_trace_his_rd] = pts_trace;
3576 pts_his[pts_trace_his_rd] = vf->pts;
3577 scr_his[pts_trace_his_rd] = timestamp_pcrscr_get();
3578 pts_trace_his_rd++;
3579 if (pts_trace_his_rd >= 16)
3580 pts_trace_his_rd = 0;
3581#ifdef PTS_TRACE_START
3582 }
3583#endif
3584#endif
3585
3586#ifdef PTS_LOGGING
3587 if (pts_escape_vsync == 1) {
3588 pts_trace++;
3589 pts_escape_vsync = 0;
3590 }
3591 vsync_video_pattern();
3592 pre_pts_trace = pts_trace;
3593#endif
3594
3595#if defined(PTS_LOGGING) || defined(PTS_TRACE_DEBUG)
3596 pts_trace = 0;
3597#endif
3598
3599 ori_start_x_lines = 0;
3600 ori_end_x_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3601 vf->compWidth : vf->width) - 1;
3602 ori_start_y_lines = 0;
3603 ori_end_y_lines = ((vf->type & VIDTYPE_COMPRESS) ?
3604 vf->compHeight : vf->height) - 1;
3605 if (debug_flag & DEBUG_FLAG_PRINT_TOGGLE_FRAME) {
3606 u32 pcr = timestamp_pcrscr_get();
3607 u32 vpts = timestamp_vpts_get();
3608 u32 apts = timestamp_apts_get();
3609
3610 pr_info("%s pts:%d.%06d pcr:%d.%06d vpts:%d.%06d apts:%d.%06d\n",
3611 __func__, (vf->pts) / 90000,
3612 ((vf->pts) % 90000) * 1000 / 90, (pcr) / 90000,
3613 ((pcr) % 90000) * 1000 / 90, (vpts) / 90000,
3614 ((vpts) % 90000) * 1000 / 90, (apts) / 90000,
3615 ((apts) % 90000) * 1000 / 90);
3616 }
3617
3618 if (trickmode_i || trickmode_fffb)
3619 trickmode_duration_count = trickmode_duration;
3620
3621 if (vf->early_process_fun) {
3622 if (vf->early_process_fun(vf->private_data, vf) == 1) {
3623 /* video_property_changed = true; */
3624 first_picture = 1;
3625 }
3626 } else {
3627#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
3628 if ((DI_POST_REG_RD(DI_IF1_GEN_REG) & 0x1) != 0) {
3629 /* check mif enable status, disable post di */
3630 VSYNC_WR_MPEG_REG(DI_POST_CTRL, 0x3 << 30);
3631 VSYNC_WR_MPEG_REG(DI_POST_SIZE,
3632 (32 - 1) | ((128 - 1) << 16));
3633 VSYNC_WR_MPEG_REG(DI_IF1_GEN_REG,
3634 READ_VCBUS_REG(DI_IF1_GEN_REG) &
3635 0xfffffffe);
3636 }
3637#endif
3638 }
3639
3640 timer_count = 0;
3641 if ((vf->width == 0) && (vf->height == 0)) {
3642 amlog_level(LOG_LEVEL_ERROR,
3643 "Video: invalid frame dimension\n");
3644 ATRACE_COUNTER(__func__, __LINE__);
3645 return;
3646 }
3647
3648 if (hold_video) {
3649 if (cur_dispbuf != vf) {
3650 new_frame_count++;
3651 if (vf->pts != 0) {
3652 amlog_mask(LOG_MASK_TIMESTAMP,
3653 "vpts to: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3654 vf->pts, timestamp_pcrscr_get(),
3655 READ_MPEG_REG(SCR_HIU));
3656
3657 timestamp_vpts_set(vf->pts);
3658 last_frame_duration = vf->duration;
3659 } else if (last_frame_duration) {
3660 amlog_mask(LOG_MASK_TIMESTAMP,
3661 "vpts inc: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3662 timestamp_vpts_get() +
3663 DUR2PTS(cur_dispbuf->duration),
3664 timestamp_pcrscr_get(),
3665 READ_MPEG_REG(SCR_HIU));
3666
3667 timestamp_vpts_inc(DUR2PTS
3668 (last_frame_duration));
3669
3670 vpts_remainder +=
3671 DUR2PTS_RM(last_frame_duration);
3672 if (vpts_remainder >= 0xf) {
3673 vpts_remainder -= 0xf;
3674 timestamp_vpts_inc(-1);
3675 }
3676 }
3677 video_vf_put(vf);
3678 ATRACE_COUNTER(__func__, __LINE__);
3679 return;
3680 }
3681 }
3682
3683 if ((cur_dispbuf) && (cur_dispbuf != &vf_local) && (cur_dispbuf != vf)
3684 && (video_property_changed != 2)) {
3685 new_frame_count++;
3686 if (new_frame_count == 1)
3687 first_picture = 1;
3688#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3689 if (is_vsync_rdma_enable()) {
3690#ifdef RDMA_RECYCLE_ORDERED_VFRAMES
3691 if (dispbuf_to_put_num < DISPBUF_TO_PUT_MAX) {
3692 dispbuf_to_put[dispbuf_to_put_num] =
3693 cur_dispbuf;
3694 dispbuf_to_put_num++;
3695 } else
3696 video_vf_put(cur_dispbuf);
3697#else
3698 if (cur_rdma_buf == cur_dispbuf) {
3699 dispbuf_to_put[0] = cur_dispbuf;
3700 dispbuf_to_put_num = 1;
3701 } else
3702 video_vf_put(cur_dispbuf);
3703#endif
3704 } else {
3705 int i;
3706
3707 for (i = 0; i < dispbuf_to_put_num; i++) {
3708 if (dispbuf_to_put[i]) {
3709 video_vf_put(
3710 dispbuf_to_put[i]);
3711 dispbuf_to_put[i] = NULL;
3712 }
3713 dispbuf_to_put_num = 0;
3714 }
3715 video_vf_put(cur_dispbuf);
3716 }
3717#else
3718 video_vf_put(cur_dispbuf);
3719#endif
3720 if (debug_flag & DEBUG_FLAG_LATENCY) {
3721 vf->ready_clock[3] = sched_clock();
3722 pr_info(
3723 "video toggle latency %lld ms, video get latency %lld ms, vdin put latency %lld ms, first %lld ms.\n",
3724 func_div(vf->ready_clock[3], 1000),
3725 func_div(vf->ready_clock[2], 1000),
3726 func_div(vf->ready_clock[1], 1000),
3727 func_div(vf->ready_clock[0], 1000));
3728 cur_dispbuf->ready_clock[4] = sched_clock();
3729 clk_array = cur_dispbuf->ready_clock;
3730 pr_info("video put latency %lld ms, video toggle latency %lld ms, video get latency %lld ms, vdin put latency %lld ms, first %lld ms.\n",
3731 func_div(*(clk_array + 4), 1000),
3732 func_div(*(clk_array + 3), 1000),
3733 func_div(*(clk_array + 2), 1000),
3734 func_div(*(clk_array + 1), 1000),
3735 func_div(*clk_array, 1000));
3736 }
3737 } else
3738 first_picture = 1;
3739
3740 if (video_property_changed) {
3741 property_changed_true = 2;
3742 video_property_changed = 0;
3743 first_picture = 1;
3744 }
3745 if (property_changed_true > 0) {
3746 property_changed_true--;
3747 first_picture = 1;
3748 }
3749
3750 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
3751 && first_picture)
3752 pr_info("first picture {%d,%d} pts:%x,\n",
3753 vf->width, vf->height, vf->pts);
3754
3755 /* switch buffer */
3756 post_canvas = vf->canvas0Addr;
3757 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) &&
3758 (vf->type & VIDTYPE_COMPRESS)) {
3759 VSYNC_WR_MPEG_REG(AFBC_HEAD_BADDR, vf->compHeadAddr>>4);
3760 VSYNC_WR_MPEG_REG(AFBC_BODY_BADDR, vf->compBodyAddr>>4);
3761 }
3762 if ((vf->canvas0Addr != 0)
3763#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
3764 && ((DI_POST_REG_RD(DI_POST_CTRL) & 0x1000) == 0)
3765 /* check di_post_viu_link */
3766#endif
3767 ) {
3768
3769#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
3770 if (vf->canvas0Addr != (u32)-1) {
3771 canvas_copy(vf->canvas0Addr & 0xff,
3772 disp_canvas_index[rdma_canvas_id][0]);
3773 canvas_copy((vf->canvas0Addr >> 8) & 0xff,
3774 disp_canvas_index[rdma_canvas_id][1]);
3775 canvas_copy((vf->canvas0Addr >> 16) & 0xff,
3776 disp_canvas_index[rdma_canvas_id][2]);
3777 } else {
3778 vframe_canvas_set(&vf->canvas0_config[0],
3779 vf->plane_num,
3780 &disp_canvas_index[rdma_canvas_id][0]);
3781 }
3782 if (is_mvc || process_3d_type) {
3783 if (vf->canvas1Addr != (u32)-1) {
3784 canvas_copy(vf->canvas1Addr & 0xff,
3785 disp_canvas_index[rdma_canvas_id][3]);
3786 canvas_copy((vf->canvas1Addr >> 8) & 0xff,
3787 disp_canvas_index[rdma_canvas_id][4]);
3788 canvas_copy((vf->canvas1Addr >> 16) & 0xff,
3789 disp_canvas_index[rdma_canvas_id][5]);
3790 } else {
3791 vframe_canvas_set(&vf->canvas1_config[0],
3792 vf->plane_num,
3793 &disp_canvas_index[rdma_canvas_id][3]);
3794 }
3795 }
3796
3797 VSYNC_WR_MPEG_REG(
3798 VD1_IF0_CANVAS0 + cur_dev->viu_off,
3799 disp_canvas[rdma_canvas_id][0]);
3800 if (is_mvc)
3801 VSYNC_WR_MPEG_REG(
3802 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3803 disp_canvas[rdma_canvas_id][1]);
3804 if (cur_frame_par &&
3805 (cur_frame_par->vpp_2pic_mode == 1)) {
3806 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3807 cur_dev->viu_off,
3808 disp_canvas[rdma_canvas_id][0]);
3809 if (is_mvc)
3810 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3811 cur_dev->viu_off,
3812 disp_canvas[rdma_canvas_id][0]);
3813 } else {
3814 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3815 cur_dev->viu_off,
3816 disp_canvas[rdma_canvas_id][1]);
3817 if (is_mvc)
3818 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3819 cur_dev->viu_off,
3820 disp_canvas[rdma_canvas_id][0]);
3821 }
3822 if (cur_frame_par
3823 && (process_3d_type & MODE_3D_ENABLE)
3824 && (process_3d_type & MODE_3D_TO_2D_R)
3825 && (cur_frame_par->vpp_2pic_mode
3826 == VPP_SELECT_PIC1)) {
3827 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS0 + cur_dev->viu_off,
3828 disp_canvas[rdma_canvas_id][1]);
3829 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 + cur_dev->viu_off,
3830 disp_canvas[rdma_canvas_id][1]);
3831 if (is_mvc) {
3832 VSYNC_WR_MPEG_REG(
3833 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3834 disp_canvas[rdma_canvas_id][1]);
3835 VSYNC_WR_MPEG_REG(
3836 VD2_IF0_CANVAS1 + cur_dev->viu_off,
3837 disp_canvas[rdma_canvas_id][1]);
3838 }
3839 }
3840 next_rdma_canvas_id = rdma_canvas_id ? 0 : 1;
3841#else
3842 canvas_copy(vf->canvas0Addr & 0xff, disp_canvas_index[0]);
3843 canvas_copy((vf->canvas0Addr >> 8) & 0xff,
3844 disp_canvas_index[1]);
3845 canvas_copy((vf->canvas0Addr >> 16) & 0xff,
3846 disp_canvas_index[2]);
3847 if (is_mvc || process_3d_type) {
3848 canvas_copy(vf->canvas1Addr & 0xff,
3849 disp_canvas_index[3]);
3850 canvas_copy((vf->canvas1Addr >> 8) & 0xff,
3851 disp_canvas_index[4]);
3852 canvas_copy((vf->canvas1Addr >> 16) & 0xff,
3853 disp_canvas_index[5]);
3854 }
3855 VSYNC_WR_MPEG_REG(
3856 VD1_IF0_CANVAS0 + cur_dev->viu_off,
3857 disp_canvas[0]);
3858 if (is_mvc)
3859 VSYNC_WR_MPEG_REG(
3860 VD2_IF0_CANVAS0 + cur_dev->viu_off,
3861 disp_canvas[0]);
3862 if (cur_frame_par &&
3863 (cur_frame_par->vpp_2pic_mode == 1)) {
3864 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3865 cur_dev->viu_off,
3866 disp_canvas[0]);
3867 if (is_mvc)
3868 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3869 cur_dev->viu_off,
3870 disp_canvas[0]);
3871 } else {
3872 VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 +
3873 cur_dev->viu_off,
3874 disp_canvas[1]);
3875 if (is_mvc)
3876 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 +
3877 cur_dev->viu_off,
3878 disp_canvas[1]);
3879 }
3880#endif
3881 }
3882 /* set video PTS */
3883 if (cur_dispbuf != vf) {
3884 if (vf->pts != 0) {
3885 amlog_mask(LOG_MASK_TIMESTAMP,
3886 "vpts to: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3887 vf->pts, timestamp_pcrscr_get(),
3888 READ_MPEG_REG(SCR_HIU));
3889 timestamp_vpts_set(vf->pts);
3890 } else if (cur_dispbuf) {
3891 amlog_mask(LOG_MASK_TIMESTAMP,
3892 "vpts inc: 0x%x, scr: 0x%x, abs_scr: 0x%x\n",
3893 timestamp_vpts_get() +
3894 DUR2PTS(cur_dispbuf->duration),
3895 timestamp_pcrscr_get(),
3896 READ_MPEG_REG(SCR_HIU));
3897
3898 timestamp_vpts_inc(DUR2PTS
3899 (cur_dispbuf->duration));
3900
3901 vpts_remainder +=
3902 DUR2PTS_RM(cur_dispbuf->duration);
3903 if (vpts_remainder >= 0xf) {
3904 vpts_remainder -= 0xf;
3905 timestamp_vpts_inc(-1);
3906 }
3907 }
3908 vf->type_backup = vf->type;
3909 }
3910
3911 if (cur_dispbuf && vf &&
3912 (cur_dispbuf->ratio_control &
3913 DISP_RATIO_ADAPTED_PICMODE) &&
3914 (cur_dispbuf->ratio_control ==
3915 vf->ratio_control) &&
3916 memcmp(&cur_dispbuf->pic_mode, &vf->pic_mode,
3917 sizeof(struct vframe_pic_mode_s)))
3918 force_toggle = true;
3919
3920 if ((last_process_3d_type != process_3d_type)
3921 || (last_el_status != vf_with_el))
3922 force_toggle = true;
3923
3924 /* enable new config on the new frames */
3925 if (first_picture || force_toggle ||
3926 (cur_dispbuf &&
3927 ((cur_dispbuf->bufWidth != vf->bufWidth) ||
3928 (cur_dispbuf->width != vf->width) ||
3929 (cur_dispbuf->height != vf->height) ||
3930 (cur_dispbuf->bitdepth != vf->bitdepth) ||
3931 (cur_dispbuf->trans_fmt != vf->trans_fmt) ||
3932 (cur_dispbuf->ratio_control != vf->ratio_control) ||
3933 ((cur_dispbuf->type_backup & VIDTYPE_INTERLACE) !=
3934 (vf->type_backup & VIDTYPE_INTERLACE)) ||
3935 (cur_dispbuf->type != vf->type)))) {
3936 int iret;
3937
3938 last_process_3d_type = process_3d_type;
3939 atomic_inc(&video_sizechange);
3940 wake_up_interruptible(&amvideo_sizechange_wait);
3941 amlog_mask(LOG_MASK_FRAMEINFO,
3942 "%s %dx%d ar=0x%x\n",
3943 ((vf->type & VIDTYPE_TYPEMASK) ==
3944 VIDTYPE_INTERLACE_TOP) ? "interlace-top"
3945 : ((vf->type & VIDTYPE_TYPEMASK)
3946 == VIDTYPE_INTERLACE_BOTTOM)
3947 ? "interlace-bottom" : "progressive", vf->width,
3948 vf->height, vf->ratio_control);
3949#ifdef TV_3D_FUNCTION_OPEN
3950 amlog_mask(LOG_MASK_FRAMEINFO,
3951 "%s trans_fmt=%u\n", __func__, vf->trans_fmt);
3952
3953#endif
3954 next_frame_par = (&frame_parms[0] == next_frame_par) ?
3955 &frame_parms[1] : &frame_parms[0];
3956
3957 update_layer_info(0);
3958 iret = vpp_set_filters(
3959 &glayer_info[0], vf,
3960 next_frame_par, vinfo,
3961 (is_dolby_vision_on() &&
3962 is_dolby_vision_stb_mode()));
3963
3964 if (iret == VppFilter_Success_and_Changed)
3965 video_property_changed = 1;
3966
3967 /* apply new vpp settings */
3968 frame_par_ready_to_set = 1;
3969
3970 if (((vf->width > 1920) && (vf->height > 1088)) ||
3971 ((vf->type & VIDTYPE_COMPRESS) &&
3972 (vf->compWidth > 1920) &&
3973 (vf->compHeight > 1080))) {
3974 if (vpu_clk_level == 0) {
3975 vpu_clk_level = 1;
3976 spin_lock_irqsave(&lock, flags);
3977 vpu_delay_work_flag |=
3978 VPU_DELAYWORK_VPU_CLK;
3979 spin_unlock_irqrestore(&lock, flags);
3980 }
3981 } else {
3982 if (vpu_clk_level == 1) {
3983 vpu_clk_level = 0;
3984 spin_lock_irqsave(&lock, flags);
3985 vpu_delay_work_flag |=
3986 VPU_DELAYWORK_VPU_CLK;
3987 spin_unlock_irqrestore(&lock, flags);
3988 }
3989 }
3990 }
3991
3992 /* if el is unnecessary, afbc2 need to be closed */
3993 if ((last_el_status == 1) && (vf_with_el == 0))
3994 need_disable_vd2 = true;
3995
3996 if (((vf->type & VIDTYPE_MVC) == 0)
3997 && last_mvc_status)
3998 need_disable_vd2 = true;
3999
4000 last_el_status = vf_with_el;
4001
4002 if (((vf->type & VIDTYPE_NO_VIDEO_ENABLE) == 0) &&
4003 ((!property_changed_true) || (vf != cur_dispbuf))) {
4004 if (disable_video == VIDEO_DISABLE_FORNEXT) {
4005 EnableVideoLayer();
4006 disable_video = VIDEO_DISABLE_NONE;
4007 }
4008 if (first_picture && (disable_video != VIDEO_DISABLE_NORMAL)) {
4009 EnableVideoLayer();
4010 if ((vf->type & VIDTYPE_MVC) ||
4011 (cur_dispbuf2 && (cur_dispbuf2->type & VIDTYPE_VD2)))
4012 EnableVideoLayer2();
4013 else if (cur_dispbuf2 &&
4014 !(cur_dispbuf2->type & VIDTYPE_COMPRESS))
4015 VD2_MEM_POWER_ON();
4016 else if (vf_with_el)
4017 EnableVideoLayer2();
4018 else if (need_disable_vd2)
4019 DisableVideoLayer2();
4020 }
4021 }
4022 if (cur_dispbuf && (cur_dispbuf->type != vf->type)) {
4023 if ((vf->type & VIDTYPE_MVC) ||
4024 (cur_dispbuf2 && (cur_dispbuf2->type & VIDTYPE_VD2)))
4025 EnableVideoLayer2();
4026 else {
4027 if (cur_dispbuf2 &&
4028 !(cur_dispbuf2->type & VIDTYPE_COMPRESS))
4029 VD2_MEM_POWER_ON();
4030 else if (vf_with_el)
4031 EnableVideoLayer2();
4032 else if (need_disable_vd2)
4033 DisableVideoLayer2();
4034 }
4035 }
4036 cur_dispbuf = vf;
4037 if (cur_dispbuf && (cur_dispbuf->type & VIDTYPE_MVC))
4038 last_mvc_status = true;
4039 else
4040 last_mvc_status = false;
4041
4042 if (first_picture) {
4043 frame_par_ready_to_set = 1;
4044 first_frame_toggled = 1;
4045
4046#ifdef VIDEO_PTS_CHASE
4047 av_sync_flag = 0;
4048#endif
4049 }
4050 if (cur_dispbuf != &vf_local)
4051 video_keeper_new_frame_notify();
4052
4053 if ((vf != &vf_local) && (vf) && !vsync_pts_aligned) {
4054#ifdef PTS_TRACE_DEBUG
4055 pr_info("####timestamp_pcrscr_get() = 0x%x, vf->pts = 0x%x, vsync_pts_inc = %d\n",
4056 timestamp_pcrscr_get(), vf->pts, vsync_pts_inc);
4057#endif
4058 if ((abs(timestamp_pcrscr_get() - vf->pts) <= (vsync_pts_inc))
4059 && ((int)(timestamp_pcrscr_get() - vf->pts) >= 0)) {
4060 /*vsync_pts_align = vsync_pts_inc / 4 - */
4061 /* (timestamp_pcrscr_get() - vf->pts);*/
4062 vsync_pts_align = 0;
4063 vsync_pts_aligned = true;
4064#ifdef PTS_TRACE_DEBUG
4065 pts_trace_his_rd = 0;
4066 pr_info("####vsync_pts_align set to %d\n",
4067 vsync_pts_align);
4068#endif
4069 }
4070 }
4071 if (stop_update)
4072 frame_par_ready_to_set = 0;
4073 ATRACE_COUNTER(__func__, 0);
4074}
4075
4076static void viu_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
4077{
4078 u32 r;
4079 u32 vphase, vini_phase, vformatter;
4080 u32 pat, loop;
4081 static const u32 vpat[MAX_VSKIP_COUNT + 1] = {
4082 0, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
4083 u32 u, v;
4084 u32 type, bit_mode = 0;
4085 bool is_mvc = false;
4086
4087 if (vf == NULL) {
4088 pr_info("viu_set_dcu vf NULL, return\n");
4089 return;
4090 }
4091
4092 type = vf->type;
4093 if (type & VIDTYPE_MVC)
4094 is_mvc = true;
4095
4096 pr_debug("set dcu for vd1 %p, type:0x%x\n", vf, type);
4097 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
4098 if (frame_par->nocomp)
4099 type &= ~VIDTYPE_COMPRESS;
4100
4101 if (type & VIDTYPE_COMPRESS) {
4102 r = (3 << 24) |
4103 (vpp_hold_line << 16) |
4104 ((legacy_vpp ? 1 : 2) << 14) | /* burst1 */
4105 (vf->bitdepth & BITDEPTH_MASK);
4106
4107 if (frame_par->hscale_skip_count)
4108 r |= 0x33;
4109 if (frame_par->vscale_skip_count)
4110 r |= 0xcc;
4111#ifdef TV_REVERSE
4112 if (reverse)
4113 r |= (1<<26) | (1<<27);
4114#endif
4115 if (vf->bitdepth & BITDEPTH_SAVING_MODE)
4116 r |= (1<<28); /* mem_saving_mode */
4117 if (type & VIDTYPE_SCATTER)
4118 r |= (1<<29);
4119 VSYNC_WR_MPEG_REG(AFBC_MODE, r);
4120
4121 r = 0x1700;
4122 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4123 if (vf && (vf->source_type
4124 != VFRAME_SOURCE_TYPE_HDMI))
4125 r |= (1 << 19); /* dos_uncomp */
4126
4127 if (type & VIDTYPE_COMB_MODE)
4128 r |= (1 << 20);
4129 }
4130 VSYNC_WR_MPEG_REG(AFBC_ENABLE, r);
4131
4132 r = 0x100;
4133 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4134 if (type & VIDTYPE_VIU_444)
4135 r |= 0;
4136 else if (type & VIDTYPE_VIU_422)
4137 r |= (1 << 12);
4138 else
4139 r |= (2 << 12);
4140 }
4141 VSYNC_WR_MPEG_REG(AFBC_CONV_CTRL, r);
4142
4143 u = (vf->bitdepth >> (BITDEPTH_U_SHIFT)) & 0x3;
4144 v = (vf->bitdepth >> (BITDEPTH_V_SHIFT)) & 0x3;
4145 VSYNC_WR_MPEG_REG(AFBC_DEC_DEF_COLOR,
4146 0x3FF00000 | /*Y,bit20+*/
4147 0x80 << (u + 10) |
4148 0x80 << v);
4149 /* chroma formatter */
4150
4151 r = 0;
4152#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4153 if (is_meson_txlx_package_962X()
4154 && !is_dolby_vision_stb_mode()
4155 && is_dolby_vision_on()) {
4156 r = HFORMATTER_REPEAT |
4157 HFORMATTER_YC_RATIO_2_1 |
4158 HFORMATTER_EN |
4159 VFORMATTER_ALWAYS_RPT |
4160 (0 << VFORMATTER_INIPHASE_BIT) |
4161 (0x8 << VFORMATTER_PHASE_BIT) |
4162 VFORMATTER_EN;
4163 } else
4164#endif
4165 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4166 r = HFORMATTER_REPEAT |
4167 HFORMATTER_YC_RATIO_2_1 |
4168 HFORMATTER_EN |
4169 VFORMATTER_RPTLINE0_EN |
4170 (0xc << VFORMATTER_INIPHASE_BIT) |
4171 (0x8 << VFORMATTER_PHASE_BIT) |
4172 VFORMATTER_EN;
4173 if (type & VIDTYPE_VIU_444) {
4174 r &= ~HFORMATTER_EN;
4175 r &= ~VFORMATTER_EN;
4176 r &= ~HFORMATTER_YC_RATIO_2_1;
4177 } else if (type & VIDTYPE_VIU_422) {
4178 r &= ~VFORMATTER_EN;
4179 }
4180 } else {
4181 r = HFORMATTER_REPEAT |
4182 HFORMATTER_YC_RATIO_2_1 |
4183 HFORMATTER_EN |
4184 VFORMATTER_RPTLINE0_EN |
4185 (0xc << VFORMATTER_INIPHASE_BIT) |
4186 (0x8 << VFORMATTER_PHASE_BIT) |
4187 VFORMATTER_EN;
4188 }
4189 VSYNC_WR_MPEG_REG(AFBC_VD_CFMT_CTRL, r);
4190
4191 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4192 if (type & VIDTYPE_COMPRESS_LOSS)
4193 VSYNC_WR_MPEG_REG(
4194 AFBCDEC_IQUANT_ENABLE,
4195 ((1 << 11) |
4196 (1 << 10) |
4197 (1 << 4) |
4198 (1 << 0)));
4199 else
4200 VSYNC_WR_MPEG_REG(
4201 AFBCDEC_IQUANT_ENABLE, 0);
4202 }
4203
4204 vd1_path_select(true);
4205
4206 VSYNC_WR_MPEG_REG(
4207 VD1_IF0_GEN_REG + cur_dev->viu_off, 0);
4208 return;
4209
4210 } else {
4211 if ((vf->bitdepth & BITDEPTH_Y10) &&
4212 (!frame_par->nocomp)) {
4213 if (vf->type & VIDTYPE_VIU_444) {
4214 bit_mode = 2;
4215 } else {
4216 if (vf->bitdepth & FULL_PACK_422_MODE)
4217 bit_mode = 3;
4218 else
4219 bit_mode = 1;
4220 }
4221 } else {
4222 bit_mode = 0;
4223 }
4224 if (!legacy_vpp) {
4225 VSYNC_WR_MPEG_REG_BITS(
4226 G12_VD1_IF0_GEN_REG3,
4227 (bit_mode & 0x3), 8, 2);
4228 if (is_mvc)
4229 VSYNC_WR_MPEG_REG_BITS(
4230 G12_VD2_IF0_GEN_REG3,
4231 (bit_mode & 0x3), 8, 2);
4232 } else {
4233 VSYNC_WR_MPEG_REG_BITS(
4234 VD1_IF0_GEN_REG3 +
4235 cur_dev->viu_off,
4236 (bit_mode & 0x3), 8, 2);
4237 if (is_mvc)
4238 VSYNC_WR_MPEG_REG_BITS(
4239 VD2_IF0_GEN_REG3 +
4240 cur_dev->viu_off,
4241 (bit_mode & 0x3), 8, 2);
4242 }
4243#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
4244 DI_POST_WR_REG_BITS(DI_IF1_GEN_REG3,
4245 (bit_mode&0x3), 8, 2);
4246 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXLX))
4247 DI_POST_WR_REG_BITS(DI_IF2_GEN_REG3,
4248 (bit_mode & 0x3), 8, 2);
4249 if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12A))
4250 DI_POST_WR_REG_BITS(DI_IF0_GEN_REG3,
4251 (bit_mode & 0x3), 8, 2);
4252#endif
4253 vd1_path_select(false);
4254 VSYNC_WR_MPEG_REG(AFBC_ENABLE, 0);
4255 }
4256 }
4257
4258 r = (3 << VDIF_URGENT_BIT) |
4259 (vpp_hold_line << VDIF_HOLD_LINES_BIT) |
4260 VDIF_FORMAT_SPLIT |
4261 VDIF_CHRO_RPT_LAST | VDIF_ENABLE;
4262 /* | VDIF_RESET_ON_GO_FIELD;*/
4263 if (debug_flag & DEBUG_FLAG_GOFIELD_MANUL)
4264 r |= 1<<7; /*for manul triggle gofiled.*/
4265
4266 if ((type & VIDTYPE_VIU_SINGLE_PLANE) == 0)
4267 r |= VDIF_SEPARATE_EN;
4268 else {
4269 if (type & VIDTYPE_VIU_422)
4270 r |= VDIF_FORMAT_422;
4271 else {
4272 r |= VDIF_FORMAT_RGB888_YUV444 |
4273 VDIF_DEMUX_MODE_RGB_444;
4274 }
4275 }
4276
4277 if (frame_par->hscale_skip_count)
4278 r |= VDIF_CHROMA_HZ_AVG | VDIF_LUMA_HZ_AVG;
4279
4280 /*enable go field reset default according to vlsi*/
4281 r |= VDIF_RESET_ON_GO_FIELD;
4282 VSYNC_WR_MPEG_REG(VD1_IF0_GEN_REG + cur_dev->viu_off, r);
4283 if (is_mvc)
4284 VSYNC_WR_MPEG_REG(
4285 VD2_IF0_GEN_REG + cur_dev->viu_off, r);
4286
4287 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */
4288 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) {
4289 if (type & VIDTYPE_VIU_NV21) {
4290 VSYNC_WR_MPEG_REG_BITS(VD1_IF0_GEN_REG2 +
4291 cur_dev->viu_off, 1, 0, 1);
4292 } else {
4293 VSYNC_WR_MPEG_REG_BITS(VD1_IF0_GEN_REG2 +
4294 cur_dev->viu_off, 0, 0, 1);
4295 }
4296#ifdef TV_REVERSE
4297 if (reverse) {
4298 VSYNC_WR_MPEG_REG_BITS((VD1_IF0_GEN_REG2 +
4299 cur_dev->viu_off), 0xf, 2, 4);
4300 if (is_mvc)
4301 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4302 cur_dev->viu_off), 0xf, 2, 4);
4303 } else {
4304 VSYNC_WR_MPEG_REG_BITS((VD1_IF0_GEN_REG2 +
4305 cur_dev->viu_off), 0, 2, 4);
4306 if (is_mvc)
4307 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4308 cur_dev->viu_off), 0, 2, 4);
4309 }
4310#endif
4311 }
4312 /* #endif */
4313
4314 /* chroma formatter */
4315 if (type & VIDTYPE_VIU_444) {
4316 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4317 HFORMATTER_YC_RATIO_1_1);
4318 if (is_mvc)
4319 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4320 HFORMATTER_YC_RATIO_1_1);
4321 } else if (type & VIDTYPE_VIU_FIELD) {
4322 vini_phase = 0xc << VFORMATTER_INIPHASE_BIT;
4323 vphase =
4324 ((type & VIDTYPE_VIU_422) ? 0x10 : 0x08) <<
4325 VFORMATTER_PHASE_BIT;
4326
4327 /*vlsi suggest only for yuv420 vformatter shold be 1*/
4328 if (type & VIDTYPE_VIU_NV21)
4329 vformatter = VFORMATTER_EN;
4330 else
4331 vformatter = 0;
4332 if (is_meson_txlx_package_962X()
4333 && !is_dolby_vision_stb_mode()
4334 && is_dolby_vision_on()) {
4335 VSYNC_WR_MPEG_REG(
4336 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4337 HFORMATTER_REPEAT |
4338 HFORMATTER_YC_RATIO_2_1 |
4339 HFORMATTER_EN |
4340 ((type & VIDTYPE_VIU_422) ?
4341 VFORMATTER_RPTLINE0_EN :
4342 VFORMATTER_ALWAYS_RPT) |
4343 (0 << VFORMATTER_INIPHASE_BIT) |
4344 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4345 << VFORMATTER_PHASE_BIT) |
4346 ((type & VIDTYPE_VIU_422) ?
4347 0 :
4348 VFORMATTER_EN));
4349 pr_debug("\tvd1 set fmt(dovi tv)\n");
4350 } else if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
4351 is_meson_txlx_cpu()) {
4352 if ((vf->width >= 3840) &&
4353 (vf->height >= 2160) &&
4354 (type & VIDTYPE_VIU_422)) {
4355 VSYNC_WR_MPEG_REG(
4356 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4357 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4358 VFORMATTER_RPTLINE0_EN | vini_phase | vphase);
4359 if (is_mvc)
4360 VSYNC_WR_MPEG_REG(
4361 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4362 HFORMATTER_RRT_PIXEL0 |
4363 HFORMATTER_YC_RATIO_2_1 |
4364 HFORMATTER_EN |
4365 VFORMATTER_RPTLINE0_EN |
4366 vini_phase | vphase);
4367 } else {
4368 VSYNC_WR_MPEG_REG(
4369 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4370 (is_dolby_vision_on() ?
4371 HFORMATTER_REPEAT : 0) |
4372 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4373 VFORMATTER_RPTLINE0_EN | vini_phase | vphase |
4374 vformatter);
4375 if (is_mvc)
4376 VSYNC_WR_MPEG_REG(
4377 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4378 HFORMATTER_YC_RATIO_2_1 |
4379 HFORMATTER_EN |
4380 VFORMATTER_RPTLINE0_EN |
4381 vini_phase | vphase |
4382 vformatter);
4383 }
4384 } else {
4385 VSYNC_WR_MPEG_REG(
4386 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4387 (is_dolby_vision_on() ?
4388 HFORMATTER_REPEAT : 0) |
4389 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4390 VFORMATTER_RPTLINE0_EN |
4391 vini_phase | vphase |
4392 vformatter);
4393 if (is_mvc)
4394 VSYNC_WR_MPEG_REG(
4395 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4396 HFORMATTER_YC_RATIO_2_1 |
4397 HFORMATTER_EN |
4398 VFORMATTER_RPTLINE0_EN |
4399 vini_phase | vphase |
4400 vformatter);
4401 }
4402 } else if (type & VIDTYPE_MVC) {
4403 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4404 HFORMATTER_YC_RATIO_2_1 |
4405 HFORMATTER_EN |
4406 VFORMATTER_RPTLINE0_EN |
4407 (0xe << VFORMATTER_INIPHASE_BIT) |
4408 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4409 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4410 if (is_mvc)
4411 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4412 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4413 VFORMATTER_RPTLINE0_EN | (0xa <<
4414 VFORMATTER_INIPHASE_BIT) |
4415 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4416 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4417 } else if ((type & VIDTYPE_INTERLACE)
4418 && (((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP))) {
4419 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4420 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4421 VFORMATTER_RPTLINE0_EN | (0xe <<
4422 VFORMATTER_INIPHASE_BIT) |
4423 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4424 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4425 if (is_mvc)
4426 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4427 HFORMATTER_YC_RATIO_2_1 |
4428 HFORMATTER_EN |
4429 VFORMATTER_RPTLINE0_EN |
4430 (0xe << VFORMATTER_INIPHASE_BIT) |
4431 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4432 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4433 } else {
4434 if (is_meson_txlx_package_962X()
4435 && !is_dolby_vision_stb_mode()
4436 && is_dolby_vision_on()) {
4437 VSYNC_WR_MPEG_REG(
4438 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4439 HFORMATTER_REPEAT |
4440 HFORMATTER_YC_RATIO_2_1 |
4441 HFORMATTER_EN |
4442 VFORMATTER_ALWAYS_RPT |
4443 (0 << VFORMATTER_INIPHASE_BIT) |
4444 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4445 << VFORMATTER_PHASE_BIT) |
4446 VFORMATTER_EN);
4447 } else {
4448 VSYNC_WR_MPEG_REG(
4449 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4450 (is_dolby_vision_on() ?
4451 HFORMATTER_REPEAT : 0) |
4452 HFORMATTER_YC_RATIO_2_1 |
4453 HFORMATTER_EN |
4454 VFORMATTER_RPTLINE0_EN |
4455 (0xa << VFORMATTER_INIPHASE_BIT) |
4456 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4457 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4458 }
4459 if (is_mvc)
4460 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4461 HFORMATTER_YC_RATIO_2_1 |
4462 HFORMATTER_EN |
4463 VFORMATTER_RPTLINE0_EN |
4464 (0xa << VFORMATTER_INIPHASE_BIT) |
4465 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4466 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4467 }
4468#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4469 if ((is_meson_txlx_cpu()
4470 || is_meson_g12a_cpu()
4471 || is_meson_g12b_cpu())
4472 && is_dolby_vision_on()
4473 && is_dolby_vision_stb_mode()
4474 && (vf->source_type ==
4475 VFRAME_SOURCE_TYPE_OTHERS))
4476 VSYNC_WR_MPEG_REG_BITS(
4477 VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4478 1, 29, 1);
4479#endif
4480 /* LOOP/SKIP pattern */
4481 pat = vpat[frame_par->vscale_skip_count];
4482
4483 if (type & VIDTYPE_VIU_FIELD) {
4484 loop = 0;
4485
4486 if (type & VIDTYPE_INTERLACE)
4487 pat = vpat[frame_par->vscale_skip_count >> 1];
4488 } else if (type & VIDTYPE_MVC) {
4489 loop = 0x11;
4490 if (is_need_framepacking_output()) {
4491 pat = 0;
4492 } else
4493 pat = 0x80;
4494 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
4495 loop = 0x11;
4496 pat <<= 4;
4497 } else
4498 loop = 0;
4499
4500 VSYNC_WR_MPEG_REG(
4501 VD1_IF0_RPT_LOOP + cur_dev->viu_off,
4502 (loop << VDIF_CHROMA_LOOP1_BIT) |
4503 (loop << VDIF_LUMA_LOOP1_BIT) |
4504 (loop << VDIF_CHROMA_LOOP0_BIT) |
4505 (loop << VDIF_LUMA_LOOP0_BIT));
4506 if (is_mvc)
4507 VSYNC_WR_MPEG_REG(
4508 VD2_IF0_RPT_LOOP + cur_dev->viu_off,
4509 (loop << VDIF_CHROMA_LOOP1_BIT) |
4510 (loop << VDIF_LUMA_LOOP1_BIT) |
4511 (loop << VDIF_CHROMA_LOOP0_BIT) |
4512 (loop << VDIF_LUMA_LOOP0_BIT));
4513
4514 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
4515 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
4516 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
4517 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
4518
4519 if (type & VIDTYPE_MVC) {
4520 if (is_need_framepacking_output())
4521 pat = 0;
4522 else
4523 pat = 0x88;
4524 VSYNC_WR_MPEG_REG(
4525 VD2_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
4526 VSYNC_WR_MPEG_REG(
4527 VD2_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
4528 VSYNC_WR_MPEG_REG(
4529 VD2_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
4530 VSYNC_WR_MPEG_REG(
4531 VD2_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
4532 }
4533
4534 /* picture 0/1 control */
4535 if ((((type & VIDTYPE_INTERLACE) == 0) &&
4536 ((type & VIDTYPE_VIU_FIELD) == 0) &&
4537 ((type & VIDTYPE_MVC) == 0)) ||
4538 (frame_par->vpp_2pic_mode & 0x3)) {
4539 /* progressive frame in two pictures */
4540 if (frame_par->vpp_2pic_mode & VPP_PIC1_FIRST) {
4541 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4542 cur_dev->viu_off, (2 << 26) |
4543 /* two pic mode */
4544 (2 << 24) |
4545 /* use own last line */
4546 (1 << 8) |
4547 /* toggle pic 0 and 1, use pic1 first*/
4548 (0x01));
4549 /* loop pattern */
4550 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4551 cur_dev->viu_off, (2 << 26) |
4552 /* two pic mode */
4553 (2 << 24) |
4554 /* use own last line */
4555 (1 << 8) |
4556 /* toggle pic 0 and 1,use pic1 first */
4557 (0x01));
4558 /* loop pattern */
4559 } else {
4560 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4561 cur_dev->viu_off, (2 << 26) |
4562 /* two pic mode */
4563 (2 << 24) |
4564 /* use own last line */
4565 (2 << 8) |
4566 /* toggle pic 0 and 1, use pic0 first */
4567 (0x01));
4568 /* loop pattern */
4569 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4570 cur_dev->viu_off, (2 << 26) |
4571 /* two pic mode */
4572 (2 << 24) |
4573 /* use own last line */
4574 (2 << 8) |
4575 /* toggle pic 0 and 1, use pic0 first */
4576 (0x01));
4577 /* loop pattern */
4578 }
4579 } else if (process_3d_type & MODE_3D_OUT_FA_MASK) {
4580 /*FA LR/TB output , do nothing*/
4581 } else {
4582 if (frame_par->vpp_2pic_mode & VPP_SELECT_PIC1) {
4583 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4584 cur_dev->viu_off, 0);
4585 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4586 cur_dev->viu_off, 0);
4587 if (is_mvc) {
4588 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
4589 cur_dev->viu_off, 0);
4590 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
4591 cur_dev->viu_off, 0);
4592 }
4593 } else {
4594 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
4595 cur_dev->viu_off, 0);
4596 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
4597 cur_dev->viu_off, 0);
4598 if (is_mvc) {
4599 VSYNC_WR_MPEG_REG(
4600 VD2_IF0_LUMA_PSEL +
4601 cur_dev->viu_off, 0);
4602 VSYNC_WR_MPEG_REG(
4603 VD2_IF0_CHROMA_PSEL +
4604 cur_dev->viu_off, 0);
4605 }
4606 }
4607 }
4608}
4609
4610static void vd2_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
4611{
4612 u32 r;
4613 u32 vphase, vini_phase;
4614 u32 pat, loop;
4615 static const u32 vpat[MAX_VSKIP_COUNT + 1] = {
4616 0, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
4617 u32 u, v;
4618 u32 type, bit_mode = 0;
4619
4620 if (!vf) {
4621 pr_err("vd2_set_dcu vf is NULL\n");
4622 return;
4623 }
4624
4625 type = vf->type;
4626 pr_debug("set dcu for vd2 %p, type:0x%x\n", vf, type);
4627 last_el_w = (vf->type
4628 & VIDTYPE_COMPRESS) ?
4629 vf->compWidth :
4630 vf->width;
4631 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) {
4632 if (type & VIDTYPE_COMPRESS) {
4633 r = (3 << 24) |
4634 (vpp_hold_line << 16) |
4635 ((legacy_vpp ? 1 : 2) << 14) | /* burst1 */
4636 (vf->bitdepth & BITDEPTH_MASK);
4637
4638 if (frame_par->hscale_skip_count)
4639 r |= 0x33;
4640 if (frame_par->vscale_skip_count)
4641 r |= 0xcc;
4642
4643#ifdef TV_REVERSE
4644 if (reverse)
4645 r |= (1<<26) | (1<<27);
4646#endif
4647 if (vf->bitdepth & BITDEPTH_SAVING_MODE)
4648 r |= (1<<28); /* mem_saving_mode */
4649 if (type & VIDTYPE_SCATTER)
4650 r |= (1<<29);
4651 VSYNC_WR_MPEG_REG(VD2_AFBC_MODE, r);
4652
4653 r = 0x1700;
4654 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4655 if (vf && (vf->source_type
4656 != VFRAME_SOURCE_TYPE_HDMI))
4657 r |= (1 << 19); /* dos_uncomp */
4658 }
4659 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, r);
4660
4661 r = 0x100;
4662 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4663 if (type & VIDTYPE_VIU_444)
4664 r |= 0;
4665 else if (type & VIDTYPE_VIU_422)
4666 r |= (1 << 12);
4667 else
4668 r |= (2 << 12);
4669 }
4670 VSYNC_WR_MPEG_REG(VD2_AFBC_CONV_CTRL, r);
4671
4672 u = (vf->bitdepth >> (BITDEPTH_U_SHIFT)) & 0x3;
4673 v = (vf->bitdepth >> (BITDEPTH_V_SHIFT)) & 0x3;
4674 VSYNC_WR_MPEG_REG(VD2_AFBC_DEC_DEF_COLOR,
4675 0x3FF00000 | /*Y,bit20+*/
4676 0x80 << (u + 10) |
4677 0x80 << v);
4678
4679 /* chroma formatter */
4680 r = HFORMATTER_EN |
4681 (0x8 << VFORMATTER_PHASE_BIT) |
4682 VFORMATTER_EN;
4683#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4684 if (is_meson_txlx_package_962X()
4685 && !is_dolby_vision_stb_mode()
4686 && is_dolby_vision_on()) {
4687 r |= HFORMATTER_REPEAT |
4688 HFORMATTER_YC_RATIO_2_1 |
4689 HFORMATTER_EN |
4690 VFORMATTER_ALWAYS_RPT |
4691 (0 << VFORMATTER_INIPHASE_BIT) |
4692 (0x8 << VFORMATTER_PHASE_BIT) |
4693 VFORMATTER_EN;
4694 } else
4695#endif
4696 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4697 r = HFORMATTER_YC_RATIO_2_1 |
4698 HFORMATTER_EN |
4699 VFORMATTER_RPTLINE0_EN |
4700 (0x8 << VFORMATTER_PHASE_BIT) |
4701 VFORMATTER_EN;
4702
4703 if (is_dolby_vision_on())
4704 r |= HFORMATTER_REPEAT |
4705 (0xc << VFORMATTER_INIPHASE_BIT);
4706 else
4707 r |= HFORMATTER_RRT_PIXEL0 |
4708 (0 << VFORMATTER_INIPHASE_BIT);
4709
4710 if (type & VIDTYPE_VIU_444) {
4711 r &= ~HFORMATTER_EN;
4712 r &= ~VFORMATTER_EN;
4713 r &= ~HFORMATTER_YC_RATIO_2_1;
4714 } else if (type & VIDTYPE_VIU_422) {
4715 r &= ~VFORMATTER_EN;
4716 }
4717 } else {
4718 r = HFORMATTER_YC_RATIO_2_1 |
4719 HFORMATTER_EN |
4720 VFORMATTER_RPTLINE0_EN |
4721 (0x8 << VFORMATTER_PHASE_BIT) |
4722 VFORMATTER_EN;
4723 if (is_dolby_vision_on())
4724 r |= HFORMATTER_REPEAT |
4725 (0xc << VFORMATTER_INIPHASE_BIT);
4726 else
4727 r |= HFORMATTER_RRT_PIXEL0 |
4728 (0 << VFORMATTER_INIPHASE_BIT);
4729 }
4730 VSYNC_WR_MPEG_REG(VD2_AFBC_VD_CFMT_CTRL, r);
4731
4732 if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
4733 if (type & VIDTYPE_COMPRESS_LOSS)
4734 VSYNC_WR_MPEG_REG(
4735 VD2_AFBCDEC_IQUANT_ENABLE,
4736 ((1 << 11) |
4737 (1 << 10) |
4738 (1 << 4) |
4739 (1 << 0)));
4740 else
4741 VSYNC_WR_MPEG_REG(
4742 VD2_AFBCDEC_IQUANT_ENABLE, 0);
4743 }
4744
4745 vd2_path_select(true);
4746 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG +
4747 cur_dev->viu_off, 0);
4748 return;
4749 } else {
4750 if ((vf->bitdepth & BITDEPTH_Y10) &&
4751 (!frame_par->nocomp)) {
4752 if (vf->type & VIDTYPE_VIU_444) {
4753 bit_mode = 2;
4754 } else {
4755 if (vf->bitdepth & FULL_PACK_422_MODE)
4756 bit_mode = 3;
4757 else
4758 bit_mode = 1;
4759 }
4760 } else {
4761 bit_mode = 0;
4762 }
4763 vd2_path_select(false);
4764 if (!legacy_vpp) {
4765 VSYNC_WR_MPEG_REG_BITS(
4766 G12_VD2_IF0_GEN_REG3,
4767 (bit_mode & 0x3), 8, 2);
4768 } else {
4769 VSYNC_WR_MPEG_REG_BITS(
4770 VD2_IF0_GEN_REG3 + cur_dev->viu_off,
4771 (bit_mode&0x3), 8, 2);
4772 }
4773 if (!(VSYNC_RD_MPEG_REG(VIU_MISC_CTRL1) & 0x1))
4774 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
4775 if (type & VIDTYPE_VIU_NV21)
4776 VSYNC_WR_MPEG_REG_BITS(
4777 VD2_IF0_GEN_REG2 +
4778 cur_dev->viu_off, 1, 0, 1);
4779 else
4780 VSYNC_WR_MPEG_REG_BITS(
4781 VD2_IF0_GEN_REG2 +
4782 cur_dev->viu_off, 0, 0, 1);
4783 }
4784 }
4785
4786 r = (3 << VDIF_URGENT_BIT) |
4787 (vpp_hold_line << VDIF_HOLD_LINES_BIT) |
4788 VDIF_FORMAT_SPLIT |
4789 VDIF_CHRO_RPT_LAST | VDIF_ENABLE;
4790 /* | VDIF_RESET_ON_GO_FIELD;*/
4791 if (debug_flag & DEBUG_FLAG_GOFIELD_MANUL)
4792 r |= 1<<7; /*for manul triggle gofiled.*/
4793
4794 if ((type & VIDTYPE_VIU_SINGLE_PLANE) == 0)
4795 r |= VDIF_SEPARATE_EN;
4796 else {
4797 if (type & VIDTYPE_VIU_422)
4798 r |= VDIF_FORMAT_422;
4799 else {
4800 r |= VDIF_FORMAT_RGB888_YUV444 |
4801 VDIF_DEMUX_MODE_RGB_444;
4802 }
4803 }
4804
4805 if (frame_par->hscale_skip_count)
4806 r |= VDIF_CHROMA_HZ_AVG | VDIF_LUMA_HZ_AVG;
4807
4808 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG + cur_dev->viu_off, r);
4809
4810#ifdef TV_REVERSE
4811 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) {
4812 if (reverse) {
4813 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4814 cur_dev->viu_off), 0xf, 2, 4);
4815 } else {
4816 VSYNC_WR_MPEG_REG_BITS((VD2_IF0_GEN_REG2 +
4817 cur_dev->viu_off), 0, 2, 4);
4818 }
4819 }
4820#endif
4821
4822 /* chroma formatter */
4823 if (type & VIDTYPE_VIU_444) {
4824 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4825 HFORMATTER_YC_RATIO_1_1);
4826 } else if (type & VIDTYPE_VIU_FIELD) {
4827 vini_phase = 0xc << VFORMATTER_INIPHASE_BIT;
4828 vphase =
4829 ((type & VIDTYPE_VIU_422) ? 0x10 : 0x08) <<
4830 VFORMATTER_PHASE_BIT;
4831 if (is_meson_txlx_package_962X()
4832 && !is_dolby_vision_stb_mode()
4833 && is_dolby_vision_on()) {
4834 VSYNC_WR_MPEG_REG(
4835 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4836 HFORMATTER_REPEAT |
4837 HFORMATTER_YC_RATIO_2_1 |
4838 HFORMATTER_EN |
4839 VFORMATTER_ALWAYS_RPT |
4840 (0 << VFORMATTER_INIPHASE_BIT) |
4841 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4842 << VFORMATTER_PHASE_BIT) |
4843 VFORMATTER_EN);
4844 pr_debug("\tvd2 set fmt(dovi tv)\n");
4845 } else if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
4846 is_meson_txlx_cpu()) {
4847 if ((vf->width >= 3840) &&
4848 (vf->height >= 2160) &&
4849 (type & VIDTYPE_VIU_422)) {
4850 VSYNC_WR_MPEG_REG(
4851 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4852 HFORMATTER_RRT_PIXEL0 |
4853 HFORMATTER_YC_RATIO_2_1 |
4854 HFORMATTER_EN | VFORMATTER_RPTLINE0_EN |
4855 vini_phase | vphase);
4856 } else {
4857 VSYNC_WR_MPEG_REG(
4858 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4859 (is_dolby_vision_on() ?
4860 HFORMATTER_REPEAT : 0) |
4861 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4862 VFORMATTER_RPTLINE0_EN |
4863 vini_phase | vphase |
4864 VFORMATTER_EN);
4865 }
4866 } else {
4867 VSYNC_WR_MPEG_REG(
4868 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4869 (is_dolby_vision_on() ?
4870 HFORMATTER_REPEAT : 0) |
4871 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4872 VFORMATTER_RPTLINE0_EN | vini_phase | vphase |
4873 VFORMATTER_EN);
4874 }
4875 } else if (type & VIDTYPE_MVC) {
4876 VSYNC_WR_MPEG_REG(VIU_VD1_FMT_CTRL + cur_dev->viu_off,
4877 HFORMATTER_YC_RATIO_2_1 |
4878 HFORMATTER_EN |
4879 VFORMATTER_RPTLINE0_EN |
4880 (0xe << VFORMATTER_INIPHASE_BIT) |
4881 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4882 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4883 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4884 HFORMATTER_YC_RATIO_2_1 | HFORMATTER_EN |
4885 VFORMATTER_RPTLINE0_EN | (0xa <<
4886 VFORMATTER_INIPHASE_BIT) |
4887 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4888 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4889 } else if ((type & VIDTYPE_INTERLACE)
4890 &&
4891 (((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP))) {
4892 VSYNC_WR_MPEG_REG(VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4893 HFORMATTER_YC_RATIO_2_1 |
4894 HFORMATTER_EN |
4895 VFORMATTER_RPTLINE0_EN |
4896 (0xe << VFORMATTER_INIPHASE_BIT) |
4897 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4898 << VFORMATTER_PHASE_BIT) |
4899 VFORMATTER_EN);
4900 } else {
4901 if (is_meson_txlx_package_962X()
4902 && !is_dolby_vision_stb_mode()
4903 && is_dolby_vision_on()) {
4904 VSYNC_WR_MPEG_REG(
4905 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4906 HFORMATTER_REPEAT |
4907 HFORMATTER_YC_RATIO_2_1 |
4908 HFORMATTER_EN |
4909 VFORMATTER_ALWAYS_RPT |
4910 (0 << VFORMATTER_INIPHASE_BIT) |
4911 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4912 << VFORMATTER_PHASE_BIT) |
4913 VFORMATTER_EN);
4914 pr_info("\tvd2 set fmt(dovi tv)\n");
4915 } else {
4916 VSYNC_WR_MPEG_REG(
4917 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4918 (is_dolby_vision_on() ?
4919 HFORMATTER_REPEAT : 0) |
4920 HFORMATTER_YC_RATIO_2_1 |
4921 HFORMATTER_EN |
4922 VFORMATTER_RPTLINE0_EN |
4923 (0xc << VFORMATTER_INIPHASE_BIT) |
4924 (((type & VIDTYPE_VIU_422) ? 0x10 : 0x08)
4925 << VFORMATTER_PHASE_BIT) | VFORMATTER_EN);
4926 pr_info("\tvd2 set fmt(dovi:%d)\n",
4927 /*is_dolby_vision_on()*/0);
4928 }
4929 }
4930#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
4931 if ((is_meson_txlx_cpu()
4932 || is_meson_g12a_cpu()
4933 || is_meson_g12b_cpu())
4934 && is_dolby_vision_on()
4935 && is_dolby_vision_stb_mode()
4936 && (vf->source_type ==
4937 VFRAME_SOURCE_TYPE_OTHERS))
4938 VSYNC_WR_MPEG_REG_BITS(
4939 VIU_VD2_FMT_CTRL + cur_dev->viu_off,
4940 1, 29, 1);
4941#endif
4942 /* LOOP/SKIP pattern */
4943 pat = vpat[frame_par->vscale_skip_count];
4944
4945 if (type & VIDTYPE_VIU_FIELD) {
4946 loop = 0;
4947
4948 if (type & VIDTYPE_INTERLACE)
4949 pat = vpat[frame_par->vscale_skip_count >> 1];
4950 } else if (type & VIDTYPE_MVC) {
4951 loop = 0x11;
4952 pat = 0x80;
4953 } else if ((type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP) {
4954 loop = 0x11;
4955 pat <<= 4;
4956 } else
4957 loop = 0;
4958
4959 VSYNC_WR_MPEG_REG(
4960 VD2_IF0_RPT_LOOP + cur_dev->viu_off,
4961 (loop << VDIF_CHROMA_LOOP1_BIT) |
4962 (loop << VDIF_LUMA_LOOP1_BIT) |
4963 (loop << VDIF_CHROMA_LOOP0_BIT) |
4964 (loop << VDIF_LUMA_LOOP0_BIT));
4965
4966 if (type & VIDTYPE_MVC)
4967 pat = 0x88;
4968
4969 VSYNC_WR_MPEG_REG(
4970 VD2_IF0_LUMA0_RPT_PAT + cur_dev->viu_off, pat);
4971 VSYNC_WR_MPEG_REG(
4972 VD2_IF0_CHROMA0_RPT_PAT + cur_dev->viu_off, pat);
4973 VSYNC_WR_MPEG_REG(
4974 VD2_IF0_LUMA1_RPT_PAT + cur_dev->viu_off, pat);
4975 VSYNC_WR_MPEG_REG(
4976 VD2_IF0_CHROMA1_RPT_PAT + cur_dev->viu_off, pat);
4977
4978 if (platform_type == 0) {
4979 /* picture 0/1 control */
4980 if (((type & VIDTYPE_INTERLACE) == 0) &&
4981 ((type & VIDTYPE_VIU_FIELD) == 0) &&
4982 ((type & VIDTYPE_MVC) == 0)) {
4983 /* progressive frame in two pictures */
4984
4985 } else {
4986 VSYNC_WR_MPEG_REG(
4987 VD2_IF0_LUMA_PSEL + cur_dev->viu_off, 0);
4988 VSYNC_WR_MPEG_REG(
4989 VD2_IF0_CHROMA_PSEL + cur_dev->viu_off, 0);
4990 }
4991 } else {
4992 /* picture 0/1 control */
4993 if ((((type & VIDTYPE_INTERLACE) == 0) &&
4994 ((type & VIDTYPE_VIU_FIELD) == 0) &&
4995 ((type & VIDTYPE_MVC) == 0)) ||
4996 (next_frame_par->vpp_2pic_mode & 0x3)) {
4997 /* progressive frame in two pictures */
4998
4999 } else {
5000 if (next_frame_par->vpp_2pic_mode & VPP_SELECT_PIC1) {
5001 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
5002 cur_dev->viu_off, 0);
5003 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
5004 cur_dev->viu_off, 0);
5005 } else {
5006 VSYNC_WR_MPEG_REG(
5007 VD2_IF0_LUMA_PSEL +
5008 cur_dev->viu_off, 0);
5009 VSYNC_WR_MPEG_REG(
5010 VD2_IF0_CHROMA_PSEL +
5011 cur_dev->viu_off, 0);
5012 }
5013 }
5014 }
5015}
5016
5017static int detect_vout_type(void)
5018{
5019 int vout_type = VOUT_TYPE_PROG;
5020 if ((vinfo) && (vinfo->field_height != vinfo->height)) {
5021 if ((vinfo->height == 576) || (vinfo->height == 480))
5022 vout_type = (READ_VCBUS_REG(ENCI_INFO_READ) &
5023 (1 << 29)) ?
5024 VOUT_TYPE_BOT_FIELD : VOUT_TYPE_TOP_FIELD;
5025 else if (vinfo->height == 1080)
5026 vout_type = (((READ_VCBUS_REG(ENCP_INFO_READ) >> 16) &
5027 0x1fff) < 562) ?
5028 VOUT_TYPE_TOP_FIELD : VOUT_TYPE_BOT_FIELD;
5029
5030#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
5031 if (is_vsync_rdma_enable()) {
5032 if (vout_type == VOUT_TYPE_TOP_FIELD)
5033 vout_type = VOUT_TYPE_BOT_FIELD;
5034 else if (vout_type == VOUT_TYPE_BOT_FIELD)
5035 vout_type = VOUT_TYPE_TOP_FIELD;
5036 }
5037#endif
5038 }
5039 return vout_type;
5040}
5041
5042#ifdef INTERLACE_FIELD_MATCH_PROCESS
5043static inline bool interlace_field_type_need_match(int vout_type,
5044 struct vframe_s *vf)
5045{
5046 if (DUR2PTS(vf->duration) != vsync_pts_inc)
5047 return false;
5048
5049 if ((vout_type == VOUT_TYPE_TOP_FIELD) &&
5050 ((vf->type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_BOTTOM))
5051 return true;
5052 else if ((vout_type == VOUT_TYPE_BOT_FIELD) &&
5053 ((vf->type & VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP))
5054 return true;
5055
5056 return false;
5057}
5058#endif
5059
5060static int calc_hold_line(void)
5061{
5062 if ((READ_VCBUS_REG(ENCI_VIDEO_EN) & 1) == 0)
5063 return READ_VCBUS_REG(ENCP_VIDEO_VAVON_BLINE) >> 1;
5064 else
5065 return READ_VCBUS_REG(ENCP_VFIFO2VD_LINE_TOP_START) >> 1;
5066}
5067
5068/* add a new function to check if current display frame has been*/
5069/*displayed for its duration */
5070static inline bool duration_expire(struct vframe_s *cur_vf,
5071 struct vframe_s *next_vf, u32 dur)
5072{
5073 u32 pts;
5074 s32 dur_disp;
5075 static s32 rpt_tab_idx;
5076 static const u32 rpt_tab[4] = { 0x100, 0x100, 0x300, 0x300 };
5077
5078 /* do not switch to new frames in none-normal speed */
5079 if (vsync_slow_factor > 1000)
5080 return false;
5081
5082 if ((cur_vf == NULL) || (cur_dispbuf == &vf_local))
5083 return true;
5084
5085 pts = next_vf->pts;
5086 if (pts == 0)
5087 dur_disp = DUR2PTS(cur_vf->duration);
5088 else
5089 dur_disp = pts - timestamp_vpts_get();
5090
5091 if ((dur << 8) >= (dur_disp * rpt_tab[rpt_tab_idx & 3])) {
5092 rpt_tab_idx = (rpt_tab_idx + 1) & 3;
5093 return true;
5094 } else
5095 return false;
5096}
5097
5098#define VPTS_RESET_THRO
5099
5100#ifdef PTS_LOGGING
5101static inline void vpts_perform_pulldown(struct vframe_s *next_vf,
5102 bool *expired)
5103{
5104 int pattern_range, expected_curr_interval;
5105 int expected_prev_interval;
5106
5107 /* Dont do anything if we have invalid data */
5108 if (!next_vf || !next_vf->pts || !next_vf->next_vf_pts_valid)
5109 return;
5110
5111 switch (pts_pattern_detected) {
5112 case PTS_32_PATTERN:
5113 pattern_range = PTS_32_PATTERN_DETECT_RANGE;
5114 switch (pre_pts_trace) {
5115 case 3:
5116 expected_prev_interval = 3;
5117 expected_curr_interval = 2;
5118 break;
5119 case 2:
5120 expected_prev_interval = 2;
5121 expected_curr_interval = 3;
5122 break;
5123 default:
5124 return;
5125 }
5126 break;
5127 case PTS_22_PATTERN:
5128 if (pre_pts_trace != 2)
5129 return;
5130 pattern_range = PTS_22_PATTERN_DETECT_RANGE;
5131 expected_prev_interval = 2;
5132 expected_curr_interval = 2;
5133 break;
5134 case PTS_41_PATTERN:
5135 /* TODO */
5136 default:
5137 return;
5138 }
5139
5140 /* We do nothing if we dont have enough data*/
5141 if (pts_pattern[pts_pattern_detected] != pattern_range)
5142 return;
5143
5144 if (*expired) {
5145 if (pts_trace < expected_curr_interval) {
5146 /* 2323232323..2233..2323, prev=2, curr=3,*/
5147 /* check if next frame will toggle after 3 vsyncs */
5148 /* 22222...22222 -> 222..2213(2)22...22 */
5149 /* check if next frame will toggle after 3 vsyncs */
5150 int nextPts = timestamp_pcrscr_get() + vsync_pts_align;
5151
5152 if (/*((int)(nextPts + expected_prev_interval * */
5153 /*vsync_pts_inc - next_vf->next_vf_pts) < 0) && */
5154 ((int)(nextPts + (expected_prev_interval + 1) *
5155 vsync_pts_inc - next_vf->next_vf_pts) >= 0)) {
5156 *expired = false;
5157 if (pts_log_enable[PTS_32_PATTERN]
5158 || pts_log_enable[PTS_22_PATTERN])
5159 pr_info("hold frame for pattern: %d",
5160 pts_pattern_detected);
5161 }
5162
5163 /* here need to escape a vsync */
5164 if (timestamp_pcrscr_get() >
5165 (next_vf->pts + vsync_pts_inc)) {
5166 *expired = true;
5167 pts_escape_vsync = 1;
5168 if (pts_log_enable[PTS_32_PATTERN]
5169 || pts_log_enable[PTS_22_PATTERN])
5170 pr_info("escape a vsync pattern: %d",
5171 pts_pattern_detected);
5172 }
5173 }
5174 } else {
5175 if (pts_trace == expected_curr_interval) {
5176 /* 23232323..233223...2323 curr=2, prev=3 */
5177 /* check if this frame will expire next vsyncs and */
5178 /* next frame will expire after 3 vsyncs */
5179 /* 22222...22222 -> 222..223122...22 */
5180 /* check if this frame will expire next vsyncs and */
5181 /* next frame will expire after 2 vsyncs */
5182 int nextPts = timestamp_pcrscr_get() + vsync_pts_align;
5183
5184 if (((int)(nextPts + vsync_pts_inc - next_vf->pts)
5185 >= 0) &&
5186 ((int)(nextPts +
5187 vsync_pts_inc * (expected_prev_interval - 1)
5188 - next_vf->next_vf_pts) < 0) &&
5189 ((int)(nextPts + expected_prev_interval *
5190 vsync_pts_inc - next_vf->next_vf_pts) >= 0)) {
5191 *expired = true;
5192 if (pts_log_enable[PTS_32_PATTERN]
5193 || pts_log_enable[PTS_22_PATTERN])
5194 pr_info("pull frame for pattern: %d",
5195 pts_pattern_detected);
5196 }
5197 }
5198 }
5199}
5200#endif
5201
5202static inline bool vpts_expire(struct vframe_s *cur_vf,
5203 struct vframe_s *next_vf,
5204 int toggled_cnt)
5205{
5206 u32 pts;
5207#ifdef VIDEO_PTS_CHASE
5208 u32 vid_pts, scr_pts;
5209#endif
5210 u32 systime;
5211 u32 adjust_pts, org_vpts;
5212 bool expired;
5213
5214 if (next_vf == NULL)
5215 return false;
5216
5217 if (videopeek) {
5218 videopeek = false;
5219 pr_info("video peek toogle the first frame\n");
5220 return true;
5221 }
5222
5223 if (debug_flag & DEBUG_FLAG_TOGGLE_FRAME_PER_VSYNC)
5224 return true;
5225 if (/*(cur_vf == NULL) || (cur_dispbuf == &vf_local) ||*/ debugflags &
5226 DEBUG_FLAG_FFPLAY)
5227 return true;
5228
5229 if ((freerun_mode == FREERUN_NODUR) || hdmi_in_onvideo)
5230 return true;
5231 /*freerun for game mode*/
5232 if (next_vf->flag & VFRAME_FLAG_GAME_MODE)
5233 return true;
5234
5235 if (step_enable) {
5236 if (step_flag)
5237 return false;
5238 if (!step_flag) {
5239 step_flag = 1;
5240 return true;
5241 }
5242 }
5243
5244 if ((trickmode_i == 1) || ((trickmode_fffb == 1))) {
5245 if (((atomic_read(&trickmode_framedone) == 0)
5246 || (trickmode_i == 1)) && (!to_notify_trick_wait)
5247 && (trickmode_duration_count <= 0)) {
5248#if 0
5249 if (cur_vf)
5250 pts = timestamp_vpts_get() +
5251 trickmode_duration;
5252 else
5253 return true;
5254#else
5255 return true;
5256#endif
5257 } else
5258 return false;
5259 }
5260 if (omx_secret_mode && (!omx_run || !omx_drop_done))
5261 return false;
5262
5263 if (next_vf->duration == 0)
5264
5265 return true;
5266
5267 systime = timestamp_pcrscr_get();
5268 pts = next_vf->pts;
5269
5270 if (((pts == 0) && (cur_dispbuf != &vf_local))
5271 || (freerun_mode == FREERUN_DUR)) {
5272 pts =
5273 timestamp_vpts_get() +
5274 (cur_vf ? DUR2PTS(cur_vf->duration) : 0);
5275 }
5276 /* check video PTS discontinuity */
5277 else if ((enable_video_discontinue_report) &&
5278 (first_frame_toggled) &&
5279 (abs(systime - pts) > tsync_vpts_discontinuity_margin()) &&
5280 ((next_vf->flag & VFRAME_FLAG_NO_DISCONTINUE) == 0)) {
5281 /*
5282 * if paused ignore discontinue
5283 */
5284 if (!timestamp_pcrscr_enable_state()) {
5285 /*pr_info("video pts discontinue,
5286 * but pcrscr is disabled,
5287 * return false\n");
5288 */
5289 return false;
5290 }
5291 pts =
5292 timestamp_vpts_get() +
5293 (cur_vf ? DUR2PTS(cur_vf->duration) : 0);
5294 /* pr_info("system=0x%x vpts=0x%x\n", systime,*/
5295 /*timestamp_vpts_get()); */
5296 if ((int)(systime - pts) >= 0) {
5297 if (next_vf->pts != 0)
5298 tsync_avevent_locked(VIDEO_TSTAMP_DISCONTINUITY,
5299 next_vf->pts);
5300 else if (next_vf->pts == 0 &&
5301 (tsync_get_mode() != TSYNC_MODE_PCRMASTER))
5302 tsync_avevent_locked(VIDEO_TSTAMP_DISCONTINUITY,
5303 pts);
5304
5305 /* pr_info("discontinue,
5306 * systime=0x%x vpts=0x%x next_vf->pts = 0x%x\n",
5307 * systime,
5308 * pts,
5309 * next_vf->pts);
5310 */
5311
5312 /* pts==0 is a keep frame maybe. */
5313 if (systime > next_vf->pts || next_vf->pts == 0)
5314 return true;
5315 if (omx_secret_mode == true)
5316 return true;
5317
5318 return false;
5319 } else if (omx_secret_mode == true)
5320 return true;
5321 } else if (omx_run
5322 && omx_secret_mode
5323 && (omx_pts + omx_pts_interval_upper < next_vf->pts)
5324 && (abs(omx_pts_set_index - next_vf->omx_index) <= 16)
5325 && (omx_pts_set_index >= next_vf->omx_index)) {
5326 pr_info("omx, omx_pts=%d omx_pts_set_index=%d pts=%d omx_index=%d\n",
5327 omx_pts,
5328 omx_pts_set_index,
5329 next_vf->pts,
5330 next_vf->omx_index);
5331 return true;
5332 }
5333#if 1
5334 if (vsync_pts_inc_upint && (!freerun_mode)) {
5335 struct vframe_states frame_states;
5336 u32 delayed_ms, t1, t2;
5337
5338 delayed_ms =
5339 calculation_stream_delayed_ms(PTS_TYPE_VIDEO, &t1, &t2);
5340 if (video_vf_get_states(&frame_states) == 0) {
5341 u32 pcr = timestamp_pcrscr_get();
5342 u32 vpts = timestamp_vpts_get();
5343 u32 diff = pcr - vpts;
5344
5345 if (delayed_ms > 200) {
5346 vsync_freerun++;
5347 if (pcr < next_vf->pts
5348 || pcr < vpts + next_vf->duration) {
5349 if (next_vf->pts > 0) {
5350 timestamp_pcrscr_set
5351 (next_vf->pts);
5352 } else {
5353 timestamp_pcrscr_set(vpts +
5354 next_vf->duration);
5355 }
5356 }
5357 return true;
5358 } else if ((frame_states.buf_avail_num >= 3)
5359 && diff < vsync_pts_inc << 2) {
5360 vsync_pts_inc_adj =
5361 vsync_pts_inc + (vsync_pts_inc >> 2);
5362 vsync_pts_125++;
5363 } else if ((frame_states.buf_avail_num >= 2
5364 && diff < vsync_pts_inc << 1)) {
5365 vsync_pts_inc_adj =
5366 vsync_pts_inc + (vsync_pts_inc >> 3);
5367 vsync_pts_112++;
5368 } else if (frame_states.buf_avail_num >= 1
5369 && diff < vsync_pts_inc - 20) {
5370 vsync_pts_inc_adj = vsync_pts_inc + 10;
5371 vsync_pts_101++;
5372 } else {
5373 vsync_pts_inc_adj = 0;
5374 vsync_pts_100++;
5375 }
5376 }
5377 }
5378#endif
5379
5380#ifdef VIDEO_PTS_CHASE
5381 vid_pts = timestamp_vpts_get();
5382 scr_pts = timestamp_pcrscr_get();
5383 vid_pts += vsync_pts_inc;
5384
5385 if (av_sync_flag) {
5386 if (vpts_chase) {
5387 if ((abs(vid_pts - scr_pts) < 6000)
5388 || (abs(vid_pts - scr_pts) > 90000)) {
5389 vpts_chase = 0;
5390 pr_info("leave vpts chase mode, diff:%d\n",
5391 vid_pts - scr_pts);
5392 }
5393 } else if ((abs(vid_pts - scr_pts) > 9000)
5394 && (abs(vid_pts - scr_pts) < 90000)) {
5395 vpts_chase = 1;
5396 if (vid_pts < scr_pts)
5397 vpts_chase_pts_diff = 50;
5398 else
5399 vpts_chase_pts_diff = -50;
5400 vpts_chase_counter =
5401 ((int)(scr_pts - vid_pts)) / vpts_chase_pts_diff;
5402 pr_info("enter vpts chase mode, diff:%d\n",
5403 vid_pts - scr_pts);
5404 } else if (abs(vid_pts - scr_pts) >= 90000) {
5405 pr_info("video pts discontinue, diff:%d\n",
5406 vid_pts - scr_pts);
5407 }
5408 } else
5409 vpts_chase = 0;
5410
5411 if (vpts_chase) {
5412 u32 curr_pts =
5413 scr_pts - vpts_chase_pts_diff * vpts_chase_counter;
5414
5415 /* pr_info("vchase pts %d, %d, %d, %d, %d\n",*/
5416 /*curr_pts, scr_pts, curr_pts-scr_pts, vid_pts, vpts_chase_counter); */
5417 return ((int)(curr_pts - pts)) >= 0;
5418 } else {
5419 int aud_start = (timestamp_apts_get() != -1);
5420
5421 if (!av_sync_flag && aud_start && (abs(scr_pts - pts) < 9000)
5422 && ((int)(scr_pts - pts) < 0)) {
5423 av_sync_flag = 1;
5424 pr_info("av sync ok\n");
5425 }
5426 return ((int)(scr_pts - pts)) >= 0;
5427 }
5428#else
5429 if (smooth_sync_enable) {
5430 org_vpts = timestamp_vpts_get();
5431 if ((abs(org_vpts + vsync_pts_inc - systime) <
5432 M_PTS_SMOOTH_MAX)
5433 && (abs(org_vpts + vsync_pts_inc - systime) >
5434 M_PTS_SMOOTH_MIN)) {
5435
5436 if (!video_frame_repeat_count) {
5437 vpts_ref = org_vpts;
5438 video_frame_repeat_count++;
5439 }
5440
5441 if ((int)(org_vpts + vsync_pts_inc - systime) > 0) {
5442 adjust_pts =
5443 vpts_ref + (vsync_pts_inc -
5444 M_PTS_SMOOTH_ADJUST) *
5445 video_frame_repeat_count;
5446 } else {
5447 adjust_pts =
5448 vpts_ref + (vsync_pts_inc +
5449 M_PTS_SMOOTH_ADJUST) *
5450 video_frame_repeat_count;
5451 }
5452
5453 return (int)(adjust_pts - pts) >= 0;
5454 }
5455
5456 if (video_frame_repeat_count) {
5457 vpts_ref = 0;
5458 video_frame_repeat_count = 0;
5459 }
5460 }
5461
5462 expired = (int)(timestamp_pcrscr_get() + vsync_pts_align - pts) >= 0;
5463
5464#ifdef PTS_THROTTLE
5465 if (expired && next_vf && next_vf->next_vf_pts_valid &&
5466 (vsync_slow_factor == 1) &&
5467 next_vf->next_vf_pts &&
5468 (toggled_cnt > 0) &&
5469 ((int)(timestamp_pcrscr_get() + vsync_pts_inc +
5470 vsync_pts_align - next_vf->next_vf_pts) < 0)) {
5471 expired = false;
5472 } else if (!expired && next_vf && next_vf->next_vf_pts_valid &&
5473 (vsync_slow_factor == 1) &&
5474 next_vf->next_vf_pts &&
5475 (toggled_cnt == 0) &&
5476 ((int)(timestamp_pcrscr_get() + vsync_pts_inc +
5477 vsync_pts_align - next_vf->next_vf_pts) >= 0)) {
5478 expired = true;
5479 }
5480#endif
5481
5482#ifdef PTS_LOGGING
5483 if (pts_enforce_pulldown) {
5484 /* Perform Pulldown if needed*/
5485 vpts_perform_pulldown(next_vf, &expired);
5486 }
5487#endif
5488 return expired;
5489#endif
5490}
5491
5492static void vsync_notify(void)
5493{
5494 if (video_notify_flag & VIDEO_NOTIFY_TRICK_WAIT) {
5495 wake_up_interruptible(&amvideo_trick_wait);
5496 video_notify_flag &= ~VIDEO_NOTIFY_TRICK_WAIT;
5497 }
5498 if (video_notify_flag & VIDEO_NOTIFY_FRAME_WAIT) {
5499 video_notify_flag &= ~VIDEO_NOTIFY_FRAME_WAIT;
5500 vf_notify_provider(RECEIVER_NAME,
5501 VFRAME_EVENT_RECEIVER_FRAME_WAIT, NULL);
5502 }
5503#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
5504 if (video_notify_flag & VIDEO_NOTIFY_POS_CHANGED) {
5505 video_notify_flag &= ~VIDEO_NOTIFY_POS_CHANGED;
5506 vf_notify_provider(RECEIVER_NAME,
5507 VFRAME_EVENT_RECEIVER_POS_CHANGED, NULL);
5508 }
5509#endif
5510 if (video_notify_flag &
5511 (VIDEO_NOTIFY_PROVIDER_GET | VIDEO_NOTIFY_PROVIDER_PUT)) {
5512 int event = 0;
5513
5514 if (video_notify_flag & VIDEO_NOTIFY_PROVIDER_GET)
5515 event |= VFRAME_EVENT_RECEIVER_GET;
5516 if (video_notify_flag & VIDEO_NOTIFY_PROVIDER_PUT)
5517 event |= VFRAME_EVENT_RECEIVER_PUT;
5518
5519 vf_notify_provider(RECEIVER_NAME, event, NULL);
5520
5521 video_notify_flag &=
5522 ~(VIDEO_NOTIFY_PROVIDER_GET | VIDEO_NOTIFY_PROVIDER_PUT);
5523 }
5524#ifdef CONFIG_CLK81_DFS
5525 check_and_set_clk81();
5526#endif
5527
5528#ifdef CONFIG_GAMMA_PROC
5529 gamma_adjust();
5530#endif
5531
5532}
5533
5534#ifdef FIQ_VSYNC
5535static irqreturn_t vsync_bridge_isr(int irq, void *dev_id)
5536{
5537 vsync_notify();
5538
5539 return IRQ_HANDLED;
5540}
5541#endif
5542
5543int get_vsync_count(unsigned char reset)
5544{
5545 if (reset)
5546 vsync_count = 0;
5547 return vsync_count;
5548}
5549EXPORT_SYMBOL(get_vsync_count);
5550
5551int get_vsync_pts_inc_mode(void)
5552{
5553 return vsync_pts_inc_upint;
5554}
5555EXPORT_SYMBOL(get_vsync_pts_inc_mode);
5556
5557void set_vsync_pts_inc_mode(int inc)
5558{
5559 vsync_pts_inc_upint = inc;
5560}
5561EXPORT_SYMBOL(set_vsync_pts_inc_mode);
5562
5563#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
5564void vsync_rdma_process(void)
5565{
5566 vsync_rdma_config();
5567}
5568#endif
5569
5570/* #ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2 */
5571static enum vmode_e old_vmode = VMODE_MAX;
5572/* #endif */
5573static enum vmode_e new_vmode = VMODE_MAX;
5574static inline bool video_vf_disp_mode_check(struct vframe_s *vf)
5575{
5576 struct provider_disp_mode_req_s req;
5577 int ret = -1;
5578 req.vf = vf;
5579 req.disp_mode = 0;
5580 req.req_mode = 1;
5581
5582 if (is_dolby_vision_enable()) {
5583 ret = vf_notify_provider_by_name("dv_vdin",
5584 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5585 if (ret == -1)
5586 vf_notify_provider_by_name("vdin0",
5587 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5588 } else
5589 vf_notify_provider_by_name("vdin0",
5590 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5591 if (req.disp_mode == VFRAME_DISP_MODE_OK)
5592 return false;
5593 /*whether need to check pts??*/
5594 video_vf_put(vf);
5595 return true;
5596}
5597static enum vframe_disp_mode_e video_vf_disp_mode_get(struct vframe_s *vf)
5598{
5599 struct provider_disp_mode_req_s req;
5600 int ret = -1;
5601 req.vf = vf;
5602 req.disp_mode = 0;
5603 req.req_mode = 0;
5604
5605 if (is_dolby_vision_enable()) {
5606 ret = vf_notify_provider_by_name("dv_vdin",
5607 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5608 if (ret == -1)
5609 vf_notify_provider_by_name("vdin0",
5610 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5611 } else
5612 vf_notify_provider_by_name("vdin0",
5613 VFRAME_EVENT_RECEIVER_DISP_MODE, (void *)&req);
5614 return req.disp_mode;
5615}
5616static inline bool video_vf_dirty_put(struct vframe_s *vf)
5617{
5618 if (!vf->frame_dirty)
5619 return false;
5620 if (cur_dispbuf != vf) {
5621 if (vf->pts != 0) {
5622 amlog_mask(LOG_MASK_TIMESTAMP,
5623 "vpts to vf->pts:0x%x,scr:0x%x,abs_scr: 0x%x\n",
5624 vf->pts, timestamp_pcrscr_get(),
5625 READ_MPEG_REG(SCR_HIU));
5626 timestamp_vpts_set(vf->pts);
5627 } else if (cur_dispbuf) {
5628 amlog_mask(LOG_MASK_TIMESTAMP,
5629 "vpts inc:0x%x,scr: 0x%x, abs_scr: 0x%x\n",
5630 timestamp_vpts_get() +
5631 DUR2PTS(cur_dispbuf->duration),
5632 timestamp_pcrscr_get(),
5633 READ_MPEG_REG(SCR_HIU));
5634 timestamp_vpts_inc(
5635 DUR2PTS(cur_dispbuf->duration));
5636
5637 vpts_remainder +=
5638 DUR2PTS_RM(cur_dispbuf->duration);
5639 if (vpts_remainder >= 0xf) {
5640 vpts_remainder -= 0xf;
5641 timestamp_vpts_inc(-1);
5642 }
5643 }
5644 }
5645 video_vf_put(vf);
5646 return true;
5647
5648}
5649#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
5650struct vframe_s *dolby_vision_toggle_frame(struct vframe_s *vf)
5651{
5652 struct vframe_s *toggle_vf = NULL;
5653 int width_bl, width_el;
5654 int height_bl, height_el;
5655 int ret = dolby_vision_update_metadata(vf);
5656
5657 cur_dispbuf2 = dolby_vision_vf_peek_el(vf);
5658 if (cur_dispbuf2) {
5659 if (cur_dispbuf2->type & VIDTYPE_COMPRESS) {
5660 VSYNC_WR_MPEG_REG(VD2_AFBC_HEAD_BADDR,
5661 cur_dispbuf2->compHeadAddr>>4);
5662 VSYNC_WR_MPEG_REG(VD2_AFBC_BODY_BADDR,
5663 cur_dispbuf2->compBodyAddr>>4);
5664 } else {
5665 vframe_canvas_set(&cur_dispbuf2->canvas0_config[0],
5666 cur_dispbuf2->plane_num,
5667 &disp_canvas_index[rdma_canvas_id][3]);
5668 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS0 + cur_dev->viu_off,
5669 disp_canvas[rdma_canvas_id][1]);
5670 VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 + cur_dev->viu_off,
5671 disp_canvas[rdma_canvas_id][1]);
5672 }
5673
5674 width_el = (cur_dispbuf2->type
5675 & VIDTYPE_COMPRESS) ?
5676 cur_dispbuf2->compWidth :
5677 cur_dispbuf2->width;
5678 if (!(cur_dispbuf2->type & VIDTYPE_VD2)) {
5679 width_bl = (vf->type
5680 & VIDTYPE_COMPRESS) ?
5681 vf->compWidth :
5682 vf->width;
5683 if (width_el >= width_bl)
5684 width_el = width_bl;
5685 else if (width_el != width_bl / 2)
5686 width_el = width_bl / 2;
5687 }
5688 ori2_start_x_lines = 0;
5689 ori2_end_x_lines =
5690 width_el - 1;
5691
5692 height_el = (cur_dispbuf2->type
5693 & VIDTYPE_COMPRESS) ?
5694 cur_dispbuf2->compHeight :
5695 cur_dispbuf2->height;
5696 if (!(cur_dispbuf2->type & VIDTYPE_VD2)) {
5697 height_bl = (vf->type
5698 & VIDTYPE_COMPRESS) ?
5699 vf->compHeight :
5700 vf->height;
5701 if (height_el >= height_bl)
5702 height_el = height_bl;
5703 else if (height_el != height_bl / 2)
5704 height_el = height_bl / 2;
5705 }
5706 ori2_start_y_lines = 0;
5707 ori2_end_y_lines =
5708 height_el - 1;
5709 }
5710 if (ret == 0) {
5711 /* setting generated for this frame */
5712 /* or DOVI in bypass mode */
5713 toggle_vf = vf;
5714 dolby_vision_set_toggle_flag(1);
5715 } else {
5716 /* fail generating setting for this frame */
5717 toggle_vf = NULL;
5718 dolby_vision_set_toggle_flag(0);
5719 }
5720 return toggle_vf;
5721}
5722
5723static int dolby_vision_need_wait(void)
5724{
5725 struct vframe_s *vf;
5726
5727 vf = video_vf_peek();
5728 if (!vf || (dolby_vision_wait_metadata(vf) == 1))
5729 return 1;
5730 return 0;
5731}
5732#endif
5733/* patch for 4k2k bandwidth issue, skiw mali and vpu mif */
5734static void dmc_adjust_for_mali_vpu(unsigned int width,
5735 unsigned int height, bool force_adjust)
5736{
5737 if (toggle_count == last_toggle_count)
5738 toggle_same_count++;
5739 else {
5740 last_toggle_count = toggle_count;
5741 toggle_same_count = 0;
5742 }
5743 /*avoid 3840x2160 crop*/
5744 if ((width >= 2000) && (height >= 1400) &&
5745 (((dmc_config_state != 1) && (toggle_same_count < 30))
5746 || force_adjust)) {
5747 if (0) {/* if (is_dolby_vision_enable()) { */
5748 /* vpu dmc */
5749 WRITE_DMCREG(
5750 DMC_AM0_CHAN_CTRL,
5751 0x85f403f4);
5752 WRITE_DMCREG(
5753 DMC_AM1_CHAN_CTRL,
5754 0x85f403f4);
5755 WRITE_DMCREG(
5756 DMC_AM2_CHAN_CTRL,
5757 0x85f403f4);
5758
5759 /* mali dmc */
5760 WRITE_DMCREG(
5761 DMC_AXI1_CHAN_CTRL,
5762 0xff10ff4);
5763 WRITE_DMCREG(
5764 DMC_AXI2_CHAN_CTRL,
5765 0xff10ff4);
5766 WRITE_DMCREG(
5767 DMC_AXI1_HOLD_CTRL,
5768 0x08040804);
5769 WRITE_DMCREG(
5770 DMC_AXI2_HOLD_CTRL,
5771 0x08040804);
5772 } else {
5773 /* vpu dmc */
5774 WRITE_DMCREG(
5775 DMC_AM1_CHAN_CTRL,
5776 0x43028);
5777 WRITE_DMCREG(
5778 DMC_AM1_HOLD_CTRL,
5779 0x18101818);
5780 WRITE_DMCREG(
5781 DMC_AM3_CHAN_CTRL,
5782 0x85f403f4);
5783 WRITE_DMCREG(
5784 DMC_AM4_CHAN_CTRL,
5785 0x85f403f4);
5786 /* mali dmc */
5787 WRITE_DMCREG(
5788 DMC_AXI1_HOLD_CTRL,
5789 0x10080804);
5790 WRITE_DMCREG(
5791 DMC_AXI2_HOLD_CTRL,
5792 0x10080804);
5793 }
5794 dmc_config_state = 1;
5795 } else if (((toggle_same_count >= 30) ||
5796 ((width < 2000) && (height < 1400))) &&
5797 (dmc_config_state != 2)) {
5798 /* vpu dmc */
5799 WRITE_DMCREG(
5800 DMC_AM0_CHAN_CTRL,
5801 0x8FF003C4);
5802 WRITE_DMCREG(
5803 DMC_AM1_CHAN_CTRL,
5804 0x3028);
5805 WRITE_DMCREG(
5806 DMC_AM1_HOLD_CTRL,
5807 0x18101810);
5808 WRITE_DMCREG(
5809 DMC_AM2_CHAN_CTRL,
5810 0x8FF003C4);
5811 WRITE_DMCREG(
5812 DMC_AM2_HOLD_CTRL,
5813 0x3028);
5814 WRITE_DMCREG(
5815 DMC_AM3_CHAN_CTRL,
5816 0x85f003f4);
5817 WRITE_DMCREG(
5818 DMC_AM4_CHAN_CTRL,
5819 0x85f003f4);
5820
5821 /* mali dmc */
5822 WRITE_DMCREG(
5823 DMC_AXI1_CHAN_CTRL,
5824 0x8FF00FF4);
5825 WRITE_DMCREG(
5826 DMC_AXI2_CHAN_CTRL,
5827 0x8FF00FF4);
5828 WRITE_DMCREG(
5829 DMC_AXI1_HOLD_CTRL,
5830 0x18101810);
5831 WRITE_DMCREG(
5832 DMC_AXI2_HOLD_CTRL,
5833 0x18101810);
5834 toggle_same_count = 30;
5835 dmc_config_state = 2;
5836 }
5837}
5838
5839static bool is_sc_enable_before_pps(struct vpp_frame_par_s *par)
5840{
5841 bool ret = false;
5842
5843 if (par) {
5844 if (par->supsc0_enable &&
5845 ((par->supscl_path == CORE0_PPS_CORE1)
5846 || (par->supscl_path == CORE0_BEFORE_PPS)))
5847 ret = true;
5848 else if (par->supsc1_enable &&
5849 (par->supscl_path == CORE1_BEFORE_PPS))
5850 ret = true;
5851 else if ((par->supsc0_enable || par->supsc1_enable)
5852 && (par->supscl_path == CORE0_CORE1_PPS))
5853 ret = true;
5854 }
5855 return ret;
5856}
5857
5858void correct_vd1_mif_size_for_DV(struct vpp_frame_par_s *par)
5859{
5860 u32 aligned_mask = 0xfffffffe;
5861 u32 old_len;
5862 if ((is_dolby_vision_on() == true)
5863 && (par->VPP_line_in_length_ > 0)
5864 && !is_sc_enable_before_pps(par)) {
5865 /* work around to skip the size check when sc enable */
5866 if (cur_dispbuf2) {
5867 /*
5868 *if (cur_dispbuf2->type
5869 * & VIDTYPE_COMPRESS)
5870 * aligned_mask = 0xffffffc0;
5871 *else
5872 */
5873 aligned_mask = 0xfffffffc;
5874 }
5875#if 0 /* def TV_REVERSE */
5876 if (reverse) {
5877 par->VPP_line_in_length_
5878 &= 0xfffffffe;
5879 par->VPP_hd_end_lines_
5880 &= 0xfffffffe;
5881 par->VPP_hd_start_lines_ =
5882 par->VPP_hd_end_lines_ + 1
5883 - par->VPP_line_in_length_;
5884 } else
5885#endif
5886 {
5887 par->VPP_line_in_length_
5888 &= aligned_mask;
5889 par->VPP_hd_start_lines_
5890 &= aligned_mask;
5891 par->VPP_hd_end_lines_ =
5892 par->VPP_hd_start_lines_ +
5893 par->VPP_line_in_length_ - 1;
5894 /* if have el layer, need 2 pixel align by height */
5895 if (cur_dispbuf2) {
5896 old_len =
5897 par->VPP_vd_end_lines_ -
5898 par->VPP_vd_start_lines_ + 1;
5899 if (old_len & 1)
5900 par->VPP_vd_end_lines_--;
5901 if (par->VPP_vd_start_lines_ & 1) {
5902 par->VPP_vd_start_lines_--;
5903 par->VPP_vd_end_lines_--;
5904 }
5905 old_len =
5906 par->VPP_vd_end_lines_ -
5907 par->VPP_vd_start_lines_ + 1;
5908 old_len = old_len >> par->vscale_skip_count;
5909 if (par->VPP_pic_in_height_ < old_len)
5910 par->VPP_pic_in_height_ = old_len;
5911 }
5912 }
5913 }
5914}
5915
5916void correct_vd2_mif_size_for_DV(
5917 struct vpp_frame_par_s *par,
5918 struct vframe_s *bl_vf)
5919{
5920 int width_bl, width_el, line_in_length;
5921 int shift;
5922 if ((is_dolby_vision_on() == true)
5923 && (par->VPP_line_in_length_ > 0)
5924 && !is_sc_enable_before_pps(par)) {
5925 /* work around to skip the size check when sc enable */
5926 width_el = (cur_dispbuf2->type
5927 & VIDTYPE_COMPRESS) ?
5928 cur_dispbuf2->compWidth :
5929 cur_dispbuf2->width;
5930 width_bl = (bl_vf->type
5931 & VIDTYPE_COMPRESS) ?
5932 bl_vf->compWidth :
5933 bl_vf->width;
5934 if (width_el >= width_bl)
5935 shift = 0;
5936 else
5937 shift = 1;
5938 zoom2_start_x_lines =
5939 par->VPP_hd_start_lines_ >> shift;
5940 line_in_length =
5941 par->VPP_line_in_length_ >> shift;
5942 zoom2_end_x_lines
5943 &= 0xfffffffe;
5944 line_in_length
5945 &= 0xfffffffe;
5946 if (line_in_length > 1)
5947 zoom2_end_x_lines =
5948 zoom2_start_x_lines +
5949 line_in_length - 1;
5950 else
5951 zoom2_end_x_lines = zoom2_start_x_lines;
5952
5953 zoom2_start_y_lines =
5954 par->VPP_vd_start_lines_ >> shift;
5955 if (zoom2_start_y_lines >= zoom2_end_y_lines)
5956 zoom2_end_y_lines = zoom2_start_y_lines;
5957 /* TODO: if el len is 0, need disable bl */
5958 }
5959}
5960#if ENABLE_UPDATE_HDR_FROM_USER
5961void set_hdr_to_frame(struct vframe_s *vf)
5962{
5963 unsigned long flags;
5964
5965 spin_lock_irqsave(&omx_hdr_lock, flags);
5966
5967 if (has_hdr_info) {
5968 vf->prop.master_display_colour = vf_hdr;
5969
5970 //config static signal_type for vp9
5971 vf->signal_type = (1 << 29)
5972 | (5 << 26) /* unspecified */
5973 | (0 << 25) /* limit */
5974 | (1 << 24) /* color available */
5975 | (9 << 16) /* 2020 */
5976 | (16 << 8) /* 2084 */
5977 | (9 << 0); /* 2020 */
5978
5979 //pr_info("set_hdr_to_frame %d, signal_type 0x%x",
5980 //vf->prop.master_display_colour.present_flag,vf->signal_type);
5981 }
5982 spin_unlock_irqrestore(&omx_hdr_lock, flags);
5983}
5984#endif
5985
5986static int vpp_zorder_check(void)
5987{
5988 int force_flush = 0;
5989 u32 layer0_sel = 0; /* vd1 */
5990 u32 layer1_sel = 1; /* vd2 */
5991
5992 if (legacy_vpp)
5993 return 0;
5994
5995 if (glayer_info[1].zorder < glayer_info[0].zorder) {
5996 layer0_sel = 1;
5997 layer1_sel = 0;
5998 if ((glayer_info[0].zorder >= reference_zorder)
5999 && (glayer_info[1].zorder < reference_zorder))
6000 layer0_sel++;
6001 } else {
6002 layer0_sel = 0;
6003 layer1_sel = 1;
6004 if ((glayer_info[1].zorder >= reference_zorder)
6005 && (glayer_info[0].zorder < reference_zorder))
6006 layer1_sel++;
6007 }
6008
6009 glayer_info[0].cur_sel_port = layer0_sel;
6010 glayer_info[1].cur_sel_port = layer1_sel;
6011
6012 if ((glayer_info[0].cur_sel_port !=
6013 glayer_info[0].last_sel_port) ||
6014 (glayer_info[1].cur_sel_port !=
6015 glayer_info[1].last_sel_port)) {
6016 force_flush = 1;
6017 glayer_info[0].last_sel_port =
6018 glayer_info[0].cur_sel_port;
6019 glayer_info[1].last_sel_port =
6020 glayer_info[1].cur_sel_port;
6021 }
6022 return force_flush;
6023}
6024
6025#ifdef TV_3D_FUNCTION_OPEN
6026inline void switch_3dView_per_vsync(void)
6027{
6028 u32 start_aligned, end_aligned, block_len;
6029 u32 FA_enable = process_3d_type & MODE_3D_OUT_FA_MASK;
6030
6031 if (FA_enable && (toggle_3d_fa_frame == OUT_FA_A_FRAME)) {
6032 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6033 cur_dev->vpp_off, 1, 14, 1);
6034 /* VPP_VD1_PREBLEND disable */
6035 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6036 cur_dev->vpp_off, 1, 10, 1);
6037 /* VPP_VD1_POSTBLEND disable */
6038 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6039 cur_dev->viu_off, 0x4000000);
6040 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6041 cur_dev->viu_off, 0x4000000);
6042 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6043 cur_dev->viu_off, 0x4000000);
6044 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6045 cur_dev->viu_off, 0x4000000);
6046 if (cur_dispbuf->type & VIDTYPE_COMPRESS) {
6047 if ((process_3d_type & MODE_FORCE_3D_FA_LR)
6048 && (cur_frame_par->vpp_3d_mode == 1)) {
6049 start_aligned = ori_start_x_lines;
6050 end_aligned = ori_end_x_lines + 1;
6051 block_len =
6052 (end_aligned - start_aligned) / 2;
6053 block_len = block_len /
6054 (cur_frame_par->hscale_skip_count + 1);
6055 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
6056 (start_aligned << 16) |
6057 (start_aligned + block_len - 1));
6058 }
6059 if ((process_3d_type & MODE_FORCE_3D_FA_TB)
6060 && (cur_frame_par->vpp_3d_mode == 2)) {
6061 start_aligned =
6062 round_down(ori_start_y_lines, 4);
6063 end_aligned =
6064 round_up(ori_end_y_lines + 1, 4);
6065 block_len = end_aligned - start_aligned;
6066 block_len = block_len / 8;
6067 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
6068 ((start_aligned / 4) << 16) |
6069 ((start_aligned / 4) + block_len - 1));
6070 }
6071 }
6072 } else if (FA_enable &&
6073 (toggle_3d_fa_frame == OUT_FA_B_FRAME)) {
6074 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6075 cur_dev->vpp_off, 1, 14, 1);
6076 /* VPP_VD1_PREBLEND disable */
6077 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6078 cur_dev->vpp_off, 1, 10, 1);
6079 /* VPP_VD1_POSTBLEND disable */
6080 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6081 cur_dev->viu_off, 0);
6082 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6083 cur_dev->viu_off, 0);
6084 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6085 cur_dev->viu_off, 0);
6086 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6087 cur_dev->viu_off, 0);
6088 if (cur_dispbuf->type & VIDTYPE_COMPRESS) {
6089 if ((process_3d_type & MODE_FORCE_3D_FA_LR)
6090 && (cur_frame_par->vpp_3d_mode == 1)) {
6091 start_aligned = ori_start_x_lines;
6092 end_aligned = ori_end_x_lines + 1;
6093 block_len =
6094 (end_aligned - start_aligned) / 2;
6095 block_len = block_len /
6096 (cur_frame_par->hscale_skip_count + 1);
6097 VSYNC_WR_MPEG_REG(AFBC_PIXEL_HOR_SCOPE,
6098 ((start_aligned + block_len) << 16) |
6099 (end_aligned - 1));
6100 }
6101 if ((process_3d_type & MODE_FORCE_3D_FA_TB)
6102 && (cur_frame_par->vpp_3d_mode == 2)) {
6103 start_aligned =
6104 round_down(ori_start_y_lines, 4);
6105 end_aligned =
6106 round_up(ori_end_y_lines + 1, 4);
6107 block_len = end_aligned - start_aligned;
6108 block_len = block_len / 8;
6109 VSYNC_WR_MPEG_REG(AFBC_MIF_VER_SCOPE,
6110 (((start_aligned / 4) + block_len) << 16) |
6111 ((end_aligned / 4) - 1));
6112 }
6113 }
6114 } else if (FA_enable &&
6115 (toggle_3d_fa_frame == OUT_FA_BANK_FRAME)) {
6116 /* output a banking frame */
6117 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6118 cur_dev->vpp_off, 0, 14, 1);
6119 /* VPP_VD1_PREBLEND disable */
6120 VSYNC_WR_MPEG_REG_BITS(VPP_MISC +
6121 cur_dev->vpp_off, 0, 10, 1);
6122 /* VPP_VD1_POSTBLEND disable */
6123 }
6124
6125 if ((process_3d_type & MODE_3D_OUT_TB)
6126 || (process_3d_type & MODE_3D_OUT_LR)) {
6127 if (cur_frame_par->vpp_2pic_mode &
6128 VPP_PIC1_FIRST) {
6129 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6130 cur_dev->viu_off, 0x4000000);
6131 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6132 cur_dev->viu_off, 0x4000000);
6133 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6134 cur_dev->viu_off, 0);
6135 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6136 cur_dev->viu_off, 0);
6137 } else {
6138 VSYNC_WR_MPEG_REG(VD1_IF0_LUMA_PSEL +
6139 cur_dev->viu_off, 0);
6140 VSYNC_WR_MPEG_REG(VD1_IF0_CHROMA_PSEL +
6141 cur_dev->viu_off, 0);
6142 VSYNC_WR_MPEG_REG(VD2_IF0_LUMA_PSEL +
6143 cur_dev->viu_off, 0x4000000);
6144 VSYNC_WR_MPEG_REG(VD2_IF0_CHROMA_PSEL +
6145 cur_dev->viu_off, 0x4000000);
6146 }
6147 }
6148}
6149#endif
6150
6151#ifdef FIQ_VSYNC
6152void vsync_fisr_in(void)
6153#else
6154static irqreturn_t vsync_isr_in(int irq, void *dev_id)
6155#endif
6156{
6157 int hold_line;
6158 int enc_line;
6159 unsigned char frame_par_di_set = 0;
6160 s32 i, vout_type;
6161 struct vframe_s *vf;
6162 unsigned long flags;
6163#ifdef CONFIG_TVIN_VDIN
6164 struct vdin_v4l2_ops_s *vdin_ops = NULL;
6165 struct vdin_arg_s arg;
6166#endif
6167 bool show_nosync = false;
6168 u32 vpp_misc_save, vpp_misc_set;
6169 int first_set = 0;
6170 int toggle_cnt;
6171 struct vframe_s *toggle_vf = NULL;
6172 struct vframe_s *toggle_frame = NULL;
6173 int video1_off_req = 0;
6174 int video2_off_req = 0;
6175 struct vframe_s *cur_dispbuf_back = cur_dispbuf;
6176 static struct vframe_s *pause_vf;
6177 int force_flush = 0;
6178 static u32 interrupt_count;
6179
6180 if (debug_flag & DEBUG_FLAG_VSYNC_DONONE)
6181 return IRQ_HANDLED;
6182
6183 if (frame_detect_flag == 1 &&
6184 receive_frame_count &&
6185 frame_detect_time &&
6186 !atomic_read(&video_unreg_flag)) {
6187 struct vinfo_s *video_info;
6188
6189 video_info = get_current_vinfo();
6190 if (video_frame_detect.interrupt_count == 0) {
6191 interrupt_count = 0;
6192 video_frame_detect.interrupt_count =
6193 frame_detect_time *
6194 video_info->sync_duration_num /
6195 video_info->sync_duration_den;
6196 if (debug_flag & DEBUG_FLAG_FRAME_DETECT) {
6197 pr_info("sync_duration_num = %d\n",
6198 video_info->sync_duration_num);
6199 pr_info("sync_duration_den = %d\n",
6200 video_info->sync_duration_den);
6201 }
6202 video_frame_detect.start_receive_count =
6203 receive_frame_count;
6204 }
6205
6206 interrupt_count++;
6207
6208 if (interrupt_count == video_frame_detect.interrupt_count + 1) {
6209 u32 receive_count;
6210 u32 expect_frame_count;
6211
6212 receive_count = receive_frame_count -
6213 video_frame_detect.start_receive_count;
6214 expect_frame_count =
6215 video_frame_detect.interrupt_count *
6216 frame_detect_fps *
6217 video_info->sync_duration_den /
6218 video_info->sync_duration_num /
6219 1000;
6220
6221 if (receive_count < expect_frame_count) {
6222 frame_detect_drop_count +=
6223 expect_frame_count -
6224 receive_count;
6225 if (debug_flag & DEBUG_FLAG_FRAME_DETECT) {
6226 pr_info("drop_count = %d\n",
6227 expect_frame_count -
6228 receive_count);
6229 }
6230 frame_detect_receive_count +=
6231 expect_frame_count;
6232 } else
6233 frame_detect_receive_count += receive_count;
6234
6235 if (debug_flag & DEBUG_FLAG_FRAME_DETECT) {
6236 pr_info("expect count = %d\n",
6237 expect_frame_count);
6238 pr_info("receive_count = %d, time = %ds\n",
6239 receive_count,
6240 frame_detect_time);
6241 pr_info("interrupt_count = %d\n",
6242 video_frame_detect.interrupt_count);
6243 pr_info("frame_detect_drop_count = %d\n",
6244 frame_detect_drop_count);
6245 pr_info("frame_detect_receive_count = %d\n",
6246 frame_detect_receive_count);
6247 }
6248 interrupt_count = 0;
6249 memset(&video_frame_detect, 0,
6250 sizeof(struct video_frame_detect_s));
6251 }
6252 }
6253
6254#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
6255 const char *dev_id_s = (const char *)dev_id;
6256 int dev_id_len = strlen(dev_id_s);
6257
6258 if (cur_dev == &video_dev[1]) {
6259 if (cur_dev_idx == 0) {
6260 cur_dev = &video_dev[0];
6261 vinfo = get_current_vinfo();
6262 vsync_pts_inc =
6263 90000 * vinfo->sync_duration_den /
6264 vinfo->sync_duration_num;
6265 vsync_pts_inc_scale = vinfo->sync_duration_den;
6266 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
6267 video_property_changed = 1;
6268 pr_info("Change to video 0\n");
6269 }
6270 } else {
6271 if (cur_dev_idx != 0) {
6272 cur_dev = &video_dev[1];
6273 vinfo = get_current_vinfo2();
6274 vsync_pts_inc =
6275 90000 * vinfo->sync_duration_den /
6276 vinfo->sync_duration_num;
6277 vsync_pts_inc_scale = vinfo->sync_duration_den;
6278 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
6279 video_property_changed = 1;
6280 pr_info("Change to video 1\n");
6281 }
6282 }
6283
6284 if ((dev_id_s[dev_id_len - 1] == '2' && cur_dev_idx == 0) ||
6285 (dev_id_s[dev_id_len - 1] != '2' && cur_dev_idx != 0))
6286 return IRQ_HANDLED;
6287 /* pr_info("%s: %s\n", __func__, dev_id_s); */
6288#endif
6289
6290 if (omx_need_drop_frame_num > 0 && !omx_drop_done && omx_secret_mode) {
6291 struct vframe_s *vf = NULL;
6292
6293 while (1) {
6294 vf = video_vf_peek();
6295
6296#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6297 if (is_dolby_vision_enable()
6298 && vf && is_dovi_frame(vf)) {
6299 pr_info("vsync_isr_in, ignore the omx %d frames drop for dv frame\n",
6300 omx_need_drop_frame_num);
6301 omx_need_drop_frame_num = 0;
6302 omx_drop_done = true;
6303 break;
6304 }
6305#endif
6306 if (vf) {
6307 if (omx_need_drop_frame_num >= vf->omx_index) {
6308 //pr_info("vsync drop omx_index %d\n",
6309 //vf->omx_index);
6310 vf = video_vf_get();
6311 video_vf_put(vf);
6312 } else {
6313 omx_drop_done = true;
6314 break;
6315 }
6316 } else
6317 break;
6318 }
6319 }
6320
6321 vf = video_vf_peek();
6322 if ((vf) && ((vf->type & VIDTYPE_NO_VIDEO_ENABLE) == 0)) {
6323 if ((old_vmode != new_vmode) || (debug_flag == 8)) {
6324 debug_flag = 1;
6325 video_property_changed = 1;
6326 pr_info("detect vout mode change!!!!!!!!!!!!\n");
6327 old_vmode = new_vmode;
6328 }
6329 }
6330 toggle_cnt = 0;
6331 vsync_count++;
6332 timer_count++;
6333
6334#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6335 vlock_process(vf);/*need call every vsync*/
6336#endif
6337
6338 switch (READ_VCBUS_REG(VPU_VIU_VENC_MUX_CTRL) & 0x3) {
6339 case 0:
6340 enc_line = (READ_VCBUS_REG(ENCL_INFO_READ) >> 16) & 0x1fff;
6341 break;
6342 case 1:
6343 enc_line = (READ_VCBUS_REG(ENCI_INFO_READ) >> 16) & 0x1fff;
6344 break;
6345 case 2:
6346 enc_line = (READ_VCBUS_REG(ENCP_INFO_READ) >> 16) & 0x1fff;
6347 break;
6348 case 3:
6349 enc_line = (READ_VCBUS_REG(ENCT_INFO_READ) >> 16) & 0x1fff;
6350 break;
6351 }
6352 if (enc_line > vsync_enter_line_max)
6353 vsync_enter_line_max = enc_line;
6354
6355 if (is_meson_txlx_cpu() && dmc_adjust) {
6356 bool force_adjust = false;
6357 struct vframe_s *chk_vf;
6358
6359 chk_vf = (vf != NULL) ? vf : cur_dispbuf;
6360 if (chk_vf)
6361 force_adjust =
6362 (chk_vf->type & VIDTYPE_VIU_444) ? true : false;
6363 if (chk_vf)
6364 dmc_adjust_for_mali_vpu(
6365 chk_vf->width,
6366 chk_vf->height,
6367 force_adjust);
6368 else
6369 dmc_adjust_for_mali_vpu(
6370 0, 0, force_adjust);
6371 }
6372#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
6373 vsync_rdma_config_pre();
6374
6375 if (to_notify_trick_wait) {
6376 atomic_set(&trickmode_framedone, 1);
6377 video_notify_flag |= VIDEO_NOTIFY_TRICK_WAIT;
6378 to_notify_trick_wait = false;
6379 goto exit;
6380 }
6381
6382 if (debug_flag & DEBUG_FLAG_PRINT_RDMA) {
6383 if (video_property_changed) {
6384 enable_rdma_log_count = 5;
6385 enable_rdma_log(1);
6386 }
6387 if (enable_rdma_log_count > 0)
6388 enable_rdma_log_count--;
6389 }
6390#endif
6391#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6392 /* check video frame before VECM process */
6393 if (is_dolby_vision_enable() && vf)
6394 dolby_vision_check_hdr10(vf);
6395#endif
6396#ifdef CONFIG_TVIN_VDIN
6397 /* patch for m8 4k2k wifidisplay bandwidth bottleneck */
6398 if (get_cpu_type() == MESON_CPU_MAJOR_ID_M8) {
6399 vdin_ops = get_vdin_v4l2_ops();
6400 if (vdin_ops && vdin_ops->tvin_vdin_func) {
6401 arg.cmd = VDIN_CMD_ISR;
6402 vdin_ops->tvin_vdin_func(1, &arg);
6403#ifdef CONFIG_AM_VIDEO2
6404 vdin_ops->tvin_vdin_func(0, &arg);
6405#endif
6406 }
6407 }
6408#endif
6409 vout_type = detect_vout_type();
6410 hold_line = calc_hold_line();
6411 if (vsync_pts_inc_upint) {
6412 if (vsync_pts_inc_adj) {
6413 /* pr_info("adj %d, org %d\n",*/
6414 /*vsync_pts_inc_adj, vsync_pts_inc); */
6415 timestamp_pcrscr_inc(vsync_pts_inc_adj);
6416 timestamp_apts_inc(vsync_pts_inc_adj);
6417 } else {
6418 timestamp_pcrscr_inc(vsync_pts_inc + 1);
6419 timestamp_apts_inc(vsync_pts_inc + 1);
6420 }
6421 } else {
6422 if (vsync_slow_factor == 0) {
6423 pr_info("invalid vsync_slow_factor, set to 1\n");
6424 vsync_slow_factor = 1;
6425 }
6426
6427 if (vsync_slow_factor == 1) {
6428 timestamp_pcrscr_inc_scale(vsync_pts_inc_scale,
6429 vsync_pts_inc_scale_base);
6430 timestamp_apts_inc(vsync_pts_inc / vsync_slow_factor);
6431 videosync_pcrscr_update(vsync_pts_inc_scale,
6432 vsync_pts_inc_scale_base);
6433 } else if (vsync_slow_factor > 1000) {
6434 u32 inc = (vsync_slow_factor / 1000)
6435 * vsync_pts_inc / 1000;
6436
6437 timestamp_pcrscr_inc(inc);
6438 timestamp_apts_inc(inc);
6439 } else {
6440 timestamp_pcrscr_inc(vsync_pts_inc / vsync_slow_factor);
6441 timestamp_apts_inc(vsync_pts_inc / vsync_slow_factor);
6442 }
6443 }
6444 if (omx_secret_mode == true) {
6445 u32 system_time = timestamp_pcrscr_get();
6446 int diff = system_time - omx_pts;
6447
6448 if ((diff - omx_pts_interval_upper) > 0
6449 || (diff - omx_pts_interval_lower) < 0
6450 || (omx_pts_set_from_hwc_count <
6451 OMX_MAX_COUNT_RESET_SYSTEMTIME)) {
6452 timestamp_pcrscr_enable(1);
6453 /*pr_info("system_time=%d, omx_pts=%d, diff=%d\n",*/
6454 /*system_time, omx_pts, diff);*/
6455 /*add greatest common divisor of duration*/
6456 /*1500(60fps) 3000(30fps) 3750(24fps) for some video*/
6457 /*that pts is not evenly*/
6458 timestamp_pcrscr_set(omx_pts + DURATION_GCD);
6459 } else if (is_dolby_vision_enable()
6460 && ((diff - omx_pts_dv_upper) > 0
6461 || (diff - omx_pts_dv_lower) < 0)) {
6462 timestamp_pcrscr_set(omx_pts + DURATION_GCD);
6463 }
6464 } else
6465 omx_pts = 0;
6466 if (trickmode_duration_count > 0)
6467 trickmode_duration_count -= vsync_pts_inc;
6468#ifdef VIDEO_PTS_CHASE
6469 if (vpts_chase)
6470 vpts_chase_counter--;
6471#endif
6472
6473 if (slowsync_repeat_enable)
6474 frame_repeat_count++;
6475
6476 if (smooth_sync_enable) {
6477 if (video_frame_repeat_count)
6478 video_frame_repeat_count++;
6479 }
6480
6481 if (atomic_read(&video_unreg_flag))
6482 goto exit;
6483
6484 if (atomic_read(&video_pause_flag)
6485 && (!((video_global_output == 1)
6486 && (video_enabled != video_status_saved))))
6487 goto exit;
6488
6489#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
6490 if (is_vsync_rdma_enable()) {
6491 rdma_canvas_id = next_rdma_canvas_id;
6492#ifdef VIDEO_PIP
6493 pip_rdma_canvas_id = pip_next_rdma_canvas_id;
6494#endif
6495 } else {
6496 if (rdma_enable_pre)
6497 goto exit;
6498
6499 rdma_canvas_id = 0;
6500 next_rdma_canvas_id = 1;
6501#ifdef VIDEO_PIP
6502 pip_rdma_canvas_id = 0;
6503 pip_next_rdma_canvas_id = 1;
6504#endif
6505 }
6506
6507 for (i = 0; i < dispbuf_to_put_num; i++) {
6508 if (dispbuf_to_put[i]) {
6509 video_vf_put(dispbuf_to_put[i]);
6510 dispbuf_to_put[i] = NULL;
6511 }
6512 dispbuf_to_put_num = 0;
6513 }
6514#ifdef VIDEO_PIP
6515 if (pipbuf_to_put) {
6516 pip_vf_put(pipbuf_to_put);
6517 pipbuf_to_put = NULL;
6518 }
6519#endif
6520#endif
6521
6522 if ((!cur_dispbuf) || (cur_dispbuf == &vf_local)) {
6523
6524 vf = video_vf_peek();
6525
6526 if (vf) {
6527 if (hdmi_in_onvideo == 0) {
6528 if (nopostvideostart == false)
6529 tsync_avevent_locked(VIDEO_START,
6530 (vf->pts) ? vf->pts :
6531 timestamp_vpts_get());
6532 video_start_post = true;
6533 }
6534
6535 if (show_first_frame_nosync || show_first_picture)
6536 show_nosync = true;
6537
6538 if (slowsync_repeat_enable)
6539 frame_repeat_count = 0;
6540
6541 } else if ((cur_dispbuf == &vf_local)
6542 && (video_property_changed)) {
6543 if (!(blackout | force_blackout)) {
6544 if (cur_dispbuf
6545#ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
6546 && ((DI_POST_REG_RD(DI_IF1_GEN_REG) & 0x1)
6547 == 0)
6548#endif
6549 ) {
6550 /* setting video display*/
6551 /*property in unregister mode */
6552 u32 cur_index =
6553 READ_VCBUS_REG(VD1_IF0_CANVAS0 +
6554 cur_dev->viu_off);
6555 if ((get_cpu_type() >=
6556 MESON_CPU_MAJOR_ID_GXBB) &&
6557 (cur_dispbuf->type &
6558 VIDTYPE_COMPRESS)) {
6559 cur_dispbuf->compHeadAddr =
6560 READ_VCBUS_REG(AFBC_HEAD_BADDR)
6561 << 4;
6562 } else {
6563 cur_dispbuf->canvas0Addr =
6564 cur_index;
6565 }
6566 }
6567 vsync_toggle_frame(cur_dispbuf, __LINE__);
6568 } else
6569 video_property_changed = 0;
6570 } else {
6571 goto SET_FILTER;
6572 }
6573 }
6574
6575 /* buffer switch management */
6576 vf = video_vf_peek();
6577
6578 /* setting video display property in underflow mode */
6579 if ((!vf) && cur_dispbuf && (video_property_changed))
6580 vsync_toggle_frame(cur_dispbuf, __LINE__);
6581
6582 /*debug info for skip & repeate vframe case*/
6583 if (!vf) {
6584 underflow++;
6585 ATRACE_COUNTER("underflow", 1);
6586 if (video_dbg_vf&(1<<0))
6587 dump_vframe_status("vdin0");
6588 if (video_dbg_vf&(1<<1))
6589 dump_vframe_status("deinterlace");
6590 if (video_dbg_vf&(1<<2))
6591 dump_vframe_status("amlvideo2");
6592 if (video_dbg_vf&(1<<3))
6593 dump_vframe_status("ppmgr");
6594 if (video_dbg_vf&(1<<4))
6595 dump_vdin_reg();
6596 } else {
6597 ATRACE_COUNTER("underflow", 0);
6598 }
6599 video_get_vf_cnt = 0;
6600 if (platform_type == 1) {
6601 /* toggle_3d_fa_frame*/
6602 /* determine the out frame is L or R or blank */
6603 judge_3d_fa_out_mode();
6604 }
6605 while (vf) {
6606 if (vpts_expire(cur_dispbuf, vf, toggle_cnt) || show_nosync) {
6607 ATRACE_COUNTER(MODULE_NAME, __LINE__);
6608 if (debug_flag & DEBUG_FLAG_PTS_TRACE)
6609 pr_info("vpts = 0x%x, c.dur=0x%x, n.pts=0x%x, scr = 0x%x, pcr-pts-diff=%d, ptstrace=%d\n",
6610 timestamp_vpts_get(),
6611 (cur_dispbuf) ?
6612 cur_dispbuf->duration : 0,
6613 vf->pts, timestamp_pcrscr_get(),
6614 timestamp_pcrscr_get() - vf->pts,
6615 pts_trace);
6616 amlog_mask_if(toggle_cnt > 0, LOG_MASK_FRAMESKIP,
6617 "skipped\n");
6618#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6619 if (is_dolby_vision_enable()
6620 && dolby_vision_need_wait())
6621 break;
6622#endif
6623#if ENABLE_UPDATE_HDR_FROM_USER
6624 set_hdr_to_frame(vf);
6625#endif
6626
6627#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6628 refresh_on_vs(vf);
6629 if (amvecm_on_vs(
6630 (cur_dispbuf != &vf_local)
6631 ? cur_dispbuf : NULL,
6632 vf, CSC_FLAG_CHECK_OUTPUT,
6633 cur_frame_par ?
6634 cur_frame_par->supsc1_hori_ratio :
6635 0,
6636 cur_frame_par ?
6637 cur_frame_par->supsc1_vert_ratio :
6638 0) == 1)
6639 break;
6640#endif
6641 /*
6642 *two special case:
6643 *case1:4k display case,input buffer not enough &
6644 * quickly for display
6645 *case2:input buffer all not OK
6646 */
6647 if (vf && hdmiin_frame_check &&
6648 (vf->source_type == VFRAME_SOURCE_TYPE_HDMI) &&
6649 (video_vf_disp_mode_get(vf) ==
6650 VFRAME_DISP_MODE_UNKNOWN) &&
6651 (hdmiin_frame_check_cnt++ < 10))
6652 break;
6653 else
6654 hdmiin_frame_check_cnt = 0;
6655
6656 vf = video_vf_get();
6657 if (!vf) {
6658 ATRACE_COUNTER(MODULE_NAME, __LINE__);
6659 break;
6660 }
6661 if (debug_flag & DEBUG_FLAG_LATENCY) {
6662 vf->ready_clock[2] = sched_clock();
6663 pr_info("video get latency %lld ms vdin put latency %lld ms. first %lld ms.\n",
6664 func_div(vf->ready_clock[2], 1000),
6665 func_div(vf->ready_clock[1], 1000),
6666 func_div(vf->ready_clock[0], 1000));
6667 }
6668 if (video_vf_dirty_put(vf)) {
6669 ATRACE_COUNTER(MODULE_NAME, __LINE__);
6670 break;
6671 }
6672 if (vf && hdmiin_frame_check && (vf->source_type ==
6673 VFRAME_SOURCE_TYPE_HDMI) &&
6674 video_vf_disp_mode_check(vf))
6675 break;
6676 force_blackout = 0;
6677 if ((platform_type == 1) ||
6678 (platform_type == 0)) {
6679 if (vf) {
6680 if (last_mode_3d !=
6681 vf->mode_3d_enable) {
6682 last_mode_3d =
6683 vf->mode_3d_enable;
6684 mode_3d_changed = 1;
6685 }
6686 video_3d_format = vf->trans_fmt;
6687 }
6688 }
6689 vsync_toggle_frame(vf, __LINE__);
6690 toggle_frame = vf;
6691#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6692 if (is_dolby_vision_enable()) {
6693 toggle_vf = dolby_vision_toggle_frame(vf);
6694 video_pause_global = 0;
6695 } else
6696#endif
6697 {
6698 cur_dispbuf2 = NULL;
6699 video_pause_global = 2;
6700 pause_vf = NULL;
6701 }
6702 if (trickmode_fffb == 1) {
6703 trickmode_vpts = vf->pts;
6704#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
6705 #ifdef CONFIG_AMLOGIC_MEDIA_DEINTERLACE
6706 if ((DI_POST_REG_RD(DI_IF1_GEN_REG) & 0x1)
6707 != 0) {
6708 atomic_set(&trickmode_framedone, 1);
6709 video_notify_flag |=
6710 VIDEO_NOTIFY_TRICK_WAIT;
6711 } else
6712 #endif
6713 to_notify_trick_wait = true;
6714#else
6715 atomic_set(&trickmode_framedone, 1);
6716 video_notify_flag |= VIDEO_NOTIFY_TRICK_WAIT;
6717#endif
6718 break;
6719 }
6720 if (slowsync_repeat_enable)
6721 frame_repeat_count = 0;
6722 vf = video_vf_peek();
6723 if (!vf)
6724 next_peek_underflow++;
6725#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6726 if (for_dolby_vision_certification()
6727 && toggle_vf)
6728 break;
6729#endif
6730 if (debug_flag & DEBUG_FLAG_TOGGLE_FRAME_PER_VSYNC)
6731 break;
6732 video_get_vf_cnt++;
6733 if (video_get_vf_cnt >= 2)
6734 video_drop_vf_cnt++;
6735 } else {
6736 ATRACE_COUNTER(MODULE_NAME, __LINE__);
6737 /* check if current frame's duration has expired,
6738 *in this example
6739 * it compares current frame display duration
6740 * with 1/1/1/1.5 frame duration
6741 * every 4 frames there will be one frame play
6742 * longer than usual.
6743 * you can adjust this array for any slow sync
6744 * control as you want.
6745 * The playback can be smoother than previous method.
6746 */
6747 if (slowsync_repeat_enable) {
6748 ATRACE_COUNTER(MODULE_NAME, __LINE__);
6749 if (duration_expire
6750 (cur_dispbuf, vf,
6751 frame_repeat_count * vsync_pts_inc)
6752 && timestamp_pcrscr_enable_state()) {
6753 amlog_mask(LOG_MASK_SLOWSYNC,
6754 "slow sync toggle,repeat_count = %d\n",
6755 frame_repeat_count);
6756 amlog_mask(LOG_MASK_SLOWSYNC,
6757 "sys.time = 0x%x, video time = 0x%x\n",
6758 timestamp_pcrscr_get(),
6759 timestamp_vpts_get());
6760#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6761 if (is_dolby_vision_enable()
6762 && dolby_vision_need_wait())
6763 break;
6764#endif
6765#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6766 refresh_on_vs(vf);
6767 if (amvecm_on_vs(
6768 (cur_dispbuf != &vf_local)
6769 ? cur_dispbuf : NULL,
6770 vf, CSC_FLAG_CHECK_OUTPUT,
6771 cur_frame_par ?
6772 cur_frame_par->supsc1_hori_ratio
6773 : 0,
6774 cur_frame_par ?
6775 cur_frame_par->supsc1_vert_ratio
6776 : 0) == 1)
6777 break;
6778#endif
6779 vf = video_vf_get();
6780 if (!vf) {
6781 ATRACE_COUNTER(MODULE_NAME,
6782 __LINE__);
6783 break;
6784 }
6785 vsync_toggle_frame(vf, __LINE__);
6786 toggle_frame = vf;
6787#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6788 if (is_dolby_vision_enable())
6789 toggle_vf =
6790 dolby_vision_toggle_frame(vf);
6791 else
6792#endif
6793 cur_dispbuf2 = NULL;
6794 frame_repeat_count = 0;
6795
6796 vf = video_vf_peek();
6797 } else if ((cur_dispbuf) &&
6798 (cur_dispbuf->duration_pulldown >
6799 vsync_pts_inc)) {
6800 frame_count++;
6801 cur_dispbuf->duration_pulldown -=
6802 PTS2DUR(vsync_pts_inc);
6803 }
6804 } else {
6805 if ((cur_dispbuf)
6806 && (cur_dispbuf->duration_pulldown >
6807 vsync_pts_inc)) {
6808 frame_count++;
6809 cur_dispbuf->duration_pulldown -=
6810 PTS2DUR(vsync_pts_inc);
6811 }
6812 }
6813 /* setting video display property in pause mode */
6814 if (video_property_changed && cur_dispbuf) {
6815 if (blackout | force_blackout) {
6816 if (cur_dispbuf != &vf_local)
6817 vsync_toggle_frame(
6818 cur_dispbuf,
6819 __LINE__);
6820 } else
6821 vsync_toggle_frame(cur_dispbuf,
6822 __LINE__);
6823 if (is_dolby_vision_enable()) {
6824 pause_vf = cur_dispbuf;
6825 video_pause_global = 1;
6826 } else {
6827 pause_vf = NULL;
6828 video_pause_global = 2;
6829 }
6830 }
6831 if (pause_vf && (video_pause_global == 1)
6832 && is_dolby_vision_enable()) {
6833 toggle_vf = pause_vf;
6834 dolby_vision_parse_metadata(
6835 cur_dispbuf, 0, false);
6836 dolby_vision_set_toggle_flag(1);
6837 }
6838 break;
6839 }
6840
6841 toggle_cnt++;
6842 }
6843
6844#ifdef INTERLACE_FIELD_MATCH_PROCESS
6845 if (interlace_field_type_need_match(vout_type, vf)) {
6846 if (field_matching_count++ == FIELD_MATCH_THRESHOLD) {
6847 field_matching_count = 0;
6848 /* adjust system time to get one more field toggle */
6849 /* at next vsync to match field */
6850 timestamp_pcrscr_inc(vsync_pts_inc);
6851 }
6852 } else
6853 field_matching_count = 0;
6854#endif
6855
6856SET_FILTER:
6857#ifdef VIDEO_PIP
6858 vf = pip_vf_peek();
6859 /* setting video display property in underflow mode */
6860 if ((!vf) && cur_pipbuf && (pip_property_changed))
6861 pip_toggle_frame(cur_pipbuf);
6862 if (vf) {
6863 vf = pip_vf_get();
6864 if (vf) {
6865 if (!vf->frame_dirty)
6866 pip_toggle_frame(vf);
6867 else
6868 pip_vf_put(vf);
6869 }
6870 }
6871#endif
6872#if defined(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM)
6873 amvecm_on_vs(
6874 (cur_dispbuf != &vf_local)
6875 ? cur_dispbuf : NULL,
6876 toggle_frame,
6877 toggle_frame ? CSC_FLAG_TOGGLE_FRAME : 0,
6878 cur_frame_par ?
6879 cur_frame_par->supsc1_hori_ratio :
6880 0,
6881 cur_frame_par ?
6882 cur_frame_par->supsc1_vert_ratio :
6883 0);
6884#endif
6885 /* filter setting management */
6886 if ((frame_par_ready_to_set) || (frame_par_force_to_set)) {
6887 cur_frame_par = next_frame_par;
6888 frame_par_di_set = 1;
6889 }
6890#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
6891 if (is_dolby_vision_enable()) {
6892 u32 frame_size = 0, h_size, v_size;
6893 u8 pps_state = 0; /* pps no change */
6894
6895 /* force toggle when keeping frame after playing */
6896 if ((cur_dispbuf == &vf_local)
6897 && !toggle_vf
6898 && is_dolby_vision_on()) {
6899 toggle_vf = cur_dispbuf;
6900 dolby_vision_parse_metadata(
6901 cur_dispbuf, 2, false);
6902 dolby_vision_set_toggle_flag(1);
6903 }
6904/* pause mode was moved to video display property */
6905#if 0
6906 /* force toggle in pause mode */
6907 if (cur_dispbuf
6908 && (cur_dispbuf != &vf_local)
6909 && !toggle_vf
6910 && is_dolby_vision_on()
6911 && !for_dolby_vision_certification()) {
6912 toggle_vf = cur_dispbuf;
6913 dolby_vision_parse_metadata(
6914 cur_dispbuf, 0, false);
6915 dolby_vision_set_toggle_flag(1);
6916 }
6917#endif
6918 if (cur_frame_par) {
6919 if (frame_par_ready_to_set || frame_par_force_to_set) {
6920 struct vppfilter_mode_s *vpp_filter =
6921 &cur_frame_par->vpp_filter;
6922 if ((vpp_filter->vpp_hsc_start_phase_step
6923 == 0x1000000) &&
6924 (vpp_filter->vpp_vsc_start_phase_step
6925 == 0x1000000) &&
6926 (vpp_filter->vpp_hsc_start_phase_step ==
6927 vpp_filter->vpp_hf_start_phase_step) &&
6928 !vpp_filter->vpp_pre_vsc_en &&
6929 !vpp_filter->vpp_pre_hsc_en &&
6930 !cur_frame_par->supsc0_enable &&
6931 !cur_frame_par->supsc1_enable &&
6932 bypass_pps)
6933 pps_state = 2; /* pps disable */
6934 else
6935 pps_state = 1; /* pps enable */
6936 }
6937 if (cur_frame_par->VPP_hd_start_lines_
6938 >= cur_frame_par->VPP_hd_end_lines_)
6939 h_size = 0;
6940 else
6941 h_size = cur_frame_par->VPP_hd_end_lines_
6942 - cur_frame_par->VPP_hd_start_lines_ + 1;
6943 h_size /= (cur_frame_par->hscale_skip_count + 1);
6944 if (cur_frame_par->VPP_vd_start_lines_
6945 >= cur_frame_par->VPP_vd_end_lines_)
6946 v_size = 0;
6947 else
6948 v_size = cur_frame_par->VPP_vd_end_lines_
6949 - cur_frame_par->VPP_vd_start_lines_ + 1;
6950 v_size /= (cur_frame_par->vscale_skip_count + 1);
6951 frame_size = (h_size << 16) | v_size;
6952 } else if (toggle_vf) {
6953 h_size = (toggle_vf->type & VIDTYPE_COMPRESS) ?
6954 toggle_vf->compWidth : toggle_vf->width;
6955 v_size = (toggle_vf->type & VIDTYPE_COMPRESS) ?
6956 toggle_vf->compHeight : toggle_vf->height;
6957 frame_size = (h_size << 16) | v_size;
6958 }
6959 dolby_vision_process(toggle_vf, frame_size, pps_state);
6960 dolby_vision_update_setting();
6961 }
6962#endif
6963 if ((platform_type == 1) || (platform_type == 0)) {
6964 if (mode_3d_changed) {
6965 mode_3d_changed = 0;
6966 frame_par_force_to_set = 1;
6967 }
6968 }
6969 if (cur_dispbuf_back != cur_dispbuf) {
6970 display_frame_count++;
6971 drop_frame_count = receive_frame_count - display_frame_count;
6972 }
6973 if (cur_dispbuf) {
6974 struct f2v_vphase_s *vphase;
6975 u32 vin_type = cur_dispbuf->type & VIDTYPE_TYPEMASK;
6976 {
6977 int need_afbc = (cur_dispbuf->type & VIDTYPE_COMPRESS);
6978 int afbc_need_reset =
6979 video_enabled &&
6980 need_afbc &&
6981 (!(READ_VCBUS_REG(AFBC_ENABLE) & 0x100));
6982 /*video on && afbc is off && is compress frame.*/
6983 if (frame_par_ready_to_set || afbc_need_reset) {
6984 if (cur_frame_par) {
6985 viu_set_dcu(cur_frame_par, cur_dispbuf);
6986 if (cur_dispbuf2)
6987 vd2_set_dcu(cur_frame_par,
6988 cur_dispbuf2);
6989 }
6990 } else if (cur_dispbuf2) {
6991 u32 new_el_w =
6992 (cur_dispbuf2->type
6993 & VIDTYPE_COMPRESS) ?
6994 cur_dispbuf2->compWidth :
6995 cur_dispbuf2->width;
6996 if (new_el_w != last_el_w) {
6997 pr_info("reset vd2 dcu for el change, %d->%d, %p--%p\n",
6998 last_el_w, new_el_w,
6999 cur_dispbuf, cur_dispbuf2);
7000 vd2_set_dcu(cur_frame_par,
7001 cur_dispbuf2);
7002 }
7003 } else {
7004 last_el_w = 0;
7005 last_el_status = 0;
7006 }
7007 }
7008
7009 if (cur_frame_par &&
7010 cur_frame_par->hscale_skip_count) {
7011 VSYNC_WR_MPEG_REG_BITS(VIU_VD1_FMT_CTRL +
7012 cur_dev->viu_off, 1, 20, 1);
7013 /* HFORMATTER_EN */
7014#ifdef VIDEO_PIP
7015 if (!cur_pipbuf)
7016#endif
7017 VSYNC_WR_MPEG_REG_BITS(VIU_VD2_FMT_CTRL +
7018 cur_dev->viu_off, 1, 20, 1);
7019 /* HFORMATTER_EN */
7020 }
7021
7022#ifdef TV_3D_FUNCTION_OPEN
7023 switch_3dView_per_vsync();
7024#endif
7025 /* vertical phase */
7026 vphase = &cur_frame_par->VPP_vf_ini_phase_
7027 [vpp_phase_table[vin_type]
7028 [vout_type]];
7029 VSYNC_WR_MPEG_REG(
7030 VPP_VSC_INI_PHASE + cur_dev->vpp_off,
7031 ((u32) (vphase->phase) << 8));
7032
7033 if (vphase->repeat_skip >= 0) {
7034 /* skip lines */
7035 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
7036 cur_dev->vpp_off,
7037 skip_tab[vphase->repeat_skip],
7038 VPP_PHASECTL_INIRCVNUMT_BIT,
7039 VPP_PHASECTL_INIRCVNUM_WID +
7040 VPP_PHASECTL_INIRPTNUM_WID);
7041 } else {
7042 /* repeat first line */
7043 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
7044 cur_dev->vpp_off, 4,
7045 VPP_PHASECTL_INIRCVNUMT_BIT,
7046 VPP_PHASECTL_INIRCVNUM_WID);
7047 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
7048 cur_dev->vpp_off,
7049 1 - vphase->repeat_skip,
7050 VPP_PHASECTL_INIRPTNUMT_BIT,
7051 VPP_PHASECTL_INIRPTNUM_WID);
7052 }
7053 if (force_3d_scaler == 3 &&
7054 cur_frame_par &&
7055 cur_frame_par->vpp_3d_scale) {
7056 VSYNC_WR_MPEG_REG_BITS(
7057 VPP_VSC_PHASE_CTRL, 3,
7058 VPP_PHASECTL_DOUBLELINE_BIT, 2);
7059 } else if (force_3d_scaler == 1 &&
7060 cur_frame_par &&
7061 cur_frame_par->vpp_3d_scale) {
7062 VSYNC_WR_MPEG_REG_BITS(
7063 VPP_VSC_PHASE_CTRL, 1,
7064 VPP_PHASECTL_DOUBLELINE_BIT,
7065 VPP_PHASECTL_DOUBLELINE_WID);
7066 } else if (force_3d_scaler == 2 &&
7067 cur_frame_par &&
7068 cur_frame_par->vpp_3d_scale) {
7069 VSYNC_WR_MPEG_REG_BITS(
7070 VPP_VSC_PHASE_CTRL, 2,
7071 VPP_PHASECTL_DOUBLELINE_BIT, 2);
7072 } else {
7073 VSYNC_WR_MPEG_REG_BITS(
7074 VPP_VSC_PHASE_CTRL, 0,
7075 VPP_PHASECTL_DOUBLELINE_BIT, 2);
7076 }
7077 }
7078#ifdef VIDEO_PIP
7079 if (pip_frame_ready_to_set)
7080 curpip_frame_par = nextpip_frame_par;
7081
7082 if (cur_pipbuf) {
7083 int need_afbc = (cur_pipbuf->type & VIDTYPE_COMPRESS);
7084 int afbc_need_reset =
7085 video2_enabled &&
7086 need_afbc &&
7087 (!(READ_VCBUS_REG(VD2_AFBC_ENABLE) & 0x100));
7088 /*video on && afbc is off && is compress frame.*/
7089 if (pip_frame_ready_to_set || afbc_need_reset)
7090 pip_set_dcu(curpip_frame_par, cur_pipbuf);
7091
7092 if (cur_pipbuf && curpip_frame_par) {
7093 if (curpip_frame_par->hscale_skip_count) {
7094 VSYNC_WR_MPEG_REG_BITS(
7095 VIU_VD2_FMT_CTRL +
7096 cur_dev->viu_off, 1, 20, 1);
7097 /* HFORMATTER_EN */
7098 }
7099 proc_vd2_vsc_phase_per_vsync(
7100 curpip_frame_par, cur_pipbuf, vout_type);
7101 }
7102 }
7103
7104 if (pip_frame_ready_to_set) {
7105#if 0
7106 u32 h_size, v_size;
7107
7108 if (pip_start_x_lines < pip_end_x_lines)
7109 h_size = pip_end_x_lines - pip_start_x_lines + 1;
7110 else
7111 h_size = ori2_end_x_lines - ori2_start_x_lines + 1;
7112
7113 if (pip_start_y_lines < pip_end_y_lines)
7114 v_size = pip_end_y_lines - pip_start_y_lines + 1;
7115 else
7116 v_size = ori2_end_y_lines - ori2_start_y_lines + 1;
7117
7118 zoom2_start_x_lines = ori2_start_x_lines;
7119 zoom2_end_x_lines = ori2_end_x_lines;
7120 zoom2_start_y_lines = ori2_start_y_lines;
7121 zoom2_end_y_lines = ori2_end_y_lines;
7122
7123 if (h_size < (zoom2_end_x_lines - zoom2_start_x_lines + 1))
7124 zoom2_end_x_lines = zoom2_start_x_lines + h_size - 1;
7125 else if (h_size > (zoom2_end_x_lines - zoom2_start_x_lines + 1))
7126 h_size = zoom2_end_x_lines - zoom2_start_x_lines + 1;
7127
7128 if (v_size < (zoom2_end_y_lines - zoom2_start_y_lines + 1))
7129 zoom2_end_y_lines = zoom2_start_y_lines + v_size - 1;
7130 else if (v_size > (zoom2_end_y_lines - zoom2_start_y_lines + 1))
7131 v_size = (zoom2_end_y_lines - zoom2_start_y_lines + 1);
7132
7133 if (vinfo) {
7134 if (pip_start_x_lines + h_size > vinfo->width) {
7135 h_size = vinfo->width - pip_start_x_lines;
7136 zoom2_end_x_lines =
7137 zoom2_start_x_lines + h_size - 1;
7138 }
7139 if (pip_start_y_lines + v_size > vinfo->height) {
7140 v_size = vinfo->height - pip_start_y_lines;
7141 zoom2_end_y_lines =
7142 zoom2_start_y_lines + v_size - 1;
7143 }
7144 }
7145#endif
7146 struct scaler_setting_s local_pps;
7147 struct blend_setting_s local_blend;
7148 struct vpp_frame_par_s *par = curpip_frame_par;
7149
7150 if (cur_pipbuf->type & VIDTYPE_INTERLACE) {
7151 if (cur_pipbuf->type & VIDTYPE_VIU_FIELD) {
7152 zoom2_start_y_lines =
7153 par->VPP_vd_start_lines_ >> 1;
7154 zoom2_end_y_lines =
7155 ((par->VPP_vd_end_lines_ + 1)
7156 >> 1) - 1;
7157 } else {
7158 zoom2_start_y_lines =
7159 par->VPP_vd_start_lines_;
7160 zoom2_end_y_lines =
7161 par->VPP_vd_end_lines_;
7162 }
7163 } else {
7164 if (cur_pipbuf->type & VIDTYPE_VIU_FIELD) {
7165 zoom2_start_y_lines =
7166 par->VPP_vd_start_lines_;
7167 zoom2_end_y_lines =
7168 par->VPP_vd_end_lines_;
7169 } else {
7170 zoom2_start_y_lines =
7171 par->VPP_vd_start_lines_ >> 1;
7172 zoom2_end_y_lines =
7173 ((par->VPP_vd_end_lines_ + 1)
7174 >> 1) - 1;
7175 }
7176 }
7177 zoom2_start_x_lines =
7178 par->VPP_hd_start_lines_;
7179 zoom2_end_x_lines =
7180 par->VPP_hd_end_lines_;
7181 config_vd_pps(
7182 1, par, &local_pps, vinfo);
7183 config_vd_blend(
7184 1, par, cur_pipbuf,
7185 (legacy_vpp ? 0x1ff : 0x100), &local_blend);
7186 vd2_scaler_setting(&local_pps);
7187 vd2_zoom_display_horz(
7188 cur_pipbuf,
7189 par->hscale_skip_count);
7190 vd2_zoom_display_vert(
7191 cur_pipbuf,
7192 par->vscale_skip_count);
7193 vd2_vpp_blend_setting(&local_blend);
7194 pip_frame_ready_to_set = 0;
7195 }
7196#endif
7197
7198 if (((frame_par_ready_to_set) || (frame_par_force_to_set)) &&
7199 (cur_frame_par)) {
7200 struct vppfilter_mode_s *vpp_filter =
7201 &cur_frame_par->vpp_filter;
7202
7203 if (cur_dispbuf) {
7204 u32 zoom_start_y, zoom_end_y;
7205 correct_vd1_mif_size_for_DV(cur_frame_par);
7206 if (cur_dispbuf->type & VIDTYPE_INTERLACE) {
7207 if (cur_dispbuf->type
7208 & VIDTYPE_COMPRESS) {
7209 /* for vdin afbc and interlace case */
7210 zoom_start_y =
7211 cur_frame_par->VPP_vd_start_lines_;
7212 zoom_end_y =
7213 cur_frame_par->VPP_vd_end_lines_;
7214 } else if (cur_dispbuf->type
7215 & VIDTYPE_VIU_FIELD) {
7216 zoom_start_y =
7217 cur_frame_par->VPP_vd_start_lines_
7218 >> 1;
7219 zoom_end_y =
7220 ((cur_frame_par->VPP_vd_end_lines_ + 1)
7221 >> 1) - 1;
7222 } else {
7223 zoom_start_y =
7224 cur_frame_par->VPP_vd_start_lines_;
7225 zoom_end_y =
7226 cur_frame_par->VPP_vd_end_lines_;
7227 }
7228 } else {
7229 if (cur_dispbuf->type & VIDTYPE_VIU_FIELD) {
7230 zoom_start_y =
7231 cur_frame_par->VPP_vd_start_lines_;
7232 zoom_end_y =
7233 cur_frame_par->VPP_vd_end_lines_;
7234 } else {
7235 if (is_need_framepacking_output()) {
7236 zoom_start_y =
7237 cur_frame_par->VPP_vd_start_lines_ >> 1;
7238 zoom_end_y =
7239 ((cur_frame_par->VPP_vd_end_lines_
7240 - framepacking_blank + 1) >> 1) - 1;
7241 } else {
7242 zoom_start_y =
7243 cur_frame_par->VPP_vd_start_lines_ >> 1;
7244 zoom_end_y =
7245 ((cur_frame_par->VPP_vd_end_lines_ + 1) >> 1) - 1;
7246 }
7247 }
7248 }
7249
7250 zoom_start_x_lines =
7251 cur_frame_par->VPP_hd_start_lines_;
7252 zoom_end_x_lines = cur_frame_par->VPP_hd_end_lines_;
7253 zoom_display_horz(cur_dispbuf,
7254 cur_frame_par->hscale_skip_count);
7255
7256 zoom_start_y_lines = zoom_start_y;
7257 zoom_end_y_lines = zoom_end_y;
7258 zoom_display_vert(cur_dispbuf);
7259 if (is_dolby_vision_enable() && cur_dispbuf2) {
7260 zoom2_start_x_lines = ori2_start_x_lines;
7261 zoom2_end_x_lines = ori2_end_x_lines;
7262 zoom2_start_y_lines = ori2_start_y_lines;
7263 zoom2_end_y_lines = ori2_end_y_lines;
7264 correct_vd2_mif_size_for_DV(
7265 cur_frame_par, cur_dispbuf);
7266 vd2_zoom_display_horz(cur_dispbuf2,
7267 cur_frame_par->hscale_skip_count);
7268 vd2_zoom_display_vert(cur_dispbuf2,
7269 cur_frame_par->vscale_skip_count);
7270 }
7271 }
7272 /*vpp input size setting*/
7273 VSYNC_WR_MPEG_REG(VPP_IN_H_V_SIZE,
7274 ((cur_frame_par->video_input_w & 0x1fff) <<
7275 16) | (cur_frame_par->video_input_h & 0x1fff));
7276
7277 /* vpp super scaler */
7278 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB) {
7279 vpp_set_super_scaler_regs(cur_frame_par->supscl_path,
7280 cur_frame_par->supsc0_enable,
7281 cur_frame_par->spsc0_w_in,
7282 cur_frame_par->spsc0_h_in,
7283 cur_frame_par->supsc0_hori_ratio,
7284 cur_frame_par->supsc0_vert_ratio,
7285 cur_frame_par->supsc1_enable,
7286 cur_frame_par->spsc1_w_in,
7287 cur_frame_par->spsc1_h_in,
7288 cur_frame_par->supsc1_hori_ratio,
7289 cur_frame_par->supsc1_vert_ratio,
7290 vinfo->width,
7291 vinfo->height);
7292 if (is_dolby_vision_on() &&
7293 is_dolby_vision_stb_mode() &&
7294 !cur_frame_par->supsc0_enable &&
7295 !cur_frame_par->supsc1_enable) {
7296 VSYNC_WR_MPEG_REG(VPP_SRSHARP0_CTRL, 0);
7297 VSYNC_WR_MPEG_REG(VPP_SRSHARP1_CTRL, 0);
7298 }
7299 }
7300
7301 /* vpp filters */
7302 /* SET_MPEG_REG_MASK(VPP_SC_MISC + cur_dev->vpp_off, */
7303 /* VPP_SC_TOP_EN | VPP_SC_VERT_EN | VPP_SC_HORZ_EN); */
7304#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
7305 if (for_dolby_vision_certification()) {
7306 /* turn off PPS for Dolby Vision certification */
7307 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7308 0, VPP_SC_TOP_EN_BIT, VPP_SC_TOP_EN_WID);
7309 } else
7310#endif
7311 {
7312 VSYNC_WR_MPEG_REG(VPP_SC_MISC + cur_dev->vpp_off,
7313 READ_VCBUS_REG(VPP_SC_MISC +
7314 cur_dev->vpp_off) |
7315 VPP_SC_TOP_EN | VPP_SC_VERT_EN |
7316 VPP_SC_HORZ_EN);
7317
7318 /* pps pre hsc&vsc en */
7319 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7320 vpp_filter->vpp_pre_hsc_en,
7321 VPP_SC_PREHORZ_EN_BIT, 1);
7322 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7323 vpp_filter->vpp_pre_vsc_en,
7324 VPP_SC_PREVERT_EN_BIT, 1);
7325 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7326 vpp_filter->vpp_pre_vsc_en,
7327 VPP_LINE_BUFFER_EN_BIT, 1);
7328 }
7329 /* for bypass pps debug */
7330 if ((vpp_filter->vpp_hsc_start_phase_step == 0x1000000) &&
7331 (vpp_filter->vpp_vsc_start_phase_step == 0x1000000) &&
7332 (vpp_filter->vpp_hsc_start_phase_step ==
7333 vpp_filter->vpp_hf_start_phase_step) &&
7334 !vpp_filter->vpp_pre_vsc_en &&
7335 !vpp_filter->vpp_pre_hsc_en &&
7336 bypass_pps)
7337 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7338 0, VPP_SC_TOP_EN_BIT, VPP_SC_TOP_EN_WID);
7339 /*turn off vertical scaler when 3d display */
7340 /* CLEAR_MPEG_REG_MASK(VPP_SC_MISC,VPP_SC_VERT_EN); */
7341 if (platform_type == 1) {
7342 if (last_mode_3d) {
7343 VSYNC_WR_MPEG_REG(
7344 VPP_SC_MISC + cur_dev->vpp_off,
7345 READ_MPEG_REG(VPP_SC_MISC +
7346 cur_dev->vpp_off) &
7347 (~VPP_SC_VERT_EN));
7348 }
7349 }
7350 /* horitontal filter settings */
7351 VSYNC_WR_MPEG_REG_BITS(
7352 VPP_SC_MISC + cur_dev->vpp_off,
7353 vpp_filter->vpp_horz_coeff[0],
7354 VPP_SC_HBANK_LENGTH_BIT,
7355 VPP_SC_BANK_LENGTH_WID);
7356
7357 /* fix the pps last line dummy issue */
7358 if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12B))
7359 VSYNC_WR_MPEG_REG_BITS(
7360 VPP_SC_MISC + cur_dev->vpp_off,
7361 1, 24, 1);
7362
7363 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
7364 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8)
7365 && !is_meson_mtvd_cpu()) {
7366 VSYNC_WR_MPEG_REG_BITS(VPP_VSC_PHASE_CTRL +
7367 cur_dev->vpp_off,
7368 (vpp_filter->vpp_vert_coeff[0] == 2) ? 1 : 0,
7369 VPP_PHASECTL_DOUBLELINE_BIT,
7370 VPP_PHASECTL_DOUBLELINE_WID);
7371 }
7372 /* #endif */
7373
7374 if (vpp_filter->vpp_horz_coeff[1] & 0x8000) {
7375 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF_IDX +
7376 cur_dev->vpp_off,
7377 VPP_COEF_HORZ | VPP_COEF_9BIT);
7378 } else {
7379 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF_IDX +
7380 cur_dev->vpp_off,
7381 VPP_COEF_HORZ);
7382 }
7383
7384 for (i = 0; i < (vpp_filter->vpp_horz_coeff[1] & 0xff); i++) {
7385 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF + cur_dev->vpp_off,
7386 vpp_filter->vpp_horz_coeff[i + 2]);
7387 }
7388
7389 /* vertical filter settings */
7390 VSYNC_WR_MPEG_REG_BITS(VPP_SC_MISC + cur_dev->vpp_off,
7391 vpp_filter->vpp_vert_coeff[0],
7392 VPP_SC_VBANK_LENGTH_BIT,
7393 VPP_SC_BANK_LENGTH_WID);
7394
7395 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF_IDX + cur_dev->vpp_off,
7396 VPP_COEF_VERT);
7397 for (i = 0; i < vpp_filter->vpp_vert_coeff[1]; i++) {
7398 VSYNC_WR_MPEG_REG(VPP_SCALE_COEF + cur_dev->vpp_off,
7399 vpp_filter->vpp_vert_coeff[i + 2]);
7400 }
7401
7402 /* vertical chroma filter settings */
7403 if (vpp_filter->vpp_vert_chroma_filter_en) {
7404 const u32 *pCoeff = vpp_filter->vpp_vert_chroma_coeff;
7405
7406 VSYNC_WR_MPEG_REG(
7407 VPP_SCALE_COEF_IDX + cur_dev->vpp_off,
7408 VPP_COEF_VERT_CHROMA|VPP_COEF_SEP_EN);
7409 for (i = 0; i < pCoeff[1]; i++)
7410 VSYNC_WR_MPEG_REG(
7411 VPP_SCALE_COEF + cur_dev->vpp_off,
7412 pCoeff[i + 2]);
7413 }
7414 /* work around to cut the last green line
7415 *when two layer dv display and do vskip
7416 */
7417 if (is_dolby_vision_on() &&
7418 (cur_frame_par->vscale_skip_count > 0)
7419 && cur_dispbuf2
7420 && (cur_frame_par->VPP_pic_in_height_ > 0))
7421 cur_frame_par->VPP_pic_in_height_--;
7422 VSYNC_WR_MPEG_REG(VPP_PIC_IN_HEIGHT + cur_dev->vpp_off,
7423 cur_frame_par->VPP_pic_in_height_);
7424
7425 VSYNC_WR_MPEG_REG_BITS(VPP_HSC_PHASE_CTRL + cur_dev->vpp_off,
7426 cur_frame_par->VPP_hf_ini_phase_,
7427 VPP_HSC_TOP_INI_PHASE_BIT,
7428 VPP_HSC_TOP_INI_PHASE_WID);
7429 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_H_START_END +
7430 cur_dev->vpp_off,
7431 ((cur_frame_par->VPP_post_blend_vd_h_start_ &
7432 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
7433 ((cur_frame_par->VPP_post_blend_vd_h_end_ &
7434 VPP_VD_SIZE_MASK)
7435 << VPP_VD1_END_BIT));
7436 VSYNC_WR_MPEG_REG(VPP_POSTBLEND_VD1_V_START_END +
7437 cur_dev->vpp_off,
7438 ((cur_frame_par->VPP_post_blend_vd_v_start_ &
7439 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
7440 ((cur_frame_par->VPP_post_blend_vd_v_end_ &
7441 VPP_VD_SIZE_MASK)
7442 << VPP_VD1_END_BIT));
7443
7444 if ((cur_frame_par->VPP_post_blend_vd_v_end_ -
7445 cur_frame_par->VPP_post_blend_vd_v_start_ + 1) > 1080) {
7446 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
7447 cur_dev->vpp_off,
7448 ((cur_frame_par->VPP_post_blend_vd_v_start_ &
7449 VPP_VD_SIZE_MASK) << VPP_VD1_START_BIT) |
7450 ((cur_frame_par->VPP_post_blend_vd_v_end_ &
7451 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
7452 } else {
7453 VSYNC_WR_MPEG_REG(VPP_PREBLEND_VD1_V_START_END +
7454 cur_dev->vpp_off,
7455 ((0 & VPP_VD_SIZE_MASK) <<
7456 VPP_VD1_START_BIT) | ((1079 &
7457 VPP_VD_SIZE_MASK) << VPP_VD1_END_BIT));
7458 }
7459
7460 if (!legacy_vpp) {
7461 VSYNC_WR_MPEG_REG(
7462 VPP_PREBLEND_H_SIZE + cur_dev->vpp_off,
7463 (cur_frame_par->video_input_h << 16)
7464 | cur_frame_par->video_input_w);
7465 VSYNC_WR_MPEG_REG(
7466 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7467 ((cur_frame_par->VPP_post_blend_vd_v_end_ + 1)
7468 << 16) |
7469 cur_frame_par->VPP_post_blend_h_size_);
7470 } else {
7471 VSYNC_WR_MPEG_REG(
7472 VPP_PREBLEND_H_SIZE + cur_dev->vpp_off,
7473 cur_frame_par->VPP_line_in_length_);
7474 VSYNC_WR_MPEG_REG(
7475 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7476 cur_frame_par->VPP_post_blend_h_size_);
7477 }
7478
7479 vpp_settings_h(cur_frame_par);
7480 vpp_settings_v(cur_frame_par);
7481 if (is_dolby_vision_enable() && cur_dispbuf2) {
7482 vd2_settings_h(cur_dispbuf2);
7483 vd2_settings_v(cur_dispbuf2);
7484 }
7485 frame_par_ready_to_set = 0;
7486 frame_par_force_to_set = 0;
7487 first_set = 1;
7488 }
7489 /* VPP one time settings */
7490 wait_sync = 0;
7491
7492 if (!legacy_vpp && vinfo) {
7493 u32 read_value = VSYNC_RD_MPEG_REG(
7494 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off);
7495 if (((vinfo->field_height << 16) | vinfo->width)
7496 != read_value)
7497 VSYNC_WR_MPEG_REG(
7498 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7499 ((vinfo->field_height << 16) | vinfo->width));
7500 } else if (vinfo) {
7501 if (VSYNC_RD_MPEG_REG(
7502 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off)
7503 != vinfo->width)
7504 VSYNC_WR_MPEG_REG(
7505 VPP_POSTBLEND_H_SIZE + cur_dev->vpp_off,
7506 vinfo->width);
7507 }
7508
7509 if (cur_dispbuf && cur_dispbuf->process_fun) {
7510 /* for new deinterlace driver */
7511#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
7512 if (debug_flag & DEBUG_FLAG_PRINT_RDMA) {
7513 if (enable_rdma_log_count > 0)
7514 pr_info("call process_fun\n");
7515 }
7516#endif
7517 cur_dispbuf->process_fun(cur_dispbuf->private_data,
7518 zoom_start_x_lines |
7519 (cur_frame_par->vscale_skip_count <<
7520 24) | (frame_par_di_set << 16),
7521 zoom_end_x_lines, zoom_start_y_lines,
7522 zoom_end_y_lines, cur_dispbuf);
7523 }
7524
7525 exit:
7526#if defined(PTS_LOGGING) || defined(PTS_TRACE_DEBUG)
7527 pts_trace++;
7528#endif
7529 vpp_misc_save = READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off);
7530 vpp_misc_set = vpp_misc_save;
7531#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM
7532 if (!is_dolby_vision_on())
7533 vpp_misc_set |= VPP_CM_ENABLE;
7534 else
7535 vpp_misc_set &= ~VPP_CM_ENABLE;
7536#endif
7537
7538 if (bypass_cm)
7539 vpp_misc_set &= ~VPP_CM_ENABLE;
7540
7541 if (update_osd_vpp_misc && legacy_vpp) {
7542 vpp_misc_set &= ~osd_vpp_misc_mask;
7543 vpp_misc_set |=
7544 (osd_vpp_misc & osd_vpp_misc_mask);
7545 if (vpp_misc_set &
7546 (VPP_OSD1_POSTBLEND | VPP_OSD2_POSTBLEND))
7547 vpp_misc_set |= VPP_POSTBLEND_EN;
7548 }
7549
7550#ifdef VIDEO_PIP
7551 if (cur_pipbuf && (video2_enabled == 1)
7552 && ((vpp_misc_save & VPP_VD2_POSTBLEND) == 0)
7553 && (video2_onoff_state == VIDEO_ENABLE_STATE_IDLE)) {
7554 vpp_misc_set |=
7555 VPP_VD2_POSTBLEND |
7556 VPP_POSTBLEND_EN;
7557 }
7558#endif
7559
7560 if ((video_enabled == 1) && ((vpp_misc_save & VPP_VD1_POSTBLEND) == 0)
7561 && (video_onoff_state == VIDEO_ENABLE_STATE_IDLE)) {
7562 vpp_misc_set |=
7563 VPP_VD1_PREBLEND |
7564 VPP_VD1_POSTBLEND |
7565 VPP_POSTBLEND_EN;
7566 }
7567 if ((video_enabled == 1) && cur_frame_par
7568 && (cur_dispbuf != &vf_local) && (first_set == 0)
7569 && (video_onoff_state == VIDEO_ENABLE_STATE_IDLE)) {
7570 struct vppfilter_mode_s *vpp_filter =
7571 &cur_frame_par->vpp_filter;
7572 u32 h_phase_step, v_phase_step;
7573
7574 h_phase_step = READ_VCBUS_REG(
7575 VPP_HSC_START_PHASE_STEP + cur_dev->vpp_off);
7576 v_phase_step = READ_VCBUS_REG(
7577 VPP_VSC_START_PHASE_STEP + cur_dev->vpp_off);
7578 if ((vpp_filter->vpp_hf_start_phase_step != h_phase_step) ||
7579 (vpp_filter->vpp_vsc_start_phase_step != v_phase_step)) {
7580 video_property_changed = 1;
7581 /*pr_info("frame info register rdma write fail!\n");*/
7582 }
7583 }
7584 if (likely(video_onoff_state != VIDEO_ENABLE_STATE_IDLE)) {
7585 /* state change for video layer enable/disable */
7586
7587 spin_lock_irqsave(&video_onoff_lock, flags);
7588
7589 if (video_onoff_state == VIDEO_ENABLE_STATE_ON_REQ) {
7590 /*
7591 * the video layer is enabled one vsync later,assumming
7592 * all registers are ready from RDMA.
7593 */
7594 video_onoff_state = VIDEO_ENABLE_STATE_ON_PENDING;
7595 } else if (video_onoff_state ==
7596 VIDEO_ENABLE_STATE_ON_PENDING) {
7597 vpp_misc_set |= VPP_VD1_PREBLEND |
7598 VPP_VD1_POSTBLEND |
7599 VPP_POSTBLEND_EN;
7600
7601 video_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7602 video_onoff_time = jiffies_to_msecs(jiffies);
7603
7604 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7605 pr_info("VsyncEnableVideoLayer\n");
7606 vpu_delay_work_flag |=
7607 VPU_VIDEO_LAYER1_CHANGED;
7608 force_flush = 1;
7609 } else if (video_onoff_state == VIDEO_ENABLE_STATE_OFF_REQ) {
7610 vpp_misc_set &= ~(VPP_VD1_PREBLEND |
7611 VPP_VD1_POSTBLEND);
7612 if (process_3d_type)
7613 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7614 VPP_VD2_POSTBLEND | VPP_PREBLEND_EN);
7615 /*auto disable sr when video off*/
7616 if (!is_meson_txl_cpu() &&
7617 !is_meson_txlx_cpu()) {
7618 VSYNC_WR_MPEG_REG(VPP_SRSHARP0_CTRL, 0);
7619 VSYNC_WR_MPEG_REG(VPP_SRSHARP1_CTRL, 0);
7620 }
7621 video_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7622 video_onoff_time = jiffies_to_msecs(jiffies);
7623 vpu_delay_work_flag |=
7624 VPU_VIDEO_LAYER1_CHANGED;
7625 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7626 pr_info("VsyncDisableVideoLayer\n");
7627 video1_off_req = 1;
7628 force_flush = 1;
7629 }
7630
7631 spin_unlock_irqrestore(&video_onoff_lock, flags);
7632 }
7633
7634 if (likely(video2_onoff_state != VIDEO_ENABLE_STATE_IDLE)) {
7635 /* state change for video layer2 enable/disable */
7636
7637 spin_lock_irqsave(&video2_onoff_lock, flags);
7638
7639 if (video2_onoff_state == VIDEO_ENABLE_STATE_ON_REQ) {
7640 /*
7641 * the video layer 2
7642 * is enabled one vsync later, assumming
7643 * all registers are ready from RDMA.
7644 */
7645 video2_onoff_state = VIDEO_ENABLE_STATE_ON_PENDING;
7646 } else if (video2_onoff_state ==
7647 VIDEO_ENABLE_STATE_ON_PENDING) {
7648 if (is_dolby_vision_on())
7649 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7650 VPP_VD2_POSTBLEND | VPP_PREBLEND_EN);
7651 else if (process_3d_type ||
7652 (cur_dispbuf &&
7653 (cur_dispbuf->type & VIDTYPE_MVC)))
7654 vpp_misc_set |= VPP_VD2_PREBLEND |
7655 VPP_PREBLEND_EN;
7656 else if (!legacy_vpp)
7657 vpp_misc_set |= VPP_VD2_POSTBLEND |
7658 VPP_POSTBLEND_EN;
7659 else
7660 vpp_misc_set |= VPP_VD2_PREBLEND |
7661 VPP_PREBLEND_EN;
7662#ifdef VIDEO_PIP
7663 if (cur_pipbuf) {
7664 vpp_misc_set &=
7665 ~(VPP_PREBLEND_EN | VPP_VD2_PREBLEND);
7666 vpp_misc_set |= VPP_VD2_POSTBLEND;
7667 }
7668#endif
7669 /* g12a has no alpha overflow check in hardware */
7670 if (!legacy_vpp)
7671 vpp_misc_set |= (0x100 << VPP_VD2_ALPHA_BIT);
7672 else
7673 vpp_misc_set |= (0x1ff << VPP_VD2_ALPHA_BIT);
7674 video2_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7675 video_onoff_time = jiffies_to_msecs(jiffies);
7676
7677 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7678 pr_info("VsyncEnableVideoLayer2\n");
7679 force_flush = 1;
7680 } else if (video2_onoff_state == VIDEO_ENABLE_STATE_OFF_REQ) {
7681 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7682 VPP_VD2_POSTBLEND | VPP_PREBLEND_EN
7683 | (0x1ff << VPP_VD2_ALPHA_BIT));
7684 video2_onoff_state = VIDEO_ENABLE_STATE_IDLE;
7685 video_onoff_time = jiffies_to_msecs(jiffies);
7686
7687 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7688 pr_info("VsyncDisableVideoLayer2\n");
7689 video2_off_req = 1;
7690 force_flush = 1;
7691 }
7692 spin_unlock_irqrestore(&video2_onoff_lock, flags);
7693 }
7694
7695 if (video_global_output == 0) {
7696 video_enabled = 0;
7697 vpp_misc_set &= ~(VPP_VD1_PREBLEND |
7698 VPP_VD2_PREBLEND |
7699 VPP_VD2_POSTBLEND |
7700 VPP_VD1_POSTBLEND |
7701 VPP_PREBLEND_EN);
7702#ifdef VIDEO_PIP
7703 /* should keep video2 display */
7704 if (cur_pipbuf && video2_enabled)
7705 vpp_misc_set |= VPP_VD2_POSTBLEND;
7706#endif
7707 } else {
7708 video_enabled = video_status_saved;
7709 }
7710
7711 if (!video_enabled &&
7712 (vpp_misc_set & VPP_VD1_POSTBLEND))
7713 vpp_misc_set &= ~(VPP_VD1_PREBLEND |
7714 VPP_VD1_POSTBLEND |
7715 VPP_PREBLEND_EN);
7716
7717#ifdef VIDEO_PIP
7718 if (pip_global_output == 0) {
7719 video2_enabled = 0;
7720 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7721 VPP_VD2_POSTBLEND);
7722 } else {
7723 video2_enabled = video2_status_saved;
7724 }
7725
7726 if (!video2_enabled &&
7727 (vpp_misc_set & VPP_VD2_POSTBLEND))
7728 vpp_misc_set &= ~(VPP_VD2_PREBLEND |
7729 VPP_VD2_POSTBLEND);
7730#endif
7731
7732 if (!legacy_vpp) {
7733 u32 set_value = 0;
7734 force_flush |= vpp_zorder_check();
7735
7736 /* for sr core0, put it between prebld & pps as default */
7737 if (cur_frame_par &&
7738 (cur_frame_par->sr_core_support &
7739 SUPER_CORE0_SUPPORT))
7740 if (cur_frame_par->sr0_position)
7741 vpp_misc_set |=
7742 PREBLD_SR0_VD1_SCALER;
7743 else
7744 vpp_misc_set &=
7745 ~SR0_AFTER_DNLP;
7746 else
7747 vpp_misc_set |=
7748 PREBLD_SR0_VD1_SCALER;
7749 /* for sr core1, put it before post blend as default */
7750 if (cur_frame_par &&
7751 (cur_frame_par->sr_core_support &
7752 SUPER_CORE1_SUPPORT))
7753 if (cur_frame_par->sr1_position)
7754 vpp_misc_set |=
7755 DNLP_SR1_CM;
7756 else
7757 vpp_misc_set &=
7758 ~SR1_AFTER_POSTBLEN;
7759 else
7760 vpp_misc_set |=
7761 DNLP_SR1_CM;
7762
7763 vpp_misc_set &=
7764 ((1 << 29) | VPP_CM_ENABLE |
7765 (0x1ff << VPP_VD2_ALPHA_BIT) |
7766 VPP_VD2_PREBLEND |
7767 VPP_VD1_PREBLEND |
7768 VPP_VD2_POSTBLEND |
7769 VPP_VD1_POSTBLEND |
7770 VPP_PREBLEND_EN |
7771 VPP_POSTBLEND_EN |
7772 0xf);
7773
7774 /* if vd2 is bottom layer, need remove alpha for vd2 */
7775 if (((vpp_misc_set & VPP_VD1_POSTBLEND) == 0)
7776 && (vpp_misc_set & VPP_VD2_POSTBLEND)) {
7777 vpp_misc_set &= ~(0x1ff << VPP_VD2_ALPHA_BIT);
7778 vpp_misc_set |= (0x100 << VPP_VD2_ALPHA_BIT);
7779 }
7780
7781 vpp_misc_save &=
7782 ((1 << 29) | VPP_CM_ENABLE |
7783 (0x1ff << VPP_VD2_ALPHA_BIT) |
7784 VPP_VD2_PREBLEND |
7785 VPP_VD1_PREBLEND |
7786 VPP_VD2_POSTBLEND |
7787 VPP_VD1_POSTBLEND |
7788 VPP_PREBLEND_EN |
7789 VPP_POSTBLEND_EN |
7790 0xf);
7791 if ((vpp_misc_set != vpp_misc_save)
7792 || force_flush) {
7793 u32 port_val[3] = {0, 0, 0};
7794 u32 vd1_port, vd2_port, icnt;
7795 u32 post_blend_reg[3] = {
7796 VD1_BLEND_SRC_CTRL,
7797 VD2_BLEND_SRC_CTRL,
7798 OSD2_BLEND_SRC_CTRL
7799 };
7800
7801 /* just reset the select port */
7802 if ((glayer_info[0].cur_sel_port > 2)
7803 || (glayer_info[1].cur_sel_port > 2)) {
7804 glayer_info[0].cur_sel_port = 0;
7805 glayer_info[1].cur_sel_port = 1;
7806 }
7807
7808 vd1_port = glayer_info[0].cur_sel_port;
7809 vd2_port = glayer_info[1].cur_sel_port;
7810
7811 /* post bld premult*/
7812 port_val[0] |= (1 << 16);
7813
7814 /* vd2 path sel */
7815 if (vpp_misc_set & VPP_VD2_POSTBLEND)
7816 port_val[1] |= (1 << 20);
7817 else
7818 port_val[1] &= ~(1 << 20);
7819
7820 /* osd2 path sel */
7821 port_val[2] |= (1 << 20);
7822
7823 if (vpp_misc_set & VPP_VD1_POSTBLEND) {
7824 /* post src */
7825 port_val[vd1_port] |= (1 << 8);
7826 port_val[0] |=
7827 ((1 << 4) | /* pre bld premult*/
7828 (1 << 0)); /* pre bld src 1 */
7829 } else
7830 port_val[0] &= ~0xff;
7831
7832 if (vpp_misc_set & VPP_VD2_POSTBLEND)
7833 /* post src */
7834 port_val[vd2_port] |= (2 << 8);
7835 else if (vpp_misc_set & VPP_VD2_PREBLEND)
7836 port_val[1] |=
7837 ((1 << 4) | /* pre bld premult*/
7838 (2 << 0)); /* pre bld src 1 */
7839
7840 for (icnt = 0; icnt < 3; icnt++)
7841 VSYNC_WR_MPEG_REG(
7842 post_blend_reg[icnt]
7843 + cur_dev->vpp_off,
7844 port_val[icnt]);
7845
7846 set_value = vpp_misc_set;
7847 set_value &=
7848 ((1 << 29) | VPP_CM_ENABLE |
7849 (0x1ff << VPP_VD2_ALPHA_BIT) |
7850 VPP_VD2_PREBLEND |
7851 VPP_VD1_PREBLEND |
7852 VPP_VD2_POSTBLEND |
7853 VPP_VD1_POSTBLEND |
7854 0xf);
7855 if ((vpp_misc_set & VPP_VD2_PREBLEND)
7856 && (vpp_misc_set & VPP_VD1_PREBLEND))
7857 set_value |= VPP_PREBLEND_EN;
7858 if (bypass_cm)
7859 set_value &= ~VPP_CM_ENABLE;
7860 set_value |= VPP_POSTBLEND_EN;
7861 VSYNC_WR_MPEG_REG(
7862 VPP_MISC + cur_dev->vpp_off,
7863 set_value);
7864 }
7865 } else if (vpp_misc_save != vpp_misc_set)
7866 VSYNC_WR_MPEG_REG(
7867 VPP_MISC + cur_dev->vpp_off,
7868 vpp_misc_set);
7869
7870 /*vpp_misc_set maybe have same,but need off.*/
7871 /* if vd1 off, disable vd2 also */
7872#ifdef VIDEO_PIP
7873 if (video2_off_req && cur_pipbuf) {
7874 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
7875 && video2_off_req)
7876 pr_info("VD2 AFBC off now.\n");
7877 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
7878 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG, 0);
7879 if (!legacy_vpp) {
7880 VSYNC_WR_MPEG_REG(
7881 VD2_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7882 }
7883 if (cur_pipbuf && (cur_pipbuf == &local_pip))
7884 cur_pipbuf = NULL;
7885 } else if (!cur_pipbuf &&
7886 (video2_off_req || video1_off_req)) {
7887 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
7888 && video2_off_req)
7889 pr_info("VD2 AFBC off now.\n");
7890 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
7891 VSYNC_WR_MPEG_REG(VD2_IF0_GEN_REG, 0);
7892 if (!legacy_vpp) {
7893 VSYNC_WR_MPEG_REG(
7894 VD2_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7895 }
7896 last_el_w = 0;
7897 last_el_status = 0;
7898 if (cur_dispbuf2 && (cur_dispbuf2 == &vf_local2))
7899 cur_dispbuf2 = NULL;
7900 need_disable_vd2 = false;
7901 }
7902#else
7903 if (video2_off_req || video1_off_req) {
7904 if ((debug_flag & DEBUG_FLAG_BLACKOUT)
7905 && video2_off_req)
7906 pr_info("VD2 AFBC off now.\n");
7907 VSYNC_WR_MPEG_REG(VD2_AFBC_ENABLE, 0);
7908 VSYNC_WR_MPEG_REG(
7909 VD2_IF0_GEN_REG + cur_dev->viu_off, 0);
7910 if (!legacy_vpp) {
7911 VSYNC_WR_MPEG_REG(
7912 VD2_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7913 }
7914 last_el_w = 0;
7915 last_el_status = 0;
7916 if (cur_dispbuf2 && (cur_dispbuf2 == &vf_local2))
7917 cur_dispbuf2 = NULL;
7918 need_disable_vd2 = false;
7919 }
7920#endif
7921
7922 if (video1_off_req) {
7923 /*
7924 * video layer off, swith off afbc,
7925 * will enabled on new frame coming.
7926 */
7927 if (debug_flag & DEBUG_FLAG_BLACKOUT)
7928 pr_info("AFBC off now.\n");
7929 VSYNC_WR_MPEG_REG(AFBC_ENABLE, 0);
7930 VSYNC_WR_MPEG_REG(
7931 VD1_IF0_GEN_REG + cur_dev->viu_off, 0);
7932 if (!legacy_vpp) {
7933 VSYNC_WR_MPEG_REG(
7934 VD1_BLEND_SRC_CTRL + cur_dev->vpp_off, 0);
7935 }
7936 if (is_dolby_vision_enable()) {
7937 if (is_meson_txlx_stbmode() ||
7938 is_meson_gxm())
7939 VSYNC_WR_MPEG_REG_BITS(
7940 VIU_MISC_CTRL1,
7941 1, 16, 1); /* bypass core1 */
7942 else if (is_meson_g12a_cpu()
7943 || is_meson_g12b_cpu())
7944 VSYNC_WR_MPEG_REG_BITS(
7945 DOLBY_PATH_CTRL, 1, 0, 1);
7946 }
7947 if (cur_dispbuf && (cur_dispbuf == &vf_local))
7948 cur_dispbuf = NULL;
7949 }
7950#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
7951 cur_rdma_buf = cur_dispbuf;
7952#ifdef VIDEO_PIP
7953 pip_rdma_buf = cur_pipbuf;
7954#endif
7955 /* vsync_rdma_config(); */
7956 vsync_rdma_process();
7957 if (debug_flag & DEBUG_FLAG_PRINT_RDMA) {
7958 if (enable_rdma_log_count == 0)
7959 enable_rdma_log(0);
7960 }
7961 rdma_enable_pre = is_vsync_rdma_enable();
7962#endif
7963
7964 if (timer_count > 50) {
7965 timer_count = 0;
7966 video_notify_flag |= VIDEO_NOTIFY_FRAME_WAIT;
7967#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
7968 if ((video_scaler_mode) && (scaler_pos_changed)) {
7969 video_notify_flag |= VIDEO_NOTIFY_POS_CHANGED;
7970 scaler_pos_changed = 0;
7971 } else {
7972 scaler_pos_changed = 0;
7973 video_notify_flag &= ~VIDEO_NOTIFY_POS_CHANGED;
7974 }
7975#endif
7976 }
7977
7978 switch (READ_VCBUS_REG(VPU_VIU_VENC_MUX_CTRL) & 0x3) {
7979 case 0:
7980 enc_line = (READ_VCBUS_REG(ENCL_INFO_READ) >> 16) & 0x1fff;
7981 break;
7982 case 1:
7983 enc_line = (READ_VCBUS_REG(ENCI_INFO_READ) >> 16) & 0x1fff;
7984 break;
7985 case 2:
7986 enc_line = (READ_VCBUS_REG(ENCP_INFO_READ) >> 16) & 0x1fff;
7987 break;
7988 case 3:
7989 enc_line = (READ_VCBUS_REG(ENCT_INFO_READ) >> 16) & 0x1fff;
7990 break;
7991 }
7992 if (enc_line > vsync_exit_line_max)
7993 vsync_exit_line_max = enc_line;
7994
7995#ifdef FIQ_VSYNC
7996 if (video_notify_flag)
7997 fiq_bridge_pulse_trigger(&vsync_fiq_bridge);
7998#else
7999 if (video_notify_flag)
8000 vsync_notify();
8001
8002 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
8003 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) && !is_meson_mtvd_cpu()) {
8004 if (vpu_delay_work_flag)
8005 schedule_work(&vpu_delay_work);
8006 }
8007 /* #endif */
8008
8009 return IRQ_HANDLED;
8010#endif
8011
8012}
8013
8014
8015#ifdef FIQ_VSYNC
8016void vsync_fisr(void)
8017{
8018 atomic_set(&video_inirq_flag, 1);
8019 vsync_fisr_in();
8020 atomic_set(&video_inirq_flag, 0);
8021}
8022#else
8023static irqreturn_t vsync_isr(int irq, void *dev_id)
8024{
8025 irqreturn_t ret;
8026
8027 atomic_set(&video_inirq_flag, 1);
8028 ret = vsync_isr_in(irq, dev_id);
8029 atomic_set(&video_inirq_flag, 0);
8030 return ret;
8031}
8032#endif
8033
8034
8035/*********************************************************
8036 * FIQ Routines
8037 *********************************************************/
8038
8039static void vsync_fiq_up(void)
8040{
8041#ifdef FIQ_VSYNC
8042 request_fiq(INT_VIU_VSYNC, &vsync_fisr);
8043#else
8044 int r;
8045 /*TODO irq */
8046 r = request_irq(video_vsync, &vsync_isr,
8047 IRQF_SHARED, "vsync", (void *)video_dev_id);
8048
8049#ifdef CONFIG_MESON_TRUSTZONE
8050 if (num_online_cpus() > 1)
8051 irq_set_affinity(INT_VIU_VSYNC, cpumask_of(1));
8052#endif
8053#endif
8054}
8055
8056static void vsync_fiq_down(void)
8057{
8058#ifdef FIQ_VSYNC
8059 free_fiq(INT_VIU_VSYNC, &vsync_fisr);
8060#else
8061 /*TODO irq */
8062 free_irq(video_vsync, (void *)video_dev_id);
8063#endif
8064}
8065
8066#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
8067static void vsync2_fiq_up(void)
8068{
8069 int r;
8070
8071 r = request_irq(INT_VIU2_VSYNC, &vsync_isr,
8072 IRQF_SHARED, "vsync", (void *)video_dev_id2);
8073}
8074
8075static void vsync2_fiq_down(void)
8076{
8077 free_irq(INT_VIU2_VSYNC, (void *)video_dev_id2);
8078}
8079
8080#endif
8081
8082int get_curren_frame_para(int *top, int *left, int *bottom, int *right)
8083{
8084 if (!cur_frame_par)
8085 return -1;
8086 *top = cur_frame_par->VPP_vd_start_lines_;
8087 *left = cur_frame_par->VPP_hd_start_lines_;
8088 *bottom = cur_frame_par->VPP_vd_end_lines_;
8089 *right = cur_frame_par->VPP_hd_end_lines_;
8090 return 0;
8091}
8092
8093int get_current_vscale_skip_count(struct vframe_s *vf)
8094{
8095 int ret = 0;
8096 static struct vpp_frame_par_s frame_par;
8097
8098 vpp_set_filters(
8099 &glayer_info[0],
8100 vf, &frame_par, vinfo,
8101 (is_dolby_vision_on() &&
8102 is_dolby_vision_stb_mode()));
8103 ret = frame_par.vscale_skip_count;
8104 if (cur_frame_par && (process_3d_type & MODE_3D_ENABLE))
8105 ret |= (cur_frame_par->vpp_3d_mode<<8);
8106 return ret;
8107}
8108
8109int query_video_status(int type, int *value)
8110{
8111 if (value == NULL)
8112 return -1;
8113 switch (type) {
8114 case 0:
8115 *value = trickmode_fffb;
8116 break;
8117 case 1:
8118 *value = trickmode_i;
8119 break;
8120 default:
8121 break;
8122 }
8123 return 0;
8124}
8125EXPORT_SYMBOL(query_video_status);
8126
8127static void video_vf_unreg_provider(void)
8128{
8129 ulong flags;
8130 struct vframe_s *el_vf = NULL;
8131 int keeped = 0;
8132 new_frame_count = 0;
8133 first_frame_toggled = 0;
8134 videopeek = 0;
8135 nopostvideostart = false;
8136
8137 atomic_set(&video_unreg_flag, 1);
8138 while (atomic_read(&video_inirq_flag) > 0)
8139 schedule();
8140 memset(&video_frame_detect, 0,
8141 sizeof(struct video_frame_detect_s));
8142 frame_detect_drop_count = 0;
8143 frame_detect_receive_count = 0;
8144 spin_lock_irqsave(&lock, flags);
8145
8146#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8147 dispbuf_to_put_num = DISPBUF_TO_PUT_MAX;
8148 while (dispbuf_to_put_num > 0) {
8149 dispbuf_to_put_num--;
8150 dispbuf_to_put[dispbuf_to_put_num] = NULL;
8151 }
8152 cur_rdma_buf = NULL;
8153#endif
8154 if (cur_dispbuf) {
8155 vf_local = *cur_dispbuf;
8156 cur_dispbuf = &vf_local;
8157 cur_dispbuf->video_angle = 0;
8158 }
8159 if (cur_dispbuf2)
8160 need_disable_vd2 = true;
8161 if (is_dolby_vision_enable()) {
8162 if (cur_dispbuf2 == &vf_local2)
8163 cur_dispbuf2 = NULL;
8164 else if (cur_dispbuf2 != NULL) {
8165 vf_local2 = *cur_dispbuf2;
8166 el_vf = &vf_local2;
8167 }
8168 cur_dispbuf2 = NULL;
8169 }
8170 if (trickmode_fffb) {
8171 atomic_set(&trickmode_framedone, 0);
8172 to_notify_trick_wait = false;
8173 }
8174
8175 vsync_pts_100 = 0;
8176 vsync_pts_112 = 0;
8177 vsync_pts_125 = 0;
8178 vsync_freerun = 0;
8179 vsync_pts_align = 0;
8180 vsync_pts_aligned = false;
8181
8182#ifdef VIDEO_PIP
8183 if (pip_loop) {
8184#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8185 pipbuf_to_put = NULL;
8186 pip_rdma_buf = NULL;
8187#endif
8188 if (cur_pipbuf) {
8189 local_pip = *cur_pipbuf;
8190 cur_pipbuf = &local_pip;
8191 cur_pipbuf->video_angle = 0;
8192 }
8193 pip_frame_count = 0;
8194 }
8195#endif
8196 spin_unlock_irqrestore(&lock, flags);
8197
8198#ifdef VIDEO_PIP
8199 if (pip_loop) {
8200 disable_videopip = VIDEO_DISABLE_FORNEXT;
8201 DisableVideoLayer2();
8202 }
8203#endif
8204
8205 if (blackout | force_blackout) {
8206 safe_disble_videolayer();
8207 try_free_keep_video(1);
8208 }
8209
8210#ifdef CONFIG_GE2D_KEEP_FRAME
8211 if (cur_dispbuf) {
8212 /* TODO: mod gate */
8213 /* switch_mod_gate_by_name("ge2d", 1); */
8214 keeped = vf_keep_current(cur_dispbuf, el_vf);
8215 /* TODO: mod gate */
8216 /* switch_mod_gate_by_name("ge2d", 0); */
8217 }
8218 if ((hdmi_in_onvideo == 0) && (video_start_post)) {
8219 tsync_avevent(VIDEO_STOP, 0);
8220 video_start_post = false;
8221 }
8222#else
8223 /* if (!trickmode_fffb) */
8224 if (cur_dispbuf)
8225 keeped = vf_keep_current(cur_dispbuf, el_vf);
8226 if ((hdmi_in_onvideo == 0) && (video_start_post)) {
8227 tsync_avevent(VIDEO_STOP, 0);
8228 video_start_post = false;
8229 }
8230#endif
8231 if (keeped < 0) {/*keep failed.*/
8232 pr_info("video keep failed, disable video now!\n");
8233 safe_disble_videolayer();
8234 try_free_keep_video(1);
8235 }
8236 atomic_set(&video_unreg_flag, 0);
8237 pr_info("VD1 AFBC 0x%x.\n", READ_VCBUS_REG(AFBC_ENABLE));
8238 enable_video_discontinue_report = 1;
8239 show_first_picture = false;
8240 show_first_frame_nosync = false;
8241
8242#ifdef PTS_LOGGING
8243 {
8244 int pattern;
8245 /* Print what we have right now*/
8246 if (pts_pattern_detected >= PTS_32_PATTERN &&
8247 pts_pattern_detected < PTS_MAX_NUM_PATTERNS) {
8248 pr_info("pattern detected = %d, pts_enter_pattern_cnt =%d, pts_exit_pattern_cnt =%d",
8249 pts_pattern_detected,
8250 pts_pattern_enter_cnt[pts_pattern_detected],
8251 pts_pattern_exit_cnt[pts_pattern_detected]);
8252 }
8253 /* Reset all metrics now*/
8254 for (pattern = 0; pattern < PTS_MAX_NUM_PATTERNS; pattern++) {
8255 pts_pattern[pattern] = 0;
8256 pts_pattern_exit_cnt[pattern] = 0;
8257 pts_pattern_enter_cnt[pattern] = 0;
8258 }
8259 /* Reset 4:1 data*/
8260 memset(&pts_41_pattern_sink[0], 0, PTS_41_PATTERN_SINK_MAX);
8261 pts_pattern_detected = -1;
8262 pre_pts_trace = 0;
8263 pts_escape_vsync = 0;
8264 }
8265#endif
8266}
8267
8268static void video_vf_light_unreg_provider(int need_keep_frame)
8269{
8270 ulong flags;
8271
8272 if (need_keep_frame) {
8273 /* wait for the end of the last toggled frame*/
8274 atomic_set(&video_unreg_flag, 1);
8275 while (atomic_read(&video_inirq_flag) > 0)
8276 schedule();
8277 }
8278
8279 spin_lock_irqsave(&lock, flags);
8280#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8281 dispbuf_to_put_num = DISPBUF_TO_PUT_MAX;
8282 while (dispbuf_to_put_num > 0) {
8283 dispbuf_to_put_num--;
8284 dispbuf_to_put[dispbuf_to_put_num] = NULL;
8285 }
8286 cur_rdma_buf = NULL;
8287#endif
8288
8289 if (cur_dispbuf) {
8290 vf_local = *cur_dispbuf;
8291 cur_dispbuf = &vf_local;
8292 }
8293 spin_unlock_irqrestore(&lock, flags);
8294
8295 if (need_keep_frame) {
8296 /* keep the last toggled frame*/
8297 if (cur_dispbuf) {
8298 unsigned int result;
8299
8300 result = vf_keep_current(cur_dispbuf, NULL);
8301 if (result == 0)
8302 pr_info("%s: keep cur_disbuf failed\n",
8303 __func__);
8304 }
8305 atomic_set(&video_unreg_flag, 0);
8306 }
8307}
8308
8309static int get_display_info(void *data)
8310{
8311 s32 w, h, x, y;
8312 struct vdisplay_info_s *info_para = (struct vdisplay_info_s *)data;
8313 const struct vinfo_s *info = get_current_vinfo();
8314 struct disp_info_s *layer = &glayer_info[0];
8315
8316 if ((!cur_frame_par) || (!info))
8317 return -1;
8318
8319 x = layer->layer_left;
8320 y = layer->layer_top;
8321 w = layer->layer_width;
8322 h = layer->layer_height;
8323
8324 if ((w == 0) || (w > info->width))
8325 w = info->width;
8326 if ((h == 0) || (h > info->height))
8327 h = info->height;
8328
8329 info_para->frame_hd_start_lines_ = cur_frame_par->VPP_hd_start_lines_;
8330 info_para->frame_hd_end_lines_ = cur_frame_par->VPP_hd_end_lines_;
8331 info_para->frame_vd_start_lines_ = cur_frame_par->VPP_vd_start_lines_;
8332 info_para->frame_vd_end_lines_ = cur_frame_par->VPP_vd_end_lines_;
8333 info_para->display_hsc_startp = cur_frame_par->VPP_hsc_startp - x;
8334 info_para->display_hsc_endp =
8335 cur_frame_par->VPP_hsc_endp + (info->width - x - w);
8336 info_para->display_vsc_startp = cur_frame_par->VPP_vsc_startp - y;
8337 info_para->display_vsc_endp =
8338 cur_frame_par->VPP_vsc_endp + (info->height - y - h);
8339 info_para->screen_vd_h_start_ =
8340 cur_frame_par->VPP_post_blend_vd_h_start_;
8341 info_para->screen_vd_h_end_ =
8342 cur_frame_par->VPP_post_blend_vd_h_end_;
8343 info_para->screen_vd_v_start_ =
8344 cur_frame_par->VPP_post_blend_vd_v_start_;
8345 info_para->screen_vd_v_end_ = cur_frame_par->VPP_post_blend_vd_v_end_;
8346
8347 return 0;
8348}
8349#if ENABLE_UPDATE_HDR_FROM_USER
8350void init_hdr_info(void)
8351{
8352 unsigned long flags;
8353
8354 spin_lock_irqsave(&omx_hdr_lock, flags);
8355
8356 has_hdr_info = false;
8357 memset(&vf_hdr, 0, sizeof(vf_hdr));
8358
8359 spin_unlock_irqrestore(&omx_hdr_lock, flags);
8360}
8361#endif
8362static int video_receiver_event_fun(int type, void *data, void *private_data)
8363{
8364#ifdef CONFIG_AM_VIDEO2
8365 char *provider_name;
8366#endif
8367 if (type == VFRAME_EVENT_PROVIDER_UNREG) {
8368 video_vf_unreg_provider();
8369#ifdef CONFIG_AM_VIDEO2
8370 set_clone_frame_rate(android_clone_rate, 200);
8371#endif
8372 drop_frame_count = 0;
8373 receive_frame_count = 0;
8374 display_frame_count = 0;
8375 //init_hdr_info();
8376
8377 } else if (type == VFRAME_EVENT_PROVIDER_RESET) {
8378 video_vf_light_unreg_provider(1);
8379 } else if (type == VFRAME_EVENT_PROVIDER_LIGHT_UNREG)
8380 video_vf_light_unreg_provider(0);
8381 else if (type == VFRAME_EVENT_PROVIDER_REG) {
8382 enable_video_discontinue_report = 1;
8383 drop_frame_count = 0;
8384 receive_frame_count = 0;
8385 display_frame_count = 0;
8386 omx_run = false;
8387 omx_pts_set_from_hwc_count = 0;
8388 omx_check_previous_session = true;
8389 omx_need_drop_frame_num = 0;
8390 omx_drop_done = false;
8391 omx_pts_set_index = 0;
8392 //init_hdr_info();
8393
8394#ifdef CONFIG_AM_VIDEO2
8395 provider_name = (char *)data;
8396 if (strncmp(provider_name, "decoder", 7) == 0
8397 || strncmp(provider_name, "ppmgr", 5) == 0
8398 || strncmp(provider_name, "deinterlace", 11) == 0
8399 || strncmp(provider_name, "d2d3", 11) == 0) {
8400 set_clone_frame_rate(noneseamless_play_clone_rate, 0);
8401 set_clone_frame_rate(video_play_clone_rate, 100);
8402 }
8403#endif
8404/*notify di 3d mode is frame*/
8405/*alternative mode,passing two buffer in one frame */
8406 if (platform_type == 1) {
8407 if ((process_3d_type & MODE_3D_FA) &&
8408 !cur_dispbuf->trans_fmt)
8409 vf_notify_receiver_by_name("deinterlace",
8410 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE,
8411 (void *)1);
8412 }
8413
8414 video_vf_light_unreg_provider(0);
8415 } else if (type == VFRAME_EVENT_PROVIDER_FORCE_BLACKOUT) {
8416 force_blackout = 1;
8417 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
8418 pr_info("%s VFRAME_EVENT_PROVIDER_FORCE_BLACKOUT\n",
8419 __func__);
8420 }
8421 } else if (type == VFRAME_EVENT_PROVIDER_FR_HINT) {
8422#ifdef CONFIG_AM_VOUT
8423 if ((data != NULL) && (video_seek_flag == 0)) {
8424 set_vframe_rate_hint((unsigned long)data);
8425 omx_pts_dv_upper = DUR2PTS((unsigned long)data) * 3 / 2;
8426 omx_pts_dv_lower = 0 - DUR2PTS((unsigned long)data);
8427 }
8428#endif
8429 } else if (type == VFRAME_EVENT_PROVIDER_FR_END_HINT) {
8430#ifdef CONFIG_AM_VOUT
8431 if (video_seek_flag == 0) {
8432 set_vframe_rate_end_hint();
8433 omx_pts_dv_upper = OMX_PTS_DV_DEFAULT_UPPER;
8434 omx_pts_dv_lower = OMX_PTS_DV_DEFAULT_LOWER;
8435 }
8436#endif
8437 } else if (type == VFRAME_EVENT_PROVIDER_QUREY_DISPLAY_INFO) {
8438 get_display_info(data);
8439 } else if (type == VFRAME_EVENT_PROVIDER_PROPERTY_CHANGED)
8440 video_property_changed = 1;
8441 return 0;
8442}
8443
8444#ifdef VIDEO_PIP
8445static void pip_vf_unreg_provider(void)
8446{
8447 ulong flags;
8448
8449 /* atomic_set(&video_unreg_flag, 1); */
8450 while (atomic_read(&video_inirq_flag) > 0)
8451 schedule();
8452 spin_lock_irqsave(&lock, flags);
8453
8454#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8455 pipbuf_to_put = NULL;
8456 pip_rdma_buf = NULL;
8457#endif
8458 if (cur_pipbuf) {
8459 local_pip = *cur_pipbuf;
8460 cur_pipbuf = &local_pip;
8461 cur_pipbuf->video_angle = 0;
8462 }
8463 pip_frame_count = 0;
8464 spin_unlock_irqrestore(&lock, flags);
8465
8466 disable_videopip = VIDEO_DISABLE_FORNEXT;
8467 DisableVideoLayer2();
8468}
8469
8470static void pip_vf_light_unreg_provider(void)
8471{
8472 ulong flags;
8473
8474 spin_lock_irqsave(&lock, flags);
8475#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
8476 pipbuf_to_put = NULL;
8477 pip_rdma_buf = NULL;
8478#endif
8479
8480 if (cur_pipbuf) {
8481 local_pip = *cur_pipbuf;
8482 cur_pipbuf = &local_pip;
8483 }
8484 spin_unlock_irqrestore(&lock, flags);
8485}
8486
8487static int pip_receiver_event_fun(
8488 int type, void *data, void *private_data)
8489{
8490 if (type == VFRAME_EVENT_PROVIDER_UNREG)
8491 pip_vf_unreg_provider();
8492 else if (type == VFRAME_EVENT_PROVIDER_RESET)
8493 pip_vf_light_unreg_provider();
8494 else if (type == VFRAME_EVENT_PROVIDER_LIGHT_UNREG)
8495 pip_vf_light_unreg_provider();
8496 else if (type == VFRAME_EVENT_PROVIDER_REG)
8497 pip_vf_light_unreg_provider();
8498 return 0;
8499}
8500#endif
8501
8502unsigned int get_post_canvas(void)
8503{
8504 return post_canvas;
8505}
8506EXPORT_SYMBOL(get_post_canvas);
8507
8508
8509u32 get_blackout_policy(void)
8510{
8511 return blackout | force_blackout;
8512}
8513EXPORT_SYMBOL(get_blackout_policy);
8514
8515u32 set_blackout_policy(int policy)
8516{
8517 blackout = policy;
8518 return 0;
8519}
8520EXPORT_SYMBOL(set_blackout_policy);
8521
8522u8 is_vpp_postblend(void)
8523{
8524 if (READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off) & VPP_VD1_POSTBLEND)
8525 return 1;
8526 return 0;
8527}
8528EXPORT_SYMBOL(is_vpp_postblend);
8529
8530void pause_video(unsigned char pause_flag)
8531{
8532 atomic_set(&video_pause_flag, pause_flag ? 1 : 0);
8533}
8534EXPORT_SYMBOL(pause_video);
8535/*********************************************************
8536 * Utilities
8537 *********************************************************/
8538int _video_set_disable(u32 val)
8539{
8540 if (val > VIDEO_DISABLE_FORNEXT)
8541 return -EINVAL;
8542
8543 disable_video = val;
8544
8545 if (disable_video != VIDEO_DISABLE_NONE) {
8546 safe_disble_videolayer();
8547
8548 if ((disable_video == VIDEO_DISABLE_FORNEXT) && cur_dispbuf
8549 && (cur_dispbuf != &vf_local))
8550 video_property_changed = 1;
8551 try_free_keep_video(0);
8552 } else {
8553 if (cur_dispbuf && (cur_dispbuf != &vf_local)) {
8554 EnableVideoLayer();
8555 video_property_changed = 1;
8556 }
8557 }
8558
8559 return 0;
8560}
8561
8562static void _set_video_crop(
8563 struct disp_info_s *layer, int *p)
8564{
8565 int last_l, last_r, last_t, last_b;
8566 int new_l, new_r, new_t, new_b;
8567
8568 if (!layer)
8569 return;
8570
8571 last_t = layer->crop_top;
8572 last_l = layer->crop_left;
8573 last_b = layer->crop_bottom;
8574 last_r = layer->crop_right;
8575
8576 new_t = layer->crop_top = p[0];
8577 new_l = layer->crop_left = p[1];
8578 new_b = layer->crop_bottom = p[2];
8579 new_r = layer->crop_right = p[3];
8580 if ((new_t != last_t) || (new_l != last_l)
8581 || (new_b != last_b) || (new_r != last_r)) {
8582 if (layer->layer_id == 0)
8583 video_property_changed = 1;
8584#ifdef VIDEO_PIP
8585 else if (layer->layer_id == 1)
8586 pip_property_changed = 1;
8587#endif
8588 }
8589}
8590
8591static void _set_video_window(
8592 struct disp_info_s *layer, int *p)
8593{
8594 int w, h;
8595 int *parsed = p;
8596 int last_x, last_y, last_w, last_h;
8597 int new_x, new_y, new_w, new_h;
8598#ifdef TV_REVERSE
8599 int temp, temp1;
8600 const struct vinfo_s *info = get_current_vinfo();
8601#endif
8602
8603 if (!layer)
8604 return;
8605
8606#ifdef TV_REVERSE
8607 /* FIXME: use layer info */
8608 if (reverse) {
8609 temp = parsed[0];
8610 temp1 = parsed[1];
8611 parsed[0] = info->width - parsed[2] - 1;
8612 parsed[1] = info->height - parsed[3] - 1;
8613 parsed[2] = info->width - temp - 1;
8614 parsed[3] = info->height - temp1 - 1;
8615 }
8616#endif
8617
8618 last_x = layer->layer_left;
8619 last_y = layer->layer_top;
8620 last_w = layer->layer_width;
8621 last_h = layer->layer_height;
8622
8623 if (parsed[0] < 0 && parsed[2] < 2) {
8624 parsed[2] = 2;
8625 parsed[0] = 0;
8626 }
8627 if (parsed[1] < 0 && parsed[3] < 2) {
8628 parsed[3] = 2;
8629 parsed[1] = 0;
8630 }
8631 w = parsed[2] - parsed[0] + 1;
8632 h = parsed[3] - parsed[1] + 1;
8633
8634#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
8635 if (video_scaler_mode) {
8636 if ((w == 1) && (h == 1)) {
8637 w = 0;
8638 h = 0;
8639 }
8640 if ((content_left != parsed[0]) || (content_top != parsed[1])
8641 || (content_w != w) || (content_h != h))
8642 scaler_pos_changed = 1;
8643 content_left = parsed[0];
8644 content_top = parsed[1];
8645 content_w = w;
8646 content_h = h;
8647 /* video_notify_flag =*/
8648 /*video_notify_flag|VIDEO_NOTIFY_POS_CHANGED; */
8649 } else
8650#endif
8651 {
8652 if ((w > 0) && (h > 0)) {
8653 if ((w == 1) && (h == 1)) {
8654 w = 0;
8655 h = 0;
8656 }
8657 layer->layer_left = parsed[0];
8658 layer->layer_top = parsed[1];
8659 layer->layer_width = w;
8660 layer->layer_height = h;
8661 }
8662 }
8663
8664 new_x = layer->layer_left;
8665 new_y = layer->layer_top;
8666 new_w = layer->layer_width;
8667 new_h = layer->layer_height;
8668
8669 if ((last_x != new_x) || (last_y != new_y)
8670 || (last_w != new_w) || (last_h != new_h)) {
8671 if (layer->layer_id == 0)
8672 video_property_changed = 1;
8673#ifdef VIDEO_PIP
8674 else if (layer->layer_id == 1)
8675 pip_property_changed = 1;
8676#endif
8677 }
8678}
8679#if ENABLE_UPDATE_HDR_FROM_USER
8680static void config_hdr_info(const struct vframe_master_display_colour_s p)
8681{
8682 struct vframe_master_display_colour_s tmp = {0};
8683 bool valid_hdr = false;
8684 unsigned long flags;
8685
8686 tmp.present_flag = p.present_flag;
8687 if (tmp.present_flag == 1) {
8688 tmp = p;
8689
8690 if (tmp.primaries[0][0] == 0 &&
8691 tmp.primaries[0][1] == 0 &&
8692 tmp.primaries[1][0] == 0 &&
8693 tmp.primaries[1][1] == 0 &&
8694 tmp.primaries[2][0] == 0 &&
8695 tmp.primaries[2][1] == 0 &&
8696 tmp.white_point[0] == 0 &&
8697 tmp.white_point[1] == 0 &&
8698 tmp.luminance[0] == 0 &&
8699 tmp.luminance[1] == 0 &&
8700 tmp.content_light_level.max_content == 0 &&
8701 tmp.content_light_level.max_pic_average == 0) {
8702 valid_hdr = false;
8703 } else {
8704 valid_hdr = true;
8705 }
8706 }
8707
8708 spin_lock_irqsave(&omx_hdr_lock, flags);
8709 vf_hdr = tmp;
8710 has_hdr_info = valid_hdr;
8711 spin_unlock_irqrestore(&omx_hdr_lock, flags);
8712
8713 pr_debug("has_hdr_info %d\n", has_hdr_info);
8714}
8715#endif
8716static void set_omx_pts(u32 *p)
8717{
8718 u32 tmp_pts = p[0];
8719 /*u32 vision = p[1];*/
8720 u32 set_from_hwc = p[2];
8721 u32 frame_num = p[3];
8722 u32 not_reset = p[4];
8723 u32 session = p[5];
8724 unsigned int try_cnt = 0x1000;
8725
8726 mutex_lock(&omx_mutex);
8727 if (omx_pts_set_index < frame_num)
8728 omx_pts_set_index = frame_num;
8729
8730 if (omx_check_previous_session) {
8731 if (session != omx_cur_session) {
8732 omx_cur_session = session;
8733 omx_check_previous_session = false;
8734 } else {
8735 mutex_unlock(&omx_mutex);
8736 pr_info("check session return: tmp_pts %d"
8737 "session=0x%x\n", tmp_pts, omx_cur_session);
8738 return;
8739 }
8740 }
8741 if (debug_flag & DEBUG_FLAG_PTS_TRACE)
8742 pr_info("[set_omx_pts]tmp_pts:%d, set_from_hwc:%d,frame_num=%d, not_reset=%d\n",
8743 tmp_pts, set_from_hwc, frame_num, not_reset);
8744
8745 if (not_reset == 0)
8746 omx_pts = tmp_pts;
8747 /* kodi may render first frame, then drop dozens of frames */
8748 if (set_from_hwc == 0 && omx_run == true && frame_num <= 2
8749 && not_reset == 0) {
8750 pr_info("reset omx_run to false.\n");
8751 omx_run = false;
8752 }
8753 if (set_from_hwc == 1) {
8754 if (!omx_run) {
8755 omx_need_drop_frame_num =
8756 frame_num > 0 ? frame_num-1 : 0;
8757 if (omx_need_drop_frame_num == 0)
8758 omx_drop_done = true;
8759 pr_info("omx_need_drop_frame_num %d\n",
8760 omx_need_drop_frame_num);
8761 }
8762 omx_run = true;
8763 if (omx_pts_set_from_hwc_count < OMX_MAX_COUNT_RESET_SYSTEMTIME)
8764 omx_pts_set_from_hwc_count++;
8765
8766 } else if (set_from_hwc == 0 && !omx_run) {
8767 struct vframe_s *vf = NULL;
8768 u32 donot_drop = 0;
8769
8770 while (try_cnt--) {
8771 vf = vf_peek(RECEIVER_NAME);
8772#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
8773 if (is_dolby_vision_enable()
8774 && vf && is_dovi_frame(vf)) {
8775 pr_info("set_omx_pts ignore the omx %d frames drop for dv frame\n",
8776 frame_num);
8777 donot_drop = 1;
8778 break;
8779 }
8780#endif
8781 if (vf) {
8782 pr_debug("drop frame_num=%d, vf->omx_index=%d\n",
8783 frame_num, vf->omx_index);
8784 if (frame_num >= vf->omx_index) {
8785 vf = vf_get(RECEIVER_NAME);
8786 if (vf)
8787 vf_put(vf, RECEIVER_NAME);
8788 } else
8789 break;
8790 } else
8791 break;
8792 }
8793 if (donot_drop && omx_pts_set_from_hwc_count > 0) {
8794 pr_info("reset omx_run to true.\n");
8795 omx_run = true;
8796 }
8797 }
8798 mutex_unlock(&omx_mutex);
8799}
8800
8801static int alloc_layer(u32 layer_id)
8802{
8803 int ret = -EINVAL;
8804
8805 if (layer_id == 0) {
8806 if (layer_cap & LAYER0_BUSY) {
8807 ret = -EBUSY;
8808 } else if (layer_cap & LAYER0_AVAIL) {
8809 ret = 0;
8810 layer_cap |= LAYER0_BUSY;
8811 }
8812 } else if (layer_id == 1) {
8813 if (layer_cap & LAYER1_BUSY) {
8814 ret = -EBUSY;
8815 } else if (layer_cap & LAYER1_AVAIL) {
8816 ret = 0;
8817 layer_cap |= LAYER1_BUSY;
8818 }
8819 }
8820 return ret;
8821}
8822
8823static int free_layer(u32 layer_id)
8824{
8825 int ret = -EINVAL;
8826
8827 if (layer_id == 0) {
8828 if ((layer_cap & LAYER0_BUSY)
8829 && (layer_cap & LAYER0_AVAIL)) {
8830 ret = 0;
8831 layer_cap &= ~LAYER0_BUSY;
8832 }
8833 } else if (layer_id == 1) {
8834 if ((layer_cap & LAYER1_BUSY)
8835 && (layer_cap & LAYER1_AVAIL)) {
8836 ret = 0;
8837 layer_cap &= ~LAYER1_BUSY;
8838 }
8839 }
8840 return ret;
8841}
8842
8843/*********************************************************
8844 * /dev/amvideo APIs
8845 ********************************************************
8846 */
8847static int amvideo_open(struct inode *inode, struct file *file)
8848{
8849 file->private_data = NULL;
8850 return 0;
8851}
8852
8853static int amvideo_poll_open(struct inode *inode, struct file *file)
8854{
8855 file->private_data = NULL;
8856 return 0;
8857}
8858
8859static int amvideo_release(struct inode *inode, struct file *file)
8860{
8861 file->private_data = NULL;
8862 return 0;
8863}
8864
8865static int amvideo_poll_release(struct inode *inode, struct file *file)
8866{
8867 file->private_data = NULL;
8868 return 0;
8869}
8870
8871static long amvideo_ioctl(struct file *file, unsigned int cmd, ulong arg)
8872{
8873 long ret = 0;
8874 void __user *argp = (void __user *)arg;
8875 struct disp_info_s *layer = &glayer_info[0];
8876 u32 layer_id;
8877
8878 switch (cmd) {
8879 case AMSTREAM_IOC_GLOBAL_SET_VIDEOPIP_OUTPUT:
8880 case AMSTREAM_IOC_GLOBAL_GET_VIDEOPIP_OUTPUT:
8881 case AMSTREAM_IOC_GET_VIDEOPIP_DISABLE:
8882 case AMSTREAM_IOC_SET_VIDEOPIP_DISABLE:
8883 case AMSTREAM_IOC_GET_VIDEOPIP_AXIS:
8884 case AMSTREAM_IOC_SET_VIDEOPIP_AXIS:
8885 case AMSTREAM_IOC_GET_VIDEOPIP_CROP:
8886 case AMSTREAM_IOC_SET_VIDEOPIP_CROP:
8887 case AMSTREAM_IOC_GET_PIP_SCREEN_MODE:
8888 case AMSTREAM_IOC_SET_PIP_SCREEN_MODE:
8889 case AMSTREAM_IOC_GET_PIP_ZORDER:
8890 case AMSTREAM_IOC_SET_PIP_ZORDER:
8891 layer = &glayer_info[1];
8892 break;
8893 default:
8894 break;
8895 }
8896
8897 if (file->private_data)
8898 layer = (struct disp_info_s *)file->private_data;
8899
8900 switch (cmd) {
8901 case AMSTREAM_IOC_SET_HDR_INFO:{
8902#if ENABLE_UPDATE_HDR_FROM_USER
8903 struct vframe_master_display_colour_s tmp;
8904 if (copy_from_user(&tmp, argp, sizeof(tmp)) == 0)
8905 config_hdr_info(tmp);
8906#endif
8907 }
8908 break;
8909 case AMSTREAM_IOC_SET_OMX_VPTS:{
8910 u32 pts[6];
8911 if (copy_from_user(pts, argp, sizeof(pts)) == 0)
8912 set_omx_pts(pts);
8913 }
8914 break;
8915
8916 case AMSTREAM_IOC_GET_OMX_VPTS:
8917 put_user(omx_pts, (u32 __user *)argp);
8918 break;
8919
8920 case AMSTREAM_IOC_GET_OMX_VERSION:
8921 put_user(omx_version, (u32 __user *)argp);
8922 break;
8923
8924 case AMSTREAM_IOC_GET_OMX_INFO:
8925 put_user(omx_info, (u32 __user *)argp);
8926 break;
8927
8928 case AMSTREAM_IOC_TRICKMODE:
8929 if (arg == TRICKMODE_I)
8930 trickmode_i = 1;
8931 else if (arg == TRICKMODE_FFFB)
8932 trickmode_fffb = 1;
8933 else {
8934 trickmode_i = 0;
8935 trickmode_fffb = 0;
8936 }
8937 to_notify_trick_wait = false;
8938 atomic_set(&trickmode_framedone, 0);
8939 tsync_trick_mode(trickmode_fffb);
8940 break;
8941
8942 case AMSTREAM_IOC_TRICK_STAT:
8943 put_user(atomic_read(&trickmode_framedone),
8944 (u32 __user *)argp);
8945 break;
8946
8947 case AMSTREAM_IOC_GET_TRICK_VPTS:
8948 put_user(trickmode_vpts, (u32 __user *)argp);
8949 break;
8950
8951 case AMSTREAM_IOC_VPAUSE:
8952 tsync_avevent(VIDEO_PAUSE, arg);
8953 break;
8954
8955 case AMSTREAM_IOC_AVTHRESH:
8956 tsync_set_avthresh(arg);
8957 break;
8958
8959 case AMSTREAM_IOC_SYNCTHRESH:
8960 tsync_set_syncthresh(arg);
8961 break;
8962
8963 case AMSTREAM_IOC_SYNCENABLE:
8964 tsync_set_enable(arg);
8965 break;
8966
8967 case AMSTREAM_IOC_SET_SYNC_ADISCON:
8968 tsync_set_sync_adiscont(arg);
8969 break;
8970
8971 case AMSTREAM_IOC_SET_SYNC_VDISCON:
8972 tsync_set_sync_vdiscont(arg);
8973 break;
8974
8975 case AMSTREAM_IOC_GET_SYNC_ADISCON:
8976 put_user(tsync_get_sync_adiscont(), (u32 __user *)argp);
8977 break;
8978
8979 case AMSTREAM_IOC_GET_SYNC_VDISCON:
8980 put_user(tsync_get_sync_vdiscont(), (u32 __user *)argp);
8981 break;
8982
8983 case AMSTREAM_IOC_GET_SYNC_ADISCON_DIFF:
8984 put_user(tsync_get_sync_adiscont_diff(), (u32 __user *)argp);
8985 break;
8986
8987 case AMSTREAM_IOC_GET_SYNC_VDISCON_DIFF:
8988 put_user(tsync_get_sync_vdiscont_diff(), (u32 __user *)argp);
8989 break;
8990
8991 case AMSTREAM_IOC_SET_SYNC_ADISCON_DIFF:
8992 tsync_set_sync_adiscont_diff(arg);
8993 break;
8994
8995 case AMSTREAM_IOC_SET_SYNC_VDISCON_DIFF:
8996 tsync_set_sync_vdiscont_diff(arg);
8997 break;
8998
8999 case AMSTREAM_IOC_VF_STATUS:{
9000 struct vframe_states vfsta;
9001 struct vframe_states states;
9002
9003 video_vf_get_states(&vfsta);
9004 states.vf_pool_size = vfsta.vf_pool_size;
9005 states.buf_avail_num = vfsta.buf_avail_num;
9006 states.buf_free_num = vfsta.buf_free_num;
9007 states.buf_recycle_num = vfsta.buf_recycle_num;
9008 if (copy_to_user(argp, &states, sizeof(states)))
9009 ret = -EFAULT;
9010 }
9011 break;
9012
9013 case AMSTREAM_IOC_GET_VIDEOPIP_DISABLE:
9014 case AMSTREAM_IOC_GET_VIDEO_DISABLE:
9015 if (layer->layer_id == 0)
9016 put_user(disable_video, (u32 __user *)argp);
9017#ifdef VIDEO_PIP
9018 else if (layer->layer_id == 1)
9019 put_user(disable_videopip, (u32 __user *)argp);
9020#endif
9021 break;
9022
9023 case AMSTREAM_IOC_SET_VIDEOPIP_DISABLE:
9024 case AMSTREAM_IOC_SET_VIDEO_DISABLE:
9025 {
9026 u32 val;
9027
9028 if (copy_from_user(&val, argp, sizeof(u32)) == 0) {
9029 if (layer->layer_id == 0)
9030 ret = _video_set_disable(val);
9031#ifdef VIDEO_PIP
9032 else if (layer->layer_id == 1)
9033 ret = _videopip_set_disable(val);
9034#endif
9035 } else
9036 ret = -EFAULT;
9037 }
9038 break;
9039
9040 case AMSTREAM_IOC_GET_VIDEO_DISCONTINUE_REPORT:
9041 put_user(enable_video_discontinue_report, (u32 __user *)argp);
9042 break;
9043
9044 case AMSTREAM_IOC_SET_VIDEO_DISCONTINUE_REPORT:
9045 enable_video_discontinue_report = (arg == 0) ? 0 : 1;
9046 break;
9047
9048 case AMSTREAM_IOC_GET_VIDEOPIP_AXIS:
9049 case AMSTREAM_IOC_GET_VIDEO_AXIS:
9050 {
9051 int axis[4];
9052#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
9053 if (video_scaler_mode && (layer->layer_id == 0)) {
9054 axis[0] = content_left;
9055 axis[1] = content_top;
9056 axis[2] = content_w;
9057 axis[3] = content_h;
9058 } else
9059#endif
9060 {
9061 axis[0] = layer->layer_left;
9062 axis[1] = layer->layer_top;
9063 axis[2] = layer->layer_width;
9064 axis[3] = layer->layer_height;
9065 }
9066
9067 axis[2] = axis[0] + axis[2] - 1;
9068 axis[3] = axis[1] + axis[3] - 1;
9069
9070 if (copy_to_user(argp, &axis[0], sizeof(axis)) != 0)
9071 ret = -EFAULT;
9072 }
9073 break;
9074
9075 case AMSTREAM_IOC_SET_VIDEOPIP_AXIS:
9076 case AMSTREAM_IOC_SET_VIDEO_AXIS:
9077 {
9078 int axis[4];
9079
9080 if (copy_from_user(axis, argp, sizeof(axis)) == 0)
9081 _set_video_window(layer, axis);
9082 else
9083 ret = -EFAULT;
9084 }
9085 break;
9086
9087 case AMSTREAM_IOC_GET_VIDEOPIP_CROP:
9088 case AMSTREAM_IOC_GET_VIDEO_CROP:
9089 {
9090 int crop[4];
9091 {
9092 crop[0] = layer->crop_top;
9093 crop[1] = layer->crop_left;
9094 crop[2] = layer->crop_bottom;
9095 crop[3] = layer->crop_right;
9096 }
9097
9098 if (copy_to_user(argp, &crop[0], sizeof(crop)) != 0)
9099 ret = -EFAULT;
9100 }
9101 break;
9102
9103 case AMSTREAM_IOC_SET_VIDEOPIP_CROP:
9104 case AMSTREAM_IOC_SET_VIDEO_CROP:
9105 {
9106 int crop[4];
9107
9108 if (copy_from_user(crop, argp, sizeof(crop)) == 0)
9109 _set_video_crop(layer, crop);
9110 else
9111 ret = -EFAULT;
9112 }
9113 break;
9114
9115 case AMSTREAM_IOC_GET_PIP_SCREEN_MODE:
9116 case AMSTREAM_IOC_GET_SCREEN_MODE:
9117 if (copy_to_user(argp, &layer->wide_mode, sizeof(u32)) != 0)
9118 ret = -EFAULT;
9119 break;
9120
9121 case AMSTREAM_IOC_SET_PIP_SCREEN_MODE:
9122 case AMSTREAM_IOC_SET_SCREEN_MODE:
9123 {
9124 u32 mode;
9125
9126 if (copy_from_user(&mode, argp, sizeof(u32)) == 0) {
9127 if (mode >= VIDEO_WIDEOPTION_MAX)
9128 ret = -EINVAL;
9129 else if (mode != layer->wide_mode) {
9130 layer->wide_mode = mode;
9131 if (layer->layer_id == 0)
9132 video_property_changed = 1;
9133#ifdef VIDEO_PIP
9134 else if (layer->layer_id == 1)
9135 pip_property_changed = 1;
9136#endif
9137 }
9138 } else
9139 ret = -EFAULT;
9140 }
9141 break;
9142
9143 case AMSTREAM_IOC_GET_BLACKOUT_POLICY:
9144 if (copy_to_user(argp, &blackout, sizeof(u32)) != 0)
9145 ret = -EFAULT;
9146 break;
9147
9148 case AMSTREAM_IOC_SET_BLACKOUT_POLICY:{
9149 u32 mode;
9150
9151 if (copy_from_user(&mode, argp, sizeof(u32)) == 0) {
9152 if (mode > 2)
9153 ret = -EINVAL;
9154 else
9155 blackout = mode;
9156 } else
9157 ret = -EFAULT;
9158 }
9159 break;
9160
9161 case AMSTREAM_IOC_CLEAR_VBUF:{
9162 unsigned long flags;
9163 while (atomic_read(&video_inirq_flag) > 0 ||
9164 atomic_read(&video_unreg_flag) > 0)
9165 schedule();
9166 spin_lock_irqsave(&lock, flags);
9167 cur_dispbuf = NULL;
9168 spin_unlock_irqrestore(&lock, flags);
9169 }
9170 break;
9171
9172 case AMSTREAM_IOC_CLEAR_VIDEO:
9173 if (blackout)
9174 safe_disble_videolayer();
9175 break;
9176
9177 case AMSTREAM_IOC_SET_FREERUN_MODE:
9178 if (arg > FREERUN_DUR)
9179 ret = -EFAULT;
9180 else
9181 freerun_mode = arg;
9182 break;
9183
9184 case AMSTREAM_IOC_GET_FREERUN_MODE:
9185 put_user(freerun_mode, (u32 __user *)argp);
9186 break;
9187
9188 case AMSTREAM_IOC_DISABLE_SLOW_SYNC:
9189 if (arg)
9190 disable_slow_sync = 1;
9191 else
9192 disable_slow_sync = 0;
9193 break;
9194 /*
9195 ***************************************************************
9196 *3d process ioctl
9197 ****************************************************************
9198 */
9199 case AMSTREAM_IOC_SET_3D_TYPE:
9200 {
9201#ifdef TV_3D_FUNCTION_OPEN
9202 unsigned int set_3d =
9203 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE;
9204 unsigned int type = (unsigned int)arg;
9205
9206 if (type != process_3d_type) {
9207 process_3d_type = type;
9208 if (mvc_flag)
9209 process_3d_type |= MODE_3D_MVC;
9210 video_property_changed = 1;
9211 if ((process_3d_type & MODE_3D_FA)
9212 && cur_dispbuf
9213 && !cur_dispbuf->trans_fmt)
9214 /*notify di 3d mode is frame*/
9215 /*alternative mode,passing two*/
9216 /*buffer in one frame */
9217 vf_notify_receiver_by_name(
9218 "deinterlace",
9219 set_3d,
9220 (void *)1);
9221 else
9222 vf_notify_receiver_by_name(
9223 "deinterlace",
9224 set_3d,
9225 (void *)0);
9226 }
9227#endif
9228 break;
9229 }
9230 case AMSTREAM_IOC_GET_3D_TYPE:
9231#ifdef TV_3D_FUNCTION_OPEN
9232 put_user(process_3d_type, (u32 __user *)argp);
9233
9234#endif
9235 break;
9236 case AMSTREAM_IOC_GET_SOURCE_VIDEO_3D_TYPE:
9237#ifdef TV_3D_FUNCTION_OPEN
9238 {
9239 int source_video_3d_type = VPP_3D_MODE_NULL;
9240
9241 if (!cur_frame_par)
9242 source_video_3d_type =
9243 VPP_3D_MODE_NULL;
9244 else
9245 get_vpp_3d_mode(process_3d_type,
9246 cur_frame_par->trans_fmt, &source_video_3d_type);
9247 put_user(source_video_3d_type, (u32 __user *)argp);
9248 }
9249#endif
9250 break;
9251 case AMSTREAM_IOC_SET_VSYNC_UPINT:
9252 vsync_pts_inc_upint = arg;
9253 break;
9254
9255 case AMSTREAM_IOC_GET_VSYNC_SLOW_FACTOR:
9256 put_user(vsync_slow_factor, (u32 __user *)argp);
9257 break;
9258
9259 case AMSTREAM_IOC_SET_VSYNC_SLOW_FACTOR:
9260 vsync_slow_factor = arg;
9261 break;
9262
9263 case AMSTREAM_IOC_GLOBAL_SET_VIDEOPIP_OUTPUT:
9264 case AMSTREAM_IOC_GLOBAL_SET_VIDEO_OUTPUT:
9265 if (layer->layer_id == 0) {
9266 if (arg != 0)
9267 video_global_output = 1;
9268 else
9269 video_global_output = 0;
9270 }
9271#ifdef VIDEO_PIP
9272 else if (layer->layer_id == 1) {
9273 if (arg != 0)
9274 pip_global_output = 1;
9275 else
9276 pip_global_output = 0;
9277 }
9278#endif
9279 break;
9280
9281 case AMSTREAM_IOC_GLOBAL_GET_VIDEOPIP_OUTPUT:
9282 case AMSTREAM_IOC_GLOBAL_GET_VIDEO_OUTPUT:
9283 if (layer->layer_id == 0)
9284 put_user(video_global_output, (u32 __user *)argp);
9285#ifdef VIDEO_PIP
9286 else if (layer->layer_id == 1)
9287 put_user(pip_global_output, (u32 __user *)argp);
9288#endif
9289 break;
9290
9291 case AMSTREAM_IOC_GET_VIDEO_LAYER1_ON: {
9292 u32 vsync_duration;
9293 u32 video_onoff_diff = 0;
9294
9295 vsync_duration = vsync_pts_inc / 90;
9296 video_onoff_diff =
9297 jiffies_to_msecs(jiffies) - video_onoff_time;
9298
9299 if (video_onoff_state == VIDEO_ENABLE_STATE_IDLE) {
9300 /* wait until 5ms after next vsync */
9301 msleep(video_onoff_diff < vsync_duration
9302 ? vsync_duration - video_onoff_diff + 5
9303 : 0);
9304 }
9305 put_user(video_onoff_state, (u32 __user *)argp);
9306 break;
9307 }
9308
9309 case AMSTREAM_IOC_GET_FIRST_FRAME_TOGGLED:
9310 put_user(first_frame_toggled, (u32 __user *)argp);
9311 break;
9312
9313 case AMSTREAM_IOC_SET_VIDEOPEEK:
9314 videopeek = true;
9315 nopostvideostart = true;
9316 break;
9317
9318 case AMSTREAM_IOC_GET_PIP_ZORDER:
9319 case AMSTREAM_IOC_GET_ZORDER:
9320 put_user(layer->zorder, (u32 __user *)argp);
9321 break;
9322
9323 case AMSTREAM_IOC_SET_PIP_ZORDER:
9324 case AMSTREAM_IOC_SET_ZORDER:{
9325 u32 zorder, new_prop = 0;
9326
9327 if (copy_from_user(&zorder, argp, sizeof(u32)) == 0) {
9328 if (layer->zorder != zorder)
9329 new_prop = 1;
9330 layer->zorder = zorder;
9331 if ((layer->layer_id == 0) && new_prop)
9332 video_property_changed = 1;
9333#ifdef VIDEO_PIP
9334 else if ((layer->layer_id == 1) && new_prop)
9335 pip_property_changed = 1;
9336#endif
9337 } else
9338 ret = -EFAULT;
9339 }
9340 break;
9341
9342 case AMSTREAM_IOC_QUERY_LAYER:
9343 mutex_lock(&video_layer_mutex);
9344 put_user(layer_cap, (u32 __user *)argp);
9345 mutex_unlock(&video_layer_mutex);
9346 ret = 0;
9347 break;
9348
9349 case AMSTREAM_IOC_ALLOC_LAYER:
9350 if (copy_from_user(&layer_id, argp, sizeof(u32)) == 0) {
9351 if (layer_id >= MAX_VD_LAYERS) {
9352 ret = -EINVAL;
9353 } else {
9354 mutex_lock(&video_layer_mutex);
9355 if (file->private_data) {
9356 ret = -EBUSY;
9357 } else {
9358 ret = alloc_layer(layer_id);
9359 if (!ret)
9360 file->private_data =
9361 (void *)&glayer_info[layer_id];
9362 }
9363 mutex_unlock(&video_layer_mutex);
9364 }
9365 } else
9366 ret = -EFAULT;
9367 break;
9368
9369 case AMSTREAM_IOC_FREE_LAYER:
9370 mutex_lock(&video_layer_mutex);
9371 if (!file->private_data) {
9372 ret = -EINVAL;
9373 } else {
9374 ret = free_layer(layer->layer_id);
9375 if (!ret)
9376 file->private_data = NULL;
9377 }
9378 mutex_unlock(&video_layer_mutex);
9379 break;
9380
9381 default:
9382 return -EINVAL;
9383 }
9384
9385 return ret;
9386}
9387
9388#ifdef CONFIG_COMPAT
9389static long amvideo_compat_ioctl(struct file *file, unsigned int cmd, ulong arg)
9390{
9391 long ret = 0;
9392
9393 switch (cmd) {
9394 case AMSTREAM_IOC_SET_HDR_INFO:
9395 case AMSTREAM_IOC_SET_OMX_VPTS:
9396 case AMSTREAM_IOC_GET_OMX_VPTS:
9397 case AMSTREAM_IOC_GET_OMX_VERSION:
9398 case AMSTREAM_IOC_GET_OMX_INFO:
9399 case AMSTREAM_IOC_TRICK_STAT:
9400 case AMSTREAM_IOC_GET_TRICK_VPTS:
9401 case AMSTREAM_IOC_GET_SYNC_ADISCON:
9402 case AMSTREAM_IOC_GET_SYNC_VDISCON:
9403 case AMSTREAM_IOC_GET_SYNC_ADISCON_DIFF:
9404 case AMSTREAM_IOC_GET_SYNC_VDISCON_DIFF:
9405 case AMSTREAM_IOC_VF_STATUS:
9406 case AMSTREAM_IOC_GET_VIDEO_DISABLE:
9407 case AMSTREAM_IOC_GET_VIDEO_DISCONTINUE_REPORT:
9408 case AMSTREAM_IOC_GET_VIDEO_AXIS:
9409 case AMSTREAM_IOC_SET_VIDEO_AXIS:
9410 case AMSTREAM_IOC_GET_VIDEO_CROP:
9411 case AMSTREAM_IOC_SET_VIDEO_CROP:
9412 case AMSTREAM_IOC_GET_SCREEN_MODE:
9413 case AMSTREAM_IOC_SET_SCREEN_MODE:
9414 case AMSTREAM_IOC_GET_BLACKOUT_POLICY:
9415 case AMSTREAM_IOC_SET_BLACKOUT_POLICY:
9416 case AMSTREAM_IOC_GET_FREERUN_MODE:
9417 case AMSTREAM_IOC_GET_3D_TYPE:
9418 case AMSTREAM_IOC_GET_SOURCE_VIDEO_3D_TYPE:
9419 case AMSTREAM_IOC_GET_VSYNC_SLOW_FACTOR:
9420 case AMSTREAM_IOC_GLOBAL_GET_VIDEO_OUTPUT:
9421 case AMSTREAM_IOC_GET_VIDEO_LAYER1_ON:
9422 case AMSTREAM_IOC_GLOBAL_SET_VIDEOPIP_OUTPUT:
9423 case AMSTREAM_IOC_GLOBAL_GET_VIDEOPIP_OUTPUT:
9424 case AMSTREAM_IOC_GET_VIDEOPIP_DISABLE:
9425 case AMSTREAM_IOC_SET_VIDEOPIP_DISABLE:
9426 case AMSTREAM_IOC_GET_VIDEOPIP_AXIS:
9427 case AMSTREAM_IOC_SET_VIDEOPIP_AXIS:
9428 case AMSTREAM_IOC_GET_VIDEOPIP_CROP:
9429 case AMSTREAM_IOC_SET_VIDEOPIP_CROP:
9430 case AMSTREAM_IOC_GET_PIP_SCREEN_MODE:
9431 case AMSTREAM_IOC_SET_PIP_SCREEN_MODE:
9432 case AMSTREAM_IOC_GET_PIP_ZORDER:
9433 case AMSTREAM_IOC_SET_PIP_ZORDER:
9434 case AMSTREAM_IOC_GET_ZORDER:
9435 case AMSTREAM_IOC_SET_ZORDER:
9436 case AMSTREAM_IOC_QUERY_LAYER:
9437 case AMSTREAM_IOC_ALLOC_LAYER:
9438 case AMSTREAM_IOC_FREE_LAYER:
9439 arg = (unsigned long) compat_ptr(arg);
9440 case AMSTREAM_IOC_TRICKMODE:
9441 case AMSTREAM_IOC_VPAUSE:
9442 case AMSTREAM_IOC_AVTHRESH:
9443 case AMSTREAM_IOC_SYNCTHRESH:
9444 case AMSTREAM_IOC_SYNCENABLE:
9445 case AMSTREAM_IOC_SET_SYNC_ADISCON:
9446 case AMSTREAM_IOC_SET_SYNC_VDISCON:
9447 case AMSTREAM_IOC_SET_SYNC_ADISCON_DIFF:
9448 case AMSTREAM_IOC_SET_SYNC_VDISCON_DIFF:
9449 case AMSTREAM_IOC_SET_VIDEO_DISABLE:
9450 case AMSTREAM_IOC_SET_VIDEO_DISCONTINUE_REPORT:
9451 case AMSTREAM_IOC_CLEAR_VBUF:
9452 case AMSTREAM_IOC_CLEAR_VIDEO:
9453 case AMSTREAM_IOC_SET_FREERUN_MODE:
9454 case AMSTREAM_IOC_DISABLE_SLOW_SYNC:
9455 case AMSTREAM_IOC_SET_3D_TYPE:
9456 case AMSTREAM_IOC_SET_VSYNC_UPINT:
9457 case AMSTREAM_IOC_SET_VSYNC_SLOW_FACTOR:
9458 case AMSTREAM_IOC_GLOBAL_SET_VIDEO_OUTPUT:
9459 case AMSTREAM_IOC_GET_FIRST_FRAME_TOGGLED:
9460 case AMSTREAM_IOC_SET_VIDEOPEEK:
9461 return amvideo_ioctl(file, cmd, arg);
9462 default:
9463 return -EINVAL;
9464 }
9465
9466 return ret;
9467}
9468#endif
9469
9470static unsigned int amvideo_poll(struct file *file, poll_table *wait_table)
9471{
9472 poll_wait(file, &amvideo_trick_wait, wait_table);
9473
9474 if (atomic_read(&trickmode_framedone)) {
9475 atomic_set(&trickmode_framedone, 0);
9476 return POLLOUT | POLLWRNORM;
9477 }
9478
9479 return 0;
9480}
9481
9482static unsigned int amvideo_poll_poll(struct file *file, poll_table *wait_table)
9483{
9484 poll_wait(file, &amvideo_sizechange_wait, wait_table);
9485
9486 if (atomic_read(&video_sizechange)) {
9487 atomic_set(&video_sizechange, 0);
9488 return POLLIN | POLLWRNORM;
9489 }
9490
9491 return 0;
9492}
9493
9494static const struct file_operations amvideo_fops = {
9495 .owner = THIS_MODULE,
9496 .open = amvideo_open,
9497 .release = amvideo_release,
9498 .unlocked_ioctl = amvideo_ioctl,
9499#ifdef CONFIG_COMPAT
9500 .compat_ioctl = amvideo_compat_ioctl,
9501#endif
9502 .poll = amvideo_poll,
9503};
9504
9505static const struct file_operations amvideo_poll_fops = {
9506 .owner = THIS_MODULE,
9507 .open = amvideo_poll_open,
9508 .release = amvideo_poll_release,
9509 .poll = amvideo_poll_poll,
9510};
9511
9512/*********************************************************
9513 * SYSFS property functions
9514 *********************************************************/
9515#define MAX_NUMBER_PARA 10
9516#define AMVIDEO_CLASS_NAME "video"
9517#define AMVIDEO_POLL_CLASS_NAME "video_poll"
9518
9519static int parse_para(const char *para, int para_num, int *result)
9520{
9521 char *token = NULL;
9522 char *params, *params_base;
9523 int *out = result;
9524 int len = 0, count = 0;
9525 int res = 0;
9526 int ret = 0;
9527
9528 if (!para)
9529 return 0;
9530
9531 params = kstrdup(para, GFP_KERNEL);
9532 params_base = params;
9533 token = params;
9534 if (token) {
9535 len = strlen(token);
9536 do {
9537 token = strsep(&params, " ");
9538 if (!token)
9539 break;
9540 while (token && (isspace(*token)
9541 || !isgraph(*token)) && len) {
9542 token++;
9543 len--;
9544 }
9545 if (len == 0)
9546 break;
9547 ret = kstrtoint(token, 0, &res);
9548 if (ret < 0)
9549 break;
9550 len = strlen(token);
9551 *out++ = res;
9552 count++;
9553 } while ((count < para_num) && (len > 0));
9554 }
9555
9556 kfree(params_base);
9557 return count;
9558}
9559
9560static void set_video_crop(
9561 struct disp_info_s *layer, const char *para)
9562{
9563 int parsed[4];
9564
9565 if (likely(parse_para(para, 4, parsed) == 4))
9566 _set_video_crop(layer, parsed);
9567 amlog_mask(LOG_MASK_SYSFS,
9568 "video crop=>x0:%d,y0:%d,x1:%d,y1:%d\n ",
9569 parsed[0], parsed[1], parsed[2], parsed[3]);
9570}
9571
9572static void set_video_speed_check(const char *para)
9573{
9574 int parsed[2];
9575 struct disp_info_s *layer = &glayer_info[0];
9576
9577 if (likely(parse_para(para, 2, parsed) == 2)) {
9578 layer->speed_check_height = parsed[0];
9579 layer->speed_check_width = parsed[1];
9580 }
9581 amlog_mask(LOG_MASK_SYSFS,
9582 "video speed_check=>h:%d,w:%d\n ", parsed[0], parsed[1]);
9583}
9584
9585static void set_video_window(
9586 struct disp_info_s *layer, const char *para)
9587{
9588 int parsed[4];
9589
9590 if (likely(parse_para(para, 4, parsed) == 4))
9591 _set_video_window(layer, parsed);
9592 amlog_mask(LOG_MASK_SYSFS,
9593 "video=>x0:%d,y0:%d,x1:%d,y1:%d\n ",
9594 parsed[0], parsed[1], parsed[2], parsed[3]);
9595}
9596
9597static ssize_t video_3d_scale_store(struct class *cla,
9598 struct class_attribute *attr,
9599 const char *buf, size_t count)
9600{
9601#ifdef TV_3D_FUNCTION_OPEN
9602 u32 enable;
9603 int r;
9604 struct disp_info_s *layer = &glayer_info[0];
9605
9606 r = kstrtouint(buf, 0, &enable);
9607 if (r < 0)
9608 return -EINVAL;
9609
9610 layer->vpp_3d_scale = enable ? true : false;
9611 video_property_changed = 1;
9612 amlog_mask(LOG_MASK_SYSFS, "%s:%s 3d scale.\n", __func__,
9613 enable ? "enable" : "disable");
9614#endif
9615 return count;
9616}
9617
9618static ssize_t video_sr_show(struct class *cla, struct class_attribute *attr,
9619 char *buf)
9620{
9621 return sprintf(buf, "super_scaler:%d\n", super_scaler);
9622}
9623
9624static ssize_t video_sr_store(struct class *cla,
9625 struct class_attribute *attr,
9626 const char *buf, size_t count)
9627{
9628 int parsed[1];
9629
9630 mutex_lock(&video_module_mutex);
9631 if (likely(parse_para(buf, 1, parsed) == 1)) {
9632 if (super_scaler != (parsed[0] & 0x1)) {
9633 super_scaler = parsed[0] & 0x1;
9634 video_property_changed = 1;
9635 }
9636 }
9637 mutex_unlock(&video_module_mutex);
9638
9639 return strnlen(buf, count);
9640}
9641
9642static ssize_t video_crop_show(struct class *cla, struct class_attribute *attr,
9643 char *buf)
9644{
9645 u32 t, l, b, r;
9646 struct disp_info_s *layer = &glayer_info[0];
9647
9648 t = layer->crop_top;
9649 l = layer->crop_left;
9650 b = layer->crop_bottom;
9651 r = layer->crop_right;
9652 return snprintf(buf, 40, "%d %d %d %d\n", t, l, b, r);
9653}
9654
9655static ssize_t video_crop_store(struct class *cla,
9656 struct class_attribute *attr,
9657 const char *buf, size_t count)
9658{
9659 struct disp_info_s *layer = &glayer_info[0];
9660
9661 mutex_lock(&video_module_mutex);
9662
9663 set_video_crop(layer, buf);
9664
9665 mutex_unlock(&video_module_mutex);
9666
9667 return strnlen(buf, count);
9668}
9669
9670static ssize_t video_state_show(struct class *cla,
9671 struct class_attribute *attr,
9672 char *buf)
9673{
9674 ssize_t len = 0;
9675 struct vppfilter_mode_s *vpp_filter = NULL;
9676
9677 if (!cur_frame_par)
9678 return len;
9679 vpp_filter = &cur_frame_par->vpp_filter;
9680 len += sprintf(buf + len,
9681 "zoom_start_x_lines:%u.zoom_end_x_lines:%u.\n",
9682 zoom_start_x_lines, zoom_end_x_lines);
9683 len += sprintf(buf + len,
9684 "zoom_start_y_lines:%u.zoom_end_y_lines:%u.\n",
9685 zoom_start_y_lines, zoom_end_y_lines);
9686 len += sprintf(buf + len, "frame parameters: pic_in_height %u.\n",
9687 cur_frame_par->VPP_pic_in_height_);
9688 len += sprintf(buf + len,
9689 "frame parameters: VPP_line_in_length_ %u.\n",
9690 cur_frame_par->VPP_line_in_length_);
9691 len += sprintf(buf + len, "vscale_skip_count %u.\n",
9692 cur_frame_par->vscale_skip_count);
9693 len += sprintf(buf + len, "hscale_skip_count %u.\n",
9694 cur_frame_par->hscale_skip_count);
9695 len += sprintf(buf + len, "supscl_path %u.\n",
9696 cur_frame_par->supscl_path);
9697 len += sprintf(buf + len, "supsc0_enable %u.\n",
9698 cur_frame_par->supsc0_enable);
9699 len += sprintf(buf + len, "supsc1_enable %u.\n",
9700 cur_frame_par->supsc1_enable);
9701 len += sprintf(buf + len, "supsc0_hori_ratio %u.\n",
9702 cur_frame_par->supsc0_hori_ratio);
9703 len += sprintf(buf + len, "supsc1_hori_ratio %u.\n",
9704 cur_frame_par->supsc1_hori_ratio);
9705 len += sprintf(buf + len, "supsc0_vert_ratio %u.\n",
9706 cur_frame_par->supsc0_vert_ratio);
9707 len += sprintf(buf + len, "supsc1_vert_ratio %u.\n",
9708 cur_frame_par->supsc1_vert_ratio);
9709 len += sprintf(buf + len, "spsc0_h_in %u.\n",
9710 cur_frame_par->spsc0_h_in);
9711 len += sprintf(buf + len, "spsc1_h_in %u.\n",
9712 cur_frame_par->spsc1_h_in);
9713 len += sprintf(buf + len, "spsc0_w_in %u.\n",
9714 cur_frame_par->spsc0_w_in);
9715 len += sprintf(buf + len, "spsc1_w_in %u.\n",
9716 cur_frame_par->spsc1_w_in);
9717 len += sprintf(buf + len, "video_input_w %u.\n",
9718 cur_frame_par->video_input_w);
9719 len += sprintf(buf + len, "video_input_h %u.\n",
9720 cur_frame_par->video_input_h);
9721 len += sprintf(buf + len, "clk_in_pps %u.\n",
9722 cur_frame_par->clk_in_pps);
9723#ifdef TV_3D_FUNCTION_OPEN
9724 len += sprintf(buf + len, "vpp_2pic_mode %u.\n",
9725 cur_frame_par->vpp_2pic_mode);
9726 len += sprintf(buf + len, "vpp_3d_scale %u.\n",
9727 cur_frame_par->vpp_3d_scale);
9728 len += sprintf(buf + len,
9729 "vpp_3d_mode %u.\n", cur_frame_par->vpp_3d_mode);
9730#endif
9731 len +=
9732 sprintf(buf + len, "hscale phase step 0x%x.\n",
9733 vpp_filter->vpp_hsc_start_phase_step);
9734 len +=
9735 sprintf(buf + len, "vscale phase step 0x%x.\n",
9736 vpp_filter->vpp_vsc_start_phase_step);
9737 len +=
9738 sprintf(buf + len, "pps pre hsc enable %d.\n",
9739 vpp_filter->vpp_pre_hsc_en);
9740 len +=
9741 sprintf(buf + len, "pps pre vsc enable %d.\n",
9742 vpp_filter->vpp_pre_vsc_en);
9743 len +=
9744 sprintf(buf + len, "hscale filter coef %d.\n",
9745 vpp_filter->vpp_horz_filter);
9746 len +=
9747 sprintf(buf + len, "vscale filter coef %d.\n",
9748 vpp_filter->vpp_vert_filter);
9749 len +=
9750 sprintf(buf + len, "vpp_vert_chroma_filter_en %d.\n",
9751 vpp_filter->vpp_vert_chroma_filter_en);
9752 len +=
9753 sprintf(buf + len, "post_blend_vd_h_start 0x%x.\n",
9754 cur_frame_par->VPP_post_blend_vd_h_start_);
9755 len +=
9756 sprintf(buf + len, "post_blend_vd_h_end 0x%x.\n",
9757 cur_frame_par->VPP_post_blend_vd_h_end_);
9758 len +=
9759 sprintf(buf + len, "post_blend_vd_v_start 0x%x.\n",
9760 cur_frame_par->VPP_post_blend_vd_v_start_);
9761 len +=
9762 sprintf(buf + len, "post_blend_vd_v_end 0x%x.\n",
9763 cur_frame_par->VPP_post_blend_vd_v_end_);
9764 len +=
9765 sprintf(buf + len, "VPP_hd_start_lines_ 0x%x.\n",
9766 cur_frame_par->VPP_hd_start_lines_);
9767 len +=
9768 sprintf(buf + len, "VPP_hd_end_lines_ 0x%x.\n",
9769 cur_frame_par->VPP_hd_end_lines_);
9770 len +=
9771 sprintf(buf + len, "VPP_vd_start_lines_ 0x%x.\n",
9772 cur_frame_par->VPP_vd_start_lines_);
9773 len +=
9774 sprintf(buf + len, "VPP_vd_end_lines_ 0x%x.\n",
9775 cur_frame_par->VPP_vd_end_lines_);
9776 len +=
9777 sprintf(buf + len, "VPP_hsc_startp 0x%x.\n",
9778 cur_frame_par->VPP_hsc_startp);
9779 len +=
9780 sprintf(buf + len, "VPP_hsc_endp 0x%x.\n",
9781 cur_frame_par->VPP_hsc_endp);
9782 len +=
9783 sprintf(buf + len, "VPP_vsc_startp 0x%x.\n",
9784 cur_frame_par->VPP_vsc_startp);
9785 len +=
9786 sprintf(buf + len, "VPP_vsc_endp 0x%x.\n",
9787 cur_frame_par->VPP_vsc_endp);
9788 return len;
9789}
9790
9791static ssize_t video_axis_show(struct class *cla,
9792 struct class_attribute *attr,
9793 char *buf)
9794{
9795 int x, y, w, h;
9796 struct disp_info_s *layer = &glayer_info[0];
9797
9798#ifdef CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER
9799 if (video_scaler_mode) {
9800 x = content_left;
9801 y = content_top;
9802 w = content_w;
9803 h = content_h;
9804 } else
9805#endif
9806 {
9807 x = layer->layer_left;
9808 y = layer->layer_top;
9809 w = layer->layer_width;
9810 h = layer->layer_height;
9811 }
9812 return snprintf(buf, 40, "%d %d %d %d\n", x, y, x + w - 1, y + h - 1);
9813}
9814
9815static ssize_t video_axis_store(struct class *cla,
9816 struct class_attribute *attr,
9817 const char *buf, size_t count)
9818{
9819 struct disp_info_s *layer = &glayer_info[0];
9820
9821 mutex_lock(&video_module_mutex);
9822
9823 set_video_window(layer, buf);
9824
9825 mutex_unlock(&video_module_mutex);
9826
9827 return strnlen(buf, count);
9828}
9829
9830static ssize_t video_global_offset_show(struct class *cla,
9831 struct class_attribute *attr, char *buf)
9832{
9833 int x, y;
9834 struct disp_info_s *layer = &glayer_info[0];
9835
9836 x = layer->global_offset_x;
9837 y = layer->global_offset_y;
9838
9839 return snprintf(buf, 40, "%d %d\n", x, y);
9840}
9841
9842static ssize_t video_global_offset_store(struct class *cla,
9843 struct class_attribute *attr,
9844 const char *buf, size_t count)
9845{
9846 int parsed[2];
9847 struct disp_info_s *layer = &glayer_info[0];
9848
9849 mutex_lock(&video_module_mutex);
9850
9851 if (likely(parse_para(buf, 2, parsed) == 2)) {
9852 layer->global_offset_x = parsed[0];
9853 layer->global_offset_y = parsed[1];
9854 video_property_changed = 1;
9855
9856 amlog_mask(LOG_MASK_SYSFS,
9857 "video_offset=>x0:%d,y0:%d\n ",
9858 parsed[0], parsed[1]);
9859 }
9860
9861 mutex_unlock(&video_module_mutex);
9862
9863 return count;
9864}
9865
9866static ssize_t video_zoom_show(struct class *cla,
9867 struct class_attribute *attr,
9868 char *buf)
9869{
9870 u32 r;
9871 struct disp_info_s *layer = &glayer_info[0];
9872
9873 r = layer->zoom_ratio;
9874
9875 return snprintf(buf, 40, "%d\n", r);
9876}
9877
9878static ssize_t video_zoom_store(struct class *cla,
9879 struct class_attribute *attr,
9880 const char *buf, size_t count)
9881{
9882 unsigned long r;
9883 int ret = 0;
9884 struct disp_info_s *layer = &glayer_info[0];
9885
9886 ret = kstrtoul(buf, 0, (unsigned long *)&r);
9887 if (ret < 0)
9888 return -EINVAL;
9889
9890 if ((r <= MAX_ZOOM_RATIO) && (r != layer->zoom_ratio)) {
9891 layer->zoom_ratio = r;
9892 video_property_changed = 1;
9893 }
9894
9895 return count;
9896}
9897
9898static ssize_t video_screen_mode_show(struct class *cla,
9899 struct class_attribute *attr, char *buf)
9900{
9901 struct disp_info_s *layer = &glayer_info[0];
9902 static const char * const wide_str[] = {
9903 "normal", "full stretch", "4-3", "16-9", "non-linear",
9904 "normal-noscaleup",
9905 "4-3 ignore", "4-3 letter box", "4-3 pan scan", "4-3 combined",
9906 "16-9 ignore", "16-9 letter box", "16-9 pan scan",
9907 "16-9 combined", "Custom AR", "AFD"
9908 };
9909
9910 if (layer->wide_mode < ARRAY_SIZE(wide_str)) {
9911 return sprintf(buf, "%d:%s\n",
9912 layer->wide_mode,
9913 wide_str[layer->wide_mode]);
9914 } else
9915 return 0;
9916}
9917
9918static ssize_t video_screen_mode_store(struct class *cla,
9919 struct class_attribute *attr,
9920 const char *buf, size_t count)
9921{
9922 unsigned long mode;
9923 int ret = 0;
9924 struct disp_info_s *layer = &glayer_info[0];
9925
9926 ret = kstrtoul(buf, 0, (unsigned long *)&mode);
9927 if (ret < 0)
9928 return -EINVAL;
9929
9930 if ((mode < VIDEO_WIDEOPTION_MAX)
9931 && (mode != layer->wide_mode)) {
9932 layer->wide_mode = mode;
9933 video_property_changed = 1;
9934 }
9935
9936 return count;
9937}
9938
9939static ssize_t video_blackout_policy_show(struct class *cla,
9940 struct class_attribute *attr,
9941 char *buf)
9942{
9943 return sprintf(buf, "%d\n", blackout);
9944}
9945
9946static ssize_t video_blackout_policy_store(struct class *cla,
9947 struct class_attribute *attr,
9948 const char *buf, size_t count)
9949{
9950 int r;
9951
9952 r = kstrtoint(buf, 0, &blackout);
9953 if (r < 0)
9954 return -EINVAL;
9955
9956 if (debug_flag & DEBUG_FLAG_BLACKOUT)
9957 pr_info("%s(%d)\n", __func__, blackout);
9958
9959 return count;
9960}
9961
9962static ssize_t video_seek_flag_show(struct class *cla,
9963 struct class_attribute *attr,
9964 char *buf)
9965{
9966 return sprintf(buf, "%d\n", video_seek_flag);
9967}
9968
9969static ssize_t video_seek_flag_store(struct class *cla,
9970 struct class_attribute *attr,
9971 const char *buf, size_t count)
9972{
9973 int r;
9974
9975 r = kstrtoint(buf, 0, &video_seek_flag);
9976 if (r < 0)
9977 return -EINVAL;
9978
9979 return count;
9980}
9981
9982#ifdef PTS_TRACE_DEBUG
9983static ssize_t pts_trace_show(struct class *cla,
9984 struct class_attribute *attr, char *buf)
9985{
9986 return sprintf(buf, "%d %d %d %d %d %d %d %d\n"
9987 "%d %d %d %d %d %d %d %d\n"
9988 "%0x %0x %0x %0x %0x %0x %0x %0x\n"
9989 "%0x %0x %0x %0x %0x %0x %0x %0x\n"
9990 "%0x %0x %0x %0x %0x %0x %0x %0x\n"
9991 "%0x %0x %0x %0x %0x %0x %0x %0x\n",
9992 pts_trace_his[0], pts_trace_his[1], pts_trace_his[2],
9993 pts_trace_his[3], pts_trace_his[4], pts_trace_his[5],
9994 pts_trace_his[6], pts_trace_his[7], pts_trace_his[8],
9995 pts_trace_his[9], pts_trace_his[10], pts_trace_his[11],
9996 pts_trace_his[12], pts_trace_his[13], pts_trace_his[14],
9997 pts_trace_his[15],
9998 pts_his[0], pts_his[1], pts_his[2], pts_his[3],
9999 pts_his[4], pts_his[5], pts_his[6], pts_his[7],
10000 pts_his[8], pts_his[9], pts_his[10], pts_his[11],
10001 pts_his[12], pts_his[13], pts_his[14], pts_his[15],
10002 scr_his[0], scr_his[1], scr_his[2], scr_his[3],
10003 scr_his[4], scr_his[5], scr_his[6], scr_his[7],
10004 scr_his[8], scr_his[9], scr_his[10], scr_his[11],
10005 scr_his[12], scr_his[13], scr_his[14], scr_his[15]);
10006}
10007#endif
10008
10009static ssize_t video_brightness_show(struct class *cla,
10010 struct class_attribute *attr, char *buf)
10011{
10012 s32 val = (READ_VCBUS_REG(VPP_VADJ1_Y + cur_dev->vpp_off) >> 8) &
10013 0x1ff;
10014
10015 val = (val << 23) >> 23;
10016
10017 return sprintf(buf, "%d\n", val);
10018}
10019
10020static ssize_t video_brightness_store(struct class *cla,
10021 struct class_attribute *attr,
10022 const char *buf, size_t count)
10023{
10024 int r;
10025 int val;
10026
10027 r = kstrtoint(buf, 0, &val);
10028 if ((r < 0) || (val < -255) || (val > 255))
10029 return -EINVAL;
10030
10031 if (get_cpu_type() <= MESON_CPU_MAJOR_ID_GXTVBB)
10032 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y +
10033 cur_dev->vpp_off, val, 8, 9);
10034 else
10035 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y +
10036 cur_dev->vpp_off, val << 1, 8, 10);
10037
10038 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ1_EN);
10039
10040 return count;
10041}
10042
10043static ssize_t video_contrast_show(struct class *cla,
10044 struct class_attribute *attr, char *buf)
10045{
10046 return sprintf(buf, "%d\n",
10047 (int)(READ_VCBUS_REG(VPP_VADJ1_Y + cur_dev->vpp_off) &
10048 0xff) - 0x80);
10049}
10050
10051static ssize_t video_contrast_store(struct class *cla,
10052 struct class_attribute *attr,
10053 const char *buf, size_t count)
10054{
10055 int r;
10056 int val;
10057
10058 r = kstrtoint(buf, 0, &val);
10059 if ((r < 0) || (val < -127) || (val > 127))
10060 return -EINVAL;
10061
10062 val += 0x80;
10063
10064 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y + cur_dev->vpp_off, val, 0, 8);
10065 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ1_EN);
10066
10067 return count;
10068}
10069
10070static ssize_t vpp_brightness_show(struct class *cla,
10071 struct class_attribute *attr, char *buf)
10072{
10073 s32 val = (READ_VCBUS_REG(VPP_VADJ2_Y +
10074 cur_dev->vpp_off) >> 8) & 0x1ff;
10075
10076 val = (val << 23) >> 23;
10077
10078 return sprintf(buf, "%d\n", val);
10079}
10080
10081static ssize_t vpp_brightness_store(struct class *cla,
10082 struct class_attribute *attr,
10083 const char *buf, size_t count)
10084{
10085 int r;
10086 int val;
10087
10088 r = kstrtoint(buf, 0, &val);
10089 if ((r < 0) || (val < -255) || (val > 255))
10090 return -EINVAL;
10091
10092 if (get_cpu_type() <= MESON_CPU_MAJOR_ID_GXTVBB)
10093 WRITE_VCBUS_REG_BITS(VPP_VADJ2_Y +
10094 cur_dev->vpp_off, val, 8, 9);
10095 else
10096 WRITE_VCBUS_REG_BITS(VPP_VADJ2_Y +
10097 cur_dev->vpp_off, val << 1, 8, 10);
10098
10099 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ2_EN);
10100
10101 return count;
10102}
10103
10104static ssize_t vpp_contrast_show(struct class *cla,
10105 struct class_attribute *attr, char *buf)
10106{
10107 return sprintf(buf, "%d\n",
10108 (int)(READ_VCBUS_REG(VPP_VADJ2_Y + cur_dev->vpp_off) &
10109 0xff) - 0x80);
10110}
10111
10112static ssize_t vpp_contrast_store(struct class *cla,
10113 struct class_attribute *attr, const char *buf,
10114 size_t count)
10115{
10116 int r;
10117 int val;
10118
10119 r = kstrtoint(buf, 0, &val);
10120 if ((r < 0) || (val < -127) || (val > 127))
10121 return -EINVAL;
10122
10123 val += 0x80;
10124
10125 WRITE_VCBUS_REG_BITS(VPP_VADJ2_Y + cur_dev->vpp_off, val, 0, 8);
10126 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ2_EN);
10127
10128 return count;
10129}
10130
10131static ssize_t video_saturation_show(struct class *cla,
10132 struct class_attribute *attr, char *buf)
10133{
10134 return sprintf(buf, "%d\n",
10135 READ_VCBUS_REG(VPP_VADJ1_Y + cur_dev->vpp_off) & 0xff);
10136}
10137
10138static ssize_t video_saturation_store(struct class *cla,
10139 struct class_attribute *attr,
10140 const char *buf, size_t count)
10141{
10142 int r;
10143 int val;
10144
10145 r = kstrtoint(buf, 0, &val);
10146 if ((r < 0) || (val < -127) || (val > 127))
10147 return -EINVAL;
10148
10149 WRITE_VCBUS_REG_BITS(VPP_VADJ1_Y + cur_dev->vpp_off, val, 0, 8);
10150 WRITE_VCBUS_REG(VPP_VADJ_CTRL + cur_dev->vpp_off, VPP_VADJ1_EN);
10151
10152 return count;
10153}
10154
10155static ssize_t vpp_saturation_hue_show(struct class *cla,
10156 struct class_attribute *attr, char *buf)
10157{
10158 return sprintf(buf, "0x%x\n", READ_VCBUS_REG(VPP_VADJ2_MA_MB));
10159}
10160
10161static ssize_t vpp_saturation_hue_store(struct class *cla,
10162 struct class_attribute *attr,
10163 const char *buf, size_t count)
10164{
10165 int r;
10166 s32 mab = 0;
10167 s16 mc = 0, md = 0;
10168
10169 r = kstrtoint(buf, 0, &mab);
10170 if ((r < 0) || (mab & 0xfc00fc00))
10171 return -EINVAL;
10172
10173 WRITE_VCBUS_REG(VPP_VADJ2_MA_MB, mab);
10174 mc = (s16) ((mab << 22) >> 22); /* mc = -mb */
10175 mc = 0 - mc;
10176 if (mc > 511)
10177 mc = 511;
10178 if (mc < -512)
10179 mc = -512;
10180 md = (s16) ((mab << 6) >> 22); /* md = ma; */
10181 mab = ((mc & 0x3ff) << 16) | (md & 0x3ff);
10182 WRITE_VCBUS_REG(VPP_VADJ2_MC_MD, mab);
10183 /* WRITE_MPEG_REG(VPP_VADJ_CTRL, 1); */
10184 WRITE_VCBUS_REG_BITS(VPP_VADJ_CTRL + cur_dev->vpp_off, 1, 2, 1);
10185#ifdef PQ_DEBUG_EN
10186 pr_info("\n[amvideo..] set vpp_saturation OK!!!\n");
10187#endif
10188 return count;
10189}
10190
10191/* [ 24] 1/enable, 0/disable */
10192/* [23:16] Y */
10193/* [15: 8] Cb */
10194/* [ 7: 0] Cr */
10195static ssize_t video_test_screen_show(struct class *cla,
10196 struct class_attribute *attr, char *buf)
10197{
10198 return sprintf(buf, "0x%x\n", test_screen);
10199}
10200static ssize_t video_rgb_screen_show(struct class *cla,
10201 struct class_attribute *attr, char *buf)
10202{
10203 return sprintf(buf, "0x%x\n", rgb_screen);
10204}
10205
10206#define SCALE 6
10207
10208static short R_Cr[] = { -11484, -11394, -11305, -11215, -11125,
10209-11036, -10946, -10856, -10766, -10677, -10587, -10497, -10407,
10210-10318, -10228, -10138, -10049, -9959, -9869, -9779, -9690, -9600,
10211-9510, -9420, -9331, -9241, -9151, -9062, -8972, -8882, -8792, -8703,
10212-8613, -8523, -8433, -8344, -8254, -8164, -8075, -7985, -7895, -7805,
10213-7716, -7626, -7536, -7446, -7357, -7267, -7177, -7088, -6998, -6908,
10214-6818, -6729, -6639, -6549, -6459, -6370, -6280, -6190, -6101, -6011,
10215-5921, -5831, -5742, -5652, -5562, -5472, -5383, -5293, -5203, -5113,
10216-5024, -4934, -4844, -4755, -4665, -4575, -4485, -4396, -4306, -4216,
10217-4126, -4037, -3947, -3857, -3768, -3678, -3588, -3498, -3409, -3319,
10218-3229, -3139, -3050, -2960, -2870, -2781, -2691, -2601, -2511, -2422,
10219-2332, -2242, -2152, -2063, -1973, -1883, -1794, -1704, -1614, -1524,
10220-1435, -1345, -1255, -1165, -1076, -986, -896, -807, -717, -627, -537,
10221-448, -358, -268, -178, -89, 0, 90, 179, 269, 359, 449, 538, 628, 718,
10222808, 897, 987, 1077, 1166, 1256, 1346, 1436, 1525, 1615, 1705, 1795,
102231884, 1974, 2064, 2153, 2243, 2333, 2423, 2512, 2602, 2692, 2782,
102242871, 2961, 3051, 3140, 3230, 3320, 3410, 3499, 3589, 3679, 3769,
102253858, 3948, 4038, 4127, 4217, 4307, 4397, 4486, 4576, 4666, 4756,
102264845, 4935, 5025, 5114, 5204, 5294, 5384, 5473, 5563, 5653, 5743,
102275832, 5922, 6012, 6102, 6191, 6281, 6371, 6460, 6550, 6640, 6730,
102286819, 6909, 6999, 7089, 7178, 7268, 7358, 7447, 7537, 7627, 7717,
102297806, 7896, 7986, 8076, 8165, 8255, 8345, 8434, 8524, 8614, 8704,
102308793, 8883, 8973, 9063, 9152, 9242, 9332, 9421, 9511, 9601, 9691,
102319780, 9870, 9960, 10050, 10139, 10229, 10319, 10408, 10498, 10588,
1023210678, 10767, 10857, 10947, 11037, 11126, 11216, 11306, 11395 };
10233
10234static short G_Cb[] = { 2819, 2797, 2775, 2753, 2731, 2709, 2687,
102352665, 2643, 2621, 2599, 2577, 2555, 2533, 2511, 2489, 2467, 2445,
102362423, 2401, 2379, 2357, 2335, 2313, 2291, 2269, 2247, 2225, 2202,
102372180, 2158, 2136, 2114, 2092, 2070, 2048, 2026, 2004, 1982, 1960,
102381938, 1916, 1894, 1872, 1850, 1828, 1806, 1784, 1762, 1740, 1718,
102391696, 1674, 1652, 1630, 1608, 1586, 1564, 1542, 1520, 1498, 1476,
102401454, 1432, 1410, 1388, 1366, 1344, 1321, 1299, 1277, 1255, 1233,
102411211, 1189, 1167, 1145, 1123, 1101, 1079, 1057, 1035, 1013, 991, 969,
10242947, 925, 903, 881, 859, 837, 815, 793, 771, 749, 727, 705, 683, 661,
10243639, 617, 595, 573, 551, 529, 507, 485, 463, 440, 418, 396, 374, 352,
10244330, 308, 286, 264, 242, 220, 198, 176, 154, 132, 110, 88, 66, 44, 22,
102450, -21, -43, -65, -87, -109, -131, -153, -175, -197, -219, -241, -263,
10246-285, -307, -329, -351, -373, -395, -417, -439, -462, -484, -506,
10247-528, -550, -572, -594, -616, -638, -660, -682, -704, -726, -748,
10248-770, -792, -814, -836, -858, -880, -902, -924, -946, -968, -990,
10249-1012, -1034, -1056, -1078, -1100, -1122, -1144, -1166, -1188, -1210,
10250-1232, -1254, -1276, -1298, -1320, -1343, -1365, -1387, -1409, -1431,
10251-1453, -1475, -1497, -1519, -1541, -1563, -1585, -1607, -1629, -1651,
10252-1673, -1695, -1717, -1739, -1761, -1783, -1805, -1827, -1849, -1871,
10253-1893, -1915, -1937, -1959, -1981, -2003, -2025, -2047, -2069, -2091,
10254-2113, -2135, -2157, -2179, -2201, -2224, -2246, -2268, -2290, -2312,
10255-2334, -2356, -2378, -2400, -2422, -2444, -2466, -2488, -2510, -2532,
10256-2554, -2576, -2598, -2620, -2642, -2664, -2686, -2708, -2730, -2752,
10257-2774, -2796 };
10258
10259static short G_Cr[] = { 5850, 5805, 5759, 5713, 5667, 5622, 5576,
102605530, 5485, 5439, 5393, 5347, 5302, 5256, 5210, 5165, 5119, 5073,
102615028, 4982, 4936, 4890, 4845, 4799, 4753, 4708, 4662, 4616, 4570,
102624525, 4479, 4433, 4388, 4342, 4296, 4251, 4205, 4159, 4113, 4068,
102634022, 3976, 3931, 3885, 3839, 3794, 3748, 3702, 3656, 3611, 3565,
102643519, 3474, 3428, 3382, 3336, 3291, 3245, 3199, 3154, 3108, 3062,
102653017, 2971, 2925, 2879, 2834, 2788, 2742, 2697, 2651, 2605, 2559,
102662514, 2468, 2422, 2377, 2331, 2285, 2240, 2194, 2148, 2102, 2057,
102672011, 1965, 1920, 1874, 1828, 1782, 1737, 1691, 1645, 1600, 1554,
102681508, 1463, 1417, 1371, 1325, 1280, 1234, 1188, 1143, 1097, 1051,
102691006, 960, 914, 868, 823, 777, 731, 686, 640, 594, 548, 503, 457, 411,
10270366, 320, 274, 229, 183, 137, 91, 46, 0, -45, -90, -136, -182, -228,
10271-273, -319, -365, -410, -456, -502, -547, -593, -639, -685, -730,
10272-776, -822, -867, -913, -959, -1005, -1050, -1096, -1142, -1187,
10273-1233, -1279, -1324, -1370, -1416, -1462, -1507, -1553, -1599, -1644,
10274-1690, -1736, -1781, -1827, -1873, -1919, -1964, -2010, -2056, -2101,
10275-2147, -2193, -2239, -2284, -2330, -2376, -2421, -2467, -2513, -2558,
10276-2604, -2650, -2696, -2741, -2787, -2833, -2878, -2924, -2970, -3016,
10277-3061, -3107, -3153, -3198, -3244, -3290, -3335, -3381, -3427, -3473,
10278-3518, -3564, -3610, -3655, -3701, -3747, -3793, -3838, -3884, -3930,
10279-3975, -4021, -4067, -4112, -4158, -4204, -4250, -4295, -4341, -4387,
10280-4432, -4478, -4524, -4569, -4615, -4661, -4707, -4752, -4798, -4844,
10281-4889, -4935, -4981, -5027, -5072, -5118, -5164, -5209, -5255, -5301,
10282-5346, -5392, -5438, -5484, -5529, -5575, -5621, -5666, -5712, -5758,
10283-5804 };
10284
10285static short B_Cb[] = { -14515, -14402, -14288, -14175, -14062,
10286-13948, -13835, -13721, -13608, -13495, -13381, -13268, -13154,
10287-13041, -12928, -12814, -12701, -12587, -12474, -12360, -12247,
10288-12134, -12020, -11907, -11793, -11680, -11567, -11453, -11340,
10289-11226, -11113, -11000, -10886, -10773, -10659, -10546, -10433,
10290-10319, -10206, -10092, -9979, -9865, -9752, -9639, -9525, -9412,
10291-9298, -9185, -9072, -8958, -8845, -8731, -8618, -8505, -8391, -8278,
10292-8164, -8051, -7938, -7824, -7711, -7597, -7484, -7371, -7257, -7144,
10293-7030, -6917, -6803, -6690, -6577, -6463, -6350, -6236, -6123, -6010,
10294-5896, -5783, -5669, -5556, -5443, -5329, -5216, -5102, -4989, -4876,
10295-4762, -4649, -4535, -4422, -4309, -4195, -4082, -3968, -3855, -3741,
10296-3628, -3515, -3401, -3288, -3174, -3061, -2948, -2834, -2721, -2607,
10297-2494, -2381, -2267, -2154, -2040, -1927, -1814, -1700, -1587, -1473,
10298-1360, -1246, -1133, -1020, -906, -793, -679, -566, -453, -339, -226,
10299-112, 0, 113, 227, 340, 454, 567, 680, 794, 907, 1021, 1134, 1247,
103001361, 1474, 1588, 1701, 1815, 1928, 2041, 2155, 2268, 2382, 2495,
103012608, 2722, 2835, 2949, 3062, 3175, 3289, 3402, 3516, 3629, 3742,
103023856, 3969, 4083, 4196, 4310, 4423, 4536, 4650, 4763, 4877, 4990,
103035103, 5217, 5330, 5444, 5557, 5670, 5784, 5897, 6011, 6124, 6237,
103046351, 6464, 6578, 6691, 6804, 6918, 7031, 7145, 7258, 7372, 7485,
103057598, 7712, 7825, 7939, 8052, 8165, 8279, 8392, 8506, 8619, 8732,
103068846, 8959, 9073, 9186, 9299, 9413, 9526, 9640, 9753, 9866, 9980,
1030710093, 10207, 10320, 10434, 10547, 10660, 10774, 10887, 11001, 11114,
1030811227, 11341, 11454, 11568, 11681, 11794, 11908, 12021, 12135, 12248,
1030912361, 12475, 12588, 12702, 12815, 12929, 13042, 13155, 13269, 13382,
1031013496, 13609, 13722, 13836, 13949, 14063, 14176, 14289, 14403
10311};
10312
10313static u32 yuv2rgb(u32 yuv)
10314{
10315 int y = (yuv >> 16) & 0xff;
10316 int cb = (yuv >> 8) & 0xff;
10317 int cr = yuv & 0xff;
10318 int r, g, b;
10319
10320 r = y + ((R_Cr[cr]) >> SCALE);
10321 g = y + ((G_Cb[cb] + G_Cr[cr]) >> SCALE);
10322 b = y + ((B_Cb[cb]) >> SCALE);
10323
10324 r = r - 16;
10325 if (r < 0)
10326 r = 0;
10327 r = r*1164/1000;
10328 g = g - 16;
10329 if (g < 0)
10330 g = 0;
10331 g = g*1164/1000;
10332 b = b - 16;
10333 if (b < 0)
10334 b = 0;
10335 b = b*1164/1000;
10336
10337 r = (r <= 0) ? 0 : (r >= 255) ? 255 : r;
10338 g = (g <= 0) ? 0 : (g >= 255) ? 255 : g;
10339 b = (b <= 0) ? 0 : (b >= 255) ? 255 : b;
10340
10341 return (r << 16) | (g << 8) | b;
10342}
10343/* 8bit convert to 10bit */
10344static u32 eight2ten(u32 yuv)
10345{
10346 int y = (yuv >> 16) & 0xff;
10347 int cb = (yuv >> 8) & 0xff;
10348 int cr = yuv & 0xff;
10349 u32 data32;
10350
10351 /* txlx need check vd1 path bit width by s2u registers */
10352 if (get_cpu_type() == MESON_CPU_MAJOR_ID_TXLX) {
10353 data32 = READ_VCBUS_REG(0x1d94) & 0xffff;
10354 if ((data32 == 0x2000) ||
10355 (data32 == 0x800))
10356 return ((y << 20)<<2) | ((cb << 10)<<2) | (cr<<2);
10357 else
10358 return (y << 20) | (cb << 10) | cr;
10359 } else
10360 return (y << 20) | (cb << 10) | cr;
10361}
10362
10363static u32 rgb2yuv(u32 rgb)
10364{
10365 int r = (rgb >> 16) & 0xff;
10366 int g = (rgb >> 8) & 0xff;
10367 int b = rgb & 0xff;
10368 int y, u, v;
10369
10370 y = ((47*r + 157*g + 16*b + 128) >> 8) + 16;
10371 u = ((-26*r - 87*g + 112*b + 128) >> 8) + 128;
10372 v = ((112*r - 102*g - 10*b + 128) >> 8) + 128;
10373
10374 return (y << 16) | (u << 8) | v;
10375}
10376
10377static ssize_t video_test_screen_store(struct class *cla,
10378 struct class_attribute *attr,
10379 const char *buf, size_t count)
10380{
10381 int r;
10382 unsigned int data = 0x0;
10383
10384 r = kstrtoint(buf, 0, &test_screen);
10385 if (r < 0)
10386 return -EINVAL;
10387#if 0/*no use now*/
10388 /* vdin0 pre post blend enable or disabled */
10389 data = READ_VCBUS_REG(VPP_MISC);
10390 if (test_screen & 0x01000000)
10391 data |= VPP_VD1_PREBLEND;
10392 else
10393 data &= (~VPP_VD1_PREBLEND);
10394
10395 if (test_screen & 0x02000000)
10396 data |= VPP_VD1_POSTBLEND;
10397 else
10398 data &= (~VPP_VD1_POSTBLEND);
10399#endif
10400
10401#if DEBUG_TMP
10402 if (test_screen & 0x04000000)
10403 data |= VPP_VD2_PREBLEND;
10404 else
10405 data &= (~VPP_VD2_PREBLEND);
10406
10407 if (test_screen & 0x08000000)
10408 data |= VPP_VD2_POSTBLEND;
10409 else
10410 data &= (~VPP_VD2_POSTBLEND);
10411#endif
10412
10413 /* show test screen YUV blend*/
10414 if (!legacy_vpp)
10415 WRITE_VCBUS_REG(
10416 VPP_POST_BLEND_BLEND_DUMMY_DATA,
10417 test_screen & 0x00ffffff);
10418 else if (is_meson_gxm_cpu() ||
10419 (get_cpu_type() == MESON_CPU_MAJOR_ID_TXLX))
10420 /* bit width change to 10bit in gxm, 10/12 in txlx*/
10421 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10422 eight2ten(test_screen & 0x00ffffff));
10423 else if (get_cpu_type() == MESON_CPU_MAJOR_ID_GXTVBB)
10424 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10425 yuv2rgb(test_screen & 0x00ffffff));
10426 else if (get_cpu_type() < MESON_CPU_MAJOR_ID_GXTVBB)
10427 if (READ_VCBUS_REG(VIU_OSD1_BLK0_CFG_W0) & 0x80)
10428 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10429 test_screen & 0x00ffffff);
10430 else /* RGB blend */
10431 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10432 yuv2rgb(test_screen & 0x00ffffff));
10433 else
10434 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10435 test_screen & 0x00ffffff);
10436#if 0/*no use*/
10437 WRITE_VCBUS_REG(VPP_MISC, data);
10438#endif
10439 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
10440 pr_info("%s write(VPP_MISC,%x) write(VPP_DUMMY_DATA1, %x)\n",
10441 __func__, data, test_screen & 0x00ffffff);
10442 }
10443 return count;
10444}
10445
10446static ssize_t video_rgb_screen_store(struct class *cla,
10447 struct class_attribute *attr,
10448 const char *buf, size_t count)
10449{
10450 int r;
10451 u32 yuv_eight;
10452
10453 /* unsigned data = 0x0; */
10454 r = kstrtoint(buf, 0, &rgb_screen);
10455 if (r < 0)
10456 return -EINVAL;
10457
10458#if DEBUG_TMP
10459 /* vdin0 pre post blend enable or disabled */
10460
10461 data = READ_VCBUS_REG(VPP_MISC);
10462 if (rgb_screen & 0x01000000)
10463 data |= VPP_VD1_PREBLEND;
10464 else
10465 data &= (~VPP_VD1_PREBLEND);
10466
10467 if (rgb_screen & 0x02000000)
10468 data |= VPP_VD1_POSTBLEND;
10469 else
10470 data &= (~VPP_VD1_POSTBLEND);
10471
10472 if (test_screen & 0x04000000)
10473 data |= VPP_VD2_PREBLEND;
10474 else
10475 data &= (~VPP_VD2_PREBLEND);
10476
10477 if (test_screen & 0x08000000)
10478 data |= VPP_VD2_POSTBLEND;
10479 else
10480 data &= (~VPP_VD2_POSTBLEND);
10481#endif
10482 /* show test screen YUV blend*/
10483 yuv_eight = rgb2yuv(rgb_screen & 0x00ffffff);
10484 if (!legacy_vpp) {
10485 WRITE_VCBUS_REG(
10486 VPP_POST_BLEND_BLEND_DUMMY_DATA,
10487 yuv_eight & 0x00ffffff);
10488 } else if (is_meson_gxtvbb_cpu()) {
10489 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10490 rgb_screen & 0x00ffffff);
10491 } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL)) {
10492 WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
10493 eight2ten(yuv_eight & 0x00ffffff));
10494 }
10495 /* WRITE_VCBUS_REG(VPP_MISC, data); */
10496
10497 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
10498 pr_info("%s write(VPP_DUMMY_DATA1, %x)\n",
10499 __func__, rgb_screen & 0x00ffffff);
10500 }
10501 return count;
10502}
10503
10504
10505
10506static ssize_t video_nonlinear_factor_show(struct class *cla,
10507 struct class_attribute *attr,
10508 char *buf)
10509{
10510 u32 factor;
10511 struct disp_info_s *layer = &glayer_info[0];
10512
10513 factor = vpp_get_nonlinear_factor(layer);
10514
10515 return sprintf(buf, "%d\n", factor);
10516}
10517
10518static ssize_t video_nonlinear_factor_store(struct class *cla,
10519 struct class_attribute *attr,
10520 const char *buf, size_t count)
10521{
10522 int r;
10523 u32 factor;
10524 struct disp_info_s *layer = &glayer_info[0];
10525
10526 r = kstrtoint(buf, 0, &factor);
10527 if (r < 0)
10528 return -EINVAL;
10529
10530 if (vpp_set_nonlinear_factor(layer, factor) == 0)
10531 video_property_changed = 1;
10532
10533 return count;
10534}
10535
10536static ssize_t video_disable_show(struct class *cla,
10537 struct class_attribute *attr, char *buf)
10538{
10539 return sprintf(buf, "%d\n", disable_video);
10540}
10541
10542static ssize_t video_disable_store(struct class *cla,
10543 struct class_attribute *attr,
10544 const char *buf, size_t count)
10545{
10546 int r;
10547 int val;
10548
10549 if (debug_flag & DEBUG_FLAG_BLACKOUT)
10550 pr_info("%s(%s)\n", __func__, buf);
10551
10552 r = kstrtoint(buf, 0, &val);
10553 if (r < 0)
10554 return -EINVAL;
10555
10556 if (_video_set_disable(val) < 0)
10557 return -EINVAL;
10558
10559 return count;
10560}
10561
10562static ssize_t video_global_output_show(struct class *cla,
10563 struct class_attribute *attr, char *buf)
10564{
10565 return sprintf(buf, "%d\n", video_global_output);
10566}
10567
10568static ssize_t video_global_output_store(struct class *cla,
10569 struct class_attribute *attr,
10570 const char *buf, size_t count)
10571{
10572 int r;
10573
10574 r = kstrtoint(buf, 0, &video_global_output);
10575 if (r < 0)
10576 return -EINVAL;
10577
10578 pr_info("%s(%d)\n", __func__, video_global_output);
10579
10580 return count;
10581}
10582
10583static ssize_t video_hold_show(struct class *cla,
10584 struct class_attribute *attr, char *buf)
10585{
10586 return sprintf(buf, "%d\n", hold_video);
10587}
10588
10589static ssize_t video_hold_store(struct class *cla,
10590 struct class_attribute *attr,
10591 const char *buf, size_t count)
10592{
10593 int r;
10594
10595 if (debug_flag & DEBUG_FLAG_BLACKOUT)
10596 pr_info("%s(%s)\n", __func__, buf);
10597
10598 r = kstrtoint(buf, 0, &hold_video);
10599 if (r < 0)
10600 return -EINVAL;
10601
10602 return count;
10603}
10604
10605static ssize_t video_freerun_mode_show(struct class *cla,
10606 struct class_attribute *attr, char *buf)
10607{
10608 return sprintf(buf, "%d\n", freerun_mode);
10609}
10610
10611static ssize_t video_freerun_mode_store(struct class *cla,
10612 struct class_attribute *attr,
10613 const char *buf, size_t count)
10614{
10615 int r;
10616
10617 r = kstrtoint(buf, 0, &freerun_mode);
10618 if (r < 0)
10619 return -EINVAL;
10620
10621 if (debug_flag)
10622 pr_info("%s(%d)\n", __func__, freerun_mode);
10623
10624 return count;
10625}
10626
10627static ssize_t video_speed_check_show(struct class *cla,
10628 struct class_attribute *attr, char *buf)
10629{
10630 u32 h, w;
10631 struct disp_info_s *layer = &glayer_info[0];
10632
10633 h = layer->speed_check_height;
10634 w = layer->speed_check_width;
10635
10636 return snprintf(buf, 40, "%d %d\n", h, w);
10637}
10638
10639static ssize_t video_speed_check_store(struct class *cla,
10640 struct class_attribute *attr,
10641 const char *buf, size_t count)
10642{
10643 set_video_speed_check(buf);
10644 return strnlen(buf, count);
10645}
10646
10647static ssize_t threedim_mode_store(struct class *cla,
10648 struct class_attribute *attr,
10649 const char *buf, size_t len)
10650{
10651#ifdef TV_3D_FUNCTION_OPEN
10652
10653 u32 type;
10654 int r;
10655
10656 r = kstrtoint(buf, 0, &type);
10657 if (r < 0)
10658 return -EINVAL;
10659
10660 if (type != process_3d_type) {
10661 process_3d_type = type;
10662 if (mvc_flag)
10663 process_3d_type |= MODE_3D_MVC;
10664 video_property_changed = 1;
10665 if ((process_3d_type & MODE_3D_FA)
10666 && cur_dispbuf && !cur_dispbuf->trans_fmt)
10667 /*notify di 3d mode is frame alternative mode,1*/
10668 /*passing two buffer in one frame */
10669 vf_notify_receiver_by_name("deinterlace",
10670 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE,
10671 (void *)1);
10672 else
10673 vf_notify_receiver_by_name("deinterlace",
10674 VFRAME_EVENT_PROVIDER_SET_3D_VFRAME_INTERLEAVE,
10675 (void *)0);
10676 }
10677#endif
10678 return len;
10679}
10680
10681static ssize_t threedim_mode_show(struct class *cla,
10682 struct class_attribute *attr, char *buf)
10683{
10684#ifdef TV_3D_FUNCTION_OPEN
10685 return sprintf(buf, "process type 0x%x,trans fmt %u.\n",
10686 process_3d_type, video_3d_format);
10687#else
10688 return 0;
10689#endif
10690}
10691
10692static ssize_t frame_addr_show(struct class *cla, struct class_attribute *attr,
10693 char *buf)
10694{
10695 struct canvas_s canvas;
10696 u32 addr[3];
10697
10698 if (cur_dispbuf) {
10699 canvas_read(cur_dispbuf->canvas0Addr & 0xff, &canvas);
10700 addr[0] = canvas.addr;
10701 canvas_read((cur_dispbuf->canvas0Addr >> 8) & 0xff, &canvas);
10702 addr[1] = canvas.addr;
10703 canvas_read((cur_dispbuf->canvas0Addr >> 16) & 0xff, &canvas);
10704 addr[2] = canvas.addr;
10705
10706 return sprintf(buf, "0x%x-0x%x-0x%x\n", addr[0], addr[1],
10707 addr[2]);
10708 }
10709
10710 return sprintf(buf, "NA\n");
10711}
10712
10713static ssize_t frame_canvas_width_show(struct class *cla,
10714 struct class_attribute *attr, char *buf)
10715{
10716 struct canvas_s canvas;
10717 u32 width[3];
10718
10719 if (cur_dispbuf) {
10720 canvas_read(cur_dispbuf->canvas0Addr & 0xff, &canvas);
10721 width[0] = canvas.width;
10722 canvas_read((cur_dispbuf->canvas0Addr >> 8) & 0xff, &canvas);
10723 width[1] = canvas.width;
10724 canvas_read((cur_dispbuf->canvas0Addr >> 16) & 0xff, &canvas);
10725 width[2] = canvas.width;
10726
10727 return sprintf(buf, "%d-%d-%d\n",
10728 width[0], width[1], width[2]);
10729 }
10730
10731 return sprintf(buf, "NA\n");
10732}
10733
10734static ssize_t frame_canvas_height_show(struct class *cla,
10735 struct class_attribute *attr, char *buf)
10736{
10737 struct canvas_s canvas;
10738 u32 height[3];
10739
10740 if (cur_dispbuf) {
10741 canvas_read(cur_dispbuf->canvas0Addr & 0xff, &canvas);
10742 height[0] = canvas.height;
10743 canvas_read((cur_dispbuf->canvas0Addr >> 8) & 0xff, &canvas);
10744 height[1] = canvas.height;
10745 canvas_read((cur_dispbuf->canvas0Addr >> 16) & 0xff, &canvas);
10746 height[2] = canvas.height;
10747
10748 return sprintf(buf, "%d-%d-%d\n", height[0], height[1],
10749 height[2]);
10750 }
10751
10752 return sprintf(buf, "NA\n");
10753}
10754
10755static ssize_t frame_width_show(struct class *cla,
10756 struct class_attribute *attr,
10757 char *buf)
10758{
10759 if (cur_dispbuf) {
10760 if (cur_dispbuf->type & VIDTYPE_COMPRESS)
10761 return sprintf(buf, "%d\n", cur_dispbuf->compWidth);
10762 else
10763 return sprintf(buf, "%d\n", cur_dispbuf->width);
10764 }
10765
10766 return sprintf(buf, "NA\n");
10767}
10768
10769static ssize_t frame_height_show(struct class *cla,
10770 struct class_attribute *attr, char *buf)
10771{
10772 if (cur_dispbuf) {
10773 if (cur_dispbuf->type & VIDTYPE_COMPRESS)
10774 return sprintf(buf, "%d\n", cur_dispbuf->compHeight);
10775 else
10776 return sprintf(buf, "%d\n", cur_dispbuf->height);
10777 }
10778
10779 return sprintf(buf, "NA\n");
10780}
10781
10782static ssize_t frame_format_show(struct class *cla,
10783 struct class_attribute *attr, char *buf)
10784{
10785 ssize_t ret = 0;
10786
10787 if (cur_dispbuf) {
10788 if ((cur_dispbuf->type & VIDTYPE_TYPEMASK) ==
10789 VIDTYPE_INTERLACE_TOP)
10790 ret = sprintf(buf, "interlace-top\n");
10791 else if ((cur_dispbuf->type & VIDTYPE_TYPEMASK) ==
10792 VIDTYPE_INTERLACE_BOTTOM)
10793 ret = sprintf(buf, "interlace-bottom\n");
10794 else
10795 ret = sprintf(buf, "progressive\n");
10796
10797 if (cur_dispbuf->type & VIDTYPE_COMPRESS)
10798 ret += sprintf(buf + ret, "Compressed\n");
10799
10800 return ret;
10801 }
10802
10803 return sprintf(buf, "NA\n");
10804}
10805
10806static ssize_t frame_aspect_ratio_show(struct class *cla,
10807 struct class_attribute *attr, char *buf)
10808{
10809 if (cur_dispbuf) {
10810 u32 ar = (cur_dispbuf->ratio_control &
10811 DISP_RATIO_ASPECT_RATIO_MASK) >>
10812 DISP_RATIO_ASPECT_RATIO_BIT;
10813
10814 if (ar)
10815 return sprintf(buf, "0x%x\n", ar);
10816 else
10817 return sprintf(buf, "0x%x\n",
10818 (cur_dispbuf->width << 8) /
10819 cur_dispbuf->height);
10820 }
10821
10822 return sprintf(buf, "NA\n");
10823}
10824
10825static ssize_t frame_rate_show(struct class *cla, struct class_attribute *attr,
10826 char *buf)
10827{
10828 u32 cnt = frame_count - last_frame_count;
10829 u32 time = jiffies;
10830 u32 tmp = time;
10831 u32 rate = 0;
10832 u32 vsync_rate;
10833 ssize_t ret = 0;
10834
10835 time -= last_frame_time;
10836 last_frame_time = tmp;
10837 last_frame_count = frame_count;
10838 if (time == 0)
10839 return 0;
10840 rate = 100 * cnt * HZ / time;
10841 vsync_rate = 100 * vsync_count * HZ / time;
10842 if (vinfo->sync_duration_den > 0) {
10843 ret =
10844 sprintf(buf,
10845 "VF.fps=%d.%02d panel fps %d, dur/is: %d,v/s=%d.%02d,inc=%d\n",
10846 rate / 100, rate % 100,
10847 vinfo->sync_duration_num /
10848 vinfo->sync_duration_den,
10849 time, vsync_rate / 100, vsync_rate % 100,
10850 vsync_pts_inc);
10851 }
10852 if ((debugflags & DEBUG_FLAG_CALC_PTS_INC) && time > HZ * 10
10853 && vsync_rate > 0) {
10854 if ((vsync_rate * vsync_pts_inc / 100) != 90000)
10855 vsync_pts_inc = 90000 * 100 / (vsync_rate);
10856 }
10857 vsync_count = 0;
10858 return ret;
10859}
10860
10861static ssize_t vframe_states_show(struct class *cla,
10862 struct class_attribute *attr, char *buf)
10863{
10864 int ret = 0;
10865 struct vframe_states states;
10866 unsigned long flags;
10867 struct vframe_s *vf;
10868
10869 if (video_vf_get_states(&states) == 0) {
10870 ret += sprintf(buf + ret, "vframe_pool_size=%d\n",
10871 states.vf_pool_size);
10872 ret += sprintf(buf + ret, "vframe buf_free_num=%d\n",
10873 states.buf_free_num);
10874 ret += sprintf(buf + ret, "vframe buf_recycle_num=%d\n",
10875 states.buf_recycle_num);
10876 ret += sprintf(buf + ret, "vframe buf_avail_num=%d\n",
10877 states.buf_avail_num);
10878
10879 spin_lock_irqsave(&lock, flags);
10880
10881 vf = video_vf_peek();
10882 if (vf) {
10883 ret += sprintf(buf + ret,
10884 "vframe ready frame delayed =%dms\n",
10885 (int)(jiffies_64 -
10886 vf->ready_jiffies64) * 1000 /
10887 HZ);
10888 ret += sprintf(buf + ret,
10889 "vf index=%d\n", vf->index);
10890 ret += sprintf(buf + ret,
10891 "vf->pts=%d\n", vf->pts);
10892 ret += sprintf(buf + ret,
10893 "cur vpts=%d\n",
10894 timestamp_vpts_get());
10895 ret += sprintf(buf + ret,
10896 "vf type=%d\n",
10897 vf->type);
10898 if (vf->type & VIDTYPE_COMPRESS) {
10899 ret += sprintf(buf + ret,
10900 "vf compHeadAddr=%x\n",
10901 vf->compHeadAddr);
10902 ret += sprintf(buf + ret,
10903 "vf compBodyAddr =%x\n",
10904 vf->compBodyAddr);
10905 } else {
10906 ret += sprintf(buf + ret,
10907 "vf canvas0Addr=%x\n",
10908 vf->canvas0Addr);
10909 ret += sprintf(buf + ret,
10910 "vf canvas1Addr=%x\n",
10911 vf->canvas1Addr);
10912 ret += sprintf(buf + ret,
10913 "vf canvas0Addr.y.addr=%x(%d)\n",
10914 canvas_get_addr(
10915 canvasY(vf->canvas0Addr)),
10916 canvas_get_addr(
10917 canvasY(vf->canvas0Addr)));
10918 ret += sprintf(buf + ret,
10919 "vf canvas0Adr.uv.adr=%x(%d)\n",
10920 canvas_get_addr(
10921 canvasUV(vf->canvas0Addr)),
10922 canvas_get_addr(
10923 canvasUV(vf->canvas0Addr)));
10924 }
10925 }
10926 spin_unlock_irqrestore(&lock, flags);
10927
10928 } else
10929 ret += sprintf(buf + ret, "vframe no states\n");
10930
10931 return ret;
10932}
10933
10934#ifdef CONFIG_AM_VOUT
10935static ssize_t device_resolution_show(struct class *cla,
10936 struct class_attribute *attr, char *buf)
10937{
10938#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
10939 const struct vinfo_s *info;
10940
10941 if (cur_dev == &video_dev[0])
10942 info = get_current_vinfo();
10943 else
10944 info = get_current_vinfo2();
10945#else
10946 const struct vinfo_s *info = get_current_vinfo();
10947#endif
10948
10949 if (info != NULL)
10950 return sprintf(buf, "%dx%d\n", info->width, info->height);
10951 else
10952 return sprintf(buf, "0x0\n");
10953}
10954#endif
10955
10956static ssize_t video_filename_show(struct class *cla,
10957 struct class_attribute *attr, char *buf)
10958{
10959 return sprintf(buf, "%s\n", file_name);
10960}
10961
10962static ssize_t video_filename_store(struct class *cla,
10963 struct class_attribute *attr,
10964 const char *buf, size_t count)
10965{
10966 size_t r;
10967
10968 /* check input buf to mitigate buffer overflow issue */
10969 if (strlen(buf) >= sizeof(file_name)) {
10970 memcpy(file_name, buf, sizeof(file_name));
10971 file_name[sizeof(file_name)-1] = '\0';
10972 r = 1;
10973 } else
10974 r = sscanf(buf, "%s", file_name);
10975 if (r != 1)
10976 return -EINVAL;
10977
10978 return r;
10979}
10980
10981static ssize_t video_debugflags_show(struct class *cla,
10982 struct class_attribute *attr, char *buf)
10983{
10984 int len = 0;
10985
10986 len += sprintf(buf + len, "value=%d\n", debugflags);
10987 len += sprintf(buf + len, "bit0:playing as fast!\n");
10988 len += sprintf(buf + len,
10989 "bit1:enable calc pts inc in frame rate show\n");
10990 return len;
10991}
10992
10993static ssize_t video_debugflags_store(struct class *cla,
10994 struct class_attribute *attr,
10995 const char *buf, size_t count)
10996{
10997 int r;
10998 int value = -1;
10999
11000/*
11001 * r = sscanf(buf, "%d", &value);
11002 * if (r == 1) {
11003 * debugflags = value;
11004 * seted = 1;
11005 * } else {
11006 * r = sscanf(buf, "0x%x", &value);
11007 * if (r == 1) {
11008 * debugflags = value;
11009 * seted = 1;
11010 * }
11011 * }
11012 */
11013
11014 r = kstrtoint(buf, 0, &value);
11015 if (r < 0)
11016 return -EINVAL;
11017
11018 debugflags = value;
11019
11020 pr_info("debugflags changed to %d(%x)\n", debugflags,
11021 debugflags);
11022 return count;
11023
11024}
11025
11026static ssize_t trickmode_duration_show(struct class *cla,
11027 struct class_attribute *attr, char *buf)
11028{
11029 return sprintf(buf, "trickmode frame duration %d\n",
11030 trickmode_duration / 9000);
11031}
11032
11033static ssize_t trickmode_duration_store(struct class *cla,
11034 struct class_attribute *attr,
11035 const char *buf, size_t count)
11036{
11037 int r;
11038 u32 s_value;
11039
11040 r = kstrtoint(buf, 0, &s_value);
11041 if (r < 0)
11042 return -EINVAL;
11043
11044 trickmode_duration = s_value * 9000;
11045
11046 return count;
11047}
11048
11049static ssize_t video_vsync_pts_inc_upint_show(struct class *cla,
11050 struct class_attribute *attr,
11051 char *buf)
11052{
11053 if (vsync_pts_inc_upint)
11054 return sprintf(buf,
11055 "%d,freerun %d,1.25xInc %d,1.12xInc %d,inc+10 %d,1xInc %d\n",
11056 vsync_pts_inc_upint, vsync_freerun,
11057 vsync_pts_125, vsync_pts_112, vsync_pts_101,
11058 vsync_pts_100);
11059 else
11060 return sprintf(buf, "%d\n", vsync_pts_inc_upint);
11061}
11062
11063static ssize_t video_vsync_pts_inc_upint_store(struct class *cla,
11064 struct class_attribute *attr,
11065 const char *buf, size_t count)
11066{
11067 int r;
11068
11069 r = kstrtoint(buf, 0, &vsync_pts_inc_upint);
11070 if (r < 0)
11071 return -EINVAL;
11072
11073 if (debug_flag)
11074 pr_info("%s(%d)\n", __func__, vsync_pts_inc_upint);
11075
11076 return count;
11077}
11078
11079static ssize_t slowsync_repeat_enable_show(struct class *cla,
11080 struct class_attribute *attr,
11081 char *buf)
11082{
11083 return sprintf(buf, "slowsync repeate enable = %d\n",
11084 slowsync_repeat_enable);
11085}
11086
11087static ssize_t slowsync_repeat_enable_store(struct class *cla,
11088 struct class_attribute *attr,
11089 const char *buf, size_t count)
11090{
11091 int r;
11092
11093 r = kstrtoint(buf, 0, &slowsync_repeat_enable);
11094 if (r < 0)
11095 return -EINVAL;
11096
11097 if (debug_flag)
11098 pr_info("%s(%d)\n", __func__, slowsync_repeat_enable);
11099
11100 return count;
11101}
11102
11103static ssize_t video_vsync_slow_factor_show(struct class *cla,
11104 struct class_attribute *attr,
11105 char *buf)
11106{
11107 return sprintf(buf, "%d\n", vsync_slow_factor);
11108}
11109
11110static ssize_t video_vsync_slow_factor_store(struct class *cla,
11111 struct class_attribute *attr,
11112 const char *buf, size_t count)
11113{
11114 int r;
11115
11116 r = kstrtoint(buf, 0, &vsync_slow_factor);
11117 if (r < 0)
11118 return -EINVAL;
11119
11120 if (debug_flag)
11121 pr_info("%s(%d)\n", __func__, vsync_slow_factor);
11122
11123 return count;
11124}
11125
11126static ssize_t fps_info_show(struct class *cla, struct class_attribute *attr,
11127 char *buf)
11128{
11129 u32 cnt = frame_count - last_frame_count;
11130 u32 time = jiffies;
11131 u32 input_fps = 0;
11132 u32 tmp = time;
11133
11134 time -= last_frame_time;
11135 last_frame_time = tmp;
11136 last_frame_count = frame_count;
11137 if (time != 0)
11138 output_fps = cnt * HZ / time;
11139 if (cur_dispbuf && cur_dispbuf->duration > 0) {
11140 input_fps = 96000 / cur_dispbuf->duration;
11141 if (output_fps > input_fps)
11142 output_fps = input_fps;
11143 } else
11144 input_fps = output_fps;
11145 return sprintf(buf, "input_fps:0x%x output_fps:0x%x drop_fps:0x%x\n",
11146 input_fps, output_fps, input_fps - output_fps);
11147}
11148
11149static ssize_t video_layer1_state_show(struct class *cla,
11150 struct class_attribute *attr, char *buf)
11151{
11152 /*return sprintf(buf, "%d\n",*/
11153 /*(READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off)*/
11154 /*& VPP_VD1_PREBLEND) ? 1 : 0);*/
11155 return sprintf(buf, "%d\n", video_enabled);
11156}
11157
11158void set_video_angle(u32 s_value)
11159{
11160 struct disp_info_s *layer = &glayer_info[0];
11161
11162 if ((s_value <= 3) && (layer->angle != s_value)) {
11163 layer->angle = s_value;
11164 pr_info("video angle:%d\n", layer->angle);
11165 }
11166}
11167EXPORT_SYMBOL(set_video_angle);
11168
11169static ssize_t video_angle_show(struct class *cla, struct class_attribute *attr,
11170 char *buf)
11171{
11172 struct disp_info_s *layer = &glayer_info[0];
11173
11174 return snprintf(buf, 40, "%d\n", layer->angle);
11175}
11176
11177static ssize_t video_angle_store(struct class *cla,
11178 struct class_attribute *attr, const char *buf,
11179 size_t count)
11180{
11181 int r;
11182 u32 s_value;
11183
11184 r = kstrtoint(buf, 0, &s_value);
11185 if (r < 0)
11186 return -EINVAL;
11187
11188 set_video_angle(s_value);
11189 return strnlen(buf, count);
11190}
11191
11192static ssize_t show_first_frame_nosync_show(struct class *cla,
11193 struct class_attribute *attr,
11194 char *buf)
11195{
11196 return sprintf(buf, "%d\n", show_first_frame_nosync ? 1 : 0);
11197}
11198
11199static ssize_t show_first_frame_nosync_store(struct class *cla,
11200 struct class_attribute *attr,
11201 const char *buf, size_t count)
11202{
11203 int r;
11204 int value;
11205
11206 r = kstrtoint(buf, 0, &value);
11207 if (r < 0)
11208 return -EINVAL;
11209
11210 if (value == 0)
11211 show_first_frame_nosync = false;
11212 else
11213 show_first_frame_nosync = true;
11214
11215 return count;
11216}
11217
11218static ssize_t show_first_picture_store(struct class *cla,
11219 struct class_attribute *attr,
11220 const char *buf, size_t count)
11221{
11222 int r;
11223 int value;
11224
11225 r = kstrtoint(buf, 0, &value);
11226 if (r < 0)
11227 return -EINVAL;
11228
11229 if (value == 0)
11230 show_first_picture = false;
11231 else
11232 show_first_picture = true;
11233
11234 return count;
11235}
11236
11237static ssize_t video_free_keep_buffer_store(struct class *cla,
11238 struct class_attribute *attr,
11239 const char *buf, size_t count)
11240{
11241 int r;
11242 int val;
11243
11244 if (debug_flag & DEBUG_FLAG_BLACKOUT)
11245 pr_info("%s(%s)\n", __func__, buf);
11246 r = kstrtoint(buf, 0, &val);
11247 if (r < 0)
11248 return -EINVAL;
11249 if (val == 1)
11250 try_free_keep_video(1);
11251 return count;
11252}
11253
11254
11255static ssize_t free_cma_buffer_store(struct class *cla,
11256 struct class_attribute *attr,
11257 const char *buf, size_t count)
11258{
11259 int r;
11260 int val;
11261
11262 r = kstrtoint(buf, 0, &val);
11263 if (r < 0)
11264 return -EINVAL;
11265 if (val == 1) {
11266 pr_info("start to free cma buffer\n");
11267#if DEBUG_TMP
11268 vh265_free_cmabuf();
11269 vh264_4k_free_cmabuf();
11270 vdec_free_cmabuf();
11271#endif
11272 }
11273 return count;
11274}
11275
11276static ssize_t pic_mode_info_show(struct class *cla,
11277 struct class_attribute *attr, char *buf)
11278{
11279 int ret = 0;
11280
11281 if (cur_dispbuf) {
11282 u32 adapted_mode = (cur_dispbuf->ratio_control
11283 & DISP_RATIO_ADAPTED_PICMODE) ? 1 : 0;
11284 u32 info_frame = (cur_dispbuf->ratio_control
11285 & DISP_RATIO_INFOFRAME_AVAIL) ? 1 : 0;
11286
11287 ret += sprintf(buf + ret, "ratio_control=0x%x\n",
11288 cur_dispbuf->ratio_control);
11289 ret += sprintf(buf + ret, "adapted_mode=%d\n",
11290 adapted_mode);
11291 ret += sprintf(buf + ret, "info_frame=%d\n",
11292 info_frame);
11293 ret += sprintf(buf + ret,
11294 "hs=%d, he=%d, vs=%d, ve=%d\n",
11295 cur_dispbuf->pic_mode.hs,
11296 cur_dispbuf->pic_mode.he,
11297 cur_dispbuf->pic_mode.vs,
11298 cur_dispbuf->pic_mode.ve);
11299 ret += sprintf(buf + ret, "screen_mode=%d\n",
11300 cur_dispbuf->pic_mode.screen_mode);
11301 ret += sprintf(buf + ret, "custom_ar=%d\n",
11302 cur_dispbuf->pic_mode.custom_ar);
11303 ret += sprintf(buf + ret, "AFD_enable=%d\n",
11304 cur_dispbuf->pic_mode.AFD_enable);
11305 return ret;
11306 }
11307 return sprintf(buf, "NA\n");
11308}
11309
11310static ssize_t video_inuse_show(struct class *class,
11311 struct class_attribute *attr, char *buf)
11312{
11313 size_t r;
11314
11315 mutex_lock(&video_inuse_mutex);
11316 if (video_inuse == 0) {
11317 r = sprintf(buf, "%d\n", video_inuse);
11318 video_inuse = 1;
11319 pr_info("video_inuse return 0,set 1\n");
11320 } else {
11321 r = sprintf(buf, "%d\n", video_inuse);
11322 pr_info("video_inuse = %d\n", video_inuse);
11323 }
11324 mutex_unlock(&video_inuse_mutex);
11325 return r;
11326}
11327
11328static ssize_t video_inuse_store(struct class *class,
11329 struct class_attribute *attr,
11330 const char *buf, size_t count)
11331{
11332 size_t r;
11333 int val;
11334
11335 mutex_lock(&video_inuse_mutex);
11336 r = kstrtoint(buf, 0, &val);
11337 pr_info("set video_inuse val:%d\n", val);
11338 video_inuse = val;
11339 mutex_unlock(&video_inuse_mutex);
11340 if (r != 1)
11341 return -EINVAL;
11342
11343 return count;
11344}
11345
11346static ssize_t video_zorder_show(
11347 struct class *cla,
11348 struct class_attribute *attr,
11349 char *buf)
11350{
11351 struct disp_info_s *layer = &glayer_info[0];
11352
11353 return sprintf(buf, "%d\n", layer->zorder);
11354}
11355
11356static ssize_t video_zorder_store(
11357 struct class *cla,
11358 struct class_attribute *attr,
11359 const char *buf, size_t count)
11360{
11361 int zorder;
11362 int ret = 0;
11363 struct disp_info_s *layer = &glayer_info[0];
11364
11365 ret = kstrtoint(buf, 0, &zorder);
11366 if (ret < 0)
11367 return -EINVAL;
11368
11369 if (zorder != layer->zorder) {
11370 layer->zorder = zorder;
11371 video_property_changed = 1;
11372 }
11373 return count;
11374}
11375
11376#ifdef VIDEO_PIP
11377static int _videopip_set_disable(u32 val)
11378{
11379 if (val > VIDEO_DISABLE_FORNEXT)
11380 return -EINVAL;
11381
11382 disable_videopip = val;
11383
11384 if (disable_videopip != VIDEO_DISABLE_NONE) {
11385 DisableVideoLayer2();
11386
11387 if ((disable_videopip == VIDEO_DISABLE_FORNEXT)
11388 && cur_pipbuf && (cur_pipbuf != &local_pip))
11389 pip_property_changed = 1;
11390 } else {
11391 if (cur_pipbuf && (cur_pipbuf != &local_pip))
11392 EnableVideoLayer2();
11393 }
11394
11395 return 0;
11396}
11397
11398static ssize_t videopip_axis_show(
11399 struct class *cla,
11400 struct class_attribute *attr,
11401 char *buf)
11402{
11403 int x0, y0, x1, y1;
11404 struct disp_info_s *layer = &glayer_info[1];
11405
11406 x0 = layer->layer_left;
11407 y0 = layer->layer_top;
11408 x1 = layer->layer_width + x0 - 1;
11409 y1 = layer->layer_height + y0 - 1;
11410 return snprintf(buf, 40, "%d %d %d %d\n", x0, y0, x1, y1);
11411}
11412
11413static ssize_t videopip_axis_store(
11414 struct class *cla,
11415 struct class_attribute *attr,
11416 const char *buf, size_t count)
11417{
11418 struct disp_info_s *layer = &glayer_info[1];
11419
11420 mutex_lock(&video_module_mutex);
11421
11422 set_video_window(layer, buf);
11423
11424 mutex_unlock(&video_module_mutex);
11425
11426 return strnlen(buf, count);
11427}
11428
11429static ssize_t videopip_crop_show(
11430 struct class *cla,
11431 struct class_attribute *attr,
11432 char *buf)
11433{
11434 u32 t, l, b, r;
11435 struct disp_info_s *layer = &glayer_info[1];
11436
11437 t = layer->crop_top;
11438 l = layer->crop_left;
11439 b = layer->crop_bottom;
11440 r = layer->crop_right;
11441 return snprintf(buf, 40, "%d %d %d %d\n", t, l, b, r);
11442}
11443
11444static ssize_t videopip_crop_store(
11445 struct class *cla,
11446 struct class_attribute *attr,
11447 const char *buf, size_t count)
11448{
11449 struct disp_info_s *layer = &glayer_info[1];
11450
11451 mutex_lock(&video_module_mutex);
11452
11453 set_video_crop(layer, buf);
11454
11455 mutex_unlock(&video_module_mutex);
11456
11457 return strnlen(buf, count);
11458}
11459
11460static ssize_t videopip_disable_show(
11461 struct class *cla, struct class_attribute *attr, char *buf)
11462{
11463 return sprintf(buf, "%d\n", disable_videopip);
11464}
11465
11466static ssize_t videopip_disable_store(
11467 struct class *cla,
11468 struct class_attribute *attr,
11469 const char *buf, size_t count)
11470{
11471 int r;
11472 int val;
11473
11474 if (debug_flag & DEBUG_FLAG_BLACKOUT)
11475 pr_info("%s(%s)\n", __func__, buf);
11476
11477 r = kstrtoint(buf, 0, &val);
11478 if (r < 0)
11479 return -EINVAL;
11480
11481 if (_videopip_set_disable(val) < 0)
11482 return -EINVAL;
11483
11484 return count;
11485}
11486
11487static ssize_t videopip_screen_mode_show(
11488 struct class *cla,
11489 struct class_attribute *attr,
11490 char *buf)
11491{
11492 struct disp_info_s *layer = &glayer_info[1];
11493 static const char * const wide_str[] = {
11494 "normal", "full stretch", "4-3", "16-9", "non-linear",
11495 "normal-noscaleup",
11496 "4-3 ignore", "4-3 letter box", "4-3 pan scan", "4-3 combined",
11497 "16-9 ignore", "16-9 letter box", "16-9 pan scan",
11498 "16-9 combined", "Custom AR", "AFD"
11499 };
11500
11501 if (layer->wide_mode < ARRAY_SIZE(wide_str)) {
11502 return sprintf(buf, "%d:%s\n",
11503 layer->wide_mode,
11504 wide_str[layer->wide_mode]);
11505 } else
11506 return 0;
11507}
11508
11509static ssize_t videopip_screen_mode_store(
11510 struct class *cla,
11511 struct class_attribute *attr,
11512 const char *buf, size_t count)
11513{
11514 unsigned long mode;
11515 int ret = 0;
11516 struct disp_info_s *layer = &glayer_info[1];
11517
11518 ret = kstrtoul(buf, 0, (unsigned long *)&mode);
11519 if (ret < 0)
11520 return -EINVAL;
11521
11522 if ((mode < VIDEO_WIDEOPTION_MAX)
11523 && (mode != layer->wide_mode)) {
11524 layer->wide_mode = mode;
11525 pip_property_changed = 1;
11526 }
11527 return count;
11528}
11529
11530static ssize_t videopip_loop_show(
11531 struct class *cla, struct class_attribute *attr, char *buf)
11532{
11533 return sprintf(buf, "%d\n", pip_loop);
11534}
11535
11536static ssize_t videopip_loop_store(
11537 struct class *cla,
11538 struct class_attribute *attr,
11539 const char *buf, size_t count)
11540{
11541 int r;
11542 int val;
11543
11544 r = kstrtoint(buf, 0, &val);
11545 if (r < 0)
11546 return -EINVAL;
11547
11548 pip_loop = val;
11549 return count;
11550}
11551
11552static ssize_t videopip_global_output_show(
11553 struct class *cla,
11554 struct class_attribute *attr,
11555 char *buf)
11556{
11557 return sprintf(buf, "%d\n", pip_global_output);
11558}
11559
11560static ssize_t videopip_global_output_store(
11561 struct class *cla,
11562 struct class_attribute *attr,
11563 const char *buf, size_t count)
11564{
11565 int r;
11566
11567 r = kstrtoint(buf, 0, &pip_global_output);
11568 if (r < 0)
11569 return -EINVAL;
11570
11571 pr_info("%s(%d)\n", __func__, pip_global_output);
11572
11573 return count;
11574}
11575
11576static ssize_t videopip_zorder_show(
11577 struct class *cla,
11578 struct class_attribute *attr,
11579 char *buf)
11580{
11581 struct disp_info_s *layer = &glayer_info[1];
11582
11583 return sprintf(buf, "%d\n", layer->zorder);
11584}
11585
11586static ssize_t videopip_zorder_store(
11587 struct class *cla,
11588 struct class_attribute *attr,
11589 const char *buf, size_t count)
11590{
11591 int zorder;
11592 int ret = 0;
11593 struct disp_info_s *layer = &glayer_info[1];
11594
11595 ret = kstrtoint(buf, 0, &zorder);
11596 if (ret < 0)
11597 return -EINVAL;
11598
11599 if (zorder != layer->zorder) {
11600 layer->zorder = zorder;
11601 pip_property_changed = 1;
11602 }
11603 return count;
11604}
11605
11606static ssize_t videopip_state_show(
11607 struct class *cla,
11608 struct class_attribute *attr,
11609 char *buf)
11610{
11611 ssize_t len = 0;
11612 struct vppfilter_mode_s *vpp_filter = NULL;
11613
11614 if (!curpip_frame_par)
11615 return len;
11616 vpp_filter = &curpip_frame_par->vpp_filter;
11617 len += sprintf(buf + len,
11618 "zoom2_start_x_lines:%u.zoom2_end_x_lines:%u.\n",
11619 zoom2_start_x_lines, zoom2_end_x_lines);
11620 len += sprintf(buf + len,
11621 "zoom2_start_y_lines:%u.zoom2_end_y_lines:%u.\n",
11622 zoom2_start_y_lines, zoom2_end_y_lines);
11623 len += sprintf(buf + len, "frame parameters: pic_in_height %u.\n",
11624 curpip_frame_par->VPP_pic_in_height_);
11625 len += sprintf(buf + len,
11626 "frame parameters: VPP_line_in_length_ %u.\n",
11627 curpip_frame_par->VPP_line_in_length_);
11628 len += sprintf(buf + len, "vscale_skip_count %u.\n",
11629 curpip_frame_par->vscale_skip_count);
11630 len += sprintf(buf + len, "hscale_skip_count %u.\n",
11631 curpip_frame_par->hscale_skip_count);
11632 len += sprintf(buf + len, "supscl_path %u.\n",
11633 curpip_frame_par->supscl_path);
11634 len += sprintf(buf + len, "supsc0_enable %u.\n",
11635 curpip_frame_par->supsc0_enable);
11636 len += sprintf(buf + len, "supsc1_enable %u.\n",
11637 curpip_frame_par->supsc1_enable);
11638 len += sprintf(buf + len, "supsc0_hori_ratio %u.\n",
11639 curpip_frame_par->supsc0_hori_ratio);
11640 len += sprintf(buf + len, "supsc1_hori_ratio %u.\n",
11641 curpip_frame_par->supsc1_hori_ratio);
11642 len += sprintf(buf + len, "supsc0_vert_ratio %u.\n",
11643 curpip_frame_par->supsc0_vert_ratio);
11644 len += sprintf(buf + len, "supsc1_vert_ratio %u.\n",
11645 curpip_frame_par->supsc1_vert_ratio);
11646 len += sprintf(buf + len, "spsc0_h_in %u.\n",
11647 curpip_frame_par->spsc0_h_in);
11648 len += sprintf(buf + len, "spsc1_h_in %u.\n",
11649 curpip_frame_par->spsc1_h_in);
11650 len += sprintf(buf + len, "spsc0_w_in %u.\n",
11651 curpip_frame_par->spsc0_w_in);
11652 len += sprintf(buf + len, "spsc1_w_in %u.\n",
11653 curpip_frame_par->spsc1_w_in);
11654 len += sprintf(buf + len, "video_input_w %u.\n",
11655 curpip_frame_par->video_input_w);
11656 len += sprintf(buf + len, "video_input_h %u.\n",
11657 curpip_frame_par->video_input_h);
11658 len += sprintf(buf + len, "clk_in_pps %u.\n",
11659 curpip_frame_par->clk_in_pps);
11660 len +=
11661 sprintf(buf + len, "hscale phase step 0x%x.\n",
11662 vpp_filter->vpp_hsc_start_phase_step);
11663 len +=
11664 sprintf(buf + len, "vscale phase step 0x%x.\n",
11665 vpp_filter->vpp_vsc_start_phase_step);
11666 len +=
11667 sprintf(buf + len, "pps pre hsc enable %d.\n",
11668 vpp_filter->vpp_pre_hsc_en);
11669 len +=
11670 sprintf(buf + len, "pps pre vsc enable %d.\n",
11671 vpp_filter->vpp_pre_vsc_en);
11672 len +=
11673 sprintf(buf + len, "hscale filter coef %d.\n",
11674 vpp_filter->vpp_horz_filter);
11675 len +=
11676 sprintf(buf + len, "vscale filter coef %d.\n",
11677 vpp_filter->vpp_vert_filter);
11678 len +=
11679 sprintf(buf + len, "vpp_vert_chroma_filter_en %d.\n",
11680 vpp_filter->vpp_vert_chroma_filter_en);
11681 len +=
11682 sprintf(buf + len, "post_blend_vd_h_start 0x%x.\n",
11683 curpip_frame_par->VPP_post_blend_vd_h_start_);
11684 len +=
11685 sprintf(buf + len, "post_blend_vd_h_end 0x%x.\n",
11686 curpip_frame_par->VPP_post_blend_vd_h_end_);
11687 len +=
11688 sprintf(buf + len, "post_blend_vd_v_start 0x%x.\n",
11689 curpip_frame_par->VPP_post_blend_vd_v_start_);
11690 len +=
11691 sprintf(buf + len, "post_blend_vd_v_end 0x%x.\n",
11692 curpip_frame_par->VPP_post_blend_vd_v_end_);
11693 len +=
11694 sprintf(buf + len, "VPP_hd_start_lines_ 0x%x.\n",
11695 curpip_frame_par->VPP_hd_start_lines_);
11696 len +=
11697 sprintf(buf + len, "VPP_hd_end_lines_ 0x%x.\n",
11698 curpip_frame_par->VPP_hd_end_lines_);
11699 len +=
11700 sprintf(buf + len, "VPP_vd_start_lines_ 0x%x.\n",
11701 curpip_frame_par->VPP_vd_start_lines_);
11702 len +=
11703 sprintf(buf + len, "VPP_vd_end_lines_ 0x%x.\n",
11704 curpip_frame_par->VPP_vd_end_lines_);
11705 len +=
11706 sprintf(buf + len, "VPP_hsc_startp 0x%x.\n",
11707 curpip_frame_par->VPP_hsc_startp);
11708 len +=
11709 sprintf(buf + len, "VPP_hsc_endp 0x%x.\n",
11710 curpip_frame_par->VPP_hsc_endp);
11711 len +=
11712 sprintf(buf + len, "VPP_vsc_startp 0x%x.\n",
11713 curpip_frame_par->VPP_vsc_startp);
11714 len +=
11715 sprintf(buf + len, "VPP_vsc_endp 0x%x.\n",
11716 curpip_frame_par->VPP_vsc_endp);
11717 return len;
11718}
11719
11720#endif
11721
11722static struct class_attribute amvideo_class_attrs[] = {
11723 __ATTR(axis,
11724 0664,
11725 video_axis_show,
11726 video_axis_store),
11727 __ATTR(crop,
11728 0644,
11729 video_crop_show,
11730 video_crop_store),
11731 __ATTR(sr,
11732 0644,
11733 video_sr_show,
11734 video_sr_store),
11735 __ATTR(global_offset,
11736 0644,
11737 video_global_offset_show,
11738 video_global_offset_store),
11739 __ATTR(screen_mode,
11740 0664,
11741 video_screen_mode_show,
11742 video_screen_mode_store),
11743 __ATTR(blackout_policy,
11744 0664,
11745 video_blackout_policy_show,
11746 video_blackout_policy_store),
11747 __ATTR(video_seek_flag,
11748 0664,
11749 video_seek_flag_show,
11750 video_seek_flag_store),
11751 __ATTR(disable_video,
11752 0664,
11753 video_disable_show,
11754 video_disable_store),
11755 __ATTR(video_global_output,
11756 0664,
11757 video_global_output_show,
11758 video_global_output_store),
11759 __ATTR(hold_video,
11760 0664,
11761 video_hold_show,
11762 video_hold_store),
11763 __ATTR(zoom,
11764 0664,
11765 video_zoom_show,
11766 video_zoom_store),
11767 __ATTR(brightness,
11768 0644,
11769 video_brightness_show,
11770 video_brightness_store),
11771 __ATTR(contrast,
11772 0644,
11773 video_contrast_show,
11774 video_contrast_store),
11775 __ATTR(vpp_brightness,
11776 0644,
11777 vpp_brightness_show,
11778 vpp_brightness_store),
11779 __ATTR(vpp_contrast,
11780 0644,
11781 vpp_contrast_show,
11782 vpp_contrast_store),
11783 __ATTR(saturation,
11784 0644,
11785 video_saturation_show,
11786 video_saturation_store),
11787 __ATTR(vpp_saturation_hue,
11788 0644,
11789 vpp_saturation_hue_show,
11790 vpp_saturation_hue_store),
11791 __ATTR(test_screen,
11792 0644,
11793 video_test_screen_show,
11794 video_test_screen_store),
11795 __ATTR(rgb_screen,
11796 0644,
11797 video_rgb_screen_show,
11798 video_rgb_screen_store),
11799 __ATTR(file_name,
11800 0644,
11801 video_filename_show,
11802 video_filename_store),
11803 __ATTR(debugflags,
11804 0644,
11805 video_debugflags_show,
11806 video_debugflags_store),
11807 __ATTR(trickmode_duration,
11808 0644,
11809 trickmode_duration_show,
11810 trickmode_duration_store),
11811 __ATTR(nonlinear_factor,
11812 0644,
11813 video_nonlinear_factor_show,
11814 video_nonlinear_factor_store),
11815 __ATTR(freerun_mode,
11816 0644,
11817 video_freerun_mode_show,
11818 video_freerun_mode_store),
11819 __ATTR(video_speed_check_h_w,
11820 0644,
11821 video_speed_check_show,
11822 video_speed_check_store),
11823 __ATTR(threedim_mode,
11824 0644,
11825 threedim_mode_show,
11826 threedim_mode_store),
11827 __ATTR(vsync_pts_inc_upint,
11828 0644,
11829 video_vsync_pts_inc_upint_show,
11830 video_vsync_pts_inc_upint_store),
11831 __ATTR(vsync_slow_factor,
11832 0644,
11833 video_vsync_slow_factor_show,
11834 video_vsync_slow_factor_store),
11835 __ATTR(angle,
11836 0644,
11837 video_angle_show,
11838 video_angle_store),
11839 __ATTR(stereo_scaler,
11840 0644, NULL,
11841 video_3d_scale_store),
11842 __ATTR(show_first_frame_nosync,
11843 0644,
11844 show_first_frame_nosync_show,
11845 show_first_frame_nosync_store),
11846 __ATTR(show_first_picture,
11847 0664, NULL,
11848 show_first_picture_store),
11849 __ATTR(slowsync_repeat_enable,
11850 0644,
11851 slowsync_repeat_enable_show,
11852 slowsync_repeat_enable_store),
11853 __ATTR(free_keep_buffer,
11854 0664, NULL,
11855 video_free_keep_buffer_store),
11856 __ATTR(free_cma_buffer,
11857 0664, NULL,
11858 free_cma_buffer_store),
11859#ifdef CONFIG_AM_VOUT
11860 __ATTR_RO(device_resolution),
11861#endif
11862#ifdef PTS_TRACE_DEBUG
11863 __ATTR_RO(pts_trace),
11864#endif
11865 __ATTR(video_inuse,
11866 0664,
11867 video_inuse_show,
11868 video_inuse_store),
11869 __ATTR(video_zorder,
11870 0664,
11871 video_zorder_show,
11872 video_zorder_store),
11873 __ATTR_RO(frame_addr),
11874 __ATTR_RO(frame_canvas_width),
11875 __ATTR_RO(frame_canvas_height),
11876 __ATTR_RO(frame_width),
11877 __ATTR_RO(frame_height),
11878 __ATTR_RO(frame_format),
11879 __ATTR_RO(frame_aspect_ratio),
11880 __ATTR_RO(frame_rate),
11881 __ATTR_RO(vframe_states),
11882 __ATTR_RO(video_state),
11883 __ATTR_RO(fps_info),
11884 __ATTR_RO(video_layer1_state),
11885 __ATTR_RO(pic_mode_info),
11886#ifdef VIDEO_PIP
11887 __ATTR(axis_pip,
11888 0664,
11889 videopip_axis_show,
11890 videopip_axis_store),
11891 __ATTR(crop_pip,
11892 0664,
11893 videopip_crop_show,
11894 videopip_crop_store),
11895 __ATTR(disable_videopip,
11896 0664,
11897 videopip_disable_show,
11898 videopip_disable_store),
11899 __ATTR(screen_mode_pip,
11900 0664,
11901 videopip_screen_mode_show,
11902 videopip_screen_mode_store),
11903 __ATTR(videopip_loop,
11904 0664,
11905 videopip_loop_show,
11906 videopip_loop_store),
11907 __ATTR(pip_global_output,
11908 0664,
11909 videopip_global_output_show,
11910 videopip_global_output_store),
11911 __ATTR(videopip_zorder,
11912 0664,
11913 videopip_zorder_show,
11914 videopip_zorder_store),
11915 __ATTR_RO(videopip_state),
11916#endif
11917 __ATTR_NULL
11918};
11919
11920static struct class_attribute amvideo_poll_class_attrs[] = {
11921 __ATTR_RO(frame_width),
11922 __ATTR_RO(frame_height),
11923 __ATTR_RO(vframe_states),
11924 __ATTR_RO(video_state),
11925 __ATTR_NULL
11926};
11927
11928#ifdef CONFIG_PM
11929static int amvideo_class_suspend(struct device *dev, pm_message_t state)
11930{
11931#if 0
11932
11933 pm_state.event = state.event;
11934
11935 if (state.event == PM_EVENT_SUSPEND) {
11936 pm_state.vpp_misc =
11937 READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off);
11938
11939 DisableVideoLayer_NoDelay();
11940
11941 msleep(50);
11942 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
11943 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8)
11944 && !is_meson_mtvd_cpu()) {
11945 vpu_delay_work_flag = 0;
11946 }
11947 /* #endif */
11948
11949 }
11950#endif
11951 return 0;
11952}
11953
11954static int amvideo_class_resume(struct device *dev)
11955{
11956#if 0
11957#define VPP_MISC_VIDEO_BITS_MASK \
11958 ((VPP_VD2_ALPHA_MASK << VPP_VD2_ALPHA_BIT) | \
11959 VPP_VD2_PREBLEND | VPP_VD1_PREBLEND |\
11960 VPP_VD2_POSTBLEND | VPP_VD1_POSTBLEND | VPP_POSTBLEND_EN)\
11961
11962 if (pm_state.event == PM_EVENT_SUSPEND) {
11963 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
11964 if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8)
11965 && !is_meson_mtvd_cpu()) {
11966 switch_vpu_mem_pd_vmod(VPU_VIU_VD1,
11967 pm_state.mem_pd_vd1);
11968 switch_vpu_mem_pd_vmod(VPU_VIU_VD2,
11969 pm_state.mem_pd_vd2);
11970 switch_vpu_mem_pd_vmod(VPU_DI_POST,
11971 pm_state.mem_pd_di_post);
11972 }
11973 /* #endif */
11974 WRITE_VCBUS_REG(VPP_MISC + cur_dev->vpp_off,
11975 (READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off) &
11976 (~VPP_MISC_VIDEO_BITS_MASK)) |
11977 (pm_state.vpp_misc & VPP_MISC_VIDEO_BITS_MASK));
11978 WRITE_VCBUS_REG(VPP_MISC +
11979 cur_dev->vpp_off, pm_state.vpp_misc);
11980
11981 pm_state.event = -1;
11982 if (debug_flag & DEBUG_FLAG_BLACKOUT) {
11983 pr_info("%s write(VPP_MISC,%x)\n", __func__,
11984 pm_state.vpp_misc);
11985 }
11986 }
11987#ifdef CONFIG_SCREEN_ON_EARLY
11988 if (power_key_pressed) {
11989 vout_pll_resume_early();
11990 osd_resume_early();
11991 resume_vout_early();
11992 power_key_pressed = 0;
11993 }
11994#endif
11995#endif
11996 return 0;
11997}
11998#endif
11999
12000static struct class amvideo_class = {
12001 .name = AMVIDEO_CLASS_NAME,
12002 .class_attrs = amvideo_class_attrs,
12003#ifdef CONFIG_PM
12004 .suspend = amvideo_class_suspend,
12005 .resume = amvideo_class_resume,
12006#endif
12007};
12008
12009static struct class amvideo_poll_class = {
12010 .name = AMVIDEO_POLL_CLASS_NAME,
12011 .class_attrs = amvideo_poll_class_attrs,
12012};
12013
12014#ifdef TV_REVERSE
12015static int __init vpp_axis_reverse(char *str)
12016{
12017 unsigned char *ptr = str;
12018
12019 pr_info("%s: bootargs is %s\n", __func__, str);
12020 if (strstr(ptr, "1"))
12021 reverse = true;
12022 else
12023 reverse = false;
12024
12025 return 0;
12026}
12027
12028__setup("video_reverse=", vpp_axis_reverse);
12029#endif
12030
12031struct vframe_s *get_cur_dispbuf(void)
12032{
12033 return cur_dispbuf;
12034}
12035
12036#ifdef CONFIG_AM_VOUT
12037int vout_notify_callback(struct notifier_block *block, unsigned long cmd,
12038 void *para)
12039{
12040 const struct vinfo_s *info;
12041 ulong flags;
12042
12043#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12044 if (cur_dev != &video_dev[0])
12045 return 0;
12046#endif
12047 switch (cmd) {
12048 case VOUT_EVENT_MODE_CHANGE:
12049 info = get_current_vinfo();
12050 spin_lock_irqsave(&lock, flags);
12051 vinfo = info;
12052 /* pre-calculate vsync_pts_inc in 90k unit */
12053 vsync_pts_inc = 90000 * vinfo->sync_duration_den /
12054 vinfo->sync_duration_num;
12055 vsync_pts_inc_scale = vinfo->sync_duration_den;
12056 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
12057 spin_unlock_irqrestore(&lock, flags);
12058 new_vmode = vinfo->mode;
12059 break;
12060 case VOUT_EVENT_OSD_PREBLEND_ENABLE:
12061 break;
12062 case VOUT_EVENT_OSD_DISP_AXIS:
12063 break;
12064 }
12065 return 0;
12066}
12067
12068#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12069int vout2_notify_callback(struct notifier_block *block, unsigned long cmd,
12070 void *para)
12071{
12072 const struct vinfo_s *info;
12073 ulong flags;
12074
12075 if (cur_dev != &video_dev[1])
12076 return 0;
12077
12078 switch (cmd) {
12079 case VOUT_EVENT_MODE_CHANGE:
12080 info = get_current_vinfo2();
12081 spin_lock_irqsave(&lock, flags);
12082 vinfo = info;
12083 /* pre-calculate vsync_pts_inc in 90k unit */
12084 vsync_pts_inc = 90000 * vinfo->sync_duration_den /
12085 vinfo->sync_duration_num;
12086 vsync_pts_inc_scale = vinfo->sync_duration_den;
12087 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
12088 spin_unlock_irqrestore(&lock, flags);
12089 break;
12090 case VOUT_EVENT_OSD_PREBLEND_ENABLE:
12091 break;
12092 case VOUT_EVENT_OSD_DISP_AXIS:
12093 break;
12094 }
12095 return 0;
12096}
12097#endif
12098
12099
12100static struct notifier_block vout_notifier = {
12101 .notifier_call = vout_notify_callback,
12102};
12103
12104#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12105static struct notifier_block vout2_notifier = {
12106 .notifier_call = vout2_notify_callback,
12107};
12108#endif
12109
12110
12111static void vout_hook(void)
12112{
12113 vout_register_client(&vout_notifier);
12114
12115#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12116 vout2_register_client(&vout2_notifier);
12117#endif
12118
12119 vinfo = get_current_vinfo();
12120
12121 if (!vinfo) {
12122#if DEBUG_TMP
12123 set_current_vmode(VMODE_720P);
12124#endif
12125 vinfo = get_current_vinfo();
12126 }
12127
12128 if (vinfo) {
12129 vsync_pts_inc = 90000 * vinfo->sync_duration_den /
12130 vinfo->sync_duration_num;
12131 vsync_pts_inc_scale = vinfo->sync_duration_den;
12132 vsync_pts_inc_scale_base = vinfo->sync_duration_num;
12133 old_vmode = new_vmode = vinfo->mode;
12134 }
12135#ifdef CONFIG_AM_VIDEO_LOG
12136 if (vinfo) {
12137 amlog_mask(LOG_MASK_VINFO, "vinfo = %p\n", vinfo);
12138 amlog_mask(LOG_MASK_VINFO, "display platform %s:\n",
12139 vinfo->name);
12140 amlog_mask(LOG_MASK_VINFO, "\tresolution %d x %d\n",
12141 vinfo->width, vinfo->height);
12142 amlog_mask(LOG_MASK_VINFO, "\taspect ratio %d : %d\n",
12143 vinfo->aspect_ratio_num, vinfo->aspect_ratio_den);
12144 amlog_mask(LOG_MASK_VINFO, "\tsync duration %d : %d\n",
12145 vinfo->sync_duration_num, vinfo->sync_duration_den);
12146 }
12147#endif
12148}
12149#endif
12150
12151static int amvideo_notify_callback(
12152 struct notifier_block *block,
12153 unsigned long cmd,
12154 void *para)
12155{
12156 u32 *p, val;
12157
12158 switch (cmd) {
12159 case AMVIDEO_UPDATE_OSD_MODE:
12160 p = (u32 *)para;
12161 if (!update_osd_vpp_misc)
12162 osd_vpp_misc_mask = p[1];
12163 val = osd_vpp_misc
12164 & (~osd_vpp_misc_mask);
12165 val |= (p[0] & osd_vpp_misc_mask);
12166 osd_vpp_misc = val;
12167 if (!update_osd_vpp_misc)
12168 update_osd_vpp_misc = true;
12169 break;
12170 default:
12171 break;
12172 }
12173 return 0;
12174}
12175
12176static struct notifier_block amvideo_notifier = {
12177 .notifier_call = amvideo_notify_callback,
12178};
12179
12180static RAW_NOTIFIER_HEAD(amvideo_notifier_list);
12181int amvideo_register_client(struct notifier_block *nb)
12182{
12183 return raw_notifier_chain_register(&amvideo_notifier_list, nb);
12184}
12185EXPORT_SYMBOL(amvideo_register_client);
12186
12187int amvideo_unregister_client(struct notifier_block *nb)
12188{
12189 return raw_notifier_chain_unregister(&amvideo_notifier_list, nb);
12190}
12191EXPORT_SYMBOL(amvideo_unregister_client);
12192
12193int amvideo_notifier_call_chain(unsigned long val, void *v)
12194{
12195 return raw_notifier_call_chain(&amvideo_notifier_list, val, v);
12196}
12197EXPORT_SYMBOL_GPL(amvideo_notifier_call_chain);
12198
12199#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
12200
12201static void do_vpu_delay_work(struct work_struct *work)
12202{
12203 unsigned long flags;
12204 unsigned int r;
12205
12206#if DEBUG_TMP
12207 if (vpu_delay_work_flag & VPU_VIDEO_LAYER1_CHANGED) {
12208 vpu_delay_work_flag &= ~VPU_VIDEO_LAYER1_CHANGED;
12209
12210 switch_set_state(&video1_state_sdev, !!video_enabled);
12211 }
12212#endif
12213 spin_lock_irqsave(&delay_work_lock, flags);
12214
12215 if (vpu_delay_work_flag & VPU_DELAYWORK_VPU_CLK) {
12216 vpu_delay_work_flag &= ~VPU_DELAYWORK_VPU_CLK;
12217
12218 spin_unlock_irqrestore(&delay_work_lock, flags);
12219
12220 if (vpu_clk_level > 0)
12221 request_vpu_clk_vmod(360000000, VPU_VIU_VD1);
12222 else
12223 release_vpu_clk_vmod(VPU_VIU_VD1);
12224
12225 spin_lock_irqsave(&delay_work_lock, flags);
12226 }
12227
12228 r = READ_VCBUS_REG(VPP_MISC + cur_dev->vpp_off);
12229
12230 if (vpu_mem_power_off_count > 0) {
12231 vpu_mem_power_off_count--;
12232
12233 if (vpu_mem_power_off_count == 0) {
12234 if ((vpu_delay_work_flag &
12235 VPU_DELAYWORK_MEM_POWER_OFF_VD1)
12236 && ((r & VPP_VD1_PREBLEND) == 0)) {
12237 vpu_delay_work_flag &=
12238 ~VPU_DELAYWORK_MEM_POWER_OFF_VD1;
12239
12240 switch_vpu_mem_pd_vmod(
12241 VPU_VIU_VD1,
12242 VPU_MEM_POWER_DOWN);
12243 switch_vpu_mem_pd_vmod(
12244 VPU_AFBC_DEC,
12245 VPU_MEM_POWER_DOWN);
12246 switch_vpu_mem_pd_vmod(
12247 VPU_DI_POST,
12248 VPU_MEM_POWER_DOWN);
12249 if (!legacy_vpp)
12250 switch_vpu_mem_pd_vmod(
12251 VPU_VD1_SCALE,
12252 VPU_MEM_POWER_DOWN);
12253 }
12254
12255 if ((vpu_delay_work_flag &
12256 VPU_DELAYWORK_MEM_POWER_OFF_VD2)
12257 && ((r & VPP_VD2_PREBLEND) == 0)) {
12258 vpu_delay_work_flag &=
12259 ~VPU_DELAYWORK_MEM_POWER_OFF_VD2;
12260
12261 switch_vpu_mem_pd_vmod(
12262 VPU_VIU_VD2,
12263 VPU_MEM_POWER_DOWN);
12264 switch_vpu_mem_pd_vmod(
12265 VPU_AFBC_DEC1,
12266 VPU_MEM_POWER_DOWN);
12267 if (!legacy_vpp)
12268 switch_vpu_mem_pd_vmod(
12269 VPU_VD2_SCALE,
12270 VPU_MEM_POWER_DOWN);
12271 }
12272
12273 if ((vpu_delay_work_flag &
12274 VPU_DELAYWORK_MEM_POWER_OFF_PROT)
12275 && ((r & VPP_VD1_PREBLEND) == 0)) {
12276 vpu_delay_work_flag &=
12277 ~VPU_DELAYWORK_MEM_POWER_OFF_PROT;
12278 }
12279 }
12280 }
12281
12282 spin_unlock_irqrestore(&delay_work_lock, flags);
12283}
12284#endif
12285
12286/*********************************************************/
12287struct device *get_video_device(void)
12288{
12289 return amvideo_dev;
12290}
12291
12292static int __init video_early_init(void)
12293{
12294 /* todo: move this to clock tree, enable VPU clock */
12295 /* WRITE_CBUS_REG(HHI_VPU_CLK_CNTL,*/
12296 /*(1<<9) | (1<<8) | (3)); // fclk_div3/4 = ~200M */
12297 /* WRITE_CBUS_REG(HHI_VPU_CLK_CNTL,*/
12298 /*(3<<9) | (1<<8) | (0)); // fclk_div7/1 = 364M*/
12299 /*moved to vpu.c, default config by dts */
12300
12301 u32 cur_hold_line;
12302
12303 if (!legacy_vpp) {
12304 WRITE_VCBUS_REG_BITS(VPP_OFIFO_SIZE, 0x1000,
12305 VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID);
12306 WRITE_VCBUS_REG_BITS(
12307 VPP_MATRIX_CTRL, 0, 10, 5);
12308 } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXTVBB))
12309 WRITE_VCBUS_REG_BITS(VPP_OFIFO_SIZE, 0xfff,
12310 VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID);
12311
12312 WRITE_VCBUS_REG(VPP_PREBLEND_VD1_H_START_END, 4096);
12313 WRITE_VCBUS_REG(VPP_BLEND_VD2_H_START_END, 4096);
12314
12315 if (is_meson_txl_cpu() || is_meson_txlx_cpu()) {
12316 /* fifo max size on txl :128*3=384[0x180] */
12317 WRITE_VCBUS_REG(
12318 VD1_IF0_LUMA_FIFO_SIZE + cur_dev->viu_off, 0x180);
12319 WRITE_VCBUS_REG(
12320 VD2_IF0_LUMA_FIFO_SIZE + cur_dev->viu_off, 0x180);
12321 }
12322
12323#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12324 WRITE_VCBUS_REG_BITS(VPP2_OFIFO_SIZE, 0x800,
12325 VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID);
12326 /*
12327 *WRITE_VCBUS_REG_BITS(VPU_OSD3_MMC_CTRL, 1, 12, 2);
12328 *select vdisp_mmc_arb for VIU2_OSD1 request
12329 */
12330 WRITE_VCBUS_REG_BITS(VPU_OSD3_MMC_CTRL, 2, 12, 2);
12331 /* select vdin_mmc_arb for VIU2_OSD1 request */
12332#endif
12333 /* default 10bit setting for gxm */
12334 if (is_meson_gxm_cpu()) {
12335 WRITE_VCBUS_REG_BITS(VIU_MISC_CTRL1, 0xff, 16, 8);
12336 WRITE_VCBUS_REG(VPP_DOLBY_CTRL, 0x22000);
12337 /*
12338 *default setting is black for dummy data1& dumy data0,
12339 *for dummy data1 the y/cb/cr data width is 10bit on gxm,
12340 *for dummy data the y/cb/cr data width is 8bit but
12341 *vpp_dummy_data will be left shift 2bit auto on gxm!!!
12342 */
12343 WRITE_VCBUS_REG(VPP_DUMMY_DATA1, 0x1020080);
12344 WRITE_VCBUS_REG(VPP_DUMMY_DATA, 0x42020);
12345 } else if (is_meson_txlx_cpu() ||
12346 cpu_after_eq(MESON_CPU_MAJOR_ID_G12A)) {
12347 /*black 10bit*/
12348 WRITE_VCBUS_REG(VPP_DUMMY_DATA, 0x4080200);
12349 }
12350 /* temp: enable VPU arb mem */
12351 if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB)
12352 switch_vpu_mem_pd_vmod(VPU_VPU_ARB, VPU_MEM_POWER_ON);
12353
12354 /*disable sr default when power up*/
12355 WRITE_VCBUS_REG(VPP_SRSHARP0_CTRL, 0);
12356 WRITE_VCBUS_REG(VPP_SRSHARP1_CTRL, 0);
12357
12358 cur_hold_line = READ_VCBUS_REG(VPP_HOLD_LINES + cur_dev->vpp_off);
12359 cur_hold_line = cur_hold_line & 0xff;
12360
12361 if (cur_hold_line > 0x1f)
12362 vpp_hold_line = 0x1f;
12363 else
12364 vpp_hold_line = cur_hold_line;
12365
12366 /* Temp force set dmc */
12367 if (!legacy_vpp) {
12368 WRITE_DMCREG(
12369 DMC_AM0_CHAN_CTRL,
12370 0x8ff403cf);
12371 /* for vd1 & vd2 dummy alpha*/
12372 WRITE_VCBUS_REG(
12373 VPP_POST_BLEND_DUMMY_ALPHA,
12374 0x7fffffff);
12375 WRITE_VCBUS_REG_BITS(
12376 VPP_MISC1, 0x100, 0, 9);
12377 }
12378 if (is_meson_tl1_cpu()) {
12379 /* force bypass dolby for TL1, no dolby function */
12380 WRITE_VCBUS_REG_BITS(
12381 DOLBY_PATH_CTRL, 0xf, 0, 6);
12382 /* disable latch for sr core0/1 scaler */
12383 WRITE_VCBUS_REG_BITS(
12384 SRSHARP0_SHARP_SYNC_CTRL, 1, 0, 1);
12385 WRITE_VCBUS_REG_BITS(
12386 SRSHARP1_SHARP_SYNC_CTRL, 1, 8, 1);
12387 }
12388 if (is_meson_g12b_cpu())
12389 WRITE_VCBUS_REG_BITS(
12390 SRSHARP0_SHARP_SYNC_CTRL, 1, 0, 1);
12391 return 0;
12392}
12393
12394static struct mconfig video_configs[] = {
12395 MC_PI32("pause_one_3d_fl_frame", &pause_one_3d_fl_frame),
12396 MC_PI32("debug_flag", &debug_flag),
12397 MC_PU32("force_3d_scaler", &force_3d_scaler),
12398 MC_PU32("video_3d_format", &video_3d_format),
12399 MC_PI32("vsync_enter_line_max", &vsync_enter_line_max),
12400 MC_PI32("vsync_exit_line_max", &vsync_exit_line_max),
12401#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
12402 MC_PI32("vsync_rdma_line_max", &vsync_rdma_line_max),
12403#endif
12404 MC_PU32("underflow", &underflow),
12405 MC_PU32("next_peek_underflow", &next_peek_underflow),
12406 MC_PU32("smooth_sync_enable", &smooth_sync_enable),
12407 MC_PU32("hdmi_in_onvideo", &hdmi_in_onvideo),
12408#ifdef CONFIG_AM_VIDEO2
12409 MC_PI32("video_play_clone_rate", &video_play_clone_rate),
12410 MC_PI32("android_clone_rate", &android_clone_rate),
12411 MC_PI32("video_play_clone_rate", &video_play_clone_rate),
12412 MC_PI32("android_clone_rate", &android_clone_rate),
12413 MC_PI32("noneseamless_play_clone_rate", &noneseamless_play_clone_rate),
12414#endif
12415 MC_PU32("smooth_sync_enable", &smooth_sync_enable),
12416 MC_PU32("hdmi_in_onvideo", &hdmi_in_onvideo),
12417 MC_PI32("cur_dev_idx", &cur_dev_idx),
12418 MC_PU32("new_frame_count", &new_frame_count),
12419 MC_PU32("omx_pts", &omx_pts),
12420 MC_PU32("omx_pts_set_index", &omx_pts_set_index),
12421 MC_PBOOL("omx_run", &omx_run),
12422 MC_PU32("omx_version", &omx_version),
12423 MC_PU32("omx_info", &omx_info),
12424 MC_PI32("omx_need_drop_frame_num", &omx_need_drop_frame_num),
12425 MC_PBOOL("omx_drop_done", &omx_drop_done),
12426 MC_PI32("omx_pts_interval_upper", &omx_pts_interval_upper),
12427 MC_PI32("omx_pts_interval_lower", &omx_pts_interval_lower),
12428 MC_PBOOL("bypass_pps", &bypass_pps),
12429 MC_PBOOL("platform_type", &platform_type),
12430 MC_PU32("process_3d_type", &process_3d_type),
12431 MC_PU32("omx_pts", &omx_pts),
12432 MC_PU32("framepacking_support", &framepacking_support),
12433 MC_PU32("framepacking_width", &framepacking_width),
12434 MC_PU32("framepacking_height", &framepacking_height),
12435 MC_PU32("framepacking_blank", &framepacking_blank),
12436 MC_PU32("video_seek_flag", &video_seek_flag),
12437 MC_PU32("slowsync_repeat_enable", &slowsync_repeat_enable),
12438 MC_PU32("toggle_count", &toggle_count),
12439 MC_PBOOL("show_first_frame_nosync", &show_first_frame_nosync),
12440#ifdef TV_REVERSE
12441 MC_PBOOL("reverse", &reverse),
12442#endif
12443};
12444
12445#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
12446static void video_early_suspend(struct early_suspend *h)
12447{
12448 DisableVideoLayer();
12449 DisableVideoLayer2();
12450 pr_info("video_early_suspend ok\n");
12451}
12452
12453static void video_late_resume(struct early_suspend *h)
12454{
12455 pr_info("video_late_resume ok\n");
12456};
12457
12458static struct early_suspend video_early_suspend_handler = {
12459 .suspend = video_early_suspend,
12460 .resume = video_late_resume,
12461};
12462#endif
12463
12464static int amvideom_probe(struct platform_device *pdev)
12465{
12466 int ret = 0;
12467
12468 video_early_init();
12469
12470 DisableVideoLayer();
12471 DisableVideoLayer2();
12472
12473 /* get interrupt resource */
12474 video_vsync = platform_get_irq_byname(pdev, "vsync");
12475 if (video_vsync == -ENXIO) {
12476 pr_info("cannot get amvideom irq resource\n");
12477
12478 return video_vsync;
12479 }
12480
12481 pr_info("amvideom vsync irq: %d\n", video_vsync);
12482
12483#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
12484 register_early_suspend(&video_early_suspend_handler);
12485#endif
12486 return ret;
12487}
12488
12489static int amvideom_remove(struct platform_device *pdev)
12490{
12491#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
12492 unregister_early_suspend(&video_early_suspend_handler);
12493#endif
12494 return 0;
12495}
12496
12497static const struct of_device_id amlogic_amvideom_dt_match[] = {
12498 {
12499 .compatible = "amlogic, amvideom",
12500 },
12501 {},
12502};
12503
12504static struct platform_driver amvideom_driver = {
12505 .probe = amvideom_probe,
12506 .remove = amvideom_remove,
12507 .driver = {
12508 .name = "amvideom",
12509 .of_match_table = amlogic_amvideom_dt_match,
12510 }
12511};
12512
12513static int __init video_init(void)
12514{
12515 int r = 0, i;
12516 /*
12517 *#ifdef CONFIG_ARCH_MESON1
12518 *ulong clk = clk_get_rate(clk_get_sys("clk_other_pll", NULL));
12519 *#elif !defined(CONFIG_ARCH_MESON3) && !defined(CONFIG_ARCH_MESON6)
12520 *ulong clk = clk_get_rate(clk_get_sys("clk_misc_pll", NULL));
12521 *#endif
12522 */
12523
12524#ifdef CONFIG_ARCH_MESON1
12525 no to here ulong clk =
12526 clk_get_rate(clk_get_sys("clk_other_pll", NULL));
12527#elif defined(CONFIG_ARCH_MESON2)
12528 not to here ulong clk =
12529 clk_get_rate(clk_get_sys("clk_misc_pll", NULL));
12530#endif
12531 /* #if !defined(CONFIG_ARCH_MESON3) && !defined(CONFIG_ARCH_MESON6) */
12532#if 0 /* MESON_CPU_TYPE <= MESON_CPU_TYPE_MESON2 */
12533 /* MALI clock settings */
12534 if ((clk <= 750000000) && (clk >= 600000000)) {
12535 WRITE_VCBUS_REG(HHI_MALI_CLK_CNTL,
12536 (2 << 9) | /* select misc pll as clock source */
12537 (1 << 8) | /* enable clock gating */
12538 (2 << 0)); /* Misc clk / 3 */
12539 } else {
12540 WRITE_VCBUS_REG(HHI_MALI_CLK_CNTL,
12541 (3 << 9) | /* select DDR clock as clock source */
12542 (1 << 8) | /* enable clock gating */
12543 (1 << 0)); /* DDR clk / 2 */
12544 }
12545#endif
12546
12547 if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
12548 || is_meson_tl1_cpu()) {
12549 cur_dev->viu_off = 0x3200 - 0x1a50;
12550 legacy_vpp = false;
12551 }
12552 if (platform_driver_register(&amvideom_driver)) {
12553 pr_info("failed to amvideom driver!\n");
12554 return -ENODEV;
12555 }
12556
12557 /* check super scaler support status */
12558 vpp_super_scaler_support();
12559 /* adaptive config bypass ratio */
12560 vpp_bypass_ratio_config();
12561
12562#ifndef CONFIG_AM_VIDEO2
12563 /*DisableVPP2VideoLayer();*/
12564#endif
12565
12566 cur_dispbuf = NULL;
12567 cur_dispbuf2 = NULL;
12568 amvideo_register_client(&amvideo_notifier);
12569
12570#ifdef FIQ_VSYNC
12571 /* enable fiq bridge */
12572 vsync_fiq_bridge.handle = vsync_bridge_isr;
12573 vsync_fiq_bridge.key = (u32) vsync_bridge_isr;
12574 vsync_fiq_bridge.name = "vsync_bridge_isr";
12575
12576 r = register_fiq_bridge_handle(&vsync_fiq_bridge);
12577
12578 if (r) {
12579 amlog_level(LOG_LEVEL_ERROR,
12580 "video fiq bridge register error.\n");
12581 r = -ENOENT;
12582 goto err0;
12583 }
12584#endif
12585
12586 /* sysfs node creation */
12587 r = class_register(&amvideo_poll_class);
12588 if (r) {
12589 amlog_level(LOG_LEVEL_ERROR, "create video_poll class fail.\n");
12590#ifdef FIQ_VSYNC
12591 free_irq(BRIDGE_IRQ, (void *)video_dev_id);
12592#else
12593 free_irq(INT_VIU_VSYNC, (void *)video_dev_id);
12594#endif
12595 goto err1;
12596 }
12597
12598 r = class_register(&amvideo_class);
12599 if (r) {
12600 amlog_level(LOG_LEVEL_ERROR, "create video class fail.\n");
12601#ifdef FIQ_VSYNC
12602 free_irq(BRIDGE_IRQ, (void *)video_dev_id);
12603#else
12604 free_irq(INT_VIU_VSYNC, (void *)video_dev_id);
12605#endif
12606 goto err1;
12607 }
12608
12609 /* create video device */
12610 r = register_chrdev(AMVIDEO_MAJOR, "amvideo", &amvideo_fops);
12611 if (r < 0) {
12612 amlog_level(LOG_LEVEL_ERROR,
12613 "Can't register major for amvideo device\n");
12614 goto err2;
12615 }
12616
12617 r = register_chrdev(0, "amvideo_poll", &amvideo_poll_fops);
12618 if (r < 0) {
12619 amlog_level(LOG_LEVEL_ERROR,
12620 "Can't register major for amvideo_poll device\n");
12621 goto err3;
12622 }
12623
12624 amvideo_poll_major = r;
12625
12626 amvideo_dev = device_create(&amvideo_class, NULL,
12627 MKDEV(AMVIDEO_MAJOR, 0), NULL, DEVICE_NAME);
12628
12629 if (IS_ERR(amvideo_dev)) {
12630 amlog_level(LOG_LEVEL_ERROR, "Can't create amvideo device\n");
12631 goto err4;
12632 }
12633
12634 amvideo_poll_dev = device_create(&amvideo_poll_class, NULL,
12635 MKDEV(amvideo_poll_major, 0), NULL, "amvideo_poll");
12636
12637 if (IS_ERR(amvideo_poll_dev)) {
12638 amlog_level(LOG_LEVEL_ERROR,
12639 "Can't create amvideo_poll device\n");
12640 goto err5;
12641 }
12642
12643 /* make vd1 below vd2 */
12644 for (i = 0; i < MAX_VD_LAYERS; i++) {
12645 vpp_disp_info_init(&glayer_info[i], i);
12646 glayer_info[i].wide_mode = 1;
12647 glayer_info[i].zorder = reference_zorder - 2 + i;
12648 glayer_info[i].cur_sel_port = i;
12649 glayer_info[i].last_sel_port = i;
12650 }
12651
12652 if (legacy_vpp)
12653 layer_cap =
12654 LAYER1_AFBC |
12655 LAYER1_AVAIL |
12656 LAYER0_AFBC |
12657 LAYER0_SCALER |
12658 LAYER0_AVAIL;
12659 else if (is_meson_tl1_cpu())
12660 layer_cap =
12661 LAYER1_AVAIL |
12662 LAYER0_AFBC |
12663 LAYER0_SCALER |
12664 LAYER0_AVAIL;
12665 else
12666 layer_cap =
12667 LAYER1_AFBC |
12668 LAYER1_SCALER |
12669 LAYER1_AVAIL |
12670 LAYER0_AFBC |
12671 LAYER0_SCALER |
12672 LAYER0_AVAIL;
12673
12674 init_waitqueue_head(&amvideo_trick_wait);
12675 init_waitqueue_head(&amvideo_sizechange_wait);
12676#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
12677 INIT_WORK(&vpu_delay_work, do_vpu_delay_work);
12678#endif
12679
12680#ifdef CONFIG_AM_VOUT
12681 vout_hook();
12682#endif
12683
12684#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
12685 dispbuf_to_put_num = DISPBUF_TO_PUT_MAX;
12686 while (dispbuf_to_put_num > 0) {
12687 dispbuf_to_put_num--;
12688 dispbuf_to_put[dispbuf_to_put_num] = NULL;
12689 }
12690
12691 disp_canvas[0][0] =
12692 (disp_canvas_index[0][2] << 16) | (disp_canvas_index[0][1] << 8) |
12693 disp_canvas_index[0][0];
12694 disp_canvas[0][1] =
12695 (disp_canvas_index[0][5] << 16) | (disp_canvas_index[0][4] << 8) |
12696 disp_canvas_index[0][3];
12697
12698 disp_canvas[1][0] =
12699 (disp_canvas_index[1][2] << 16) | (disp_canvas_index[1][1] << 8) |
12700 disp_canvas_index[1][0];
12701 disp_canvas[1][1] =
12702 (disp_canvas_index[1][5] << 16) | (disp_canvas_index[1][4] << 8) |
12703 disp_canvas_index[1][3];
12704#else
12705
12706 disp_canvas[0] =
12707 (disp_canvas_index[2] << 16) | (disp_canvas_index[1] << 8) |
12708 disp_canvas_index[0];
12709 disp_canvas[1] =
12710 (disp_canvas_index[5] << 16) | (disp_canvas_index[4] << 8) |
12711 disp_canvas_index[3];
12712#endif
12713
12714 vsync_fiq_up();
12715#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12716 vsync2_fiq_up();
12717#endif
12718
12719 vf_receiver_init(&video_vf_recv, RECEIVER_NAME, &video_vf_receiver,
12720 NULL);
12721 vf_reg_receiver(&video_vf_recv);
12722
12723#ifdef VIDEO_PIP
12724 vf_receiver_init(
12725 &videopip_vf_recv, RECEIVERPIP_NAME,
12726 &videopip_vf_receiver, NULL);
12727 vf_reg_receiver(&videopip_vf_recv);
12728#endif
12729
12730#if DEBUG_TMP
12731 switch_dev_register(&video1_state_sdev);
12732 switch_set_state(&video1_state_sdev, 0);
12733#endif
12734 video_keeper_init();
12735#ifdef CONFIG_AM_VIDEO2
12736 set_clone_frame_rate(android_clone_rate, 0);
12737#endif
12738 REG_PATH_CONFIGS("media.video", video_configs);
12739 video_debugfs_init();
12740 return 0;
12741 err5:
12742 device_destroy(&amvideo_class, MKDEV(AMVIDEO_MAJOR, 0));
12743 err4:
12744 unregister_chrdev(amvideo_poll_major, "amvideo_poll");
12745 err3:
12746 unregister_chrdev(AMVIDEO_MAJOR, DEVICE_NAME);
12747
12748 err2:
12749#ifdef FIQ_VSYNC
12750 unregister_fiq_bridge_handle(&vsync_fiq_bridge);
12751#endif
12752 class_unregister(&amvideo_class);
12753 err1:
12754 class_unregister(&amvideo_poll_class);
12755#ifdef FIQ_VSYNC
12756 err0:
12757#endif
12758 amvideo_unregister_client(&amvideo_notifier);
12759 platform_driver_unregister(&amvideom_driver);
12760
12761 return r;
12762}
12763
12764
12765static void __exit video_exit(void)
12766{
12767 video_debugfs_exit();
12768 vf_unreg_receiver(&video_vf_recv);
12769
12770#ifdef VIDEO_PIP
12771 vf_unreg_receiver(&videopip_vf_recv);
12772#endif
12773 DisableVideoLayer();
12774 DisableVideoLayer2();
12775
12776 vsync_fiq_down();
12777#ifdef CONFIG_SUPPORT_VIDEO_ON_VPP2
12778 vsync2_fiq_down();
12779#endif
12780 device_destroy(&amvideo_class, MKDEV(AMVIDEO_MAJOR, 0));
12781 device_destroy(&amvideo_poll_class, MKDEV(amvideo_poll_major, 0));
12782
12783 unregister_chrdev(AMVIDEO_MAJOR, DEVICE_NAME);
12784 unregister_chrdev(amvideo_poll_major, "amvideo_poll");
12785
12786#ifdef FIQ_VSYNC
12787 unregister_fiq_bridge_handle(&vsync_fiq_bridge);
12788#endif
12789
12790 class_unregister(&amvideo_class);
12791 class_unregister(&amvideo_poll_class);
12792 amvideo_unregister_client(&amvideo_notifier);
12793}
12794
12795
12796
12797MODULE_PARM_DESC(debug_flag, "\n debug_flag\n");
12798module_param(debug_flag, uint, 0664);
12799
12800#ifdef TV_3D_FUNCTION_OPEN
12801MODULE_PARM_DESC(force_3d_scaler, "\n force_3d_scaler\n");
12802module_param(force_3d_scaler, uint, 0664);
12803
12804MODULE_PARM_DESC(video_3d_format, "\n video_3d_format\n");
12805module_param(video_3d_format, uint, 0664);
12806
12807#endif
12808
12809MODULE_PARM_DESC(vsync_enter_line_max, "\n vsync_enter_line_max\n");
12810module_param(vsync_enter_line_max, uint, 0664);
12811
12812MODULE_PARM_DESC(vsync_exit_line_max, "\n vsync_exit_line_max\n");
12813module_param(vsync_exit_line_max, uint, 0664);
12814
12815#ifdef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
12816MODULE_PARM_DESC(vsync_rdma_line_max, "\n vsync_rdma_line_max\n");
12817module_param(vsync_rdma_line_max, uint, 0664);
12818#endif
12819
12820module_param(underflow, uint, 0664);
12821MODULE_PARM_DESC(underflow, "\n Underflow count\n");
12822
12823module_param(next_peek_underflow, uint, 0664);
12824MODULE_PARM_DESC(skip, "\n Underflow count\n");
12825
12826module_param(hdmiin_frame_check, uint, 0664);
12827MODULE_PARM_DESC(hdmiin_frame_check, "\n hdmiin_frame_check\n");
12828
12829module_param(step_enable, uint, 0664);
12830MODULE_PARM_DESC(step_enable, "\n step_enable\n");
12831
12832module_param(step_flag, uint, 0664);
12833MODULE_PARM_DESC(step_flag, "\n step_flag\n");
12834
12835/*arch_initcall(video_early_init);*/
12836
12837module_init(video_init);
12838module_exit(video_exit);
12839
12840MODULE_PARM_DESC(smooth_sync_enable, "\n smooth_sync_enable\n");
12841module_param(smooth_sync_enable, uint, 0664);
12842
12843MODULE_PARM_DESC(hdmi_in_onvideo, "\n hdmi_in_onvideo\n");
12844module_param(hdmi_in_onvideo, uint, 0664);
12845
12846#ifdef CONFIG_AM_VIDEO2
12847MODULE_PARM_DESC(video_play_clone_rate, "\n video_play_clone_rate\n");
12848module_param(video_play_clone_rate, uint, 0664);
12849
12850MODULE_PARM_DESC(android_clone_rate, "\n android_clone_rate\n");
12851module_param(android_clone_rate, uint, 0664);
12852
12853MODULE_PARM_DESC(noneseamless_play_clone_rate,
12854 "\n noneseamless_play_clone_rate\n");
12855module_param(noneseamless_play_clone_rate, uint, 0664);
12856
12857#endif
12858MODULE_PARM_DESC(vsync_count, "\n vsync_count\n");
12859module_param(vsync_count, uint, 0664);
12860
12861
12862MODULE_PARM_DESC(cur_dev_idx, "\n cur_dev_idx\n");
12863module_param(cur_dev_idx, uint, 0664);
12864
12865MODULE_PARM_DESC(new_frame_count, "\n new_frame_count\n");
12866module_param(new_frame_count, uint, 0664);
12867
12868MODULE_PARM_DESC(first_frame_toggled, "\n first_frame_toggled\n");
12869module_param(first_frame_toggled, uint, 0664);
12870
12871MODULE_PARM_DESC(omx_pts, "\n omx_pts\n");
12872module_param(omx_pts, uint, 0664);
12873
12874MODULE_PARM_DESC(omx_run, "\n omx_run\n");
12875module_param(omx_run, bool, 0664);
12876
12877MODULE_PARM_DESC(omx_pts_set_index, "\n omx_pts_set_index\n");
12878module_param(omx_pts_set_index, uint, 0664);
12879
12880MODULE_PARM_DESC(omx_version, "\n omx_version\n");
12881module_param(omx_version, uint, 0664);
12882
12883MODULE_PARM_DESC(omx_info, "\n omx_info\n");
12884module_param(omx_info, uint, 0664);
12885
12886MODULE_PARM_DESC(omx_need_drop_frame_num, "\n omx_need_drop_frame_num\n");
12887module_param(omx_need_drop_frame_num, int, 0664);
12888
12889MODULE_PARM_DESC(omx_drop_done, "\n omx_drop_done\n");
12890module_param(omx_drop_done, bool, 0664);
12891
12892MODULE_PARM_DESC(omx_pts_interval_upper, "\n omx_pts_interval\n");
12893module_param(omx_pts_interval_upper, int, 0664);
12894
12895MODULE_PARM_DESC(omx_pts_interval_lower, "\n omx_pts_interval\n");
12896module_param(omx_pts_interval_lower, int, 0664);
12897
12898MODULE_PARM_DESC(drop_frame_count, "\n drop_frame_count\n");
12899module_param(drop_frame_count, int, 0664);
12900
12901MODULE_PARM_DESC(receive_frame_count, "\n receive_frame_count\n");
12902module_param(receive_frame_count, int, 0664);
12903
12904MODULE_PARM_DESC(display_frame_count, "\n display_frame_count\n");
12905module_param(display_frame_count, int, 0664);
12906
12907module_param(frame_detect_time, uint, 0664);
12908MODULE_PARM_DESC(frame_detect_time, "\n frame_detect_time\n");
12909
12910module_param(frame_detect_flag, uint, 0664);
12911MODULE_PARM_DESC(frame_detect_flag, "\n frame_detect_flag\n");
12912
12913module_param(frame_detect_fps, uint, 0664);
12914MODULE_PARM_DESC(frame_detect_fps, "\n frame_detect_fps\n");
12915
12916module_param(frame_detect_receive_count, uint, 0664);
12917MODULE_PARM_DESC(frame_detect_receive_count, "\n frame_detect_receive_count\n");
12918
12919module_param(frame_detect_drop_count, uint, 0664);
12920MODULE_PARM_DESC(frame_detect_drop_count, "\n frame_detect_drop_count\n");
12921
12922
12923
12924
12925MODULE_PARM_DESC(bypass_pps, "\n pps_bypass\n");
12926module_param(bypass_pps, bool, 0664);
12927
12928MODULE_PARM_DESC(platform_type, "\n platform_type\n");
12929module_param(platform_type, bool, 0664);
12930
12931MODULE_PARM_DESC(process_3d_type, "\n process_3d_type\n");
12932module_param(process_3d_type, uint, 0664);
12933
12934
12935MODULE_PARM_DESC(framepacking_support, "\n framepacking_support\n");
12936module_param(framepacking_support, uint, 0664);
12937
12938MODULE_PARM_DESC(framepacking_width, "\n framepacking_width\n");
12939module_param(framepacking_width, uint, 0664);
12940
12941MODULE_PARM_DESC(framepacking_height, "\n framepacking_height\n");
12942module_param(framepacking_height, uint, 0664);
12943
12944MODULE_PARM_DESC(framepacking_blank, "\n framepacking_blank\n");
12945module_param(framepacking_blank, uint, 0664);
12946
12947MODULE_PARM_DESC(bypass_cm, "\n bypass_cm\n");
12948module_param(bypass_cm, bool, 0664);
12949
12950#ifdef TV_REVERSE
12951module_param(reverse, bool, 0644);
12952MODULE_PARM_DESC(reverse, "reverse /disable reverse");
12953#endif
12954
12955MODULE_PARM_DESC(toggle_count, "\n toggle count\n");
12956module_param(toggle_count, uint, 0664);
12957
12958MODULE_PARM_DESC(vpp_hold_line, "\n vpp_hold_line\n");
12959module_param(vpp_hold_line, uint, 0664);
12960
12961MODULE_PARM_DESC(stop_update, "\n stop_update\n");
12962module_param(stop_update, uint, 0664);
12963
12964MODULE_PARM_DESC(reference_zorder, "\n reference_zorder\n");
12965module_param(reference_zorder, uint, 0664);
12966
12967MODULE_DESCRIPTION("AMLOGIC video output driver");
12968MODULE_LICENSE("GPL");
12969MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>");
12970
generated by cgit at 2024-05-17 05:49:24 (GMT)