blob: 0239712ab207581f782883b9d0af0aef3c2c5cc2
| 1 | @ ***** BEGIN LICENSE BLOCK ***** |
| 2 | @ Source last modified: $Id: sbrcov.s,v 1.1 2005/04/08 21:59:46 jrecker Exp $ |
| 3 | @ |
| 4 | @ Portions Copyright (c) 1995-2005 RealNetworks, Inc. All Rights Reserved. |
| 5 | @ |
| 6 | @ The contents of this file, and the files included with this file, |
| 7 | @ are subject to the current version of the RealNetworks Public |
| 8 | @ Source License (the "RPSL") available at |
| 9 | @ http://www.helixcommunity.org/content/rpsl unless you have licensed |
| 10 | @ the file under the current version of the RealNetworks Community |
| 11 | @ Source License (the "RCSL") available at |
| 12 | @ http://www.helixcommunity.org/content/rcsl, in which case the RCSL |
| 13 | @ will apply. You may also obtain the license terms directly from |
| 14 | @ RealNetworks. You may not use this file except in compliance with |
| 15 | @ the RPSL or, if you have a valid RCSL with RealNetworks applicable |
| 16 | @ to this file, the RCSL. Please see the applicable RPSL or RCSL for |
| 17 | @ the rights, obligations and limitations governing use of the |
| 18 | @ contents of the file. |
| 19 | @ |
| 20 | @ This file is part of the Helix DNA Technology. RealNetworks is the |
| 21 | @ developer and/or licensor of the Original Code and owns the |
| 22 | @ copyrights in the portions it created. |
| 23 | @ |
| 24 | @ This file, and the files included with this file, is distributed |
| 25 | @ and made available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY |
| 26 | @ KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS |
| 27 | @ ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY WARRANTIES |
| 28 | @ OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, QUIET |
| 29 | @ ENJOYMENT OR NON-INFRINGEMENT. |
| 30 | @ |
| 31 | @ Technology Compatibility Kit Test Suite(s) Location: |
| 32 | @ http://www.helixcommunity.org/content/tck |
| 33 | @ |
| 34 | @ Contributor(s): |
| 35 | @ |
| 36 | @ ***** END LICENSE BLOCK ***** |
| 37 | |
| 38 | .text |
| 39 | .code 32 |
| 40 | .align |
| 41 | |
| 42 | @ void CVKernel1(int *XBuf, int *accBuf) |
| 43 | @ see comments in sbrhfgen.c |
| 44 | |
| 45 | .global raac_CVKernel1 |
| 46 | .type raac_CVKernel1, %function |
| 47 | raac_CVKernel1: |
| 48 | |
| 49 | stmfd sp!, {r4-r11, r14} |
| 50 | |
| 51 | ldr r3, [r0], #4*(1) |
| 52 | ldr r4, [r0], #4*(2*64-1) |
| 53 | ldr r5, [r0], #4*(1) |
| 54 | ldr r6, [r0], #4*(2*64-1) |
| 55 | rsb r14, r4, #0 |
| 56 | |
| 57 | smull r7, r8, r5, r3 |
| 58 | smlal r7, r8, r6, r4 |
| 59 | smull r9, r10, r3, r6 |
| 60 | smlal r9, r10, r14, r5 |
| 61 | smull r11, r12, r3, r3 |
| 62 | smlal r11, r12, r4, r4 |
| 63 | |
| 64 | add r2, r1, #(4*6) |
| 65 | stmia r2, {r7-r12} |
| 66 | |
| 67 | mov r7, #0 |
| 68 | mov r8, #0 |
| 69 | mov r9, #0 |
| 70 | mov r10, #0 |
| 71 | mov r11, #0 |
| 72 | mov r12, #0 |
| 73 | |
| 74 | mov r2, #(16*2 + 6) |
| 75 | CV1_Loop_Start: |
| 76 | mov r3, r5 |
| 77 | ldr r5, [r0], #4*(1) |
| 78 | mov r4, r6 |
| 79 | ldr r6, [r0], #4*(2*64-1) |
| 80 | rsb r14, r4, #0 |
| 81 | |
| 82 | smlal r7, r8, r5, r3 |
| 83 | smlal r7, r8, r6, r4 |
| 84 | smlal r9, r10, r3, r6 |
| 85 | smlal r9, r10, r14, r5 |
| 86 | smlal r11, r12, r3, r3 |
| 87 | smlal r11, r12, r4, r4 |
| 88 | |
| 89 | subs r2, r2, #1 |
| 90 | bne CV1_Loop_Start |
| 91 | |
| 92 | stmia r1, {r7-r12} |
| 93 | |
| 94 | ldr r0, [r1, #4*(6)] |
| 95 | ldr r2, [r1, #4*(7)] |
| 96 | rsb r3, r3, #0 |
| 97 | adds r7, r0, r7 |
| 98 | adc r8, r2, r8 |
| 99 | smlal r7, r8, r5, r3 |
| 100 | smlal r7, r8, r6, r14 |
| 101 | |
| 102 | ldr r0, [r1, #4*(8)] |
| 103 | ldr r2, [r1, #4*(9)] |
| 104 | adds r9, r0, r9 |
| 105 | adc r10, r2, r10 |
| 106 | smlal r9, r10, r3, r6 |
| 107 | smlal r9, r10, r4, r5 |
| 108 | |
| 109 | ldr r0, [r1, #4*(10)] |
| 110 | ldr r2, [r1, #4*(11)] |
| 111 | adds r11, r0, r11 |
| 112 | adc r12, r2, r12 |
| 113 | rsb r0, r3, #0 |
| 114 | smlal r11, r12, r3, r0 |
| 115 | rsb r2, r4, #0 |
| 116 | smlal r11, r12, r4, r2 |
| 117 | |
| 118 | add r1, r1, #(4*6) |
| 119 | stmia r1, {r7-r12} |
| 120 | |
| 121 | ldmfd sp!, {r4-r11, pc} |
| 122 | |
| 123 | @ void CVKernel2(int *XBuf, int *accBuf) |
| 124 | @ see comments in sbrhfgen.c |
| 125 | |
| 126 | .global raac_CVKernel2 |
| 127 | .type raac_CVKernel2, %function |
| 128 | raac_CVKernel2: |
| 129 | stmfd sp!, {r4-r11, r14} |
| 130 | |
| 131 | mov r7, #0 |
| 132 | mov r8, #0 |
| 133 | mov r9, #0 |
| 134 | mov r10, #0 |
| 135 | |
| 136 | ldr r3, [r0], #4*(1) |
| 137 | ldr r4, [r0], #4*(2*64-1) |
| 138 | ldr r5, [r0], #4*(1) |
| 139 | ldr r6, [r0], #4*(2*64-1) |
| 140 | |
| 141 | mov r2, #(16*2 + 6) |
| 142 | CV2_Loop_Start: |
| 143 | ldr r11, [r0], #4*(1) |
| 144 | ldr r12, [r0], #4*(2*64-1) |
| 145 | rsb r14, r4, #0 |
| 146 | |
| 147 | smlal r7, r8, r11, r3 |
| 148 | smlal r7, r8, r12, r4 |
| 149 | smlal r9, r10, r3, r12 |
| 150 | smlal r9, r10, r14, r11 |
| 151 | |
| 152 | mov r3, r5 |
| 153 | mov r4, r6 |
| 154 | mov r5, r11 |
| 155 | mov r6, r12 |
| 156 | |
| 157 | subs r2, r2, #1 |
| 158 | bne CV2_Loop_Start |
| 159 | |
| 160 | stmia r1, {r7-r10} |
| 161 | |
| 162 | ldmfd sp!, {r4-r11, pc} |
| 163 | |
| 164 | .end |
| 165 |