author | Hui Zhang <hui.zhang@amlogic.com> | 2020-08-06 11:16:21 (GMT) |
---|---|---|
committer | Hui Zhang <hui.zhang@amlogic.com> | 2020-08-12 08:14:52 (GMT) |
commit | b0d7be4ad11297053522eb7cc027fdc8a98959bd (patch) | |
tree | 1191febc799652779e4bb62da7ddceeb0623fd56 | |
parent | a03797844ab7e33388ea40870abefc232d40ea6c (diff) | |
download | media_modules-b0d7be4ad11297053522eb7cc027fdc8a98959bd.zip media_modules-b0d7be4ad11297053522eb7cc027fdc8a98959bd.tar.gz media_modules-b0d7be4ad11297053522eb7cc027fdc8a98959bd.tar.bz2 |
media_module: fix mpred memory pullution issue [1/1]
PD#SWPL-30902
Problem:
there is mpred hw memory pollution when poor signal burning
Solution:
add hw address protect in mpred ctrl
Verify:
U215
Change-Id: Ia254a7ba92875f63f3086d8337de99b196333638
Signed-off-by: Hui Zhang <hui.zhang@amlogic.com>
-rw-r--r-- | drivers/frame_provider/decoder/h265/vh265.c | 35 |
1 files changed, 18 insertions, 17 deletions
diff --git a/drivers/frame_provider/decoder/h265/vh265.c b/drivers/frame_provider/decoder/h265/vh265.c index 92b62cb..6b7bb10 100644 --- a/drivers/frame_provider/decoder/h265/vh265.c +++ b/drivers/frame_provider/decoder/h265/vh265.c @@ -5143,23 +5143,24 @@ static void config_mpred_hw(struct hevc_state_s *hevc) WRITE_VREG(HEVC_MPRED_MV_RD_ROW_JUMP, data32); data32 = READ_VREG(HEVC_MPRED_CTRL0); - data32 = (hevc->slice_type | - hevc->new_pic << 2 | - hevc->new_tile << 3 | - hevc->isNextSliceSegment << 4 | - hevc->TMVPFlag << 5 | - hevc->LDCFlag << 6 | - hevc->ColFromL0Flag << 7 | - above_ptr_ctrl << 8 | - above_en << 9 | - mv_wr_en << 10 | - mv_rd_en << 11 | - col_isIntra << 12 | - buffer_linear << 13 | - hevc->LongTerm_Curr << 14 | - hevc->LongTerm_Col << 15 | - hevc->lcu_size_log2 << 16 | - cu_size_log2 << 20 | hevc->plevel << 24); + data32 = ((hevc->slice_type & 3) | + (hevc->new_pic & 1) << 2 | + (hevc->new_tile & 1) << 3 | + (hevc->isNextSliceSegment & 1)<< 4 | + (hevc->TMVPFlag & 1)<< 5 | + (hevc->LDCFlag & 1) << 6 | + (hevc->ColFromL0Flag & 1)<< 7 | + (above_ptr_ctrl & 1)<< 8 | + (above_en & 1) << 9 | + (mv_wr_en & 1) << 10 | + (mv_rd_en & 1)<< 11 | + (col_isIntra & 1)<< 12 | + (buffer_linear & 1)<< 13 | + (hevc->LongTerm_Curr & 1) << 14 | + (hevc->LongTerm_Col & 1) << 15 | + (hevc->lcu_size_log2 & 0xf) << 16 | + (cu_size_log2 & 0xf) << 20 | (hevc->plevel & 0x7) << 24); + data32 &= ~(1<< 28); WRITE_VREG(HEVC_MPRED_CTRL0, data32); data32 = READ_VREG(HEVC_MPRED_CTRL1); |