author | miaohong chen <miaohong.chen@amlogic.com> | 2020-05-08 06:12:36 (GMT) |
---|---|---|
committer | Shen Liu <shen.liu@amlogic.com> | 2020-05-09 03:25:06 (GMT) |
commit | f1a49efb5471a236a8b92a151d1191f6ae7c7794 (patch) | |
tree | 756b2d67f0ce9f41701ba119d14d975b05e73f41 | |
parent | 02808d6db3ae433d17733e5c6be8fa985252806e (diff) | |
download | media_modules-f1a49efb5471a236a8b92a151d1191f6ae7c7794.zip media_modules-f1a49efb5471a236a8b92a151d1191f6ae7c7794.tar.gz media_modules-f1a49efb5471a236a8b92a151d1191f6ae7c7794.tar.bz2 |
decoder: fix stream protocols crash issue [2/1]
PD#OTT-9976
Problem:
Kinds of crash issues.
Solution:
Synchronize submission to solve the crash problem
from trunk.
Verify:
u212
Change-Id: If35b7cbd15a470618c0c77f7c47a59327a2c1f99
Signed-off-by: miaohong chen <miaohong.chen@amlogic.com>
-rw-r--r-- | drivers/frame_provider/decoder/avs/avs.c | 2 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/avs2/vavs2.c | 73 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/h264_multi/h264_dpb.c | 135 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/h264_multi/h264_dpb.h | 21 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/h264_multi/vmh264.c | 1035 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/h265/vh265.c | 97 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/mjpeg/vmjpeg_multi.c | 4 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/utils/amvdec.c | 18 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/utils/vdec.c | 321 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/utils/vdec.h | 7 | ||||
-rw-r--r-- | drivers/frame_provider/decoder/vp9/vvp9.c | 89 | ||||
-rw-r--r-- | firmware/video_ucode.bin | 11097 |
12 files changed, 6702 insertions, 6197 deletions
diff --git a/drivers/frame_provider/decoder/avs/avs.c b/drivers/frame_provider/decoder/avs/avs.c index 7e15114..a00f929 100644 --- a/drivers/frame_provider/decoder/avs/avs.c +++ b/drivers/frame_provider/decoder/avs/avs.c @@ -1534,7 +1534,6 @@ static s32 vavs_init(void) amvdec_enable(); - vdec_enable_DMC(NULL); vavs_local_init(); @@ -1788,7 +1787,6 @@ static int amvdec_avs_remove(struct platform_device *pdev) #endif amvdec_disable(); - vdec_disable_DMC(NULL); pic_type = 0; if (mm_blk_handle) { diff --git a/drivers/frame_provider/decoder/avs2/vavs2.c b/drivers/frame_provider/decoder/avs2/vavs2.c index 8949a97..15f66d5 100644 --- a/drivers/frame_provider/decoder/avs2/vavs2.c +++ b/drivers/frame_provider/decoder/avs2/vavs2.c @@ -72,7 +72,6 @@ #define HEVCD_MPP_ANC2AXI_TBL_DATA 0x3464 #define HEVC_SAO_MMU_VH1_ADDR 0x363b #define HEVC_SAO_MMU_VH0_ADDR 0x363a -#define HEVC_SAO_MMU_STATUS 0x3639 /* @@ -3671,10 +3670,9 @@ static void avs2_local_uninit(struct AVS2Decoder_s *dec) dec->rpm_ptr = NULL; dec->lmem_ptr = NULL; if (dec->rpm_addr) { - dma_unmap_single(amports_get_dma_device(), - dec->rpm_phy_addr, RPM_BUF_SIZE, - DMA_FROM_DEVICE); - kfree(dec->rpm_addr); + dma_free_coherent(amports_get_dma_device(), + RPM_BUF_SIZE, dec->rpm_addr, + dec->rpm_phy_addr); dec->rpm_addr = NULL; } if (dec->lmem_addr) { @@ -3783,24 +3781,15 @@ static int avs2_local_init(struct AVS2Decoder_s *dec) & 0x40) >> 6; if ((debug & AVS2_DBG_SEND_PARAM_WITH_REG) == 0) { - dec->rpm_addr = kmalloc(RPM_BUF_SIZE, GFP_KERNEL); + dec->rpm_addr = dma_alloc_coherent(amports_get_dma_device(), + RPM_BUF_SIZE, + &dec->rpm_phy_addr, GFP_KERNEL); if (dec->rpm_addr == NULL) { pr_err("%s: failed to alloc rpm buffer\n", __func__); return -1; } - - dec->rpm_phy_addr = dma_map_single(amports_get_dma_device(), - dec->rpm_addr, RPM_BUF_SIZE, DMA_FROM_DEVICE); - if (dma_mapping_error(amports_get_dma_device(), - dec->rpm_phy_addr)) { - pr_err("%s: failed to map rpm buffer\n", __func__); - kfree(dec->rpm_addr); - dec->rpm_addr = NULL; - return -1; - } else { - avs2_print(dec, AVS2_DBG_BUFMGR, - "rpm_phy_addr %x\n", (u32) dec->rpm_phy_addr); - } + avs2_print(dec, AVS2_DBG_BUFMGR, + "rpm_phy_addr %x\n", (u32) dec->rpm_phy_addr); dec->rpm_ptr = dec->rpm_addr; } @@ -3815,17 +3804,7 @@ static int avs2_local_init(struct AVS2Decoder_s *dec) avs2_print(dec, AVS2_DBG_BUFMGR, "%s, lmem_phy_addr %x\n", __func__, (u32)dec->lmem_phy_addr); -/* - dec->lmem_phy_addr = dma_map_single(amports_get_dma_device(), - dec->lmem_addr, LMEM_BUF_SIZE, DMA_BIDIRECTIONAL); - if (dma_mapping_error(amports_get_dma_device(), - dec->lmem_phy_addr)) { - pr_err("%s: failed to map lmem buffer\n", __func__); - kfree(dec->lmem_addr); - dec->lmem_addr = NULL; - return -1; - } -*/ + dec->lmem_ptr = dec->lmem_addr; @@ -3838,15 +3817,6 @@ static int avs2_local_init(struct AVS2Decoder_s *dec) return -1; } memset(dec->frame_mmu_map_addr, 0, get_frame_mmu_map_size(dec)); -/* dec->frame_mmu_map_phy_addr = dma_map_single(amports_get_dma_device(), - dec->frame_mmu_map_addr, FRAME_MMU_MAP_SIZE, DMA_BIDIRECTIONAL); - if (dma_mapping_error(amports_get_dma_device(), - dec->frame_mmu_map_phy_addr)) { - pr_err("%s: failed to map count_buffer\n", __func__); - kfree(dec->frame_mmu_map_addr); - dec->frame_mmu_map_addr = NULL; - return -1; - }*/ #endif ret = 0; @@ -4479,12 +4449,14 @@ static void debug_buffer_mgr_more(struct AVS2Decoder_s *dec) static void avs2_recycle_mmu_buf_tail(struct AVS2Decoder_s *dec) { if (dec->cur_fb_idx_mmu != INVALID_IDX) { - if (dec->used_4k_num == -1) + if (dec->used_4k_num == -1) { dec->used_4k_num = (READ_VREG(HEVC_SAO_MMU_STATUS) >> 16); + if (dec->m_ins_flag) + hevc_mmu_dma_check(hw_to_vdec(dec)); decoder_mmu_box_free_idx_tail(dec->mmu_box, dec->cur_fb_idx_mmu, dec->used_4k_num); - + } dec->cur_fb_idx_mmu = INVALID_IDX; dec->used_4k_num = -1; } @@ -4807,13 +4779,6 @@ static irqreturn_t vavs2_isr_thread_fn(int irq, void *data) get_rpm_param( &dec->avs2_dec.param); } else { - PRINT_LINE(); - dma_sync_single_for_cpu( - amports_get_dma_device(), - dec->rpm_phy_addr, - RPM_BUF_SIZE, - DMA_FROM_DEVICE); - for (i = 0; i < (RPM_END - RPM_BEGIN); i += 4) { int ii; for (ii = 0; ii < 4; ii++) @@ -5365,12 +5330,6 @@ static void vavs2_put_timer_func(unsigned long arg) } if (debug & AVS2_DBG_DUMP_RPM_BUF) { int i; - dma_sync_single_for_cpu( - amports_get_dma_device(), - dec->rpm_phy_addr, - RPM_BUF_SIZE, - DMA_FROM_DEVICE); - pr_info("RPM:\n"); for (i = 0; i < RPM_BUF_SIZE; i += 4) { int ii; @@ -5387,12 +5346,6 @@ static void vavs2_put_timer_func(unsigned long arg) } if (debug & AVS2_DBG_DUMP_LMEM_BUF) { int i; - dma_sync_single_for_cpu( - amports_get_dma_device(), - dec->lmem_phy_addr, - LMEM_BUF_SIZE, - DMA_FROM_DEVICE); - pr_info("LMEM:\n"); for (i = 0; i < LMEM_BUF_SIZE; i += 4) { int ii; diff --git a/drivers/frame_provider/decoder/h264_multi/h264_dpb.c b/drivers/frame_provider/decoder/h264_multi/h264_dpb.c index 23231af..ed2c7a4 100644 --- a/drivers/frame_provider/decoder/h264_multi/h264_dpb.c +++ b/drivers/frame_provider/decoder/h264_multi/h264_dpb.c @@ -94,6 +94,8 @@ static struct StorablePicture *get_new_pic( struct h264_dpb_stru *p_H264_Dpb, enum PictureStructure structure, unsigned char is_output); +static void update_ref_list(struct DecodedPictureBuffer *p_Dpb); + static void init_dummy_fs(void) { dummy_fs.frame = &dummy_pic; @@ -1142,7 +1144,7 @@ static struct StorablePicture *get_new_pic(struct h264_dpb_stru *p_H264_Dpb, s->is_output = 0; s->pre_output = 0; s->max_slice_id = 0; - s->data_flag &= ~(ERROR_FLAG | NODISP_FLAG | MAYBE_ERROR_FLAG); + s->data_flag &= ~(ERROR_FLAG | NODISP_FLAG); #if (MVC_EXTENSION_ENABLE) s->view_id = -1; #endif @@ -1511,6 +1513,7 @@ static void dpb_combine_field(struct h264_dpb_stru *p_H264_Dpb, fs->frame->buf_spec_num = fs->top_field->buf_spec_num; fs->frame->colocated_buf_index = fs->top_field->colocated_buf_index; fs->frame->data_flag = fs->top_field->data_flag; + fs->frame->slice_type = fs->top_field->slice_type; if (fs->bottom_field) fs->frame->data_flag |= (fs->bottom_field->data_flag & 0xf0); #endif @@ -1566,6 +1569,21 @@ static void dpb_combine_field(struct h264_dpb_stru *p_H264_Dpb, fs->frame->view_id = fs->view_id; #endif fs->frame->iCodingType = fs->top_field->iCodingType; + if (fs->bottom_field && fs->top_field->poc < fs->bottom_field->poc) { + fs->pts = fs->top_field->pts; + fs->pts64 = fs->top_field->pts64; + /*SWPL-7105 fix */ + if ((fs->frame->slice_type == B_SLICE) + && (!fs->bottom_field->pts) &&(!fs->bottom_field->pts64)) { + fs->pts = 0; + fs->pts64 = 0; + } + fs->offset_delimiter = fs->top_field->offset_delimiter; + } else if (fs->bottom_field) { + fs->pts = fs->bottom_field->pts; + fs->pts64 = fs->bottom_field->pts64; + fs->offset_delimiter = fs->bottom_field->offset_delimiter; + } /* FIELD_CODING ;*/ } @@ -1607,6 +1625,8 @@ static void insert_picture_in_dpb(struct h264_dpb_stru *p_H264_Dpb, */ dpb_print(p_H264_Dpb->decoder_index, PRINT_FLAG_DPB_DETAIL, "%s %p %p\n", __func__, fs, p); + p_H264_Dpb->dpb_frame_count++; + fs->dpb_frame_count = p_H264_Dpb->dpb_frame_count; #if 1 /* rain */ /* p->buf_spec_num = fs->index; */ @@ -1615,10 +1635,12 @@ static void insert_picture_in_dpb(struct h264_dpb_stru *p_H264_Dpb, fs->buf_spec_num = p->buf_spec_num; fs->colocated_buf_index = p->colocated_buf_index; #endif + p->slice_type = p_H264_Dpb->mSlice.slice_type; switch (p->structure) { case FRAME: fs->frame = p; fs->is_used = 3; + fs->offset_delimiter = p->offset_delimiter; if (p->used_for_reference) { fs->is_reference = 3; fs->is_orig_reference = 3; @@ -1628,6 +1650,8 @@ static void insert_picture_in_dpb(struct h264_dpb_stru *p_H264_Dpb, p->long_term_frame_idx; } } + fs->pts = p->pts; + fs->pts64 = p->pts64; fs->layer_id = p->layer_id; #if (MVC_EXTENSION_ENABLE) fs->view_id = p->view_id; @@ -1709,8 +1733,7 @@ static void insert_picture_in_dpb(struct h264_dpb_stru *p_H264_Dpb, #endif } - fs->pts = p->pts; - fs->pts64 = p->pts64; + fs->timestamp = p->timestamp; } @@ -1751,7 +1774,7 @@ void reset_frame_store(struct h264_dpb_stru *p_H264_Dpb, } } -static void unmark_for_reference(struct DecodedPictureBuffer *p_Dpb, +void unmark_for_reference(struct DecodedPictureBuffer *p_Dpb, struct FrameStore *fs) { struct h264_dpb_stru *p_H264_Dpb = container_of(p_Dpb, @@ -1989,7 +2012,9 @@ static void remove_frame_from_dpb(struct h264_dpb_stru *p_H264_Dpb, int pos) for (i = pos; i < p_Dpb->used_size - 1; i++) p_Dpb->fs[i] = p_Dpb->fs[i + 1]; p_Dpb->fs[p_Dpb->used_size - 1] = tmp; - p_Dpb->used_size--; + + if (p_Dpb->used_size) + p_Dpb->used_size--; } static int is_used_for_reference(struct FrameStore *fs) @@ -2071,6 +2096,7 @@ static int unmark_one_error_out_frame(struct h264_dpb_stru *p_H264_Dpb) unmark_for_reference(p_Dpb, p_Dpb->fs[i]); ret = 1; + break; } } return ret; @@ -2116,6 +2142,7 @@ void bufmgr_h264_remove_unused_frame(struct h264_dpb_stru *p_H264_Dpb, dpb_print(p_H264_Dpb->decoder_index, 0, "%s, Warnning, force unmark one frame\r\n", __func__); + update_ref_list(p_Dpb); remove_unused_frame_from_dpb(p_H264_Dpb); dump_dpb(p_Dpb, 0); } @@ -2124,6 +2151,7 @@ void bufmgr_h264_remove_unused_frame(struct h264_dpb_stru *p_H264_Dpb, dpb_print(p_H264_Dpb->decoder_index, 0, "%s, unmark error frame\r\n", __func__); + update_ref_list(p_Dpb); remove_unused_frame_from_dpb(p_H264_Dpb); dump_dpb(p_Dpb, 0); } @@ -2169,8 +2197,7 @@ static void get_smallest_poc(struct DecodedPictureBuffer *p_Dpb, int *poc, /* rain */ if ((*poc > p_Dpb->fs[i]->poc) && (!p_Dpb->fs[i]->is_output) && - (!p_Dpb->fs[i]->pre_output) && - (p_Dpb->fs[i]->is_used == 3)) { + (!p_Dpb->fs[i]->pre_output)) { #else if ((*poc > p_Dpb->fs[i]->poc) && (!p_Dpb->fs[i]->is_output)) { #endif @@ -2190,7 +2217,8 @@ int output_frames(struct h264_dpb_stru *p_H264_Dpb, unsigned char flush_flag) if (!flush_flag) { for (i = 0; i < p_Dpb->used_size; i++) { if ((!p_Dpb->fs[i]->is_output) && - (!p_Dpb->fs[i]->pre_output) && (p_Dpb->fs[i]->is_used == 3)) { + (!p_Dpb->fs[i]->pre_output) &&((p_Dpb->fs[i]->is_used == 3 + ||p_Dpb->fs[i]->data_flag & ERROR_FLAG ))) { none_displayed_num++; if ((p_H264_Dpb->first_insert_frame == FirstInsertFrm_IDLE || p_H264_Dpb->first_insert_frame == FirstInsertFrm_RESET) @@ -2232,7 +2260,7 @@ int output_frames(struct h264_dpb_stru *p_H264_Dpb, unsigned char flush_flag) if (fast_output_flag) ; else if (none_displayed_num < - p_H264_Dpb->reorder_pic_num) + p_H264_Dpb->origin_max_reference) return 0; } @@ -2651,6 +2679,11 @@ void dump_dpb(struct DecodedPictureBuffer *p_Dpb, u8 force) 0, "non_existing "); } + dpb_print_cont(p_H264_Dpb->decoder_index, + 0, + "dpb_frame_count %d ", + p_Dpb->fs[i]->dpb_frame_count); + #if (MVC_EXTENSION_ENABLE) if (p_Dpb->fs[i]->is_reference) dpb_print_cont(p_H264_Dpb->decoder_index, @@ -3460,6 +3493,8 @@ int store_picture_in_dpb(struct h264_dpb_stru *p_H264_Dpb, p_Vid->last_pic_bottom_field = (p->structure == BOTTOM_FIELD); if (p->idr_flag) { idr_memory_management(p_H264_Dpb, p); + if (p_H264_Dpb->first_insert_frame == FirstInsertFrm_OUT) + p_H264_Dpb->first_insert_frame = FirstInsertFrm_SKIPDONE; #if 0 /* ??? */ /* picture error concealment */ @@ -5183,9 +5218,10 @@ static void reorder_lists(struct Slice *currSlice) PRINT_FLAG_DPB_DETAIL, "listX[0] reorder (PicNum): "); for (i = 0; i < currSlice->listXsize[0]; i++) { - dpb_print_cont(p_H264_Dpb->decoder_index, - PRINT_FLAG_DPB_DETAIL, "%d ", - currSlice->listX[0][i]->pic_num); + if (currSlice->listX[0][i] != NULL) + dpb_print_cont(p_H264_Dpb->decoder_index, + PRINT_FLAG_DPB_DETAIL, "%d ", + currSlice->listX[0][i]->pic_num); } dpb_print_cont(p_H264_Dpb->decoder_index, PRINT_FLAG_DPB_DETAIL, "\n"); @@ -5218,9 +5254,10 @@ static void reorder_lists(struct Slice *currSlice) PRINT_FLAG_DPB_DETAIL, "listX[1] reorder (PicNum): "); for (i = 0; i < currSlice->listXsize[1]; i++) { - dpb_print_cont(p_H264_Dpb->decoder_index, - PRINT_FLAG_DPB_DETAIL, "%d ", - currSlice->listX[1][i]->pic_num); + if (currSlice->listX[1][i] != NULL) + dpb_print_cont(p_H264_Dpb->decoder_index, + PRINT_FLAG_DPB_DETAIL, "%d ", + currSlice->listX[1][i]->pic_num); } dpb_print_cont(p_H264_Dpb->decoder_index, PRINT_FLAG_DPB_DETAIL, "\n"); @@ -5251,15 +5288,16 @@ static void reorder_lists(struct Slice *currSlice) "TOP" : "BOT")); for (i = 0; i < (unsigned int)(currSlice-> listXsize[0]); i++) { /* ref list 0 */ - dpb_print(p_H264_Dpb->decoder_index, - PRINT_FLAG_DPB_DETAIL, - " %2d -> POC: %4d PicNum: %4d ViewID: %d\n", - i, - currSlice->listX[0][i]->poc, - currSlice->listX[0][i]-> - pic_num, - currSlice->listX[0][i]-> - view_id); + if (currSlice->listX[0][i] != NULL) + dpb_print(p_H264_Dpb->decoder_index, + PRINT_FLAG_DPB_DETAIL, + " %2d -> POC: %4d PicNum: %4d ViewID: %d\n", + i, + currSlice->listX[0][i]->poc, + currSlice->listX[0][i]-> + pic_num, + currSlice->listX[0][i]-> + view_id); } } } @@ -5289,15 +5327,16 @@ static void reorder_lists(struct Slice *currSlice) "TOP" : "BOT")); for (i = 0; i < (unsigned int)(currSlice-> listXsize[0]); i++) { /* ref list 0 */ - dpb_print(p_H264_Dpb->decoder_index, - PRINT_FLAG_DPB_DETAIL, - " %2d -> POC: %4d PicNum: %4d ViewID: %d\n", - i, - currSlice->listX[0][i]->poc, - currSlice->listX[0][i]-> - pic_num, - currSlice->listX[0][i]-> - view_id); + if (currSlice->listX[0][i] != NULL) + dpb_print(p_H264_Dpb->decoder_index, + PRINT_FLAG_DPB_DETAIL, + " %2d -> POC: %4d PicNum: %4d ViewID: %d\n", + i, + currSlice->listX[0][i]->poc, + currSlice->listX[0][i]-> + pic_num, + currSlice->listX[0][i]-> + view_id); } } if (currSlice->listXsize[1] > 0 @@ -5312,15 +5351,16 @@ static void reorder_lists(struct Slice *currSlice) "TOP" : "BOT")); for (i = 0; i < (unsigned int)(currSlice-> listXsize[1]); i++) { /* ref list 1 */ - dpb_print(p_H264_Dpb->decoder_index, - PRINT_FLAG_DPB_DETAIL, - " %2d -> POC: %4d PicNum: %4d ViewID: %d\n", - i, - currSlice->listX[1][i]->poc, - currSlice->listX[1][i]-> - pic_num, - currSlice->listX[1][i]-> - view_id); + if (currSlice->listX[1][i] != NULL) + dpb_print(p_H264_Dpb->decoder_index, + PRINT_FLAG_DPB_DETAIL, + " %2d -> POC: %4d PicNum: %4d ViewID: %d\n", + i, + currSlice->listX[1][i]->poc, + currSlice->listX[1][i]-> + pic_num, + currSlice->listX[1][i]-> + view_id); } } } @@ -5639,7 +5679,7 @@ static void check_frame_store_same_pic_num(struct DecodedPictureBuffer *p_Dpb, } } -int h264_slice_header_process(struct h264_dpb_stru *p_H264_Dpb) +int h264_slice_header_process(struct h264_dpb_stru *p_H264_Dpb, int *frame_num_gap) { int new_pic_flag = 0; @@ -5707,6 +5747,7 @@ int h264_slice_header_process(struct h264_dpb_stru *p_H264_Dpb) *if (p_Vid->conceal_mode == 0) */ fill_frame_num_gap(p_Vid, currSlice); + *frame_num_gap = 1; } if (currSlice->nal_reference_idc) { @@ -5726,6 +5767,7 @@ int h264_slice_header_process(struct h264_dpb_stru *p_H264_Dpb) */ 1); if (p_H264_Dpb->mVideo.dec_picture) { + u32 offset_lo, offset_hi; struct DecodedPictureBuffer *p_Dpb = &p_H264_Dpb->mDPB; struct StorablePicture *p = @@ -5734,11 +5776,12 @@ int h264_slice_header_process(struct h264_dpb_stru *p_H264_Dpb) p_H264_Dpb->mVideo.dec_picture); #if 1 /* rain */ - p_H264_Dpb->mVideo.dec_picture->offset_delimiter_lo = + offset_lo = p_H264_Dpb->dpb_param.l.data[OFFSET_DELIMITER_LO]; - p_H264_Dpb->mVideo.dec_picture->offset_delimiter_hi = + offset_hi = p_H264_Dpb->dpb_param.l.data[OFFSET_DELIMITER_HI]; - + p_H264_Dpb->mVideo.dec_picture->offset_delimiter = + (offset_lo | offset_hi << 16); p_H264_Dpb->mVideo.dec_picture->buf_spec_num = -1; p_H264_Dpb->mVideo.dec_picture-> colocated_buf_index = -1; diff --git a/drivers/frame_provider/decoder/h264_multi/h264_dpb.h b/drivers/frame_provider/decoder/h264_multi/h264_dpb.h index e28a822..1dcfd09 100644 --- a/drivers/frame_provider/decoder/h264_multi/h264_dpb.h +++ b/drivers/frame_provider/decoder/h264_multi/h264_dpb.h @@ -456,8 +456,8 @@ enum ProfileIDC { enum FirstInsertFrm_State { FirstInsertFrm_IDLE = 0, FirstInsertFrm_OUT = 1, - FirstInsertFrm_RESET = 2, - FirstInsertFrm_SKIPDONE = 3, + FirstInsertFrm_SKIPDONE = 2, + FirstInsertFrm_RESET = 3, }; struct SPSParameters { @@ -703,10 +703,7 @@ struct StorablePicture { char listXsize[MAX_NUM_SLICES][2]; struct StorablePicture **listX[MAX_NUM_SLICES][2]; int layer_id; - - int offset_delimiter_lo; - int offset_delimiter_hi; - + u32 offset_delimiter; u32 pts; u64 pts64; u64 timestamp; @@ -752,7 +749,6 @@ struct FrameStore { #define IDR_FLAG 0x02 #define ERROR_FLAG 0x10 #define NULL_FLAG 0x20 -#define MAYBE_ERROR_FLAG 0x40 #define NODISP_FLAG 0x80 unsigned char data_flag; #endif @@ -771,10 +767,11 @@ struct FrameStore { int anchor_pic_flag[2]; #endif int layer_id; - + u32 offset_delimiter; u32 pts; u64 pts64; u64 timestamp; + int dpb_frame_count; }; @@ -865,6 +862,8 @@ struct h264_dpb_stru { unsigned int dpb_error_flag; unsigned int first_insert_frame; int first_output_poc; + unsigned int origin_max_reference; + int dpb_frame_count; }; @@ -885,7 +884,7 @@ void set_frame_output_flag(struct h264_dpb_stru *p_H264_Dpb, int index); int is_there_unused_frame_from_dpb(struct DecodedPictureBuffer *p_Dpb); -int h264_slice_header_process(struct h264_dpb_stru *p_H264_Dpb); +int h264_slice_header_process(struct h264_dpb_stru *p_H264_Dpb, int *frame_num_gap); void dpb_init_global(struct h264_dpb_stru *p_H264_Dpb, int id, int actual_dpb_size, int max_reference_size); @@ -928,4 +927,8 @@ enum PictureStructure get_cur_slice_picture_struct( int dpb_check_ref_list_error( struct h264_dpb_stru *p_H264_Dpb); + +void unmark_for_reference(struct DecodedPictureBuffer *p_Dpb, + struct FrameStore *fs); + #endif diff --git a/drivers/frame_provider/decoder/h264_multi/vmh264.c b/drivers/frame_provider/decoder/h264_multi/vmh264.c index aa8fdf3..4df0b51 100644 --- a/drivers/frame_provider/decoder/h264_multi/vmh264.c +++ b/drivers/frame_provider/decoder/h264_multi/vmh264.c @@ -49,6 +49,7 @@ #include "../utils/amvdec.h" #include "../h264/vh264.h" #include "../../../stream_input/parser/streambuf.h" +#include "../../../stream_input/parser/streambuf_reg.h" #include <linux/delay.h> #include <linux/amlogic/media/codec_mm/configs.h> #include "../utils/decoder_mmu_box.h" @@ -62,6 +63,7 @@ #include <linux/crc32.h> #include <trace/events/meson_atrace.h> +#define DETECT_WRONG_MULTI_SLICE #undef pr_info @@ -113,12 +115,15 @@ #define DUR2PTS_REM(x) (x*90 - DUR2PTS(x)*96) #define FIX_FRAME_RATE_CHECK_IDRFRAME_NUM 2 +#define CONSTRAIN_MAX_BUF_NUM + #define H264_DEV_NUM 9 #define H264_MMU #define VIDEO_SIGNAL_TYPE_AVAILABLE_MASK 0x20000000 static int mmu_enable; -static int force_enable_mmu = 1; +/*mmu do not support mbaff*/ +static int force_enable_mmu = 0; unsigned int h264_debug_flag; /* 0xa0000000; */ unsigned int h264_debug_mask = 0xff; /* @@ -126,7 +131,10 @@ unsigned int h264_debug_mask = 0xff; * 0x1xx, force decoder id of xx to be disconnected */ unsigned int h264_debug_cmd; -static unsigned int dec_control; +static int ref_b_frame_error_max_count = 50; +static unsigned int dec_control = + DEC_CONTROL_FLAG_FORCE_2997_1080P_INTERLACE | + DEC_CONTROL_FLAG_FORCE_2500_576P_INTERLACE; static unsigned int force_rate_streambase; static unsigned int force_rate_framebase; static unsigned int force_disp_bufspec_num; @@ -145,6 +153,14 @@ static unsigned int reference_buf_margin = 4; #define VDEC_ASSIST_CANVAS_BLK32 0x5 +#ifdef CONSTRAIN_MAX_BUF_NUM +static u32 run_ready_max_vf_only_num; +static u32 run_ready_display_q_num; + /*0: not check + 0xff: mDPB.size + */ +static u32 run_ready_max_buf_num = 0xff; +#endif static unsigned int max_alloc_buf_count; static unsigned int decode_timeout_val = 100; @@ -245,8 +261,11 @@ static unsigned int i_only_flag; bit[11] mark error if dpb error bit[12] i_only when error happen + bit[13] 0: mark error according to last pic, 1: ignore mark error + bit[18] 1: time out status, store pic to dpb buffer. + bit[19] 1: If a lot b frames are wrong consecutively, the DPB queue reset. */ -static unsigned int error_proc_policy = 0xf36; /*0x1f14*/ +static unsigned int error_proc_policy = 0xD8f36; /*0x1f14*/ /* error_skip_count: @@ -279,11 +298,11 @@ static unsigned int fast_output_enable = H264_OUTPUT_MODE_NORMAL; static unsigned int enable_itu_t35 = 1; -//static unsigned int frmbase_cont_bitlevel = 0x40;//DEBUG_TMP -static unsigned int frmbase_cont_bitlevel; +static unsigned int frmbase_cont_bitlevel = 0x40; static unsigned int frmbase_cont_bitlevel2 = 0x1; +static unsigned int check_slice_num = 30; #define MH264_USERDATA_ENABLE @@ -299,6 +318,7 @@ static unsigned int frmbase_cont_bitlevel2 = 0x1; 0x20000: vdec dw horizotal/vertical 1/2 */ static u32 double_write_mode; +static unsigned int mb_count_threshold = 5; /*percentage*/ #define IS_VDEC_DW(hw) (hw->double_write_mode >> 16 & 0xf) @@ -466,6 +486,7 @@ static void vh264_vf_put(struct vframe_s *, void *); static int vh264_vf_states(struct vframe_states *states, void *); static int vh264_event_cb(int type, void *data, void *private_data); static void vh264_work(struct work_struct *work); +static void vh264_timeout_work(struct work_struct *work); static void vh264_notify_work(struct work_struct *work); static const char vh264_dec_id[] = "vh264-dev"; @@ -612,8 +633,8 @@ struct vdec_h264_hw_s { #endif struct StorablePicture *last_dec_picture; - ulong lmem_addr; - dma_addr_t lmem_addr_remap; + ulong lmem_phy_addr; + dma_addr_t lmem_addr; void *bmmu_box; #ifdef H264_MMU @@ -697,6 +718,7 @@ struct vdec_h264_hw_s { u32 h264_pts_count; u32 duration_from_pts_done; u32 pts_unstable; + u32 unstable_pts; u32 last_checkout_pts; u32 max_refer_buf; @@ -713,6 +735,7 @@ struct vdec_h264_hw_s { u32 first_pts; u64 first_pts64; bool first_pts_cached; + u64 last_pts64; #if 0 void *sei_data_buffer; @@ -739,6 +762,7 @@ struct vdec_h264_hw_s { int dec_result; struct work_struct work; struct work_struct notify_work; + struct work_struct timeout_work; void (*vdec_cb)(struct vdec_s *, void *); void *vdec_cb_arg; @@ -817,6 +841,24 @@ struct vdec_h264_hw_s { struct mutex chunks_mutex; int need_cache_size; u64 sc_start_time; + u8 frmbase_cont_flag; + bool first_head_check_flag; + bool wait_reset_done_flag; +#ifdef DETECT_WRONG_MULTI_SLICE + unsigned int multi_slice_pic_check_count; + /* multi_slice_pic_flag: + 0, unknown; + 1, single slice; + 2, multi slice + */ + unsigned int multi_slice_pic_flag; + unsigned int picture_slice_count; + unsigned int cur_picture_slice_count; + unsigned char force_slice_as_picture_flag; + unsigned int last_picture_slice_count; + unsigned int first_pre_frame_num; +#endif + u32 b_frame_error_count; }; static u32 again_threshold = 0x40; @@ -827,6 +869,7 @@ void user_data_ready_notify(struct vdec_h264_hw_s *hw); static void vmh264_wakeup_userdata_poll(void); #endif +static void timeout_process(struct vdec_h264_hw_s *hw); static void dump_bufspec(struct vdec_h264_hw_s *hw, const char *caller); static void h264_reconfig(struct vdec_h264_hw_s *hw); @@ -851,7 +894,6 @@ static void h264_clear_dpb(struct vdec_h264_hw_s *hw); #define H265_CHECK_AXI_INFO_BASE HEVC_ASSIST_SCRATCH_8 #define H265_SAO_4K_SET_BASE HEVC_ASSIST_SCRATCH_9 #define H265_SAO_4K_SET_COUNT HEVC_ASSIST_SCRATCH_A -#define HEVC_SAO_MMU_STATUS 0x3639 #define HEVCD_MPP_ANC2AXI_TBL_DATA 0x3464 @@ -864,7 +906,6 @@ static void h264_clear_dpb(struct vdec_h264_hw_s *hw); #define HEVCD_MPP_DECOMP_CTL3 0x34c4 #define HEVCD_MPP_VDEC_MCR_CTL 0x34c8 #define HEVC_DBLK_CFGB 0x350b -#define HEVC_CM_CORE_STATUS 0x3640 #define HEVC_ASSIST_MMU_MAP_ADDR 0x3009 @@ -884,8 +925,7 @@ static u32 mem_map_mode = H265_MEM_MAP_MODE; static int is_oversize(int w, int h) { - int max = (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TL1)? - MAX_SIZE_8K : MAX_SIZE_4K; + int max = MAX_SIZE_4K; if (w < 0 || h < 0) return true; @@ -895,7 +935,8 @@ static int is_oversize(int w, int h) return false; } - +static void vmh264_udc_fill_vpts(struct vdec_h264_hw_s *hw, + int frame_type, u32 vpts, u32 vpts_valid); static int compute_losless_comp_body_size(int width, int height, int bit_depth_10); static int compute_losless_comp_header_size(int width, int height); @@ -2345,7 +2386,7 @@ static int check_force_interlace(struct vdec_h264_hw_s *hw, if ((dec_control & DEC_CONTROL_FLAG_FORCE_2997_1080P_INTERLACE) && (hw->frame_width == 1920) && (hw->frame_height >= 1080) - && (hw->frame_dur == 3203)) { + && (hw->frame_dur == 3203 || hw->frame_dur == 3840)) { bForceInterlace = 1; } else if ((dec_control & DEC_CONTROL_FLAG_FORCE_2500_576P_INTERLACE) && (hw->frame_width == 720) @@ -2356,6 +2397,47 @@ static int check_force_interlace(struct vdec_h264_hw_s *hw, return bForceInterlace; } +static int is_iframe(struct FrameStore *frame) { + + if (frame->frame && frame->frame->slice_type == I_SLICE) { + return 1; + } + return 0; +} + +static u32 last_pic_pts; +unsigned long jiffies_save; +static u32 not_run_ready_cnt, not_run_ready_save; +/* +static u32 stbuf_lvl(struct stream_buf_s *buf) +{ + if ((buf->type == BUF_TYPE_HEVC) || (buf->type == BUF_TYPE_VIDEO)) { + if (READ_PARSER_REG(PARSER_ES_CONTROL) & 1) { + int level = READ_PARSER_REG(PARSER_VIDEO_WP) - + READ_PARSER_REG(PARSER_VIDEO_RP); + if (level < 0) + level += READ_PARSER_REG(PARSER_VIDEO_END_PTR) - + READ_PARSER_REG(PARSER_VIDEO_START_PTR) + 8; + return (u32)level; + } else + return (buf->type == BUF_TYPE_HEVC) ? + READ_VREG(HEVC_STREAM_LEVEL) : + _READ_ST_REG(LEVEL); + } + + return _READ_ST_REG(LEVEL); +} + +static int get_video_stbuf_level(int id) +{ + int level = 0; + struct stream_buf_s *p = get_stream_buffer(id); + + level = stbuf_lvl(p); + + return level; +}*/ + int prepare_display_buf(struct vdec_s *vdec, struct FrameStore *frame) { @@ -2395,6 +2477,32 @@ int prepare_display_buf(struct vdec_s *vdec, struct FrameStore *frame) __func__, buffer_index, frame->data_flag & ERROR_FLAG, frame->poc, hw->data_flag & ERROR_FLAG, error_proc_policy); + if (frame->frame == NULL && + ((frame->is_used == 1 && frame->top_field) + || (frame->is_used == 2 && frame->bottom_field))) { + dpb_print(DECODE_ID(hw), PRINT_FLAG_ERRORFLAG_DBG, + "%s Error frame_num %d used %d\n", + __func__, frame->frame_num, frame->is_used); + frame->data_flag |= ERROR_FLAG; + } + if (vdec_stream_based(vdec) && !(frame->data_flag & NODISP_FLAG)) { + if ((pts_lookup_offset_us64(PTS_TYPE_VIDEO, + frame->offset_delimiter, &frame->pts, 0, &frame->pts64) == 0)) { + hw->last_pts64 = frame->pts64; + hw->last_pts = frame->pts; + } else { + frame->pts64 = hw->last_pts64 +DUR2PTS(hw->frame_dur) ; + frame->pts = hw->last_pts + DUR2PTS(hw->frame_dur); + } + dpb_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS, + "%s error= 0x%x poc = %d offset= 0x%x pts= 0x%x last_pts =0x%x pts64 = %lld last_pts64= %lld duration = %d\n", + __func__, (frame->data_flag & ERROR_FLAG), frame->poc, + frame->offset_delimiter, frame->pts,hw->last_pts, + frame->pts64, hw->last_pts64, hw->frame_dur); + hw->last_pts64 = frame->pts64; + hw->last_pts = frame->pts; + } + if ((frame->data_flag & NODISP_FLAG) || (frame->data_flag & NULL_FLAG) || (frame->data_flag & ERROR_FLAG) || @@ -2440,10 +2548,17 @@ int prepare_display_buf(struct vdec_s *vdec, struct FrameStore *frame) return -1; } vf->duration_pulldown = 0; - vf->pts = frame->pts; - vf->pts_us64 = frame->pts64; - vf->timestamp = frame->timestamp; - vf->index = VF_INDEX(frame->index, buffer_index); + if (!(is_iframe(frame)) && hw->unstable_pts) { + vf->pts = 0; + vf->pts_us64 = 0; + vf->timestamp = 0; + vf->index = VF_INDEX(frame->index, buffer_index); + } else { + vf->pts = frame->pts; + vf->pts_us64 = frame->pts64; + vf->timestamp = frame->timestamp; + vf->index = VF_INDEX(frame->index, buffer_index); + } if (hw->is_used_v4l) { vf->v4l_mem_handle @@ -2588,7 +2703,15 @@ int prepare_display_buf(struct vdec_s *vdec, struct FrameStore *frame) __func__, __LINE__, vf->type, frame->frame->pic_struct, vf->pts, vf->pts_us64, bForceInterlace); } - + if (i == 0) { + unsigned long jiffies_diff; + unsigned int not_ready_diff; + not_ready_diff = not_run_ready_cnt - not_run_ready_save; + not_run_ready_save = not_run_ready_cnt; + jiffies_diff = jiffies - jiffies_save; + jiffies_save = jiffies; + last_pic_pts = vf->pts; + } kfifo_put(&hw->display_q, (const struct vframe_s *)vf); ATRACE_COUNTER(MODULE_NAME, vf->pts); hw->vf_pre_count++; @@ -2686,7 +2809,7 @@ static void reset_process_time(struct vdec_h264_hw_s *hw) static void start_process_time(struct vdec_h264_hw_s *hw) { - hw->decode_timeout_count = 2; + hw->decode_timeout_count = 10; hw->start_process_time = jiffies; } @@ -2953,6 +3076,7 @@ int config_decode_buf(struct vdec_h264_hw_s *hw, struct StorablePicture *pic) struct Slice *pSlice = &(p_H264_Dpb->mSlice); unsigned int colocate_adr_offset; unsigned int val; + struct StorablePicture *last_pic = hw->last_dec_picture; #ifdef ONE_COLOCATE_BUF_PER_DECODE_BUF int colocate_buf_index; @@ -3082,6 +3206,20 @@ int config_decode_buf(struct vdec_h264_hw_s *hw, struct StorablePicture *pic) j = 0; h264_buffer_info_data_write_count = 0; + if (last_pic) + dpb_print(DECODE_ID(hw), PRINT_FLAG_ERRORFLAG_DBG, + "last_pic->data_flag %x slice_type %x last_pic->slice_type %x\n", + last_pic->data_flag, pSlice->slice_type, last_pic->slice_type); + if (!hw->i_only && !(error_proc_policy & 0x2000) && + last_pic && (last_pic->data_flag & ERROR_FLAG) + && (!(last_pic->slice_type == B_SLICE)) + && (!(pSlice->slice_type == I_SLICE))) { + dpb_print(DECODE_ID(hw), PRINT_FLAG_ERRORFLAG_DBG, + "no i/idr error mark\n"); + hw->data_flag |= ERROR_FLAG; + pic->data_flag |= ERROR_FLAG; + } + for (i = 0; i < (unsigned int)(pSlice->listXsize[0]); i++) { /*ref list 0 */ struct StorablePicture *ref = pSlice->listX[0][i]; @@ -3101,6 +3239,24 @@ int config_decode_buf(struct vdec_h264_hw_s *hw, struct StorablePicture *pic) pic->data_flag |= ERROR_FLAG; dpb_print(DECODE_ID(hw), PRINT_FLAG_ERRORFLAG_DBG, " ref error mark1 \n"); } + + if (error_proc_policy & 0x80000) { + if (ref_b_frame_error_max_count && + ref->slice_type == B_SLICE) { + if (ref->data_flag & ERROR_FLAG) + hw->b_frame_error_count++; + else + hw->b_frame_error_count = 0; + if (hw->b_frame_error_count > ref_b_frame_error_max_count) { + hw->b_frame_error_count = 0; + dpb_print(DECODE_ID(hw), 0, + "error %d B frame, reset dpb buffer\n", + ref_b_frame_error_max_count); + return -1; + } + } + } + if (ref->data_flag & NULL_FLAG) hw->data_flag |= NULL_FLAG; #endif @@ -3609,6 +3765,24 @@ static struct vframe_s *vh264_vf_get(void *op_arg) return NULL; } +static bool vf_valid_check(struct vframe_s *vf, struct vdec_h264_hw_s *hw) { + int i,j; + if (hw->is_used_v4l) + return true; + for (i = 0; i < VF_POOL_SIZE; i++) { + for (j = 0; j < VF_POOL_NUM; j ++) { + if (vf == &(hw->vfpool[j][i])) + return true; + } + } + dpb_print(DECODE_ID(hw), 0, " invalid vf been put, vf = %p\n", vf); + for (i = 0; i < VF_POOL_SIZE; i++) { + dpb_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS, + "dump vf [%d]= %p\n", i, &(hw->vfpool[hw->cur_pool][i])); + } + return false; +} + static void vh264_vf_put(struct vframe_s *vf, void *op_arg) { struct vdec_s *vdec = op_arg; @@ -3672,7 +3846,8 @@ static void vh264_vf_put(struct vframe_s *vf, void *op_arg) } hw->vf_put_count++; - kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf); + if (vf && (vf_valid_check(vf, hw) == true)) + kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf); #define ASSIST_MBOX1_IRQ_REG VDEC_ASSIST_MBOX1_IRQ_REG if (hw->buffer_empty_flag) @@ -3839,7 +4014,7 @@ static int get_max_dec_frame_buf_size(int level_idc, size /= pic_size; size = size + 1; /* need one more buffer */ - if (max_reference_frame_num > size) + if (max_reference_frame_num < size) size = max_reference_frame_num; return size; @@ -4000,6 +4175,7 @@ static int vh264_set_params(struct vdec_h264_hw_s *hw, reg_val = param4; level_idc = reg_val & 0xff; max_reference_size = (reg_val >> 8) & 0xff; + hw->dpb.origin_max_reference = max_reference_size; dpb_print(DECODE_ID(hw), 0, "mb height/widht/total: %x/%x/%x level_idc %x max_ref_num %x\n", mb_height, mb_width, mb_total, @@ -4023,6 +4199,16 @@ static int vh264_set_params(struct vdec_h264_hw_s *hw, dpb_print(DECODE_ID(hw), 0, "set reorder_pic_num to %d\n", hw->dpb.reorder_pic_num); + } else { + if (!hw->first_head_check_flag && level_idc == 21 && + hw->frame_width == 32 && hw->frame_height == 32 && + max_reference_size == 0 && hw->dpb.reorder_pic_num > + MAX_VF_BUF_NUM) { + dpb_print(DECODE_ID(hw), 0, + "%s warning abnormal reorder_pic %d\n", __func__, hw->dpb.reorder_pic_num); + hw->first_head_check_flag = 1; + return -1; + } } active_buffer_spec_num = @@ -4217,7 +4403,7 @@ static void vui_config(struct vdec_h264_hw_s *hw) FIX_FRAME_RATE_OFF; hw->pts_duration = 0; hw->frame_dur = frame_dur_es; - schedule_work(&hw->notify_work); + vdec_schedule_work(&hw->notify_work); dpb_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL, "frame_dur %d from timing_info\n", @@ -4394,6 +4580,31 @@ void bufmgr_force_recover(struct h264_dpb_stru *p_H264_Dpb) hw->reset_bufmgr_flag = 1; } +#ifdef CONSTRAIN_MAX_BUF_NUM +static int get_vf_ref_only_buf_count(struct vdec_h264_hw_s *hw) +{ + int i; + int count = 0; + for (i = 0; i < BUFSPEC_POOL_SIZE; i++) { + if (is_buf_spec_in_disp_q(hw, i) && + hw->buffer_spec[i].vf_ref > 0) + count++; + } + return count; +} + +static int get_used_buf_count(struct vdec_h264_hw_s *hw) +{ + int i; + int count = 0; + for (i = 0; i < BUFSPEC_POOL_SIZE; i++) { + if (is_buf_spec_in_use(hw, i)) + count++; + } + return count; +} +#endif + static bool is_buffer_available(struct vdec_s *vdec) { bool buffer_available = 1; @@ -4686,25 +4897,27 @@ static void check_decoded_pic_error(struct vdec_h264_hw_s *hw) unsigned mby_mbx = READ_VREG(MBY_MBX); unsigned mb_total = (hw->seq_info2 >> 8) & 0xffff; unsigned decode_mb_count = - (((mby_mbx & 0xff) + 1) * + ((mby_mbx & 0xff) * hw->mb_width + (((mby_mbx >> 8) & 0xff) + 1)); if (mby_mbx == 0) return; if (get_cur_slice_picture_struct(p_H264_Dpb) != FRAME) mb_total /= 2; - if (error_proc_policy & 0x100) { - if (decode_mb_count != mb_total) - p->data_flag |= ERROR_FLAG; - else if (p->data_flag & MAYBE_ERROR_FLAG) - p->data_flag &= ~ERROR_FLAG; - p->data_flag &= ~MAYBE_ERROR_FLAG; - } - if ((error_proc_policy & 0x200) && READ_VREG(ERROR_STATUS_REG) != 0) { p->data_flag |= ERROR_FLAG; } + if (error_proc_policy & 0x100) { + if (decode_mb_count < mb_total) { + p->data_flag |= ERROR_FLAG; + if ((error_proc_policy & 0x20000) && + decode_mb_count >= mb_total * (100 - mb_count_threshold) / 100) { + p->data_flag &= ~ERROR_FLAG; + } + } + } + if (p->data_flag & ERROR_FLAG) { dpb_print(DECODE_ID(hw), PRINT_FLAG_ERRORFLAG_DBG, "%s: decode error, seq_info2 0x%x, mby_mbx 0x%x, mb_total %d decoded mb_count %d ERROR_STATUS_REG 0x%x\n", @@ -4719,11 +4932,148 @@ static void check_decoded_pic_error(struct vdec_h264_hw_s *hw) } } -static void vmh264_udc_fill_vpts(struct vdec_h264_hw_s *hw, - int frame_type, - u32 vpts, - u32 vpts_valid); +static int vh264_pic_done_proc(struct vdec_s *vdec) +{ + struct vdec_h264_hw_s *hw = (struct vdec_h264_hw_s *)(vdec->private); + struct h264_dpb_stru *p_H264_Dpb = &hw->dpb; + int ret; + + if (input_frame_based(vdec) && + (!(hw->i_only & 0x2)) && + frmbase_cont_bitlevel != 0 && + READ_VREG(VIFF_BIT_CNT) > + frmbase_cont_bitlevel) { + /*handle the case: multi pictures in one packet*/ + dpb_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS, + "%s H264_PIC_DATA_DONE decode slice count %d, continue (bitcnt 0x%x)\n", + __func__, + hw->decode_pic_count, + READ_VREG(VIFF_BIT_CNT)); + hw->frmbase_cont_flag = 1; + } else + hw->frmbase_cont_flag = 0; + if (p_H264_Dpb->mVideo.dec_picture) { +#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION + DEL_EXIST(hw, + p_H264_Dpb->mVideo.dec_picture) = 0; + if (vdec->master) { + struct vdec_h264_hw_s *hw_ba = + (struct vdec_h264_hw_s *) + vdec->master->private; + if (hw_ba->last_dec_picture) + DEL_EXIST(hw_ba, + hw_ba->last_dec_picture) + = 1; + } +#endif + mutex_lock(&hw->chunks_mutex); + if (hw->chunk) { + p_H264_Dpb->mVideo.dec_picture->pts = + hw->chunk->pts; + p_H264_Dpb->mVideo.dec_picture->pts64 = + hw->chunk->pts64; + p_H264_Dpb->mVideo.dec_picture->timestamp = + hw->chunk->timestamp; +#ifdef MH264_USERDATA_ENABLE + vmh264_udc_fill_vpts(hw, + p_H264_Dpb->mSlice.slice_type, + hw->chunk->pts, 1); +#endif + +#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION + } else if (vdec->master) { + /*dv enhance layer, + do not checkout pts*/ + struct StorablePicture *pic = + p_H264_Dpb->mVideo.dec_picture; + pic->pts = 0; + pic->pts64 = 0; +#endif + } else { + struct StorablePicture *pic = + p_H264_Dpb->mVideo.dec_picture; + u32 offset = pic->offset_delimiter; + if (pts_pickout_offset_us64(PTS_TYPE_VIDEO, + offset, &pic->pts, 0, &pic->pts64)) { + pic->pts = 0; + pic->pts64 = 0; +#ifdef MH264_USERDATA_ENABLE + vmh264_udc_fill_vpts(hw, + p_H264_Dpb->mSlice.slice_type, + pic->pts, 0); +#endif + } else { +#ifdef MH264_USERDATA_ENABLE + vmh264_udc_fill_vpts(hw, + p_H264_Dpb->mSlice.slice_type, + pic->pts, 1); +#endif + } + } + mutex_unlock(&hw->chunks_mutex); + check_decoded_pic_error(hw); +#ifdef ERROR_HANDLE_TEST + if ((hw->data_flag & ERROR_FLAG) + && (error_proc_policy & 0x80)) { + release_cur_decoding_buf(hw); + h264_clear_dpb(hw); + hw->dec_flag = 0; + hw->data_flag = 0; + hw->skip_frame_count = 0; + hw->has_i_frame = 0; + hw->no_error_count = 0xfff; + hw->no_error_i_count = 0xf; + } else +#endif + ret = store_picture_in_dpb(p_H264_Dpb, + p_H264_Dpb->mVideo.dec_picture, + hw->data_flag | hw->dec_flag | + p_H264_Dpb->mVideo.dec_picture->data_flag); + + + + if (ret == -1) { + release_cur_decoding_buf(hw); + bufmgr_force_recover(p_H264_Dpb); + } else { + if (hw->data_flag & ERROR_FLAG) { + hw->no_error_count = 0; + hw->no_error_i_count = 0; + } else { + hw->no_error_count++; + if (hw->data_flag & I_FLAG) + hw->no_error_i_count++; + } + if (hw->mmu_enable) + hevc_set_unused_4k_buff_idx(hw, + p_H264_Dpb->mVideo. + dec_picture->buf_spec_num); + bufmgr_post(p_H264_Dpb); + hw->last_dec_picture = + p_H264_Dpb->mVideo.dec_picture; + p_H264_Dpb->mVideo.dec_picture = NULL; + /* dump_dpb(&p_H264_Dpb->mDPB); */ + hw->has_i_frame = 1; + if (hw->mmu_enable) + hevc_set_frame_done(hw); + hw->decode_pic_count++; + p_H264_Dpb->decode_pic_count = hw->decode_pic_count; + if (hw->skip_frame_count > 0) { + /*skip n frame after first I */ + hw->skip_frame_count--; + if (hw->skip_frame_count == 0) + hw->dec_flag &= (~NODISP_FLAG); + } else if (hw->skip_frame_count < -1) { + /*skip n frame after first I until second I */ + hw->skip_frame_count++; + if (hw->skip_frame_count == -1) + hw->dec_flag &= (~NODISP_FLAG); + } + } + } + return 0; +} static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) { int i; @@ -4731,16 +5081,10 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) struct h264_dpb_stru *p_H264_Dpb = &hw->dpb; unsigned int dec_dpb_status = p_H264_Dpb->dec_dpb_status; u32 debug_tag; - int ret; if (dec_dpb_status == H264_CONFIG_REQUEST) { #if 1 unsigned short *p = (unsigned short *)hw->lmem_addr; - dma_sync_single_for_cpu( - amports_get_dma_device(), - hw->lmem_addr_remap, - PAGE_SIZE, - DMA_FROM_DEVICE); for (i = 0; i < (RPM_END-RPM_BEGIN); i += 4) { int ii; for (ii = 0; ii < 4; ii++) { @@ -4787,6 +5131,20 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) reset_process_time(hw); hw->reg_iqidct_control = READ_VREG(IQIDCT_CONTROL); hw->dec_result = DEC_RESULT_CONFIG_PARAM; +#ifdef DETECT_WRONG_MULTI_SLICE + /*restart check count and set 'unknown'*/ + dpb_print(DECODE_ID(hw), PRINT_FLAG_UCODE_EVT, + "%s MULTI_SLICE_DETECT (check_count %d slice_count %d cur_slice_count %d flag %d), H264_CONFIG_REQUEST => restart check\n", + __func__, + hw->multi_slice_pic_check_count, + hw->picture_slice_count, + hw->cur_picture_slice_count, + hw->multi_slice_pic_flag); + + hw->multi_slice_pic_check_count = 0; + hw->multi_slice_pic_flag = 0; + hw->picture_slice_count = 0; +#endif vdec_schedule_work(&hw->work); } else if (dec_dpb_status == H264_SLICE_HEAD_DONE) { u16 data_hight; @@ -4794,9 +5152,42 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) u32 video_signal; int slice_header_process_status = 0; + int I_flag; + int frame_num_gap = 0; /*unsigned char is_idr;*/ unsigned short *p = (unsigned short *)hw->lmem_addr; reset_process_time(hw); +#ifdef DETECT_WRONG_MULTI_SLICE + hw->cur_picture_slice_count++; + if (hw->multi_slice_pic_flag == 1 && + hw->cur_picture_slice_count == 1 && + (error_proc_policy & 0x10000)) { + hw->first_pre_frame_num = p_H264_Dpb->mVideo.pre_frame_num; + } + if (hw->multi_slice_pic_flag == 1 && + hw->cur_picture_slice_count > 1 && + (error_proc_policy & 0x10000)) { + dpb_print(DECODE_ID(hw), 0, + "%s MULTI_SLICE_DETECT (check_count %d slice_count %d cur_slice_count %d flag %d), WRONG_MULTI_SLICE detected, insert picture\n", + __func__, + hw->multi_slice_pic_check_count, + hw->picture_slice_count, + hw->cur_picture_slice_count, + hw->multi_slice_pic_flag); + if (hw->cur_picture_slice_count > hw->last_picture_slice_count) + vh264_pic_done_proc(vdec); + else { + if (p_H264_Dpb->mVideo.dec_picture) { + if (p_H264_Dpb->mVideo.dec_picture->colocated_buf_index >= 0) { + release_colocate_buf(p_H264_Dpb, + p_H264_Dpb->mVideo.dec_picture->colocated_buf_index); + p_H264_Dpb->mVideo.dec_picture->colocated_buf_index = -1; + } + } + release_cur_decoding_buf(hw); + } + } +#endif hw->reg_iqidct_control = READ_VREG(IQIDCT_CONTROL); hw->reg_vcop_ctrl_reg = READ_VREG(VCOP_CTRL_REG); @@ -4814,12 +5205,6 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) goto empty_proc; } - - dma_sync_single_for_cpu( - amports_get_dma_device(), - hw->lmem_addr_remap, - PAGE_SIZE, - DMA_FROM_DEVICE); #if 0 if (p_H264_Dpb->mVideo.dec_picture == NULL) { if (!is_buffer_available(vdec)) { @@ -4952,9 +5337,20 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) val(p_H264_Dpb->dpb_param.dpb.frame_pic_order_cnt), val(p_H264_Dpb->dpb_param.dpb.top_field_pic_order_cnt), val(p_H264_Dpb->dpb_param.dpb.top_field_pic_order_cnt)); + I_flag = (p_H264_Dpb->dpb_param.l.data[SLICE_TYPE] == I_Slice) + ? I_FLAG : 0; + + if ((hw->i_only & 0x2) && (I_flag & I_FLAG)) + flush_dpb(p_H264_Dpb); + + if ((hw->i_only & 0x2) && (!(I_flag & I_FLAG)) && + (p_H264_Dpb->mSlice.structure == FRAME)) { + hw->data_flag = NULL_FLAG; + goto pic_done_proc; + } slice_header_process_status = - h264_slice_header_process(p_H264_Dpb); + h264_slice_header_process(p_H264_Dpb, &frame_num_gap); if (hw->mmu_enable) hevc_sao_set_slice_type(hw, slice_header_process_status, @@ -4978,18 +5374,7 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) else p_H264_Dpb->fast_output_enable = fast_output_enable; - hw->data_flag = - (p_H264_Dpb-> - dpb_param.l.data[SLICE_TYPE] - == I_Slice) - ? I_FLAG : 0; - if ((hw->i_only & 0x2) && - (!(hw->data_flag & I_FLAG)) && - (p_H264_Dpb->mSlice.structure - == FRAME)) { - hw->data_flag = NULL_FLAG; - goto pic_done_proc; - } + hw->data_flag = I_flag; if ((p_H264_Dpb-> dpb_param.dpb.NAL_info_mmco & 0x1f) == 5) @@ -4999,17 +5384,16 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) "==================> frame count %d to skip %d\n", hw->decode_pic_count+1, hw->skip_frame_count); - } else { + } else if (error_proc_policy & 0x100){ struct StorablePicture *p = p_H264_Dpb->mVideo.dec_picture; unsigned mby_mbx = READ_VREG(MBY_MBX); unsigned decode_mb_count = - (((mby_mbx & 0xff) + 1) * + ((mby_mbx & 0xff) * hw->mb_width + (((mby_mbx >> 8) & 0xff) + 1)); - if ((error_proc_policy & 0x100) && - p_H264_Dpb->dpb_param.l. - data[FIRST_MB_IN_SLICE] - < decode_mb_count) { + if (decode_mb_count < + ((p_H264_Dpb->dpb_param.l.data[FIRST_MB_IN_SLICE]) * + (1 + p->mb_aff_frame_flag))) { dpb_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS, "Error detect! first_mb 0x%x mby_mbx 0x%x decode_mb 0x%x\n", @@ -5017,14 +5401,19 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) data[FIRST_MB_IN_SLICE], READ_VREG(MBY_MBX), decode_mb_count); - if (!p_H264_Dpb->dpb_param.l. - data[FIRST_MB_IN_SLICE]) { - p->data_flag |= ERROR_FLAG; - goto pic_done_proc; - } else - p->data_flag |= MAYBE_ERROR_FLAG; - } + p->data_flag |= ERROR_FLAG; + }/* else if (!p_H264_Dpb->dpb_param.l.data[FIRST_MB_IN_SLICE] && decode_mb_count) { + p->data_flag |= ERROR_FLAG; + goto pic_done_proc; + }*/ } + + if (!I_flag && frame_num_gap) { + hw->data_flag |= ERROR_FLAG; + p_H264_Dpb->mVideo.dec_picture->data_flag |= ERROR_FLAG; + dpb_print(DECODE_ID(hw), 0, "frame number gap error\n"); + } + if (error_proc_policy & 0x400) { int ret = dpb_check_ref_list_error(p_H264_Dpb); if (ret != 0) { @@ -5047,7 +5436,7 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) } } } - if ((error_proc_policy & 0x800) + if ((error_proc_policy & 0x800) && (!(hw->i_only & 0x2)) && p_H264_Dpb->dpb_error_flag != 0) { dpb_print(DECODE_ID(hw), 0, "dpb error %d\n", @@ -5073,6 +5462,7 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) if (error_proc_policy & 0x2) { release_cur_decoding_buf(hw); /*hw->data_flag |= ERROR_FLAG;*/ + hw->reset_bufmgr_flag = 1; hw->dec_result = DEC_RESULT_DONE; vdec_schedule_work(&hw->work); return IRQ_HANDLED; @@ -5089,139 +5479,40 @@ static irqreturn_t vh264_isr_thread_fn(struct vdec_s *vdec, int irq) hw->last_mby_mbx = 0; hw->last_vld_level = 0; start_process_time(hw); - } else if (dec_dpb_status == H264_PIC_DATA_DONE) { -pic_done_proc: - reset_process_time(hw); - if (p_H264_Dpb->mVideo.dec_picture) { -#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION - DEL_EXIST(hw, - p_H264_Dpb->mVideo.dec_picture) = 0; - if (vdec->master) { - struct vdec_h264_hw_s *hw_ba = - (struct vdec_h264_hw_s *) - vdec->master->private; - if (hw_ba->last_dec_picture) - DEL_EXIST(hw_ba, - hw_ba->last_dec_picture) - = 1; - } -#endif - mutex_lock(&hw->chunks_mutex); - if (hw->chunk) { - p_H264_Dpb->mVideo.dec_picture->pts = - hw->chunk->pts; - p_H264_Dpb->mVideo.dec_picture->pts64 = - hw->chunk->pts64; - p_H264_Dpb->mVideo.dec_picture->timestamp = - hw->chunk->timestamp; -#ifdef MH264_USERDATA_ENABLE - vmh264_udc_fill_vpts(hw, - p_H264_Dpb->mSlice.slice_type, - hw->chunk->pts, 1); -#endif - -#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION - } else if (vdec->master) { - /*dv enhance layer, - do not checkout pts*/ - struct StorablePicture *pic = - p_H264_Dpb->mVideo.dec_picture; - pic->pts = 0; - pic->pts64 = 0; -#endif - } else { - struct StorablePicture *pic = - p_H264_Dpb->mVideo.dec_picture; - u32 offset = pic->offset_delimiter_lo | - (pic->offset_delimiter_hi << 16); - if (pts_lookup_offset_us64(PTS_TYPE_VIDEO, - offset, &pic->pts, 0, &pic->pts64)) { - pic->pts = 0; - pic->pts64 = 0; -#ifdef MH264_USERDATA_ENABLE - vmh264_udc_fill_vpts(hw, - p_H264_Dpb->mSlice.slice_type, - pic->pts, 0); -#endif - } else { -#ifdef MH264_USERDATA_ENABLE - vmh264_udc_fill_vpts(hw, - p_H264_Dpb->mSlice.slice_type, - pic->pts, 1); -#endif + } else if (dec_dpb_status == H264_PIC_DATA_DONE + ||((dec_dpb_status == H264_DATA_REQUEST) && input_frame_based(vdec))) { +#ifdef DETECT_WRONG_MULTI_SLICE + dpb_print(DECODE_ID(hw), PRINT_FLAG_UCODE_EVT, + "%s MULTI_SLICE_DETECT (check_count %d slice_count %d cur_slice_count %d flag %d), H264_PIC_DATA_DONE\n", + __func__, + hw->multi_slice_pic_check_count, + hw->picture_slice_count, + hw->cur_picture_slice_count, + hw->multi_slice_pic_flag); + + if (hw->multi_slice_pic_check_count < check_slice_num) { + hw->multi_slice_pic_check_count++; + if (hw->cur_picture_slice_count != + hw->picture_slice_count) { + /*restart check count and set 'unknown'*/ + hw->multi_slice_pic_check_count = 0; + hw->multi_slice_pic_flag = 0; + } + hw->picture_slice_count = + hw->cur_picture_slice_count; + } else if (hw->multi_slice_pic_check_count >= check_slice_num) { + if (hw->picture_slice_count > 1) + hw->multi_slice_pic_flag = 2; + else + hw->multi_slice_pic_flag = 1; } - } - mutex_unlock(&hw->chunks_mutex); - check_decoded_pic_error(hw); -#ifdef ERROR_HANDLE_TEST - if ((hw->data_flag & ERROR_FLAG) - && (error_proc_policy & 0x80)) { - release_cur_decoding_buf(hw); - h264_clear_dpb(hw); - hw->dec_flag = 0; - hw->data_flag = 0; - hw->skip_frame_count = 0; - hw->has_i_frame = 0; - hw->no_error_count = 0xfff; - hw->no_error_i_count = 0xf; - } else #endif - ret = store_picture_in_dpb(p_H264_Dpb, - p_H264_Dpb->mVideo.dec_picture, - hw->data_flag | hw->dec_flag | - p_H264_Dpb->mVideo.dec_picture->data_flag); - +pic_done_proc: + reset_process_time(hw); + vh264_pic_done_proc(vdec); - if (ret == -1) { - release_cur_decoding_buf(hw); - bufmgr_force_recover(p_H264_Dpb); - } else { - if (hw->data_flag & ERROR_FLAG) { - hw->no_error_count = 0; - hw->no_error_i_count = 0; - } else { - hw->no_error_count++; - if (hw->data_flag & I_FLAG) - hw->no_error_i_count++; - } - if (hw->mmu_enable) - hevc_set_unused_4k_buff_idx(hw, - p_H264_Dpb->mVideo. - dec_picture->buf_spec_num); - bufmgr_post(p_H264_Dpb); - hw->last_dec_picture = - p_H264_Dpb->mVideo.dec_picture; - p_H264_Dpb->mVideo.dec_picture = NULL; - /* dump_dpb(&p_H264_Dpb->mDPB); */ - hw->has_i_frame = 1; - if (hw->mmu_enable) - hevc_set_frame_done(hw); - hw->decode_pic_count++; - p_H264_Dpb->decode_pic_count = hw->decode_pic_count; - if (hw->skip_frame_count > 0) { - /*skip n frame after first I */ - hw->skip_frame_count--; - if (hw->skip_frame_count == 0) - hw->dec_flag &= (~NODISP_FLAG); - } else if (hw->skip_frame_count < -1) { - /*skip n frame after first I until second I */ - hw->skip_frame_count++; - if (hw->skip_frame_count == -1) - hw->dec_flag &= (~NODISP_FLAG); - } - } - } - if (input_frame_based(vdec) && - frmbase_cont_bitlevel != 0 && - READ_VREG(VIFF_BIT_CNT) > - frmbase_cont_bitlevel) { - /*handle the case: multi pictures in one packet*/ - dpb_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS, - "%s H264_PIC_DATA_DONE decode slice count %d, continue (bitcnt 0x%x)\n", - __func__, - hw->decode_pic_count, - READ_VREG(VIFF_BIT_CNT)); + if (hw->frmbase_cont_flag) { /*do not DEC_RESULT_GET_DATA*/ hw->get_data_count = 0x7fffffff; WRITE_VREG(DPB_STATUS_REG, H264_ACTION_SEARCH_HEAD); @@ -5258,10 +5549,10 @@ pic_done_proc: hw->got_valid_nal = 1; } #endif - if (!hw->wait_for_udr_send) { - hw->dec_result = DEC_RESULT_DONE; - vdec_schedule_work(&hw->work); - } + + hw->dec_result = DEC_RESULT_DONE; + vdec_schedule_work(&hw->work); + #ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION } else if ( (dec_dpb_status == H264_FIND_NEXT_PIC_NAL) || @@ -5271,11 +5562,6 @@ pic_done_proc: } else if (dec_dpb_status == H264_AUX_DATA_READY) { reset_process_time(hw); if (READ_VREG(H264_AUX_DATA_SIZE) != 0) { - dma_sync_single_for_cpu( - amports_get_dma_device(), - hw->aux_phy_addr, - hw->prefix_aux_size + hw->suffix_aux_size, - DMA_FROM_DEVICE); if (dpb_is_debug(DECODE_ID(hw), PRINT_FLAG_DPB_DETAIL)) dump_aux_buf(hw); @@ -5317,8 +5603,11 @@ pic_done_proc: (dec_dpb_status == H264_DECODE_TIMEOUT)) { empty_proc: reset_process_time(hw); - - release_cur_decoding_buf(hw); + if ((error_proc_policy & 0x40000) && + dec_dpb_status == H264_DECODE_TIMEOUT) + goto pic_done_proc; + if (!hw->frmbase_cont_flag) + release_cur_decoding_buf(hw); if (input_frame_based(vdec) || (READ_VREG(VLD_MEM_VIFIFO_LEVEL) > 0x200)) { @@ -5349,12 +5638,20 @@ empty_proc: hw->decode_timeout_num++; else if (dec_dpb_status == H264_DECODE_BUFEMPTY) hw->decode_dataempty_num++; - - hw->data_flag |= ERROR_FLAG; + if (!hw->frmbase_cont_flag) + hw->data_flag |= ERROR_FLAG; vdec_schedule_work(&hw->work); } else { /* WRITE_VREG(DPB_STATUS_REG, H264_ACTION_INIT); */ +#ifdef DETECT_WRONG_MULTI_SLICE + if (hw->multi_slice_pic_flag == 1 && + hw->cur_picture_slice_count > 1 && + (error_proc_policy & 0x10000)) { + p_H264_Dpb->mVideo.pre_frame_num = hw->first_pre_frame_num; + } + hw->last_picture_slice_count = hw->cur_picture_slice_count; +#endif dpb_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS, "%s DEC_RESULT_AGAIN\n", __func__); send_again: @@ -5403,12 +5700,6 @@ send_again: u8 *trans_data_buf; u8 *sei_data_buf; u8 swap_byte; - - dma_sync_single_for_cpu( - amports_get_dma_device(), - hw->aux_phy_addr, - hw->prefix_aux_size + hw->suffix_aux_size, - DMA_FROM_DEVICE); #if 0 dump_aux_buf(hw); #endif @@ -5462,12 +5753,6 @@ send_again: if (debug_tag & 0x10000) { unsigned short *p = (unsigned short *)hw->lmem_addr; - dma_sync_single_for_cpu( - amports_get_dma_device(), - hw->lmem_addr_remap, - PAGE_SIZE, - DMA_FROM_DEVICE); - dpb_print(DECODE_ID(hw), 0, "LMEM<tag %x>:\n", debug_tag); for (i = 0; i < 0x400; i += 4) { @@ -5539,9 +5824,11 @@ static irqreturn_t vh264_isr(struct vdec_s *vdec, int irq) p_H264_Dpb->dec_dpb_status = READ_VREG(DPB_STATUS_REG); dpb_print(DECODE_ID(hw), PRINT_FLAG_UCODE_EVT, - "%s DPB_STATUS_REG: 0x%x, ERROR_STATUS_REG 0x%x, sb (0x%x 0x%x 0x%x) bitcnt 0x%x mby_mbx 0x%x\n", + "%s DPB_STATUS_REG: 0x%x, run(%d) last_state (%x) ERROR_STATUS_REG 0x%x, sb (0x%x 0x%x 0x%x) bitcnt 0x%x mby_mbx 0x%x\n", __func__, p_H264_Dpb->dec_dpb_status, + run_count[DECODE_ID(hw)], + hw->dec_result, READ_VREG(ERROR_STATUS_REG), READ_VREG(VLD_MEM_VIFIFO_LEVEL), READ_VREG(VLD_MEM_VIFIFO_WP), @@ -5561,6 +5848,13 @@ static irqreturn_t vh264_isr(struct vdec_s *vdec, int irq) static void timeout_process(struct vdec_h264_hw_s *hw) { + /* + * In this very timeout point,the vh264_work arrives, + * let it to handle the scenario. + */ + if (work_pending(&hw->work)) + return; + hw->timeout_num++; amvdec_stop(); if (hw->mmu_enable) { @@ -5572,8 +5866,9 @@ static void timeout_process(struct vdec_h264_hw_s *hw) release_cur_decoding_buf(hw); hw->dec_result = DEC_RESULT_DONE; hw->data_flag |= ERROR_FLAG; - reset_process_time(hw); - vdec_schedule_work(&hw->work); + if (work_pending(&hw->work)) + return; + vdec_schedule_work(&hw->timeout_work); } static void dump_bufspec(struct vdec_h264_hw_s *hw, @@ -5611,12 +5906,14 @@ static void vmh264_dump_state(struct vdec_s *vdec) dpb_print(DECODE_ID(hw), 0, "====== %s\n", __func__); dpb_print(DECODE_ID(hw), 0, - "width/height (%d/%d), reorder_pic_num %d dpb size(bufspec count) %d max_reference_size(collocate count) %d\n", + "width/height (%d/%d), reorder_pic_num %d dpb size(bufspec count) %d max_reference_size(collocate count) %d i_only %d send_err %d\n", hw->frame_width, hw->frame_height, hw->dpb.reorder_pic_num, hw->dpb.mDPB.size, - hw->max_reference_size + hw->max_reference_size, + hw->i_only, + hw->send_error_frame_flag ); dpb_print(DECODE_ID(hw), 0, @@ -5633,6 +5930,16 @@ static void vmh264_dump_state(struct vdec_s *vdec) hw->reset_bufmgr_count ); +#ifdef DETECT_WRONG_MULTI_SLICE + dpb_print(DECODE_ID(hw), 0, + "MULTI_SLICE_DETECT (check_count %d slice_count %d cur_slice_count %d flag %d)\n", + hw->multi_slice_pic_check_count, + hw->picture_slice_count, + hw->cur_picture_slice_count, + hw->multi_slice_pic_flag); +#endif + + if (vf_get_receiver(vdec->vf_provider_name)) { enum receviver_start_e state = vf_notify_receiver(vdec->vf_provider_name, @@ -5645,7 +5952,7 @@ static void vmh264_dump_state(struct vdec_s *vdec) } dpb_print(DECODE_ID(hw), 0, - "%s, newq(%d/%d), dispq(%d/%d) vf prepare/get/put (%d/%d/%d), free_spec(%d), initdon(%d), used_size(%d/%d), unused_fr_dpb(%d)\n", + "%s, newq(%d/%d), dispq(%d/%d) vf prepare/get/put (%d/%d/%d), free_spec(%d), initdon(%d), used_size(%d/%d), unused_fr_dpb(%d) fast_output_enable %x \n", __func__, kfifo_len(&hw->newframe_q), VF_POOL_SIZE, @@ -5657,7 +5964,8 @@ static void vmh264_dump_state(struct vdec_s *vdec) have_free_buf_spec(vdec), p_H264_Dpb->mDPB.init_done, p_H264_Dpb->mDPB.used_size, p_H264_Dpb->mDPB.size, - is_there_unused_frame_from_dpb(&p_H264_Dpb->mDPB) + is_there_unused_frame_from_dpb(&p_H264_Dpb->mDPB), + p_H264_Dpb->fast_output_enable ); dump_dpb(&p_H264_Dpb->mDPB, 1); @@ -5781,7 +6089,8 @@ static void check_timer_func(unsigned long arg) rval = 0; radr = 0; } - + if (h264_debug_flag & 0x800000) + pr_info("hw->start_process_time %ld timeout_val %d timeout_count %d mby_mbx 0x%x dpb status 0x%x\n",hw->start_process_time, timeout_val, hw->decode_timeout_count,READ_VREG(MBY_MBX),READ_VREG(DPB_STATUS_REG)); if ((input_frame_based(vdec) || (READ_VREG(VLD_MEM_VIFIFO_LEVEL) > 0xb0)) && ((h264_debug_flag & DISABLE_ERROR_HANDLE) == 0) && @@ -5793,12 +6102,17 @@ static void check_timer_func(unsigned long arg) u32 dpb_status = READ_VREG(DPB_STATUS_REG); u32 mby_mbx = READ_VREG(MBY_MBX); if ((dpb_status == H264_ACTION_DECODE_NEWPIC) || - (dpb_status == H264_ACTION_DECODE_SLICE)) { + (dpb_status == H264_ACTION_DECODE_SLICE) || + (dpb_status == H264_STATE_SEARCH_HEAD) || + (dpb_status == H264_SEI_DATA_DONE)) { + pr_info("%s dpb_status 0x%x\n", __func__, READ_VREG(DPB_STATUS_REG)); if (hw->last_mby_mbx == mby_mbx) { if (hw->decode_timeout_count > 0) hw->decode_timeout_count--; - if (hw->decode_timeout_count == 0) + if (hw->decode_timeout_count == 0) { + reset_process_time(hw); timeout_process(hw); + } } else start_process_time(hw); } else if (is_in_parsing_state(dpb_status)) { @@ -5806,8 +6120,10 @@ static void check_timer_func(unsigned long arg) READ_VREG(VLD_MEM_VIFIFO_LEVEL)) { if (hw->decode_timeout_count > 0) hw->decode_timeout_count--; - if (hw->decode_timeout_count == 0) + if (hw->decode_timeout_count == 0) { + reset_process_time(hw); timeout_process(hw); + } } } hw->last_vld_level = @@ -5989,7 +6305,7 @@ static int vh264_hw_ctx_restore(struct vdec_h264_hw_s *hw) else*/ CLEAR_VREG_MASK(AV_SCRATCH_F, 1 << 6); - WRITE_VREG(LMEM_DUMP_ADR, (u32)hw->lmem_addr_remap); + WRITE_VREG(LMEM_DUMP_ADR, (u32)hw->lmem_phy_addr); #if 1 /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */ WRITE_VREG(MDEC_PIC_DC_THRESH, 0x404038aa); #endif @@ -6067,7 +6383,7 @@ static void vh264_local_init(struct vdec_h264_hw_s *hw) */ hw->frame_dur = 96000/30; } - + hw->unstable_pts = (((unsigned long) hw->vh264_amstream_dec_info.param & 0x40) >> 6); hw->is_used_v4l = (((unsigned long) hw->vh264_amstream_dec_info.param & 0x80) >> 7); @@ -6093,7 +6409,7 @@ static void vh264_local_init(struct vdec_h264_hw_s *hw) if (error_proc_policy & 0x80000000) hw->send_error_frame_flag = error_proc_policy & 0x1; else if ((unsigned long) hw->vh264_amstream_dec_info.param & 0x20) - hw->send_error_frame_flag = 1; + hw->send_error_frame_flag = 0; /*Don't display mark err frames*/ INIT_KFIFO(hw->display_q); INIT_KFIFO(hw->newframe_q); @@ -6140,9 +6456,11 @@ static s32 vh264_init(struct vdec_h264_hw_s *hw) hw->stat |= STAT_ISR_REG; mutex_init(&hw->chunks_mutex); + hw->vf_pre_count = 0; vh264_local_init(hw); INIT_WORK(&hw->work, vh264_work); INIT_WORK(&hw->notify_work, vh264_notify_work); + INIT_WORK(&hw->timeout_work, vh264_timeout_work); if (!amvdec_enable_flag) { amvdec_enable_flag = true; @@ -6239,28 +6557,15 @@ static s32 vh264_init(struct vdec_h264_hw_s *hw) } #if 1 /* #ifdef BUFFER_MGR_IN_C */ - hw->lmem_addr = __get_free_page(GFP_KERNEL); - if (!hw->lmem_addr) { - pr_info("%s: failed to alloc lmem_addr\n", __func__); - return -ENOMEM; - } else { - hw->lmem_addr_remap = dma_map_single( - amports_get_dma_device(), - (void *)hw->lmem_addr, - PAGE_SIZE, DMA_FROM_DEVICE); - if (dma_mapping_error(amports_get_dma_device(), - hw->lmem_addr_remap)) { - dpb_print(DECODE_ID(hw), PRINT_FLAG_ERROR, - "%s: failed to map lmem_addr\n", __func__); - free_page(hw->lmem_addr); - hw->lmem_addr = 0; - hw->lmem_addr_remap = 0; - return -ENOMEM; - } + hw->lmem_addr = (dma_addr_t)dma_alloc_coherent(amports_get_dma_device(), + PAGE_SIZE, (dma_addr_t *)&hw->lmem_phy_addr, GFP_KERNEL); - pr_debug("%s, vaddr=%lx phy_addr=%p\n", - __func__, hw->lmem_addr, (void *)hw->lmem_addr_remap); + if (hw->lmem_addr == 0) { + pr_err("%s: failed to alloc lmem buffer\n", __func__); + return -1; } + pr_debug("%s, phy_addr=%lx vaddr=%p\n", + __func__, hw->lmem_phy_addr, (void *)hw->lmem_addr); if (prefix_aux_buf_size > 0 || suffix_aux_buf_size > 0) { @@ -6268,22 +6573,14 @@ static s32 vh264_init(struct vdec_h264_hw_s *hw) hw->prefix_aux_size = AUX_BUF_ALIGN(prefix_aux_buf_size); hw->suffix_aux_size = AUX_BUF_ALIGN(suffix_aux_buf_size); aux_buf_size = hw->prefix_aux_size + hw->suffix_aux_size; - hw->aux_addr = kmalloc(aux_buf_size, GFP_KERNEL); + hw->aux_addr = dma_alloc_coherent(amports_get_dma_device(), + aux_buf_size, &hw->aux_phy_addr, + GFP_KERNEL); if (hw->aux_addr == NULL) { pr_err("%s: failed to alloc rpm buffer\n", __func__); return -1; } - hw->aux_phy_addr = dma_map_single(amports_get_dma_device(), - hw->aux_addr, aux_buf_size, DMA_FROM_DEVICE); - if (dma_mapping_error(amports_get_dma_device(), - hw->aux_phy_addr)) { - pr_err("%s: failed to map rpm buffer\n", __func__); - kfree(hw->aux_addr); - hw->aux_addr = NULL; - return -1; - } - hw->sei_data_buf = kmalloc(SEI_DATA_SIZE, GFP_KERNEL); if (hw->sei_data_buf == NULL) { pr_err("%s: failed to alloc sei itu data buffer\n", @@ -6295,7 +6592,9 @@ static s32 vh264_init(struct vdec_h264_hw_s *hw) if (hw->sei_itu_data_buf == NULL) { pr_err("%s: failed to alloc sei itu data buffer\n", __func__); - kfree(hw->aux_addr); + dma_free_coherent(amports_get_dma_device(), + hw->prefix_aux_size + hw->suffix_aux_size, hw->aux_addr, + hw->aux_phy_addr); hw->aux_addr = NULL; kfree(hw->sei_data_buf); hw->sei_data_buf = NULL; @@ -6308,7 +6607,9 @@ static s32 vh264_init(struct vdec_h264_hw_s *hw) if (!hw->sei_user_data_buffer) { pr_info("%s: Can not allocate sei_data_buffer\n", __func__); - kfree(hw->aux_addr); + dma_free_coherent(amports_get_dma_device(), + hw->prefix_aux_size + hw->suffix_aux_size, hw->aux_addr, + hw->aux_phy_addr); hw->aux_addr = NULL; kfree(hw->sei_data_buf); hw->sei_data_buf = NULL; @@ -6339,8 +6640,9 @@ static int vh264_stop(struct vdec_h264_hw_s *hw) #ifdef VDEC_DW WRITE_VREG(MDEC_DOUBLEW_CFG0, 0); #endif - cancel_work_sync(&hw->work); cancel_work_sync(&hw->notify_work); + cancel_work_sync(&hw->timeout_work); + cancel_work_sync(&hw->work); if (hw->stat & STAT_MC_LOAD) { if (hw->mc_cpu_addr != NULL) { @@ -6361,22 +6663,17 @@ static int vh264_stop(struct vdec_h264_hw_s *hw) vdec_free_irq(VDEC_IRQ_1, (void *)hw); hw->stat &= ~STAT_ISR_REG; } - if (hw->lmem_addr_remap) { - dma_unmap_single(amports_get_dma_device(), - hw->lmem_addr_remap, - PAGE_SIZE, DMA_FROM_DEVICE); - hw->lmem_addr_remap = 0; - } if (hw->lmem_addr) { - free_page(hw->lmem_addr); + dma_free_coherent(amports_get_dma_device(), + PAGE_SIZE, (void *)hw->lmem_addr, + hw->lmem_phy_addr); + hw->lmem_addr = 0; } if (hw->aux_addr) { - dma_unmap_single(amports_get_dma_device(), - hw->aux_phy_addr, - hw->prefix_aux_size + hw->suffix_aux_size, - DMA_FROM_DEVICE); - kfree(hw->aux_addr); + dma_free_coherent(amports_get_dma_device(), + hw->prefix_aux_size + hw->suffix_aux_size, hw->aux_addr, + hw->aux_phy_addr); hw->aux_addr = NULL; } if (hw->sei_data_buf != NULL) { @@ -7085,12 +7382,29 @@ static void user_data_push_work(struct vdec_h264_hw_s *hw) */ } -static void vh264_work(struct work_struct *work) +static void wait_vmh264_search_done(struct vdec_h264_hw_s *hw) { - struct vdec_h264_hw_s *hw = container_of(work, - struct vdec_h264_hw_s, work); - struct vdec_s *vdec = hw_to_vdec(hw); + u32 vld_rp = READ_VREG(VLD_MEM_VIFIFO_RP); + int count = 0; + do { + usleep_range(100, 500); + if (vld_rp == READ_VREG(VLD_MEM_VIFIFO_RP)) + break; + if (count > 2000) { + dpb_print(DECODE_ID(hw), + PRINT_FLAG_ERROR, "%s timeout count %d vld_rp 0x%x VLD_MEM_VIFIFO_RP 0x%x\n", + __func__, count, vld_rp, READ_VREG(VLD_MEM_VIFIFO_RP)); + break; + } else + vld_rp = READ_VREG(VLD_MEM_VIFIFO_RP); + count++; + } while (1); +} +static void vh264_work_implement(struct vdec_h264_hw_s *hw, + struct vdec_s *vdec, int from) + +{ /* finished decoding one frame or error, * notify vdec core to switch context */ @@ -7112,8 +7426,9 @@ static void vh264_work(struct work_struct *work) u32 param3 = READ_VREG(AV_SCRATCH_6); u32 param4 = READ_VREG(AV_SCRATCH_B); if (vh264_set_params(hw, param1, - param2, param3, param4) < 0) - hw->stat |= DECODER_FATAL_ERROR_SIZE_OVERFLOW; + param2, param3, param4) < 0) + dpb_print(DECODE_ID(hw), 0, "set parameters error\n"); + WRITE_VREG(AV_SCRATCH_0, (hw->max_reference_size<<24) | (hw->dpb.mDPB.size<<16) | (hw->dpb.mDPB.size<<8)); @@ -7155,7 +7470,8 @@ static void vh264_work(struct work_struct *work) int r; int decode_size; r = vdec_prepare_input(vdec, &hw->chunk); - if (r < 0) { + if (r < 0 && (hw_to_vdec(hw)->next_status != + VDEC_STATUS_DISCONNECTED)) { hw->dec_result = DEC_RESULT_GET_DATA_RETRY; dpb_print(DECODE_ID(hw), @@ -7214,14 +7530,33 @@ static void vh264_work(struct work_struct *work) WRITE_VREG(DPB_STATUS_REG, H264_ACTION_SEARCH_HEAD); start_process_time(hw); } else{ - hw->dec_result = DEC_RESULT_GET_DATA_RETRY; - vdec_schedule_work(&hw->work); + if (hw_to_vdec(hw)->next_status + != VDEC_STATUS_DISCONNECTED) { + hw->dec_result = DEC_RESULT_GET_DATA_RETRY; + vdec_schedule_work(&hw->work); + } } return; } else if (hw->dec_result == DEC_RESULT_DONE) { /* if (!hw->ctx_valid) hw->ctx_valid = 1; */ result_done: + { + if (error_proc_policy & 0x8000) { + struct h264_dpb_stru *p_H264_Dpb = &hw->dpb; + int i; + struct DecodedPictureBuffer *p_Dpb = &p_H264_Dpb->mDPB; + + for (i = 0; i < p_Dpb->used_size; i++) { + if (p_Dpb->fs[i]->dpb_frame_count + 500 < p_H264_Dpb->dpb_frame_count) { + dpb_print(DECODE_ID(hw), + 0, + "unmark reference dpb_frame_count diffrence large in dpb\n"); + unmark_for_reference(p_Dpb, p_Dpb->fs[i]); + } + } + } + } if (hw->mmu_enable && hw->frame_busy && hw->frame_done) { long used_4k_num; @@ -7268,7 +7603,8 @@ result_done: stream base: stream buf empty or timeout frame base: vdec_prepare_input fail */ - if (!vdec_has_more_input(vdec)) { + if (!vdec_has_more_input(vdec) && (hw_to_vdec(hw)->next_status != + VDEC_STATUS_DISCONNECTED)) { hw->dec_result = DEC_RESULT_EOS; vdec_schedule_work(&hw->work); return; @@ -7304,10 +7640,14 @@ result_done: hw->stat &= ~STAT_ISR_REG; } } - + WRITE_VREG(ASSIST_MBOX1_MASK, 0); del_timer_sync(&hw->check_timer); hw->stat &= ~STAT_TIMER_ARM; - +#ifdef DETECT_WRONG_MULTI_SLICE + if (hw->dec_result != DEC_RESULT_AGAIN) + hw->last_picture_slice_count = 0; +#endif + wait_vmh264_search_done(hw); /* mark itself has all HW resource released and input released */ #ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION @@ -7320,6 +7660,17 @@ result_done: vdec_set_next_sched(vdec, vdec); #endif + if (from == 1) { + /* This is a timeout work */ + if (work_pending(&hw->work)) { + /* + * The vh264_work arrives at the last second, + * give it a chance to handle the scenario. + */ + return; + } + } + /* mark itself has all HW resource released and input released */ if (vdec->parallel_dec == 1) { if (hw->mmu_enable == 0) @@ -7334,6 +7685,28 @@ result_done: hw->vdec_cb(hw_to_vdec(hw), hw->vdec_cb_arg); } +static void vh264_work(struct work_struct *work) +{ + struct vdec_h264_hw_s *hw = container_of(work, + struct vdec_h264_hw_s, work); + struct vdec_s *vdec = hw_to_vdec(hw); + + vh264_work_implement(hw, vdec, 0); +} + + +static void vh264_timeout_work(struct work_struct *work) +{ + struct vdec_h264_hw_s *hw = container_of(work, + struct vdec_h264_hw_s, timeout_work); + struct vdec_s *vdec = hw_to_vdec(hw); + + if (work_pending(&hw->work)) + return; + + vh264_work_implement(hw, vdec, 1); +} + static unsigned long run_ready(struct vdec_s *vdec, unsigned long mask) { bool ret = 0; @@ -7405,10 +7778,36 @@ static unsigned long run_ready(struct vdec_s *vdec, unsigned long mask) } else ret = is_buffer_available(vdec); +#ifdef CONSTRAIN_MAX_BUF_NUM + if (hw->dpb.mDPB.size > 0) { /*make sure initilized*/ + if (run_ready_max_vf_only_num > 0 && + get_vf_ref_only_buf_count(hw) >= + run_ready_max_vf_only_num + ) + ret = 0; + if (run_ready_display_q_num > 0 && + kfifo_len(&hw->display_q) >= + run_ready_display_q_num) + ret = 0; + /*avoid more buffers consumed when + switching resolution*/ + if (run_ready_max_buf_num == 0xff && + get_used_buf_count(hw) >= + hw->dpb.mDPB.size) + ret = 0; + else if (run_ready_max_buf_num && + get_used_buf_count(hw) >= + run_ready_max_buf_num) + ret = 0; + } +#endif + if (ret) not_run_ready[DECODE_ID(hw)] = 0; - else + else { not_run_ready[DECODE_ID(hw)]++; + not_run_ready_cnt++; + } if (vdec->parallel_dec == 1) { if (hw->mmu_enable == 0) return ret ? (CORE_MASK_VDEC_1) : 0; @@ -7455,6 +7854,10 @@ static void run(struct vdec_s *vdec, unsigned long mask, hw->vdec_cb_arg = arg; hw->vdec_cb = callback; +#ifdef DETECT_WRONG_MULTI_SLICE + hw->cur_picture_slice_count = 0; +#endif + if (kfifo_len(&hw->display_q) > VF_POOL_SIZE) { hw->reset_bufmgr_flag = 1; dpb_print(DECODE_ID(hw), 0, @@ -7946,6 +8349,7 @@ static int ammvdec_h264_probe(struct platform_device *pdev) platform_set_drvdata(pdev, pdata); hw->mmu_enable = 0; + hw->first_head_check_flag = 0; if (force_enable_mmu && pdata->sys_info && (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TXLX) && (get_cpu_major_id() != AM_MESON_CPU_MAJOR_ID_GXLX) && @@ -7960,6 +8364,10 @@ static int ammvdec_h264_probe(struct platform_device *pdev) pdata->frame_base_video_path); } + jiffies_save = 0; + last_pic_pts = 0; + not_run_ready_cnt = 0; + not_run_ready_save = 0; if (ammvdec_h264_mmu_init(hw)) { h264_free_hw_stru(&pdev->dev, (void *)hw); pr_info("\nammvdec_h264 mmu alloc failed!\n"); @@ -8127,14 +8535,17 @@ static int ammvdec_h264_probe(struct platform_device *pdev) (u32)sei_data_buffer_remap); */ } #endif - pr_debug("ammvdec_h264 mem-addr=%lx,buff_offset=%x,buf_start=%lx\n", + dpb_print(DECODE_ID(hw), 0, "ammvdec_h264 mem-addr=%lx,buff_offset=%x,buf_start=%lx\n", pdata->mem_start, hw->buf_offset, hw->cma_alloc_addr); if (vdec_is_support_4k() || (clk_adj_frame_count > (VDEC_CLOCK_ADJUST_FRAME - 1))) vdec_source_changed(VFORMAT_H264, 3840, 2160, 60); - else + else if (pdata->sys_info->height * pdata->sys_info->width <= 1280 * 720) { + vdec_source_changed(VFORMAT_H264, 1280, 720, 29); + } else { vdec_source_changed(VFORMAT_H264, 1920, 1080, 29); + } if (vh264_init(hw) < 0) { pr_info("\nammvdec_h264 init failed.\n"); @@ -8177,12 +8588,13 @@ static int ammvdec_h264_remove(struct platform_device *pdev) if (vdec->next_status == VDEC_STATUS_DISCONNECTED && (vdec->status == VDEC_STATUS_ACTIVE)) { - pr_info("%s force exit %d\n", __func__, __LINE__); + dpb_print(DECODE_ID(hw), 0, + "%s force exit %d\n", __func__, __LINE__); hw->dec_result = DEC_RESULT_FORCE_EXIT; vdec_schedule_work(&hw->work); wait_event_interruptible_timeout(hw->wait_q, (vdec->status == VDEC_STATUS_CONNECTED), - msecs_to_jiffies(50)); /* wait for work done */ + msecs_to_jiffies(1000)); /* wait for work done */ } for (i = 0; i < BUFSPEC_POOL_SIZE; i++) @@ -8349,6 +8761,17 @@ MODULE_PARM_DESC(reorder_dpb_size_margin_dv, module_param(reference_buf_margin, uint, 0664); MODULE_PARM_DESC(reference_buf_margin, "\n ammvdec_h264 reference_buf_margin\n"); +#ifdef CONSTRAIN_MAX_BUF_NUM +module_param(run_ready_max_vf_only_num, uint, 0664); +MODULE_PARM_DESC(run_ready_max_vf_only_num, "\n run_ready_max_vf_only_num\n"); + +module_param(run_ready_display_q_num, uint, 0664); +MODULE_PARM_DESC(run_ready_display_q_num, "\n run_ready_display_q_num\n"); + +module_param(run_ready_max_buf_num, uint, 0664); +MODULE_PARM_DESC(run_ready_max_buf_num, "\n run_ready_max_buf_num\n"); +#endif + module_param(radr, uint, 0664); MODULE_PARM_DESC(radr, "\nradr\n"); @@ -8483,6 +8906,8 @@ MODULE_PARM_DESC(double_write_mode, "\n double_write_mode\n"); module_param(mem_map_mode, uint, 0664); MODULE_PARM_DESC(mem_map_mode, "\n mem_map_mode\n"); +module_param(check_slice_num, uint, 0664); +MODULE_PARM_DESC(check_slice_num, "\n check_slice_num\n"); module_init(ammvdec_h264_driver_init_module); module_exit(ammvdec_h264_driver_remove_module); diff --git a/drivers/frame_provider/decoder/h265/vh265.c b/drivers/frame_provider/decoder/h265/vh265.c index b29e56c..a1c345f 100644 --- a/drivers/frame_provider/decoder/h265/vh265.c +++ b/drivers/frame_provider/decoder/h265/vh265.c @@ -383,7 +383,7 @@ bit 0, fast output first I picture */ static u32 fast_output_enable = 1; -static u32 frmbase_cont_bitlevel = 0x60; +static u32 frmbase_cont_bitlevel = 0; /* use_cma: 1, use both reserver memory and cma for buffers @@ -5377,12 +5377,6 @@ static void set_aux_data(struct hevc_state_s *hevc, if (hevc->aux_data_dirty || hevc->m_ins_flag == 0) { - dma_sync_single_for_cpu( - amports_get_dma_device(), - hevc->aux_phy_addr, - hevc->prefix_aux_size + hevc->suffix_aux_size, - DMA_FROM_DEVICE); - hevc->aux_data_dirty = 0; } @@ -5590,6 +5584,7 @@ static inline void hevc_pre_pic(struct hevc_state_s *hevc, hevc->cur_pic->index, hevc->cur_pic->scatter_alloc, hevc->used_4k_num); + hevc_mmu_dma_check(hw_to_vdec(hevc)); decoder_mmu_box_free_idx_tail( hevc->mmu_box, hevc->cur_pic->index, @@ -6489,23 +6484,21 @@ static void hevc_local_uninit(struct hevc_state_s *hevc) uninit_detrefill_buf(hevc); #endif if (hevc->aux_addr) { - dma_unmap_single(amports_get_dma_device(), - hevc->aux_phy_addr, - hevc->prefix_aux_size + hevc->suffix_aux_size, - DMA_FROM_DEVICE); - kfree(hevc->aux_addr); + dma_free_coherent(amports_get_dma_device(), + hevc->prefix_aux_size + hevc->suffix_aux_size, hevc->aux_addr, + hevc->aux_phy_addr); hevc->aux_addr = NULL; } if (hevc->rpm_addr) { - dma_unmap_single(amports_get_dma_device(), - hevc->rpm_phy_addr, RPM_BUF_SIZE, DMA_FROM_DEVICE); - kfree(hevc->rpm_addr); + dma_free_coherent(amports_get_dma_device(), + RPM_BUF_SIZE, hevc->rpm_addr, + hevc->rpm_phy_addr); hevc->rpm_addr = NULL; } if (hevc->lmem_addr) { - dma_unmap_single(amports_get_dma_device(), - hevc->lmem_phy_addr, LMEM_BUF_SIZE, DMA_FROM_DEVICE); - kfree(hevc->lmem_addr); + dma_free_coherent(amports_get_dma_device(), + RPM_BUF_SIZE, hevc->lmem_addr, + hevc->lmem_phy_addr); hevc->lmem_addr = NULL; } @@ -6556,22 +6549,13 @@ static int hevc_local_init(struct hevc_state_s *hevc) video_signal_type = hevc->video_signal_type; if ((get_dbg_flag(hevc) & H265_DEBUG_SEND_PARAM_WITH_REG) == 0) { - hevc->rpm_addr = kmalloc(RPM_BUF_SIZE, GFP_KERNEL); + hevc->rpm_addr = dma_alloc_coherent(amports_get_dma_device(), + RPM_BUF_SIZE, &hevc->rpm_phy_addr, GFP_KERNEL); if (hevc->rpm_addr == NULL) { pr_err("%s: failed to alloc rpm buffer\n", __func__); return -1; } - hevc->rpm_phy_addr = dma_map_single(amports_get_dma_device(), - hevc->rpm_addr, RPM_BUF_SIZE, DMA_FROM_DEVICE); - if (dma_mapping_error(amports_get_dma_device(), - hevc->rpm_phy_addr)) { - pr_err("%s: failed to map rpm buffer\n", __func__); - kfree(hevc->rpm_addr); - hevc->rpm_addr = NULL; - return -1; - } - hevc->rpm_ptr = hevc->rpm_addr; } @@ -6582,37 +6566,20 @@ static int hevc_local_init(struct hevc_state_s *hevc) hevc->prefix_aux_size = AUX_BUF_ALIGN(prefix_aux_buf_size); hevc->suffix_aux_size = AUX_BUF_ALIGN(suffix_aux_buf_size); aux_buf_size = hevc->prefix_aux_size + hevc->suffix_aux_size; - hevc->aux_addr = kmalloc(aux_buf_size, GFP_KERNEL); + hevc->aux_addr = dma_alloc_coherent(amports_get_dma_device(), + aux_buf_size, &hevc->aux_phy_addr, GFP_KERNEL); if (hevc->aux_addr == NULL) { pr_err("%s: failed to alloc rpm buffer\n", __func__); return -1; } - - hevc->aux_phy_addr = dma_map_single(amports_get_dma_device(), - hevc->aux_addr, aux_buf_size, DMA_FROM_DEVICE); - if (dma_mapping_error(amports_get_dma_device(), - hevc->aux_phy_addr)) { - pr_err("%s: failed to map rpm buffer\n", __func__); - kfree(hevc->aux_addr); - hevc->aux_addr = NULL; - return -1; - } } - hevc->lmem_addr = kmalloc(LMEM_BUF_SIZE, GFP_KERNEL); + hevc->lmem_addr = dma_alloc_coherent(amports_get_dma_device(), + LMEM_BUF_SIZE, &hevc->lmem_phy_addr, GFP_KERNEL); if (hevc->lmem_addr == NULL) { pr_err("%s: failed to alloc lmem buffer\n", __func__); return -1; } - hevc->lmem_phy_addr = dma_map_single(amports_get_dma_device(), - hevc->lmem_addr, LMEM_BUF_SIZE, DMA_FROM_DEVICE); - if (dma_mapping_error(amports_get_dma_device(), - hevc->lmem_phy_addr)) { - pr_err("%s: failed to map lmem buffer\n", __func__); - kfree(hevc->lmem_addr); - hevc->lmem_addr = NULL; - return -1; - } hevc->lmem_ptr = hevc->lmem_addr; if (hevc->mmu_enable) { @@ -8971,12 +8938,6 @@ pic_done: if (get_dbg_flag(hevc) & H265_DEBUG_SEND_PARAM_WITH_REG) get_rpm_param(&hevc->param); else { - dma_sync_single_for_cpu( - amports_get_dma_device(), - hevc->rpm_phy_addr, - RPM_BUF_SIZE, - DMA_FROM_DEVICE); - for (i = 0; i < (RPM_END - RPM_BEGIN); i += 4) { int ii; @@ -8987,11 +8948,6 @@ pic_done: } } #ifdef SEND_LMEM_WITH_RPM - dma_sync_single_for_cpu( - amports_get_dma_device(), - hevc->lmem_phy_addr, - LMEM_BUF_SIZE, - DMA_FROM_DEVICE); check_head_error(hevc); #endif } @@ -9020,11 +8976,6 @@ pic_done: #endif aux_data_is_avaible(hevc) ) { - dma_sync_single_for_cpu( - amports_get_dma_device(), - hevc->aux_phy_addr, - hevc->prefix_aux_size + hevc->suffix_aux_size, - DMA_FROM_DEVICE); if (get_dbg_flag(hevc) & H265_DEBUG_BUFMGR_MORE) dump_aux_buf(hevc); @@ -9076,7 +9027,7 @@ pic_done: vui_num_units_in_tick, vui_time_scale); if (hevc->get_frame_dur != true) - schedule_work( + vdec_schedule_work( &hevc->notify_work); hevc->get_frame_dur = true; @@ -9285,12 +9236,6 @@ static irqreturn_t vh265_isr(int irq, void *data) debug_tag = READ_HREG(DEBUG_REG1); if (debug_tag & 0x10000) { - dma_sync_single_for_cpu( - amports_get_dma_device(), - hevc->lmem_phy_addr, - LMEM_BUF_SIZE, - DMA_FROM_DEVICE); - hevc_print(hevc, 0, "LMEM<tag %x>:\n", READ_HREG(DEBUG_REG1)); @@ -9599,7 +9544,7 @@ static void vh265_check_timer_func(unsigned long arg) } /*don't changed at start.*/ if (hevc->m_ins_flag == 0) - schedule_work(&hevc->set_clk_work); + vdec_schedule_work(&hevc->set_clk_work); mod_timer(timer, jiffies + PUT_INTERVAL); } @@ -10394,9 +10339,9 @@ static int vmh265_stop(struct hevc_state_s *hevc) } hevc->init_flag = 0; hevc->first_sc_checked = 0; - cancel_work_sync(&hevc->work); cancel_work_sync(&hevc->notify_work); cancel_work_sync(&hevc->set_clk_work); + cancel_work_sync(&hevc->work); uninit_mmu_buffers(hevc); vfree(hevc->fw); @@ -10660,6 +10605,8 @@ static void vh265_work(struct work_struct *work) hevc->cur_pic->index, hevc->cur_pic->scatter_alloc, hevc->used_4k_num); + if (hevc->m_ins_flag) + hevc_mmu_dma_check(hw_to_vdec(hevc)); decoder_mmu_box_free_idx_tail( hevc->mmu_box, hevc->cur_pic->index, diff --git a/drivers/frame_provider/decoder/mjpeg/vmjpeg_multi.c b/drivers/frame_provider/decoder/mjpeg/vmjpeg_multi.c index a3e2053..0a0fad4 100644 --- a/drivers/frame_provider/decoder/mjpeg/vmjpeg_multi.c +++ b/drivers/frame_provider/decoder/mjpeg/vmjpeg_multi.c @@ -1052,8 +1052,6 @@ static void vmjpeg_work(struct work_struct *work) pr_info("%s: force exit\n", __func__); if (hw->stat & STAT_ISR_REG) { amvdec_stop(); - /*disable mbox interrupt */ - WRITE_VREG(ASSIST_MBOX1_MASK, 0); vdec_free_irq(VDEC_IRQ_1, (void *)hw); hw->stat &= ~STAT_ISR_REG; } @@ -1071,6 +1069,8 @@ static void vmjpeg_work(struct work_struct *work) amvdec_stop(); hw->stat &= ~STAT_VDEC_RUN; } + /*disable mbox interrupt */ + WRITE_VREG(ASSIST_MBOX1_MASK, 0); wait_vmjpeg_search_done(hw); /* mark itself has all HW resource released and input released */ if (vdec->parallel_dec == 1) diff --git a/drivers/frame_provider/decoder/utils/amvdec.c b/drivers/frame_provider/decoder/utils/amvdec.c index 1d4e6f5..3a070d1 100644 --- a/drivers/frame_provider/decoder/utils/amvdec.c +++ b/drivers/frame_provider/decoder/utils/amvdec.c @@ -81,7 +81,7 @@ static void amvdec_pg_enable(bool enable) } else { AMVDEC_CLK_GATE_OFF(AMRISC); - timeout = jiffies + HZ / 100; + timeout = jiffies + HZ / 10; while (READ_VREG(MDEC_PIC_DC_STATUS) != 0) { if (time_after(jiffies, timeout)) { @@ -95,7 +95,7 @@ static void amvdec_pg_enable(bool enable) } AMVDEC_CLK_GATE_OFF(MDEC_CLK_PIC_DC); - timeout = jiffies + HZ / 100; + timeout = jiffies + HZ / 10; while (READ_VREG(DBLK_STATUS) & 1) { if (time_after(jiffies, timeout)) { @@ -108,7 +108,7 @@ static void amvdec_pg_enable(bool enable) } } AMVDEC_CLK_GATE_OFF(MDEC_CLK_DBLK); - timeout = jiffies + HZ / 100; + timeout = jiffies + HZ / 10; while (READ_VREG(MC_STATUS0) & 1) { if (time_after(jiffies, timeout)) { @@ -121,7 +121,7 @@ static void amvdec_pg_enable(bool enable) } } AMVDEC_CLK_GATE_OFF(MC_CLK); - timeout = jiffies + HZ / 100; + timeout = jiffies + HZ / 10; while (READ_VREG(DCAC_DMA_CTRL) & 0x8000) { if (time_after(jiffies, timeout)) break; @@ -810,7 +810,7 @@ EXPORT_SYMBOL(amhevc_start); void amvdec_stop(void) { - ulong timeout = jiffies + HZ/10; + ulong timeout = jiffies + HZ / 10; WRITE_VREG(MPSR, 0); WRITE_VREG(CPSR, 0); @@ -820,7 +820,7 @@ void amvdec_stop(void) break; } - timeout = jiffies + HZ/10; + timeout = jiffies + HZ / 10; while (READ_VREG(LMEM_DMA_CTRL) & 0x8000) { if (time_after(jiffies, timeout)) break; @@ -859,7 +859,7 @@ EXPORT_SYMBOL(amvdec_stop); void amvdec2_stop(void) { if (has_vdec2()) { - ulong timeout = jiffies + HZ/10; + ulong timeout = jiffies + HZ / 10; WRITE_VREG(VDEC2_MPSR, 0); WRITE_VREG(VDEC2_CPSR, 0); @@ -889,7 +889,7 @@ EXPORT_SYMBOL(amhcodec_stop); void amhevc_stop(void) { if (has_hevc_vdec()) { - ulong timeout = jiffies + HZ/10; + ulong timeout = jiffies + HZ / 10; WRITE_VREG(HEVC_MPSR, 0); WRITE_VREG(HEVC_CPSR, 0); @@ -899,7 +899,7 @@ void amhevc_stop(void) break; } - timeout = jiffies + HZ/10; + timeout = jiffies + HZ / 10; while (READ_VREG(HEVC_LMEM_DMA_CTRL) & 0x8000) { if (time_after(jiffies, timeout)) break; diff --git a/drivers/frame_provider/decoder/utils/vdec.c b/drivers/frame_provider/decoder/utils/vdec.c index 51dca34..fc160e3 100644 --- a/drivers/frame_provider/decoder/utils/vdec.c +++ b/drivers/frame_provider/decoder/utils/vdec.c @@ -86,13 +86,16 @@ static unsigned int clk_config; &2: always reload firmware. &4: vdec canvas debug enable */ -static unsigned int debug = 2; +static unsigned int debug; static int hevc_max_reset_count; #define MAX_INSTANCE_MUN 9 static int no_powerdown; static int parallel_decode = 1; + +static int force_nosecure_even_drm; + static DEFINE_SPINLOCK(vdec_spin_lock); #define HEVC_TEST_LIMIT 100 @@ -350,8 +353,115 @@ static void free_canvas_ex(int index, int id) } +static void vdec_dmc_pipeline_reset(void) +{ + /* + * bit15: vdec_piple + * bit14: hevc_dmc_piple + * bit13: hevcf_dmc_pipl + * bit12: wave420_dmc_pipl + * bit11: hcodec_dmc_pipl + */ + + WRITE_RESET_REG(RESET7_REGISTER, + (1 << 15) | (1 << 14) | (1 << 13) | + (1 << 12) | (1 << 11)); +} + +static void vdec_stop_armrisc(int hw) +{ + ulong timeout = jiffies + HZ; + + if (hw == VDEC_INPUT_TARGET_VLD) { + WRITE_VREG(MPSR, 0); + WRITE_VREG(CPSR, 0); + + while (READ_VREG(IMEM_DMA_CTRL) & 0x8000) { + if (time_after(jiffies, timeout)) + break; + } + + timeout = jiffies + HZ; + while (READ_VREG(LMEM_DMA_CTRL) & 0x8000) { + if (time_after(jiffies, timeout)) + break; + } + } else if (hw == VDEC_INPUT_TARGET_HEVC) { + WRITE_VREG(HEVC_MPSR, 0); + WRITE_VREG(HEVC_CPSR, 0); + + while (READ_VREG(HEVC_IMEM_DMA_CTRL) & 0x8000) { + if (time_after(jiffies, timeout)) + break; + } + + timeout = jiffies + HZ/10; + while (READ_VREG(HEVC_LMEM_DMA_CTRL) & 0x8000) { + if (time_after(jiffies, timeout)) + break; + } + } +} + +static void vdec_disable_DMC(struct vdec_s *vdec) +{ + /*close first,then wait pedding end,timing suggestion from vlsi*/ + struct vdec_input_s *input = &vdec->input; + unsigned long flags; + unsigned int mask = 0; + + if (input->target == VDEC_INPUT_TARGET_VLD) { + mask = (1 << 13); + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) + mask = (1 << 21); + } else if (input->target == VDEC_INPUT_TARGET_HEVC) { + mask = (1 << 4); /*hevc*/ + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) + mask |= (1 << 8); /*hevcb */ + } + /* need to stop armrisc. */ + if (!IS_ERR_OR_NULL(vdec->dev)) + vdec_stop_armrisc(input->target); + spin_lock_irqsave(&vdec_spin_lock, flags); + codec_dmcbus_write(DMC_REQ_CTRL, + codec_dmcbus_read(DMC_REQ_CTRL) & ~mask); + spin_unlock_irqrestore(&vdec_spin_lock, flags); + + while (!(codec_dmcbus_read(DMC_CHAN_STS) + & mask)) + ; + + pr_debug("%s input->target= 0x%x\n", __func__, input->target); +} + +static void vdec_enable_DMC(struct vdec_s *vdec) +{ + struct vdec_input_s *input = &vdec->input; + unsigned long flags; + unsigned int mask = 0; + + if (input->target == VDEC_INPUT_TARGET_VLD) { + mask = (1 << 13); + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) + mask = (1 << 21); + } else if (input->target == VDEC_INPUT_TARGET_HEVC) { + mask = (1 << 4); /*hevc*/ + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) + mask |= (1 << 8); /*hevcb */ + } + + /*must to be reset the dmc pipeline if it's g12b.*/ + if (get_cpu_type() == AM_MESON_CPU_MAJOR_ID_G12B) + vdec_dmc_pipeline_reset(); + + spin_lock_irqsave(&vdec_spin_lock, flags); + codec_dmcbus_write(DMC_REQ_CTRL, + codec_dmcbus_read(DMC_REQ_CTRL) | mask); + spin_unlock_irqrestore(&vdec_spin_lock, flags); + pr_debug("%s input->target= 0x%x\n", __func__, input->target); +} static int vdec_get_hw_type(int value) { @@ -1315,13 +1425,19 @@ EXPORT_SYMBOL(vdec_need_more_data); void hevc_wait_ddr(void) { unsigned long flags; + unsigned int mask = 0; + + mask = 1 << 4; /* hevc */ + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) + mask |= (1 << 8); /* hevcb */ + spin_lock_irqsave(&vdec_spin_lock, flags); codec_dmcbus_write(DMC_REQ_CTRL, - codec_dmcbus_read(DMC_REQ_CTRL) & (~(1 << 4))); + codec_dmcbus_read(DMC_REQ_CTRL) & ~mask); spin_unlock_irqrestore(&vdec_spin_lock, flags); while (!(codec_dmcbus_read(DMC_CHAN_STS) - & (1 << 4))) + & mask)) ; } @@ -1371,6 +1487,8 @@ void vdec_save_input_context(struct vdec_s *vdec) vdec->input.streaming_rp &= 0xffffffffULL << 32; vdec->input.streaming_rp |= vdec->input.stream_cookie; vdec->input.total_rd_count = vdec->input.streaming_rp; + + hevc_wait_ddr(); } input->swap_valid = true; @@ -1386,8 +1504,6 @@ void vdec_save_input_context(struct vdec_s *vdec) /* pr_info("master->input.last_swap_slave = %d\n", master->input.last_swap_slave); */ } - - hevc_wait_ddr(); } } EXPORT_SYMBOL(vdec_save_input_context); @@ -1407,6 +1523,64 @@ void vdec_clean_input(struct vdec_s *vdec) vdec_save_input_context(vdec); } EXPORT_SYMBOL(vdec_clean_input); +static int vdec_input_read_restore(struct vdec_s *vdec) +{ + struct vdec_input_s *input = &vdec->input; + + if (!vdec_stream_based(vdec)) + return 0; + + if (!input->swap_valid) { + if (input->target == VDEC_INPUT_TARGET_VLD) { + WRITE_VREG(VLD_MEM_VIFIFO_START_PTR, + input->start); + WRITE_VREG(VLD_MEM_VIFIFO_END_PTR, + input->start + input->size - 8); + WRITE_VREG(VLD_MEM_VIFIFO_CURR_PTR, + input->start); + WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 1); + WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0); + + /* set to manual mode */ + WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2); + WRITE_VREG(VLD_MEM_VIFIFO_RP, input->start); + } else if (input->target == VDEC_INPUT_TARGET_HEVC) { + WRITE_VREG(HEVC_STREAM_START_ADDR, + input->start); + WRITE_VREG(HEVC_STREAM_END_ADDR, + input->start + input->size); + WRITE_VREG(HEVC_STREAM_RD_PTR, + input->start); + } + return 0; + } + if (input->target == VDEC_INPUT_TARGET_VLD) { + /* restore read side */ + WRITE_VREG(VLD_MEM_SWAP_ADDR, + input->swap_page_phys); + + /*swap active*/ + WRITE_VREG(VLD_MEM_SWAP_CTL, 1); + + /*wait swap busy*/ + while (READ_VREG(VLD_MEM_SWAP_CTL) & (1<<7)) + ; + + WRITE_VREG(VLD_MEM_SWAP_CTL, 0); + } else if (input->target == VDEC_INPUT_TARGET_HEVC) { + /* restore read side */ + WRITE_VREG(HEVC_STREAM_SWAP_ADDR, + input->swap_page_phys); + WRITE_VREG(HEVC_STREAM_SWAP_CTRL, 1); + + while (READ_VREG(HEVC_STREAM_SWAP_CTRL) + & (1<<7)) + ; + WRITE_VREG(HEVC_STREAM_SWAP_CTRL, 0); + } + + return 0; +} int vdec_sync_input(struct vdec_s *vdec) { @@ -1414,6 +1588,7 @@ int vdec_sync_input(struct vdec_s *vdec) u32 rp = 0, wp = 0, fifo_len = 0; int size; + vdec_input_read_restore(vdec); vdec_sync_input_read(vdec); vdec_sync_input_write(vdec); if (input->target == VDEC_INPUT_TARGET_VLD) { @@ -1650,6 +1825,8 @@ s32 vdec_init(struct vdec_s *vdec, int is_4k) mutex_lock(&vdec_mutex); inited_vcodec_num++; mutex_unlock(&vdec_mutex); + if (vdec_single(vdec)) + vdec_enable_DMC(vdec); vdec_input_set_type(&vdec->input, vdec->type, (vdec->format == VFORMAT_HEVC || @@ -1908,6 +2085,8 @@ void vdec_release(struct vdec_s *vdec) while ((atomic_read(&vdec->inirq_flag) > 0) || (atomic_read(&vdec->inirq_thread_flag) > 0)) schedule(); + if (atomic_read(&vdec_core->vdec_nr) == 1) + vdec_disable_DMC(vdec); platform_device_unregister(vdec->dev); pr_debug("vdec_release instance %p, total %d\n", vdec, @@ -2090,8 +2269,10 @@ static irqreturn_t vdec_isr(int irq, void *dev_id) vdec = NULL; } - if (vdec) + if (vdec) { atomic_set(&vdec->inirq_flag, 1); + vdec->isr_ns = local_clock(); + } if (c->dev_isr) { ret = c->dev_isr(irq, c->dev_id); goto isr_done; @@ -2144,8 +2325,15 @@ static irqreturn_t vdec_thread_isr(int irq, void *dev_id) vdec = NULL; } - if (vdec) + if (vdec) { + u32 isr2tfn = 0; atomic_set(&vdec->inirq_thread_flag, 1); + vdec->tfn_ns = local_clock(); + isr2tfn = vdec->tfn_ns - vdec->isr_ns; + if (isr2tfn > 10000000) + pr_err("!!!!!!! %s vdec_isr to %s took %uns !!!\n", + vdec->vf_provider_name, __func__, isr2tfn); + } if (c->dev_threaded_isr) { ret = c->dev_threaded_isr(irq, c->dev_id); goto thread_isr_done; @@ -2281,6 +2469,15 @@ void vdec_prepare_run(struct vdec_s *vdec, unsigned long mask) if (!vdec_core_with_input(mask)) return; + if (secure && vdec_stream_based(vdec) && force_nosecure_even_drm) + { + /* Verimatrix ultra webclient (HLS) was played in drmmode and used hw demux. In drmmode VDEC only can access secure. + Now HW demux parsed es data to no-secure buffer. So the VDEC input was no-secure, VDEC playback failed. Forcing + use nosecure for verimatrix webclient HLS. If in the future HW demux can parse es data to secure buffer, make + VDEC r/w secure.*/ + secure = 0; + //pr_debug("allow VDEC can access nosecure even in drmmode\n"); + } if (input->target == VDEC_INPUT_TARGET_VLD) tee_config_device_secure(DMC_DEV_ID_VDEC, secure); else if (input->target == VDEC_INPUT_TARGET_HEVC) @@ -2707,18 +2904,6 @@ void vdec_poweron(enum vdec_type_e core) READ_AOREG(AO_RTI_GEN_PWR_ISO0) & ~0xC0); /* reset DOS top registers */ WRITE_VREG(DOS_VDEC_MCRCC_STALL_CTRL, 0); - if (get_cpu_major_id() >= - AM_MESON_CPU_MAJOR_ID_GXBB) { - /* - *enable VDEC_1 DMC request - */ - unsigned long flags; - - spin_lock_irqsave(&vdec_spin_lock, flags); - codec_dmcbus_write(DMC_REQ_CTRL, - codec_dmcbus_read(DMC_REQ_CTRL) | (1 << 13)); - spin_unlock_irqrestore(&vdec_spin_lock, flags); - } } else if (core == VDEC_2) { if (has_vdec2()) { /* vdec2 power on */ @@ -2851,17 +3036,6 @@ void vdec_poweroff(enum vdec_type_e core) } if (core == VDEC_1) { - if (get_cpu_major_id() >= - AM_MESON_CPU_MAJOR_ID_GXBB) { - /* disable VDEC_1 DMC REQ*/ - unsigned long flags; - - spin_lock_irqsave(&vdec_spin_lock, flags); - codec_dmcbus_write(DMC_REQ_CTRL, - codec_dmcbus_read(DMC_REQ_CTRL) & (~(1 << 13))); - spin_unlock_irqrestore(&vdec_spin_lock, flags); - udelay(10); - } /* enable vdec1 isolation */ WRITE_AOREG(AO_RTI_GEN_PWR_ISO0, READ_AOREG(AO_RTI_GEN_PWR_ISO0) | 0xc0); @@ -3059,42 +3233,21 @@ int vdec_source_changed(int format, int width, int height, int fps) } EXPORT_SYMBOL(vdec_source_changed); -void vdec_disable_DMC(struct vdec_s *vdec) -{ - /*close first,then wait pedding end,timing suggestion from vlsi*/ - unsigned long flags; - spin_lock_irqsave(&vdec_spin_lock, flags); - codec_dmcbus_write(DMC_REQ_CTRL, - codec_dmcbus_read(DMC_REQ_CTRL) & (~(1 << 13))); - spin_unlock_irqrestore(&vdec_spin_lock, flags); - - while (!(codec_dmcbus_read(DMC_CHAN_STS) - & (1 << 13))) - ; -} -EXPORT_SYMBOL(vdec_disable_DMC); - -void vdec_enable_DMC(struct vdec_s *vdec) -{ - unsigned long flags; - spin_lock_irqsave(&vdec_spin_lock, flags); - codec_dmcbus_write(DMC_REQ_CTRL, - codec_dmcbus_read(DMC_REQ_CTRL) | (1 << 13)); - spin_unlock_irqrestore(&vdec_spin_lock, flags); -} - -EXPORT_SYMBOL(vdec_enable_DMC); - void vdec_reset_core(struct vdec_s *vdec) { unsigned long flags; + unsigned int mask = 0; + + mask = 1 << 13; /*bit13: DOS VDEC interface*/ + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) + mask = 1 << 21; /*bit21: DOS VDEC interface*/ spin_lock_irqsave(&vdec_spin_lock, flags); codec_dmcbus_write(DMC_REQ_CTRL, - codec_dmcbus_read(DMC_REQ_CTRL) & (~(1 << 13))); + codec_dmcbus_read(DMC_REQ_CTRL) & ~mask); spin_unlock_irqrestore(&vdec_spin_lock, flags); while (!(codec_dmcbus_read(DMC_CHAN_STS) - & (1 << 13))) + & mask)) ; /* * 2: assist @@ -3119,22 +3272,63 @@ void vdec_reset_core(struct vdec_s *vdec) spin_lock_irqsave(&vdec_spin_lock, flags); codec_dmcbus_write(DMC_REQ_CTRL, - codec_dmcbus_read(DMC_REQ_CTRL) | (1 << 13)); + codec_dmcbus_read(DMC_REQ_CTRL) | mask); spin_unlock_irqrestore(&vdec_spin_lock, flags); } EXPORT_SYMBOL(vdec_reset_core); +void hevc_mmu_dma_check(struct vdec_s *vdec) +{ + ulong timeout; + u32 data; + if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_G12A) + return; + timeout = jiffies + HZ/100; + while (1) { + data = READ_VREG(HEVC_CM_CORE_STATUS); + if ((data & 0x1) == 0) + break; + if (time_after(jiffies, timeout)) { + if (debug & 0x10) + pr_info(" %s sao mmu dma idle\n", __func__); + break; + } + } + /*disable sao mmu dma */ + CLEAR_VREG_MASK(HEVC_SAO_MMU_DMA_CTRL, 1 << 0); + timeout = jiffies + HZ/100; + while (1) { + data = READ_VREG(HEVC_SAO_MMU_DMA_STATUS); + if ((data & 0x1)) + break; + if (time_after(jiffies, timeout)) { + if (debug & 0x10) + pr_err("%s sao mmu dma timeout, num_buf_used = 0x%x\n", + __func__, (READ_VREG(HEVC_SAO_MMU_STATUS) >> 16)); + break; + } + } +} +EXPORT_SYMBOL(hevc_mmu_dma_check); + + void hevc_reset_core(struct vdec_s *vdec) { unsigned long flags; + unsigned int mask = 0; + + mask = 1 << 4; /*bit4: hevc*/ + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) + mask |= 1 << 8; /*bit8: hevcb*/ + WRITE_VREG(HEVC_STREAM_CONTROL, 0); spin_lock_irqsave(&vdec_spin_lock, flags); codec_dmcbus_write(DMC_REQ_CTRL, - codec_dmcbus_read(DMC_REQ_CTRL) & (~(1 << 4))); + codec_dmcbus_read(DMC_REQ_CTRL) & ~mask); spin_unlock_irqrestore(&vdec_spin_lock, flags); while (!(codec_dmcbus_read(DMC_CHAN_STS) - & (1 << 4))) + & mask)) ; if (vdec == NULL || input_frame_based(vdec)) @@ -3165,7 +3359,7 @@ void hevc_reset_core(struct vdec_s *vdec) spin_lock_irqsave(&vdec_spin_lock, flags); codec_dmcbus_write(DMC_REQ_CTRL, - codec_dmcbus_read(DMC_REQ_CTRL) | (1 << 4)); + codec_dmcbus_read(DMC_REQ_CTRL) | mask); spin_unlock_irqrestore(&vdec_spin_lock, flags); } @@ -4075,7 +4269,7 @@ static struct class_attribute vdec_class_attrs[] = { static struct class vdec_class = { .name = "vdec", .class_attrs = vdec_class_attrs, - }; +}; struct device *get_vdec_device(void) { @@ -4286,6 +4480,7 @@ module_param(clk_config, uint, 0664); module_param(step_mode, int, 0664); module_param(debugflags, int, 0664); module_param(parallel_decode, int, 0664); +module_param(force_nosecure_even_drm, int, 0664); /* *module_init(vdec_module_init); diff --git a/drivers/frame_provider/decoder/utils/vdec.h b/drivers/frame_provider/decoder/utils/vdec.h index c28f870..66c2945 100644 --- a/drivers/frame_provider/decoder/utils/vdec.h +++ b/drivers/frame_provider/decoder/utils/vdec.h @@ -255,6 +255,8 @@ struct vdec_s { atomic_t inirq_thread_flag; atomic_t inirq_flag; int parallel_dec; + volatile u64 isr_ns; + volatile u64 tfn_ns; }; /* common decoder vframe provider name to use default vfm path */ @@ -412,10 +414,7 @@ extern void vdec_core_finish_run(struct vdec_s *vdec, unsigned long mask); #ifdef VDEC_DEBUG_SUPPORT extern void vdec_set_step_mode(void); #endif - -extern void vdec_disable_DMC(struct vdec_s *vdec); -extern void vdec_enable_DMC(struct vdec_s *vdec); - +extern void hevc_mmu_dma_check(struct vdec_s *vdec); int vdec_read_user_data(struct vdec_s *vdec, struct userdata_param_t *p_userdata_param); diff --git a/drivers/frame_provider/decoder/vp9/vvp9.c b/drivers/frame_provider/decoder/vp9/vvp9.c index b7c53b3..507d07b 100644 --- a/drivers/frame_provider/decoder/vp9/vvp9.c +++ b/drivers/frame_provider/decoder/vp9/vvp9.c @@ -79,7 +79,7 @@ #define HEVCD_MPP_ANC2AXI_TBL_DATA 0x3464 #define HEVC_SAO_MMU_VH1_ADDR 0x363b #define HEVC_SAO_MMU_VH0_ADDR 0x363a -#define HEVC_SAO_MMU_STATUS 0x3639 + #define VP9_10B_DEC_IDLE 0 #define VP9_10B_DEC_FRAME_HEADER 1 @@ -6046,10 +6046,10 @@ static void vp9_local_uninit(struct VP9Decoder_s *pbi) pbi->rpm_ptr = NULL; pbi->lmem_ptr = NULL; if (pbi->rpm_addr) { - dma_unmap_single(amports_get_dma_device(), - pbi->rpm_phy_addr, RPM_BUF_SIZE, - DMA_FROM_DEVICE); - kfree(pbi->rpm_addr); + dma_free_coherent(amports_get_dma_device(), + RPM_BUF_SIZE, + pbi->rpm_addr, + pbi->rpm_phy_addr); pbi->rpm_addr = NULL; } if (pbi->lmem_addr) { @@ -6201,22 +6201,14 @@ static int vp9_local_init(struct VP9Decoder_s *pbi) & 0x40) >> 6; if ((debug & VP9_DEBUG_SEND_PARAM_WITH_REG) == 0) { - pbi->rpm_addr = kmalloc(RPM_BUF_SIZE, GFP_KERNEL); + pbi->rpm_addr = dma_alloc_coherent(amports_get_dma_device(), + RPM_BUF_SIZE, + &pbi->rpm_phy_addr, GFP_KERNEL); if (pbi->rpm_addr == NULL) { pr_err("%s: failed to alloc rpm buffer\n", __func__); return -1; } - pbi->rpm_phy_addr = dma_map_single(amports_get_dma_device(), - pbi->rpm_addr, RPM_BUF_SIZE, DMA_FROM_DEVICE); - if (dma_mapping_error(amports_get_dma_device(), - pbi->rpm_phy_addr)) { - pr_err("%s: failed to map rpm buffer\n", __func__); - kfree(pbi->rpm_addr); - pbi->rpm_addr = NULL; - return -1; - } - pbi->rpm_ptr = pbi->rpm_addr; } @@ -6227,17 +6219,7 @@ static int vp9_local_init(struct VP9Decoder_s *pbi) pr_err("%s: failed to alloc lmem buffer\n", __func__); return -1; } -/* - * pbi->lmem_phy_addr = dma_map_single(amports_get_dma_device(), - * pbi->lmem_addr, LMEM_BUF_SIZE, DMA_BIDIRECTIONAL); - * if (dma_mapping_error(amports_get_dma_device(), - * pbi->lmem_phy_addr)) { - * pr_err("%s: failed to map lmem buffer\n", __func__); - * kfree(pbi->lmem_addr); - * pbi->lmem_addr = NULL; - * return -1; - * } - */ + pbi->lmem_ptr = pbi->lmem_addr; pbi->prob_buffer_addr = dma_alloc_coherent(amports_get_dma_device(), @@ -6248,16 +6230,7 @@ static int vp9_local_init(struct VP9Decoder_s *pbi) return -1; } memset(pbi->prob_buffer_addr, 0, PROB_BUF_SIZE); -/* pbi->prob_buffer_phy_addr = dma_map_single(amports_get_dma_device(), - * pbi->prob_buffer_addr, PROB_BUF_SIZE, DMA_BIDIRECTIONAL); - * if (dma_mapping_error(amports_get_dma_device(), - * pbi->prob_buffer_phy_addr)) { - * pr_err("%s: failed to map prob_buffer\n", __func__); - * kfree(pbi->prob_buffer_addr); - * pbi->prob_buffer_addr = NULL; - * return -1; - * } - */ + pbi->count_buffer_addr = dma_alloc_coherent(amports_get_dma_device(), COUNT_BUF_SIZE, &pbi->count_buffer_phy_addr, GFP_KERNEL); @@ -6266,16 +6239,7 @@ static int vp9_local_init(struct VP9Decoder_s *pbi) return -1; } memset(pbi->count_buffer_addr, 0, COUNT_BUF_SIZE); -/* pbi->count_buffer_phy_addr = dma_map_single(amports_get_dma_device(), - pbi->count_buffer_addr, COUNT_BUF_SIZE, DMA_BIDIRECTIONAL); - if (dma_mapping_error(amports_get_dma_device(), - pbi->count_buffer_phy_addr)) { - pr_err("%s: failed to map count_buffer\n", __func__); - kfree(pbi->count_buffer_addr); - pbi->count_buffer_addr = NULL; - return -1; - } -*/ + if (pbi->mmu_enable) { u32 mmu_map_size = vvp9_frame_mmu_map_size(pbi); pbi->frame_mmu_map_addr = @@ -6287,15 +6251,6 @@ static int vp9_local_init(struct VP9Decoder_s *pbi) return -1; } memset(pbi->frame_mmu_map_addr, 0, COUNT_BUF_SIZE); - /* pbi->frame_mmu_map_phy_addr = dma_map_single(amports_get_dma_device(), - pbi->frame_mmu_map_addr, mmu_map_size, DMA_BIDIRECTIONAL); - if (dma_mapping_error(amports_get_dma_device(), - pbi->frame_mmu_map_phy_addr)) { - pr_err("%s: failed to map count_buffer\n", __func__); - kfree(pbi->frame_mmu_map_addr); - pbi->frame_mmu_map_addr = NULL; - return -1; - }*/ } #ifdef SUPPORT_FB_DECODING if (pbi->m_ins_flag && stage_buf_num > 0) { @@ -7000,9 +6955,12 @@ static void vp9_recycle_mmu_buf_tail(struct VP9Decoder_s *pbi) if (pbi->double_write_mode & 0x10) return; if (cm->cur_fb_idx_mmu != INVALID_IDX) { - if (pbi->used_4k_num == -1) + if (pbi->used_4k_num == -1) { pbi->used_4k_num = (READ_VREG(HEVC_SAO_MMU_STATUS) >> 16); + if (pbi->m_ins_flag) + hevc_mmu_dma_check(hw_to_vdec(pbi)); + } decoder_mmu_box_free_idx_tail(pbi->mmu_box, cm->cur_fb_idx_mmu, pbi->used_4k_num); @@ -7345,11 +7303,6 @@ static irqreturn_t vvp9_isr_thread_fn(int irq, void *data) if (debug & VP9_DEBUG_SEND_PARAM_WITH_REG) { get_rpm_param(&vp9_param); } else { - dma_sync_single_for_cpu( - amports_get_dma_device(), - pbi->rpm_phy_addr, - RPM_BUF_SIZE, - DMA_FROM_DEVICE); #ifdef SUPPORT_FB_DECODING if (pbi->used_stage_buf_num > 0) { reset_process_time(pbi); @@ -7459,12 +7412,6 @@ static irqreturn_t vvp9_isr(int irq, void *data) debug_tag = READ_HREG(DEBUG_REG1); if (debug_tag & 0x10000) { - dma_sync_single_for_cpu( - amports_get_dma_device(), - pbi->lmem_phy_addr, - LMEM_BUF_SIZE, - DMA_FROM_DEVICE); - pr_info("LMEM<tag %x>:\n", READ_HREG(DEBUG_REG1)); for (i = 0; i < 0x400; i += 4) { int ii; @@ -7787,7 +7734,7 @@ static void vvp9_put_timer_func(unsigned long arg) dbg_cmd = 0; } /*don't changed at start.*/ - schedule_work(&pbi->set_clk_work); + vdec_schedule_work(&pbi->set_clk_work); timer->expires = jiffies + PUT_INTERVAL; add_timer(timer); @@ -8245,20 +8192,20 @@ static int vvp9_stop(struct VP9Decoder_s *pbi) pbi->stat &= ~STAT_VF_HOOK; } vp9_local_uninit(pbi); + cancel_work_sync(&pbi->set_clk_work); #ifdef MULTI_INSTANCE_SUPPORT if (pbi->m_ins_flag) { - cancel_work_sync(&pbi->work); #ifdef SUPPORT_FB_DECODING if (pbi->used_stage_buf_num > 0) cancel_work_sync(&pbi->s1_work); #endif + cancel_work_sync(&pbi->work); } else amhevc_disable(); #else amhevc_disable(); #endif - cancel_work_sync(&pbi->set_clk_work); uninit_mmu_buffers(pbi); vfree(pbi->fw); diff --git a/firmware/video_ucode.bin b/firmware/video_ucode.bin index 624c11e..cc03c30 100644 --- a/firmware/video_ucode.bin +++ b/firmware/video_ucode.bin @@ -1,1602 +1,5 @@ - -¯<~á5ɤâ!Ë…ã#Çk9Àwt3™h^D‡:Ý×àã<ÈÀš˜ŠÙCiû˜‚í÷·Áî¦ÇÅè Ü$=v› -Am|Þ hË÷k³¯QÐèñ½´%vm¹qrO]Fé<L¨x!ƒ“¼Sn¥]yv‡yÑ¢AK¾£3†]Òi'?û¼0Ù• d -Z½1 ¥Ò)Ÿ9„x<E
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