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1/*
2* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
3*
4* This program is free software; you can redistribute it and/or modify
5* it under the terms of the GNU General Public License as published by
6* the Free Software Foundation; either version 2 of the License, or
7* (at your option) any later version.
8*
9* This program is distributed in the hope that it will be useful, but WITHOUT
10* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12* more details.
13*
14* You should have received a copy of the GNU General Public License along
15* with this program; if not, write to the Free Software Foundation, Inc.,
16* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17*
18* Description:
19*/
20#ifndef _AML_VCODEC_DRV_H_
21#define _AML_VCODEC_DRV_H_
22
23#include <linux/platform_device.h>
24#include <linux/videodev2.h>
25#include <media/v4l2-ctrls.h>
26#include <media/v4l2-device.h>
27#include <media/v4l2-ioctl.h>
28#include <media/videobuf2-core.h>
29#include <linux/amlogic/media/vfm/vframe.h>
30#include "aml_vcodec_util.h"
31
32#define AML_VCODEC_DRV_NAME "aml_vcodec_drv"
33#define AML_VCODEC_DEC_NAME "aml-vcodec-dec"
34#define AML_VCODEC_ENC_NAME "aml-vcodec-enc"
35#define AML_PLATFORM_STR "platform:amlogic"
36
37#define AML_VCODEC_MAX_PLANES 3
38#define AML_V4L2_BENCHMARK 0
39#define WAIT_INTR_TIMEOUT_MS 1000
40
41/* codec types of get/set parms. */
42#define V4L2_CONFIG_PARM_ENCODE (0)
43#define V4L2_CONFIG_PARM_DECODE (1)
44
45/* types of decode parms. */
46#define V4L2_CONFIG_PARM_DECODE_CFGINFO (1 << 0)
47#define V4L2_CONFIG_PARM_DECODE_PSINFO (1 << 1)
48#define V4L2_CONFIG_PARM_DECODE_HDRINFO (1 << 2)
49#define V4L2_CONFIG_PARM_DECODE_CNTINFO (1 << 3)
50
51/* amlogic event define. */
52/* #define V4L2_EVENT_SRC_CH_RESOLUTION (1 << 0) */
53#define V4L2_EVENT_SRC_CH_HDRINFO (1 << 1)
54#define V4L2_EVENT_SRC_CH_PSINFO (1 << 2)
55#define V4L2_EVENT_SRC_CH_CNTINFO (1 << 3)
56
57/* exception handing */
58#define V4L2_EVENT_REQUEST_RESET (1 << 8)
59#define V4L2_EVENT_REQUEST_EXIT (1 << 9)
60
61
62
63/**
64 * enum aml_hw_reg_idx - AML hw register base index
65 */
66enum aml_hw_reg_idx {
67 VDEC_SYS,
68 VDEC_MISC,
69 VDEC_LD,
70 VDEC_TOP,
71 VDEC_CM,
72 VDEC_AD,
73 VDEC_AV,
74 VDEC_PP,
75 VDEC_HWD,
76 VDEC_HWQ,
77 VDEC_HWB,
78 VDEC_HWG,
79 NUM_MAX_VDEC_REG_BASE,
80 /* h264 encoder */
81 VENC_SYS = NUM_MAX_VDEC_REG_BASE,
82 /* vp8 encoder */
83 VENC_LT_SYS,
84 NUM_MAX_VCODEC_REG_BASE
85};
86
87/**
88 * enum aml_instance_type - The type of an AML Vcodec instance.
89 */
90enum aml_instance_type {
91 AML_INST_DECODER = 0,
92 AML_INST_ENCODER = 1,
93};
94
95/**
96 * enum aml_instance_state - The state of an AML Vcodec instance.
97 * @AML_STATE_IDLE - default state when instance is created
98 * @AML_STATE_INIT - vcodec instance is initialized
99 * @AML_STATE_PROBE - vdec/venc had sps/pps header parsed/encoded
100 * @AML_STATE_ACTIVE - vdec is ready for work.
101 * @AML_STATE_FLUSHING - vdec is flushing. Only used by decoder
102 * @AML_STATE_FLUSHED - decoder has transacted the last frame.
103 * @AML_STATE_RESET - decoder has be reset after flush.
104 * @AML_STATE_ABORT - vcodec should be aborted
105 */
106enum aml_instance_state {
107 AML_STATE_IDLE,
108 AML_STATE_INIT,
109 AML_STATE_PROBE,
110 AML_STATE_READY,
111 AML_STATE_ACTIVE,
112 AML_STATE_FLUSHING,
113 AML_STATE_FLUSHED,
114 AML_STATE_RESET,
115 AML_STATE_ABORT,
116};
117
118/**
119 * struct aml_encode_param - General encoding parameters type
120 */
121enum aml_encode_param {
122 AML_ENCODE_PARAM_NONE = 0,
123 AML_ENCODE_PARAM_BITRATE = (1 << 0),
124 AML_ENCODE_PARAM_FRAMERATE = (1 << 1),
125 AML_ENCODE_PARAM_INTRA_PERIOD = (1 << 2),
126 AML_ENCODE_PARAM_FORCE_INTRA = (1 << 3),
127 AML_ENCODE_PARAM_GOP_SIZE = (1 << 4),
128};
129
130enum aml_fmt_type {
131 AML_FMT_DEC = 0,
132 AML_FMT_ENC = 1,
133 AML_FMT_FRAME = 2,
134};
135
136/**
137 * struct aml_video_fmt - Structure used to store information about pixelformats
138 */
139struct aml_video_fmt {
140 u32 fourcc;
141 enum aml_fmt_type type;
142 u32 num_planes;
143};
144
145/**
146 * struct aml_codec_framesizes - Structure used to store information about
147 * framesizes
148 */
149struct aml_codec_framesizes {
150 u32 fourcc;
151 struct v4l2_frmsize_stepwise stepwise;
152};
153
154/**
155 * struct aml_q_type - Type of queue
156 */
157enum aml_q_type {
158 AML_Q_DATA_SRC = 0,
159 AML_Q_DATA_DST = 1,
160};
161
162
163/**
164 * struct aml_q_data - Structure used to store information about queue
165 */
166struct aml_q_data {
167 unsigned int visible_width;
168 unsigned int visible_height;
169 unsigned int coded_width;
170 unsigned int coded_height;
171 enum v4l2_field field;
172 unsigned int bytesperline[AML_VCODEC_MAX_PLANES];
173 unsigned int sizeimage[AML_VCODEC_MAX_PLANES];
174 struct aml_video_fmt *fmt;
175 bool resolution_changed;
176};
177
178/**
179 * struct aml_enc_params - General encoding parameters
180 * @bitrate: target bitrate in bits per second
181 * @num_b_frame: number of b frames between p-frame
182 * @rc_frame: frame based rate control
183 * @rc_mb: macroblock based rate control
184 * @seq_hdr_mode: H.264 sequence header is encoded separately or joined
185 * with the first frame
186 * @intra_period: I frame period
187 * @gop_size: group of picture size, it's used as the intra frame period
188 * @framerate_num: frame rate numerator. ex: framerate_num=30 and
189 * framerate_denom=1 menas FPS is 30
190 * @framerate_denom: frame rate denominator. ex: framerate_num=30 and
191 * framerate_denom=1 menas FPS is 30
192 * @h264_max_qp: Max value for H.264 quantization parameter
193 * @h264_profile: V4L2 defined H.264 profile
194 * @h264_level: V4L2 defined H.264 level
195 * @force_intra: force/insert intra frame
196 */
197struct aml_enc_params {
198 unsigned int bitrate;
199 unsigned int num_b_frame;
200 unsigned int rc_frame;
201 unsigned int rc_mb;
202 unsigned int seq_hdr_mode;
203 unsigned int intra_period;
204 unsigned int gop_size;
205 unsigned int framerate_num;
206 unsigned int framerate_denom;
207 unsigned int h264_max_qp;
208 unsigned int h264_profile;
209 unsigned int h264_level;
210 unsigned int force_intra;
211};
212
213/**
214 * struct aml_vcodec_pm - Power management data structure
215 */
216struct aml_vcodec_pm {
217 struct clk *vdec_bus_clk_src;
218 struct clk *vencpll;
219
220 struct clk *vcodecpll;
221 struct clk *univpll_d2;
222 struct clk *clk_cci400_sel;
223 struct clk *vdecpll;
224 struct clk *vdec_sel;
225 struct clk *vencpll_d2;
226 struct clk *venc_sel;
227 struct clk *univpll1_d2;
228 struct clk *venc_lt_sel;
229 struct device *larbvdec;
230 struct device *larbvenc;
231 struct device *larbvenclt;
232 struct device *dev;
233 struct aml_vcodec_dev *amldev;
234};
235
236/**
237 * struct vdec_pic_info - picture size information
238 * @visible_width: picture width
239 * @visible_height: picture height
240 * @coded_width: picture buffer width (64 aligned up from pic_w)
241 * @coded_height: picture buffer heiht (64 aligned up from pic_h)
242 * @y_bs_sz: Y bitstream size
243 * @c_bs_sz: CbCr bitstream size
244 * @y_len_sz: additional size required to store decompress information for y
245 * plane
246 * @c_len_sz: additional size required to store decompress information for cbcr
247 * plane
248 * E.g. suppose picture size is 176x144,
249 * buffer size will be aligned to 176x160.
250 */
251struct vdec_pic_info {
252 unsigned int visible_width;
253 unsigned int visible_height;
254 unsigned int coded_width;
255 unsigned int coded_height;
256 unsigned int y_bs_sz;
257 unsigned int c_bs_sz;
258 unsigned int y_len_sz;
259 unsigned int c_len_sz;
260 int profile_idc;
261};
262
263struct aml_vdec_cfg_infos {
264 u32 double_write_mode;
265 u32 init_width;
266 u32 init_height;
267 u32 ref_buf_margin;
268 u32 block_mode;
269};
270
271struct aml_vdec_hdr_infos {
272 /*
273 * bit 29 : present_flag
274 * bit 28-26: video_format "component", "PAL", "NTSC", "SECAM", "MAC", "unspecified"
275 * bit 25 : range "limited", "full_range"
276 * bit 24 : color_description_present_flag
277 * bit 23-16: color_primaries "unknown", "bt709", "undef", "bt601",
278 * "bt470m", "bt470bg", "smpte170m", "smpte240m", "film", "bt2020"
279 * bit 15-8 : transfer_characteristic unknown", "bt709", "undef", "bt601",
280 * "bt470m", "bt470bg", "smpte170m", "smpte240m",
281 * "linear", "log100", "log316", "iec61966-2-4",
282 * "bt1361e", "iec61966-2-1", "bt2020-10", "bt2020-12",
283 * "smpte-st-2084", "smpte-st-428"
284 * bit 7-0 : matrix_coefficient "GBR", "bt709", "undef", "bt601",
285 * "fcc", "bt470bg", "smpte170m", "smpte240m",
286 * "YCgCo", "bt2020nc", "bt2020c"
287 */
288 u32 signal_type;
289 struct vframe_master_display_colour_s color_parms;
290};
291
292struct aml_vdec_ps_infos {
293 u32 visible_width;
294 u32 visible_height;
295 u32 coded_width;
296 u32 coded_height;
297 u32 profile;
298 u32 mb_width;
299 u32 mb_height;
300 u32 dpb_size;
301 u32 ref_frames;
302 u32 reorder_frames;
303};
304
305struct aml_vdec_cnt_infos {
306 u32 bit_rate;
307 u32 frame_count;
308 u32 error_frame_count;
309 u32 drop_frame_count;
310 u32 total_data;
311};
312
313struct aml_dec_params {
314 u32 parms_status;
315 struct aml_vdec_cfg_infos cfg;
316 struct aml_vdec_ps_infos ps;
317 struct aml_vdec_hdr_infos hdr;
318 struct aml_vdec_cnt_infos cnt;
319};
320
321struct v4l2_config_parm {
322 u32 type;
323 u32 length;
324 union {
325 struct aml_dec_params dec;
326 struct aml_enc_params enc;
327 u8 data[200];
328 } parm;
329 u8 buf[4096];
330};
331
332enum aml_thread_type {
333 AML_THREAD_OUTPUT,
334 AML_THREAD_CAPTURE,
335};
336
337typedef void (*aml_thread_func)(struct aml_vcodec_ctx *ctx);
338
339struct aml_vdec_thread {
340 struct list_head node;
341 spinlock_t lock;
342 struct semaphore sem;
343 struct task_struct *task;
344 enum aml_thread_type type;
345 void *priv;
346 int stop;
347
348 aml_thread_func func;
349};
350
351/**
352 * struct aml_vcodec_ctx - Context (instance) private data.
353 *
354 * @type: type of the instance - decoder or encoder
355 * @dev: pointer to the aml_vcodec_dev of the device
356 * @list: link to ctx_list of aml_vcodec_dev
357 * @fh: struct v4l2_fh
358 * @m2m_ctx: pointer to the v4l2_m2m_ctx of the context
359 * @q_data: store information of input and output queue
360 * of the context
361 * @id: index of the context that this structure describes
362 * @state: state of the context
363 * @param_change: indicate encode parameter type
364 * @enc_params: encoding parameters
365 * @dec_if: hooked decoder driver interface
366 * @enc_if: hoooked encoder driver interface
367 * @drv_handle: driver handle for specific decode/encode instance
368 *
369 * @picinfo: store picture info after header parsing
370 * @dpb_size: store dpb count after header parsing
371 * @int_cond: variable used by the waitqueue
372 * @int_type: type of the last interrupt
373 * @queue: waitqueue that can be used to wait for this context to
374 * finish
375 * @irq_status: irq status
376 *
377 * @ctrl_hdl: handler for v4l2 framework
378 * @decode_work: worker for the decoding
379 * @encode_work: worker for the encoding
380 * @last_decoded_picinfo: pic information get from latest decode
381 * @empty_flush_buf: a fake size-0 capture buffer that indicates flush
382 *
383 * @colorspace: enum v4l2_colorspace; supplemental to pixelformat
384 * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding
385 * @quantization: enum v4l2_quantization, colorspace quantization
386 * @xfer_func: enum v4l2_xfer_func, colorspace transfer function
387 * @lock: protect variables accessed by V4L2 threads and worker thread such as
388 * aml_video_dec_buf.
389 */
390struct aml_vcodec_ctx {
391 enum aml_instance_type type;
392 struct aml_vcodec_dev *dev;
393 struct list_head list;
394
395 struct v4l2_fh fh;
396 struct v4l2_m2m_ctx *m2m_ctx;
397 struct aml_vdec_adapt *ada_ctx;
398 struct aml_q_data q_data[2];
399 int id;
400 struct mutex state_lock;
401 enum aml_instance_state state;
402 enum aml_encode_param param_change;
403 struct aml_enc_params enc_params;
404
405 const struct vdec_common_if *dec_if;
406 const struct venc_common_if *enc_if;
407 unsigned long drv_handle;
408
409 struct vdec_pic_info picinfo;
410 int dpb_size;
411
412 int int_cond;
413 int int_type;
414 wait_queue_head_t queue;
415 unsigned int irq_status;
416
417 struct v4l2_ctrl_handler ctrl_hdl;
418 struct work_struct decode_work;
419 struct work_struct encode_work;
420 struct vdec_pic_info last_decoded_picinfo;
421 struct aml_video_dec_buf *empty_flush_buf;
422
423 enum v4l2_colorspace colorspace;
424 enum v4l2_ycbcr_encoding ycbcr_enc;
425 enum v4l2_quantization quantization;
426 enum v4l2_xfer_func xfer_func;
427
428 int decoded_frame_cnt;
429 struct mutex lock;
430 struct completion comp;
431 bool has_receive_eos;
432 struct list_head vdec_thread_list;
433 bool is_drm_mode;
434 bool is_stream_mode;
435 int buf_used_count;
436 bool receive_cmd_stop;
437 bool scatter_mem_enable;
438 bool param_sets_from_ucode;
439 bool v4l_codec_ready;
440 bool v4l_codec_dpb_ready;
441 wait_queue_head_t wq;
442 spinlock_t slock;
443 struct v4l2_config_parm config;
444 bool is_stream_off;
445 int reset_flag;
446 int stop_cmd;
447};
448
449/**
450 * struct aml_vcodec_dev - driver data
451 * @v4l2_dev: V4L2 device to register video devices for.
452 * @vfd_dec: Video device for decoder
453 * @vfd_enc: Video device for encoder.
454 *
455 * @m2m_dev_dec: m2m device for decoder
456 * @m2m_dev_enc: m2m device for encoder.
457 * @plat_dev: platform device
458 * @vpu_plat_dev: aml vpu platform device
459 * @alloc_ctx: VB2 allocator context
460 * (for allocations without kernel mapping).
461 * @ctx_list: list of struct aml_vcodec_ctx
462 * @irqlock: protect data access by irq handler and work thread
463 * @curr_ctx: The context that is waiting for codec hardware
464 *
465 * @reg_base: Mapped address of AML Vcodec registers.
466 *
467 * @id_counter: used to identify current opened instance
468 *
469 * @encode_workqueue: encode work queue
470 *
471 * @int_cond: used to identify interrupt condition happen
472 * @int_type: used to identify what kind of interrupt condition happen
473 * @dev_mutex: video_device lock
474 * @queue: waitqueue for waiting for completion of device commands
475 *
476 * @dec_irq: decoder irq resource
477 * @enc_irq: h264 encoder irq resource
478 * @enc_lt_irq: vp8 encoder irq resource
479 *
480 * @dec_mutex: decoder hardware lock
481 * @enc_mutex: encoder hardware lock.
482 *
483 * @pm: power management control
484 * @dec_capability: used to identify decode capability, ex: 4k
485 * @enc_capability: used to identify encode capability
486 */
487struct aml_vcodec_dev {
488 struct v4l2_device v4l2_dev;
489 struct video_device *vfd_dec;
490 struct video_device *vfd_enc;
491 struct file *filp;
492
493 struct v4l2_m2m_dev *m2m_dev_dec;
494 struct v4l2_m2m_dev *m2m_dev_enc;
495 struct platform_device *plat_dev;
496 struct platform_device *vpu_plat_dev;//??
497 struct vb2_alloc_ctx *alloc_ctx;//??
498 struct list_head ctx_list;
499 spinlock_t irqlock;
500 struct aml_vcodec_ctx *curr_ctx;
501 void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE];
502
503 unsigned long id_counter;
504
505 struct workqueue_struct *decode_workqueue;
506 struct workqueue_struct *encode_workqueue;
507 int int_cond;
508 int int_type;
509 struct mutex dev_mutex;
510 wait_queue_head_t queue;
511
512 int dec_irq;
513 int enc_irq;
514 int enc_lt_irq;
515
516 struct mutex dec_mutex;
517 struct mutex enc_mutex;
518
519 struct aml_vcodec_pm pm;
520 unsigned int dec_capability;
521 unsigned int enc_capability;
522};
523
524static inline struct aml_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh)
525{
526 return container_of(fh, struct aml_vcodec_ctx, fh);
527}
528
529static inline struct aml_vcodec_ctx *ctrl_to_ctx(struct v4l2_ctrl *ctrl)
530{
531 return container_of(ctrl->handler, struct aml_vcodec_ctx, ctrl_hdl);
532}
533
534#endif /* _AML_VCODEC_DRV_H_ */
535
generated by cgit at 2024-05-17 08:46:35 (GMT)