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path: root/drivers/amvdec_ports/decoder/vdec_h264_if.c (plain)
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1/*
2* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
3*
4* This program is free software; you can redistribute it and/or modify
5* it under the terms of the GNU General Public License as published by
6* the Free Software Foundation; either version 2 of the License, or
7* (at your option) any later version.
8*
9* This program is distributed in the hope that it will be useful, but WITHOUT
10* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12* more details.
13*
14* You should have received a copy of the GNU General Public License along
15* with this program; if not, write to the Free Software Foundation, Inc.,
16* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17*
18* Description:
19*/
20#include <linux/module.h>
21#include <linux/slab.h>
22#include <linux/timer.h>
23#include <linux/delay.h>
24#include <linux/kernel.h>
25#include <uapi/linux/swab.h>
26
27#include "../vdec_drv_if.h"
28#include "../aml_vcodec_util.h"
29#include "../aml_vcodec_dec.h"
30#include "../aml_vcodec_drv.h"
31#include "../aml_vcodec_adapt.h"
32#include "../vdec_drv_base.h"
33#include "../aml_vcodec_vfm.h"
34#include "aml_h264_parser.h"
35#include "../utils/common.h"
36
37/* h264 NALU type */
38#define NAL_NON_IDR_SLICE 0x01
39#define NAL_IDR_SLICE 0x05
40#define NAL_H264_SEI 0x06
41#define NAL_H264_SPS 0x07
42#define NAL_H264_PPS 0x08
43#define NAL_H264_AUD 0x09
44
45#define AVC_NAL_TYPE(value) ((value) & 0x1F)
46
47#define BUF_PREDICTION_SZ (64 * 1024)//(32 * 1024)
48
49#define MB_UNIT_LEN 16
50
51/* motion vector size (bytes) for every macro block */
52#define HW_MB_STORE_SZ 64
53
54#define H264_MAX_FB_NUM 17
55#define HDR_PARSING_BUF_SZ 1024
56
57#define HEADER_BUFFER_SIZE (128 * 1024)
58
59/**
60 * struct h264_fb - h264 decode frame buffer information
61 * @vdec_fb_va : virtual address of struct vdec_fb
62 * @y_fb_dma : dma address of Y frame buffer (luma)
63 * @c_fb_dma : dma address of C frame buffer (chroma)
64 * @poc : picture order count of frame buffer
65 * @reserved : for 8 bytes alignment
66 */
67struct h264_fb {
68 uint64_t vdec_fb_va;
69 uint64_t y_fb_dma;
70 uint64_t c_fb_dma;
71 int32_t poc;
72 uint32_t reserved;
73};
74
75/**
76 * struct h264_ring_fb_list - ring frame buffer list
77 * @fb_list : frame buffer arrary
78 * @read_idx : read index
79 * @write_idx : write index
80 * @count : buffer count in list
81 */
82struct h264_ring_fb_list {
83 struct h264_fb fb_list[H264_MAX_FB_NUM];
84 unsigned int read_idx;
85 unsigned int write_idx;
86 unsigned int count;
87 unsigned int reserved;
88};
89
90/**
91 * struct vdec_h264_dec_info - decode information
92 * @dpb_sz : decoding picture buffer size
93 * @realloc_mv_buf : flag to notify driver to re-allocate mv buffer
94 * @reserved : for 8 bytes alignment
95 * @bs_dma : Input bit-stream buffer dma address
96 * @y_fb_dma : Y frame buffer dma address
97 * @c_fb_dma : C frame buffer dma address
98 * @vdec_fb_va : VDEC frame buffer struct virtual address
99 */
100struct vdec_h264_dec_info {
101 uint32_t dpb_sz;
102 uint32_t realloc_mv_buf;
103 uint32_t reserved;
104 uint64_t bs_dma;
105 uint64_t y_fb_dma;
106 uint64_t c_fb_dma;
107 uint64_t vdec_fb_va;
108};
109
110/**
111 * struct vdec_h264_vsi - shared memory for decode information exchange
112 * between VPU and Host.
113 * The memory is allocated by VPU then mapping to Host
114 * in vpu_dec_init() and freed in vpu_dec_deinit()
115 * by VPU.
116 * AP-W/R : AP is writer/reader on this item
117 * VPU-W/R: VPU is write/reader on this item
118 * @dec : decode information (AP-R, VPU-W)
119 * @pic : picture information (AP-R, VPU-W)
120 * @crop : crop information (AP-R, VPU-W)
121 */
122struct vdec_h264_vsi {
123 unsigned char hdr_buf[HDR_PARSING_BUF_SZ];
124 char *header_buf;
125 int sps_size;
126 int pps_size;
127 int sei_size;
128 int head_offset;
129 struct vdec_h264_dec_info dec;
130 struct vdec_pic_info pic;
131 struct vdec_pic_info cur_pic;
132 struct v4l2_rect crop;
133 bool is_combine;
134 int nalu_pos;
135};
136
137/**
138 * struct vdec_h264_inst - h264 decoder instance
139 * @num_nalu : how many nalus be decoded
140 * @ctx : point to aml_vcodec_ctx
141 * @pred_buf : HW working predication buffer
142 * @mv_buf : HW working motion vector buffer
143 * @vpu : VPU instance
144 * @vsi : VPU shared information
145 */
146struct vdec_h264_inst {
147 unsigned int num_nalu;
148 struct aml_vcodec_ctx *ctx;
149 struct aml_vcodec_mem pred_buf;
150 struct aml_vcodec_mem mv_buf[H264_MAX_FB_NUM];
151 struct aml_vdec_adapt vdec;
152 struct vdec_h264_vsi *vsi;
153 struct vcodec_vfm_s vfm;
154 struct aml_dec_params parms;
155 struct completion comp;
156};
157
158#if 0
159#define DUMP_FILE_NAME "/data/dump/dump.tmp"
160static struct file *filp;
161static loff_t file_pos;
162
163void dump_write(const char __user *buf, size_t count)
164{
165 mm_segment_t old_fs;
166
167 if (!filp)
168 return;
169
170 old_fs = get_fs();
171 set_fs(KERNEL_DS);
172
173 if (count != vfs_write(filp, buf, count, &file_pos))
174 pr_err("Failed to write file\n");
175
176 set_fs(old_fs);
177}
178
179void dump_init(void)
180{
181 filp = filp_open(DUMP_FILE_NAME, O_CREAT | O_RDWR, 0644);
182 if (IS_ERR(filp)) {
183 pr_err("open dump file failed\n");
184 filp = NULL;
185 }
186}
187
188void dump_deinit(void)
189{
190 if (filp) {
191 filp_close(filp, current->files);
192 filp = NULL;
193 file_pos = 0;
194 }
195}
196
197void swap_uv(void *uv, int size)
198{
199 int i;
200 __u16 *p = uv;
201
202 size /= 2;
203
204 for (i = 0; i < size; i++, p++)
205 *p = __swab16(*p);
206}
207#endif
208
209static void get_pic_info(struct vdec_h264_inst *inst,
210 struct vdec_pic_info *pic)
211{
212 *pic = inst->vsi->pic;
213
214 aml_vcodec_debug(inst, "pic(%d, %d), buf(%d, %d)",
215 pic->visible_width, pic->visible_height,
216 pic->coded_width, pic->coded_height);
217 aml_vcodec_debug(inst, "Y(%d, %d), C(%d, %d)", pic->y_bs_sz,
218 pic->y_len_sz, pic->c_bs_sz, pic->c_len_sz);
219}
220
221static void get_crop_info(struct vdec_h264_inst *inst, struct v4l2_rect *cr)
222{
223 cr->left = inst->vsi->crop.left;
224 cr->top = inst->vsi->crop.top;
225 cr->width = inst->vsi->crop.width;
226 cr->height = inst->vsi->crop.height;
227
228 aml_vcodec_debug(inst, "l=%d, t=%d, w=%d, h=%d",
229 cr->left, cr->top, cr->width, cr->height);
230}
231
232static void get_dpb_size(struct vdec_h264_inst *inst, unsigned int *dpb_sz)
233{
234 *dpb_sz = inst->vsi->dec.dpb_sz;
235 aml_vcodec_debug(inst, "sz=%d", *dpb_sz);
236}
237
238static void skip_aud_data(u8 **data, u32 *size)
239{
240 int i;
241
242 i = find_start_code(*data, *size);
243 if (i > 0 && (*data)[i++] == 0x9 && (*data)[i++] == 0xf0) {
244 *size -= i;
245 *data += i;
246 }
247}
248
249static u32 vdec_config_default_parms(u8 *parm)
250{
251 u8 *pbuf = parm;
252
253 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
254 pbuf += sprintf(pbuf, "mh264_double_write_mode:16;");
255 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:7;");
256 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_mode:0;");
257 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_endian:0;");
258
259 return parm - pbuf;
260}
261
262static void vdec_parser_parms(struct vdec_h264_inst *inst)
263{
264 struct aml_vcodec_ctx *ctx = inst->ctx;
265
266 if (ctx->config.parm.dec.parms_status &
267 V4L2_CONFIG_PARM_DECODE_CFGINFO) {
268 u8 *pbuf = ctx->config.buf;
269
270 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
271 pbuf += sprintf(pbuf, "mh264_double_write_mode:%d;",
272 ctx->config.parm.dec.cfg.double_write_mode);
273 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:%d;",
274 ctx->config.parm.dec.cfg.ref_buf_margin);
275 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_mode:%d;",
276 ctx->config.parm.dec.cfg.canvas_mem_mode);
277 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_endian:%d;",
278 ctx->config.parm.dec.cfg.canvas_mem_endian);
279 ctx->config.length = pbuf - ctx->config.buf;
280 } else {
281 ctx->config.parm.dec.cfg.double_write_mode = 16;
282 ctx->config.parm.dec.cfg.ref_buf_margin = 7;
283 ctx->config.length = vdec_config_default_parms(ctx->config.buf);
284 }
285
286 inst->vdec.config = ctx->config;
287 inst->parms.cfg = ctx->config.parm.dec.cfg;
288 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_CFGINFO;
289}
290
291static int vdec_h264_init(struct aml_vcodec_ctx *ctx, unsigned long *h_vdec)
292{
293 struct vdec_h264_inst *inst = NULL;
294 int ret = -1;
295
296 inst = kzalloc(sizeof(*inst), GFP_KERNEL);
297 if (!inst)
298 return -ENOMEM;
299
300 inst->vdec.video_type = VFORMAT_H264;
301 inst->vdec.dev = ctx->dev->vpu_plat_dev;
302 inst->vdec.filp = ctx->dev->filp;
303 inst->vdec.ctx = ctx;
304 inst->ctx = ctx;
305
306 vdec_parser_parms(inst);
307
308 /* set play mode.*/
309 if (ctx->is_drm_mode)
310 inst->vdec.port.flag |= PORT_FLAG_DRM;
311
312 /* init vfm */
313 inst->vfm.ctx = ctx;
314 inst->vfm.ada_ctx = &inst->vdec;
315 ret = vcodec_vfm_init(&inst->vfm);
316 if (ret) {
317 pr_err("%s, init vfm failed.\n", __func__);
318 goto err;
319 }
320
321 ret = video_decoder_init(&inst->vdec);
322 if (ret) {
323 aml_vcodec_err(inst, "vdec_h264 init err=%d", ret);
324 goto err;
325 }
326
327 /* probe info from the stream */
328 inst->vsi = kzalloc(sizeof(struct vdec_h264_vsi), GFP_KERNEL);
329 if (!inst->vsi) {
330 ret = -ENOMEM;
331 goto err;
332 }
333
334 /* alloc the header buffer to be used cache sps or spp etc.*/
335 inst->vsi->header_buf = kzalloc(HEADER_BUFFER_SIZE, GFP_KERNEL);
336 if (!inst->vsi) {
337 ret = -ENOMEM;
338 goto err;
339 }
340
341 init_completion(&inst->comp);
342
343 aml_vcodec_debug(inst, "H264 Instance >> %p", inst);
344
345 ctx->ada_ctx = &inst->vdec;
346 *h_vdec = (unsigned long)inst;
347
348 //dump_init();
349
350 return 0;
351err:
352 if (inst)
353 vcodec_vfm_release(&inst->vfm);
354 if (inst && inst->vsi && inst->vsi->header_buf)
355 kfree(inst->vsi->header_buf);
356 if (inst && inst->vsi)
357 kfree(inst->vsi);
358 if (inst)
359 kfree(inst);
360 *h_vdec = 0;
361
362 return ret;
363}
364
365#if 0
366static int refer_buffer_num(int level_idc, int max_poc_cnt,
367 int mb_width, int mb_height)
368{
369 int size;
370 int pic_size = mb_width * mb_height * 384;
371
372 switch (level_idc) {
373 case 9:
374 size = 152064;
375 break;
376 case 10:
377 size = 152064;
378 break;
379 case 11:
380 size = 345600;
381 break;
382 case 12:
383 size = 912384;
384 break;
385 case 13:
386 size = 912384;
387 break;
388 case 20:
389 size = 912384;
390 break;
391 case 21:
392 size = 1824768;
393 break;
394 case 22:
395 size = 3110400;
396 break;
397 case 30:
398 size = 3110400;
399 break;
400 case 31:
401 size = 6912000;
402 break;
403 case 32:
404 size = 7864320;
405 break;
406 case 40:
407 size = 12582912;
408 break;
409 case 41:
410 size = 12582912;
411 break;
412 case 42:
413 size = 13369344;
414 break;
415 case 50:
416 size = 42393600;
417 break;
418 case 51:
419 case 52:
420 default:
421 size = 70778880;
422 break;
423 }
424
425 size /= pic_size;
426 size = size + 1; /* need more buffers */
427
428 if (size > max_poc_cnt)
429 size = max_poc_cnt;
430
431 return size;
432}
433#endif
434
435static void vdec_config_dw_mode(struct vdec_pic_info *pic, int dw_mode)
436{
437 switch (dw_mode) {
438 case 0x1: /* (w x h) + (w/2 x h) */
439 pic->coded_width += pic->coded_width >> 1;
440 pic->y_len_sz = pic->coded_width * pic->coded_height;
441 pic->c_len_sz = pic->y_len_sz >> 1;
442 break;
443 case 0x2: /* (w x h) + (w/2 x h/2) */
444 pic->coded_width += pic->coded_width >> 1;
445 pic->coded_height += pic->coded_height >> 1;
446 pic->y_len_sz = pic->coded_width * pic->coded_height;
447 pic->c_len_sz = pic->y_len_sz >> 1;
448 break;
449 default: /* nothing to do */
450 break;
451 }
452}
453
454static void fill_vdec_params(struct vdec_h264_inst *inst, struct h264_SPS_t *sps)
455{
456 struct vdec_pic_info *pic = &inst->vsi->pic;
457 struct vdec_h264_dec_info *dec = &inst->vsi->dec;
458 struct v4l2_rect *rect = &inst->vsi->crop;
459 int dw = inst->parms.cfg.double_write_mode;
460 int margin = inst->parms.cfg.ref_buf_margin;
461 u32 mb_w, mb_h, width, height;
462
463 mb_w = sps->mb_width;
464 mb_h = sps->mb_height;
465
466 width = mb_w << 4;
467 height = mb_h << 4;
468
469 width -= (sps->crop_left + sps->crop_right);
470 height -= (sps->crop_top + sps->crop_bottom);
471
472 /* fill visible area size that be used for EGL. */
473 pic->visible_width = width;
474 pic->visible_height = height;
475
476 /* calc visible ares. */
477 rect->left = 0;
478 rect->top = 0;
479 rect->width = pic->visible_width;
480 rect->height = pic->visible_height;
481
482 /* config canvas size that be used for decoder. */
483 pic->coded_width = ALIGN(mb_w, 4) << 4;
484 pic->coded_height = ALIGN(mb_h, 4) << 4;
485 pic->y_len_sz = pic->coded_width * pic->coded_height;
486 pic->c_len_sz = pic->y_len_sz >> 1;
487 pic->profile_idc = sps->profile_idc;
488
489 /* calc DPB size */
490 dec->dpb_sz = sps->num_reorder_frames + margin;
491
492 inst->parms.ps.visible_width = pic->visible_width;
493 inst->parms.ps.visible_height = pic->visible_height;
494 inst->parms.ps.coded_width = pic->coded_width;
495 inst->parms.ps.coded_height = pic->coded_height;
496 inst->parms.ps.profile = sps->profile_idc;
497 inst->parms.ps.mb_width = sps->mb_width;
498 inst->parms.ps.mb_height = sps->mb_height;
499 inst->parms.ps.ref_frames = sps->ref_frame_count;
500 inst->parms.ps.reorder_frames = sps->num_reorder_frames;
501 inst->parms.ps.dpb_size = dec->dpb_sz;
502 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_PSINFO;
503
504 vdec_config_dw_mode(pic, dw);
505
506 aml_vcodec_debug(inst, "[%d] The stream infos, dw: %d, coded:(%d x %d), visible:(%d x %d), DPB: %d, margin: %d\n",
507 inst->ctx->id, dw, pic->coded_width, pic->coded_height,
508 pic->visible_width, pic->visible_height,
509 dec->dpb_sz - margin, margin);
510}
511
512static bool check_frame_combine(u8 *buf, u32 size, int *pos)
513{
514 bool combine = false;
515 int i = 0, j = 0, cnt = 0;
516 u8 *p = buf;
517
518 for (i = 4; i < size; i++) {
519 j = find_start_code(p, 7);
520 if (j > 0) {
521 if (++cnt > 1) {
522 combine = true;
523 break;
524 }
525
526 *pos = p - buf + j;
527 p += j;
528 i += j;
529 }
530 p++;
531 }
532
533 //pr_info("nal pos: %d, is_combine: %d\n",*pos, *is_combine);
534 return combine;
535}
536
537static int vdec_search_startcode(u8 *buf, u32 range)
538{
539 int pos = -1;
540 int i = 0, j = 0;
541 u8 *p = buf;
542
543 for (i = 4; i < range; i++) {
544 j = find_start_code(p, 7);
545 if (j > 0) {
546 pos = p - buf + j;
547 break;
548 }
549 p++;
550 }
551
552 return pos;
553}
554
555static int stream_parse_by_ucode(struct vdec_h264_inst *inst, u8 *buf, u32 size)
556{
557 int ret = 0;
558 struct aml_vdec_adapt *vdec = &inst->vdec;
559
560 ret = vdec_vframe_write(vdec, buf, size, 0);
561 if (ret < 0) {
562 pr_err("write frame data failed. err: %d\n", ret);
563 return ret;
564 }
565
566 /* wait ucode parse ending. */
567 wait_for_completion_timeout(&inst->comp,
568 msecs_to_jiffies(1000));
569
570 return inst->vsi->dec.dpb_sz ? 0 : -1;
571}
572
573static int stream_parse(struct vdec_h264_inst *inst, u8 *buf, u32 size)
574{
575 int ret = 0;
576 struct h264_param_sets *ps;
577 int nal_idx = 0;
578 bool is_combine = false;
579
580 is_combine = check_frame_combine(buf, size, &nal_idx);
581 if (nal_idx < 0)
582 return -1;
583
584 /* if the st compose from csd + slice that is the combine data. */
585 inst->vsi->is_combine = is_combine;
586 inst->vsi->nalu_pos = nal_idx;
587
588 ps = vzalloc(sizeof(struct h264_param_sets));
589 if (ps == NULL)
590 return -ENOMEM;
591
592 ret = h264_decode_extradata_ps(buf, size, ps);
593 if (ret) {
594 pr_err("parse extra data failed. err: %d\n", ret);
595 goto out;
596 }
597
598 if (ps->sps_parsed)
599 fill_vdec_params(inst, &ps->sps);
600
601 ret = ps->sps_parsed ? 0 : -1;
602out:
603 vfree(ps);
604
605 return ret;
606}
607
608static int vdec_h264_probe(unsigned long h_vdec,
609 struct aml_vcodec_mem *bs, void *out)
610{
611 struct vdec_h264_inst *inst =
612 (struct vdec_h264_inst *)h_vdec;
613 struct stream_info *st;
614 u8 *buf = (u8 *)bs->vaddr;
615 u32 size = bs->size;
616 int ret = 0;
617
618 st = (struct stream_info *)buf;
619 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
620 return 0;
621
622 if (st->magic == NORe || st->magic == NORn) {
623 buf = st->data;
624 size = st->length;
625 }
626
627 skip_aud_data(&buf, &size);
628
629 if (inst->ctx->param_sets_from_ucode)
630 ret = stream_parse_by_ucode(inst, buf, size);
631 else
632 ret = stream_parse(inst, buf, size);
633
634 inst->vsi->cur_pic = inst->vsi->pic;
635
636 return ret;
637}
638
639static void vdec_h264_deinit(unsigned long h_vdec)
640{
641 ulong flags;
642 struct vdec_h264_inst *inst = (struct vdec_h264_inst *)h_vdec;
643 struct aml_vcodec_ctx *ctx = inst->ctx;
644
645 aml_vcodec_debug_enter(inst);
646
647 video_decoder_release(&inst->vdec);
648
649 vcodec_vfm_release(&inst->vfm);
650
651 //dump_deinit();
652
653 spin_lock_irqsave(&ctx->slock, flags);
654 if (inst->vsi && inst->vsi->header_buf)
655 kfree(inst->vsi->header_buf);
656
657 if (inst->vsi)
658 kfree(inst->vsi);
659
660 kfree(inst);
661
662 ctx->drv_handle = 0;
663 spin_unlock_irqrestore(&ctx->slock, flags);
664}
665
666static int vdec_h264_get_fb(struct vdec_h264_inst *inst, struct vdec_v4l2_buffer **out)
667{
668 return get_fb_from_queue(inst->ctx, out);
669}
670
671static void vdec_h264_get_vf(struct vdec_h264_inst *inst, struct vdec_v4l2_buffer **out)
672{
673 struct vframe_s *vf = NULL;
674 struct vdec_v4l2_buffer *fb = NULL;
675
676 vf = peek_video_frame(&inst->vfm);
677 if (!vf) {
678 aml_vcodec_debug(inst, "there is no vframe.");
679 *out = NULL;
680 return;
681 }
682
683 vf = get_video_frame(&inst->vfm);
684 if (!vf) {
685 aml_vcodec_debug(inst, "the vframe is avalid.");
686 *out = NULL;
687 return;
688 }
689
690 atomic_set(&vf->use_cnt, 1);
691
692 fb = (struct vdec_v4l2_buffer *)vf->v4l_mem_handle;
693 fb->vf_handle = (unsigned long)vf;
694 fb->status = FB_ST_DISPLAY;
695
696 *out = fb;
697
698 //pr_info("%s, %d\n", __func__, fb->base_y.bytes_used);
699 //dump_write(fb->base_y.vaddr, fb->base_y.bytes_used);
700 //dump_write(fb->base_c.vaddr, fb->base_c.bytes_used);
701
702 /* convert yuv format. */
703 //swap_uv(fb->base_c.vaddr, fb->base_c.size);
704}
705
706static int vdec_write_nalu(struct vdec_h264_inst *inst,
707 u8 *buf, u32 size, u64 ts)
708{
709 int ret = -1;
710 struct aml_vdec_adapt *vdec = &inst->vdec;
711 bool is_combine = inst->vsi->is_combine;
712 int nalu_pos;
713 u32 nal_type;
714
715 /*print_hex_debug(buf, size, 32);*/
716
717 nalu_pos = vdec_search_startcode(buf, 16);
718 if (nalu_pos < 0)
719 goto err;
720
721 nal_type = AVC_NAL_TYPE(buf[nalu_pos]);
722 //aml_vcodec_debug(inst, "NALU type: %d, size: %u", nal_type, size);
723
724 if (nal_type == NAL_H264_SPS && !is_combine) {
725 if (inst->vsi->head_offset + size > HEADER_BUFFER_SIZE) {
726 ret = -EILSEQ;
727 goto err;
728 }
729 inst->vsi->sps_size = size;
730 memcpy(inst->vsi->header_buf + inst->vsi->head_offset, buf, size);
731 inst->vsi->head_offset += inst->vsi->sps_size;
732 ret = size;
733 } else if (nal_type == NAL_H264_PPS && !is_combine) {
734 //buf_sz -= nal_start_idx;
735 if (inst->vsi->head_offset + size > HEADER_BUFFER_SIZE) {
736 ret = -EILSEQ;
737 goto err;
738 }
739 inst->vsi->pps_size = size;
740 memcpy(inst->vsi->header_buf + inst->vsi->head_offset, buf, size);
741 inst->vsi->head_offset += inst->vsi->pps_size;
742 ret = size;
743 } else if (nal_type == NAL_H264_SEI && !is_combine) {
744 if (inst->vsi->head_offset + size > HEADER_BUFFER_SIZE) {
745 ret = -EILSEQ;
746 goto err;
747 }
748 inst->vsi->sei_size = size;
749 memcpy(inst->vsi->header_buf + inst->vsi->head_offset, buf, size);
750 inst->vsi->head_offset += inst->vsi->sei_size;
751 ret = size;
752 } else if (inst->vsi->head_offset == 0) {
753 ret = vdec_vframe_write(vdec, buf, size, ts);
754 } else {
755 char *write_buf = vmalloc(inst->vsi->head_offset + size);
756 if (!write_buf) {
757 ret = -ENOMEM;
758 goto err;
759 }
760
761 memcpy(write_buf, inst->vsi->header_buf, inst->vsi->head_offset);
762 memcpy(write_buf + inst->vsi->head_offset, buf, size);
763
764 ret = vdec_vframe_write(vdec, write_buf,
765 inst->vsi->head_offset + size, ts);
766
767 memset(inst->vsi->header_buf, 0, HEADER_BUFFER_SIZE);
768 inst->vsi->head_offset = 0;
769 inst->vsi->sps_size = 0;
770 inst->vsi->pps_size = 0;
771 inst->vsi->sei_size = 0;
772
773 vfree(write_buf);
774 }
775
776 return ret;
777err:
778 aml_vcodec_err(inst, "%s err(%d)", __func__, ret);
779 return ret;
780}
781
782static bool monitor_res_change(struct vdec_h264_inst *inst, u8 *buf, u32 size)
783{
784 int ret = 0, i = 0, j = 0;
785 u8 *p = buf;
786 int len = size;
787 u32 type;
788
789 for (i = 4; i < size; i++) {
790 j = find_start_code(p, len);
791 if (j > 0) {
792 len = size - (p - buf);
793 type = AVC_NAL_TYPE(p[j]);
794 if (type != NAL_H264_AUD &&
795 (type > NAL_H264_PPS || type < NAL_H264_SEI))
796 break;
797
798 if (type == NAL_H264_SPS) {
799 ret = stream_parse(inst, p, len);
800 if (ret)
801 break;
802 }
803 p += j;
804 }
805 p++;
806 }
807
808 if (!ret && ((inst->vsi->cur_pic.coded_width !=
809 inst->vsi->pic.coded_width ||
810 inst->vsi->cur_pic.coded_height !=
811 inst->vsi->pic.coded_height) ||
812 (inst->vsi->pic.profile_idc !=
813 inst->vsi->cur_pic.profile_idc))) {
814 pr_info("res change\n");
815 inst->vsi->cur_pic = inst->vsi->pic;
816 return true;
817 }
818
819 return false;
820}
821
822static int vdec_h264_decode(unsigned long h_vdec, struct aml_vcodec_mem *bs,
823 u64 timestamp, bool *res_chg)
824{
825 struct vdec_h264_inst *inst = (struct vdec_h264_inst *)h_vdec;
826 struct aml_vdec_adapt *vdec = &inst->vdec;
827 struct stream_info *st;
828 u8 *buf;
829 u32 size;
830 int ret = -1;
831
832 if (bs == NULL)
833 return -1;
834
835 if (vdec_input_full(vdec))
836 return -EAGAIN;
837
838 buf = (u8 *)bs->vaddr;
839 size = bs->size;
840 st = (struct stream_info *)buf;
841
842 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
843 ret = vdec_vbuf_write(vdec, st->m.buf, sizeof(st->m.drm));
844 else if (st->magic == NORe)
845 ret = vdec_vbuf_write(vdec, st->data, st->length);
846 else if (st->magic == NORn)
847 ret = vdec_write_nalu(inst, st->data, st->length, timestamp);
848 else if (inst->ctx->is_stream_mode)
849 ret = vdec_vbuf_write(vdec, buf, size);
850 else {
851 /*checked whether the resolution changes.*/
852 if ((*res_chg = monitor_res_change(inst, buf, size)))
853 return 0;
854
855 ret = vdec_write_nalu(inst, buf, size, timestamp);
856 }
857
858 return ret;
859}
860
861static void get_param_config_info(struct vdec_h264_inst *inst,
862 struct aml_dec_params *parms)
863{
864 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_CFGINFO)
865 parms->cfg = inst->parms.cfg;
866 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_PSINFO)
867 parms->ps = inst->parms.ps;
868 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_HDRINFO)
869 parms->hdr = inst->parms.hdr;
870 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_CNTINFO)
871 parms->cnt = inst->parms.cnt;
872
873 parms->parms_status |= inst->parms.parms_status;
874
875 aml_vcodec_debug(inst, "parms status: %u", parms->parms_status);
876}
877
878static int vdec_h264_get_param(unsigned long h_vdec,
879 enum vdec_get_param_type type, void *out)
880{
881 int ret = 0;
882 struct vdec_h264_inst *inst = (struct vdec_h264_inst *)h_vdec;
883
884 if (!inst) {
885 pr_err("the h264 inst of dec is invalid.\n");
886 return -1;
887 }
888
889 switch (type) {
890 case GET_PARAM_DISP_FRAME_BUFFER:
891 vdec_h264_get_vf(inst, out);
892 break;
893
894 case GET_PARAM_FREE_FRAME_BUFFER:
895 ret = vdec_h264_get_fb(inst, out);
896 break;
897
898 case GET_PARAM_PIC_INFO:
899 get_pic_info(inst, out);
900 break;
901
902 case GET_PARAM_DPB_SIZE:
903 get_dpb_size(inst, out);
904 break;
905
906 case GET_PARAM_CROP_INFO:
907 get_crop_info(inst, out);
908 break;
909
910 case GET_PARAM_CONFIG_INFO:
911 get_param_config_info(inst, out);
912 break;
913 default:
914 aml_vcodec_err(inst, "invalid get parameter type=%d", type);
915 ret = -EINVAL;
916 }
917
918 return ret;
919}
920
921static void set_param_write_sync(struct vdec_h264_inst *inst)
922{
923 complete(&inst->comp);
924}
925
926static void set_param_ps_info(struct vdec_h264_inst *inst,
927 struct aml_vdec_ps_infos *ps)
928{
929 struct vdec_pic_info *pic = &inst->vsi->pic;
930 struct vdec_h264_dec_info *dec = &inst->vsi->dec;
931 struct v4l2_rect *rect = &inst->vsi->crop;
932
933 /* fill visible area size that be used for EGL. */
934 pic->visible_width = ps->visible_width;
935 pic->visible_height = ps->visible_height;
936
937 /* calc visible ares. */
938 rect->left = 0;
939 rect->top = 0;
940 rect->width = pic->visible_width;
941 rect->height = pic->visible_height;
942
943 /* config canvas size that be used for decoder. */
944 pic->coded_width = ps->coded_width;
945 pic->coded_height = ps->coded_height;
946 pic->y_len_sz = pic->coded_width * pic->coded_height;
947 pic->c_len_sz = pic->y_len_sz >> 1;
948
949 dec->dpb_sz = ps->dpb_size;
950
951 inst->parms.ps = *ps;
952 inst->parms.parms_status |=
953 V4L2_CONFIG_PARM_DECODE_PSINFO;
954
955 /*wake up*/
956 complete(&inst->comp);
957
958 pr_info("Parse from ucode, crop(%d x %d), coded(%d x %d) dpb: %d\n",
959 ps->visible_width, ps->visible_height,
960 ps->coded_width, ps->coded_height,
961 dec->dpb_sz);
962}
963
964static void set_param_hdr_info(struct vdec_h264_inst *inst,
965 struct aml_vdec_hdr_infos *hdr)
966{
967 inst->parms.hdr = *hdr;
968 if (!(inst->parms.parms_status &
969 V4L2_CONFIG_PARM_DECODE_HDRINFO)) {
970 inst->parms.hdr = *hdr;
971 inst->parms.parms_status |=
972 V4L2_CONFIG_PARM_DECODE_HDRINFO;
973 aml_vdec_dispatch_event(inst->ctx,
974 V4L2_EVENT_SRC_CH_HDRINFO);
975 pr_info("H264 set HDR infos\n");
976 }
977}
978
979static void set_param_post_event(struct vdec_h264_inst *inst, u32 *event)
980{
981 aml_vdec_dispatch_event(inst->ctx, *event);
982 pr_info("H264 post event: %d\n", *event);
983}
984
985static int vdec_h264_set_param(unsigned long h_vdec,
986 enum vdec_set_param_type type, void *in)
987{
988 int ret = 0;
989 struct vdec_h264_inst *inst = (struct vdec_h264_inst *)h_vdec;
990
991 if (!inst) {
992 pr_err("the h264 inst of dec is invalid.\n");
993 return -1;
994 }
995
996 switch (type) {
997 case SET_PARAM_WRITE_FRAME_SYNC:
998 set_param_write_sync(inst);
999 break;
1000
1001 case SET_PARAM_PS_INFO:
1002 set_param_ps_info(inst, in);
1003 break;
1004
1005 case SET_PARAM_HDR_INFO:
1006 set_param_hdr_info(inst, in);
1007 break;
1008
1009 case SET_PARAM_POST_EVENT:
1010 set_param_post_event(inst, in);
1011 break;
1012 default:
1013 aml_vcodec_err(inst, "invalid set parameter type=%d", type);
1014 ret = -EINVAL;
1015 }
1016
1017 return ret;
1018}
1019
1020static struct vdec_common_if vdec_h264_if = {
1021 .init = vdec_h264_init,
1022 .probe = vdec_h264_probe,
1023 .decode = vdec_h264_decode,
1024 .get_param = vdec_h264_get_param,
1025 .set_param = vdec_h264_set_param,
1026 .deinit = vdec_h264_deinit,
1027};
1028
1029struct vdec_common_if *get_h264_dec_comm_if(void);
1030
1031struct vdec_common_if *get_h264_dec_comm_if(void)
1032{
1033 return &vdec_h264_if;
1034}
1035
generated by cgit at 2024-05-17 09:55:23 (GMT)