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path: root/drivers/amvdec_ports/decoder/vdec_h264_if.c (plain)
blob: 8a740c5e5ec71ecd6cd3508ffab7f3a3677bf18f
1/*
2* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
3*
4* This program is free software; you can redistribute it and/or modify
5* it under the terms of the GNU General Public License as published by
6* the Free Software Foundation; either version 2 of the License, or
7* (at your option) any later version.
8*
9* This program is distributed in the hope that it will be useful, but WITHOUT
10* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12* more details.
13*
14* You should have received a copy of the GNU General Public License along
15* with this program; if not, write to the Free Software Foundation, Inc.,
16* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17*
18* Description:
19*/
20#include <linux/module.h>
21#include <linux/slab.h>
22#include <linux/timer.h>
23#include <linux/delay.h>
24#include <linux/kernel.h>
25#include <uapi/linux/swab.h>
26
27#include "../vdec_drv_if.h"
28#include "../aml_vcodec_util.h"
29#include "../aml_vcodec_dec.h"
30#include "../aml_vcodec_drv.h"
31#include "../aml_vcodec_adapt.h"
32#include "../vdec_drv_base.h"
33#include "../aml_vcodec_vfm.h"
34#include "aml_h264_parser.h"
35#include "../utils/common.h"
36
37/* h264 NALU type */
38#define NAL_NON_IDR_SLICE 0x01
39#define NAL_IDR_SLICE 0x05
40#define NAL_H264_SEI 0x06
41#define NAL_H264_SPS 0x07
42#define NAL_H264_PPS 0x08
43#define NAL_H264_AUD 0x09
44
45#define AVC_NAL_TYPE(value) ((value) & 0x1F)
46
47#define BUF_PREDICTION_SZ (64 * 1024)//(32 * 1024)
48
49#define MB_UNIT_LEN 16
50
51/* motion vector size (bytes) for every macro block */
52#define HW_MB_STORE_SZ 64
53
54#define H264_MAX_FB_NUM 17
55#define HDR_PARSING_BUF_SZ 1024
56
57#define HEADER_BUFFER_SIZE (128 * 1024)
58
59/**
60 * struct h264_fb - h264 decode frame buffer information
61 * @vdec_fb_va : virtual address of struct vdec_fb
62 * @y_fb_dma : dma address of Y frame buffer (luma)
63 * @c_fb_dma : dma address of C frame buffer (chroma)
64 * @poc : picture order count of frame buffer
65 * @reserved : for 8 bytes alignment
66 */
67struct h264_fb {
68 uint64_t vdec_fb_va;
69 uint64_t y_fb_dma;
70 uint64_t c_fb_dma;
71 int32_t poc;
72 uint32_t reserved;
73};
74
75/**
76 * struct h264_ring_fb_list - ring frame buffer list
77 * @fb_list : frame buffer arrary
78 * @read_idx : read index
79 * @write_idx : write index
80 * @count : buffer count in list
81 */
82struct h264_ring_fb_list {
83 struct h264_fb fb_list[H264_MAX_FB_NUM];
84 unsigned int read_idx;
85 unsigned int write_idx;
86 unsigned int count;
87 unsigned int reserved;
88};
89
90/**
91 * struct vdec_h264_dec_info - decode information
92 * @dpb_sz : decoding picture buffer size
93 * @realloc_mv_buf : flag to notify driver to re-allocate mv buffer
94 * @reserved : for 8 bytes alignment
95 * @bs_dma : Input bit-stream buffer dma address
96 * @y_fb_dma : Y frame buffer dma address
97 * @c_fb_dma : C frame buffer dma address
98 * @vdec_fb_va : VDEC frame buffer struct virtual address
99 */
100struct vdec_h264_dec_info {
101 uint32_t dpb_sz;
102 uint32_t realloc_mv_buf;
103 uint32_t reserved;
104 uint64_t bs_dma;
105 uint64_t y_fb_dma;
106 uint64_t c_fb_dma;
107 uint64_t vdec_fb_va;
108};
109
110/**
111 * struct vdec_h264_vsi - shared memory for decode information exchange
112 * between VPU and Host.
113 * The memory is allocated by VPU then mapping to Host
114 * in vpu_dec_init() and freed in vpu_dec_deinit()
115 * by VPU.
116 * AP-W/R : AP is writer/reader on this item
117 * VPU-W/R: VPU is write/reader on this item
118 * @dec : decode information (AP-R, VPU-W)
119 * @pic : picture information (AP-R, VPU-W)
120 * @crop : crop information (AP-R, VPU-W)
121 */
122struct vdec_h264_vsi {
123 unsigned char hdr_buf[HDR_PARSING_BUF_SZ];
124 char *header_buf;
125 int sps_size;
126 int pps_size;
127 int sei_size;
128 int head_offset;
129 struct vdec_h264_dec_info dec;
130 struct vdec_pic_info pic;
131 struct vdec_pic_info cur_pic;
132 struct v4l2_rect crop;
133 bool is_combine;
134 int nalu_pos;
135};
136
137/**
138 * struct vdec_h264_inst - h264 decoder instance
139 * @num_nalu : how many nalus be decoded
140 * @ctx : point to aml_vcodec_ctx
141 * @pred_buf : HW working predication buffer
142 * @mv_buf : HW working motion vector buffer
143 * @vpu : VPU instance
144 * @vsi : VPU shared information
145 */
146struct vdec_h264_inst {
147 unsigned int num_nalu;
148 struct aml_vcodec_ctx *ctx;
149 struct aml_vcodec_mem pred_buf;
150 struct aml_vcodec_mem mv_buf[H264_MAX_FB_NUM];
151 struct aml_vdec_adapt vdec;
152 struct vdec_h264_vsi *vsi;
153 struct vcodec_vfm_s vfm;
154 struct aml_dec_params parms;
155 struct completion comp;
156};
157
158#if 0
159#define DUMP_FILE_NAME "/data/dump/dump.tmp"
160static struct file *filp;
161static loff_t file_pos;
162
163void dump_write(const char __user *buf, size_t count)
164{
165 mm_segment_t old_fs;
166
167 if (!filp)
168 return;
169
170 old_fs = get_fs();
171 set_fs(KERNEL_DS);
172
173 if (count != vfs_write(filp, buf, count, &file_pos))
174 pr_err("Failed to write file\n");
175
176 set_fs(old_fs);
177}
178
179void dump_init(void)
180{
181 filp = filp_open(DUMP_FILE_NAME, O_CREAT | O_RDWR, 0644);
182 if (IS_ERR(filp)) {
183 pr_err("open dump file failed\n");
184 filp = NULL;
185 }
186}
187
188void dump_deinit(void)
189{
190 if (filp) {
191 filp_close(filp, current->files);
192 filp = NULL;
193 file_pos = 0;
194 }
195}
196
197void swap_uv(void *uv, int size)
198{
199 int i;
200 __u16 *p = uv;
201
202 size /= 2;
203
204 for (i = 0; i < size; i++, p++)
205 *p = __swab16(*p);
206}
207#endif
208
209static void get_pic_info(struct vdec_h264_inst *inst,
210 struct vdec_pic_info *pic)
211{
212 *pic = inst->vsi->pic;
213
214 aml_vcodec_debug(inst, "pic(%d, %d), buf(%d, %d)",
215 pic->visible_width, pic->visible_height,
216 pic->coded_width, pic->coded_height);
217 aml_vcodec_debug(inst, "Y(%d, %d), C(%d, %d)", pic->y_bs_sz,
218 pic->y_len_sz, pic->c_bs_sz, pic->c_len_sz);
219}
220
221static void get_crop_info(struct vdec_h264_inst *inst, struct v4l2_rect *cr)
222{
223 cr->left = inst->vsi->crop.left;
224 cr->top = inst->vsi->crop.top;
225 cr->width = inst->vsi->crop.width;
226 cr->height = inst->vsi->crop.height;
227
228 aml_vcodec_debug(inst, "l=%d, t=%d, w=%d, h=%d",
229 cr->left, cr->top, cr->width, cr->height);
230}
231
232static void get_dpb_size(struct vdec_h264_inst *inst, unsigned int *dpb_sz)
233{
234 *dpb_sz = inst->vsi->dec.dpb_sz;
235 aml_vcodec_debug(inst, "sz=%d", *dpb_sz);
236}
237
238static void skip_aud_data(u8 **data, u32 *size)
239{
240 int i;
241
242 i = find_start_code(*data, *size);
243 if (i > 0 && (*data)[i++] == 0x9 && (*data)[i++] == 0xf0) {
244 *size -= i;
245 *data += i;
246 }
247}
248
249static u32 vdec_config_default_parms(u8 *parm)
250{
251 u8 *pbuf = parm;
252
253 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
254 pbuf += sprintf(pbuf, "mh264_double_write_mode:16;");
255 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:7;");
256 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_mode:0;");
257 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_endian:0;");
258
259 return parm - pbuf;
260}
261
262static void vdec_parser_parms(struct vdec_h264_inst *inst)
263{
264 struct aml_vcodec_ctx *ctx = inst->ctx;
265
266 if (ctx->config.parm.dec.parms_status &
267 V4L2_CONFIG_PARM_DECODE_CFGINFO) {
268 u8 *pbuf = ctx->config.buf;
269
270 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
271 pbuf += sprintf(pbuf, "mh264_double_write_mode:%d;",
272 ctx->config.parm.dec.cfg.double_write_mode);
273 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:%d;",
274 ctx->config.parm.dec.cfg.ref_buf_margin);
275 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_mode:%d;",
276 ctx->config.parm.dec.cfg.canvas_mem_mode);
277 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_endian:%d;",
278 ctx->config.parm.dec.cfg.canvas_mem_endian);
279 ctx->config.length = pbuf - ctx->config.buf;
280 } else {
281 ctx->config.parm.dec.cfg.double_write_mode = 16;
282 ctx->config.length = vdec_config_default_parms(ctx->config.buf);
283 }
284
285 inst->vdec.config = ctx->config;
286 inst->parms.cfg = ctx->config.parm.dec.cfg;
287 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_CFGINFO;
288}
289
290static int vdec_h264_init(struct aml_vcodec_ctx *ctx, unsigned long *h_vdec)
291{
292 struct vdec_h264_inst *inst = NULL;
293 int ret = -1;
294
295 inst = kzalloc(sizeof(*inst), GFP_KERNEL);
296 if (!inst)
297 return -ENOMEM;
298
299 inst->vdec.video_type = VFORMAT_H264;
300 inst->vdec.dev = ctx->dev->vpu_plat_dev;
301 inst->vdec.filp = ctx->dev->filp;
302 inst->vdec.ctx = ctx;
303 inst->ctx = ctx;
304
305 vdec_parser_parms(inst);
306
307 /* set play mode.*/
308 if (ctx->is_drm_mode)
309 inst->vdec.port.flag |= PORT_FLAG_DRM;
310
311 /* init vfm */
312 inst->vfm.ctx = ctx;
313 inst->vfm.ada_ctx = &inst->vdec;
314 ret = vcodec_vfm_init(&inst->vfm);
315 if (ret) {
316 pr_err("%s, init vfm failed.\n", __func__);
317 goto err;
318 }
319
320 ret = video_decoder_init(&inst->vdec);
321 if (ret) {
322 aml_vcodec_err(inst, "vdec_h264 init err=%d", ret);
323 goto err;
324 }
325
326 /* probe info from the stream */
327 inst->vsi = kzalloc(sizeof(struct vdec_h264_vsi), GFP_KERNEL);
328 if (!inst->vsi) {
329 ret = -ENOMEM;
330 goto err;
331 }
332
333 /* alloc the header buffer to be used cache sps or spp etc.*/
334 inst->vsi->header_buf = kzalloc(HEADER_BUFFER_SIZE, GFP_KERNEL);
335 if (!inst->vsi) {
336 ret = -ENOMEM;
337 goto err;
338 }
339
340 init_completion(&inst->comp);
341
342 aml_vcodec_debug(inst, "H264 Instance >> %p", inst);
343
344 ctx->ada_ctx = &inst->vdec;
345 *h_vdec = (unsigned long)inst;
346
347 //dump_init();
348
349 return 0;
350err:
351 if (inst)
352 vcodec_vfm_release(&inst->vfm);
353 if (inst && inst->vsi && inst->vsi->header_buf)
354 kfree(inst->vsi->header_buf);
355 if (inst && inst->vsi)
356 kfree(inst->vsi);
357 if (inst)
358 kfree(inst);
359 *h_vdec = 0;
360
361 return ret;
362}
363
364#if 0
365static int refer_buffer_num(int level_idc, int max_poc_cnt,
366 int mb_width, int mb_height)
367{
368 int size;
369 int pic_size = mb_width * mb_height * 384;
370
371 switch (level_idc) {
372 case 9:
373 size = 152064;
374 break;
375 case 10:
376 size = 152064;
377 break;
378 case 11:
379 size = 345600;
380 break;
381 case 12:
382 size = 912384;
383 break;
384 case 13:
385 size = 912384;
386 break;
387 case 20:
388 size = 912384;
389 break;
390 case 21:
391 size = 1824768;
392 break;
393 case 22:
394 size = 3110400;
395 break;
396 case 30:
397 size = 3110400;
398 break;
399 case 31:
400 size = 6912000;
401 break;
402 case 32:
403 size = 7864320;
404 break;
405 case 40:
406 size = 12582912;
407 break;
408 case 41:
409 size = 12582912;
410 break;
411 case 42:
412 size = 13369344;
413 break;
414 case 50:
415 size = 42393600;
416 break;
417 case 51:
418 case 52:
419 default:
420 size = 70778880;
421 break;
422 }
423
424 size /= pic_size;
425 size = size + 1; /* need more buffers */
426
427 if (size > max_poc_cnt)
428 size = max_poc_cnt;
429
430 return size;
431}
432#endif
433
434static void vdec_config_dw_mode(struct vdec_pic_info *pic, int dw_mode)
435{
436 switch (dw_mode) {
437 case 0x1: /* (w x h) + (w/2 x h) */
438 pic->coded_width += pic->coded_width >> 1;
439 pic->y_len_sz = pic->coded_width * pic->coded_height;
440 pic->c_len_sz = pic->y_len_sz >> 1;
441 break;
442 case 0x2: /* (w x h) + (w/2 x h/2) */
443 pic->coded_width += pic->coded_width >> 1;
444 pic->coded_height += pic->coded_height >> 1;
445 pic->y_len_sz = pic->coded_width * pic->coded_height;
446 pic->c_len_sz = pic->y_len_sz >> 1;
447 break;
448 default: /* nothing to do */
449 break;
450 }
451}
452
453static void fill_vdec_params(struct vdec_h264_inst *inst, struct h264_SPS_t *sps)
454{
455 struct vdec_pic_info *pic = &inst->vsi->pic;
456 struct vdec_h264_dec_info *dec = &inst->vsi->dec;
457 struct v4l2_rect *rect = &inst->vsi->crop;
458 int dw = inst->parms.cfg.double_write_mode;
459 int margin = inst->parms.cfg.ref_buf_margin;
460 u32 mb_w, mb_h, width, height;
461
462 mb_w = sps->mb_width;
463 mb_h = sps->mb_height;
464
465 width = mb_w << 4;
466 height = mb_h << 4;
467
468 width -= (sps->crop_left + sps->crop_right);
469 height -= (sps->crop_top + sps->crop_bottom);
470
471 /* fill visible area size that be used for EGL. */
472 pic->visible_width = width;
473 pic->visible_height = height;
474
475 /* calc visible ares. */
476 rect->left = 0;
477 rect->top = 0;
478 rect->width = pic->visible_width;
479 rect->height = pic->visible_height;
480
481 /* config canvas size that be used for decoder. */
482 pic->coded_width = ALIGN(mb_w, 4) << 4;
483 pic->coded_height = ALIGN(mb_h, 4) << 4;
484 pic->y_len_sz = pic->coded_width * pic->coded_height;
485 pic->c_len_sz = pic->y_len_sz >> 1;
486 pic->profile_idc = sps->profile_idc;
487
488 /* calc DPB size */
489 dec->dpb_sz = sps->num_reorder_frames + margin;
490
491 inst->parms.ps.visible_width = pic->visible_width;
492 inst->parms.ps.visible_height = pic->visible_height;
493 inst->parms.ps.coded_width = pic->coded_width;
494 inst->parms.ps.coded_height = pic->coded_height;
495 inst->parms.ps.profile = sps->profile_idc;
496 inst->parms.ps.mb_width = sps->mb_width;
497 inst->parms.ps.mb_height = sps->mb_height;
498 inst->parms.ps.ref_frames = sps->ref_frame_count;
499 inst->parms.ps.reorder_frames = sps->num_reorder_frames;
500 inst->parms.ps.dpb_size = dec->dpb_sz;
501 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_PSINFO;
502
503 vdec_config_dw_mode(pic, dw);
504
505 aml_vcodec_debug(inst, "[%d] The stream infos, dw: %d, coded:(%d x %d), visible:(%d x %d), DPB: %d, margin: %d\n",
506 inst->ctx->id, dw, pic->coded_width, pic->coded_height,
507 pic->visible_width, pic->visible_height,
508 dec->dpb_sz - margin, margin);
509}
510
511static bool check_frame_combine(u8 *buf, u32 size, int *pos)
512{
513 bool combine = false;
514 int i = 0, j = 0, cnt = 0;
515 u8 *p = buf;
516
517 for (i = 4; i < size; i++) {
518 j = find_start_code(p, 7);
519 if (j > 0) {
520 if (++cnt > 1) {
521 combine = true;
522 break;
523 }
524
525 *pos = p - buf + j;
526 p += j;
527 i += j;
528 }
529 p++;
530 }
531
532 //pr_info("nal pos: %d, is_combine: %d\n",*pos, *is_combine);
533 return combine;
534}
535
536static int vdec_search_startcode(u8 *buf, u32 range)
537{
538 int pos = -1;
539 int i = 0, j = 0;
540 u8 *p = buf;
541
542 for (i = 4; i < range; i++) {
543 j = find_start_code(p, 7);
544 if (j > 0) {
545 pos = p - buf + j;
546 break;
547 }
548 p++;
549 }
550
551 return pos;
552}
553
554static int stream_parse_by_ucode(struct vdec_h264_inst *inst, u8 *buf, u32 size)
555{
556 int ret = 0;
557 struct aml_vdec_adapt *vdec = &inst->vdec;
558
559 ret = vdec_vframe_write(vdec, buf, size, 0);
560 if (ret < 0) {
561 pr_err("write frame data failed. err: %d\n", ret);
562 return ret;
563 }
564
565 /* wait ucode parse ending. */
566 wait_for_completion_timeout(&inst->comp,
567 msecs_to_jiffies(1000));
568
569 return inst->vsi->dec.dpb_sz ? 0 : -1;
570}
571
572static int stream_parse(struct vdec_h264_inst *inst, u8 *buf, u32 size)
573{
574 int ret = 0;
575 struct h264_param_sets *ps;
576 int nal_idx = 0;
577 bool is_combine = false;
578
579 is_combine = check_frame_combine(buf, size, &nal_idx);
580 if (nal_idx < 0)
581 return -1;
582
583 /* if the st compose from csd + slice that is the combine data. */
584 inst->vsi->is_combine = is_combine;
585 inst->vsi->nalu_pos = nal_idx;
586
587 ps = vzalloc(sizeof(struct h264_param_sets));
588 if (ps == NULL)
589 return -ENOMEM;
590
591 ret = h264_decode_extradata_ps(buf, size, ps);
592 if (ret) {
593 pr_err("parse extra data failed. err: %d\n", ret);
594 goto out;
595 }
596
597 if (ps->sps_parsed)
598 fill_vdec_params(inst, &ps->sps);
599
600 ret = ps->sps_parsed ? 0 : -1;
601out:
602 vfree(ps);
603
604 return ret;
605}
606
607static int vdec_h264_probe(unsigned long h_vdec,
608 struct aml_vcodec_mem *bs, void *out)
609{
610 struct vdec_h264_inst *inst =
611 (struct vdec_h264_inst *)h_vdec;
612 struct stream_info *st;
613 u8 *buf = (u8 *)bs->vaddr;
614 u32 size = bs->size;
615 int ret = 0;
616
617 st = (struct stream_info *)buf;
618 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
619 return 0;
620
621 if (st->magic == NORe || st->magic == NORn) {
622 buf = st->data;
623 size = st->length;
624 }
625
626 skip_aud_data(&buf, &size);
627
628 if (inst->ctx->param_sets_from_ucode)
629 ret = stream_parse_by_ucode(inst, buf, size);
630 else
631 ret = stream_parse(inst, buf, size);
632
633 inst->vsi->cur_pic = inst->vsi->pic;
634
635 return ret;
636}
637
638static void vdec_h264_deinit(unsigned long h_vdec)
639{
640 ulong flags;
641 struct vdec_h264_inst *inst = (struct vdec_h264_inst *)h_vdec;
642 struct aml_vcodec_ctx *ctx = inst->ctx;
643
644 aml_vcodec_debug_enter(inst);
645
646 video_decoder_release(&inst->vdec);
647
648 vcodec_vfm_release(&inst->vfm);
649
650 //dump_deinit();
651
652 spin_lock_irqsave(&ctx->slock, flags);
653 if (inst->vsi && inst->vsi->header_buf)
654 kfree(inst->vsi->header_buf);
655
656 if (inst->vsi)
657 kfree(inst->vsi);
658
659 kfree(inst);
660
661 ctx->drv_handle = 0;
662 spin_unlock_irqrestore(&ctx->slock, flags);
663}
664
665static int vdec_h264_get_fb(struct vdec_h264_inst *inst, struct vdec_v4l2_buffer **out)
666{
667 return get_fb_from_queue(inst->ctx, out);
668}
669
670static void vdec_h264_get_vf(struct vdec_h264_inst *inst, struct vdec_v4l2_buffer **out)
671{
672 struct vframe_s *vf = NULL;
673 struct vdec_v4l2_buffer *fb = NULL;
674
675 vf = peek_video_frame(&inst->vfm);
676 if (!vf) {
677 aml_vcodec_debug(inst, "there is no vframe.");
678 *out = NULL;
679 return;
680 }
681
682 vf = get_video_frame(&inst->vfm);
683 if (!vf) {
684 aml_vcodec_debug(inst, "the vframe is avalid.");
685 *out = NULL;
686 return;
687 }
688
689 atomic_set(&vf->use_cnt, 1);
690
691 fb = (struct vdec_v4l2_buffer *)vf->v4l_mem_handle;
692 fb->vf_handle = (unsigned long)vf;
693 fb->status = FB_ST_DISPLAY;
694
695 *out = fb;
696
697 //pr_info("%s, %d\n", __func__, fb->base_y.bytes_used);
698 //dump_write(fb->base_y.vaddr, fb->base_y.bytes_used);
699 //dump_write(fb->base_c.vaddr, fb->base_c.bytes_used);
700
701 /* convert yuv format. */
702 //swap_uv(fb->base_c.vaddr, fb->base_c.size);
703}
704
705static int vdec_write_nalu(struct vdec_h264_inst *inst,
706 u8 *buf, u32 size, u64 ts)
707{
708 int ret = -1;
709 struct aml_vdec_adapt *vdec = &inst->vdec;
710 bool is_combine = inst->vsi->is_combine;
711 int nalu_pos;
712 u32 nal_type;
713
714 /*print_hex_debug(buf, size, 32);*/
715
716 nalu_pos = vdec_search_startcode(buf, 16);
717 if (nalu_pos < 0)
718 goto err;
719
720 nal_type = AVC_NAL_TYPE(buf[nalu_pos]);
721 //aml_vcodec_debug(inst, "NALU type: %d, size: %u", nal_type, size);
722
723 if (nal_type == NAL_H264_SPS && !is_combine) {
724 if (inst->vsi->head_offset + size > HEADER_BUFFER_SIZE) {
725 ret = -EILSEQ;
726 goto err;
727 }
728 inst->vsi->sps_size = size;
729 memcpy(inst->vsi->header_buf + inst->vsi->head_offset, buf, size);
730 inst->vsi->head_offset += inst->vsi->sps_size;
731 ret = size;
732 } else if (nal_type == NAL_H264_PPS && !is_combine) {
733 //buf_sz -= nal_start_idx;
734 if (inst->vsi->head_offset + size > HEADER_BUFFER_SIZE) {
735 ret = -EILSEQ;
736 goto err;
737 }
738 inst->vsi->pps_size = size;
739 memcpy(inst->vsi->header_buf + inst->vsi->head_offset, buf, size);
740 inst->vsi->head_offset += inst->vsi->pps_size;
741 ret = size;
742 } else if (nal_type == NAL_H264_SEI && !is_combine) {
743 if (inst->vsi->head_offset + size > HEADER_BUFFER_SIZE) {
744 ret = -EILSEQ;
745 goto err;
746 }
747 inst->vsi->sei_size = size;
748 memcpy(inst->vsi->header_buf + inst->vsi->head_offset, buf, size);
749 inst->vsi->head_offset += inst->vsi->sei_size;
750 ret = size;
751 } else if (inst->vsi->head_offset == 0) {
752 ret = vdec_vframe_write(vdec, buf, size, ts);
753 } else {
754 char *write_buf = vmalloc(inst->vsi->head_offset + size);
755 if (!write_buf) {
756 ret = -ENOMEM;
757 goto err;
758 }
759
760 memcpy(write_buf, inst->vsi->header_buf, inst->vsi->head_offset);
761 memcpy(write_buf + inst->vsi->head_offset, buf, size);
762
763 ret = vdec_vframe_write(vdec, write_buf,
764 inst->vsi->head_offset + size, ts);
765
766 memset(inst->vsi->header_buf, 0, HEADER_BUFFER_SIZE);
767 inst->vsi->head_offset = 0;
768 inst->vsi->sps_size = 0;
769 inst->vsi->pps_size = 0;
770 inst->vsi->sei_size = 0;
771
772 vfree(write_buf);
773 }
774
775 return ret;
776err:
777 aml_vcodec_err(inst, "%s err(%d)", __func__, ret);
778 return ret;
779}
780
781static bool monitor_res_change(struct vdec_h264_inst *inst, u8 *buf, u32 size)
782{
783 int ret = 0, i = 0, j = 0;
784 u8 *p = buf;
785 int len = size;
786 u32 type;
787
788 for (i = 4; i < size; i++) {
789 j = find_start_code(p, len);
790 if (j > 0) {
791 len = size - (p - buf);
792 type = AVC_NAL_TYPE(p[j]);
793 if (type != NAL_H264_AUD &&
794 (type > NAL_H264_PPS || type < NAL_H264_SEI))
795 break;
796
797 if (type == NAL_H264_SPS) {
798 ret = stream_parse(inst, p, len);
799 if (ret)
800 break;
801 }
802 p += j;
803 }
804 p++;
805 }
806
807 if (!ret && ((inst->vsi->cur_pic.coded_width !=
808 inst->vsi->pic.coded_width ||
809 inst->vsi->cur_pic.coded_height !=
810 inst->vsi->pic.coded_height) ||
811 (inst->vsi->pic.profile_idc !=
812 inst->vsi->cur_pic.profile_idc))) {
813 pr_info("res change\n");
814 inst->vsi->cur_pic = inst->vsi->pic;
815 return true;
816 }
817
818 return false;
819}
820
821static int vdec_h264_decode(unsigned long h_vdec, struct aml_vcodec_mem *bs,
822 u64 timestamp, bool *res_chg)
823{
824 struct vdec_h264_inst *inst = (struct vdec_h264_inst *)h_vdec;
825 struct aml_vdec_adapt *vdec = &inst->vdec;
826 struct stream_info *st;
827 u8 *buf;
828 u32 size;
829 int ret = -1;
830
831 if (bs == NULL)
832 return -1;
833
834 if (vdec_input_full(vdec))
835 return -EAGAIN;
836
837 buf = (u8 *)bs->vaddr;
838 size = bs->size;
839 st = (struct stream_info *)buf;
840
841 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
842 ret = vdec_vbuf_write(vdec, st->m.buf, sizeof(st->m.drm));
843 else if (st->magic == NORe)
844 ret = vdec_vbuf_write(vdec, st->data, st->length);
845 else if (st->magic == NORn)
846 ret = vdec_write_nalu(inst, st->data, st->length, timestamp);
847 else if (inst->ctx->is_stream_mode)
848 ret = vdec_vbuf_write(vdec, buf, size);
849 else {
850 /*checked whether the resolution changes.*/
851 if ((*res_chg = monitor_res_change(inst, buf, size)))
852 return 0;
853
854 ret = vdec_write_nalu(inst, buf, size, timestamp);
855 }
856
857 return ret;
858}
859
860static void get_param_config_info(struct vdec_h264_inst *inst,
861 struct aml_dec_params *parms)
862{
863 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_CFGINFO)
864 parms->cfg = inst->parms.cfg;
865 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_PSINFO)
866 parms->ps = inst->parms.ps;
867 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_HDRINFO)
868 parms->hdr = inst->parms.hdr;
869 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_CNTINFO)
870 parms->cnt = inst->parms.cnt;
871
872 parms->parms_status |= inst->parms.parms_status;
873
874 aml_vcodec_debug(inst, "parms status: %u", parms->parms_status);
875}
876
877static int vdec_h264_get_param(unsigned long h_vdec,
878 enum vdec_get_param_type type, void *out)
879{
880 int ret = 0;
881 struct vdec_h264_inst *inst = (struct vdec_h264_inst *)h_vdec;
882
883 if (!inst) {
884 pr_err("the h264 inst of dec is invalid.\n");
885 return -1;
886 }
887
888 switch (type) {
889 case GET_PARAM_DISP_FRAME_BUFFER:
890 vdec_h264_get_vf(inst, out);
891 break;
892
893 case GET_PARAM_FREE_FRAME_BUFFER:
894 ret = vdec_h264_get_fb(inst, out);
895 break;
896
897 case GET_PARAM_PIC_INFO:
898 get_pic_info(inst, out);
899 break;
900
901 case GET_PARAM_DPB_SIZE:
902 get_dpb_size(inst, out);
903 break;
904
905 case GET_PARAM_CROP_INFO:
906 get_crop_info(inst, out);
907 break;
908
909 case GET_PARAM_CONFIG_INFO:
910 get_param_config_info(inst, out);
911 break;
912 default:
913 aml_vcodec_err(inst, "invalid get parameter type=%d", type);
914 ret = -EINVAL;
915 }
916
917 return ret;
918}
919
920static void set_param_write_sync(struct vdec_h264_inst *inst)
921{
922 complete(&inst->comp);
923}
924
925static void set_param_ps_info(struct vdec_h264_inst *inst,
926 struct aml_vdec_ps_infos *ps)
927{
928 struct vdec_pic_info *pic = &inst->vsi->pic;
929 struct vdec_h264_dec_info *dec = &inst->vsi->dec;
930 struct v4l2_rect *rect = &inst->vsi->crop;
931
932 /* fill visible area size that be used for EGL. */
933 pic->visible_width = ps->visible_width;
934 pic->visible_height = ps->visible_height;
935
936 /* calc visible ares. */
937 rect->left = 0;
938 rect->top = 0;
939 rect->width = pic->visible_width;
940 rect->height = pic->visible_height;
941
942 /* config canvas size that be used for decoder. */
943 pic->coded_width = ps->coded_width;
944 pic->coded_height = ps->coded_height;
945 pic->y_len_sz = pic->coded_width * pic->coded_height;
946 pic->c_len_sz = pic->y_len_sz >> 1;
947
948 dec->dpb_sz = ps->dpb_size;
949
950 inst->parms.ps = *ps;
951 inst->parms.parms_status |=
952 V4L2_CONFIG_PARM_DECODE_PSINFO;
953
954 /*wake up*/
955 complete(&inst->comp);
956
957 pr_info("Parse from ucode, crop(%d x %d), coded(%d x %d) dpb: %d\n",
958 ps->visible_width, ps->visible_height,
959 ps->coded_width, ps->coded_height,
960 dec->dpb_sz);
961}
962
963static void set_param_hdr_info(struct vdec_h264_inst *inst,
964 struct aml_vdec_hdr_infos *hdr)
965{
966 inst->parms.hdr = *hdr;
967 if (!(inst->parms.parms_status &
968 V4L2_CONFIG_PARM_DECODE_HDRINFO)) {
969 inst->parms.hdr = *hdr;
970 inst->parms.parms_status |=
971 V4L2_CONFIG_PARM_DECODE_HDRINFO;
972 aml_vdec_dispatch_event(inst->ctx,
973 V4L2_EVENT_SRC_CH_HDRINFO);
974 pr_info("H264 set HDR infos\n");
975 }
976}
977
978static void set_param_post_event(struct vdec_h264_inst *inst, u32 *event)
979{
980 aml_vdec_dispatch_event(inst->ctx, *event);
981 pr_info("H264 post event: %d\n", *event);
982}
983
984static int vdec_h264_set_param(unsigned long h_vdec,
985 enum vdec_set_param_type type, void *in)
986{
987 int ret = 0;
988 struct vdec_h264_inst *inst = (struct vdec_h264_inst *)h_vdec;
989
990 if (!inst) {
991 pr_err("the h264 inst of dec is invalid.\n");
992 return -1;
993 }
994
995 switch (type) {
996 case SET_PARAM_WRITE_FRAME_SYNC:
997 set_param_write_sync(inst);
998 break;
999
1000 case SET_PARAM_PS_INFO:
1001 set_param_ps_info(inst, in);
1002 break;
1003
1004 case SET_PARAM_HDR_INFO:
1005 set_param_hdr_info(inst, in);
1006 break;
1007
1008 case SET_PARAM_POST_EVENT:
1009 set_param_post_event(inst, in);
1010 break;
1011 default:
1012 aml_vcodec_err(inst, "invalid set parameter type=%d", type);
1013 ret = -EINVAL;
1014 }
1015
1016 return ret;
1017}
1018
1019static struct vdec_common_if vdec_h264_if = {
1020 .init = vdec_h264_init,
1021 .probe = vdec_h264_probe,
1022 .decode = vdec_h264_decode,
1023 .get_param = vdec_h264_get_param,
1024 .set_param = vdec_h264_set_param,
1025 .deinit = vdec_h264_deinit,
1026};
1027
1028struct vdec_common_if *get_h264_dec_comm_if(void);
1029
1030struct vdec_common_if *get_h264_dec_comm_if(void)
1031{
1032 return &vdec_h264_if;
1033}
1034
generated by cgit at 2024-05-17 10:48:30 (GMT)