summaryrefslogtreecommitdiff
path: root/drivers/amvdec_ports/decoder/vdec_hevc_if.c (plain)
blob: fb3fce776c79e211d0456bd42c49ac7d5bca1c07
1/*
2* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
3*
4* This program is free software; you can redistribute it and/or modify
5* it under the terms of the GNU General Public License as published by
6* the Free Software Foundation; either version 2 of the License, or
7* (at your option) any later version.
8*
9* This program is distributed in the hope that it will be useful, but WITHOUT
10* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12* more details.
13*
14* You should have received a copy of the GNU General Public License along
15* with this program; if not, write to the Free Software Foundation, Inc.,
16* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17*
18* Description:
19*/
20#include <linux/module.h>
21#include <linux/slab.h>
22#include <linux/timer.h>
23#include <linux/delay.h>
24#include <linux/kernel.h>
25#include <uapi/linux/swab.h>
26#include "../vdec_drv_if.h"
27#include "../aml_vcodec_util.h"
28#include "../aml_vcodec_dec.h"
29#include "../aml_vcodec_drv.h"
30#include "../aml_vcodec_adapt.h"
31#include "../vdec_drv_base.h"
32#include "../aml_vcodec_vfm.h"
33#include "aml_hevc_parser.h"
34
35#define HEVC_NAL_TYPE(value) ((value >> 1) & 0x3F)
36#define HEADER_BUFFER_SIZE (32 * 1024)
37
38/**
39 * struct hevc_fb - hevc decode frame buffer information
40 * @vdec_fb_va : virtual address of struct vdec_fb
41 * @y_fb_dma : dma address of Y frame buffer (luma)
42 * @c_fb_dma : dma address of C frame buffer (chroma)
43 * @poc : picture order count of frame buffer
44 * @reserved : for 8 bytes alignment
45 */
46struct hevc_fb {
47 uint64_t vdec_fb_va;
48 uint64_t y_fb_dma;
49 uint64_t c_fb_dma;
50 int32_t poc;
51 uint32_t reserved;
52};
53
54/**
55 * struct vdec_hevc_dec_info - decode information
56 * @dpb_sz : decoding picture buffer size
57 * @resolution_changed : resoltion change happen
58 * @reserved : for 8 bytes alignment
59 * @bs_dma : Input bit-stream buffer dma address
60 * @y_fb_dma : Y frame buffer dma address
61 * @c_fb_dma : C frame buffer dma address
62 * @vdec_fb_va : VDEC frame buffer struct virtual address
63 */
64struct vdec_hevc_dec_info {
65 uint32_t dpb_sz;
66 uint32_t resolution_changed;
67 uint32_t reserved;
68 uint64_t bs_dma;
69 uint64_t y_fb_dma;
70 uint64_t c_fb_dma;
71 uint64_t vdec_fb_va;
72};
73
74/**
75 * struct vdec_hevc_vsi - shared memory for decode information exchange
76 * between VPU and Host.
77 * The memory is allocated by VPU then mapping to Host
78 * in vpu_dec_init() and freed in vpu_dec_deinit()
79 * by VPU.
80 * AP-W/R : AP is writer/reader on this item
81 * VPU-W/R: VPU is write/reader on this item
82 * @hdr_buf : Header parsing buffer (AP-W, VPU-R)
83 * @list_free : free frame buffer ring list (AP-W/R, VPU-W)
84 * @list_disp : display frame buffer ring list (AP-R, VPU-W)
85 * @dec : decode information (AP-R, VPU-W)
86 * @pic : picture information (AP-R, VPU-W)
87 * @crop : crop information (AP-R, VPU-W)
88 */
89struct vdec_hevc_vsi {
90 char *header_buf;
91 int sps_size;
92 int pps_size;
93 int sei_size;
94 int head_offset;
95 struct vdec_hevc_dec_info dec;
96 struct vdec_pic_info pic;
97 struct vdec_pic_info cur_pic;
98 struct v4l2_rect crop;
99 bool is_combine;
100 int nalu_pos;
101 struct h265_param_sets ps;
102};
103
104/**
105 * struct vdec_hevc_inst - hevc decoder instance
106 * @num_nalu : how many nalus be decoded
107 * @ctx : point to aml_vcodec_ctx
108 * @vsi : VPU shared information
109 */
110struct vdec_hevc_inst {
111 unsigned int num_nalu;
112 struct aml_vcodec_ctx *ctx;
113 struct aml_vdec_adapt vdec;
114 struct vdec_hevc_vsi *vsi;
115 struct vcodec_vfm_s vfm;
116 struct aml_dec_params parms;
117 struct completion comp;
118};
119
120static void get_pic_info(struct vdec_hevc_inst *inst,
121 struct vdec_pic_info *pic)
122{
123 *pic = inst->vsi->pic;
124
125 aml_vcodec_debug(inst, "pic(%d, %d), buf(%d, %d)",
126 pic->visible_width, pic->visible_height,
127 pic->coded_width, pic->coded_height);
128 aml_vcodec_debug(inst, "Y(%d, %d), C(%d, %d)", pic->y_bs_sz,
129 pic->y_len_sz, pic->c_bs_sz, pic->c_len_sz);
130}
131
132static void get_crop_info(struct vdec_hevc_inst *inst, struct v4l2_rect *cr)
133{
134 cr->left = inst->vsi->crop.left;
135 cr->top = inst->vsi->crop.top;
136 cr->width = inst->vsi->crop.width;
137 cr->height = inst->vsi->crop.height;
138
139 aml_vcodec_debug(inst, "l=%d, t=%d, w=%d, h=%d",
140 cr->left, cr->top, cr->width, cr->height);
141}
142
143static void get_dpb_size(struct vdec_hevc_inst *inst, unsigned int *dpb_sz)
144{
145 *dpb_sz = inst->vsi->dec.dpb_sz;
146 aml_vcodec_debug(inst, "sz=%d", *dpb_sz);
147}
148
149static u32 vdec_config_default_parms(u8 *parm)
150{
151 u8 *pbuf = parm;
152
153 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
154 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:7;");
155 pbuf += sprintf(pbuf, "hevc_double_write_mode:16;");
156 pbuf += sprintf(pbuf, "hevc_buf_width:4096;");
157 pbuf += sprintf(pbuf, "hevc_buf_height:2304;");
158 pbuf += sprintf(pbuf, "save_buffer_mode:0;");
159
160 return parm - pbuf;
161}
162
163static void vdec_parser_parms(struct vdec_hevc_inst *inst)
164{
165 struct aml_vcodec_ctx *ctx = inst->ctx;
166
167 if (!ctx->config.length) {
168 ctx->config.type = V4L2_CONFIG_PARM_DECODE;
169 ctx->config.parm.dec.double_write_mode = 16;
170 inst->parms = ctx->config.parm.dec;
171
172 ctx->config.length =
173 vdec_config_default_parms(ctx->config.buf);
174 } else {
175 u8 *pbuf = ctx->config.buf;
176
177 inst->parms = ctx->config.parm.dec;
178 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
179 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:%d;",
180 inst->parms.buffer_margin);
181 pbuf += sprintf(pbuf, "hevc_double_write_mode:%d;",
182 inst->parms.double_write_mode);
183 pbuf += sprintf(pbuf, "hevc_buf_width:%d;",
184 inst->parms.buffer_width);
185 pbuf += sprintf(pbuf, "hevc_buf_height:%d;",
186 inst->parms.buffer_height);
187 pbuf += sprintf(pbuf, "save_buffer_mode:%d;",
188 inst->parms.buffer_mode);
189 ctx->config.length = pbuf - ctx->config.buf;
190 }
191
192 inst->vdec.config = ctx->config;
193
194 inst->parms.dec_parms_status |=
195 V4L2_CONFIG_PARM_DECODE_COMMON;
196}
197
198static int vdec_hevc_init(struct aml_vcodec_ctx *ctx, unsigned long *h_vdec)
199{
200 struct vdec_hevc_inst *inst = NULL;
201 int ret = -1;
202
203 inst = kzalloc(sizeof(*inst), GFP_KERNEL);
204 if (!inst)
205 return -ENOMEM;
206
207 inst->vdec.video_type = VFORMAT_HEVC;
208 inst->vdec.dev = ctx->dev->vpu_plat_dev;
209 inst->vdec.filp = ctx->dev->filp;
210 inst->vdec.ctx = ctx;
211 inst->ctx = ctx;
212
213 vdec_parser_parms(inst);
214
215 /* set play mode.*/
216 if (ctx->is_drm_mode)
217 inst->vdec.port.flag |= PORT_FLAG_DRM;
218
219 /* to eable hevc hw.*/
220 inst->vdec.port.type = PORT_TYPE_HEVC;
221
222 /* init vfm */
223 inst->vfm.ctx = ctx;
224 inst->vfm.ada_ctx = &inst->vdec;
225 vcodec_vfm_init(&inst->vfm);
226
227 ret = video_decoder_init(&inst->vdec);
228 if (ret) {
229 aml_vcodec_err(inst, "vdec_hevc init err=%d", ret);
230 goto error_free_inst;
231 }
232
233 /* probe info from the stream */
234 inst->vsi = kzalloc(sizeof(struct vdec_hevc_vsi), GFP_KERNEL);
235 if (!inst->vsi) {
236 ret = -ENOMEM;
237 goto error_free_inst;
238 }
239
240 /* alloc the header buffer to be used cache sps or spp etc.*/
241 inst->vsi->header_buf = kzalloc(HEADER_BUFFER_SIZE, GFP_KERNEL);
242 if (!inst->vsi) {
243 ret = -ENOMEM;
244 goto error_free_vsi;
245 }
246
247 init_completion(&inst->comp);
248
249 aml_vcodec_debug(inst, "hevc Instance >> %p", inst);
250
251 ctx->ada_ctx = &inst->vdec;
252 *h_vdec = (unsigned long)inst;
253
254 //dump_init();
255
256 return 0;
257
258error_free_vsi:
259 kfree(inst->vsi);
260error_free_inst:
261 kfree(inst);
262 *h_vdec = 0;
263
264 return ret;
265}
266
267
268static int refer_buffer_num(struct h265_SPS_t *sps)
269{
270 int used_buf_num = 0;
271 int sps_pic_buf_diff = 0;
272
273 if ((!sps->temporal_layer[0].num_reorder_pics) &&
274 (sps->temporal_layer[0].max_dec_pic_buffering)) {
275 /* the range of sps_num_reorder_pics_0 is in
276 [0, sps_max_dec_pic_buffering_minus1_0] */
277 used_buf_num = sps->temporal_layer[0].max_dec_pic_buffering;
278 } else
279 used_buf_num = sps->temporal_layer[0].num_reorder_pics;
280
281 sps_pic_buf_diff = sps->temporal_layer[0].max_dec_pic_buffering -
282 sps->temporal_layer[0].num_reorder_pics + 1;
283
284 if (sps_pic_buf_diff >= 4)
285 used_buf_num += 1;
286
287 /*need one more for multi instance, as
288 apply_ref_pic_set() has no chanch to run to
289 to clear referenced flag in some case */
290 used_buf_num++;
291
292 /* for eos add more buffer to flush.*/
293 used_buf_num++;
294
295 return used_buf_num;
296}
297
298static int vdec_get_dw_mode(struct vdec_hevc_inst *inst, int dw_mode)
299{
300 u32 valid_dw_mode = inst->parms.double_write_mode;
301 int w = inst->parms.buffer_width;
302 int h = inst->parms.buffer_height;
303 u32 dw = 0x1; /*1:1*/
304
305 switch (valid_dw_mode) {
306 case 0x100:
307 if (w > 1920 && h > 1088)
308 dw = 0x4; /*1:2*/
309 break;
310 case 0x200:
311 if (w > 1920 && h > 1088)
312 dw = 0x2; /*1:4*/
313 break;
314 case 0x300:
315 if (w > 1280 && h > 720)
316 dw = 0x4; /*1:2*/
317 break;
318 default:
319 dw = valid_dw_mode;
320 break;
321 }
322
323 return dw;
324}
325
326static int vdec_pic_scale(struct vdec_hevc_inst *inst, int length, int dw_mode)
327{
328 int ret = 64;
329
330 switch (vdec_get_dw_mode(inst, dw_mode)) {
331 case 0x0: /* only afbc, output afbc */
332 ret = 64;
333 break;
334 case 0x1: /* afbc and (w x h), output YUV420 */
335 ret = length;
336 break;
337 case 0x2: /* afbc and (w/4 x h/4), output YUV420 */
338 case 0x3: /* afbc and (w/4 x h/4), output afbc and YUV420 */
339 ret = length >> 2;
340 break;
341 case 0x4: /* afbc and (w/2 x h/2), output YUV420 */
342 ret = length >> 1;
343 break;
344 case 0x10: /* (w x h), output YUV420-8bit)*/
345 default:
346 ret = length;
347 break;
348 }
349
350 return ret;
351}
352
353static void fill_vdec_params(struct vdec_hevc_inst *inst, struct h265_SPS_t *sps)
354{
355 struct vdec_pic_info *pic = &inst->vsi->pic;
356 struct vdec_hevc_dec_info *dec = &inst->vsi->dec;
357 struct v4l2_rect *rect = &inst->vsi->crop;
358 int dw = inst->parms.double_write_mode;
359 int margin = inst->parms.buffer_margin;
360
361 /* fill visible area size that be used for EGL. */
362 pic->visible_width = sps->width - (sps->output_window.left_offset +
363 sps->output_window.right_offset);
364 pic->visible_height = sps->height - (sps->output_window.top_offset +
365 sps->output_window.bottom_offset);
366 pic->visible_width = vdec_pic_scale(inst, pic->visible_width, dw);
367 pic->visible_height = vdec_pic_scale(inst, pic->visible_height, dw);
368
369 /* calc visible ares. */
370 rect->left = 0;
371 rect->top = 0;
372 rect->width = pic->visible_width;
373 rect->height = pic->visible_height;
374
375 /* config canvas size that be used for decoder. */
376 pic->coded_width = vdec_pic_scale(inst, ALIGN(sps->width, 32), dw);
377 pic->coded_height = vdec_pic_scale(inst, ALIGN(sps->height, 32), dw);
378
379 pic->y_len_sz = pic->coded_width * pic->coded_height;
380 pic->c_len_sz = pic->y_len_sz >> 1;
381
382 /* calc DPB size */
383 dec->dpb_sz = refer_buffer_num(sps) + margin;
384
385 inst->parms.dec_parms_status |=
386 V4L2_CONFIG_PARM_DECODE_PICINFO;
387
388 pr_info("[%d] The stream infos, dw: %d, coded:(%d x %d), visible:(%d x %d), DPB: %d, margin: %d\n",
389 inst->ctx->id, inst->parms.double_write_mode,
390 pic->coded_width, pic->coded_height,
391 pic->visible_width, pic->visible_height,
392 dec->dpb_sz - margin, margin);
393}
394
395static int stream_parse_by_ucode(struct vdec_hevc_inst *inst, u8 *buf, u32 size)
396{
397 int ret = 0;
398 struct aml_vdec_adapt *vdec = &inst->vdec;
399
400 ret = vdec_vframe_write(vdec, buf, size, 0);
401 if (ret < 0) {
402 pr_err("write frame data failed. err: %d\n", ret);
403 return ret;
404 }
405
406 /* wait ucode parse ending. */
407 wait_for_completion_timeout(&inst->comp,
408 msecs_to_jiffies(1000));
409
410 return inst->vsi->dec.dpb_sz ? 0 : -1;
411}
412
413static int stream_parse(struct vdec_hevc_inst *inst, u8 *buf, u32 size)
414{
415 int ret = 0;
416 struct h265_param_sets *ps = NULL;
417
418 ps = kzalloc(sizeof(struct h265_param_sets), GFP_KERNEL);
419 if (ps == NULL)
420 return -ENOMEM;
421
422 ret = h265_decode_extradata_ps(buf, size, ps);
423 if (ret) {
424 pr_err("parse extra data failed. err: %d\n", ret);
425 goto out;
426 }
427
428 if (ps->sps_parsed)
429 fill_vdec_params(inst, &ps->sps);
430
431 ret = ps->sps_parsed ? 0 : -1;
432out:
433 kfree(ps);
434
435 return ret;
436}
437
438static int vdec_hevc_probe(unsigned long h_vdec,
439 struct aml_vcodec_mem *bs, void *out)
440{
441 struct vdec_hevc_inst *inst =
442 (struct vdec_hevc_inst *)h_vdec;
443 struct stream_info *st;
444 u8 *buf = (u8 *)bs->vaddr;
445 u32 size = bs->size;
446 int ret = 0;
447
448 st = (struct stream_info *)buf;
449 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
450 return 0;
451
452 if (st->magic == NORe || st->magic == NORn)
453 ret = stream_parse(inst, st->data, st->length);
454 else {
455 if (inst->ctx->param_sets_from_ucode)
456 ret = stream_parse_by_ucode(inst, buf, size);
457 else
458 ret = stream_parse(inst, buf, size);
459 }
460
461 inst->vsi->cur_pic = inst->vsi->pic;
462
463 return ret;
464}
465
466static void vdec_hevc_deinit(unsigned long h_vdec)
467{
468 ulong flags;
469 struct vdec_hevc_inst *inst = (struct vdec_hevc_inst *)h_vdec;
470 struct aml_vcodec_ctx *ctx = inst->ctx;
471
472 aml_vcodec_debug_enter(inst);
473
474 video_decoder_release(&inst->vdec);
475
476 vcodec_vfm_release(&inst->vfm);
477
478 //dump_deinit();
479
480 spin_lock_irqsave(&ctx->slock, flags);
481 if (inst->vsi && inst->vsi->header_buf)
482 kfree(inst->vsi->header_buf);
483
484 if (inst->vsi)
485 kfree(inst->vsi);
486
487 kfree(inst);
488
489 ctx->drv_handle = 0;
490 spin_unlock_irqrestore(&ctx->slock, flags);
491}
492
493static int vdec_hevc_get_fb(struct vdec_hevc_inst *inst, struct vdec_v4l2_buffer **out)
494{
495 return get_fb_from_queue(inst->ctx, out);
496}
497
498static void vdec_hevc_get_vf(struct vdec_hevc_inst *inst, struct vdec_v4l2_buffer **out)
499{
500 struct vframe_s *vf = NULL;
501 struct vdec_v4l2_buffer *fb = NULL;
502
503 vf = peek_video_frame(&inst->vfm);
504 if (!vf) {
505 aml_vcodec_debug(inst, "there is no vframe.");
506 *out = NULL;
507 return;
508 }
509
510 vf = get_video_frame(&inst->vfm);
511 if (!vf) {
512 aml_vcodec_debug(inst, "the vframe is avalid.");
513 *out = NULL;
514 return;
515 }
516
517 atomic_set(&vf->use_cnt, 1);
518
519 fb = (struct vdec_v4l2_buffer *)vf->v4l_mem_handle;
520 fb->vf_handle = (unsigned long)vf;
521 fb->status = FB_ST_DISPLAY;
522
523 *out = fb;
524
525 //pr_info("%s, %d\n", __func__, fb->base_y.bytes_used);
526 //dump_write(fb->base_y.vaddr, fb->base_y.bytes_used);
527 //dump_write(fb->base_c.vaddr, fb->base_c.bytes_used);
528
529 /* convert yuv format. */
530 //swap_uv(fb->base_c.vaddr, fb->base_c.size);
531}
532
533static int vdec_write_nalu(struct vdec_hevc_inst *inst,
534 u8 *buf, u32 size, u64 ts)
535{
536 int ret = 0;
537 struct aml_vdec_adapt *vdec = &inst->vdec;
538
539 ret = vdec_vframe_write(vdec, buf, size, ts);
540
541 return ret;
542}
543
544static bool monitor_res_change(struct vdec_hevc_inst *inst, u8 *buf, u32 size)
545{
546 int ret = 0, i = 0, j = 0;
547 u8 *p = buf;
548 int len = size;
549 u32 type;
550
551 for (i = 4; i < size; i++) {
552 j = find_start_code(p, len);
553 if (j > 0) {
554 len = size - (p - buf);
555 type = HEVC_NAL_TYPE(p[j]);
556 if (type != HEVC_NAL_AUD &&
557 (type > HEVC_NAL_PPS || type < HEVC_NAL_VPS))
558 break;
559
560 if (type == HEVC_NAL_SPS) {
561 ret = stream_parse(inst, p, len);
562 if (!ret && (inst->vsi->cur_pic.coded_width !=
563 inst->vsi->pic.coded_width ||
564 inst->vsi->cur_pic.coded_height !=
565 inst->vsi->pic.coded_height)) {
566 inst->vsi->cur_pic = inst->vsi->pic;
567 return true;
568 }
569 }
570 p += j;
571 }
572 p++;
573 }
574
575 return false;
576}
577
578static int vdec_hevc_decode(unsigned long h_vdec, struct aml_vcodec_mem *bs,
579 u64 timestamp, bool *res_chg)
580{
581 struct vdec_hevc_inst *inst = (struct vdec_hevc_inst *)h_vdec;
582 struct aml_vdec_adapt *vdec = &inst->vdec;
583 struct stream_info *st;
584 u8 *buf;
585 u32 size;
586 int ret = -1;
587
588 /* bs NULL means flush decoder */
589 if (bs == NULL)
590 return -1;
591
592 buf = (u8 *)bs->vaddr;
593 size = bs->size;
594 st = (struct stream_info *)buf;
595
596 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
597 ret = vdec_vbuf_write(vdec, st->m.buf, sizeof(st->m.drm));
598 else if (st->magic == NORe)
599 ret = vdec_vbuf_write(vdec, st->data, st->length);
600 else if (st->magic == NORn)
601 ret = vdec_write_nalu(inst, st->data, st->length, timestamp);
602 else if (inst->ctx->is_stream_mode)
603 ret = vdec_vbuf_write(vdec, buf, size);
604 else {
605 /*checked whether the resolution changes.*/
606 if ((*res_chg = monitor_res_change(inst, buf, size)))
607 return 0;
608
609 ret = vdec_write_nalu(inst, buf, size, timestamp);
610 }
611
612 return ret;
613}
614
615 static void get_param_config_info(struct vdec_hevc_inst *inst,
616 struct aml_dec_params *parms)
617 {
618 *parms = inst->parms;
619
620 aml_vcodec_debug(inst, "parms status: %u", parms->dec_parms_status);
621 }
622
623static int vdec_hevc_get_param(unsigned long h_vdec,
624 enum vdec_get_param_type type, void *out)
625{
626 int ret = 0;
627 struct vdec_hevc_inst *inst = (struct vdec_hevc_inst *)h_vdec;
628
629 if (!inst) {
630 pr_err("the hevc inst of dec is invalid.\n");
631 return -1;
632 }
633
634 switch (type) {
635 case GET_PARAM_DISP_FRAME_BUFFER:
636 vdec_hevc_get_vf(inst, out);
637 break;
638
639 case GET_PARAM_FREE_FRAME_BUFFER:
640 ret = vdec_hevc_get_fb(inst, out);
641 break;
642
643 case GET_PARAM_PIC_INFO:
644 get_pic_info(inst, out);
645 break;
646
647 case GET_PARAM_DPB_SIZE:
648 get_dpb_size(inst, out);
649 break;
650
651 case GET_PARAM_CROP_INFO:
652 get_crop_info(inst, out);
653 break;
654
655 case GET_PARAM_CONFIG_INFO:
656 get_param_config_info(inst, out);
657 break;
658 default:
659 aml_vcodec_err(inst, "invalid get parameter type=%d", type);
660 ret = -EINVAL;
661 }
662
663 return ret;
664}
665
666static void set_param_write_sync(struct vdec_hevc_inst *inst)
667{
668 complete(&inst->comp);
669}
670
671static void set_param_pic_info(struct vdec_hevc_inst *inst,
672 struct aml_vdec_pic_infos *info)
673{
674 struct vdec_pic_info *pic = &inst->vsi->pic;
675 struct vdec_hevc_dec_info *dec = &inst->vsi->dec;
676 struct v4l2_rect *rect = &inst->vsi->crop;
677
678 /* fill visible area size that be used for EGL. */
679 pic->visible_width = info->visible_width;
680 pic->visible_height = info->visible_height;
681
682 /* calc visible ares. */
683 rect->left = 0;
684 rect->top = 0;
685 rect->width = pic->visible_width;
686 rect->height = pic->visible_height;
687
688 /* config canvas size that be used for decoder. */
689 pic->coded_width = ALIGN(info->coded_width, 64);
690 pic->coded_height = ALIGN(info->coded_height, 64);
691 pic->y_len_sz = pic->coded_width * pic->coded_height;
692 pic->c_len_sz = pic->y_len_sz >> 1;
693
694 dec->dpb_sz = info->dpb_size;
695
696 inst->parms.dec_parms_status |=
697 V4L2_CONFIG_PARM_DECODE_PICINFO;
698
699 /*wake up*/
700 complete(&inst->comp);
701
702 pr_info("Parse from ucode, crop(%d x %d), coded(%d x %d) dpb: %d\n",
703 pic->visible_width, pic->visible_height,
704 pic->coded_width, pic->coded_height,
705 dec->dpb_sz);
706}
707
708static void set_param_hdr_info(struct vdec_hevc_inst *inst,
709 struct aml_vdec_hdr_infos *hdr)
710{
711 inst->parms.hdr = *hdr;
712 inst->parms.dec_parms_status |=
713 V4L2_CONFIG_PARM_DECODE_HDRINFO;
714
715 //pr_info("H265 set HDR infos\n");
716}
717
718static int vdec_hevc_set_param(unsigned long h_vdec,
719 enum vdec_set_param_type type, void *in)
720{
721 int ret = 0;
722 struct vdec_hevc_inst *inst = (struct vdec_hevc_inst *)h_vdec;
723
724 if (!inst) {
725 pr_err("the hevc inst of dec is invalid.\n");
726 return -1;
727 }
728
729 switch (type) {
730 case SET_PARAM_WRITE_FRAME_SYNC:
731 set_param_write_sync(inst);
732 break;
733
734 case SET_PARAM_PIC_INFO:
735 set_param_pic_info(inst, in);
736 break;
737
738 case SET_PARAM_HDR_INFO:
739 set_param_hdr_info(inst, in);
740 break;
741 default:
742 aml_vcodec_err(inst, "invalid set parameter type=%d", type);
743 ret = -EINVAL;
744 }
745
746 return ret;
747}
748
749static struct vdec_common_if vdec_hevc_if = {
750 .init = vdec_hevc_init,
751 .probe = vdec_hevc_probe,
752 .decode = vdec_hevc_decode,
753 .get_param = vdec_hevc_get_param,
754 .set_param = vdec_hevc_set_param,
755 .deinit = vdec_hevc_deinit,
756};
757
758struct vdec_common_if *get_hevc_dec_comm_if(void);
759
760struct vdec_common_if *get_hevc_dec_comm_if(void)
761{
762 return &vdec_hevc_if;
763}
764
generated by cgit at 2024-05-17 10:21:31 (GMT)