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path: root/drivers/amvdec_ports/decoder/vdec_vp9_if.c (plain)
blob: 54a6e1726ac4c9d5b8471c883bb9948365ea37bd
1/*
2* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
3*
4* This program is free software; you can redistribute it and/or modify
5* it under the terms of the GNU General Public License as published by
6* the Free Software Foundation; either version 2 of the License, or
7* (at your option) any later version.
8*
9* This program is distributed in the hope that it will be useful, but WITHOUT
10* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12* more details.
13*
14* You should have received a copy of the GNU General Public License along
15* with this program; if not, write to the Free Software Foundation, Inc.,
16* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17*
18* Description:
19*/
20#include <linux/module.h>
21#include <linux/slab.h>
22#include <linux/timer.h>
23#include <linux/delay.h>
24#include <linux/kernel.h>
25#include <uapi/linux/swab.h>
26#include "../vdec_drv_if.h"
27#include "../aml_vcodec_util.h"
28#include "../aml_vcodec_dec.h"
29#include "../aml_vcodec_drv.h"
30#include "../aml_vcodec_adapt.h"
31#include "../vdec_drv_base.h"
32#include "../aml_vcodec_vfm.h"
33#include "aml_vp9_parser.h"
34#include "vdec_vp9_trigger.h"
35
36#define PREFIX_SIZE (16)
37
38#define NAL_TYPE(value) ((value) & 0x1F)
39#define HEADER_BUFFER_SIZE (32 * 1024)
40#define SYNC_CODE (0x498342)
41
42extern int vp9_need_prefix;
43bool need_trigger;
44int dump_cnt = 0;
45
46/**
47 * struct vp9_fb - vp9 decode frame buffer information
48 * @vdec_fb_va : virtual address of struct vdec_fb
49 * @y_fb_dma : dma address of Y frame buffer (luma)
50 * @c_fb_dma : dma address of C frame buffer (chroma)
51 * @poc : picture order count of frame buffer
52 * @reserved : for 8 bytes alignment
53 */
54struct vp9_fb {
55 uint64_t vdec_fb_va;
56 uint64_t y_fb_dma;
57 uint64_t c_fb_dma;
58 int32_t poc;
59 uint32_t reserved;
60};
61
62/**
63 * struct vdec_vp9_dec_info - decode information
64 * @dpb_sz : decoding picture buffer size
65 * @resolution_changed : resoltion change happen
66 * @reserved : for 8 bytes alignment
67 * @bs_dma : Input bit-stream buffer dma address
68 * @y_fb_dma : Y frame buffer dma address
69 * @c_fb_dma : C frame buffer dma address
70 * @vdec_fb_va : VDEC frame buffer struct virtual address
71 */
72struct vdec_vp9_dec_info {
73 uint32_t dpb_sz;
74 uint32_t resolution_changed;
75 uint32_t reserved;
76 uint64_t bs_dma;
77 uint64_t y_fb_dma;
78 uint64_t c_fb_dma;
79 uint64_t vdec_fb_va;
80};
81
82/**
83 * struct vdec_vp9_vsi - shared memory for decode information exchange
84 * between VPU and Host.
85 * The memory is allocated by VPU then mapping to Host
86 * in vpu_dec_init() and freed in vpu_dec_deinit()
87 * by VPU.
88 * AP-W/R : AP is writer/reader on this item
89 * VPU-W/R: VPU is write/reader on this item
90 * @hdr_buf : Header parsing buffer (AP-W, VPU-R)
91 * @list_free : free frame buffer ring list (AP-W/R, VPU-W)
92 * @list_disp : display frame buffer ring list (AP-R, VPU-W)
93 * @dec : decode information (AP-R, VPU-W)
94 * @pic : picture information (AP-R, VPU-W)
95 * @crop : crop information (AP-R, VPU-W)
96 */
97struct vdec_vp9_vsi {
98 char *header_buf;
99 int sps_size;
100 int pps_size;
101 int sei_size;
102 int head_offset;
103 struct vdec_vp9_dec_info dec;
104 struct vdec_pic_info pic;
105 struct vdec_pic_info cur_pic;
106 struct v4l2_rect crop;
107 bool is_combine;
108 int nalu_pos;
109 struct vp9_param_sets ps;
110};
111
112/**
113 * struct vdec_vp9_inst - vp9 decoder instance
114 * @num_nalu : how many nalus be decoded
115 * @ctx : point to aml_vcodec_ctx
116 * @vsi : VPU shared information
117 */
118struct vdec_vp9_inst {
119 unsigned int num_nalu;
120 struct aml_vcodec_ctx *ctx;
121 struct aml_vdec_adapt vdec;
122 struct vdec_vp9_vsi *vsi;
123 struct vcodec_vfm_s vfm;
124 struct aml_dec_params parms;
125 struct completion comp;
126};
127
128static int vdec_write_nalu(struct vdec_vp9_inst *inst,
129 u8 *buf, u32 size, u64 ts);
130
131static void get_pic_info(struct vdec_vp9_inst *inst,
132 struct vdec_pic_info *pic)
133{
134 *pic = inst->vsi->pic;
135
136 aml_vcodec_debug(inst, "pic(%d, %d), buf(%d, %d)",
137 pic->visible_width, pic->visible_height,
138 pic->coded_width, pic->coded_height);
139 aml_vcodec_debug(inst, "Y(%d, %d), C(%d, %d)", pic->y_bs_sz,
140 pic->y_len_sz, pic->c_bs_sz, pic->c_len_sz);
141}
142
143static void get_crop_info(struct vdec_vp9_inst *inst, struct v4l2_rect *cr)
144{
145 cr->left = inst->vsi->crop.left;
146 cr->top = inst->vsi->crop.top;
147 cr->width = inst->vsi->crop.width;
148 cr->height = inst->vsi->crop.height;
149
150 aml_vcodec_debug(inst, "l=%d, t=%d, w=%d, h=%d",
151 cr->left, cr->top, cr->width, cr->height);
152}
153
154static void get_dpb_size(struct vdec_vp9_inst *inst, unsigned int *dpb_sz)
155{
156 *dpb_sz = inst->vsi->dec.dpb_sz;
157 aml_vcodec_debug(inst, "sz=%d", *dpb_sz);
158}
159
160static u32 vdec_config_default_parms(u8 *parm)
161{
162 u8 *pbuf = parm;
163
164 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
165 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:7;");
166 pbuf += sprintf(pbuf, "vp9_double_write_mode:16;");
167 pbuf += sprintf(pbuf, "vp9_buf_width:1920;");
168 pbuf += sprintf(pbuf, "vp9_buf_height:1088;");
169 pbuf += sprintf(pbuf, "vp9_max_pic_w:4096;");
170 pbuf += sprintf(pbuf, "vp9_max_pic_h:2304;");
171 pbuf += sprintf(pbuf, "save_buffer_mode:0;");
172 pbuf += sprintf(pbuf, "no_head:0;");
173
174 return parm - pbuf;
175}
176
177static void vdec_parser_parms(struct vdec_vp9_inst *inst)
178{
179 struct aml_vcodec_ctx *ctx = inst->ctx;
180
181 if (ctx->config.parm.dec.parms_status &
182 V4L2_CONFIG_PARM_DECODE_CFGINFO) {
183 u8 *pbuf = ctx->config.buf;
184
185 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
186 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:%d;",
187 ctx->config.parm.dec.cfg.ref_buf_margin);
188 pbuf += sprintf(pbuf, "vp9_double_write_mode:%d;",
189 ctx->config.parm.dec.cfg.double_write_mode);
190 pbuf += sprintf(pbuf, "vp9_buf_width:%d;",
191 ctx->config.parm.dec.cfg.init_width);
192 pbuf += sprintf(pbuf, "vp9_buf_height:%d;",
193 ctx->config.parm.dec.cfg.init_height);
194 pbuf += sprintf(pbuf, "save_buffer_mode:0;");
195 pbuf += sprintf(pbuf, "no_head:0;");
196 ctx->config.length = pbuf - ctx->config.buf;
197 } else {
198 ctx->config.parm.dec.cfg.double_write_mode = 16;
199 ctx->config.length = vdec_config_default_parms(ctx->config.buf);
200 }
201
202 if ((ctx->config.parm.dec.parms_status &
203 V4L2_CONFIG_PARM_DECODE_HDRINFO) &&
204 inst->parms.hdr.color_parms.present_flag) {
205 u8 *pbuf = ctx->config.buf + ctx->config.length;
206
207 pbuf += sprintf(pbuf, "mG.x:%d;",
208 ctx->config.parm.dec.hdr.color_parms.primaries[0][0]);
209 pbuf += sprintf(pbuf, "mG.y:%d;",
210 ctx->config.parm.dec.hdr.color_parms.primaries[0][1]);
211 pbuf += sprintf(pbuf, "mB.x:%d;",
212 ctx->config.parm.dec.hdr.color_parms.primaries[1][0]);
213 pbuf += sprintf(pbuf, "mB.y:%d;",
214 ctx->config.parm.dec.hdr.color_parms.primaries[1][1]);
215 pbuf += sprintf(pbuf, "mR.x:%d;",
216 ctx->config.parm.dec.hdr.color_parms.primaries[2][0]);
217 pbuf += sprintf(pbuf, "mR.y:%d;",
218 ctx->config.parm.dec.hdr.color_parms.primaries[2][1]);
219 pbuf += sprintf(pbuf, "mW.x:%d;",
220 ctx->config.parm.dec.hdr.color_parms.white_point[0]);
221 pbuf += sprintf(pbuf, "mW.y:%d;",
222 ctx->config.parm.dec.hdr.color_parms.white_point[1]);
223 pbuf += sprintf(pbuf, "mMaxDL:%d;",
224 ctx->config.parm.dec.hdr.color_parms.luminance[0] / 1000);
225 pbuf += sprintf(pbuf, "mMinDL:%d;",
226 ctx->config.parm.dec.hdr.color_parms.luminance[1]);
227 pbuf += sprintf(pbuf, "mMaxCLL:%d;",
228 ctx->config.parm.dec.hdr.color_parms.content_light_level.max_content);
229 pbuf += sprintf(pbuf, "mMaxFALL:%d;",
230 ctx->config.parm.dec.hdr.color_parms.content_light_level.max_pic_average);
231 ctx->config.length = pbuf - ctx->config.buf;
232 inst->parms.hdr = ctx->config.parm.dec.hdr;
233 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_HDRINFO;
234 }
235
236 inst->vdec.config = ctx->config;
237 inst->parms.cfg = ctx->config.parm.dec.cfg;
238 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_CFGINFO;
239}
240
241static int vdec_vp9_init(struct aml_vcodec_ctx *ctx, unsigned long *h_vdec)
242{
243 struct vdec_vp9_inst *inst = NULL;
244 int ret = -1;
245
246 inst = kzalloc(sizeof(*inst), GFP_KERNEL);
247 if (!inst)
248 return -ENOMEM;
249
250 inst->vdec.video_type = VFORMAT_VP9;
251 inst->vdec.dev = ctx->dev->vpu_plat_dev;
252 inst->vdec.filp = ctx->dev->filp;
253 inst->vdec.ctx = ctx;
254 inst->ctx = ctx;
255
256 vdec_parser_parms(inst);
257
258 /* set play mode.*/
259 if (ctx->is_drm_mode)
260 inst->vdec.port.flag |= PORT_FLAG_DRM;
261
262 /* to eable vp9 hw.*/
263 inst->vdec.port.type = PORT_TYPE_HEVC;
264
265 /* init vfm */
266 inst->vfm.ctx = ctx;
267 inst->vfm.ada_ctx = &inst->vdec;
268 ret = vcodec_vfm_init(&inst->vfm);
269 if (ret) {
270 pr_err("%s, init vfm failed.\n", __func__);
271 goto err;
272 }
273
274 /* probe info from the stream */
275 inst->vsi = kzalloc(sizeof(struct vdec_vp9_vsi), GFP_KERNEL);
276 if (!inst->vsi) {
277 ret = -ENOMEM;
278 goto err;
279 }
280
281 /* alloc the header buffer to be used cache sps or spp etc.*/
282 inst->vsi->header_buf = kzalloc(HEADER_BUFFER_SIZE, GFP_KERNEL);
283 if (!inst->vsi) {
284 ret = -ENOMEM;
285 goto err;
286 }
287
288 init_completion(&inst->comp);
289
290 aml_vcodec_debug(inst, "vp9 Instance >> %p", inst);
291
292 ctx->ada_ctx = &inst->vdec;
293 *h_vdec = (unsigned long)inst;
294
295 /* init decoder. */
296 ret = video_decoder_init(&inst->vdec);
297 if (ret) {
298 aml_vcodec_err(inst, "vdec_vp9 init err=%d", ret);
299 goto err;
300 }
301
302 //dump_init();
303
304 return 0;
305err:
306 if (inst)
307 vcodec_vfm_release(&inst->vfm);
308 if (inst && inst->vsi && inst->vsi->header_buf)
309 kfree(inst->vsi->header_buf);
310 if (inst && inst->vsi)
311 kfree(inst->vsi);
312 if (inst)
313 kfree(inst);
314 *h_vdec = 0;
315
316 return ret;
317}
318
319#if 0
320static int refer_buffer_num(int level_idc, int poc_cnt,
321 int mb_width, int mb_height)
322{
323 return 20;
324}
325#endif
326
327static int vdec_get_dw_mode(struct vdec_vp9_inst *inst, int dw_mode)
328{
329 u32 valid_dw_mode = inst->parms.cfg.double_write_mode;
330 int w = inst->parms.cfg.init_width;
331 int h = inst->parms.cfg.init_height;
332 u32 dw = 0x1; /*1:1*/
333
334 switch (valid_dw_mode) {
335 case 0x100:
336 if (w > 1920 && h > 1088)
337 dw = 0x4; /*1:2*/
338 break;
339 case 0x200:
340 if (w > 1920 && h > 1088)
341 dw = 0x2; /*1:4*/
342 break;
343 case 0x300:
344 if (w > 1280 && h > 720)
345 dw = 0x4; /*1:2*/
346 break;
347 default:
348 dw = valid_dw_mode;
349 break;
350 }
351
352 return dw;
353}
354
355static int vdec_pic_scale(struct vdec_vp9_inst *inst, int length, int dw_mode)
356{
357 int ret = 64;
358
359 switch (vdec_get_dw_mode(inst, dw_mode)) {
360 case 0x0: /* only afbc, output afbc */
361 ret = 64;
362 break;
363 case 0x1: /* afbc and (w x h), output YUV420 */
364 ret = length;
365 break;
366 case 0x2: /* afbc and (w/4 x h/4), output YUV420 */
367 case 0x3: /* afbc and (w/4 x h/4), output afbc and YUV420 */
368 ret = length >> 2;
369 break;
370 case 0x4: /* afbc and (w/2 x h/2), output YUV420 */
371 ret = length >> 1;
372 break;
373 case 0x10: /* (w x h), output YUV420-8bit) */
374 default:
375 ret = length;
376 break;
377 }
378
379 return ret;
380}
381
382static void fill_vdec_params(struct vdec_vp9_inst *inst,
383 struct VP9Context *vp9_ctx)
384{
385 struct vdec_pic_info *pic = &inst->vsi->pic;
386 struct vdec_vp9_dec_info *dec = &inst->vsi->dec;
387 struct v4l2_rect *rect = &inst->vsi->crop;
388 int dw = inst->parms.cfg.double_write_mode;
389 int margin = inst->parms.cfg.ref_buf_margin;
390
391 /* fill visible area size that be used for EGL. */
392 pic->visible_width = vdec_pic_scale(inst, vp9_ctx->render_width, dw);
393 pic->visible_height = vdec_pic_scale(inst, vp9_ctx->render_height, dw);
394
395 /* calc visible ares. */
396 rect->left = 0;
397 rect->top = 0;
398 rect->width = pic->visible_width;
399 rect->height = pic->visible_height;
400
401 /* config canvas size that be used for decoder. */
402 pic->coded_width = vdec_pic_scale(inst, ALIGN(vp9_ctx->width, 32), dw);
403 pic->coded_height = vdec_pic_scale(inst, ALIGN(vp9_ctx->height, 32), dw);
404
405 pic->y_len_sz = pic->coded_width * pic->coded_height;
406 pic->c_len_sz = pic->y_len_sz >> 1;
407
408 /* calc DPB size */
409 dec->dpb_sz = 5 + margin;//refer_buffer_num(sps->level_idc, poc_cnt, mb_w, mb_h);
410
411 inst->parms.ps.visible_width = pic->visible_width;
412 inst->parms.ps.visible_height = pic->visible_height;
413 inst->parms.ps.coded_width = pic->coded_width;
414 inst->parms.ps.coded_height = pic->coded_height;
415 inst->parms.ps.dpb_size = dec->dpb_sz;
416 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_PSINFO;
417
418 aml_vcodec_debug(inst, "[%d] The stream infos, dw: %d, coded:(%d x %d), visible:(%d x %d), DPB: %d, margin: %d\n",
419 inst->ctx->id, dw, pic->coded_width, pic->coded_height,
420 pic->visible_width, pic->visible_height,
421 dec->dpb_sz - margin, margin);
422}
423
424static int stream_parse_by_ucode(struct vdec_vp9_inst *inst, u8 *buf, u32 size)
425{
426 int ret = 0;
427
428 ret = vdec_write_nalu(inst, buf, size, 0);
429 if (ret < 0) {
430 pr_err("write frame data failed. err: %d\n", ret);
431 return ret;
432 }
433
434 /* wait ucode parse ending. */
435 wait_for_completion_timeout(&inst->comp,
436 msecs_to_jiffies(1000));
437
438 return inst->vsi->dec.dpb_sz ? 0 : -1;
439}
440
441static int stream_parse(struct vdec_vp9_inst *inst, u8 *buf, u32 size)
442{
443 int ret = 0;
444 struct vp9_param_sets *ps = NULL;
445
446 ps = kzalloc(sizeof(struct vp9_param_sets), GFP_KERNEL);
447 if (ps == NULL)
448 return -ENOMEM;
449
450 ret = vp9_decode_extradata_ps(buf, size, ps);
451 if (ret) {
452 pr_err("parse extra data failed. err: %d\n", ret);
453 goto out;
454 }
455
456 if (ps->head_parsed)
457 fill_vdec_params(inst, &ps->ctx);
458
459 ret = ps->head_parsed ? 0 : -1;
460out:
461 kfree(ps);
462
463 return ret;
464}
465
466static int vdec_vp9_probe(unsigned long h_vdec,
467 struct aml_vcodec_mem *bs, void *out)
468{
469 struct vdec_vp9_inst *inst =
470 (struct vdec_vp9_inst *)h_vdec;
471 struct stream_info *st;
472 u8 *buf = (u8 *)bs->vaddr;
473 u32 size = bs->size;
474 int ret = 0;
475
476 st = (struct stream_info *)buf;
477 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
478 return 0;
479
480 if (st->magic == NORe || st->magic == NORn)
481 ret = stream_parse(inst, st->data, st->length);
482 else {
483 if (inst->ctx->param_sets_from_ucode)
484 ret = stream_parse_by_ucode(inst, buf, size);
485 else
486 ret = stream_parse(inst, buf, size);
487 }
488
489 inst->vsi->cur_pic = inst->vsi->pic;
490
491 return ret;
492}
493
494static void vdec_vp9_deinit(unsigned long h_vdec)
495{
496 ulong flags;
497 struct vdec_vp9_inst *inst = (struct vdec_vp9_inst *)h_vdec;
498 struct aml_vcodec_ctx *ctx = inst->ctx;
499
500 aml_vcodec_debug_enter(inst);
501
502 video_decoder_release(&inst->vdec);
503
504 vcodec_vfm_release(&inst->vfm);
505
506 //dump_deinit();
507
508 spin_lock_irqsave(&ctx->slock, flags);
509 if (inst->vsi && inst->vsi->header_buf)
510 kfree(inst->vsi->header_buf);
511
512 if (inst->vsi)
513 kfree(inst->vsi);
514
515 kfree(inst);
516
517 ctx->drv_handle = 0;
518 spin_unlock_irqrestore(&ctx->slock, flags);
519
520 need_trigger = false;
521 dump_cnt = 0;
522}
523
524static int vdec_vp9_get_fb(struct vdec_vp9_inst *inst, struct vdec_v4l2_buffer **out)
525{
526 return get_fb_from_queue(inst->ctx, out);
527}
528
529static void vdec_vp9_get_vf(struct vdec_vp9_inst *inst, struct vdec_v4l2_buffer **out)
530{
531 struct vframe_s *vf = NULL;
532 struct vdec_v4l2_buffer *fb = NULL;
533
534 vf = peek_video_frame(&inst->vfm);
535 if (!vf) {
536 aml_vcodec_debug(inst, "there is no vframe.");
537 *out = NULL;
538 return;
539 }
540
541 vf = get_video_frame(&inst->vfm);
542 if (!vf) {
543 aml_vcodec_debug(inst, "the vframe is avalid.");
544 *out = NULL;
545 return;
546 }
547
548 atomic_set(&vf->use_cnt, 1);
549
550 fb = (struct vdec_v4l2_buffer *)vf->v4l_mem_handle;
551 fb->vf_handle = (unsigned long)vf;
552 fb->status = FB_ST_DISPLAY;
553
554 *out = fb;
555
556 //pr_info("%s, %d\n", __func__, fb->base_y.bytes_used);
557 //dump_write(fb->base_y.vaddr, fb->base_y.bytes_used);
558 //dump_write(fb->base_c.vaddr, fb->base_c.bytes_used);
559
560 /* convert yuv format. */
561 //swap_uv(fb->base_c.vaddr, fb->base_c.size);
562}
563
564static void add_prefix_data(struct vp9_superframe_split *s,
565 u8 **out, u32 *out_size)
566{
567 int i;
568 u8 *p = NULL;
569 u32 length;
570
571 length = s->size + s->nb_frames * PREFIX_SIZE;
572 p = vzalloc(length);
573 if (!p) {
574 pr_err("alloc size %d failed.\n" ,length);
575 return;
576 }
577
578 memcpy(p, s->data, s->size);
579 p += s->size;
580
581 for (i = s->nb_frames; i > 0; i--) {
582 u32 frame_size = s->sizes[i - 1];
583 u8 *prefix = NULL;
584
585 p -= frame_size;
586 memmove(p + PREFIX_SIZE * i, p, frame_size);
587 prefix = p + PREFIX_SIZE * (i - 1);
588
589 /*add amlogic frame headers.*/
590 frame_size += 16;
591 prefix[0] = (frame_size >> 24) & 0xff;
592 prefix[1] = (frame_size >> 16) & 0xff;
593 prefix[2] = (frame_size >> 8 ) & 0xff;
594 prefix[3] = (frame_size >> 0 ) & 0xff;
595 prefix[4] = ((frame_size >> 24) & 0xff) ^ 0xff;
596 prefix[5] = ((frame_size >> 16) & 0xff) ^ 0xff;
597 prefix[6] = ((frame_size >> 8 ) & 0xff) ^ 0xff;
598 prefix[7] = ((frame_size >> 0 ) & 0xff) ^ 0xff;
599 prefix[8] = 0;
600 prefix[9] = 0;
601 prefix[10] = 0;
602 prefix[11] = 1;
603 prefix[12] = 'A';
604 prefix[13] = 'M';
605 prefix[14] = 'L';
606 prefix[15] = 'V';
607 frame_size -= 16;
608 }
609
610 *out = p;
611 *out_size = length;
612}
613
614static void trigger_decoder(struct aml_vdec_adapt *vdec)
615{
616 int i, ret;
617 u32 frame_size = 0;
618 u8 *p = vp9_trigger_header;
619
620 for (i = 0; i < ARRAY_SIZE(vp9_trigger_framesize); i++) {
621 frame_size = vp9_trigger_framesize[i];
622 ret = vdec_vframe_write(vdec, p,
623 frame_size, 0);
624 pr_err("write trigger frame %d\n", ret);
625 p += frame_size;
626 }
627}
628
629static int vdec_write_nalu(struct vdec_vp9_inst *inst,
630 u8 *buf, u32 size, u64 ts)
631{
632 int ret = 0;
633 struct aml_vdec_adapt *vdec = &inst->vdec;
634 struct vp9_superframe_split s;
635 u8 *data = NULL;
636 u32 length = 0;
637 bool need_prefix = vp9_need_prefix;
638
639 memset(&s, 0, sizeof(s));
640
641 /*trigger.*/
642 if (0 && !need_trigger) {
643 trigger_decoder(vdec);
644 need_trigger = true;
645 }
646
647 if (need_prefix) {
648 /*parse superframe.*/
649 s.data = buf;
650 s.data_size = size;
651 ret = vp9_superframe_split_filter(&s);
652 if (ret) {
653 pr_err("parse frames failed.\n");
654 return ret;
655 }
656
657 /*add headers.*/
658 add_prefix_data(&s, &data, &length);
659 ret = vdec_vframe_write(vdec, data, length, ts);
660 vfree(data);
661 } else {
662 ret = vdec_vframe_write(vdec, buf, size, ts);
663 }
664
665 return ret;
666}
667
668static bool monitor_res_change(struct vdec_vp9_inst *inst, u8 *buf, u32 size)
669{
670 int ret = -1;
671 u8 *p = buf;
672 int len = size;
673 u32 synccode = vp9_need_prefix ?
674 ((p[1] << 16) | (p[2] << 8) | p[3]) :
675 ((p[17] << 16) | (p[18] << 8) | p[19]);
676
677 if (synccode == SYNC_CODE) {
678 ret = stream_parse(inst, p, len);
679 if (!ret && (inst->vsi->cur_pic.coded_width !=
680 inst->vsi->pic.coded_width ||
681 inst->vsi->cur_pic.coded_height !=
682 inst->vsi->pic.coded_height)) {
683 inst->vsi->cur_pic = inst->vsi->pic;
684 return true;
685 }
686 }
687
688 return false;
689}
690
691static int vdec_vp9_decode(unsigned long h_vdec, struct aml_vcodec_mem *bs,
692 u64 timestamp, bool *res_chg)
693{
694 struct vdec_vp9_inst *inst = (struct vdec_vp9_inst *)h_vdec;
695 struct aml_vdec_adapt *vdec = &inst->vdec;
696 struct stream_info *st;
697 u8 *buf;
698 u32 size;
699 int ret = -1;
700
701 /* bs NULL means flush decoder */
702 if (bs == NULL)
703 return -1;
704
705 buf = (u8 *)bs->vaddr;
706 size = bs->size;
707 st = (struct stream_info *)buf;
708
709 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
710 ret = vdec_vbuf_write(vdec, st->m.buf, sizeof(st->m.drm));
711 else if (st->magic == NORe)
712 ret = vdec_vbuf_write(vdec, st->data, st->length);
713 else if (st->magic == NORn)
714 ret = vdec_write_nalu(inst, st->data, st->length, timestamp);
715 else if (inst->ctx->is_stream_mode)
716 ret = vdec_vbuf_write(vdec, buf, size);
717 else {
718 /*checked whether the resolution changes.*/
719 if ((*res_chg = monitor_res_change(inst, buf, size)))
720 return 0;
721
722 ret = vdec_write_nalu(inst, buf, size, timestamp);
723 }
724
725 return ret;
726}
727
728 static void get_param_config_info(struct vdec_vp9_inst *inst,
729 struct aml_dec_params *parms)
730 {
731 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_CFGINFO)
732 parms->cfg = inst->parms.cfg;
733 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_PSINFO)
734 parms->ps = inst->parms.ps;
735 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_HDRINFO)
736 parms->hdr = inst->parms.hdr;
737 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_CNTINFO)
738 parms->cnt = inst->parms.cnt;
739
740 parms->parms_status |= inst->parms.parms_status;
741
742 aml_vcodec_debug(inst, "parms status: %u", parms->parms_status);
743 }
744
745static int vdec_vp9_get_param(unsigned long h_vdec,
746 enum vdec_get_param_type type, void *out)
747{
748 int ret = 0;
749 struct vdec_vp9_inst *inst = (struct vdec_vp9_inst *)h_vdec;
750
751 if (!inst) {
752 pr_err("the vp9 inst of dec is invalid.\n");
753 return -1;
754 }
755
756 switch (type) {
757 case GET_PARAM_DISP_FRAME_BUFFER:
758 vdec_vp9_get_vf(inst, out);
759 break;
760
761 case GET_PARAM_FREE_FRAME_BUFFER:
762 ret = vdec_vp9_get_fb(inst, out);
763 break;
764
765 case GET_PARAM_PIC_INFO:
766 get_pic_info(inst, out);
767 break;
768
769 case GET_PARAM_DPB_SIZE:
770 get_dpb_size(inst, out);
771 break;
772
773 case GET_PARAM_CROP_INFO:
774 get_crop_info(inst, out);
775 break;
776
777 case GET_PARAM_CONFIG_INFO:
778 get_param_config_info(inst, out);
779 break;
780 default:
781 aml_vcodec_err(inst, "invalid get parameter type=%d", type);
782 ret = -EINVAL;
783 }
784
785 return ret;
786}
787
788static void set_param_write_sync(struct vdec_vp9_inst *inst)
789{
790 complete(&inst->comp);
791}
792
793static void set_param_ps_info(struct vdec_vp9_inst *inst,
794 struct aml_vdec_ps_infos *ps)
795{
796 struct vdec_pic_info *pic = &inst->vsi->pic;
797 struct vdec_vp9_dec_info *dec = &inst->vsi->dec;
798 struct v4l2_rect *rect = &inst->vsi->crop;
799
800 /* fill visible area size that be used for EGL. */
801 pic->visible_width = ps->visible_width;
802 pic->visible_height = ps->visible_height;
803
804 /* calc visible ares. */
805 rect->left = 0;
806 rect->top = 0;
807 rect->width = pic->visible_width;
808 rect->height = pic->visible_height;
809
810 /* config canvas size that be used for decoder. */
811 pic->coded_width = ps->coded_width;
812 pic->coded_height = ps->coded_height;
813
814 pic->y_len_sz = pic->coded_width * pic->coded_height;
815 pic->c_len_sz = pic->y_len_sz >> 1;
816
817 /* calc DPB size */
818 dec->dpb_sz = 5;
819
820 inst->parms.ps = *ps;
821 inst->parms.parms_status |=
822 V4L2_CONFIG_PARM_DECODE_PSINFO;
823
824 /*wake up*/
825 complete(&inst->comp);
826
827 pr_info("Parse from ucode, crop(%d x %d), coded(%d x %d) dpb: %d\n",
828 ps->visible_width, ps->visible_height,
829 ps->coded_width, ps->coded_height,
830 ps->dpb_size);
831}
832
833static void set_param_hdr_info(struct vdec_vp9_inst *inst,
834 struct aml_vdec_hdr_infos *hdr)
835{
836 if ((inst->parms.parms_status &
837 V4L2_CONFIG_PARM_DECODE_HDRINFO)) {
838 inst->parms.hdr = *hdr;
839 inst->parms.parms_status |=
840 V4L2_CONFIG_PARM_DECODE_HDRINFO;
841 aml_vdec_dispatch_event(inst->ctx,
842 V4L2_EVENT_SRC_CH_HDRINFO);
843 pr_info("VP9 set HDR infos\n");
844 }
845}
846
847static void set_param_post_event(struct vdec_vp9_inst *inst, u32 *event)
848{
849 aml_vdec_dispatch_event(inst->ctx, *event);
850 pr_info("VP9 post event: %d\n", *event);
851}
852
853static int vdec_vp9_set_param(unsigned long h_vdec,
854 enum vdec_set_param_type type, void *in)
855{
856 int ret = 0;
857 struct vdec_vp9_inst *inst = (struct vdec_vp9_inst *)h_vdec;
858
859 if (!inst) {
860 pr_err("the vp9 inst of dec is invalid.\n");
861 return -1;
862 }
863
864 switch (type) {
865 case SET_PARAM_WRITE_FRAME_SYNC:
866 set_param_write_sync(inst);
867 break;
868
869 case SET_PARAM_PS_INFO:
870 set_param_ps_info(inst, in);
871 break;
872
873 case SET_PARAM_HDR_INFO:
874 set_param_hdr_info(inst, in);
875 break;
876
877 case SET_PARAM_POST_EVENT:
878 set_param_post_event(inst, in);
879 break;
880 default:
881 aml_vcodec_err(inst, "invalid set parameter type=%d", type);
882 ret = -EINVAL;
883 }
884
885 return ret;
886}
887
888static struct vdec_common_if vdec_vp9_if = {
889 .init = vdec_vp9_init,
890 .probe = vdec_vp9_probe,
891 .decode = vdec_vp9_decode,
892 .get_param = vdec_vp9_get_param,
893 .set_param = vdec_vp9_set_param,
894 .deinit = vdec_vp9_deinit,
895};
896
897struct vdec_common_if *get_vp9_dec_comm_if(void);
898
899struct vdec_common_if *get_vp9_dec_comm_if(void)
900{
901 return &vdec_vp9_if;
902}
903
904
generated by cgit at 2024-05-17 11:09:34 (GMT)