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path: root/drivers/amvdec_ports/decoder/vdec_vp9_if.c (plain)
blob: 950894f0a69acd2bfc39940aaca0cc2245848c20
1/*
2* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
3*
4* This program is free software; you can redistribute it and/or modify
5* it under the terms of the GNU General Public License as published by
6* the Free Software Foundation; either version 2 of the License, or
7* (at your option) any later version.
8*
9* This program is distributed in the hope that it will be useful, but WITHOUT
10* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12* more details.
13*
14* You should have received a copy of the GNU General Public License along
15* with this program; if not, write to the Free Software Foundation, Inc.,
16* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17*
18* Description:
19*/
20#include <linux/module.h>
21#include <linux/slab.h>
22#include <linux/timer.h>
23#include <linux/delay.h>
24#include <linux/kernel.h>
25#include <uapi/linux/swab.h>
26#include "../vdec_drv_if.h"
27#include "../aml_vcodec_util.h"
28#include "../aml_vcodec_dec.h"
29#include "../aml_vcodec_drv.h"
30#include "../aml_vcodec_adapt.h"
31#include "../vdec_drv_base.h"
32#include "../aml_vcodec_vfm.h"
33#include "aml_vp9_parser.h"
34#include "vdec_vp9_trigger.h"
35
36#define PREFIX_SIZE (16)
37
38#define NAL_TYPE(value) ((value) & 0x1F)
39#define HEADER_BUFFER_SIZE (32 * 1024)
40#define SYNC_CODE (0x498342)
41
42extern int vp9_need_prefix;
43bool need_trigger;
44int dump_cnt = 0;
45
46/**
47 * struct vp9_fb - vp9 decode frame buffer information
48 * @vdec_fb_va : virtual address of struct vdec_fb
49 * @y_fb_dma : dma address of Y frame buffer (luma)
50 * @c_fb_dma : dma address of C frame buffer (chroma)
51 * @poc : picture order count of frame buffer
52 * @reserved : for 8 bytes alignment
53 */
54struct vp9_fb {
55 uint64_t vdec_fb_va;
56 uint64_t y_fb_dma;
57 uint64_t c_fb_dma;
58 int32_t poc;
59 uint32_t reserved;
60};
61
62/**
63 * struct vdec_vp9_dec_info - decode information
64 * @dpb_sz : decoding picture buffer size
65 * @resolution_changed : resoltion change happen
66 * @reserved : for 8 bytes alignment
67 * @bs_dma : Input bit-stream buffer dma address
68 * @y_fb_dma : Y frame buffer dma address
69 * @c_fb_dma : C frame buffer dma address
70 * @vdec_fb_va : VDEC frame buffer struct virtual address
71 */
72struct vdec_vp9_dec_info {
73 uint32_t dpb_sz;
74 uint32_t resolution_changed;
75 uint32_t reserved;
76 uint64_t bs_dma;
77 uint64_t y_fb_dma;
78 uint64_t c_fb_dma;
79 uint64_t vdec_fb_va;
80};
81
82/**
83 * struct vdec_vp9_vsi - shared memory for decode information exchange
84 * between VPU and Host.
85 * The memory is allocated by VPU then mapping to Host
86 * in vpu_dec_init() and freed in vpu_dec_deinit()
87 * by VPU.
88 * AP-W/R : AP is writer/reader on this item
89 * VPU-W/R: VPU is write/reader on this item
90 * @hdr_buf : Header parsing buffer (AP-W, VPU-R)
91 * @list_free : free frame buffer ring list (AP-W/R, VPU-W)
92 * @list_disp : display frame buffer ring list (AP-R, VPU-W)
93 * @dec : decode information (AP-R, VPU-W)
94 * @pic : picture information (AP-R, VPU-W)
95 * @crop : crop information (AP-R, VPU-W)
96 */
97struct vdec_vp9_vsi {
98 char *header_buf;
99 int sps_size;
100 int pps_size;
101 int sei_size;
102 int head_offset;
103 struct vdec_vp9_dec_info dec;
104 struct vdec_pic_info pic;
105 struct vdec_pic_info cur_pic;
106 struct v4l2_rect crop;
107 bool is_combine;
108 int nalu_pos;
109 struct vp9_param_sets ps;
110};
111
112/**
113 * struct vdec_vp9_inst - vp9 decoder instance
114 * @num_nalu : how many nalus be decoded
115 * @ctx : point to aml_vcodec_ctx
116 * @vsi : VPU shared information
117 */
118struct vdec_vp9_inst {
119 unsigned int num_nalu;
120 struct aml_vcodec_ctx *ctx;
121 struct aml_vdec_adapt vdec;
122 struct vdec_vp9_vsi *vsi;
123 struct vcodec_vfm_s vfm;
124 struct aml_dec_params parms;
125 struct completion comp;
126};
127
128static int vdec_write_nalu(struct vdec_vp9_inst *inst,
129 u8 *buf, u32 size, u64 ts);
130
131static void get_pic_info(struct vdec_vp9_inst *inst,
132 struct vdec_pic_info *pic)
133{
134 *pic = inst->vsi->pic;
135
136 aml_vcodec_debug(inst, "pic(%d, %d), buf(%d, %d)",
137 pic->visible_width, pic->visible_height,
138 pic->coded_width, pic->coded_height);
139 aml_vcodec_debug(inst, "Y(%d, %d), C(%d, %d)", pic->y_bs_sz,
140 pic->y_len_sz, pic->c_bs_sz, pic->c_len_sz);
141}
142
143static void get_crop_info(struct vdec_vp9_inst *inst, struct v4l2_rect *cr)
144{
145 cr->left = inst->vsi->crop.left;
146 cr->top = inst->vsi->crop.top;
147 cr->width = inst->vsi->crop.width;
148 cr->height = inst->vsi->crop.height;
149
150 aml_vcodec_debug(inst, "l=%d, t=%d, w=%d, h=%d",
151 cr->left, cr->top, cr->width, cr->height);
152}
153
154static void get_dpb_size(struct vdec_vp9_inst *inst, unsigned int *dpb_sz)
155{
156 *dpb_sz = inst->vsi->dec.dpb_sz;
157 aml_vcodec_debug(inst, "sz=%d", *dpb_sz);
158}
159
160static u32 vdec_config_default_parms(u8 *parm)
161{
162 u8 *pbuf = parm;
163
164 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
165 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:7;");
166 pbuf += sprintf(pbuf, "vp9_double_write_mode:16;");
167 pbuf += sprintf(pbuf, "vp9_buf_width:1920;");
168 pbuf += sprintf(pbuf, "vp9_buf_height:1088;");
169 pbuf += sprintf(pbuf, "vp9_max_pic_w:4096;");
170 pbuf += sprintf(pbuf, "vp9_max_pic_h:2304;");
171 pbuf += sprintf(pbuf, "save_buffer_mode:0;");
172 pbuf += sprintf(pbuf, "no_head:0;");
173 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_mode:0;");
174 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_endian:0;");
175
176 return parm - pbuf;
177}
178
179static void vdec_parser_parms(struct vdec_vp9_inst *inst)
180{
181 struct aml_vcodec_ctx *ctx = inst->ctx;
182
183 if (ctx->config.parm.dec.parms_status &
184 V4L2_CONFIG_PARM_DECODE_CFGINFO) {
185 u8 *pbuf = ctx->config.buf;
186
187 pbuf += sprintf(pbuf, "parm_v4l_codec_enable:1;");
188 pbuf += sprintf(pbuf, "parm_v4l_buffer_margin:%d;",
189 ctx->config.parm.dec.cfg.ref_buf_margin);
190 pbuf += sprintf(pbuf, "vp9_double_write_mode:%d;",
191 ctx->config.parm.dec.cfg.double_write_mode);
192 pbuf += sprintf(pbuf, "vp9_buf_width:%d;",
193 ctx->config.parm.dec.cfg.init_width);
194 pbuf += sprintf(pbuf, "vp9_buf_height:%d;",
195 ctx->config.parm.dec.cfg.init_height);
196 pbuf += sprintf(pbuf, "save_buffer_mode:0;");
197 pbuf += sprintf(pbuf, "no_head:0;");
198 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_mode:%d;",
199 ctx->config.parm.dec.cfg.canvas_mem_mode);
200 pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_endian:%d;",
201 ctx->config.parm.dec.cfg.canvas_mem_endian);
202 ctx->config.length = pbuf - ctx->config.buf;
203 } else {
204 ctx->config.parm.dec.cfg.double_write_mode = 16;
205 ctx->config.parm.dec.cfg.ref_buf_margin = 7;
206 ctx->config.length = vdec_config_default_parms(ctx->config.buf);
207 }
208
209 if ((ctx->config.parm.dec.parms_status &
210 V4L2_CONFIG_PARM_DECODE_HDRINFO) &&
211 inst->parms.hdr.color_parms.present_flag) {
212 u8 *pbuf = ctx->config.buf + ctx->config.length;
213
214 pbuf += sprintf(pbuf, "mG.x:%d;",
215 ctx->config.parm.dec.hdr.color_parms.primaries[0][0]);
216 pbuf += sprintf(pbuf, "mG.y:%d;",
217 ctx->config.parm.dec.hdr.color_parms.primaries[0][1]);
218 pbuf += sprintf(pbuf, "mB.x:%d;",
219 ctx->config.parm.dec.hdr.color_parms.primaries[1][0]);
220 pbuf += sprintf(pbuf, "mB.y:%d;",
221 ctx->config.parm.dec.hdr.color_parms.primaries[1][1]);
222 pbuf += sprintf(pbuf, "mR.x:%d;",
223 ctx->config.parm.dec.hdr.color_parms.primaries[2][0]);
224 pbuf += sprintf(pbuf, "mR.y:%d;",
225 ctx->config.parm.dec.hdr.color_parms.primaries[2][1]);
226 pbuf += sprintf(pbuf, "mW.x:%d;",
227 ctx->config.parm.dec.hdr.color_parms.white_point[0]);
228 pbuf += sprintf(pbuf, "mW.y:%d;",
229 ctx->config.parm.dec.hdr.color_parms.white_point[1]);
230 pbuf += sprintf(pbuf, "mMaxDL:%d;",
231 ctx->config.parm.dec.hdr.color_parms.luminance[0] / 1000);
232 pbuf += sprintf(pbuf, "mMinDL:%d;",
233 ctx->config.parm.dec.hdr.color_parms.luminance[1]);
234 pbuf += sprintf(pbuf, "mMaxCLL:%d;",
235 ctx->config.parm.dec.hdr.color_parms.content_light_level.max_content);
236 pbuf += sprintf(pbuf, "mMaxFALL:%d;",
237 ctx->config.parm.dec.hdr.color_parms.content_light_level.max_pic_average);
238 ctx->config.length = pbuf - ctx->config.buf;
239 inst->parms.hdr = ctx->config.parm.dec.hdr;
240 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_HDRINFO;
241 }
242
243 inst->vdec.config = ctx->config;
244 inst->parms.cfg = ctx->config.parm.dec.cfg;
245 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_CFGINFO;
246}
247
248static int vdec_vp9_init(struct aml_vcodec_ctx *ctx, unsigned long *h_vdec)
249{
250 struct vdec_vp9_inst *inst = NULL;
251 int ret = -1;
252
253 inst = kzalloc(sizeof(*inst), GFP_KERNEL);
254 if (!inst)
255 return -ENOMEM;
256
257 inst->vdec.video_type = VFORMAT_VP9;
258 inst->vdec.dev = ctx->dev->vpu_plat_dev;
259 inst->vdec.filp = ctx->dev->filp;
260 inst->vdec.ctx = ctx;
261 inst->ctx = ctx;
262
263 vdec_parser_parms(inst);
264
265 /* set play mode.*/
266 if (ctx->is_drm_mode)
267 inst->vdec.port.flag |= PORT_FLAG_DRM;
268
269 /* to eable vp9 hw.*/
270 inst->vdec.port.type = PORT_TYPE_HEVC;
271
272 /* init vfm */
273 inst->vfm.ctx = ctx;
274 inst->vfm.ada_ctx = &inst->vdec;
275 ret = vcodec_vfm_init(&inst->vfm);
276 if (ret) {
277 pr_err("%s, init vfm failed.\n", __func__);
278 goto err;
279 }
280
281 /* probe info from the stream */
282 inst->vsi = kzalloc(sizeof(struct vdec_vp9_vsi), GFP_KERNEL);
283 if (!inst->vsi) {
284 ret = -ENOMEM;
285 goto err;
286 }
287
288 /* alloc the header buffer to be used cache sps or spp etc.*/
289 inst->vsi->header_buf = kzalloc(HEADER_BUFFER_SIZE, GFP_KERNEL);
290 if (!inst->vsi) {
291 ret = -ENOMEM;
292 goto err;
293 }
294
295 init_completion(&inst->comp);
296
297 aml_vcodec_debug(inst, "vp9 Instance >> %p", inst);
298
299 ctx->ada_ctx = &inst->vdec;
300 *h_vdec = (unsigned long)inst;
301
302 /* init decoder. */
303 ret = video_decoder_init(&inst->vdec);
304 if (ret) {
305 aml_vcodec_err(inst, "vdec_vp9 init err=%d", ret);
306 goto err;
307 }
308
309 //dump_init();
310
311 return 0;
312err:
313 if (inst)
314 vcodec_vfm_release(&inst->vfm);
315 if (inst && inst->vsi && inst->vsi->header_buf)
316 kfree(inst->vsi->header_buf);
317 if (inst && inst->vsi)
318 kfree(inst->vsi);
319 if (inst)
320 kfree(inst);
321 *h_vdec = 0;
322
323 return ret;
324}
325
326#if 0
327static int refer_buffer_num(int level_idc, int poc_cnt,
328 int mb_width, int mb_height)
329{
330 return 20;
331}
332#endif
333
334static int vdec_get_dw_mode(struct vdec_vp9_inst *inst, int dw_mode)
335{
336 u32 valid_dw_mode = inst->parms.cfg.double_write_mode;
337 int w = inst->parms.cfg.init_width;
338 int h = inst->parms.cfg.init_height;
339 u32 dw = 0x1; /*1:1*/
340
341 switch (valid_dw_mode) {
342 case 0x100:
343 if (w > 1920 && h > 1088)
344 dw = 0x4; /*1:2*/
345 break;
346 case 0x200:
347 if (w > 1920 && h > 1088)
348 dw = 0x2; /*1:4*/
349 break;
350 case 0x300:
351 if (w > 1280 && h > 720)
352 dw = 0x4; /*1:2*/
353 break;
354 default:
355 dw = valid_dw_mode;
356 break;
357 }
358
359 return dw;
360}
361
362static int vdec_pic_scale(struct vdec_vp9_inst *inst, int length, int dw_mode)
363{
364 int ret = 64;
365
366 switch (vdec_get_dw_mode(inst, dw_mode)) {
367 case 0x0: /* only afbc, output afbc */
368 ret = 64;
369 break;
370 case 0x1: /* afbc and (w x h), output YUV420 */
371 ret = length;
372 break;
373 case 0x2: /* afbc and (w/4 x h/4), output YUV420 */
374 case 0x3: /* afbc and (w/4 x h/4), output afbc and YUV420 */
375 ret = length >> 2;
376 break;
377 case 0x4: /* afbc and (w/2 x h/2), output YUV420 */
378 ret = length >> 1;
379 break;
380 case 0x10: /* (w x h), output YUV420-8bit) */
381 default:
382 ret = length;
383 break;
384 }
385
386 return ret;
387}
388
389static void fill_vdec_params(struct vdec_vp9_inst *inst,
390 struct VP9Context *vp9_ctx)
391{
392 struct vdec_pic_info *pic = &inst->vsi->pic;
393 struct vdec_vp9_dec_info *dec = &inst->vsi->dec;
394 struct v4l2_rect *rect = &inst->vsi->crop;
395 int dw = inst->parms.cfg.double_write_mode;
396 int margin = inst->parms.cfg.ref_buf_margin;
397
398 /* fill visible area size that be used for EGL. */
399 pic->visible_width = vdec_pic_scale(inst, vp9_ctx->render_width, dw);
400 pic->visible_height = vdec_pic_scale(inst, vp9_ctx->render_height, dw);
401
402 /* calc visible ares. */
403 rect->left = 0;
404 rect->top = 0;
405 rect->width = pic->visible_width;
406 rect->height = pic->visible_height;
407
408 /* config canvas size that be used for decoder. */
409 pic->coded_width = vdec_pic_scale(inst, ALIGN(vp9_ctx->width, 32), dw);
410 pic->coded_height = vdec_pic_scale(inst, ALIGN(vp9_ctx->height, 32), dw);
411
412 pic->y_len_sz = pic->coded_width * pic->coded_height;
413 pic->c_len_sz = pic->y_len_sz >> 1;
414
415 /* calc DPB size */
416 dec->dpb_sz = 5 + margin;//refer_buffer_num(sps->level_idc, poc_cnt, mb_w, mb_h);
417
418 inst->parms.ps.visible_width = pic->visible_width;
419 inst->parms.ps.visible_height = pic->visible_height;
420 inst->parms.ps.coded_width = pic->coded_width;
421 inst->parms.ps.coded_height = pic->coded_height;
422 inst->parms.ps.dpb_size = dec->dpb_sz;
423 inst->parms.parms_status |= V4L2_CONFIG_PARM_DECODE_PSINFO;
424
425 aml_vcodec_debug(inst, "[%d] The stream infos, dw: %d, coded:(%d x %d), visible:(%d x %d), DPB: %d, margin: %d\n",
426 inst->ctx->id, dw, pic->coded_width, pic->coded_height,
427 pic->visible_width, pic->visible_height,
428 dec->dpb_sz - margin, margin);
429}
430
431static int stream_parse_by_ucode(struct vdec_vp9_inst *inst, u8 *buf, u32 size)
432{
433 int ret = 0;
434
435 ret = vdec_write_nalu(inst, buf, size, 0);
436 if (ret < 0) {
437 pr_err("write frame data failed. err: %d\n", ret);
438 return ret;
439 }
440
441 /* wait ucode parse ending. */
442 wait_for_completion_timeout(&inst->comp,
443 msecs_to_jiffies(1000));
444
445 return inst->vsi->dec.dpb_sz ? 0 : -1;
446}
447
448static int stream_parse(struct vdec_vp9_inst *inst, u8 *buf, u32 size)
449{
450 int ret = 0;
451 struct vp9_param_sets *ps = NULL;
452
453 ps = vzalloc(sizeof(struct vp9_param_sets));
454 if (ps == NULL)
455 return -ENOMEM;
456
457 ret = vp9_decode_extradata_ps(buf, size, ps);
458 if (ret) {
459 pr_err("parse extra data failed. err: %d\n", ret);
460 goto out;
461 }
462
463 if (ps->head_parsed)
464 fill_vdec_params(inst, &ps->ctx);
465
466 ret = ps->head_parsed ? 0 : -1;
467out:
468 vfree(ps);
469
470 return ret;
471}
472
473static int vdec_vp9_probe(unsigned long h_vdec,
474 struct aml_vcodec_mem *bs, void *out)
475{
476 struct vdec_vp9_inst *inst =
477 (struct vdec_vp9_inst *)h_vdec;
478 struct stream_info *st;
479 u8 *buf = (u8 *)bs->vaddr;
480 u32 size = bs->size;
481 int ret = 0;
482
483 st = (struct stream_info *)buf;
484 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
485 return 0;
486
487 if (st->magic == NORe || st->magic == NORn)
488 ret = stream_parse(inst, st->data, st->length);
489 else {
490 if (inst->ctx->param_sets_from_ucode)
491 ret = stream_parse_by_ucode(inst, buf, size);
492 else
493 ret = stream_parse(inst, buf, size);
494 }
495
496 inst->vsi->cur_pic = inst->vsi->pic;
497
498 return ret;
499}
500
501static void vdec_vp9_deinit(unsigned long h_vdec)
502{
503 ulong flags;
504 struct vdec_vp9_inst *inst = (struct vdec_vp9_inst *)h_vdec;
505 struct aml_vcodec_ctx *ctx = inst->ctx;
506
507 aml_vcodec_debug_enter(inst);
508
509 video_decoder_release(&inst->vdec);
510
511 vcodec_vfm_release(&inst->vfm);
512
513 //dump_deinit();
514
515 spin_lock_irqsave(&ctx->slock, flags);
516 if (inst->vsi && inst->vsi->header_buf)
517 kfree(inst->vsi->header_buf);
518
519 if (inst->vsi)
520 kfree(inst->vsi);
521
522 kfree(inst);
523
524 ctx->drv_handle = 0;
525 spin_unlock_irqrestore(&ctx->slock, flags);
526
527 need_trigger = false;
528 dump_cnt = 0;
529}
530
531static int vdec_vp9_get_fb(struct vdec_vp9_inst *inst, struct vdec_v4l2_buffer **out)
532{
533 return get_fb_from_queue(inst->ctx, out);
534}
535
536static void vdec_vp9_get_vf(struct vdec_vp9_inst *inst, struct vdec_v4l2_buffer **out)
537{
538 struct vframe_s *vf = NULL;
539 struct vdec_v4l2_buffer *fb = NULL;
540
541 vf = peek_video_frame(&inst->vfm);
542 if (!vf) {
543 aml_vcodec_debug(inst, "there is no vframe.");
544 *out = NULL;
545 return;
546 }
547
548 vf = get_video_frame(&inst->vfm);
549 if (!vf) {
550 aml_vcodec_debug(inst, "the vframe is avalid.");
551 *out = NULL;
552 return;
553 }
554
555 atomic_set(&vf->use_cnt, 1);
556
557 fb = (struct vdec_v4l2_buffer *)vf->v4l_mem_handle;
558 fb->vf_handle = (unsigned long)vf;
559 fb->status = FB_ST_DISPLAY;
560
561 *out = fb;
562
563 //pr_info("%s, %d\n", __func__, fb->base_y.bytes_used);
564 //dump_write(fb->base_y.vaddr, fb->base_y.bytes_used);
565 //dump_write(fb->base_c.vaddr, fb->base_c.bytes_used);
566
567 /* convert yuv format. */
568 //swap_uv(fb->base_c.vaddr, fb->base_c.size);
569}
570
571static void add_prefix_data(struct vp9_superframe_split *s,
572 u8 **out, u32 *out_size)
573{
574 int i;
575 u8 *p = NULL;
576 u32 length;
577
578 length = s->size + s->nb_frames * PREFIX_SIZE;
579 p = vzalloc(length);
580 if (!p) {
581 pr_err("alloc size %d failed.\n" ,length);
582 return;
583 }
584
585 memcpy(p, s->data, s->size);
586 p += s->size;
587
588 for (i = s->nb_frames; i > 0; i--) {
589 u32 frame_size = s->sizes[i - 1];
590 u8 *prefix = NULL;
591
592 p -= frame_size;
593 memmove(p + PREFIX_SIZE * i, p, frame_size);
594 prefix = p + PREFIX_SIZE * (i - 1);
595
596 /*add amlogic frame headers.*/
597 frame_size += 16;
598 prefix[0] = (frame_size >> 24) & 0xff;
599 prefix[1] = (frame_size >> 16) & 0xff;
600 prefix[2] = (frame_size >> 8 ) & 0xff;
601 prefix[3] = (frame_size >> 0 ) & 0xff;
602 prefix[4] = ((frame_size >> 24) & 0xff) ^ 0xff;
603 prefix[5] = ((frame_size >> 16) & 0xff) ^ 0xff;
604 prefix[6] = ((frame_size >> 8 ) & 0xff) ^ 0xff;
605 prefix[7] = ((frame_size >> 0 ) & 0xff) ^ 0xff;
606 prefix[8] = 0;
607 prefix[9] = 0;
608 prefix[10] = 0;
609 prefix[11] = 1;
610 prefix[12] = 'A';
611 prefix[13] = 'M';
612 prefix[14] = 'L';
613 prefix[15] = 'V';
614 frame_size -= 16;
615 }
616
617 *out = p;
618 *out_size = length;
619}
620
621static void trigger_decoder(struct aml_vdec_adapt *vdec)
622{
623 int i, ret;
624 u32 frame_size = 0;
625 u8 *p = vp9_trigger_header;
626
627 for (i = 0; i < ARRAY_SIZE(vp9_trigger_framesize); i++) {
628 frame_size = vp9_trigger_framesize[i];
629 ret = vdec_vframe_write(vdec, p,
630 frame_size, 0);
631 pr_err("write trigger frame %d\n", ret);
632 p += frame_size;
633 }
634}
635
636static int vdec_write_nalu(struct vdec_vp9_inst *inst,
637 u8 *buf, u32 size, u64 ts)
638{
639 int ret = 0;
640 struct aml_vdec_adapt *vdec = &inst->vdec;
641 struct vp9_superframe_split s;
642 u8 *data = NULL;
643 u32 length = 0;
644 bool need_prefix = vp9_need_prefix;
645
646 memset(&s, 0, sizeof(s));
647
648 /*trigger.*/
649 if (0 && !need_trigger) {
650 trigger_decoder(vdec);
651 need_trigger = true;
652 }
653
654 if (need_prefix) {
655 /*parse superframe.*/
656 s.data = buf;
657 s.data_size = size;
658 ret = vp9_superframe_split_filter(&s);
659 if (ret) {
660 pr_err("parse frames failed.\n");
661 return ret;
662 }
663
664 /*add headers.*/
665 add_prefix_data(&s, &data, &length);
666 ret = vdec_vframe_write(vdec, data, length, ts);
667 vfree(data);
668 } else {
669 ret = vdec_vframe_write(vdec, buf, size, ts);
670 }
671
672 return ret;
673}
674
675static bool monitor_res_change(struct vdec_vp9_inst *inst, u8 *buf, u32 size)
676{
677 int ret = -1;
678 u8 *p = buf;
679 int len = size;
680 u32 synccode = vp9_need_prefix ?
681 ((p[1] << 16) | (p[2] << 8) | p[3]) :
682 ((p[17] << 16) | (p[18] << 8) | p[19]);
683
684 if (synccode == SYNC_CODE) {
685 ret = stream_parse(inst, p, len);
686 if (!ret && (inst->vsi->cur_pic.coded_width !=
687 inst->vsi->pic.coded_width ||
688 inst->vsi->cur_pic.coded_height !=
689 inst->vsi->pic.coded_height)) {
690 inst->vsi->cur_pic = inst->vsi->pic;
691 return true;
692 }
693 }
694
695 return false;
696}
697
698static int vdec_vp9_decode(unsigned long h_vdec, struct aml_vcodec_mem *bs,
699 u64 timestamp, bool *res_chg)
700{
701 struct vdec_vp9_inst *inst = (struct vdec_vp9_inst *)h_vdec;
702 struct aml_vdec_adapt *vdec = &inst->vdec;
703 struct stream_info *st;
704 u8 *buf;
705 u32 size;
706 int ret = -1;
707
708 if (bs == NULL)
709 return -1;
710
711 if (vdec_input_full(vdec))
712 return -EAGAIN;
713
714 buf = (u8 *)bs->vaddr;
715 size = bs->size;
716 st = (struct stream_info *)buf;
717
718 if (inst->ctx->is_drm_mode && (st->magic == DRMe || st->magic == DRMn))
719 ret = vdec_vbuf_write(vdec, st->m.buf, sizeof(st->m.drm));
720 else if (st->magic == NORe)
721 ret = vdec_vbuf_write(vdec, st->data, st->length);
722 else if (st->magic == NORn)
723 ret = vdec_write_nalu(inst, st->data, st->length, timestamp);
724 else if (inst->ctx->is_stream_mode)
725 ret = vdec_vbuf_write(vdec, buf, size);
726 else {
727 /*checked whether the resolution changes.*/
728 if ((*res_chg = monitor_res_change(inst, buf, size)))
729 return 0;
730
731 ret = vdec_write_nalu(inst, buf, size, timestamp);
732 }
733
734 return ret;
735}
736
737 static void get_param_config_info(struct vdec_vp9_inst *inst,
738 struct aml_dec_params *parms)
739 {
740 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_CFGINFO)
741 parms->cfg = inst->parms.cfg;
742 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_PSINFO)
743 parms->ps = inst->parms.ps;
744 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_HDRINFO)
745 parms->hdr = inst->parms.hdr;
746 if (inst->parms.parms_status & V4L2_CONFIG_PARM_DECODE_CNTINFO)
747 parms->cnt = inst->parms.cnt;
748
749 parms->parms_status |= inst->parms.parms_status;
750
751 aml_vcodec_debug(inst, "parms status: %u", parms->parms_status);
752 }
753
754static int vdec_vp9_get_param(unsigned long h_vdec,
755 enum vdec_get_param_type type, void *out)
756{
757 int ret = 0;
758 struct vdec_vp9_inst *inst = (struct vdec_vp9_inst *)h_vdec;
759
760 if (!inst) {
761 pr_err("the vp9 inst of dec is invalid.\n");
762 return -1;
763 }
764
765 switch (type) {
766 case GET_PARAM_DISP_FRAME_BUFFER:
767 vdec_vp9_get_vf(inst, out);
768 break;
769
770 case GET_PARAM_FREE_FRAME_BUFFER:
771 ret = vdec_vp9_get_fb(inst, out);
772 break;
773
774 case GET_PARAM_PIC_INFO:
775 get_pic_info(inst, out);
776 break;
777
778 case GET_PARAM_DPB_SIZE:
779 get_dpb_size(inst, out);
780 break;
781
782 case GET_PARAM_CROP_INFO:
783 get_crop_info(inst, out);
784 break;
785
786 case GET_PARAM_CONFIG_INFO:
787 get_param_config_info(inst, out);
788 break;
789 default:
790 aml_vcodec_err(inst, "invalid get parameter type=%d", type);
791 ret = -EINVAL;
792 }
793
794 return ret;
795}
796
797static void set_param_write_sync(struct vdec_vp9_inst *inst)
798{
799 complete(&inst->comp);
800}
801
802static void set_param_ps_info(struct vdec_vp9_inst *inst,
803 struct aml_vdec_ps_infos *ps)
804{
805 struct vdec_pic_info *pic = &inst->vsi->pic;
806 struct vdec_vp9_dec_info *dec = &inst->vsi->dec;
807 struct v4l2_rect *rect = &inst->vsi->crop;
808
809 /* fill visible area size that be used for EGL. */
810 pic->visible_width = ps->visible_width;
811 pic->visible_height = ps->visible_height;
812
813 /* calc visible ares. */
814 rect->left = 0;
815 rect->top = 0;
816 rect->width = pic->visible_width;
817 rect->height = pic->visible_height;
818
819 /* config canvas size that be used for decoder. */
820 pic->coded_width = ps->coded_width;
821 pic->coded_height = ps->coded_height;
822
823 pic->y_len_sz = pic->coded_width * pic->coded_height;
824 pic->c_len_sz = pic->y_len_sz >> 1;
825
826 /* calc DPB size */
827 dec->dpb_sz = 5;
828
829 inst->parms.ps = *ps;
830 inst->parms.parms_status |=
831 V4L2_CONFIG_PARM_DECODE_PSINFO;
832
833 /*wake up*/
834 complete(&inst->comp);
835
836 pr_info("Parse from ucode, crop(%d x %d), coded(%d x %d) dpb: %d\n",
837 ps->visible_width, ps->visible_height,
838 ps->coded_width, ps->coded_height,
839 ps->dpb_size);
840}
841
842static void set_param_hdr_info(struct vdec_vp9_inst *inst,
843 struct aml_vdec_hdr_infos *hdr)
844{
845 if ((inst->parms.parms_status &
846 V4L2_CONFIG_PARM_DECODE_HDRINFO)) {
847 inst->parms.hdr = *hdr;
848 inst->parms.parms_status |=
849 V4L2_CONFIG_PARM_DECODE_HDRINFO;
850 aml_vdec_dispatch_event(inst->ctx,
851 V4L2_EVENT_SRC_CH_HDRINFO);
852 pr_info("VP9 set HDR infos\n");
853 }
854}
855
856static void set_param_post_event(struct vdec_vp9_inst *inst, u32 *event)
857{
858 aml_vdec_dispatch_event(inst->ctx, *event);
859 pr_info("VP9 post event: %d\n", *event);
860}
861
862static int vdec_vp9_set_param(unsigned long h_vdec,
863 enum vdec_set_param_type type, void *in)
864{
865 int ret = 0;
866 struct vdec_vp9_inst *inst = (struct vdec_vp9_inst *)h_vdec;
867
868 if (!inst) {
869 pr_err("the vp9 inst of dec is invalid.\n");
870 return -1;
871 }
872
873 switch (type) {
874 case SET_PARAM_WRITE_FRAME_SYNC:
875 set_param_write_sync(inst);
876 break;
877
878 case SET_PARAM_PS_INFO:
879 set_param_ps_info(inst, in);
880 break;
881
882 case SET_PARAM_HDR_INFO:
883 set_param_hdr_info(inst, in);
884 break;
885
886 case SET_PARAM_POST_EVENT:
887 set_param_post_event(inst, in);
888 break;
889 default:
890 aml_vcodec_err(inst, "invalid set parameter type=%d", type);
891 ret = -EINVAL;
892 }
893
894 return ret;
895}
896
897static struct vdec_common_if vdec_vp9_if = {
898 .init = vdec_vp9_init,
899 .probe = vdec_vp9_probe,
900 .decode = vdec_vp9_decode,
901 .get_param = vdec_vp9_get_param,
902 .set_param = vdec_vp9_set_param,
903 .deinit = vdec_vp9_deinit,
904};
905
906struct vdec_common_if *get_vp9_dec_comm_if(void);
907
908struct vdec_common_if *get_vp9_dec_comm_if(void)
909{
910 return &vdec_vp9_if;
911}
912
913
generated by cgit at 2024-05-17 11:37:20 (GMT)