path: root/drivers/frame_provider/decoder/mpeg12/vmpeg12_multi.c (plain)
blob: 6643f41ee96562937411be88f04a214cba388d74

1	/*
2	* drivers/amlogic/amports/vmpeg12.c
3	*
4	* Copyright (C) 2015 Amlogic, Inc. All rights reserved.
5	*
6	* This program is free software; you can redistribute it and/or modify
7	* it under the terms of the GNU General Public License as published by
8	* the Free Software Foundation; either version 2 of the License, or
9	* (at your option) any later version.
10	*
11	* This program is distributed in the hope that it will be useful, but WITHOUT
12	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14	* more details.
15	*
16	*/
17
18	#include <linux/kernel.h>
19	#include <linux/types.h>
20	#include <linux/errno.h>
21	#include <linux/interrupt.h>
22	#include <linux/timer.h>
23	#include <linux/kfifo.h>
24	#include <linux/platform_device.h>
25	#include <linux/random.h>
26	#include <linux/dma-mapping.h>
27	#include <linux/slab.h>
28	#include <linux/delay.h>
29
30	#include <linux/amlogic/media/frame_sync/ptsserv.h>
31	#include <linux/amlogic/media/utils/amstream.h>
32	#include <linux/amlogic/media/canvas/canvas.h>
33	#include <linux/amlogic/media/vfm/vframe.h>
34	#include <linux/amlogic/media/vfm/vframe_provider.h>
35	#include <linux/amlogic/media/vfm/vframe_receiver.h>
36	#include <linux/amlogic/tee.h>
37
38	#include <linux/amlogic/media/utils/vdec_reg.h>
39	#include <linux/amlogic/media/registers/register.h>
40	#include "../../../stream_input/amports/amports_priv.h"
41
42	#include "../utils/vdec_input.h"
43	#include "../utils/vdec.h"
44	#include "../utils/amvdec.h"
45	#include "../utils/decoder_mmu_box.h"
46	#include "../utils/decoder_bmmu_box.h"
47	#include <linux/amlogic/media/codec_mm/codec_mm.h>
48	#include <linux/amlogic/media/codec_mm/configs.h>
49	#include "../utils/firmware.h"
50	#include "../utils/vdec_v4l2_buffer_ops.h"
51
52
53	#define MEM_NAME "codec_mmpeg12"
54	#define CHECK_INTERVAL (HZ/100)
55
56	#define DRIVER_NAME "ammvdec_mpeg12"
57	#define MODULE_NAME "ammvdec_mpeg12"
58	#define MREG_REF0 AV_SCRATCH_2
59	#define MREG_REF1 AV_SCRATCH_3
60	/* protocol registers */
61	#define MREG_SEQ_INFO AV_SCRATCH_4
62	#define MREG_PIC_INFO AV_SCRATCH_5
63	#define MREG_PIC_WIDTH AV_SCRATCH_6
64	#define MREG_PIC_HEIGHT AV_SCRATCH_7
65	#define MREG_INPUT AV_SCRATCH_8 /*input_type*/
66	#define MREG_BUFFEROUT AV_SCRATCH_9 /*FROM_AMRISC_REG*/
67
68	#define MREG_CMD AV_SCRATCH_A
69	#define MREG_CO_MV_START AV_SCRATCH_B
70	#define MREG_ERROR_COUNT AV_SCRATCH_C
71	#define MREG_FRAME_OFFSET AV_SCRATCH_D
72	#define MREG_WAIT_BUFFER AV_SCRATCH_E
73	#define MREG_FATAL_ERROR AV_SCRATCH_F
74
75	#define GET_SLICE_TYPE(type) ("IPB##"[((type&PICINFO_TYPE_MASK)>>16)&0x3])
76	#define PICINFO_ERROR 0x80000000
77	#define PICINFO_TYPE_MASK 0x00030000
78	#define PICINFO_TYPE_I 0x00000000
79	#define PICINFO_TYPE_P 0x00010000
80	#define PICINFO_TYPE_B 0x00020000
81	#define PICINFO_PROG 0x8000
82	#define PICINFO_RPT_FIRST 0x4000
83	#define PICINFO_TOP_FIRST 0x2000
84	#define PICINFO_FRAME 0x1000
85
86	#define TOP_FIELD 0x1000
87	#define BOTTOM_FIELD 0x2000
88	#define FRAME_PICTURE 0x3000
89	#define FRAME_PICTURE_MASK 0x3000
90
91	#define SEQINFO_EXT_AVAILABLE 0x80000000
92	#define SEQINFO_PROG 0x00010000
93	#define CCBUF_SIZE (5*1024)
94
95	#define VF_POOL_SIZE 32
96	#define DECODE_BUFFER_NUM_MAX 8
97	#define PUT_INTERVAL (HZ/100)
98	#define WORKSPACE_SIZE (4*SZ_64K) /*swap&ccbuf&matirx&MV*/
99	#define CTX_LMEM_SWAP_OFFSET 0
100	#define CTX_CCBUF_OFFSET 0x800
101	#define CTX_QUANT_MATRIX_OFFSET (CTX_CCBUF_OFFSET + 5*1024)
102	#define CTX_CO_MV_OFFSET (CTX_QUANT_MATRIX_OFFSET + 1*1024)
103	#define CTX_DECBUF_OFFSET (CTX_CO_MV_OFFSET + 0x11000)
104
105	#define MAX_BMMU_BUFFER_NUM (DECODE_BUFFER_NUM_MAX + 1)
106	#define DEFAULT_MEM_SIZE (32*SZ_1M)
107	static u32 buf_size = 32 * 1024 * 1024;
108	static int pre_decode_buf_level = 0x800;
109	static u32 dec_control;
110	static u32 error_frame_skip_level = 2;
111	static u32 stat;
112	static u32 udebug_flag;
113	static unsigned int radr;
114	static unsigned int rval;
115
116	static u32 without_display_mode;
117
118	#define VMPEG12_DEV_NUM 9
119	static unsigned int max_decode_instance_num = VMPEG12_DEV_NUM;
120	static unsigned int max_process_time[VMPEG12_DEV_NUM];
121	static unsigned int decode_timeout_val = 100;
122	#define INCPTR(p) ptr_atomic_wrap_inc(&p)
123
124	#define DEC_CONTROL_FLAG_FORCE_2500_720_576_INTERLACE 0x0002
125	#define DEC_CONTROL_FLAG_FORCE_3000_704_480_INTERLACE 0x0004
126	#define DEC_CONTROL_FLAG_FORCE_2500_704_576_INTERLACE 0x0008
127	#define DEC_CONTROL_FLAG_FORCE_2500_544_576_INTERLACE 0x0010
128	#define DEC_CONTROL_FLAG_FORCE_2500_480_576_INTERLACE 0x0020
129	#define DEC_CONTROL_INTERNAL_MASK 0x0fff
130	#define DEC_CONTROL_FLAG_FORCE_SEQ_INTERLACE 0x1000
131
132	#define INTERLACE_SEQ_ALWAYS
133
134	#if 1/* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */
135	#define NV21
136	#endif
137
138	#define AGAIN_HAS_THRESHOLD
139
140	#ifdef AGAIN_HAS_THRESHOLD
141	u32 again_threshold;
142	#endif
143
144	/*
145	#define DUMP_USER_DATA
146	*/
147
148	enum {
149	FRAME_REPEAT_TOP,
150	FRAME_REPEAT_BOT,
151	FRAME_REPEAT_NONE
152	};
153	#define DEC_RESULT_NONE 0
154	#define DEC_RESULT_DONE 1
155	#define DEC_RESULT_AGAIN 2
156	#define DEC_RESULT_ERROR 3
157	#define DEC_RESULT_FORCE_EXIT 4
158	#define DEC_RESULT_EOS 5
159	#define DEC_RESULT_GET_DATA 6
160	#define DEC_RESULT_GET_DATA_RETRY 7
161
162	#define DEC_DECODE_TIMEOUT 0x21
163	#define DECODE_ID(hw) (hw_to_vdec(hw)->id)
164	#define DECODE_STOP_POS AV_SCRATCH_K
165
166	static struct vframe_s *vmpeg_vf_peek(void *);
167	static struct vframe_s *vmpeg_vf_get(void *);
168	static void vmpeg_vf_put(struct vframe_s *, void *);
169	static int vmpeg_vf_states(struct vframe_states *states, void *);
170	static int vmpeg_event_cb(int type, void *data, void *private_data);
171
172	struct mmpeg2_userdata_record_t {
173	struct userdata_meta_info_t meta_info;
174	u32 rec_start;
175	u32 rec_len;
176	};
177
178	#define USERDATA_FIFO_NUM 256
179	#define MAX_FREE_USERDATA_NODES 5
180
181	struct mmpeg2_userdata_info_t {
182	struct mmpeg2_userdata_record_t records[USERDATA_FIFO_NUM];
183	u8 *data_buf;
184	u8 *data_buf_end;
185	u32 buf_len;
186	u32 read_index;
187	u32 write_index;
188	u32 last_wp;
189	};
190	#define MAX_UD_RECORDS 5
191
192	struct pic_info_t {
193	u32 buffer_info;
194	u32 index;
195	u32 offset;
196	u32 width;
197	u32 height;
198	u32 pts;
199	u64 pts64;
200	bool pts_valid;
201	ulong v4l_ref_buf_addr;
202	};
203
204	struct vdec_mpeg12_hw_s {
205	spinlock_t lock;
206	struct platform_device *platform_dev;
207	DECLARE_KFIFO(newframe_q, struct vframe_s *, VF_POOL_SIZE);
208	DECLARE_KFIFO(display_q, struct vframe_s *, VF_POOL_SIZE);
209	struct vframe_s vfpool[VF_POOL_SIZE];
210	s32 vfbuf_use[DECODE_BUFFER_NUM_MAX];
211	u32 frame_width;
212	u32 frame_height;
213	u32 frame_dur;
214	u32 frame_prog;
215	u32 seqinfo;
216	u32 ctx_valid;
217	u32 dec_control;
218	void *mm_blk_handle;
219	struct vframe_chunk_s *chunk;
220	u32 stat;
221	u8 init_flag;
222	unsigned long buf_start;
223	u32 buf_size;
224	u32 reg_pic_width;
225	u32 reg_pic_height;
226	u32 reg_mpeg1_2_reg;
227	u32 reg_pic_head_info;
228	u32 reg_f_code_reg;
229	u32 reg_slice_ver_pos_pic_type;
230	u32 reg_vcop_ctrl_reg;
231	u32 reg_mb_info;
232	u32 reg_signal_type;
233	u32 dec_num;
234	u32 disp_num;
235	struct timer_list check_timer;
236	u32 decode_timeout_count;
237	unsigned long int start_process_time;
238	u32 last_vld_level;
239	u32 eos;
240	struct pic_info_t pics[DECODE_BUFFER_NUM_MAX];
241	u32 canvas_spec[DECODE_BUFFER_NUM_MAX];
242	u64 lastpts64;
243	u32 last_chunk_pts;
244	struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][2];
245	struct dec_sysinfo vmpeg12_amstream_dec_info;
246
247	s32 refs[2];
248	int dec_result;
249	struct work_struct work;
250	struct work_struct timeout_work;
251	struct work_struct notify_work;
252	void (*vdec_cb)(struct vdec_s *, void *);
253	void *vdec_cb_arg;
254	unsigned long ccbuf_phyAddress;
255	void *ccbuf_phyAddress_virt;
256	unsigned long ccbuf_phyAddress_is_remaped_nocache;
257	u32 frame_rpt_state;
258	/* for error handling */
259	s32 frame_force_skip_flag;
260	s32 error_frame_skip_level;
261	s32 wait_buffer_counter;
262	u32 first_i_frame_ready;
263	u32 run_count;
264	u32 not_run_ready;
265	u32 input_empty;
266	u32 put_num;
267	u32 peek_num;
268	u32 get_num;
269	u32 drop_frame_count;
270	u32 buffer_not_ready;
271	u32 ratio_control;
272	int frameinfo_enable;
273	struct firmware_s *fw;
274	u32 canvas_mode;
275	#ifdef AGAIN_HAS_THRESHOLD
276	u32 pre_parser_wr_ptr;
277	u8 next_again_flag;
278	#endif
279	struct work_struct userdata_push_work;
280	struct mutex userdata_mutex;
281	struct mmpeg2_userdata_info_t userdata_info;
282	struct mmpeg2_userdata_record_t ud_record[MAX_UD_RECORDS];
283	int cur_ud_idx;
284	u8 *user_data_buffer;
285	int wait_for_udr_send;
286	u32 ucode_cc_last_wp;
287	u32 notify_ucode_cc_last_wp;
288	u32 notify_data_cc_last_wp;
289	u32 userdata_wp_ctx;
290	#ifdef DUMP_USER_DATA
291	#define MAX_USER_DATA_SIZE 1572864
292	void *user_data_dump_buf;
293	unsigned char *pdump_buf_cur_start;
294	int total_len;
295	int bskip;
296	int n_userdata_id;
297	u32 reference[MAX_UD_RECORDS];
298	#endif
299	int tvp_flag;
300	bool is_used_v4l;
301	void *v4l2_ctx;
302	bool v4l_params_parsed;
303	};
304	static void vmpeg12_local_init(struct vdec_mpeg12_hw_s *hw);
305	static int vmpeg12_hw_ctx_restore(struct vdec_mpeg12_hw_s *hw);
306	static void reset_process_time(struct vdec_mpeg12_hw_s *hw);
307	static struct vdec_info gvs;
308	static int debug_enable;
309	/*static struct work_struct userdata_push_work;*/
310	#undef pr_info
311	#define pr_info printk
312	unsigned int mpeg12_debug_mask = 0xff;
313	/*static int counter_max = 5;*/
314
315	#define PRINT_FLAG_ERROR 0x0
316	#define PRINT_FLAG_RUN_FLOW 0X0001
317	#define PRINT_FLAG_TIMEINFO 0x0002
318	#define PRINT_FLAG_UCODE_DETAIL 0x0004
319	#define PRINT_FLAG_VLD_DETAIL 0x0008
320	#define PRINT_FLAG_DEC_DETAIL 0x0010
321	#define PRINT_FLAG_BUFFER_DETAIL 0x0020
322	#define PRINT_FLAG_RESTORE 0x0040
323	#define PRINT_FRAME_NUM 0x0080
324	#define PRINT_FLAG_FORCE_DONE 0x0100
325	#define PRINT_FLAG_COUNTER 0X0200
326	#define PRINT_FRAMEBASE_DATA 0x0400
327	#define PRINT_FLAG_VDEC_STATUS 0x0800
328	#define PRINT_FLAG_PARA_DATA 0x1000
329	#define PRINT_FLAG_USERDATA_DETAIL 0x2000
330	#define PRINT_FLAG_TIMEOUT_STATUS 0x4000
331	#define PRINT_FLAG_V4L_DETAIL 0x8000
332
333
334
335	int debug_print(int index, int debug_flag, const char *fmt, ...)
336	{
337	if (((debug_enable & debug_flag) &&
338	((1 << index) & mpeg12_debug_mask))
339	|| (debug_flag == PRINT_FLAG_ERROR)) {
340	unsigned char buf[512];
341	int len = 0;
342	va_list args;
343	va_start(args, fmt);
344	len = sprintf(buf, "%d: ", index);
345	vsnprintf(buf + len, 512-len, fmt, args);
346	pr_info("%s", buf);
347	va_end(args);
348	}
349	return 0;
350	}
351
352
353	/*static bool is_reset;*/
354	#define PROVIDER_NAME "vdec.mpeg12"
355	static const struct vframe_operations_s vf_provider_ops = {
356	.peek = vmpeg_vf_peek,
357	.get = vmpeg_vf_get,
358	.put = vmpeg_vf_put,
359	.event_cb = vmpeg_event_cb,
360	.vf_states = vmpeg_vf_states,
361	};
362
363
364	static const u32 frame_rate_tab[16] = {
365	96000 / 30, 96000000 / 23976, 96000 / 24, 96000 / 25,
366	9600000 / 2997, 96000 / 30, 96000 / 50, 9600000 / 5994,
367	96000 / 60,
368	/* > 8 reserved, use 24 */
369	96000 / 24, 96000 / 24, 96000 / 24, 96000 / 24,
370	96000 / 24, 96000 / 24, 96000 / 24
371	};
372
373	static int vmpeg12_v4l_alloc_buff_config_canvas(struct vdec_mpeg12_hw_s *hw, int i)
374	{
375	int ret;
376	u32 canvas;
377	ulong decbuf_start = 0;
378	int decbuf_y_size = 0;
379	u32 canvas_width = 0, canvas_height = 0;
380	struct vdec_s *vdec = hw_to_vdec(hw);
381	struct vdec_v4l2_buffer *fb = NULL;
382
383	if (hw->pics[i].v4l_ref_buf_addr)
384	return 0;
385
386	ret = vdec_v4l_get_buffer(hw->v4l2_ctx, &fb);
387	if (ret) {
388	debug_print(DECODE_ID(hw), 0,
389	"[%d] get fb fail.\n",
390	((struct aml_vcodec_ctx *)
391	(hw->v4l2_ctx))->id);
392	return ret;
393	}
394
395	hw->pics[i].v4l_ref_buf_addr = (ulong)fb;
396	if (fb->num_planes == 1) {
397	decbuf_start = fb->m.mem[0].addr;
398	decbuf_y_size = fb->m.mem[0].offset;
399	canvas_width = ALIGN(hw->frame_width, 64);
400	canvas_height = ALIGN(hw->frame_height, 32);
401	fb->m.mem[0].bytes_used = fb->m.mem[0].size;
402	} else if (fb->num_planes == 2) {
403	decbuf_start = fb->m.mem[0].addr;
404	decbuf_y_size = fb->m.mem[0].size;
405	canvas_width = ALIGN(hw->frame_width, 64);
406	canvas_height = ALIGN(hw->frame_height, 32);
407	fb->m.mem[0].bytes_used = decbuf_y_size;
408	fb->m.mem[1].bytes_used = decbuf_y_size << 1;
409	}
410
411	debug_print(DECODE_ID(hw), 0, "[%d] %s(), v4l ref buf addr: 0x%x\n",
412	((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id, __func__, fb);
413
414	if (vdec->parallel_dec == 1) {
415	u32 tmp;
416	if (canvas_y(hw->canvas_spec[i]) == 0xff) {
417	tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
418	hw->canvas_spec[i] &= ~0xff;
419	hw->canvas_spec[i] |= tmp;
420	}
421	if (canvas_u(hw->canvas_spec[i]) == 0xff) {
422	tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
423	hw->canvas_spec[i] &= ~(0xffff << 8);
424	hw->canvas_spec[i] |= tmp << 8;
425	hw->canvas_spec[i] |= tmp << 16;
426	}
427	canvas = hw->canvas_spec[i];
428	} else {
429	canvas = vdec->get_canvas(i, 2);
430	hw->canvas_spec[i] = canvas;
431	}
432
433	hw->canvas_config[i][0].phy_addr = decbuf_start;
434	hw->canvas_config[i][0].width = canvas_width;
435	hw->canvas_config[i][0].height = canvas_height;
436	hw->canvas_config[i][0].block_mode = hw->canvas_mode;
437	hw->canvas_config[i][0].endian =
438	(hw->canvas_mode == CANVAS_BLKMODE_LINEAR) ? 7 : 0;
439	canvas_config_config(canvas_y(canvas), &hw->canvas_config[i][0]);
440
441	hw->canvas_config[i][1].phy_addr = decbuf_start + decbuf_y_size;
442	hw->canvas_config[i][1].width = canvas_width;
443	hw->canvas_config[i][1].height = canvas_height / 2;
444	hw->canvas_config[i][1].block_mode = hw->canvas_mode;
445	hw->canvas_config[i][1].endian =
446	(hw->canvas_mode == CANVAS_BLKMODE_LINEAR) ? 7 : 0;
447	canvas_config_config(canvas_u(canvas), &hw->canvas_config[i][1]);
448
449	return 0;
450	}
451
452
453	static bool is_enough_free_buffer(struct vdec_mpeg12_hw_s *hw)
454	{
455	int i;
456
457	for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
458	if (hw->vfbuf_use[i] == 0)
459	break;
460	}
461
462	return i == DECODE_BUFFER_NUM_MAX ? false : true;
463	}
464
465	static int find_free_buffer(struct vdec_mpeg12_hw_s *hw)
466	{
467	int i;
468
469	for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
470	if (hw->vfbuf_use[i] == 0)
471	break;
472	}
473
474	if (i == DECODE_BUFFER_NUM_MAX)
475	return -1;
476
477	if (hw->is_used_v4l)
478	if (vmpeg12_v4l_alloc_buff_config_canvas(hw, i))
479	return -1;
480	return i;
481	}
482
483	static u32 spec_to_index(struct vdec_mpeg12_hw_s *hw, u32 spec)
484	{
485	u32 i;
486
487	for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
488	if (hw->canvas_spec[i] == spec)
489	return i;
490	}
491
492	return DECODE_BUFFER_NUM_MAX;
493	}
494
495	static void set_frame_info(struct vdec_mpeg12_hw_s *hw, struct vframe_s *vf)
496	{
497	u32 ar_bits;
498	u32 buffer_index = vf->index;
499
500	vf->width = hw->pics[buffer_index].width;
501	vf->height = hw->pics[buffer_index].height;
502
503	if (hw->frame_dur > 0)
504	vf->duration = hw->frame_dur;
505	else {
506	vf->duration = hw->frame_dur =
507	frame_rate_tab[(READ_VREG(MREG_SEQ_INFO) >> 4) & 0xf];
508	vdec_schedule_work(&hw->notify_work);
509	}
510
511	ar_bits = READ_VREG(MREG_SEQ_INFO) & 0xf;
512
513	if (ar_bits == 0x2)
514	vf->ratio_control = 0xc0 << DISP_RATIO_ASPECT_RATIO_BIT;
515
516	else if (ar_bits == 0x3)
517	vf->ratio_control = 0x90 << DISP_RATIO_ASPECT_RATIO_BIT;
518
519	else if (ar_bits == 0x4)
520	vf->ratio_control = 0x74 << DISP_RATIO_ASPECT_RATIO_BIT;
521	else
522	vf->ratio_control = 0;
523
524	hw->ratio_control = vf->ratio_control;
525
526	vf->canvas0Addr = vf->canvas1Addr = -1;
527	vf->plane_num = 2;
528
529	vf->canvas0_config[0] = hw->canvas_config[buffer_index][0];
530	vf->canvas0_config[1] = hw->canvas_config[buffer_index][1];
531
532	vf->canvas1_config[0] = hw->canvas_config[buffer_index][0];
533	vf->canvas1_config[1] = hw->canvas_config[buffer_index][1];
534
535	debug_print(DECODE_ID(hw), PRINT_FLAG_PARA_DATA,
536	"mpeg2dec: w(%d), h(%d), dur(%d), dur-ES(%d)\n",
537	hw->frame_width, hw->frame_height, hw->frame_dur,
538	frame_rate_tab[(READ_VREG(MREG_SEQ_INFO) >> 4) & 0xf]);
539	}
540
541	static bool error_skip(struct vdec_mpeg12_hw_s *hw,
542	u32 info, struct vframe_s *vf)
543	{
544	if (hw->error_frame_skip_level) {
545	/* skip error frame */
546	if ((info & PICINFO_ERROR) || (hw->frame_force_skip_flag)) {
547	if ((info & PICINFO_ERROR) == 0) {
548	if ((info & PICINFO_TYPE_MASK) ==
549	PICINFO_TYPE_I)
550	hw->frame_force_skip_flag = 0;
551	} else {
552	if (hw->error_frame_skip_level >= 2)
553	hw->frame_force_skip_flag = 1;
554	}
555	if ((info & PICINFO_ERROR)
556	|| (hw->frame_force_skip_flag))
557	return true;
558	}
559	}
560	return false;
561	}
562
563	static inline void vmpeg12_save_hw_context(struct vdec_mpeg12_hw_s *hw, u32 reg)
564	{
565	if (reg == 3) {
566	hw->ctx_valid = 0;
567	//pr_info("%s, hw->userdata_wp_ctx %d\n", __func__, hw->userdata_wp_ctx);
568	} else {
569	hw->seqinfo = READ_VREG(MREG_SEQ_INFO);
570	hw->reg_pic_width = READ_VREG(MREG_PIC_WIDTH);
571	hw->reg_pic_height = READ_VREG(MREG_PIC_HEIGHT);
572	hw->reg_mpeg1_2_reg = READ_VREG(MPEG1_2_REG);
573	hw->reg_pic_head_info = READ_VREG(PIC_HEAD_INFO);
574	hw->reg_f_code_reg = READ_VREG(F_CODE_REG);
575	hw->reg_slice_ver_pos_pic_type = READ_VREG(SLICE_VER_POS_PIC_TYPE);
576	hw->reg_vcop_ctrl_reg = READ_VREG(VCOP_CTRL_REG);
577	hw->reg_mb_info = READ_VREG(MB_INFO);
578	hw->reg_signal_type = READ_VREG(AV_SCRATCH_H);
579	debug_print(DECODE_ID(hw), PRINT_FLAG_PARA_DATA,
580	"signal_type = %x", hw->reg_signal_type);
581	hw->ctx_valid = 1;
582	}
583	}
584
585	static void vmmpeg2_reset_udr_mgr(struct vdec_mpeg12_hw_s *hw)
586	{
587	hw->wait_for_udr_send = 0;
588	hw->cur_ud_idx = 0;
589	memset(&hw->ud_record, 0, sizeof(hw->ud_record));
590	}
591
592	static void vmmpeg2_crate_userdata_manager(
593	struct vdec_mpeg12_hw_s *hw,
594	u8 *userdata_buf,
595	int buf_len)
596	{
597	if (hw) {
598	mutex_init(&hw->userdata_mutex);
599
600	memset(&hw->userdata_info, 0,
601	sizeof(struct mmpeg2_userdata_info_t));
602	hw->userdata_info.data_buf = userdata_buf;
603	hw->userdata_info.buf_len = buf_len;
604	hw->userdata_info.data_buf_end = userdata_buf + buf_len;
605	hw->userdata_wp_ctx = 0;
606
607	vmmpeg2_reset_udr_mgr(hw);
608	}
609	}
610
611	static void vmmpeg2_destroy_userdata_manager(struct vdec_mpeg12_hw_s *hw)
612	{
613	if (hw)
614	memset(&hw->userdata_info,
615	0,
616	sizeof(struct mmpeg2_userdata_info_t));
617	}
618
619	static void aml_swap_data(uint8_t *user_data, int ud_size)
620	{
621	int swap_blocks, i, j, k, m;
622	unsigned char c_temp;
623
624	/* swap byte order */
625	swap_blocks = ud_size / 8;
626	for (i = 0; i < swap_blocks; i++) {
627	j = i * 8;
628	k = j + 7;
629	for (m = 0; m < 4; m++) {
630	c_temp = user_data[j];
631	user_data[j++] = user_data[k];
632	user_data[k--] = c_temp;
633	}
634	}
635	}
636
637	#ifdef DUMP_USER_DATA
638	static void push_to_buf(struct vdec_mpeg12_hw_s *hw,
639	u8 *pdata,
640	int len,
641	struct userdata_meta_info_t *pmeta,
642	u32 reference)
643	{
644	u32 *pLen;
645	int info_cnt;
646	u8 *pbuf_end;
647
648	if (!hw->user_data_dump_buf)
649	return;
650
651	if (hw->bskip) {
652	pr_info("over size, skip\n");
653	return;
654	}
655	info_cnt = 0;
656	pLen = (u32 *)hw->pdump_buf_cur_start;
657
658	*pLen = len;
659	hw->pdump_buf_cur_start += sizeof(u32);
660	info_cnt++;
661	pLen++;
662
663	*pLen = pmeta->duration;
664	hw->pdump_buf_cur_start += sizeof(u32);
665	info_cnt++;
666	pLen++;
667
668	*pLen = pmeta->flags;
669	hw->pdump_buf_cur_start += sizeof(u32);
670	info_cnt++;
671	pLen++;
672
673	*pLen = pmeta->vpts;
674	hw->pdump_buf_cur_start += sizeof(u32);
675	info_cnt++;
676	pLen++;
677
678	*pLen = pmeta->vpts_valid;
679	hw->pdump_buf_cur_start += sizeof(u32);
680	info_cnt++;
681	pLen++;
682
683
684	*pLen = hw->n_userdata_id;
685	hw->pdump_buf_cur_start += sizeof(u32);
686	info_cnt++;
687	pLen++;
688
689	*pLen = reference;
690	hw->pdump_buf_cur_start += sizeof(u32);
691	info_cnt++;
692	pLen++;
693
694	pbuf_end = hw->userdata_info.data_buf_end;
695	if (pdata + len > pbuf_end) {
696	int first_section_len;
697
698	first_section_len = pbuf_end - pdata;
699	memcpy(hw->pdump_buf_cur_start, pdata, first_section_len);
700	pdata = (u8 *)hw->userdata_info.data_buf;
701	hw->pdump_buf_cur_start += first_section_len;
702	memcpy(hw->pdump_buf_cur_start, pdata, len - first_section_len);
703	hw->pdump_buf_cur_start += len - first_section_len;
704	} else {
705	memcpy(hw->pdump_buf_cur_start, pdata, len);
706	hw->pdump_buf_cur_start += len;
707	}
708
709	hw->total_len += len + info_cnt * sizeof(u32);
710	if (hw->total_len >= MAX_USER_DATA_SIZE-4096)
711	hw->bskip = 1;
712	}
713
714	static void dump_userdata_info(struct vdec_mpeg12_hw_s *hw,
715	void *puser_data,
716	int len,
717	struct userdata_meta_info_t *pmeta,
718	u32 reference)
719	{
720	u8 *pstart;
721
722	pstart = (u8 *)puser_data;
723
724	#ifdef DUMP_HEAD_INFO_DATA
725	push_to_buf(hw, pstart, len, pmeta, reference);
726	#else
727	push_to_buf(hw, pstart+8, len - 8, pmeta, reference);
728	#endif
729	}
730
731
732	static void print_data(unsigned char *pdata,
733	int len,
734	unsigned int flag,
735	unsigned int duration,
736	unsigned int vpts,
737	unsigned int vpts_valid,
738	int rec_id,
739	u32 reference)
740	{
741	int nLeft;
742
743	nLeft = len;
744
745	pr_info("%d len:%d, flag:0x%x, dur:%d, vpts:0x%x, valid:%d, refer:%d\n",
746	rec_id, len, flag,
747	duration, vpts, vpts_valid,
748	reference);
749	while (nLeft >= 16) {
750	pr_info("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
751	pdata[0], pdata[1], pdata[2], pdata[3],
752	pdata[4], pdata[5], pdata[6], pdata[7],
753	pdata[8], pdata[9], pdata[10], pdata[11],
754	pdata[12], pdata[13], pdata[14], pdata[15]);
755	nLeft -= 16;
756	pdata += 16;
757	}
758
759
760	while (nLeft > 0) {
761	pr_info("%02x %02x %02x %02x %02x %02x %02x %02x\n",
762	pdata[0], pdata[1], pdata[2], pdata[3],
763	pdata[4], pdata[5], pdata[6], pdata[7]);
764	nLeft -= 8;
765	pdata += 8;
766	}
767	}
768
769	static void dump_data(u8 *pdata,
770	unsigned int user_data_length,
771	unsigned int flag,
772	unsigned int duration,
773	unsigned int vpts,
774	unsigned int vpts_valid,
775	int rec_id,
776	u32 reference)
777	{
778	unsigned char szBuf[256];
779
780
781	memset(szBuf, 0, 256);
782	memcpy(szBuf, pdata, user_data_length);
783
784	aml_swap_data(szBuf, user_data_length);
785
786	print_data(szBuf,
787	user_data_length,
788	flag,
789	duration,
790	vpts,
791	vpts_valid,
792	rec_id,
793	reference);
794	}
795
796
797	static void show_user_data_buf(struct vdec_mpeg12_hw_s *hw)
798	{
799	u8 *pbuf;
800	int len;
801	unsigned int flag;
802	unsigned int duration;
803	unsigned int vpts;
804	unsigned int vpts_valid;
805	int rec_id;
806	u32 reference;
807
808	pr_info("show user data buf\n");
809	pbuf = hw->user_data_dump_buf;
810
811	while (pbuf < hw->pdump_buf_cur_start) {
812	u32 *pLen;
813
814	pLen = (u32 *)pbuf;
815
816	len = *pLen;
817	pLen++;
818	pbuf += sizeof(u32);
819
820	duration = *pLen;
821	pLen++;
822	pbuf += sizeof(u32);
823
824	flag = *pLen;
825	pLen++;
826	pbuf += sizeof(u32);
827
828	vpts = *pLen;
829	pLen++;
830	pbuf += sizeof(u32);
831
832	vpts_valid = *pLen;
833	pLen++;
834	pbuf += sizeof(u32);
835
836	rec_id = *pLen;
837	pLen++;
838	pbuf += sizeof(u32);
839
840	reference = *pLen;
841	pLen++;
842	pbuf += sizeof(u32);
843
844
845	dump_data(pbuf, len, flag, duration,
846	vpts, vpts_valid, rec_id, reference);
847	pbuf += len;
848	msleep(30);
849	}
850	}
851
852	static int amvdec_mmpeg12_init_userdata_dump(struct vdec_mpeg12_hw_s *hw)
853	{
854	hw->user_data_dump_buf = kmalloc(MAX_USER_DATA_SIZE, GFP_KERNEL);
855	if (hw->user_data_dump_buf)
856	return 1;
857	else
858	return 0;
859	}
860
861	static void amvdec_mmpeg12_uninit_userdata_dump(struct vdec_mpeg12_hw_s *hw)
862	{
863	if (hw->user_data_dump_buf) {
864	show_user_data_buf(hw);
865	kfree(hw->user_data_dump_buf);
866	hw->user_data_dump_buf = NULL;
867	}
868	}
869
870	static void reset_user_data_buf(struct vdec_mpeg12_hw_s *hw)
871	{
872	hw->total_len = 0;
873	hw->pdump_buf_cur_start = hw->user_data_dump_buf;
874	hw->bskip = 0;
875	hw->n_userdata_id = 0;
876	}
877	#endif
878
879	static void user_data_ready_notify(struct vdec_mpeg12_hw_s *hw,
880	u32 pts, u32 pts_valid)
881	{
882	struct mmpeg2_userdata_record_t *p_userdata_rec;
883	int i;
884
885	if (hw->wait_for_udr_send) {
886	for (i = 0; i < hw->cur_ud_idx; i++) {
887	mutex_lock(&hw->userdata_mutex);
888
889
890	p_userdata_rec = hw->userdata_info.records
891	+ hw->userdata_info.write_index;
892
893	hw->ud_record[i].meta_info.vpts_valid = pts_valid;
894	hw->ud_record[i].meta_info.vpts = pts;
895
896	*p_userdata_rec = hw->ud_record[i];
897	#ifdef DUMP_USER_DATA
898	dump_userdata_info(hw,
899	hw->userdata_info.data_buf + p_userdata_rec->rec_start,
900	p_userdata_rec->rec_len,
901	&p_userdata_rec->meta_info,
902	hw->reference[i]);
903	hw->n_userdata_id++;
904	#endif
905	/*
906	pr_info("notify: rec_start:%d, rec_len:%d, wi:%d, reference:%d\n",
907	p_userdata_rec->rec_start,
908	p_userdata_rec->rec_len,
909	hw->userdata_info.write_index,
910	hw->reference[i]);
911	*/
912	hw->userdata_info.write_index++;
913	if (hw->userdata_info.write_index >= USERDATA_FIFO_NUM)
914	hw->userdata_info.write_index = 0;
915
916	mutex_unlock(&hw->userdata_mutex);
917
918
919	vdec_wakeup_userdata_poll(hw_to_vdec(hw));
920	}
921	hw->wait_for_udr_send = 0;
922	hw->cur_ud_idx = 0;
923	}
924	hw->notify_ucode_cc_last_wp = hw->ucode_cc_last_wp;
925	hw->notify_data_cc_last_wp = hw->userdata_info.last_wp;
926	}
927
928	static int vmmpeg2_user_data_read(struct vdec_s *vdec,
929	struct userdata_param_t *puserdata_para)
930	{
931	struct vdec_mpeg12_hw_s *hw = NULL;
932	int rec_ri, rec_wi;
933	int rec_len;
934	u8 *rec_data_start;
935	u8 *pdest_buf;
936	struct mmpeg2_userdata_record_t *p_userdata_rec;
937	u32 data_size;
938	u32 res;
939	int copy_ok = 1;
940
941	hw = (struct vdec_mpeg12_hw_s *)vdec->private;
942
943	pdest_buf = puserdata_para->pbuf_addr;
944
945	mutex_lock(&hw->userdata_mutex);
946
947	/*
948	pr_info("ri = %d, wi = %d\n",
949	hw->userdata_info.read_index,
950	hw->userdata_info.write_index);
951	*/
952	rec_ri = hw->userdata_info.read_index;
953	rec_wi = hw->userdata_info.write_index;
954
955	if (rec_ri == rec_wi) {
956	mutex_unlock(&hw->userdata_mutex);
957	return 0;
958	}
959
960	p_userdata_rec = hw->userdata_info.records + rec_ri;
961
962	rec_len = p_userdata_rec->rec_len;
963	rec_data_start = p_userdata_rec->rec_start + hw->userdata_info.data_buf;
964	/*
965	pr_info("ri:%d, wi:%d, rec_len:%d, rec_start:%d, buf_len:%d\n",
966	rec_ri, rec_wi,
967	p_userdata_rec->rec_len,
968	p_userdata_rec->rec_start,
969	puserdata_para->buf_len);
970	*/
971	if (rec_len <= puserdata_para->buf_len) {
972	/* dvb user data buffer is enought to
973	copy the whole recored. */
974	data_size = rec_len;
975	if (rec_data_start + data_size
976	> hw->userdata_info.data_buf_end) {
977	int first_section_len;
978
979	first_section_len = hw->userdata_info.buf_len -
980	p_userdata_rec->rec_start;
981	res = (u32)copy_to_user((void *)pdest_buf,
982	(void *)rec_data_start,
983	first_section_len);
984	if (res) {
985	pr_info("p1 read not end res=%d, request=%d\n",
986	res, first_section_len);
987	copy_ok = 0;
988
989	p_userdata_rec->rec_len -=
990	first_section_len - res;
991	p_userdata_rec->rec_start +=
992	first_section_len - res;
993	puserdata_para->data_size =
994	first_section_len - res;
995	} else {
996	res = (u32)copy_to_user(
997	(void *)(pdest_buf+first_section_len),
998	(void *)hw->userdata_info.data_buf,
999	data_size - first_section_len);
1000	if (res) {
1001	pr_info("p2 read not end res=%d, request=%d\n",
1002	res, data_size);
1003	copy_ok = 0;
1004	}
1005	p_userdata_rec->rec_len -=
1006	data_size - res;
1007	p_userdata_rec->rec_start =
1008	data_size - first_section_len - res;
1009	puserdata_para->data_size =
1010	data_size - res;
1011	}
1012	} else {
1013	res = (u32)copy_to_user((void *)pdest_buf,
1014	(void *)rec_data_start,
1015	data_size);
1016	if (res) {
1017	pr_info("p3 read not end res=%d, request=%d\n",
1018	res, data_size);
1019	copy_ok = 0;
1020	}
1021	p_userdata_rec->rec_len -= data_size - res;
1022	p_userdata_rec->rec_start += data_size - res;
1023	puserdata_para->data_size = data_size - res;
1024	}
1025
1026	if (copy_ok) {
1027	hw->userdata_info.read_index++;
1028	if (hw->userdata_info.read_index >= USERDATA_FIFO_NUM)
1029	hw->userdata_info.read_index = 0;
1030	}
1031	} else {
1032	/* dvb user data buffer is not enought
1033	to copy the whole recored. */
1034	data_size = puserdata_para->buf_len;
1035	if (rec_data_start + data_size
1036	> hw->userdata_info.data_buf_end) {
1037	int first_section_len;
1038
1039	first_section_len = hw->userdata_info.buf_len -
1040	p_userdata_rec->rec_start;
1041	res = (u32)copy_to_user((void *)pdest_buf,
1042	(void *)rec_data_start,
1043	first_section_len);
1044	if (res) {
1045	pr_info("p4 read not end res=%d, request=%d\n",
1046	res, first_section_len);
1047	copy_ok = 0;
1048	p_userdata_rec->rec_len -=
1049	first_section_len - res;
1050	p_userdata_rec->rec_start +=
1051	first_section_len - res;
1052	puserdata_para->data_size =
1053	first_section_len - res;
1054	} else {
1055	/* first secton copy is ok*/
1056	res = (u32)copy_to_user(
1057	(void *)(pdest_buf+first_section_len),
1058	(void *)hw->userdata_info.data_buf,
1059	data_size - first_section_len);
1060	if (res) {
1061	pr_info("p5 read not end res=%d, request=%d\n",
1062	res,
1063	data_size - first_section_len);
1064	copy_ok = 0;
1065	}
1066
1067	p_userdata_rec->rec_len -=
1068	data_size - res;
1069	p_userdata_rec->rec_start =
1070	data_size - first_section_len - res;
1071	puserdata_para->data_size =
1072	data_size - res;
1073	}
1074	} else {
1075	res = (u32)copy_to_user((void *)pdest_buf,
1076	(void *)rec_data_start,
1077	data_size);
1078	if (res) {
1079	pr_info("p6 read not end res=%d, request=%d\n",
1080	res, data_size);
1081	copy_ok = 0;
1082	}
1083
1084	p_userdata_rec->rec_len -= data_size - res;
1085	p_userdata_rec->rec_start += data_size - res;
1086	puserdata_para->data_size = data_size - res;
1087	}
1088
1089	if (copy_ok) {
1090	hw->userdata_info.read_index++;
1091	if (hw->userdata_info.read_index >= USERDATA_FIFO_NUM)
1092	hw->userdata_info.read_index = 0;
1093	}
1094
1095	}
1096	puserdata_para->meta_info = p_userdata_rec->meta_info;
1097
1098	if (hw->userdata_info.read_index <= hw->userdata_info.write_index)
1099	puserdata_para->meta_info.records_in_que =
1100	hw->userdata_info.write_index -
1101	hw->userdata_info.read_index;
1102	else
1103	puserdata_para->meta_info.records_in_que =
1104	hw->userdata_info.write_index +
1105	USERDATA_FIFO_NUM -
1106	hw->userdata_info.read_index;
1107
1108	puserdata_para->version = (0<<24|0<<16|0<<8|1);
1109
1110	mutex_unlock(&hw->userdata_mutex);
1111
1112
1113	return 1;
1114	}
1115
1116	static void vmmpeg2_reset_userdata_fifo(struct vdec_s *vdec, int bInit)
1117	{
1118	struct vdec_mpeg12_hw_s *hw = NULL;
1119
1120	hw = (struct vdec_mpeg12_hw_s *)vdec->private;
1121
1122	if (hw) {
1123	mutex_lock(&hw->userdata_mutex);
1124	pr_info("vmh264_reset_userdata_fifo: bInit: %d, ri: %d, wi: %d\n",
1125	bInit,
1126	hw->userdata_info.read_index,
1127	hw->userdata_info.write_index);
1128	hw->userdata_info.read_index = 0;
1129	hw->userdata_info.write_index = 0;
1130
1131	if (bInit)
1132	hw->userdata_info.last_wp = 0;
1133	mutex_unlock(&hw->userdata_mutex);
1134	}
1135	}
1136
1137	static void vmmpeg2_wakeup_userdata_poll(struct vdec_s *vdec)
1138	{
1139	amstream_wakeup_userdata_poll(vdec);
1140	}
1141
1142	/*
1143	#define PRINT_HEAD_INFO
1144	*/
1145	static void userdata_push_do_work(struct work_struct *work)
1146	{
1147	u32 reg;
1148	u8 *pdata;
1149	u8 *psrc_data;
1150	u8 head_info[8];
1151	struct userdata_meta_info_t meta_info;
1152	u32 wp;
1153	u32 index;
1154	u32 picture_struct;
1155	u32 reference;
1156	u32 picture_type;
1157	u32 temp;
1158	u32 data_length;
1159	u32 data_start;
1160	int i;
1161	u32 offset;
1162	u32 cur_wp;
1163	#ifdef PRINT_HEAD_INFO
1164	u8 *ptype_str;
1165	#endif
1166	struct mmpeg2_userdata_record_t *pcur_ud_rec;
1167
1168	struct vdec_mpeg12_hw_s *hw = container_of(work,
1169	struct vdec_mpeg12_hw_s, userdata_push_work);
1170
1171	memset(&meta_info, 0, sizeof(meta_info));
1172
1173	meta_info.duration = hw->frame_dur;
1174
1175
1176	reg = READ_VREG(AV_SCRATCH_J);
1177	hw->userdata_wp_ctx = reg;
1178	meta_info.flags = ((reg >> 30) << 1);
1179	meta_info.flags |= (VFORMAT_MPEG12 << 3);
1180	/* check top_field_first flag */
1181	if ((reg >> 28) & 0x1) {
1182	meta_info.flags |= (1 << 10);
1183	meta_info.flags |= (((reg >> 29) & 0x1) << 11);
1184	}
1185
1186	cur_wp = reg & 0x7fff;
1187	if (cur_wp == hw->ucode_cc_last_wp) {
1188	debug_print(DECODE_ID(hw), 0,
1189	"Null user data package: wp = %d\n", cur_wp);
1190	WRITE_VREG(AV_SCRATCH_J, 0);
1191	return;
1192	}
1193
1194	if (hw->cur_ud_idx >= MAX_UD_RECORDS) {
1195	debug_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL,
1196	"UD Records over: %d, skip it\n", MAX_UD_RECORDS);
1197	WRITE_VREG(AV_SCRATCH_J, 0);
1198	hw->cur_ud_idx = 0;
1199	return;
1200	}
1201
1202	if (cur_wp < hw->ucode_cc_last_wp)
1203	hw->ucode_cc_last_wp = 0;
1204
1205	offset = READ_VREG(AV_SCRATCH_I);
1206
1207	codec_mm_dma_flush(
1208	hw->ccbuf_phyAddress_virt,
1209	CCBUF_SIZE,
1210	DMA_FROM_DEVICE);
1211
1212	mutex_lock(&hw->userdata_mutex);
1213	if (hw->ccbuf_phyAddress_virt) {
1214	pdata = (u8 *)hw->ccbuf_phyAddress_virt + hw->ucode_cc_last_wp;
1215	memcpy(head_info, pdata, 8);
1216	} else
1217	memset(head_info, 0, 8);
1218	mutex_unlock(&hw->userdata_mutex);
1219	aml_swap_data(head_info, 8);
1220
1221	wp = (head_info[0] << 8 | head_info[1]);
1222	index = (head_info[2] << 8 | head_info[3]);
1223
1224	picture_struct = (head_info[6] << 8 | head_info[7]);
1225	temp = (head_info[4] << 8 | head_info[5]);
1226	reference = temp & 0x3FF;
1227	picture_type = (temp >> 10) & 0x7;
1228
1229	if (debug_enable & PRINT_FLAG_USERDATA_DETAIL)
1230	pr_info("index:%d, wp:%d, ref:%d, type:%d, struct:0x%x, u_last_wp:0x%x\n",
1231	index, wp, reference,
1232	picture_type, picture_struct,
1233	hw->ucode_cc_last_wp);
1234
1235	switch (picture_type) {
1236	case 1:
1237	/* pr_info("I type, pos:%d\n",
1238	(meta_info.flags>>1)&0x3); */
1239	meta_info.flags |= (1<<7);
1240	#ifdef PRINT_HEAD_INFO
1241	ptype_str = " I";
1242	#endif
1243	break;
1244	case 2:
1245	/* pr_info("P type, pos:%d\n",
1246	(meta_info.flags>>1)&0x3); */
1247	meta_info.flags |= (2<<7);
1248	#ifdef PRINT_HEAD_INFO
1249	ptype_str = " P";
1250	#endif
1251	break;
1252	case 3:
1253	/* pr_info("B type, pos:%d\n",
1254	(meta_info.flags>>1)&0x3); */
1255	meta_info.flags |= (3<<7);
1256	#ifdef PRINT_HEAD_INFO
1257	ptype_str = " B";
1258	#endif
1259	break;
1260	case 4:
1261	/* pr_info("D type, pos:%d\n",
1262	(meta_info.flags>>1)&0x3); */
1263	meta_info.flags |= (4<<7);
1264	#ifdef PRINT_HEAD_INFO
1265	ptype_str = " D";
1266	#endif
1267	break;
1268	default:
1269	/* pr_info("Unknown type:0x%x, pos:%d\n",
1270	pheader->picture_coding_type,
1271	(meta_info.flags>>1)&0x3); */
1272	#ifdef PRINT_HEAD_INFO
1273	ptype_str = " U";
1274	#endif
1275	break;
1276	}
1277	#ifdef PRINT_HEAD_INFO
1278	pr_info("ref:%d, type:%s, ext:%d, first:%d, data_length:%d\n",
1279	reference, ptype_str,
1280	(reg >> 30),
1281	(reg >> 28)&0x3,
1282	reg & 0xffff);
1283	#endif
1284	data_length = cur_wp - hw->ucode_cc_last_wp;
1285	data_start = reg & 0xffff;
1286	psrc_data = (u8 *)hw->ccbuf_phyAddress_virt + hw->ucode_cc_last_wp;
1287
1288	pdata = hw->userdata_info.data_buf + hw->userdata_info.last_wp;
1289	for (i = 0; i < data_length; i++) {
1290	*pdata++ = *psrc_data++;
1291	if (pdata >= hw->userdata_info.data_buf_end)
1292	pdata = hw->userdata_info.data_buf;
1293	}
1294	pcur_ud_rec = hw->ud_record + hw->cur_ud_idx;
1295
1296	pcur_ud_rec->meta_info = meta_info;
1297	pcur_ud_rec->rec_start = hw->userdata_info.last_wp;
1298	pcur_ud_rec->rec_len = data_length;
1299
1300	hw->userdata_info.last_wp += data_length;
1301	if (hw->userdata_info.last_wp >= USER_DATA_SIZE)
1302	hw->userdata_info.last_wp -= USER_DATA_SIZE;
1303
1304	hw->wait_for_udr_send = 1;
1305
1306	hw->ucode_cc_last_wp = cur_wp;
1307
1308	if (debug_enable & PRINT_FLAG_USERDATA_DETAIL)
1309	pr_info("cur_wp:%d, rec_start:%d, rec_len:%d\n",
1310	cur_wp,
1311	pcur_ud_rec->rec_start,
1312	pcur_ud_rec->rec_len);
1313
1314	#ifdef DUMP_USER_DATA
1315	hw->reference[hw->cur_ud_idx] = reference;
1316	#endif
1317
1318	hw->cur_ud_idx++;
1319	WRITE_VREG(AV_SCRATCH_J, 0);
1320
1321	}
1322
1323
1324	void userdata_pushed_drop(struct vdec_mpeg12_hw_s *hw)
1325	{
1326	hw->userdata_info.last_wp = hw->notify_data_cc_last_wp;
1327	hw->ucode_cc_last_wp = hw->notify_ucode_cc_last_wp;
1328	hw->cur_ud_idx = 0;
1329	hw->wait_for_udr_send = 0;
1330
1331	}
1332
1333
1334	static int prepare_display_buf(struct vdec_mpeg12_hw_s *hw,
1335	struct pic_info_t *pic)
1336	{
1337	u32 field_num = 0, i;
1338	u32 first_field_type = 0, type = 0;
1339	struct vframe_s *vf = NULL;
1340	u32 index = pic->index;
1341	u32 info = pic->buffer_info;
1342	struct vdec_s *vdec = hw_to_vdec(hw);
1343
1344	if (hw == NULL || pic == NULL)
1345	return -1;
1346
1347	user_data_ready_notify(hw, pic->pts, pic->pts_valid);
1348	#ifdef NV21
1349	type = VIDTYPE_VIU_NV21;
1350	#endif
1351
1352	if (hw->frame_prog & PICINFO_PROG) {
1353	field_num = 1;
1354	type |= VIDTYPE_PROGRESSIVE | VIDTYPE_VIU_FIELD;
1355	} else {
1356	#ifdef INTERLACE_SEQ_ALWAYS
1357	/* once an interlace seq, force interlace, to make di easy. */
1358	hw->dec_control |= DEC_CONTROL_FLAG_FORCE_SEQ_INTERLACE;
1359	#endif
1360	hw->frame_rpt_state = FRAME_REPEAT_NONE;
1361
1362	first_field_type = (info & PICINFO_TOP_FIRST) ?
1363	VIDTYPE_INTERLACE_TOP : VIDTYPE_INTERLACE_BOTTOM;
1364	field_num = (info & PICINFO_RPT_FIRST) ? 3 : 2;
1365	}
1366
1367	for (i = 0; i < field_num; i++) {
1368	if (kfifo_get(&hw->newframe_q, &vf) == 0) {
1369	debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1370	"fatal error, no available buffer slot.");
1371	hw->dec_result = DEC_RESULT_ERROR;
1372	vdec_schedule_work(&hw->work);
1373	return -1;
1374	}
1375
1376	if (hw->is_used_v4l) {
1377	vf->v4l_mem_handle
1378	= hw->pics[index].v4l_ref_buf_addr;
1379	if (vdec_v4l_binding_fd_and_vf(vf->v4l_mem_handle, vf) < 0) {
1380	debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL,
1381	"v4l: binding vf fail.\n");
1382	return -1;
1383	}
1384	debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL,
1385	"[%d] %s(), v4l mem handle: 0x%lx\n",
1386	((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id,
1387	__func__, vf->v4l_mem_handle);
1388	}
1389
1390	hw->vfbuf_use[index]++;
1391	vf->index = index;
1392	set_frame_info(hw, vf);
1393	if (field_num > 1) {
1394	vf->duration = vf->duration / field_num;
1395	vf->duration_pulldown = (field_num == 3) ?
1396	(vf->duration >> 1):0;
1397	if (i > 0)
1398	type = VIDTYPE_VIU_NV21;
1399	if (i == 1) /* second field*/
1400	type |= (first_field_type == VIDTYPE_INTERLACE_TOP) ?
1401	VIDTYPE_INTERLACE_BOTTOM : VIDTYPE_INTERLACE_TOP;
1402	else
1403	type |= (first_field_type == VIDTYPE_INTERLACE_TOP) ?
1404	VIDTYPE_INTERLACE_TOP : VIDTYPE_INTERLACE_BOTTOM;
1405	} else {
1406	if ((hw->seqinfo & SEQINFO_EXT_AVAILABLE) &&
1407	(hw->seqinfo & SEQINFO_PROG)) {
1408	if (info & PICINFO_RPT_FIRST) {
1409	if (info & PICINFO_TOP_FIRST)
1410	vf->duration *= 3;
1411	else
1412	vf->duration *= 2;
1413	}
1414	vf->duration_pulldown = 0;
1415	} else {
1416	vf->duration_pulldown =
1417	(info & PICINFO_RPT_FIRST) ?
1418	vf->duration >> 1 : 0;
1419	}
1420	}
1421	vf->duration += vf->duration_pulldown;
1422	vf->type = type;
1423	vf->signal_type = hw->reg_signal_type;
1424	vf->orientation = 0;
1425	if (i > 0) {
1426	vf->pts = 0;
1427	vf->pts_us64 = 0;
1428	} else {
1429	vf->pts = (pic->pts_valid) ? pic->pts : 0;
1430	vf->pts_us64 = (pic->pts_valid) ? pic->pts64 : 0;
1431	}
1432	vf->type_original = vf->type;
1433
1434	if ((error_skip(hw, pic->buffer_info, vf)) ||
1435	((hw->first_i_frame_ready == 0) &&
1436	((PICINFO_TYPE_MASK & pic->buffer_info) !=
1437	PICINFO_TYPE_I))) {
1438	hw->drop_frame_count++;
1439	hw->vfbuf_use[index]--;
1440	kfifo_put(&hw->newframe_q,
1441	(const struct vframe_s *)vf);
1442	} else {
1443	debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1444	"%s, num: %d(%c), i: %d, pts: %d(%lld), dur: %d, type: %x\n",
1445	__func__, hw->disp_num, GET_SLICE_TYPE(info), i,
1446	vf->pts, vf->pts_us64, vf->duration, vf->type);
1447	hw->disp_num++;
1448	if (i == 0)
1449	decoder_do_frame_check(hw_to_vdec(hw), vf);
1450	vdec->vdec_fps_detec(vdec->id);
1451	vf->mem_handle =
1452	decoder_bmmu_box_get_mem_handle(
1453	hw->mm_blk_handle, index);
1454	kfifo_put(&hw->display_q,
1455	(const struct vframe_s *)vf);
1456	if (without_display_mode == 0) {
1457	vf_notify_receiver(vdec->vf_provider_name,
1458	VFRAME_EVENT_PROVIDER_VFRAME_READY,
1459	NULL);
1460	} else
1461	vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
1462
1463
1464	}
1465	}
1466	return 0;
1467	}
1468
1469	static void force_interlace_check(struct vdec_mpeg12_hw_s *hw)
1470	{
1471	if ((hw->dec_control &
1472	DEC_CONTROL_FLAG_FORCE_2500_720_576_INTERLACE) &&
1473	(hw->frame_width == 720) &&
1474	(hw->frame_height == 576) &&
1475	(hw->frame_dur == 3840)) {
1476	hw->frame_prog = 0;
1477	} else if ((hw->dec_control
1478	& DEC_CONTROL_FLAG_FORCE_3000_704_480_INTERLACE) &&
1479	(hw->frame_width == 704) &&
1480	(hw->frame_height == 480) &&
1481	(hw->frame_dur == 3200)) {
1482	hw->frame_prog = 0;
1483	} else if ((hw->dec_control
1484	& DEC_CONTROL_FLAG_FORCE_2500_704_576_INTERLACE) &&
1485	(hw->frame_width == 704) &&
1486	(hw->frame_height == 576) &&
1487	(hw->frame_dur == 3840)) {
1488	hw->frame_prog = 0;
1489	} else if ((hw->dec_control
1490	& DEC_CONTROL_FLAG_FORCE_2500_544_576_INTERLACE) &&
1491	(hw->frame_width == 544) &&
1492	(hw->frame_height == 576) &&
1493	(hw->frame_dur == 3840)) {
1494	hw->frame_prog = 0;
1495	} else if ((hw->dec_control
1496	& DEC_CONTROL_FLAG_FORCE_2500_480_576_INTERLACE) &&
1497	(hw->frame_width == 480) &&
1498	(hw->frame_height == 576) &&
1499	(hw->frame_dur == 3840)) {
1500	hw->frame_prog = 0;
1501	} else if (hw->dec_control
1502	& DEC_CONTROL_FLAG_FORCE_SEQ_INTERLACE) {
1503	hw->frame_prog = 0;
1504	}
1505
1506	}
1507
1508	static int update_reference(struct vdec_mpeg12_hw_s *hw,
1509	int index)
1510	{
1511	hw->vfbuf_use[index]++;
1512	if (hw->refs[1] == -1) {
1513	hw->refs[1] = index;
1514	/*
1515	* first pic need output to show
1516	* usecnt do not decrease.
1517	*/
1518	} else if (hw->refs[0] == -1) {
1519	hw->refs[0] = hw->refs[1];
1520	hw->refs[1] = index;
1521	/* second pic do not output */
1522	index = DECODE_BUFFER_NUM_MAX;
1523	} else {
1524	hw->vfbuf_use[hw->refs[0]]--;
1525	hw->refs[0] = hw->refs[1];
1526	hw->refs[1] = index;
1527	index = hw->refs[0];
1528	}
1529	return index;
1530	}
1531
1532	static bool is_ref_error(struct vdec_mpeg12_hw_s *hw)
1533	{
1534	if ((hw->pics[hw->refs[0]].buffer_info & PICINFO_ERROR) ||
1535	(hw->pics[hw->refs[1]].buffer_info & PICINFO_ERROR))
1536	return 1;
1537	return 0;
1538	}
1539
1540
1541	static irqreturn_t vmpeg12_isr_thread_fn(struct vdec_s *vdec, int irq)
1542	{
1543	u32 reg, index, info, seqinfo, offset, pts, frame_size, tmp;
1544	u64 pts_us64 = 0;
1545	struct pic_info_t *new_pic, *disp_pic;
1546	struct vdec_mpeg12_hw_s *hw =
1547	(struct vdec_mpeg12_hw_s *)(vdec->private);
1548
1549	if (READ_VREG(AV_SCRATCH_M) != 0 &&
1550	(debug_enable & PRINT_FLAG_UCODE_DETAIL)) {
1551
1552	debug_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL,
1553	"dbg %x: %x, level %x, wp %x, rp %x, cnt %x\n",
1554	READ_VREG(AV_SCRATCH_M), READ_VREG(AV_SCRATCH_N),
1555	READ_VREG(VLD_MEM_VIFIFO_LEVEL),
1556	READ_VREG(VLD_MEM_VIFIFO_WP),
1557	READ_VREG(VLD_MEM_VIFIFO_RP),
1558	READ_VREG(VIFF_BIT_CNT));
1559	WRITE_VREG(AV_SCRATCH_M, 0);
1560	return IRQ_HANDLED;
1561	}
1562
1563	reg = READ_VREG(AV_SCRATCH_J);
1564	if (reg & (1<<16)) {
1565	vdec_schedule_work(&hw->userdata_push_work);
1566	return IRQ_HANDLED;
1567	}
1568
1569	reg = READ_VREG(MREG_BUFFEROUT);
1570	if (reg == 2) {
1571	/*timeout when decoding next frame*/
1572	debug_print(DECODE_ID(hw), PRINT_FLAG_VLD_DETAIL,
1573	"mmpeg12: lack data, lvl=%x ctrl=%x bcnt=%x\n",
1574	READ_VREG(VLD_MEM_VIFIFO_LEVEL),
1575	READ_VREG(VLD_MEM_VIFIFO_CONTROL),
1576	READ_VREG(VIFF_BIT_CNT));
1577
1578	if (vdec_frame_based(vdec)) {
1579	/* vmpeg12_save_hw_context(hw); */
1580	reset_process_time(hw);
1581	hw->dec_result = DEC_RESULT_DONE;
1582	vdec_schedule_work(&hw->work);
1583	} else {
1584	hw->dec_result = DEC_RESULT_AGAIN;
1585	vdec_schedule_work(&hw->work);
1586	userdata_pushed_drop(hw);
1587	reset_process_time(hw);
1588	}
1589	return IRQ_HANDLED;
1590	} else {
1591	reset_process_time(hw);
1592
1593	info = READ_VREG(MREG_PIC_INFO);
1594	offset = READ_VREG(MREG_FRAME_OFFSET);
1595	index = spec_to_index(hw, READ_VREG(REC_CANVAS_ADDR));
1596	seqinfo = READ_VREG(MREG_SEQ_INFO);
1597
1598	if ((info & PICINFO_PROG) == 0 &&
1599	(info & FRAME_PICTURE_MASK) != FRAME_PICTURE)
1600	hw->first_i_frame_ready = 1; /* for field struct case*/
1601
1602	if (index >= DECODE_BUFFER_NUM_MAX) {
1603	debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1604	"mmpeg12: invalid buf index: %d\n", index);
1605	hw->dec_result = DEC_RESULT_ERROR;
1606	vdec_schedule_work(&hw->work);
1607	return IRQ_HANDLED;
1608	}
1609	hw->dec_num++;
1610	hw->dec_result = DEC_RESULT_DONE;
1611	new_pic = &hw->pics[index];
1612	tmp = READ_VREG(MREG_PIC_WIDTH);
1613	if ((tmp > 1920) || (tmp == 0)) {
1614	new_pic->width = 1920;
1615	hw->frame_width = 1920;
1616	} else {
1617	new_pic->width = tmp;
1618	hw->frame_width = tmp;
1619	}
1620
1621	tmp = READ_VREG(MREG_PIC_HEIGHT);
1622	if ((tmp > 1088) || (tmp == 0)) {
1623	new_pic->height = 1088;
1624	hw->frame_height = 1088;
1625	} else {
1626	new_pic->height = tmp;
1627	hw->frame_height = tmp;
1628	}
1629
1630	if (hw->is_used_v4l) {
1631	struct aml_vcodec_ctx *ctx =
1632	(struct aml_vcodec_ctx *)(hw->v4l2_ctx);
1633
1634	if (ctx->param_sets_from_ucode && !hw->v4l_params_parsed) {
1635	struct aml_vdec_pic_infos info;
1636
1637	info.visible_width = hw->frame_width;
1638	info.visible_height = hw->frame_height;
1639	info.coded_width = ALIGN(hw->frame_width, 64);
1640	info.coded_height = ALIGN(hw->frame_height, 64);
1641	info.dpb_size = MAX_BMMU_BUFFER_NUM - 1;
1642	hw->v4l_params_parsed = true;
1643	vdec_v4l_set_pic_infos(ctx, &info);
1644	}
1645
1646	if (!ctx->v4l_codec_ready)
1647	return IRQ_HANDLED;
1648	}
1649
1650	new_pic->buffer_info = info;
1651	new_pic->offset = offset;
1652	new_pic->index = index;
1653	if (((info & PICINFO_TYPE_MASK) == PICINFO_TYPE_I) ||
1654	((info & PICINFO_TYPE_MASK) == PICINFO_TYPE_P)) {
1655	if (hw->chunk) {
1656	new_pic->pts_valid = hw->chunk->pts_valid;
1657	new_pic->pts = hw->chunk->pts;
1658	new_pic->pts64 = hw->chunk->pts64;
1659	if (hw->last_chunk_pts == hw->chunk->pts) {
1660	new_pic->pts_valid = 0;
1661	debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1662	"pts invalid\n");
1663	}
1664	} else {
1665	if (pts_lookup_offset_us64(PTS_TYPE_VIDEO, offset,
1666	&pts, &frame_size, 0, &pts_us64) == 0) {
1667	new_pic->pts_valid = true;
1668	new_pic->pts = pts;
1669	new_pic->pts64 = pts_us64;
1670	} else
1671	new_pic->pts_valid = false;
1672	}
1673	} else {
1674	if (hw->chunk)
1675	hw->last_chunk_pts = hw->chunk->pts;
1676	new_pic->pts_valid = false;
1677	}
1678
1679	debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1680	"mmpeg12: new_pic=%d, ind=%d, info=%x, seq=%x, offset=%d\n",
1681	hw->dec_num, index, info, seqinfo, offset);
1682
1683	hw->frame_prog = info & PICINFO_PROG;
1684	if ((seqinfo & SEQINFO_EXT_AVAILABLE) &&
1685	((seqinfo & SEQINFO_PROG) == 0))
1686	hw->frame_prog = 0;
1687	force_interlace_check(hw);
1688
1689	if (is_ref_error(hw)) {
1690	if ((info & PICINFO_TYPE_MASK) == PICINFO_TYPE_B)
1691	new_pic->buffer_info |= PICINFO_ERROR;
1692	}
1693
1694	if (((info & PICINFO_TYPE_MASK) == PICINFO_TYPE_I) ||
1695	((info & PICINFO_TYPE_MASK) == PICINFO_TYPE_P)) {
1696	index = update_reference(hw, index);
1697	} else {
1698	/* drop b frame before reference pic ready */
1699	if (hw->refs[0] == -1)
1700	index = DECODE_BUFFER_NUM_MAX;
1701	}
1702	vmpeg12_save_hw_context(hw, reg);
1703
1704	if (index >= DECODE_BUFFER_NUM_MAX) {
1705	if (hw->dec_num != 2) {
1706	debug_print(DECODE_ID(hw), 0,
1707	"mmpeg12: drop pic num %d, type %c, index %d, offset %x\n",
1708	hw->dec_num, GET_SLICE_TYPE(info), index, offset);
1709	hw->dec_result = DEC_RESULT_ERROR;
1710	}
1711	vdec_schedule_work(&hw->work);
1712	return IRQ_HANDLED;
1713	}
1714
1715	disp_pic = &hw->pics[index];
1716	info = hw->pics[index].buffer_info;
1717	if (disp_pic->pts_valid && hw->lastpts64 == disp_pic->pts64)
1718	disp_pic->pts_valid = false;
1719	if (disp_pic->pts_valid)
1720	hw->lastpts64 = disp_pic->pts64;
1721
1722	if ((hw->first_i_frame_ready == 0) &&
1723	((info & PICINFO_TYPE_MASK) == PICINFO_TYPE_I) &&
1724	((info & PICINFO_ERROR) == 0))
1725	hw->first_i_frame_ready = 1;
1726
1727	debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1728	"mmpeg12: disp_pic=%d(%c), ind=%d, offst=%x, pts=(%d,%lld)(%d)\n",
1729	hw->disp_num, GET_SLICE_TYPE(info), index, disp_pic->offset,
1730	disp_pic->pts, disp_pic->pts64, disp_pic->pts_valid);
1731
1732	prepare_display_buf(hw, disp_pic);
1733	vdec_schedule_work(&hw->work);
1734	}
1735
1736	return IRQ_HANDLED;
1737	}
1738	static irqreturn_t vmpeg12_isr(struct vdec_s *vdec, int irq)
1739	{
1740	u32 info, offset;
1741	struct vdec_mpeg12_hw_s *hw =
1742	(struct vdec_mpeg12_hw_s *)(vdec->private);
1743	if (hw->eos)
1744	return IRQ_HANDLED;
1745	info = READ_VREG(MREG_PIC_INFO);
1746	offset = READ_VREG(MREG_FRAME_OFFSET);
1747
1748	vdec_count_info(&gvs, info & PICINFO_ERROR, offset);
1749
1750	WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
1751
1752	return IRQ_WAKE_THREAD;
1753	}
1754
1755	static void vmpeg12_notify_work(struct work_struct *work)
1756	{
1757	struct vdec_mpeg12_hw_s *hw = container_of(work,
1758	struct vdec_mpeg12_hw_s, notify_work);
1759	struct vdec_s *vdec = hw_to_vdec(hw);
1760
1761	if (vdec->fr_hint_state == VDEC_NEED_HINT) {
1762	vf_notify_receiver(vdec->vf_provider_name,
1763	VFRAME_EVENT_PROVIDER_FR_HINT,
1764	(void *)((unsigned long)hw->frame_dur));
1765	vdec->fr_hint_state = VDEC_HINTED;
1766	}
1767	}
1768
1769	static void wait_vmmpeg12_search_done(struct vdec_mpeg12_hw_s *hw)
1770	{
1771	u32 vld_rp = READ_VREG(VLD_MEM_VIFIFO_RP);
1772	int count = 0;
1773
1774	do {
1775	usleep_range(100, 500);
1776	if (vld_rp == READ_VREG(VLD_MEM_VIFIFO_RP))
1777	break;
1778	if (count > 1000) {
1779	debug_print(DECODE_ID(hw), 0,
1780	"%s, count %d vld_rp 0x%x VLD_MEM_VIFIFO_RP 0x%x\n",
1781	__func__, count, vld_rp, READ_VREG(VLD_MEM_VIFIFO_RP));
1782	break;
1783	} else
1784	vld_rp = READ_VREG(VLD_MEM_VIFIFO_RP);
1785	count++;
1786	} while (1);
1787	}
1788
1789	static void flush_output(struct vdec_mpeg12_hw_s *hw)
1790	{
1791	int index = hw->refs[1];
1792
1793	/* video only one frame need not flush. */
1794	if (hw->dec_num < 2)
1795	return;
1796
1797	if (index >= 0 && index < DECODE_BUFFER_NUM_MAX)
1798	prepare_display_buf(hw, &hw->pics[index]);
1799	}
1800
1801	static int notify_v4l_eos(struct vdec_s *vdec)
1802	{
1803	struct vdec_mpeg12_hw_s *hw = (struct vdec_mpeg12_hw_s *)vdec->private;
1804	struct aml_vcodec_ctx *ctx = (struct aml_vcodec_ctx *)(hw->v4l2_ctx);
1805	struct vframe_s *vf = NULL;
1806	struct vdec_v4l2_buffer *fb = NULL;
1807
1808	if (hw->is_used_v4l && hw->eos) {
1809	if (kfifo_get(&hw->newframe_q, &vf) == 0 || vf == NULL) {
1810	debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1811	"%s fatal error, no available buffer slot.\n",
1812	__func__);
1813	return -1;
1814	}
1815
1816	if (vdec_v4l_get_buffer(hw->v4l2_ctx, &fb)) {
1817	pr_err("[%d] get fb fail.\n", ctx->id);
1818	return -1;
1819	}
1820
1821	vf->timestamp = ULONG_MAX;
1822	vf->v4l_mem_handle = (unsigned long)fb;
1823	vf->flag = VFRAME_FLAG_EMPTY_FRAME_V4L;
1824
1825	kfifo_put(&hw->display_q, (const struct vframe_s *)vf);
1826	vf_notify_receiver(vdec->vf_provider_name,
1827	VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
1828
1829	pr_info("[%d] mpeg12 EOS notify.\n", ctx->id);
1830	}
1831
1832	return 0;
1833	}
1834
1835	static void vmpeg12_work_implement(struct vdec_mpeg12_hw_s *hw,
1836	struct vdec_s *vdec, int from)
1837	{
1838	if (hw->dec_result != DEC_RESULT_DONE)
1839	debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1840	"%s, result=%d, status=%d\n", __func__,
1841	hw->dec_result, vdec->next_status);
1842
1843	if (hw->dec_result == DEC_RESULT_DONE) {
1844	vdec_vframe_dirty(vdec, hw->chunk);
1845	hw->chunk = NULL;
1846	} else if (hw->dec_result == DEC_RESULT_AGAIN &&
1847	(vdec->next_status != VDEC_STATUS_DISCONNECTED)) {
1848	/*
1849	stream base: stream buf empty or timeout
1850	frame base: vdec_prepare_input fail
1851	*/
1852	if (!vdec_has_more_input(vdec)) {
1853	hw->dec_result = DEC_RESULT_EOS;
1854	vdec_schedule_work(&hw->work);
1855	return;
1856	}
1857	#ifdef AGAIN_HAS_THRESHOLD
1858	hw->next_again_flag = 1;
1859	#endif
1860	} else if (hw->dec_result == DEC_RESULT_GET_DATA &&
1861	vdec->next_status != VDEC_STATUS_DISCONNECTED) {
1862	if (!vdec_has_more_input(vdec)) {
1863	hw->dec_result = DEC_RESULT_EOS;
1864	vdec_schedule_work(&hw->work);
1865	return;
1866	}
1867	debug_print(DECODE_ID(hw), PRINT_FLAG_VLD_DETAIL,
1868	"%s DEC_RESULT_GET_DATA %x %x %x\n",
1869	__func__,
1870	READ_VREG(VLD_MEM_VIFIFO_LEVEL),
1871	READ_VREG(VLD_MEM_VIFIFO_WP),
1872	READ_VREG(VLD_MEM_VIFIFO_RP));
1873	vdec_vframe_dirty(vdec, hw->chunk);
1874	hw->chunk = NULL;
1875	vdec_clean_input(vdec);
1876	return;
1877	} else if (hw->dec_result == DEC_RESULT_FORCE_EXIT) {
1878	debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1879	"%s: force exit\n", __func__);
1880	if (hw->stat & STAT_ISR_REG) {
1881	amvdec_stop();
1882	vdec_free_irq(VDEC_IRQ_1, (void *)hw);
1883	hw->stat &= ~STAT_ISR_REG;
1884	}
1885	} else if (hw->dec_result == DEC_RESULT_EOS) {
1886	if (hw->stat & STAT_VDEC_RUN) {
1887	amvdec_stop();
1888	hw->stat &= ~STAT_VDEC_RUN;
1889	}
1890	hw->eos = 1;
1891	vdec_vframe_dirty(vdec, hw->chunk);
1892	hw->chunk = NULL;
1893	vdec_clean_input(vdec);
1894	flush_output(hw);
1895	if (hw->is_used_v4l)
1896	notify_v4l_eos(vdec);
1897
1898	debug_print(DECODE_ID(hw), 0,
1899	"%s: end of stream, num %d(%d)\n",
1900	__func__, hw->disp_num, hw->dec_num);
1901	}
1902	if (hw->stat & STAT_VDEC_RUN) {
1903	amvdec_stop();
1904	hw->stat &= ~STAT_VDEC_RUN;
1905	}
1906
1907	if (from == 1) {
1908	/*This is a timeout work*/
1909	if (work_pending(&hw->work)) {
1910	pr_err("timeout work return befor finishing.");
1911	/*
1912	* The vmpeg12_work arrives at the last second,
1913	* give it a chance to handle the scenario.
1914	*/
1915	return;
1916	}
1917	}
1918
1919	/*disable mbox interrupt */
1920	WRITE_VREG(ASSIST_MBOX1_MASK, 0);
1921	wait_vmmpeg12_search_done(hw);
1922	if (vdec->parallel_dec == 1)
1923	vdec_core_finish_run(vdec, CORE_MASK_VDEC_1);
1924	else
1925	vdec_core_finish_run(vdec, CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
1926	del_timer_sync(&hw->check_timer);
1927	hw->stat &= ~STAT_TIMER_ARM;
1928
1929	if (hw->vdec_cb)
1930	hw->vdec_cb(vdec, hw->vdec_cb_arg);
1931	}
1932
1933	static void vmpeg12_work(struct work_struct *work)
1934	{
1935	struct vdec_mpeg12_hw_s *hw =
1936	container_of(work, struct vdec_mpeg12_hw_s, work);
1937	struct vdec_s *vdec = hw_to_vdec(hw);
1938
1939	vmpeg12_work_implement(hw, vdec, 0);
1940	}
1941	static void vmpeg12_timeout_work(struct work_struct *work)
1942	{
1943	struct vdec_mpeg12_hw_s *hw =
1944	container_of(work, struct vdec_mpeg12_hw_s, timeout_work);
1945	struct vdec_s *vdec = hw_to_vdec(hw);
1946
1947	if (work_pending(&hw->work)) {
1948	pr_err("timeout work return befor executing.");
1949	return;
1950	}
1951
1952	vmpeg12_work_implement(hw, vdec, 1);
1953	}
1954
1955	static struct vframe_s *vmpeg_vf_peek(void *op_arg)
1956	{
1957	struct vframe_s *vf;
1958	struct vdec_s *vdec = op_arg;
1959	struct vdec_mpeg12_hw_s *hw =
1960	(struct vdec_mpeg12_hw_s *)vdec->private;
1961	hw->peek_num++;
1962	if (kfifo_peek(&hw->display_q, &vf))
1963	return vf;
1964
1965	return NULL;
1966	}
1967
1968	static struct vframe_s *vmpeg_vf_get(void *op_arg)
1969	{
1970	struct vframe_s *vf;
1971	struct vdec_s *vdec = op_arg;
1972	struct vdec_mpeg12_hw_s *hw =
1973	(struct vdec_mpeg12_hw_s *)vdec->private;
1974
1975	hw->get_num++;
1976	if (kfifo_get(&hw->display_q, &vf))
1977	return vf;
1978
1979	return NULL;
1980	}
1981
1982	static void vmpeg_vf_put(struct vframe_s *vf, void *op_arg)
1983	{
1984	struct vdec_s *vdec = op_arg;
1985	struct vdec_mpeg12_hw_s *hw =
1986	(struct vdec_mpeg12_hw_s *)vdec->private;
1987
1988	hw->vfbuf_use[vf->index]--;
1989	hw->put_num++;
1990	kfifo_put(&hw->newframe_q,
1991	(const struct vframe_s *)vf);
1992	debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1993	"%s: index %d, use %d\n", __func__,
1994	vf->index, hw->vfbuf_use[vf->index]);
1995	}
1996
1997	static int vmpeg_event_cb(int type, void *data, void *private_data)
1998	{
1999	return 0;
2000	}
2001
2002	static int vmpeg_vf_states(struct vframe_states *states, void *op_arg)
2003	{
2004	unsigned long flags;
2005	struct vdec_s *vdec = op_arg;
2006	struct vdec_mpeg12_hw_s *hw =
2007	(struct vdec_mpeg12_hw_s *)vdec->private;
2008
2009	spin_lock_irqsave(&hw->lock, flags);
2010
2011	states->vf_pool_size = VF_POOL_SIZE;
2012	states->buf_free_num = kfifo_len(&hw->newframe_q);
2013	states->buf_avail_num = kfifo_len(&hw->display_q);
2014	states->buf_recycle_num = 0;
2015
2016	spin_unlock_irqrestore(&hw->lock, flags);
2017	return 0;
2018	}
2019	static int vmmpeg12_dec_status(struct vdec_s *vdec, struct vdec_info *vstatus)
2020	{
2021	struct vdec_mpeg12_hw_s *hw =
2022	(struct vdec_mpeg12_hw_s *)vdec->private;
2023
2024	if (!hw)
2025	return -1;
2026
2027	vstatus->frame_width = hw->frame_width;
2028	vstatus->frame_height = hw->frame_height;
2029	if (hw->frame_dur != 0)
2030	vstatus->frame_rate = 96000 / hw->frame_dur;
2031	else
2032	vstatus->frame_rate = -1;
2033	vstatus->error_count = READ_VREG(AV_SCRATCH_C);
2034	vstatus->status = hw->stat;
2035	vstatus->bit_rate = gvs.bit_rate;
2036	vstatus->frame_dur = hw->frame_dur;
2037	vstatus->frame_data = gvs.frame_data;
2038	vstatus->total_data = gvs.total_data;
2039	vstatus->frame_count = gvs.frame_count;
2040	vstatus->error_frame_count = gvs.error_frame_count;
2041	vstatus->drop_frame_count = hw->drop_frame_count;
2042	vstatus->total_data = gvs.total_data;
2043	vstatus->samp_cnt = gvs.samp_cnt;
2044	vstatus->offset = gvs.offset;
2045	vstatus->ratio_control = hw->ratio_control;
2046	snprintf(vstatus->vdec_name, sizeof(vstatus->vdec_name),
2047	"%s", DRIVER_NAME);
2048
2049	return 0;
2050	}
2051
2052
2053
2054	/****************************************/
2055	static void vmpeg12_canvas_init(struct vdec_mpeg12_hw_s *hw)
2056	{
2057	int i, ret;
2058	u32 canvas_width, canvas_height;
2059	u32 decbuf_size, decbuf_y_size, decbuf_uv_size;
2060	unsigned long decbuf_start;
2061	/*u32 disp_addr = 0xffffffff;*/
2062	struct vdec_s *vdec = hw_to_vdec(hw);
2063
2064	if (buf_size <= 0x00400000) {
2065	/* SD only */
2066	canvas_width = 768;
2067	canvas_height = 576;
2068	decbuf_y_size = 0x80000;
2069	decbuf_uv_size = 0x20000;
2070	decbuf_size = 0x100000;
2071	} else {
2072	/* HD & SD */
2073	canvas_width = 1920;
2074	canvas_height = 1088;
2075	decbuf_y_size = 0x200000;
2076	decbuf_uv_size = 0x80000;
2077	decbuf_size = 0x300000;
2078	}
2079
2080	for (i = 0; i < MAX_BMMU_BUFFER_NUM; i++) {
2081	unsigned canvas;
2082
2083	if (i == (MAX_BMMU_BUFFER_NUM - 1)) /* SWAP&CCBUF&MATIRX&MV */
2084	decbuf_size = WORKSPACE_SIZE;
2085
2086	if (hw->is_used_v4l && !(i == (MAX_BMMU_BUFFER_NUM - 1))) {
2087	continue;
2088	} else {
2089	ret = decoder_bmmu_box_alloc_buf_phy(hw->mm_blk_handle, i,
2090	decbuf_size, DRIVER_NAME, &decbuf_start);
2091	if (ret < 0) {
2092	pr_err("mmu alloc failed! size 0x%d idx %d\n",
2093	decbuf_size, i);
2094	return;
2095	}
2096	}
2097
2098	if (i == (MAX_BMMU_BUFFER_NUM - 1)) {
2099	if (hw->ccbuf_phyAddress_is_remaped_nocache)
2100	codec_mm_unmap_phyaddr(hw->ccbuf_phyAddress_virt);
2101	hw->ccbuf_phyAddress_virt = NULL;
2102	hw->ccbuf_phyAddress = 0;
2103	hw->ccbuf_phyAddress_is_remaped_nocache = 0;
2104
2105	hw->buf_start = decbuf_start;
2106	hw->ccbuf_phyAddress = hw->buf_start + CTX_CCBUF_OFFSET;
2107	hw->ccbuf_phyAddress_virt
2108	= codec_mm_phys_to_virt(
2109	hw->ccbuf_phyAddress);
2110	if ((!hw->ccbuf_phyAddress_virt) && (!hw->tvp_flag)) {
2111	hw->ccbuf_phyAddress_virt
2112	= codec_mm_vmap(
2113	hw->ccbuf_phyAddress,
2114	CCBUF_SIZE);
2115	hw->ccbuf_phyAddress_is_remaped_nocache = 1;
2116	}
2117
2118	WRITE_VREG(MREG_CO_MV_START, hw->buf_start);
2119	} else {
2120	if (vdec->parallel_dec == 1) {
2121	unsigned tmp;
2122	if (canvas_u(hw->canvas_spec[i]) == 0xff) {
2123	tmp =
2124	vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
2125	hw->canvas_spec[i] &= ~(0xffff << 8);
2126	hw->canvas_spec[i] |= tmp << 8;
2127	hw->canvas_spec[i] |= tmp << 16;
2128	}
2129	if (canvas_y(hw->canvas_spec[i]) == 0xff) {
2130	tmp =
2131	vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
2132	hw->canvas_spec[i] &= ~0xff;
2133	hw->canvas_spec[i] |= tmp;
2134	}
2135	canvas = hw->canvas_spec[i];
2136	} else {
2137	canvas = vdec->get_canvas(i, 2);
2138	hw->canvas_spec[i] = canvas;
2139	}
2140
2141	hw->canvas_config[i][0].phy_addr =
2142	decbuf_start;
2143	hw->canvas_config[i][0].width =
2144	canvas_width;
2145	hw->canvas_config[i][0].height =
2146	canvas_height;
2147	hw->canvas_config[i][0].block_mode =
2148	hw->canvas_mode;
2149	hw->canvas_config[i][0].endian =
2150	(hw->canvas_mode == CANVAS_BLKMODE_LINEAR)?7:0;
2151
2152	canvas_config_config(canvas_y(canvas),
2153	&hw->canvas_config[i][0]);
2154
2155	hw->canvas_config[i][1].phy_addr =
2156	decbuf_start + decbuf_y_size;
2157	hw->canvas_config[i][1].width = canvas_width;
2158	hw->canvas_config[i][1].height = canvas_height / 2;
2159	hw->canvas_config[i][1].block_mode = hw->canvas_mode;
2160	hw->canvas_config[i][1].endian =
2161	(hw->canvas_mode == CANVAS_BLKMODE_LINEAR)?7:0;
2162
2163	canvas_config_config(canvas_u(canvas),
2164	&hw->canvas_config[i][1]);
2165	}
2166	}
2167	return;
2168	}
2169
2170	static void vmpeg2_dump_state(struct vdec_s *vdec)
2171	{
2172	struct vdec_mpeg12_hw_s *hw =
2173	(struct vdec_mpeg12_hw_s *)(vdec->private);
2174	u32 i;
2175	debug_print(DECODE_ID(hw), 0,
2176	"====== %s\n", __func__);
2177	debug_print(DECODE_ID(hw), 0,
2178	"width/height (%d/%d),i_first %d\n",
2179	hw->frame_width,
2180	hw->frame_height,
2181	hw->first_i_frame_ready
2182	);
2183	debug_print(DECODE_ID(hw), 0,
2184	"is_framebase(%d), eos %d, state 0x%x, dec_result 0x%x dec_frm %d put_frm %d run %d not_run_ready %d,input_empty %d\n",
2185	vdec_frame_based(vdec),
2186	hw->eos,
2187	hw->stat,
2188	hw->dec_result,
2189	hw->dec_num,
2190	hw->put_num,
2191	hw->run_count,
2192	hw->not_run_ready,
2193	hw->input_empty
2194	);
2195
2196	for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
2197	debug_print(DECODE_ID(hw), 0,
2198	"index %d, used %d\n", i, hw->vfbuf_use[i]);
2199	}
2200
2201	if (vf_get_receiver(vdec->vf_provider_name)) {
2202	enum receviver_start_e state =
2203	vf_notify_receiver(vdec->vf_provider_name,
2204	VFRAME_EVENT_PROVIDER_QUREY_STATE,
2205	NULL);
2206	debug_print(DECODE_ID(hw), 0,
2207	"\nreceiver(%s) state %d\n",
2208	vdec->vf_provider_name,
2209	state);
2210	}
2211	debug_print(DECODE_ID(hw), 0,
2212	"%s, newq(%d/%d), dispq(%d/%d) vf peek/get/put (%d/%d/%d),drop=%d, buffer_not_ready %d\n",
2213	__func__,
2214	kfifo_len(&hw->newframe_q),
2215	VF_POOL_SIZE,
2216	kfifo_len(&hw->display_q),
2217	VF_POOL_SIZE,
2218	hw->peek_num,
2219	hw->get_num,
2220	hw->put_num,
2221	hw->drop_frame_count,
2222	hw->buffer_not_ready
2223	);
2224	debug_print(DECODE_ID(hw), 0,
2225	"VIFF_BIT_CNT=0x%x\n",
2226	READ_VREG(VIFF_BIT_CNT));
2227	debug_print(DECODE_ID(hw), 0,
2228	"VLD_MEM_VIFIFO_LEVEL=0x%x\n",
2229	READ_VREG(VLD_MEM_VIFIFO_LEVEL));
2230	debug_print(DECODE_ID(hw), 0,
2231	"VLD_MEM_VIFIFO_WP=0x%x\n",
2232	READ_VREG(VLD_MEM_VIFIFO_WP));
2233	debug_print(DECODE_ID(hw), 0,
2234	"VLD_MEM_VIFIFO_RP=0x%x\n",
2235	READ_VREG(VLD_MEM_VIFIFO_RP));
2236	debug_print(DECODE_ID(hw), 0,
2237	"PARSER_VIDEO_RP=0x%x\n",
2238	READ_PARSER_REG(PARSER_VIDEO_RP));
2239	debug_print(DECODE_ID(hw), 0,
2240	"PARSER_VIDEO_WP=0x%x\n",
2241	READ_PARSER_REG(PARSER_VIDEO_WP));
2242	if (vdec_frame_based(vdec) &&
2243	debug_enable & PRINT_FRAMEBASE_DATA
2244	) {
2245	int jj;
2246	if (hw->chunk && hw->chunk->block &&
2247	hw->chunk->size > 0) {
2248	u8 *data = NULL;
2249
2250	if (!hw->chunk->block->is_mapped)
2251	data = codec_mm_vmap(hw->chunk->block->start +
2252	hw->chunk->offset, hw->chunk->size);
2253	else
2254	data = ((u8 *)hw->chunk->block->start_virt) +
2255	hw->chunk->offset;
2256
2257	debug_print(DECODE_ID(hw), 0,
2258	"frame data size 0x%x\n",
2259	hw->chunk->size);
2260	for (jj = 0; jj < hw->chunk->size; jj++) {
2261	if ((jj & 0xf) == 0)
2262	debug_print(DECODE_ID(hw),
2263	PRINT_FRAMEBASE_DATA,
2264	"%06x:", jj);
2265	debug_print(DECODE_ID(hw),
2266	PRINT_FRAMEBASE_DATA,
2267	"%02x ", data[jj]);
2268	if (((jj + 1) & 0xf) == 0)
2269	debug_print(DECODE_ID(hw),
2270	PRINT_FRAMEBASE_DATA, "\n");
2271	}
2272
2273	if (!hw->chunk->block->is_mapped)
2274	codec_mm_unmap_phyaddr(data);
2275	}
2276	}
2277	}
2278
2279	static void reset_process_time(struct vdec_mpeg12_hw_s *hw)
2280	{
2281	if (hw->start_process_time) {
2282	unsigned process_time =
2283	1000 * (jiffies - hw->start_process_time) / HZ;
2284	hw->start_process_time = 0;
2285	if (process_time > max_process_time[DECODE_ID(hw)])
2286	max_process_time[DECODE_ID(hw)] = process_time;
2287	}
2288	}
2289	static void start_process_time(struct vdec_mpeg12_hw_s *hw)
2290	{
2291	hw->decode_timeout_count = 10;
2292	hw->start_process_time = jiffies;
2293	}
2294	static void timeout_process(struct vdec_mpeg12_hw_s *hw)
2295	{
2296	struct vdec_s *vdec = hw_to_vdec(hw);
2297
2298	if (work_pending(&hw->work)) {
2299	pr_err("timeout_process return befor do anything.");
2300	return;
2301	}
2302	reset_process_time(hw);
2303	amvdec_stop();
2304	debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
2305	"%s decoder timeout, status=%d, level=%d\n",
2306	__func__, vdec->status, READ_VREG(VLD_MEM_VIFIFO_LEVEL));
2307	hw->dec_result = DEC_RESULT_DONE;
2308	hw->first_i_frame_ready = 0;
2309
2310	/*
2311	* In this very timeout point,the vmpeg12_work arrives,
2312	* let it to handle the scenario.
2313	*/
2314	if (work_pending(&hw->work)) {
2315	pr_err("timeout_process return befor schedule.");
2316	return;
2317	}
2318	vdec_schedule_work(&hw->timeout_work);
2319	}
2320
2321	static void check_timer_func(unsigned long arg)
2322	{
2323	struct vdec_mpeg12_hw_s *hw = (struct vdec_mpeg12_hw_s *)arg;
2324	struct vdec_s *vdec = hw_to_vdec(hw);
2325	unsigned int timeout_val = decode_timeout_val;
2326
2327	if (radr != 0) {
2328	if (rval != 0) {
2329	WRITE_VREG(radr, rval);
2330	pr_info("WRITE_VREG(%x,%x)\n", radr, rval);
2331	} else
2332	pr_info("READ_VREG(%x)=%x\n", radr, READ_VREG(radr));
2333	rval = 0;
2334	radr = 0;
2335	}
2336
2337	if (((debug_enable & PRINT_FLAG_TIMEOUT_STATUS) == 0) &&
2338	(timeout_val > 0) &&
2339	(hw->start_process_time > 0) &&
2340	((1000 * (jiffies - hw->start_process_time) / HZ)
2341	> timeout_val)) {
2342	if (hw->last_vld_level == READ_VREG(VLD_MEM_VIFIFO_LEVEL)) {
2343	if (hw->decode_timeout_count > 0)
2344	hw->decode_timeout_count--;
2345	if (hw->decode_timeout_count == 0)
2346	timeout_process(hw);
2347	}
2348	hw->last_vld_level = READ_VREG(VLD_MEM_VIFIFO_LEVEL);
2349	}
2350
2351	if (vdec->next_status == VDEC_STATUS_DISCONNECTED) {
2352	hw->dec_result = DEC_RESULT_FORCE_EXIT;
2353	vdec_schedule_work(&hw->work);
2354	pr_info("vdec requested to be disconnected\n");
2355	return;
2356	}
2357
2358	mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
2359	}
2360
2361	static int vmpeg12_hw_ctx_restore(struct vdec_mpeg12_hw_s *hw)
2362	{
2363	u32 index, i;
2364	index = find_free_buffer(hw);
2365	if (index >= DECODE_BUFFER_NUM_MAX)
2366	return -1;
2367	if (!hw->init_flag)
2368	vmpeg12_canvas_init(hw);
2369	else {
2370	if (!hw->is_used_v4l) {
2371	WRITE_VREG(MREG_CO_MV_START, hw->buf_start);
2372	for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
2373	canvas_config_config(canvas_y(hw->canvas_spec[i]),
2374	&hw->canvas_config[i][0]);
2375	canvas_config_config(canvas_u(hw->canvas_spec[i]),
2376	&hw->canvas_config[i][1]);
2377	}
2378	}
2379	}
2380
2381	/* prepare REF0 & REF1
2382	points to the past two IP buffers
2383	prepare REC_CANVAS_ADDR and ANC2_CANVAS_ADDR
2384	points to the output buffer*/
2385	WRITE_VREG(MREG_REF0,
2386	(hw->refs[0] == -1) ? 0xffffffff :
2387	hw->canvas_spec[hw->refs[0]]);
2388	WRITE_VREG(MREG_REF1,
2389	(hw->refs[1] == -1) ? 0xffffffff :
2390	hw->canvas_spec[hw->refs[1]]);
2391	WRITE_VREG(REC_CANVAS_ADDR, hw->canvas_spec[index]);
2392	WRITE_VREG(ANC2_CANVAS_ADDR, hw->canvas_spec[index]);
2393
2394	debug_print(DECODE_ID(hw), PRINT_FLAG_RESTORE,
2395	"%s,ref0=0x%x, ref1=0x%x,rec=0x%x, ctx_valid=%d,index=%d\n",
2396	__func__,
2397	READ_VREG(MREG_REF0),
2398	READ_VREG(MREG_REF1),
2399	READ_VREG(REC_CANVAS_ADDR),
2400	hw->ctx_valid, index);
2401
2402	/* set to mpeg1 default */
2403	WRITE_VREG(MPEG1_2_REG,
2404	(hw->ctx_valid) ? hw->reg_mpeg1_2_reg : 0);
2405	/* disable PSCALE for hardware sharing */
2406	WRITE_VREG(PSCALE_CTRL, 0);
2407	/* for Mpeg1 default value */
2408	WRITE_VREG(PIC_HEAD_INFO,
2409	(hw->ctx_valid) ? hw->reg_pic_head_info : 0x380);
2410	/* disable mpeg4 */
2411	WRITE_VREG(M4_CONTROL_REG, 0);
2412	/* clear mailbox interrupt */
2413	WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
2414	/* clear buffer IN/OUT registers */
2415	WRITE_VREG(MREG_BUFFEROUT, 0);
2416	/* enable mailbox interrupt */
2417	WRITE_VREG(ASSIST_MBOX1_MASK, 1);
2418	/* set reference width and height */
2419	if ((hw->frame_width != 0) && (hw->frame_height != 0))
2420	WRITE_VREG(MREG_CMD,
2421	(hw->frame_width << 16) | hw->frame_height);
2422	else
2423	WRITE_VREG(MREG_CMD, 0);
2424
2425	debug_print(DECODE_ID(hw), PRINT_FLAG_RESTORE,
2426	"0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
2427	hw->frame_width, hw->frame_height, hw->seqinfo,
2428	hw->reg_f_code_reg, hw->reg_slice_ver_pos_pic_type,
2429	hw->reg_mb_info);
2430
2431	WRITE_VREG(MREG_PIC_WIDTH, hw->reg_pic_width);
2432	WRITE_VREG(MREG_PIC_HEIGHT, hw->reg_pic_height);
2433	WRITE_VREG(MREG_SEQ_INFO, hw->seqinfo);
2434	WRITE_VREG(F_CODE_REG, hw->reg_f_code_reg);
2435	WRITE_VREG(SLICE_VER_POS_PIC_TYPE,
2436	hw->reg_slice_ver_pos_pic_type);
2437	WRITE_VREG(MB_INFO, hw->reg_mb_info);
2438	WRITE_VREG(VCOP_CTRL_REG, hw->reg_vcop_ctrl_reg);
2439	WRITE_VREG(AV_SCRATCH_H, hw->reg_signal_type);
2440
2441	/* clear error count */
2442	WRITE_VREG(MREG_ERROR_COUNT, 0);
2443	WRITE_VREG(MREG_FATAL_ERROR, 0);
2444	/* clear wait buffer status */
2445	WRITE_VREG(MREG_WAIT_BUFFER, 0);
2446	#ifdef NV21
2447	SET_VREG_MASK(MDEC_PIC_DC_CTRL, 1<<17);
2448	#endif
2449	if (!hw->ctx_valid)
2450	WRITE_VREG(AV_SCRATCH_J, hw->userdata_wp_ctx);
2451
2452	if (hw->chunk) {
2453	/*frame based input*/
2454	WRITE_VREG(MREG_INPUT,
2455	(hw->chunk->offset & 7) | (1<<7) | (hw->ctx_valid<<6));
2456	} else {
2457	/*stream based input*/
2458	WRITE_VREG(MREG_INPUT, (hw->ctx_valid<<6));
2459	}
2460	return 0;
2461	}
2462
2463	static void vmpeg12_local_init(struct vdec_mpeg12_hw_s *hw)
2464	{
2465	int i;
2466	INIT_KFIFO(hw->display_q);
2467	INIT_KFIFO(hw->newframe_q);
2468
2469	for (i = 0; i < VF_POOL_SIZE; i++) {
2470	const struct vframe_s *vf;
2471	vf = &hw->vfpool[i];
2472	hw->vfpool[i].index = DECODE_BUFFER_NUM_MAX;
2473	kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
2474	}
2475
2476	for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
2477	hw->vfbuf_use[i] = 0;
2478
2479
2480	if (hw->mm_blk_handle) {
2481	decoder_bmmu_box_free(hw->mm_blk_handle);
2482	hw->mm_blk_handle = NULL;
2483	}
2484
2485	hw->mm_blk_handle = decoder_bmmu_box_alloc_box(
2486	DRIVER_NAME,
2487	0,
2488	MAX_BMMU_BUFFER_NUM,
2489	4 + PAGE_SHIFT,
2490	CODEC_MM_FLAGS_CMA_CLEAR |
2491	CODEC_MM_FLAGS_FOR_VDECODER |
2492	hw->tvp_flag);
2493	hw->eos = 0;
2494	hw->frame_width = hw->frame_height = 0;
2495	hw->frame_dur = hw->frame_prog = 0;
2496	hw->frame_force_skip_flag = 0;
2497	hw->wait_buffer_counter = 0;
2498	hw->first_i_frame_ready = 0;
2499	hw->dec_control &= DEC_CONTROL_INTERNAL_MASK;
2500	hw->refs[0] = -1;
2501	hw->refs[1] = -1;
2502	hw->disp_num = 0;
2503	hw->dec_num = 0;
2504	hw->put_num = 0;
2505	hw->run_count = 0;
2506	hw->not_run_ready = 0;
2507	hw->input_empty = 0;
2508	hw->peek_num = 0;
2509	hw->get_num = 0;
2510	hw->drop_frame_count = 0;
2511	hw->buffer_not_ready = 0;
2512	hw->start_process_time = 0;
2513	hw->init_flag = 0;
2514	hw->error_frame_skip_level = error_frame_skip_level;
2515	if (dec_control)
2516	hw->dec_control = dec_control;
2517	}
2518
2519	static s32 vmpeg12_init(struct vdec_mpeg12_hw_s *hw)
2520	{
2521	int size;
2522	u32 fw_size = 16*0x1000;
2523	struct firmware_s *fw;
2524
2525	vmpeg12_local_init(hw);
2526
2527	fw = vmalloc(sizeof(struct firmware_s) + fw_size);
2528	if (IS_ERR_OR_NULL(fw))
2529	return -ENOMEM;
2530
2531	pr_debug("get firmware ...\n");
2532	size = get_firmware_data(VIDEO_DEC_MPEG12_MULTI, fw->data);
2533	if (size < 0) {
2534	pr_err("get firmware fail.\n");
2535	vfree(fw);
2536	return -1;
2537	}
2538
2539	fw->len = size;
2540	hw->fw = fw;
2541
2542	INIT_WORK(&hw->userdata_push_work, userdata_push_do_work);
2543	INIT_WORK(&hw->work, vmpeg12_work);
2544	INIT_WORK(&hw->timeout_work, vmpeg12_timeout_work);
2545	INIT_WORK(&hw->notify_work, vmpeg12_notify_work);
2546
2547	if (NULL == hw->user_data_buffer) {
2548	hw->user_data_buffer = kmalloc(USER_DATA_SIZE,
2549	GFP_KERNEL);
2550	if (!hw->user_data_buffer) {
2551	pr_info("%s: Can not allocate user_data_buffer\n",
2552	__func__);
2553	return -1;
2554	}
2555	}
2556
2557	vmmpeg2_crate_userdata_manager(hw,
2558	hw->user_data_buffer,
2559	USER_DATA_SIZE);
2560
2561	amvdec_enable();
2562	init_timer(&hw->check_timer);
2563	hw->check_timer.data = (unsigned long)hw;
2564	hw->check_timer.function = check_timer_func;
2565	hw->check_timer.expires = jiffies + CHECK_INTERVAL;
2566
2567	hw->stat |= STAT_TIMER_ARM;
2568	hw->stat |= STAT_ISR_REG;
2569
2570	hw->buf_start = 0;
2571	WRITE_VREG(DECODE_STOP_POS, udebug_flag);
2572
2573	return 0;
2574	}
2575
2576	static unsigned long run_ready(struct vdec_s *vdec, unsigned long mask)
2577	{
2578	struct vdec_mpeg12_hw_s *hw =
2579	(struct vdec_mpeg12_hw_s *)vdec->private;
2580	if (hw->eos)
2581	return 0;
2582	if (vdec_stream_based(vdec) && (hw->init_flag == 0)
2583	&& pre_decode_buf_level != 0) {
2584	u32 rp, wp, level;
2585
2586	rp = READ_PARSER_REG(PARSER_VIDEO_RP);
2587	wp = READ_PARSER_REG(PARSER_VIDEO_WP);
2588	if (wp < rp)
2589	level = vdec->input.size + wp - rp;
2590	else
2591	level = wp - rp;
2592
2593	if (level < pre_decode_buf_level) {
2594	hw->not_run_ready++;
2595	return 0;
2596	}
2597	}
2598
2599	#ifdef AGAIN_HAS_THRESHOLD
2600	if (hw->next_again_flag&&
2601	(!vdec_frame_based(vdec))) {
2602	u32 parser_wr_ptr =
2603	READ_PARSER_REG(PARSER_VIDEO_WP);
2604	if (parser_wr_ptr >= hw->pre_parser_wr_ptr &&
2605	(parser_wr_ptr - hw->pre_parser_wr_ptr) <
2606	again_threshold) {
2607	int r = vdec_sync_input(vdec);
2608	debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
2609	"%s buf level%x\n",
2610	__func__, r);
2611	return 0;
2612	}
2613	}
2614	#endif
2615
2616	if (!is_enough_free_buffer(hw)) {
2617	hw->buffer_not_ready++;
2618	return 0;
2619	}
2620	hw->not_run_ready = 0;
2621	hw->buffer_not_ready = 0;
2622	if (vdec->parallel_dec == 1)
2623	return (unsigned long)(CORE_MASK_VDEC_1);
2624	else
2625	return (unsigned long)(CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
2626	}
2627
2628	static unsigned char get_data_check_sum
2629	(struct vdec_mpeg12_hw_s *hw, int size)
2630	{
2631	int jj;
2632	int sum = 0;
2633	u8 *data = NULL;
2634
2635	if (!hw->chunk->block->is_mapped)
2636	data = codec_mm_vmap(hw->chunk->block->start +
2637	hw->chunk->offset, size);
2638	else
2639	data = ((u8 *)hw->chunk->block->start_virt) +
2640	hw->chunk->offset;
2641
2642	for (jj = 0; jj < size; jj++)
2643	sum += data[jj];
2644
2645	if (!hw->chunk->block->is_mapped)
2646	codec_mm_unmap_phyaddr(data);
2647	return sum;
2648	}
2649
2650	static void run(struct vdec_s *vdec, unsigned long mask,
2651	void (*callback)(struct vdec_s *, void *),
2652	void *arg)
2653	{
2654	struct vdec_mpeg12_hw_s *hw =
2655	(struct vdec_mpeg12_hw_s *)vdec->private;
2656	int save_reg = READ_VREG(POWER_CTL_VLD);
2657	int size, ret;
2658	/* reset everything except DOS_TOP[1] and APB_CBUS[0]*/
2659	WRITE_VREG(DOS_SW_RESET0, 0xfffffff0);
2660	WRITE_VREG(DOS_SW_RESET0, 0);
2661	WRITE_VREG(POWER_CTL_VLD, save_reg);
2662	hw->run_count++;
2663	vdec_reset_core(vdec);
2664	hw->vdec_cb_arg = arg;
2665	hw->vdec_cb = callback;
2666
2667	#ifdef AGAIN_HAS_THRESHOLD
2668	hw->pre_parser_wr_ptr =
2669	READ_PARSER_REG(PARSER_VIDEO_WP);
2670	hw->next_again_flag = 0;
2671	#endif
2672
2673	size = vdec_prepare_input(vdec, &hw->chunk);
2674	if (size < 0) {
2675	hw->input_empty++;
2676	hw->dec_result = DEC_RESULT_AGAIN;
2677	vdec_schedule_work(&hw->work);
2678	return;
2679	}
2680	if (vdec_frame_based(vdec) && debug_enable) {
2681	u8 *data = NULL;
2682
2683
2684	if (hw->chunk)
2685	debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
2686	"run: chunk offset 0x%x, size %d\n",
2687	hw->chunk->offset, hw->chunk->size);
2688
2689	if (!hw->chunk->block->is_mapped)
2690	data = codec_mm_vmap(hw->chunk->block->start +
2691	hw->chunk->offset, size);
2692	else
2693	data = ((u8 *)hw->chunk->block->start_virt) +
2694	hw->chunk->offset;
2695
2696	if (debug_enable & PRINT_FLAG_VDEC_STATUS
2697	) {
2698	debug_print(DECODE_ID(hw), 0,
2699	"%s: size 0x%x sum 0x%x %02x %02x %02x %02x %02x %02x .. %02x %02x %02x %02x\n",
2700	__func__, size, get_data_check_sum(hw, size),
2701	data[0], data[1], data[2], data[3],
2702	data[4], data[5], data[size - 4],
2703	data[size - 3], data[size - 2],
2704	data[size - 1]);
2705	}
2706	if (debug_enable & PRINT_FRAMEBASE_DATA
2707	) {
2708	int jj;
2709
2710	for (jj = 0; jj < size; jj++) {
2711	if ((jj & 0xf) == 0)
2712	debug_print(DECODE_ID(hw),
2713	PRINT_FRAMEBASE_DATA,
2714	"%06x:", jj);
2715	debug_print(DECODE_ID(hw),
2716	PRINT_FRAMEBASE_DATA,
2717	"%02x ", data[jj]);
2718	if (((jj + 1) & 0xf) == 0)
2719	debug_print(DECODE_ID(hw),
2720	PRINT_FRAMEBASE_DATA,
2721	"\n");
2722	}
2723	}
2724
2725	if (!hw->chunk->block->is_mapped)
2726	codec_mm_unmap_phyaddr(data);
2727	} else
2728	debug_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS,
2729	"%s: %x %x %x %x %x size 0x%x\n",
2730	__func__,
2731	READ_VREG(VLD_MEM_VIFIFO_LEVEL),
2732	READ_VREG(VLD_MEM_VIFIFO_WP),
2733	READ_VREG(VLD_MEM_VIFIFO_RP),
2734	READ_PARSER_REG(PARSER_VIDEO_RP),
2735	READ_PARSER_REG(PARSER_VIDEO_WP),
2736	size);
2737
2738
2739	hw->input_empty = 0;
2740	vdec_enable_input(vdec);
2741
2742	hw->dec_result = DEC_RESULT_NONE;
2743	if (vdec->mc_loaded) {
2744	/*firmware have load before,
2745	and not changes to another.
2746	ignore reload.
2747	*/
2748	} else {
2749	ret = amvdec_vdec_loadmc_buf_ex(VFORMAT_MPEG12, "mmpeg12", vdec,
2750	hw->fw->data, hw->fw->len);
2751	if (ret < 0) {
2752	pr_err("[%d] %s: the %s fw loading failed, err: %x\n", vdec->id,
2753	hw->fw->name, tee_enabled() ? "TEE" : "local", ret);
2754	hw->dec_result = DEC_RESULT_FORCE_EXIT;
2755	vdec_schedule_work(&hw->work);
2756	return;
2757	}
2758	vdec->mc_loaded = 1;
2759	vdec->mc_type = VFORMAT_MPEG12;
2760	}
2761	if (vmpeg12_hw_ctx_restore(hw) < 0) {
2762	hw->dec_result = DEC_RESULT_ERROR;
2763	debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
2764	"ammvdec_mpeg12: error HW context restore\n");
2765	vdec_schedule_work(&hw->work);
2766	return;
2767	}
2768	/*wmb();*/
2769	hw->stat |= STAT_MC_LOAD;
2770	hw->last_vld_level = 0;
2771	start_process_time(hw);
2772	amvdec_start();
2773	hw->stat |= STAT_VDEC_RUN;
2774	hw->init_flag = 1;
2775	mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
2776	}
2777
2778	static void reset(struct vdec_s *vdec)
2779	{
2780	pr_info("ammvdec_mpeg12: reset.\n");
2781	}
2782
2783	static int ammvdec_mpeg12_probe(struct platform_device *pdev)
2784	{
2785	struct vdec_s *pdata = *(struct vdec_s **)pdev->dev.platform_data;
2786	struct vdec_mpeg12_hw_s *hw = NULL;
2787
2788	pr_info("ammvdec_mpeg12 probe start.\n");
2789
2790	if (pdata == NULL) {
2791	pr_info("ammvdec_mpeg12 platform data undefined.\n");
2792	return -EFAULT;
2793	}
2794
2795	hw = vzalloc(sizeof(struct vdec_mpeg12_hw_s));
2796	if (hw == NULL) {
2797	pr_info("\nammvdec_mpeg12 decoder driver alloc failed\n");
2798	return -ENOMEM;
2799	}
2800
2801	/* the ctx from v4l2 driver. */
2802	hw->v4l2_ctx = pdata->private;
2803
2804	pdata->private = hw;
2805	pdata->dec_status = vmmpeg12_dec_status;
2806	pdata->run_ready = run_ready;
2807	pdata->run = run;
2808	pdata->reset = reset;
2809	pdata->irq_handler = vmpeg12_isr;
2810	pdata->threaded_irq_handler = vmpeg12_isr_thread_fn;
2811	pdata->dump_state = vmpeg2_dump_state;
2812
2813	pdata->user_data_read = vmmpeg2_user_data_read;
2814	pdata->reset_userdata_fifo = vmmpeg2_reset_userdata_fifo;
2815	pdata->wakeup_userdata_poll = vmmpeg2_wakeup_userdata_poll;
2816
2817	if (pdata->use_vfm_path) {
2818	snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2819	VFM_DEC_PROVIDER_NAME);
2820	hw->frameinfo_enable = 1;
2821	}
2822	else
2823	snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2824	PROVIDER_NAME ".%02x", pdev->id & 0xff);
2825	if (pdata->parallel_dec == 1) {
2826	int i;
2827	for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
2828	hw->canvas_spec[i] = 0xffffff;
2829	}
2830	vf_provider_init(&pdata->vframe_provider, pdata->vf_provider_name,
2831	&vf_provider_ops, pdata);
2832
2833	platform_set_drvdata(pdev, pdata);
2834	hw->canvas_mode = pdata->canvas_mode;
2835	hw->platform_dev = pdev;
2836
2837	hw->tvp_flag = vdec_secure(pdata) ? CODEC_MM_FLAGS_TVP : 0;
2838	if (pdata->sys_info)
2839	hw->vmpeg12_amstream_dec_info = *pdata->sys_info;
2840
2841	debug_print(DECODE_ID(hw), 0,
2842	"%s, sysinfo: %dx%d, tvp_flag = 0x%x\n",
2843	__func__,
2844	hw->vmpeg12_amstream_dec_info.width,
2845	hw->vmpeg12_amstream_dec_info.height,
2846	hw->tvp_flag);
2847
2848	if (vmpeg12_init(hw) < 0) {
2849	pr_info("ammvdec_mpeg12 init failed.\n");
2850	if (hw) {
2851	vfree(hw);
2852	hw = NULL;
2853	}
2854	pdata->dec_status = NULL;
2855	return -ENODEV;
2856	}
2857	if (pdata->parallel_dec == 1)
2858	vdec_core_request(pdata, CORE_MASK_VDEC_1);
2859	else {
2860	vdec_core_request(pdata, CORE_MASK_VDEC_1 | CORE_MASK_HEVC
2861	| CORE_MASK_COMBINE);
2862	}
2863	#ifdef DUMP_USER_DATA
2864	amvdec_mmpeg12_init_userdata_dump(hw);
2865	reset_user_data_buf(hw);
2866	#endif
2867
2868	hw->is_used_v4l = (((unsigned long)
2869	hw->vmpeg12_amstream_dec_info.param & 0x80) >> 7);
2870
2871	/*INIT_WORK(&userdata_push_work, userdata_push_do_work);*/
2872	return 0;
2873	}
2874
2875	static int ammvdec_mpeg12_remove(struct platform_device *pdev)
2876
2877	{
2878	struct vdec_mpeg12_hw_s *hw =
2879	(struct vdec_mpeg12_hw_s *)
2880	(((struct vdec_s *)(platform_get_drvdata(pdev)))->private);
2881	struct vdec_s *vdec = hw_to_vdec(hw);
2882	int i;
2883
2884	if (hw->stat & STAT_VDEC_RUN) {
2885	amvdec_stop();
2886	hw->stat &= ~STAT_VDEC_RUN;
2887	}
2888
2889	if (hw->stat & STAT_ISR_REG) {
2890	vdec_free_irq(VDEC_IRQ_1, (void *)hw);
2891	hw->stat &= ~STAT_ISR_REG;
2892	}
2893
2894	if (hw->stat & STAT_TIMER_ARM) {
2895	del_timer_sync(&hw->check_timer);
2896	hw->stat &= ~STAT_TIMER_ARM;
2897	}
2898	cancel_work_sync(&hw->userdata_push_work);
2899	cancel_work_sync(&hw->notify_work);
2900	cancel_work_sync(&hw->work);
2901	cancel_work_sync(&hw->timeout_work);
2902
2903	if (hw->mm_blk_handle) {
2904	decoder_bmmu_box_free(hw->mm_blk_handle);
2905	hw->mm_blk_handle = NULL;
2906	}
2907	if (vdec->parallel_dec == 1)
2908	vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1);
2909	else
2910	vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
2911	vdec_set_status(hw_to_vdec(hw), VDEC_STATUS_DISCONNECTED);
2912
2913	if (vdec->parallel_dec == 1) {
2914	for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
2915	vdec->free_canvas_ex(canvas_y(hw->canvas_spec[i]), vdec->id);
2916	vdec->free_canvas_ex(canvas_u(hw->canvas_spec[i]), vdec->id);
2917	}
2918	}
2919
2920	if (hw->ccbuf_phyAddress_is_remaped_nocache)
2921	codec_mm_unmap_phyaddr(hw->ccbuf_phyAddress_virt);
2922	hw->ccbuf_phyAddress_virt = NULL;
2923	hw->ccbuf_phyAddress = 0;
2924	hw->ccbuf_phyAddress_is_remaped_nocache = 0;
2925
2926	if (hw->user_data_buffer != NULL) {
2927	kfree(hw->user_data_buffer);
2928	hw->user_data_buffer = NULL;
2929	}
2930	vmmpeg2_destroy_userdata_manager(hw);
2931
2932	#ifdef DUMP_USER_DATA
2933	amvdec_mmpeg12_uninit_userdata_dump(hw);
2934	#endif
2935
2936	if (hw->fw) {
2937	vfree(hw->fw);
2938	hw->fw = NULL;
2939	}
2940	if (hw) {
2941	vfree(hw);
2942	hw = NULL;
2943	}
2944	pr_info("ammvdec_mpeg12 removed.\n");
2945	memset(&gvs, 0x0, sizeof(gvs));
2946
2947	return 0;
2948	}
2949
2950	/****************************************/
2951	#ifdef CONFIG_PM
2952	static int mmpeg12_suspend(struct device *dev)
2953	{
2954	amvdec_suspend(to_platform_device(dev), dev->power.power_state);
2955	return 0;
2956	}
2957
2958	static int mmpeg12_resume(struct device *dev)
2959	{
2960	amvdec_resume(to_platform_device(dev));
2961	return 0;
2962	}
2963
2964	static const struct dev_pm_ops mmpeg12_pm_ops = {
2965	SET_SYSTEM_SLEEP_PM_OPS(mmpeg12_suspend, mmpeg12_resume)
2966	};
2967	#endif
2968
2969	static struct platform_driver ammvdec_mpeg12_driver = {
2970	.probe = ammvdec_mpeg12_probe,
2971	.remove = ammvdec_mpeg12_remove,
2972	.driver = {
2973	.name = DRIVER_NAME,
2974	#ifdef CONFIG_PM
2975	.pm = &mmpeg12_pm_ops,
2976	#endif
2977	}
2978	};
2979
2980	static struct codec_profile_t ammvdec_mpeg12_profile = {
2981	.name = "mmpeg12",
2982	.profile = ""
2983	};
2984
2985	static struct mconfig mmpeg12_configs[] = {
2986	MC_PU32("stat", &stat),
2987	MC_PU32("radr", &radr),
2988	MC_PU32("rval", &rval),
2989	MC_PU32("dec_control", &dec_control),
2990	MC_PU32("error_frame_skip_level", &error_frame_skip_level),
2991	MC_PU32("decode_timeout_val", &decode_timeout_val),
2992	};
2993	static struct mconfig_node mmpeg12_node;
2994
2995	static int __init ammvdec_mpeg12_driver_init_module(void)
2996	{
2997	pr_info("ammvdec_mpeg12 module init\n");
2998
2999	if (platform_driver_register(&ammvdec_mpeg12_driver)) {
3000	pr_info("failed to register ammvdec_mpeg12 driver\n");
3001	return -ENODEV;
3002	}
3003	vcodec_profile_register(&ammvdec_mpeg12_profile);
3004	INIT_REG_NODE_CONFIGS("media.decoder", &mmpeg12_node,
3005	"mmpeg12", mmpeg12_configs, CONFIG_FOR_RW);
3006	return 0;
3007	}
3008
3009	static void __exit ammvdec_mpeg12_driver_remove_module(void)
3010	{
3011	pr_info("ammvdec_mpeg12 module exit.\n");
3012	platform_driver_unregister(&ammvdec_mpeg12_driver);
3013	}
3014
3015	/****************************************/
3016	module_param(dec_control, uint, 0664);
3017	MODULE_PARM_DESC(dec_control, "\n ammvdec_mpeg12 decoder control\n");
3018	module_param(error_frame_skip_level, uint, 0664);
3019	MODULE_PARM_DESC(error_frame_skip_level,
3020	"\n ammvdec_mpeg12 error_frame_skip_level\n");
3021
3022	module_param(radr, uint, 0664);
3023	MODULE_PARM_DESC(radr, "\nradr\n");
3024
3025	module_param(rval, uint, 0664);
3026	MODULE_PARM_DESC(rval, "\nrval\n");
3027
3028	module_param(debug_enable, uint, 0664);
3029	MODULE_PARM_DESC(debug_enable,
3030	"\n ammvdec_mpeg12 debug enable\n");
3031	module_param(pre_decode_buf_level, int, 0664);
3032	MODULE_PARM_DESC(pre_decode_buf_level,
3033	"\n ammvdec_mpeg12 pre_decode_buf_level\n");
3034	module_param(decode_timeout_val, uint, 0664);
3035	MODULE_PARM_DESC(decode_timeout_val, "\n ammvdec_mpeg12 decode_timeout_val\n");
3036
3037	module_param_array(max_process_time, uint, &max_decode_instance_num, 0664);
3038
3039	module_param(udebug_flag, uint, 0664);
3040	MODULE_PARM_DESC(udebug_flag, "\n ammvdec_mpeg12 udebug_flag\n");
3041
3042
3043	#ifdef AGAIN_HAS_THRESHOLD
3044	module_param(again_threshold, uint, 0664);
3045	MODULE_PARM_DESC(again_threshold, "\n again_threshold\n");
3046	#endif
3047
3048	module_param(without_display_mode, uint, 0664);
3049	MODULE_PARM_DESC(without_display_mode, "\n ammvdec_mpeg12 without_display_mode\n");
3050
3051
3052	module_init(ammvdec_mpeg12_driver_init_module);
3053	module_exit(ammvdec_mpeg12_driver_remove_module);
3054
3055	MODULE_DESCRIPTION("AMLOGIC MULTI MPEG1/2 Video Decoder Driver");
3056	MODULE_LICENSE("GPL");
3057
3058
3059