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path: root/drivers/frame_provider/decoder/mpeg4/vmpeg4_multi.c (plain)
blob: c098a5ecf95af876ce0254bcbf18ff36a8105529
1/*
2 * drivers/amlogic/amports/vmpeg4.c
3 *
4 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/types.h>
21#include <linux/errno.h>
22#include <linux/interrupt.h>
23#include <linux/timer.h>
24#include <linux/kfifo.h>
25#include <linux/platform_device.h>
26#include <linux/dma-mapping.h>
27#include <linux/amlogic/media/utils/amstream.h>
28#include <linux/amlogic/media/frame_sync/ptsserv.h>
29
30#include <linux/amlogic/media/vfm/vframe.h>
31#include <linux/amlogic/media/vfm/vframe_provider.h>
32#include <linux/amlogic/media/vfm/vframe_receiver.h>
33#include <linux/amlogic/media/canvas/canvas.h>
34#include <linux/amlogic/media/codec_mm/codec_mm.h>
35#include <linux/amlogic/tee.h>
36#include <linux/amlogic/media/utils/vdec_reg.h>
37#include <linux/amlogic/media/registers/register.h>
38#include "../../../stream_input/amports/amports_priv.h"
39
40#include "../utils/amvdec.h"
41#include "../utils/vdec_input.h"
42#include "../utils/vdec.h"
43#include "../utils/firmware.h"
44#include "../utils/decoder_mmu_box.h"
45#include "../utils/decoder_bmmu_box.h"
46#include <linux/amlogic/media/codec_mm/configs.h>
47#include "../utils/firmware.h"
48#include "../utils/vdec_v4l2_buffer_ops.h"
49#include "../utils/config_parser.h"
50
51#define DRIVER_NAME "ammvdec_mpeg4"
52#define MODULE_NAME "ammvdec_mpeg4"
53
54#define MEM_NAME "codec_mmpeg4"
55
56#define DEBUG_PTS
57
58#define NV21
59#define I_PICTURE 0
60#define P_PICTURE 1
61#define B_PICTURE 2
62#define GET_PIC_TYPE(type) ("IPB####"[type&0x3])
63
64#define ORI_BUFFER_START_ADDR 0x01000000
65#define DEFAULT_MEM_SIZE (32*SZ_1M)
66
67#define INTERLACE_FLAG 0x80
68#define TOP_FIELD_FIRST_FLAG 0x40
69
70/* protocol registers */
71#define MREG_REF0 AV_SCRATCH_1
72#define MREG_REF1 AV_SCRATCH_2
73#define MP4_PIC_RATIO AV_SCRATCH_5
74#define MP4_RATE AV_SCRATCH_3
75#define MP4_ERR_COUNT AV_SCRATCH_6
76#define MP4_PIC_WH AV_SCRATCH_7
77#define MREG_INPUT AV_SCRATCH_8
78#define MREG_BUFFEROUT AV_SCRATCH_9
79#define MP4_NOT_CODED_CNT AV_SCRATCH_A
80#define MP4_VOP_TIME_INC AV_SCRATCH_B
81#define MP4_OFFSET_REG AV_SCRATCH_C
82#define MP4_SYS_RATE AV_SCRATCH_E
83#define MEM_OFFSET_REG AV_SCRATCH_F
84
85#define PARC_FORBIDDEN 0
86#define PARC_SQUARE 1
87#define PARC_CIF 2
88#define PARC_10_11 3
89#define PARC_16_11 4
90#define PARC_40_33 5
91#define PARC_RESERVED 6
92/* values between 6 and 14 are reserved */
93#define PARC_EXTENDED 15
94
95#define VF_POOL_SIZE 64
96#define DECODE_BUFFER_NUM_MAX 16
97#define DECODE_BUFFER_NUM_DEF 8
98#define PUT_INTERVAL (HZ/100)
99#define MAX_BMMU_BUFFER_NUM (DECODE_BUFFER_NUM_MAX + 1)
100#define WORKSPACE_SIZE (12*SZ_64K)
101static u32 buf_size = 32 * 1024 * 1024;
102
103#define CTX_LMEM_SWAP_OFFSET 0
104#define CTX_QUANT_MATRIX_OFFSET 0x800
105/* dcac buffer must align at 4k boundary */
106#define CTX_DCAC_BUF_OFFSET 0x1000
107#define CTX_DECBUF_OFFSET (0x0c0000 + 0x1000)
108
109#define RATE_DETECT_COUNT 5
110#define DURATION_UNIT 96000
111#define PTS_UNIT 90000
112#define CHECK_INTERVAL (HZ/100)
113
114#define DUR2PTS(x) ((x) - ((x) >> 4))
115
116/* 96000/(60fps* 2field) = 800, 96000/10fps = 9600 */
117#define MPEG4_VALID_DUR(x) ((x < 9600) && (x > 799))
118
119#define MAX_MPEG4_SUPPORT_SIZE (1920*1088)
120
121#define DEC_RESULT_NONE 0
122#define DEC_RESULT_DONE 1
123#define DEC_RESULT_AGAIN 2
124#define DEC_RESULT_ERROR 3
125#define DEC_RESULT_FORCE_EXIT 4
126#define DEC_RESULT_EOS 5
127#define DEC_RESULT_UNFINISH 6
128
129#define DEC_DECODE_TIMEOUT 0x21
130#define DECODE_ID(hw) (hw_to_vdec(hw)->id)
131#define DECODE_STOP_POS AV_SCRATCH_K
132static u32 udebug_flag;
133
134static struct vframe_s *vmpeg_vf_peek(void *);
135static struct vframe_s *vmpeg_vf_get(void *);
136static void vmpeg_vf_put(struct vframe_s *, void *);
137static int vmpeg_vf_states(struct vframe_states *states, void *);
138static int vmpeg_event_cb(int type, void *data, void *private_data);
139static int pre_decode_buf_level = 0x800;
140static int start_decode_buf_level = 0x4000;
141static int debug_enable;
142static unsigned int radr;
143static unsigned int rval;
144/* 0x40bit = 8byte */
145static unsigned int frmbase_cont_bitlevel = 0x40;
146static unsigned int dynamic_buf_num_margin;
147
148#define VMPEG4_DEV_NUM 9
149static unsigned int max_decode_instance_num = VMPEG4_DEV_NUM;
150static unsigned int max_process_time[VMPEG4_DEV_NUM];
151static unsigned int decode_timeout_val = 200;
152
153static u32 without_display_mode;
154
155#undef pr_info
156#define pr_info printk
157unsigned int mpeg4_debug_mask = 0xff;
158
159#define PRINT_FLAG_ERROR 0x0
160#define PRINT_FLAG_RUN_FLOW 0X0001
161#define PRINT_FLAG_TIMEINFO 0x0002
162#define PRINT_FLAG_UCODE_DETAIL 0x0004
163#define PRINT_FLAG_VLD_DETAIL 0x0008
164#define PRINT_FLAG_DEC_DETAIL 0x0010
165#define PRINT_FLAG_BUFFER_DETAIL 0x0020
166#define PRINT_FLAG_RESTORE 0x0040
167#define PRINT_FRAME_NUM 0x0080
168#define PRINT_FLAG_FORCE_DONE 0x0100
169#define PRINT_FLAG_COUNTER 0X0200
170#define PRINT_FRAMEBASE_DATA 0x0400
171#define PRINT_FLAG_VDEC_STATUS 0x0800
172#define PRINT_FLAG_TIMEOUT_STATUS 0x1000
173#define PRINT_FLAG_V4L_DETAIL 0x8000
174#define IGNORE_PARAM_FROM_CONFIG 0x8000000
175
176int mmpeg4_debug_print(int index, int debug_flag, const char *fmt, ...)
177{
178 if (((debug_enable & debug_flag) &&
179 ((1 << index) & mpeg4_debug_mask))
180 || (debug_flag == PRINT_FLAG_ERROR)) {
181 unsigned char buf[512];
182 int len = 0;
183 va_list args;
184 va_start(args, fmt);
185 len = sprintf(buf, "%d: ", index);
186 vsnprintf(buf + len, 512-len, fmt, args);
187 pr_info("%s", buf);
188 va_end(args);
189 }
190 return 0;
191}
192
193struct pic_info_t {
194 int index;
195 u32 pic_type;
196 u32 pic_info;
197 u32 pts;
198 u64 pts64;
199 bool pts_valid;
200 u32 duration;
201 u32 repeat_cnt;
202 ulong v4l_ref_buf_addr;
203};
204
205struct vdec_mpeg4_hw_s {
206 spinlock_t lock;
207 struct platform_device *platform_dev;
208 /* struct device *cma_dev; */
209
210 DECLARE_KFIFO(newframe_q, struct vframe_s *, VF_POOL_SIZE);
211 DECLARE_KFIFO(display_q, struct vframe_s *, VF_POOL_SIZE);
212 struct vframe_s vfpool[VF_POOL_SIZE];
213
214 s32 vfbuf_use[DECODE_BUFFER_NUM_MAX];
215 u32 frame_width;
216 u32 frame_height;
217 u32 frame_dur;
218 u32 frame_prog;
219
220 u32 ctx_valid;
221 u32 reg_vcop_ctrl_reg;
222 u32 reg_pic_head_info;
223 u32 reg_mpeg1_2_reg;
224 u32 reg_slice_qp;
225 u32 reg_mp4_pic_wh;
226 u32 reg_mp4_rate;
227 u32 reg_mb_info;
228 u32 reg_dc_ac_ctrl;
229 u32 reg_iqidct_control;
230 u32 reg_resync_marker_length;
231 u32 reg_rv_ai_mb_count;
232 struct timer_list check_timer;
233 u32 decode_timeout_count;
234 u32 timeout_cnt;
235 unsigned long int start_process_time;
236
237 u32 last_vld_level;
238 u8 init_flag;
239 u32 eos;
240 void *mm_blk_handle;
241
242 struct vframe_chunk_s *chunk;
243 u32 chunk_offset;
244 u32 chunk_size;
245 u32 chunk_frame_count;
246 u32 stat;
247 unsigned long buf_start;
248 u32 buf_size;
249 /*
250 unsigned long cma_alloc_addr;
251 int cma_alloc_count;
252 */
253 u32 vmpeg4_ratio;
254 u64 vmpeg4_ratio64;
255 u32 rate_detect;
256 u32 vmpeg4_rotation;
257 u32 total_frame;
258 u32 last_vop_time_inc;
259 u32 last_duration;
260 u32 last_anch_pts;
261 u32 vop_time_inc_since_last_anch;
262 u32 frame_num_since_last_anch;
263 u64 last_anch_pts_us64;
264
265 u32 last_pts;
266 u64 last_pts64;
267 u32 pts_hit;
268 u32 pts_missed;
269 u32 pts_i_hit;
270 u32 pts_i_missed;
271 struct pic_info_t pic[DECODE_BUFFER_NUM_MAX];
272 u32 canvas_spec[DECODE_BUFFER_NUM_MAX];
273#ifdef NV21
274 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][2];
275#else
276 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][3];
277#endif
278 struct dec_sysinfo vmpeg4_amstream_dec_info;
279
280 s32 refs[2];
281 int dec_result;
282 struct work_struct work;
283
284 void (*vdec_cb)(struct vdec_s *, void *);
285 void *vdec_cb_arg;
286 u32 frame_num;
287 u32 put_num;
288 u32 sys_mp4_rate;
289 u32 run_count;
290 u32 not_run_ready;
291 u32 buffer_not_ready;
292 u32 input_empty;
293 u32 peek_num;
294 u32 get_num;
295 u32 first_i_frame_ready;
296 u32 drop_frame_count;
297 u32 unstable_pts;
298 u32 last_dec_pts;
299
300 struct firmware_s *fw;
301 u32 blkmode;
302 wait_queue_head_t wait_q;
303 bool is_used_v4l;
304 void *v4l2_ctx;
305 bool v4l_params_parsed;
306 u32 buf_num;
307 u32 dynamic_buf_num_margin;
308};
309static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw);
310static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw);
311static unsigned char
312 get_data_check_sum(struct vdec_mpeg4_hw_s *hw, int size);
313
314#define PROVIDER_NAME "vdec.mpeg4"
315
316/*
317 *int query_video_status(int type, int *value);
318 */
319static const struct vframe_operations_s vf_provider_ops = {
320 .peek = vmpeg_vf_peek,
321 .get = vmpeg_vf_get,
322 .put = vmpeg_vf_put,
323 .event_cb = vmpeg_event_cb,
324 .vf_states = vmpeg_vf_states,
325};
326
327static unsigned char aspect_ratio_table[16] = {
328 PARC_FORBIDDEN,
329 PARC_SQUARE,
330 PARC_CIF,
331 PARC_10_11,
332 PARC_16_11,
333 PARC_40_33,
334 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
335 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
336 PARC_RESERVED, PARC_EXTENDED
337};
338
339static void reset_process_time(struct vdec_mpeg4_hw_s *hw);
340
341
342static int vmpeg4_get_buf_num(struct vdec_mpeg4_hw_s *hw)
343{
344 int buf_num = DECODE_BUFFER_NUM_DEF;
345
346 buf_num += hw->dynamic_buf_num_margin;
347 if (buf_num > DECODE_BUFFER_NUM_MAX)
348 buf_num = DECODE_BUFFER_NUM_MAX;
349
350 return buf_num;
351}
352
353static int vmpeg4_v4l_alloc_buff_config_canvas(struct vdec_mpeg4_hw_s *hw, int i)
354{
355 int ret;
356 u32 canvas;
357 ulong decbuf_start = 0;
358 int decbuf_y_size = 0;
359 u32 canvas_width = 0, canvas_height = 0;
360 struct vdec_s *vdec = hw_to_vdec(hw);
361 struct vdec_v4l2_buffer *fb = NULL;
362
363 if (hw->pic[i].v4l_ref_buf_addr)
364 return 0;
365
366 ret = vdec_v4l_get_buffer(hw->v4l2_ctx, &fb);
367 if (ret < 0) {
368 mmpeg4_debug_print(DECODE_ID(hw), 0,
369 "[%d] get fb fail.\n",
370 ((struct aml_vcodec_ctx *)
371 (hw->v4l2_ctx))->id);
372 return ret;
373 }
374
375 hw->pic[i].v4l_ref_buf_addr = (ulong)fb;
376 if (fb->num_planes == 1) {
377 decbuf_start = fb->m.mem[0].addr;
378 decbuf_y_size = fb->m.mem[0].offset;
379 canvas_width = ALIGN(hw->frame_width, 64);
380 canvas_height = ALIGN(hw->frame_height, 32);
381 fb->m.mem[0].bytes_used = fb->m.mem[0].size;
382 } else if (fb->num_planes == 2) {
383 decbuf_start = fb->m.mem[0].addr;
384 decbuf_y_size = fb->m.mem[0].size;
385 canvas_width = ALIGN(hw->frame_width, 64);
386 canvas_height = ALIGN(hw->frame_height, 32);
387 fb->m.mem[0].bytes_used = decbuf_y_size;
388 fb->m.mem[1].bytes_used = decbuf_y_size << 1;
389 }
390
391 mmpeg4_debug_print(DECODE_ID(hw), 0, "[%d] %s(), v4l ref buf addr: 0x%x\n",
392 ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id, __func__, fb);
393
394 if (vdec->parallel_dec == 1) {
395 u32 tmp;
396 if (canvas_y(hw->canvas_spec[i]) == 0xff) {
397 tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
398 hw->canvas_spec[i] &= ~0xff;
399 hw->canvas_spec[i] |= tmp;
400 }
401 if (canvas_u(hw->canvas_spec[i]) == 0xff) {
402 tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
403 hw->canvas_spec[i] &= ~(0xffff << 8);
404 hw->canvas_spec[i] |= tmp << 8;
405 hw->canvas_spec[i] |= tmp << 16;
406 }
407 canvas = hw->canvas_spec[i];
408 } else {
409 canvas = vdec->get_canvas(i, 2);
410 hw->canvas_spec[i] = canvas;
411 }
412
413 hw->canvas_config[i][0].phy_addr = decbuf_start;
414 hw->canvas_config[i][0].width = canvas_width;
415 hw->canvas_config[i][0].height = canvas_height;
416 hw->canvas_config[i][0].block_mode = hw->blkmode;
417 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
418 hw->canvas_config[i][0].endian = 7;
419 else
420 hw->canvas_config[i][0].endian = 0;
421 canvas_config_config(canvas_y(canvas),
422 &hw->canvas_config[i][0]);
423
424 hw->canvas_config[i][1].phy_addr =
425 decbuf_start + decbuf_y_size;
426 hw->canvas_config[i][1].width = canvas_width;
427 hw->canvas_config[i][1].height = (canvas_height >> 1);
428 hw->canvas_config[i][1].block_mode = hw->blkmode;
429 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
430 hw->canvas_config[i][1].endian = 7;
431 else
432 hw->canvas_config[i][1].endian = 0;
433 canvas_config_config(canvas_u(canvas),
434 &hw->canvas_config[i][1]);
435
436 return 0;
437}
438
439static bool is_enough_free_buffer(struct vdec_mpeg4_hw_s *hw)
440{
441 int i;
442
443 for (i = 0; i < hw->buf_num; i++) {
444 if (hw->vfbuf_use[i] == 0)
445 break;
446 }
447
448 return i == hw->buf_num ? false : true;
449}
450
451static int find_free_buffer(struct vdec_mpeg4_hw_s *hw)
452{
453 int i;
454
455 for (i = 0; i < hw->buf_num; i++) {
456 if (hw->vfbuf_use[i] == 0)
457 break;
458 }
459
460 if (i == hw->buf_num)
461 return -1;
462
463 if (hw->is_used_v4l)
464 if (vmpeg4_v4l_alloc_buff_config_canvas(hw, i))
465 return -1;
466
467 return i;
468}
469
470static int spec_to_index(struct vdec_mpeg4_hw_s *hw, u32 spec)
471{
472 int i;
473
474 for (i = 0; i < hw->buf_num; i++) {
475 if (hw->canvas_spec[i] == spec)
476 return i;
477 }
478
479 return -1;
480}
481
482static void set_frame_info(struct vdec_mpeg4_hw_s *hw, struct vframe_s *vf,
483 int buffer_index)
484{
485 int ar = 0;
486 unsigned int num = 0;
487 unsigned int den = 0;
488 unsigned int pixel_ratio = READ_VREG(MP4_PIC_RATIO);
489
490 if (hw->vmpeg4_ratio64 != 0) {
491 num = hw->vmpeg4_ratio64>>32;
492 den = hw->vmpeg4_ratio64 & 0xffffffff;
493 } else {
494 num = hw->vmpeg4_ratio>>16;
495 den = hw->vmpeg4_ratio & 0xffff;
496
497 }
498 if ((num == 0) || (den == 0)) {
499 num = 1;
500 den = 1;
501 }
502
503 if (hw->vmpeg4_ratio == 0) {
504 vf->ratio_control |= (0x90 << DISP_RATIO_ASPECT_RATIO_BIT);
505 /* always stretch to 16:9 */
506 } else if (pixel_ratio > 0x0f) {
507 num = (pixel_ratio >> 8) *
508 hw->frame_width * num;
509 ar = div_u64((pixel_ratio & 0xff) *
510 hw->frame_height * den * 0x100ULL +
511 (num >> 1), num);
512 } else {
513 switch (aspect_ratio_table[pixel_ratio]) {
514 case 0:
515 num = hw->frame_width * num;
516 ar = (hw->frame_height * den *
517 0x100 + (num >> 1)) / num;
518 break;
519 case 1:
520 num = vf->width * num;
521 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
522 break;
523 case 2:
524 num = (vf->width * 12) * num;
525 ar = (vf->height * den * 0x100 * 11 +
526 ((num) >> 1)) / num;
527 break;
528 case 3:
529 num = (vf->width * 10) * num;
530 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
531 num;
532 break;
533 case 4:
534 num = (vf->width * 16) * num;
535 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
536 num;
537 break;
538 case 5:
539 num = (vf->width * 40) * num;
540 ar = (vf->height * den * 0x100 * 33 + (num >> 1)) /
541 num;
542 break;
543 default:
544 num = vf->width * num;
545 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
546 break;
547 }
548 }
549
550 ar = min(ar, DISP_RATIO_ASPECT_RATIO_MAX);
551
552 vf->signal_type = 0;
553 vf->type_original = vf->type;
554 vf->ratio_control = (ar << DISP_RATIO_ASPECT_RATIO_BIT);
555 vf->canvas0Addr = vf->canvas1Addr = -1;
556#ifdef NV21
557 vf->plane_num = 2;
558#else
559 vf->plane_num = 3;
560#endif
561 vf->canvas0_config[0] = hw->canvas_config[buffer_index][0];
562 vf->canvas0_config[1] = hw->canvas_config[buffer_index][1];
563#ifndef NV21
564 vf->canvas0_config[2] = hw->canvas_config[buffer_index][2];
565#endif
566 vf->canvas1_config[0] = hw->canvas_config[buffer_index][0];
567 vf->canvas1_config[1] = hw->canvas_config[buffer_index][1];
568#ifndef NV21
569 vf->canvas1_config[2] = hw->canvas_config[buffer_index][2];
570#endif
571}
572
573static inline void vmpeg4_save_hw_context(struct vdec_mpeg4_hw_s *hw)
574{
575 hw->reg_mpeg1_2_reg = READ_VREG(MPEG1_2_REG);
576 hw->reg_vcop_ctrl_reg = READ_VREG(VCOP_CTRL_REG);
577 hw->reg_pic_head_info = READ_VREG(PIC_HEAD_INFO);
578 hw->reg_slice_qp = READ_VREG(SLICE_QP);
579 hw->reg_mp4_pic_wh = READ_VREG(MP4_PIC_WH);
580 hw->reg_mp4_rate = READ_VREG(MP4_RATE);
581 hw->reg_mb_info = READ_VREG(MB_INFO);
582 hw->reg_dc_ac_ctrl = READ_VREG(DC_AC_CTRL);
583 hw->reg_iqidct_control = READ_VREG(IQIDCT_CONTROL);
584 hw->reg_resync_marker_length = READ_VREG(RESYNC_MARKER_LENGTH);
585 hw->reg_rv_ai_mb_count = READ_VREG(RV_AI_MB_COUNT);
586}
587
588static int update_ref(struct vdec_mpeg4_hw_s *hw, int index)
589{
590 hw->vfbuf_use[index]++;
591
592 if (hw->refs[1] == -1) {
593 hw->refs[1] = index;
594 index = -1;
595 } else if (hw->refs[0] == -1) {
596 hw->refs[0] = hw->refs[1];
597 hw->refs[1] = index;
598 index = hw->refs[0];
599 } else {
600 hw->vfbuf_use[hw->refs[0]]--;
601 hw->refs[0] = hw->refs[1];
602 hw->refs[1] = index;
603 index = hw->refs[0];
604 }
605
606 return index;
607}
608
609static int prepare_display_buf(struct vdec_mpeg4_hw_s * hw,
610 struct pic_info_t *pic)
611{
612 struct vframe_s *vf = NULL;
613 struct vdec_s *vdec = hw_to_vdec(hw);
614 int index = pic->index;
615
616 if (pic->pic_info & INTERLACE_FLAG) {
617 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
618 mmpeg4_debug_print(DECODE_ID(hw), 0,
619 "fatal error, no available buffer slot.");
620 return -1;
621 }
622
623 if (hw->is_used_v4l) {
624 vf->v4l_mem_handle
625 = hw->pic[index].v4l_ref_buf_addr;
626 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL,
627 "[%d] %s(), v4l mem handle: 0x%lx\n",
628 ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id,
629 __func__, vf->v4l_mem_handle);
630 }
631
632 vf->index = pic->index;
633 vf->width = hw->frame_width;
634 vf->height = hw->frame_height;
635 vf->bufWidth = 1920;
636 vf->flag = 0;
637 vf->orientation = hw->vmpeg4_rotation;
638 vf->pts = pic->pts;
639 vf->pts_us64 = pic->pts64;
640 vf->duration = pic->duration >> 1;
641 vf->duration_pulldown = 0;
642 vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ?
643 VIDTYPE_INTERLACE_TOP : VIDTYPE_INTERLACE_BOTTOM;
644#ifdef NV21
645 vf->type |= VIDTYPE_VIU_NV21;
646#endif
647 set_frame_info(hw, vf, pic->index);
648
649 hw->vfbuf_use[pic->index]++;
650 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
651 "field0: pts %d, pts64 %lld, w %d, h %d, dur %d\n",
652 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
653
654 if ((hw->first_i_frame_ready == 0)
655 && (pic->pic_type != I_PICTURE)) {
656 hw->drop_frame_count++;
657 hw->vfbuf_use[index]--;
658 kfifo_put(&hw->newframe_q,
659 (const struct vframe_s *)vf);
660 return 0;
661 } else {
662 vf->mem_handle =
663 decoder_bmmu_box_get_mem_handle(
664 hw->mm_blk_handle, index);
665 kfifo_put(&hw->display_q,
666 (const struct vframe_s *)vf);
667 ATRACE_COUNTER(MODULE_NAME, vf->pts);
668 vdec->vdec_fps_detec(vdec->id);
669 hw->frame_num++;
670 if (without_display_mode == 0) {
671 vf_notify_receiver(vdec->vf_provider_name,
672 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
673 } else
674 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
675 }
676
677 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
678 mmpeg4_debug_print(DECODE_ID(hw), 0,
679 "error, no available buf.\n");
680 hw->dec_result = DEC_RESULT_ERROR;
681 return -1;
682 }
683
684 vf->index = pic->index;
685 vf->width = hw->frame_width;
686 vf->height = hw->frame_height;
687 vf->bufWidth = 1920;
688 vf->flag = 0;
689 vf->orientation = hw->vmpeg4_rotation;
690 vf->pts = 0;
691 vf->pts_us64 = 0;
692 vf->duration = pic->duration >> 1;
693 vf->duration_pulldown = 0;
694 vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ?
695 VIDTYPE_INTERLACE_BOTTOM : VIDTYPE_INTERLACE_TOP;
696#ifdef NV21
697 vf->type |= VIDTYPE_VIU_NV21;
698#endif
699 set_frame_info(hw, vf, pic->index);
700
701 hw->vfbuf_use[pic->index]++;
702 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
703 "filed1: pts %d, pts64 %lld, w %d, h %d, dur: %d\n",
704 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
705 if ((hw->first_i_frame_ready == 0) &&
706 (pic->pic_type != I_PICTURE)) {
707 hw->drop_frame_count++;
708 hw->vfbuf_use[index]--;
709 kfifo_put(&hw->newframe_q,
710 (const struct vframe_s *)vf);
711 } else {
712 vf->mem_handle =
713 decoder_bmmu_box_get_mem_handle(
714 hw->mm_blk_handle, index);
715 kfifo_put(&hw->display_q,
716 (const struct vframe_s *)vf);
717 ATRACE_COUNTER(MODULE_NAME, vf->pts);
718 vdec->vdec_fps_detec(vdec->id);
719 decoder_do_frame_check(vdec, vf);
720 hw->frame_num++;
721 if (without_display_mode == 0) {
722 vf_notify_receiver(vdec->vf_provider_name,
723 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
724 } else
725 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
726 }
727 } else {
728 /* progressive */
729 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
730 mmpeg4_debug_print(DECODE_ID(hw), 0,
731 "error, no available buf\n");
732 hw->dec_result = DEC_RESULT_ERROR;
733 return -1;
734 }
735
736 if (hw->is_used_v4l) {
737 vf->v4l_mem_handle
738 = hw->pic[index].v4l_ref_buf_addr;
739 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL,
740 "[%d] %s(), v4l mem handle: 0x%lx\n",
741 ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id,
742 __func__, vf->v4l_mem_handle);
743 }
744
745 vf->index = index;
746 vf->width = hw->frame_width;
747 vf->height = hw->frame_height;
748 vf->bufWidth = 1920;
749 vf->flag = 0;
750 vf->orientation = hw->vmpeg4_rotation;
751 vf->pts = pic->pts;
752 vf->pts_us64 = pic->pts64;
753 vf->duration = pic->duration;
754 vf->duration_pulldown = pic->repeat_cnt *
755 pic->duration;
756#ifdef NV21
757 vf->type = VIDTYPE_PROGRESSIVE |
758 VIDTYPE_VIU_FIELD | VIDTYPE_VIU_NV21;
759#else
760 vf->type = VIDTYPE_PROGRESSIVE |
761 VIDTYPE_VIU_FIELD;
762#endif
763 set_frame_info(hw, vf, index);
764
765 hw->vfbuf_use[index]++;
766 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
767 "prog: pts %d, pts64 %lld, w %d, h %d, dur %d\n",
768 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
769
770 if ((hw->first_i_frame_ready == 0) &&
771 (pic->pic_type != I_PICTURE)) {
772 hw->drop_frame_count++;
773 hw->vfbuf_use[index]--;
774 kfifo_put(&hw->newframe_q,
775 (const struct vframe_s *)vf);
776 } else {
777 vf->mem_handle =
778 decoder_bmmu_box_get_mem_handle(
779 hw->mm_blk_handle, index);
780 kfifo_put(&hw->display_q,
781 (const struct vframe_s *)vf);
782 ATRACE_COUNTER(MODULE_NAME, vf->pts);
783 vdec->vdec_fps_detec(vdec->id);
784 decoder_do_frame_check(vdec, vf);
785 hw->frame_num++;
786
787 if (without_display_mode == 0) {
788 vf_notify_receiver(vdec->vf_provider_name,
789 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
790 } else
791 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
792 }
793
794 }
795 return 0;
796}
797
798static void vmpeg4_prepare_input(struct vdec_mpeg4_hw_s *hw)
799{
800 struct vdec_s *vdec = hw_to_vdec(hw);
801 struct vdec_input_s *input = &vdec->input;
802 struct vframe_block_list_s *block = NULL;
803 struct vframe_chunk_s *chunk = hw->chunk;
804 int dummy;
805
806 if (chunk == NULL)
807 return;
808
809 /* full reset to HW input */
810 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0);
811
812 /* reset VLD fifo for all vdec */
813 WRITE_VREG(DOS_SW_RESET0, (1<<5) | (1<<4) | (1<<3));
814 WRITE_VREG(DOS_SW_RESET0, 0);
815
816 dummy = READ_RESET_REG(RESET0_REGISTER);
817 WRITE_VREG(POWER_CTL_VLD, 1 << 4);
818
819 /*
820 *setup HW decoder input buffer (VLD context)
821 * based on input->type and input->target
822 */
823 if (input_frame_based(input)) {
824 block = chunk->block;
825
826 WRITE_VREG(VLD_MEM_VIFIFO_START_PTR, block->start);
827 WRITE_VREG(VLD_MEM_VIFIFO_END_PTR, block->start +
828 block->size - 8);
829 WRITE_VREG(VLD_MEM_VIFIFO_CURR_PTR,
830 round_down(block->start + hw->chunk_offset,
831 VDEC_FIFO_ALIGN));
832
833 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 1);
834 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0);
835
836 /* set to manual mode */
837 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2);
838 WRITE_VREG(VLD_MEM_VIFIFO_RP,
839 round_down(block->start + hw->chunk_offset,
840 VDEC_FIFO_ALIGN));
841 dummy = hw->chunk_offset + hw->chunk_size +
842 VLD_PADDING_SIZE;
843 if (dummy >= block->size)
844 dummy -= block->size;
845 WRITE_VREG(VLD_MEM_VIFIFO_WP,
846 round_down(block->start + dummy,
847 VDEC_FIFO_ALIGN));
848
849 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 3);
850 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2);
851
852 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL,
853 (0x11 << 16) | (1<<10) | (7<<3));
854
855 }
856}
857
858static irqreturn_t vmpeg4_isr_thread_fn(struct vdec_s *vdec, int irq)
859{
860 u32 reg;
861 u32 picture_type;
862 int index;
863 u32 pts, offset = 0;
864 u64 pts_us64 = 0;
865 u32 frame_size, dec_w, dec_h;
866 u32 time_increment_resolution, fixed_vop_rate, vop_time_inc;
867 u32 repeat_cnt, duration = 3200;
868 struct pic_info_t *dec_pic, *disp_pic;
869 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)(vdec->private);
870
871 if (hw->eos)
872 return IRQ_HANDLED;
873
874 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
875 if (READ_VREG(AV_SCRATCH_M) != 0 &&
876 (debug_enable & PRINT_FLAG_UCODE_DETAIL)) {
877 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_UCODE_DETAIL,
878 "dbg %x: %x, level %x, wp %x, rp %x, cnt %x\n",
879 READ_VREG(AV_SCRATCH_M), READ_VREG(AV_SCRATCH_N),
880 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
881 READ_VREG(VLD_MEM_VIFIFO_WP),
882 READ_VREG(VLD_MEM_VIFIFO_RP),
883 READ_VREG(VIFF_BIT_CNT));
884 WRITE_VREG(AV_SCRATCH_M, 0);
885 return IRQ_HANDLED;
886 }
887 reg = READ_VREG(MREG_BUFFEROUT);
888
889 time_increment_resolution = READ_VREG(MP4_RATE);
890 fixed_vop_rate = time_increment_resolution >> 16;
891 time_increment_resolution &= 0xffff;
892 if (time_increment_resolution > 0 &&
893 fixed_vop_rate == 0)
894 hw->sys_mp4_rate = time_increment_resolution;
895
896 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
897 if ((fixed_vop_rate != 0) &&
898 (time_increment_resolution != 0)) {
899 hw->vmpeg4_amstream_dec_info.rate = fixed_vop_rate *
900 DURATION_UNIT / time_increment_resolution;
901 } else if (time_increment_resolution == 0
902 && hw->sys_mp4_rate > 0)
903 time_increment_resolution = hw->sys_mp4_rate;
904 }
905 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL,
906 "time_inc_res = %d, fixed_vop_rate = %d, rate = %d\n",
907 time_increment_resolution, fixed_vop_rate,
908 hw->vmpeg4_amstream_dec_info.rate);
909
910 if (reg == 2) {
911 /* timeout when decoding next frame */
912
913 /* for frame based case, insufficient result may happen
914 * at the beginning when only VOL head is available save
915 * HW context also, such as for the QTable from VCOP register
916 */
917 mmpeg4_debug_print(DECODE_ID(hw),
918 PRINT_FLAG_VLD_DETAIL,
919 "%s, level = %x, vfifo_ctrl = %x, bitcnt = %d\n",
920 __func__,
921 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
922 READ_VREG(VLD_MEM_VIFIFO_CONTROL),
923 READ_VREG(VIFF_BIT_CNT));
924
925 if (vdec_frame_based(vdec)) {
926 vmpeg4_save_hw_context(hw);
927 hw->dec_result = DEC_RESULT_DONE;
928 vdec_schedule_work(&hw->work);
929 } else {
930 reset_process_time(hw);
931 hw->dec_result = DEC_RESULT_AGAIN;
932 vdec_schedule_work(&hw->work);
933 }
934 return IRQ_HANDLED;
935 } else {
936 reset_process_time(hw);
937 picture_type = (reg >> 3) & 7;
938 repeat_cnt = READ_VREG(MP4_NOT_CODED_CNT);
939 vop_time_inc = READ_VREG(MP4_VOP_TIME_INC);
940
941 index = spec_to_index(hw, READ_VREG(REC_CANVAS_ADDR));
942 if (index < 0) {
943 mmpeg4_debug_print(DECODE_ID(hw), 0,
944 "invalid buffer index %d. rec = %x\n",
945 index, READ_VREG(REC_CANVAS_ADDR));
946 hw->dec_result = DEC_RESULT_ERROR;
947 vdec_schedule_work(&hw->work);
948 return IRQ_HANDLED;
949 }
950 hw->dec_result = DEC_RESULT_DONE;
951 dec_pic = &hw->pic[index];
952 dec_pic->pts_valid = false;
953 dec_pic->pts = 0;
954 dec_pic->pts64 = 0;
955 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
956 "new pic: index=%d, used=%d, repeat=%d, time_inc=%d\n",
957 index, hw->vfbuf_use[index], repeat_cnt, vop_time_inc);
958
959 dec_w = READ_VREG(MP4_PIC_WH)>> 16;
960 dec_h = READ_VREG(MP4_PIC_WH) & 0xffff;
961 if (dec_w != 0)
962 hw->frame_width = dec_w;
963 if (dec_h != 0)
964 hw->frame_height = dec_h;
965
966 if (hw->is_used_v4l) {
967 struct aml_vcodec_ctx *ctx =
968 (struct aml_vcodec_ctx *)(hw->v4l2_ctx);
969
970 if (ctx->param_sets_from_ucode && !hw->v4l_params_parsed) {
971 struct aml_vdec_ps_infos ps;
972
973 ps.visible_width = hw->frame_width;
974 ps.visible_height = hw->frame_height;
975 ps.coded_width = ALIGN(hw->frame_width, 64);
976 ps.coded_height = ALIGN(hw->frame_height, 64);
977 ps.dpb_size = hw->buf_num;
978 hw->v4l_params_parsed = true;
979 vdec_v4l_set_ps_infos(ctx, &ps);
980 }
981
982 if (!ctx->v4l_codec_ready)
983 return IRQ_HANDLED;
984 }
985
986 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
987 if (vop_time_inc < hw->last_vop_time_inc) {
988 duration = vop_time_inc +
989 time_increment_resolution -
990 hw->last_vop_time_inc;
991 } else {
992 duration = vop_time_inc -
993 hw->last_vop_time_inc;
994 }
995
996 if (duration == hw->last_duration) {
997 hw->rate_detect++;
998 if ((hw->rate_detect >= RATE_DETECT_COUNT) &&
999 (time_increment_resolution != 0)) {
1000 hw->vmpeg4_amstream_dec_info.rate =
1001 duration * DURATION_UNIT /
1002 time_increment_resolution;
1003 duration =
1004 hw->vmpeg4_amstream_dec_info.rate;
1005 }
1006 } else {
1007 hw->rate_detect = 0;
1008 hw->last_duration = duration;
1009 }
1010 if (MPEG4_VALID_DUR(duration)) {
1011 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1012 "warn: duration %x, set 0\n", duration);
1013 duration = 0;
1014 }
1015 } else {
1016 duration = hw->vmpeg4_amstream_dec_info.rate;
1017#if 0
1018 pr_info("info rate = %d, ucode rate = 0x%x:0x%x\n",
1019 hw->vmpeg4_amstream_dec_info.rate,
1020 READ_VREG(MP4_RATE), vop_time_inc);
1021#endif
1022 }
1023
1024 /* frame mode with unstable pts */
1025 if (hw->unstable_pts && hw->chunk) {
1026 dec_pic->pts_valid = hw->chunk->pts_valid;
1027 dec_pic->pts = hw->chunk->pts;
1028 dec_pic->pts64 = hw->chunk->pts64;
1029 if ((B_PICTURE == picture_type) ||
1030 (hw->last_dec_pts == dec_pic->pts))
1031 dec_pic->pts_valid = 0;
1032
1033 hw->last_dec_pts = dec_pic->pts;
1034 } else if ((I_PICTURE == picture_type) ||
1035 (P_PICTURE == picture_type)) {
1036 offset = READ_VREG(MP4_OFFSET_REG);
1037 if (hw->chunk) {
1038 dec_pic->pts_valid = hw->chunk->pts_valid;
1039 dec_pic->pts = hw->chunk->pts;
1040 dec_pic->pts64 = hw->chunk->pts64;
1041 } else {
1042 if (pts_lookup_offset_us64(PTS_TYPE_VIDEO, offset,
1043 &pts, &frame_size, 3000, &pts_us64) == 0) {
1044 dec_pic->pts_valid = true;
1045 dec_pic->pts = pts;
1046 dec_pic->pts64 = pts_us64;
1047 hw->pts_hit++;
1048 } else {
1049 dec_pic->pts_valid = false;
1050 hw->pts_missed++;
1051 }
1052 }
1053 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1054 "%c, offset=0x%x, pts=0x%x(%d), index=%d, used=%d\n",
1055 GET_PIC_TYPE(picture_type), offset, dec_pic->pts,
1056 dec_pic->pts_valid, index, hw->vfbuf_use[index]);
1057 }
1058
1059 dec_pic->index = index;
1060 dec_pic->pic_info = reg;
1061 dec_pic->pic_type = picture_type;
1062 dec_pic->duration = duration;
1063 hw->vfbuf_use[index] = 0;
1064 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1065 "mmpeg4: pic_num: %d, index %d, type %c, pts %x\n",
1066 hw->frame_num, index,
1067 GET_PIC_TYPE(picture_type),
1068 dec_pic->pts);
1069
1070 /* buffer management */
1071 if ((picture_type == I_PICTURE) ||
1072 (picture_type == P_PICTURE)) {
1073 index = update_ref(hw, index);
1074 } else {
1075 /* drop B frame or disp immediately.
1076 * depend on if there are two ref frames
1077 */
1078 if (hw->refs[1] == -1)
1079 index = -1;
1080 }
1081 vmpeg4_save_hw_context(hw);
1082 if (index < 0) {
1083 vdec_schedule_work(&hw->work);
1084 return IRQ_HANDLED;
1085 }
1086 disp_pic = &hw->pic[index];
1087 if ((hw->first_i_frame_ready == 0) &&
1088 (I_PICTURE == disp_pic->pic_type))
1089 hw->first_i_frame_ready = 1;
1090
1091 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1092 "disp: index=%d, pts=%x(%d), used=%d, picout=%c(dec=%c)\n",
1093 index, disp_pic->pts, disp_pic->pts_valid,
1094 hw->vfbuf_use[index],
1095 GET_PIC_TYPE(disp_pic->pic_type),
1096 GET_PIC_TYPE(picture_type));
1097
1098 if (disp_pic->pts_valid) {
1099 hw->last_anch_pts = disp_pic->pts;
1100 hw->last_anch_pts_us64 = disp_pic->pts64;
1101 hw->frame_num_since_last_anch = 0;
1102 hw->vop_time_inc_since_last_anch = 0;
1103 } else if (vdec_stream_based(vdec)) {
1104 disp_pic->pts = hw->last_anch_pts;
1105 disp_pic->pts64 = hw->last_anch_pts_us64;
1106
1107 if ((time_increment_resolution != 0) &&
1108 (fixed_vop_rate == 0) &&
1109 (hw->vmpeg4_amstream_dec_info.rate == 0)) {
1110 /* variable PTS rate */
1111 /*bug on variable pts calc,
1112 *do as dixed vop first if we
1113 *have rate setting before.
1114 */
1115 if (vop_time_inc > hw->last_vop_time_inc) {
1116 duration = vop_time_inc -
1117 hw->last_vop_time_inc;
1118 } else {
1119 duration = vop_time_inc +
1120 time_increment_resolution -
1121 hw->last_vop_time_inc;
1122 }
1123
1124 hw->vop_time_inc_since_last_anch += duration;
1125
1126 disp_pic->pts += hw->vop_time_inc_since_last_anch *
1127 PTS_UNIT / time_increment_resolution;
1128 disp_pic->pts64 += (hw->vop_time_inc_since_last_anch *
1129 PTS_UNIT / time_increment_resolution) *
1130 100 / 9;
1131
1132 if (hw->vop_time_inc_since_last_anch >
1133 (1 << 14)) {
1134 /* avoid overflow */
1135 hw->last_anch_pts = disp_pic->pts;
1136 hw->last_anch_pts_us64 = disp_pic->pts64;
1137 hw->vop_time_inc_since_last_anch = 0;
1138 }
1139 } else {
1140 /* fixed VOP rate */
1141 hw->frame_num_since_last_anch++;
1142 disp_pic->pts += DUR2PTS(hw->frame_num_since_last_anch *
1143 hw->vmpeg4_amstream_dec_info.rate);
1144 disp_pic->pts64 += DUR2PTS(
1145 hw->frame_num_since_last_anch *
1146 hw->vmpeg4_amstream_dec_info.rate) * 100 / 9;
1147
1148 if (hw->frame_num_since_last_anch > (1 << 15)) {
1149 /* avoid overflow */
1150 hw->last_anch_pts = disp_pic->pts;
1151 hw->last_anch_pts_us64 = disp_pic->pts64;
1152 hw->frame_num_since_last_anch = 0;
1153 }
1154 }
1155 } else if (hw->unstable_pts && hw->chunk &&
1156 MPEG4_VALID_DUR(duration)) {
1157 /* invalid pts calc */
1158 hw->frame_num_since_last_anch = hw->chunk_frame_count;
1159 disp_pic->pts = hw->last_anch_pts +
1160 DUR2PTS(hw->frame_num_since_last_anch *
1161 duration);
1162 disp_pic->pts64 = hw->last_anch_pts_us64 +
1163 DUR2PTS(hw->frame_num_since_last_anch *
1164 duration) * 100 / 9;
1165
1166 if (hw->frame_num_since_last_anch > (1 << 15)) {
1167 /* avoid overflow */
1168 hw->last_anch_pts = disp_pic->pts;
1169 hw->last_anch_pts_us64 = disp_pic->pts64;
1170 hw->frame_num_since_last_anch = 0;
1171 } else
1172 disp_pic->pts_valid = 1;
1173 }
1174
1175 if (vdec_frame_based(vdec) &&
1176 (hw->unstable_pts) &&
1177 MPEG4_VALID_DUR(duration)) {
1178
1179 u32 threshold = DUR2PTS(duration) >> 3;
1180
1181 if (disp_pic->pts <= (hw->last_pts + threshold)) {
1182 disp_pic->pts = hw->last_pts + DUR2PTS(duration);
1183 disp_pic->pts64 = hw->last_pts64 +
1184 (DUR2PTS(duration)*100/9);
1185 }
1186 if (!disp_pic->pts_valid) {
1187 disp_pic->pts = 0;
1188 disp_pic->pts64 = 0;
1189 }
1190 }
1191 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1192 "disp: pic_type %c, pts %d(%lld), diff %d, cnt %d\n",
1193 GET_PIC_TYPE(disp_pic->pic_type),
1194 disp_pic->pts,
1195 disp_pic->pts64,
1196 disp_pic->pts - hw->last_pts,
1197 hw->chunk_frame_count);
1198 hw->last_pts = disp_pic->pts;
1199 hw->last_pts64 = disp_pic->pts64;
1200 hw->frame_dur = duration;
1201 disp_pic->duration = duration;
1202 disp_pic->repeat_cnt = repeat_cnt;
1203
1204 prepare_display_buf(hw, disp_pic);
1205
1206 hw->total_frame += repeat_cnt + 1;
1207 hw->last_vop_time_inc = vop_time_inc;
1208
1209 if (vdec_frame_based(vdec) &&
1210 (frmbase_cont_bitlevel != 0) &&
1211 (hw->first_i_frame_ready)) {
1212 u32 consume_byte, res_byte, bitcnt;
1213
1214 bitcnt = READ_VREG(VIFF_BIT_CNT);
1215 res_byte = bitcnt >> 3;
1216
1217 if (hw->chunk_size > res_byte) {
1218 if (bitcnt > frmbase_cont_bitlevel) {
1219 consume_byte = hw->chunk_size - res_byte;
1220
1221 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1222 "%s, size %d, consume %d, res %d\n", __func__,
1223 hw->chunk_size, consume_byte, res_byte);
1224
1225 if (consume_byte > VDEC_FIFO_ALIGN) {
1226 consume_byte -= VDEC_FIFO_ALIGN;
1227 res_byte += VDEC_FIFO_ALIGN;
1228 }
1229 hw->chunk_offset += consume_byte;
1230 hw->chunk_size = res_byte;
1231 hw->dec_result = DEC_RESULT_UNFINISH;
1232 hw->chunk_frame_count++;
1233 hw->unstable_pts = 1;
1234 } else {
1235 hw->chunk_size = 0;
1236 hw->chunk_offset = 0;
1237 }
1238 } else {
1239 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1240 "error: bitbyte %d hw->chunk_size %d\n", res_byte, hw->chunk_size);
1241 hw->chunk_size = 0;
1242 hw->chunk_offset = 0;
1243 }
1244 }
1245 vdec_schedule_work(&hw->work);
1246 }
1247 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
1248 "%s: frame num:%d\n", __func__, hw->frame_num);
1249
1250 return IRQ_HANDLED;
1251}
1252
1253static irqreturn_t vmpeg4_isr(struct vdec_s *vdec, int irq)
1254{
1255 struct vdec_mpeg4_hw_s *hw =
1256 (struct vdec_mpeg4_hw_s *)(vdec->private);
1257
1258 if (hw->eos)
1259 return IRQ_HANDLED;
1260
1261 return IRQ_WAKE_THREAD;
1262}
1263
1264static void flush_output(struct vdec_mpeg4_hw_s * hw)
1265{
1266 struct pic_info_t *pic;
1267
1268 if (hw->vfbuf_use[hw->refs[1]] > 0) {
1269 pic = &hw->pic[hw->refs[1]];
1270 prepare_display_buf(hw, pic);
1271 }
1272}
1273
1274static int notify_v4l_eos(struct vdec_s *vdec)
1275{
1276 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1277 struct aml_vcodec_ctx *ctx = (struct aml_vcodec_ctx *)(hw->v4l2_ctx);
1278 struct vframe_s *vf = NULL;
1279 struct vdec_v4l2_buffer *fb = NULL;
1280
1281 if (hw->is_used_v4l && hw->eos) {
1282 if (kfifo_get(&hw->newframe_q, &vf) == 0 || vf == NULL) {
1283 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1284 "%s fatal error, no available buffer slot.\n",
1285 __func__);
1286 return -1;
1287 }
1288
1289 if (vdec_v4l_get_buffer(hw->v4l2_ctx, &fb)) {
1290 pr_err("[%d] get fb fail.\n", ctx->id);
1291 return -1;
1292 }
1293
1294 vf->timestamp = ULONG_MAX;
1295 vf->v4l_mem_handle = (unsigned long)fb;
1296 vf->flag = VFRAME_FLAG_EMPTY_FRAME_V4L;
1297
1298 kfifo_put(&hw->display_q, (const struct vframe_s *)vf);
1299 vf_notify_receiver(vdec->vf_provider_name,
1300 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
1301
1302 pr_info("[%d] mpeg4 EOS notify.\n", ctx->id);
1303 }
1304
1305 return 0;
1306}
1307
1308static void vmpeg4_work(struct work_struct *work)
1309{
1310 struct vdec_mpeg4_hw_s *hw =
1311 container_of(work, struct vdec_mpeg4_hw_s, work);
1312 struct vdec_s *vdec = hw_to_vdec(hw);
1313
1314 /* finished decoding one frame or error,
1315 * notify vdec core to switch context
1316 */
1317 if (hw->dec_result != DEC_RESULT_DONE)
1318 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1319 "vmpeg4_work: result=%d,status=%d\n",
1320 hw->dec_result, hw_to_vdec(hw)->next_status);
1321
1322 if (hw->dec_result == DEC_RESULT_UNFINISH) {
1323 if (!hw->ctx_valid)
1324 hw->ctx_valid = 1;
1325
1326 } else if ((hw->dec_result == DEC_RESULT_DONE) ||
1327 ((input_frame_based(&vdec->input)) && hw->chunk)) {
1328 if (!hw->ctx_valid)
1329 hw->ctx_valid = 1;
1330
1331 vdec_vframe_dirty(vdec, hw->chunk);
1332 hw->chunk = NULL;
1333 } else if (hw->dec_result == DEC_RESULT_AGAIN
1334 && (vdec->next_status != VDEC_STATUS_DISCONNECTED)) {
1335 /*
1336 stream base: stream buf empty or timeout
1337 frame base: vdec_prepare_input fail
1338 */
1339 if (!vdec_has_more_input(vdec)) {
1340 hw->dec_result = DEC_RESULT_EOS;
1341 vdec_schedule_work(&hw->work);
1342 return;
1343 }
1344 } else if (hw->dec_result == DEC_RESULT_FORCE_EXIT) {
1345 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1346 "%s: force exit\n", __func__);
1347 if (hw->stat & STAT_ISR_REG) {
1348 amvdec_stop();
1349 vdec_free_irq(VDEC_IRQ_1, (void *)hw);
1350 hw->stat &= ~STAT_ISR_REG;
1351 }
1352 } else if (hw->dec_result == DEC_RESULT_EOS) {
1353 hw->eos = 1;
1354 if (hw->stat & STAT_VDEC_RUN) {
1355 amvdec_stop();
1356 hw->stat &= ~STAT_VDEC_RUN;
1357 }
1358 vdec_vframe_dirty(vdec, hw->chunk);
1359 hw->chunk = NULL;
1360 vdec_clean_input(vdec);
1361 flush_output(hw);
1362
1363 if (hw->is_used_v4l)
1364 notify_v4l_eos(vdec);
1365
1366 mmpeg4_debug_print(DECODE_ID(hw), 0,
1367 "%s: eos flushed, frame_num %d\n",
1368 __func__, hw->frame_num);
1369 }
1370
1371 if (hw->stat & STAT_VDEC_RUN) {
1372 amvdec_stop();
1373 hw->stat &= ~STAT_VDEC_RUN;
1374 }
1375 /*disable mbox interrupt */
1376 WRITE_VREG(ASSIST_MBOX1_MASK, 0);
1377 del_timer_sync(&hw->check_timer);
1378 hw->stat &= ~STAT_TIMER_ARM;
1379
1380 /* mark itself has all HW resource released and input released */
1381 if (vdec->parallel_dec == 1)
1382 vdec_core_finish_run(vdec, CORE_MASK_VDEC_1);
1383 else
1384 vdec_core_finish_run(vdec, CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
1385
1386 wake_up_interruptible(&hw->wait_q);
1387 if (hw->vdec_cb)
1388 hw->vdec_cb(vdec, hw->vdec_cb_arg);
1389}
1390
1391static struct vframe_s *vmpeg_vf_peek(void *op_arg)
1392{
1393 struct vframe_s *vf;
1394 struct vdec_s *vdec = op_arg;
1395 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1396
1397 if (!hw)
1398 return NULL;
1399 hw->peek_num++;
1400 if (kfifo_peek(&hw->display_q, &vf))
1401 return vf;
1402
1403 return NULL;
1404}
1405
1406static struct vframe_s *vmpeg_vf_get(void *op_arg)
1407{
1408 struct vframe_s *vf;
1409 struct vdec_s *vdec = op_arg;
1410 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1411 hw->get_num++;
1412 if (kfifo_get(&hw->display_q, &vf))
1413 return vf;
1414
1415 return NULL;
1416}
1417
1418static void vmpeg_vf_put(struct vframe_s *vf, void *op_arg)
1419{
1420 struct vdec_s *vdec = op_arg;
1421 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1422
1423 hw->vfbuf_use[vf->index]--;
1424 hw->put_num++;
1425 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
1426 "%s: put num:%d\n",__func__, hw->put_num);
1427 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
1428 "index=%d, used=%d\n", vf->index, hw->vfbuf_use[vf->index]);
1429 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1430}
1431
1432static int vmpeg_event_cb(int type, void *data, void *private_data)
1433{
1434 return 0;
1435}
1436
1437static int vmpeg_vf_states(struct vframe_states *states, void *op_arg)
1438{
1439 unsigned long flags;
1440 struct vdec_s *vdec = op_arg;
1441 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1442
1443 spin_lock_irqsave(&hw->lock, flags);
1444
1445 states->vf_pool_size = VF_POOL_SIZE;
1446 states->buf_free_num = kfifo_len(&hw->newframe_q);
1447 states->buf_avail_num = kfifo_len(&hw->display_q);
1448 states->buf_recycle_num = 0;
1449
1450 spin_unlock_irqrestore(&hw->lock, flags);
1451
1452 return 0;
1453}
1454
1455
1456static int dec_status(struct vdec_s *vdec, struct vdec_info *vstatus)
1457{
1458 struct vdec_mpeg4_hw_s *hw =
1459 (struct vdec_mpeg4_hw_s *)vdec->private;
1460
1461 if (!hw)
1462 return -1;
1463
1464 vstatus->frame_width = hw->frame_width;
1465 vstatus->frame_height = hw->frame_height;
1466 if (0 != hw->vmpeg4_amstream_dec_info.rate)
1467 vstatus->frame_rate = DURATION_UNIT /
1468 hw->vmpeg4_amstream_dec_info.rate;
1469 else
1470 vstatus->frame_rate = DURATION_UNIT;
1471 vstatus->error_count = READ_VREG(MP4_ERR_COUNT);
1472 vstatus->status = hw->stat;
1473 vstatus->frame_dur = hw->frame_dur;
1474 snprintf(vstatus->vdec_name, sizeof(vstatus->vdec_name),
1475 "%s", DRIVER_NAME);
1476
1477 return 0;
1478}
1479
1480/****************************************/
1481static int vmpeg4_canvas_init(struct vdec_mpeg4_hw_s *hw)
1482{
1483 int i, ret;
1484 u32 canvas_width, canvas_height;
1485 u32 decbuf_size, decbuf_y_size;
1486 struct vdec_s *vdec = hw_to_vdec(hw);
1487 unsigned long decbuf_start;
1488
1489 if (buf_size <= 0x00400000) {
1490 /* SD only */
1491 canvas_width = 768;
1492 canvas_height = 576;
1493 decbuf_y_size = 0x80000;
1494 decbuf_size = 0x100000;
1495 } else {
1496 int w = 1920;
1497 int h = 1088;
1498 int align_w, align_h;
1499 int max, min;
1500
1501 align_w = ALIGN(w, 64);
1502 align_h = ALIGN(h, 64);
1503 if (align_w > align_h) {
1504 max = align_w;
1505 min = align_h;
1506 } else {
1507 max = align_h;
1508 min = align_w;
1509 }
1510 /* HD & SD */
1511 if ((max > 1920 || min > 1088) &&
1512 ALIGN(align_w * align_h * 3/2, SZ_64K) * 9 <=
1513 buf_size) {
1514 canvas_width = align_w;
1515 canvas_height = align_h;
1516 decbuf_y_size =
1517 ALIGN(align_w * align_h, SZ_64K);
1518 decbuf_size =
1519 ALIGN(align_w * align_h * 3/2, SZ_64K);
1520 } else { /*1080p*/
1521 if (h > w) {
1522 canvas_width = 1088;
1523 canvas_height = 1920;
1524 } else {
1525 canvas_width = 1920;
1526 canvas_height = 1088;
1527 }
1528 decbuf_y_size = 0x200000;
1529 decbuf_size = 0x300000;
1530 }
1531 }
1532
1533 for (i = 0; i < hw->buf_num + 1; i++) {
1534
1535 unsigned canvas;
1536
1537 if (i == hw->buf_num)
1538 decbuf_size = WORKSPACE_SIZE;
1539
1540 if (hw->is_used_v4l && !(i == hw->buf_num)) {
1541 continue;
1542 } else {
1543 ret = decoder_bmmu_box_alloc_buf_phy(hw->mm_blk_handle, i,
1544 decbuf_size, DRIVER_NAME, &decbuf_start);
1545 if (ret < 0) {
1546 pr_err("mmu alloc failed! size %d idx %d\n",
1547 decbuf_size, i);
1548 return ret;
1549 }
1550 }
1551
1552 if (i == hw->buf_num) {
1553 hw->buf_start = decbuf_start;
1554 } else {
1555 if (vdec->parallel_dec == 1) {
1556 unsigned tmp;
1557 if (canvas_y(hw->canvas_spec[i]) == 0xff) {
1558 tmp =
1559 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1560 hw->canvas_spec[i] &= ~0xff;
1561 hw->canvas_spec[i] |= tmp;
1562 }
1563 if (canvas_u(hw->canvas_spec[i]) == 0xff) {
1564 tmp =
1565 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1566 hw->canvas_spec[i] &= ~(0xffff << 8);
1567 hw->canvas_spec[i] |= tmp << 8;
1568 hw->canvas_spec[i] |= tmp << 16;
1569 }
1570 canvas = hw->canvas_spec[i];
1571 } else {
1572 canvas = vdec->get_canvas(i, 2);
1573 hw->canvas_spec[i] = canvas;
1574 }
1575
1576 hw->canvas_config[i][0].phy_addr = decbuf_start;
1577 hw->canvas_config[i][0].width = canvas_width;
1578 hw->canvas_config[i][0].height = canvas_height;
1579 hw->canvas_config[i][0].block_mode = hw->blkmode;
1580 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
1581 hw->canvas_config[i][0].endian = 7;
1582 else
1583 hw->canvas_config[i][0].endian = 0;
1584 canvas_config_config(canvas_y(canvas),
1585 &hw->canvas_config[i][0]);
1586
1587 hw->canvas_config[i][1].phy_addr =
1588 decbuf_start + decbuf_y_size;
1589 hw->canvas_config[i][1].width = canvas_width;
1590 hw->canvas_config[i][1].height = (canvas_height >> 1);
1591 hw->canvas_config[i][1].block_mode = hw->blkmode;
1592 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
1593 hw->canvas_config[i][1].endian = 7;
1594 else
1595 hw->canvas_config[i][1].endian = 0;
1596 canvas_config_config(canvas_u(canvas),
1597 &hw->canvas_config[i][1]);
1598 }
1599 }
1600
1601 return 0;
1602}
1603
1604static void vmpeg4_dump_state(struct vdec_s *vdec)
1605{
1606 struct vdec_mpeg4_hw_s *hw =
1607 (struct vdec_mpeg4_hw_s *)(vdec->private);
1608 u32 i;
1609 mmpeg4_debug_print(DECODE_ID(hw), 0,
1610 "====== %s\n", __func__);
1611 mmpeg4_debug_print(DECODE_ID(hw), 0,
1612 "width/height (%d/%d), i_fram:%d, buffer_not_ready %d, buf_num %d\n",
1613 hw->frame_width,
1614 hw->frame_height,
1615 hw->first_i_frame_ready,
1616 hw->buffer_not_ready,
1617 hw->buf_num
1618 );
1619 for (i = 0; i < hw->buf_num; i++) {
1620 mmpeg4_debug_print(DECODE_ID(hw), 0,
1621 "index %d, used %d\n", i, hw->vfbuf_use[i]);
1622 }
1623
1624 mmpeg4_debug_print(DECODE_ID(hw), 0,
1625 "is_framebase(%d), eos %d, state 0x%x, dec_result 0x%x dec_frm %d\n",
1626 vdec_frame_based(vdec),
1627 hw->eos,
1628 hw->stat,
1629 hw->dec_result,
1630 hw->frame_num
1631 );
1632 mmpeg4_debug_print(DECODE_ID(hw), 0,
1633 "is_framebase(%d), put_frm %d run %d not_run_ready %d input_empty %d,drop %d\n",
1634 vdec_frame_based(vdec),
1635 hw->put_num,
1636 hw->run_count,
1637 hw->not_run_ready,
1638 hw->input_empty,
1639 hw->drop_frame_count
1640 );
1641
1642 if (vf_get_receiver(vdec->vf_provider_name)) {
1643 enum receviver_start_e state =
1644 vf_notify_receiver(vdec->vf_provider_name,
1645 VFRAME_EVENT_PROVIDER_QUREY_STATE,
1646 NULL);
1647 mmpeg4_debug_print(DECODE_ID(hw), 0,
1648 "\nreceiver(%s) state %d\n",
1649 vdec->vf_provider_name,
1650 state);
1651 }
1652 mmpeg4_debug_print(DECODE_ID(hw), 0,
1653 "%s, newq(%d/%d), dispq(%d/%d) vf peek/get/put (%d/%d/%d)\n",
1654 __func__,
1655 kfifo_len(&hw->newframe_q), VF_POOL_SIZE,
1656 kfifo_len(&hw->display_q), VF_POOL_SIZE,
1657 hw->peek_num, hw->get_num, hw->put_num
1658 );
1659 mmpeg4_debug_print(DECODE_ID(hw), 0,
1660 "VIFF_BIT_CNT=0x%x\n",
1661 READ_VREG(VIFF_BIT_CNT));
1662 mmpeg4_debug_print(DECODE_ID(hw), 0,
1663 "VLD_MEM_VIFIFO_LEVEL=0x%x\n",
1664 READ_VREG(VLD_MEM_VIFIFO_LEVEL));
1665 mmpeg4_debug_print(DECODE_ID(hw), 0,
1666 "VLD_MEM_VIFIFO_WP=0x%x\n",
1667 READ_VREG(VLD_MEM_VIFIFO_WP));
1668 mmpeg4_debug_print(DECODE_ID(hw), 0,
1669 "VLD_MEM_VIFIFO_RP=0x%x\n",
1670 READ_VREG(VLD_MEM_VIFIFO_RP));
1671 mmpeg4_debug_print(DECODE_ID(hw), 0,
1672 "PARSER_VIDEO_RP=0x%x\n",
1673 READ_PARSER_REG(PARSER_VIDEO_RP));
1674 mmpeg4_debug_print(DECODE_ID(hw), 0,
1675 "PARSER_VIDEO_WP=0x%x\n",
1676 READ_PARSER_REG(PARSER_VIDEO_WP));
1677 if (vdec_frame_based(vdec) &&
1678 debug_enable & PRINT_FRAMEBASE_DATA) {
1679 int jj;
1680 if (hw->chunk && hw->chunk->block &&
1681 hw->chunk->size > 0) {
1682 u8 *data = NULL;
1683
1684 if (!hw->chunk->block->is_mapped)
1685 data = codec_mm_vmap(hw->chunk->block->start +
1686 hw->chunk->offset, hw->chunk->size);
1687 else
1688 data = ((u8 *)hw->chunk->block->start_virt) +
1689 hw->chunk->offset;
1690
1691 mmpeg4_debug_print(DECODE_ID(hw), 0,
1692 "frame data size 0x%x\n",
1693 hw->chunk->size);
1694 for (jj = 0; jj < hw->chunk->size; jj++) {
1695 if ((jj & 0xf) == 0)
1696 mmpeg4_debug_print(DECODE_ID(hw),
1697 PRINT_FRAMEBASE_DATA,
1698 "%06x:", jj);
1699 mmpeg4_debug_print(DECODE_ID(hw),
1700 PRINT_FRAMEBASE_DATA,
1701 "%02x ", data[jj]);
1702 if (((jj + 1) & 0xf) == 0)
1703 mmpeg4_debug_print(DECODE_ID(hw),
1704 PRINT_FRAMEBASE_DATA,
1705 "\n");
1706 }
1707
1708 if (!hw->chunk->block->is_mapped)
1709 codec_mm_unmap_phyaddr(data);
1710 }
1711 }
1712}
1713
1714static void reset_process_time(struct vdec_mpeg4_hw_s *hw)
1715{
1716 if (hw->start_process_time) {
1717 unsigned process_time =
1718 1000 * (jiffies - hw->start_process_time) / HZ;
1719 hw->start_process_time = 0;
1720 if (process_time > max_process_time[DECODE_ID(hw)])
1721 max_process_time[DECODE_ID(hw)] = process_time;
1722 }
1723}
1724static void start_process_time(struct vdec_mpeg4_hw_s *hw)
1725{
1726 hw->decode_timeout_count = 2;
1727 hw->start_process_time = jiffies;
1728}
1729
1730static void timeout_process(struct vdec_mpeg4_hw_s *hw)
1731{
1732 if (hw->stat & STAT_VDEC_RUN) {
1733 amvdec_stop();
1734 hw->stat &= ~STAT_VDEC_RUN;
1735 }
1736 mmpeg4_debug_print(DECODE_ID(hw), 0,
1737 "%s decoder timeout %d\n", __func__, hw->timeout_cnt);
1738 if (vdec_frame_based((hw_to_vdec(hw)))) {
1739 mmpeg4_debug_print(DECODE_ID(hw), 0,
1740 "%s frame_num %d, chunk size 0x%x, chksum 0x%x\n",
1741 __func__,
1742 hw->frame_num,
1743 hw->chunk->size,
1744 get_data_check_sum(hw, hw->chunk->size));
1745 }
1746 hw->timeout_cnt++;
1747 /* timeout: data droped, frame_num inaccurate*/
1748 hw->frame_num++;
1749 reset_process_time(hw);
1750 hw->first_i_frame_ready = 0;
1751 hw->dec_result = DEC_RESULT_DONE;
1752 vdec_schedule_work(&hw->work);
1753}
1754
1755
1756static void check_timer_func(unsigned long arg)
1757{
1758 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)arg;
1759 struct vdec_s *vdec = hw_to_vdec(hw);
1760 unsigned int timeout_val = decode_timeout_val;
1761
1762 if (radr != 0) {
1763 if (rval != 0) {
1764 WRITE_VREG(radr, rval);
1765 pr_info("WRITE_VREG(%x,%x)\n", radr, rval);
1766 } else
1767 pr_info("READ_VREG(%x)=%x\n", radr, READ_VREG(radr));
1768 rval = 0;
1769 radr = 0;
1770 }
1771
1772 if (((debug_enable & PRINT_FLAG_TIMEOUT_STATUS) == 0) &&
1773 (vdec_frame_based(vdec) ||
1774 ((u32)READ_VREG(VLD_MEM_VIFIFO_LEVEL) > 0x100)) &&
1775 (timeout_val > 0) &&
1776 (hw->start_process_time > 0) &&
1777 ((1000 * (jiffies - hw->start_process_time) / HZ)
1778 > timeout_val)) {
1779 if (hw->last_vld_level == READ_VREG(VLD_MEM_VIFIFO_LEVEL)) {
1780 if (hw->decode_timeout_count > 0)
1781 hw->decode_timeout_count--;
1782 if (hw->decode_timeout_count == 0)
1783 timeout_process(hw);
1784 }
1785 hw->last_vld_level = READ_VREG(VLD_MEM_VIFIFO_LEVEL);
1786 }
1787
1788 if (vdec->next_status == VDEC_STATUS_DISCONNECTED) {
1789 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1790 "vdec requested to be disconnected\n");
1791 hw->dec_result = DEC_RESULT_FORCE_EXIT;
1792 vdec_schedule_work(&hw->work);
1793 return;
1794 }
1795
1796 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
1797}
1798
1799static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw)
1800{
1801 int index, i;
1802 void *workspace_buf = NULL;
1803
1804 index = find_free_buffer(hw);
1805 if (index < 0)
1806 return -1;
1807
1808 if (!hw->init_flag) {
1809 if (vmpeg4_canvas_init(hw) < 0)
1810 return -1;
1811 } else {
1812 if (!hw->is_used_v4l) {
1813 for (i = 0; i < hw->buf_num; i++) {
1814 canvas_config_config(canvas_y(hw->canvas_spec[i]),
1815 &hw->canvas_config[i][0]);
1816 canvas_config_config(canvas_u(hw->canvas_spec[i]),
1817 &hw->canvas_config[i][1]);
1818 }
1819 }
1820 }
1821 /* prepare REF0 & REF1
1822 * points to the past two IP buffers
1823 * prepare REC_CANVAS_ADDR and ANC2_CANVAS_ADDR
1824 * points to the output buffer
1825 */
1826 if (hw->refs[0] == -1) {
1827 WRITE_VREG(MREG_REF0, (hw->refs[1] == -1) ? 0xffffffff :
1828 hw->canvas_spec[hw->refs[1]]);
1829 } else {
1830 WRITE_VREG(MREG_REF0, (hw->refs[0] == -1) ? 0xffffffff :
1831 hw->canvas_spec[hw->refs[0]]);
1832 }
1833 WRITE_VREG(MREG_REF1, (hw->refs[1] == -1) ? 0xffffffff :
1834 hw->canvas_spec[hw->refs[1]]);
1835
1836 WRITE_VREG(REC_CANVAS_ADDR, hw->canvas_spec[index]);
1837 WRITE_VREG(ANC2_CANVAS_ADDR, hw->canvas_spec[index]);
1838
1839 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RESTORE,
1840 "restore ref0=0x%x, ref1=0x%x, rec=0x%x, ctx_valid=%d,index=%d\n",
1841 READ_VREG(MREG_REF0),
1842 READ_VREG(MREG_REF1),
1843 READ_VREG(REC_CANVAS_ADDR),
1844 hw->ctx_valid, index);
1845
1846 /* notify ucode the buffer start address */
1847 workspace_buf = codec_mm_vmap(hw->buf_start, WORKSPACE_SIZE);
1848 if (workspace_buf) {
1849 /* clear to fix decoder timeout at first time */
1850 if (!hw->init_flag)
1851 memset(workspace_buf, 0, WORKSPACE_SIZE);
1852 codec_mm_dma_flush(workspace_buf,
1853 WORKSPACE_SIZE, DMA_TO_DEVICE);
1854 codec_mm_unmap_phyaddr(workspace_buf);
1855 }
1856 WRITE_VREG(MEM_OFFSET_REG, hw->buf_start);
1857
1858 /* disable PSCALE for hardware sharing */
1859 WRITE_VREG(PSCALE_CTRL, 0);
1860
1861 WRITE_VREG(MREG_BUFFEROUT, 0);
1862
1863 /* clear mailbox interrupt */
1864 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
1865
1866 /* enable mailbox interrupt */
1867 WRITE_VREG(ASSIST_MBOX1_MASK, 1);
1868
1869 /* clear repeat count */
1870 WRITE_VREG(MP4_NOT_CODED_CNT, 0);
1871
1872#ifdef NV21
1873 SET_VREG_MASK(MDEC_PIC_DC_CTRL, 1 << 17);
1874#endif
1875
1876#if 1/* /MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
1877 WRITE_VREG(MDEC_PIC_DC_THRESH, 0x404038aa);
1878#endif
1879
1880 WRITE_VREG(MP4_PIC_WH, (hw->ctx_valid) ?
1881 hw->reg_mp4_pic_wh :
1882 ((hw->frame_width << 16) | hw->frame_height));
1883 WRITE_VREG(MP4_SYS_RATE, hw->vmpeg4_amstream_dec_info.rate);
1884
1885 if (hw->ctx_valid) {
1886 WRITE_VREG(DC_AC_CTRL, hw->reg_dc_ac_ctrl);
1887 WRITE_VREG(IQIDCT_CONTROL, hw->reg_iqidct_control);
1888 WRITE_VREG(RESYNC_MARKER_LENGTH, hw->reg_resync_marker_length);
1889 WRITE_VREG(RV_AI_MB_COUNT, hw->reg_rv_ai_mb_count);
1890 }
1891 WRITE_VREG(MPEG1_2_REG, (hw->ctx_valid) ? hw->reg_mpeg1_2_reg : 1);
1892 WRITE_VREG(VCOP_CTRL_REG, hw->reg_vcop_ctrl_reg);
1893 WRITE_VREG(PIC_HEAD_INFO, hw->reg_pic_head_info);
1894 WRITE_VREG(SLICE_QP, hw->reg_slice_qp);
1895 WRITE_VREG(MB_INFO, hw->reg_mb_info);
1896
1897 if (vdec_frame_based(hw_to_vdec(hw)) && hw->chunk) {
1898 /* frame based input */
1899 WRITE_VREG(MREG_INPUT, (hw->chunk->offset & 7) | (1<<7) |
1900 (hw->ctx_valid<<6));
1901 } else {
1902 /* stream based input */
1903 WRITE_VREG(MREG_INPUT, (hw->ctx_valid<<6));
1904 }
1905
1906 return 0;
1907}
1908
1909static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw)
1910{
1911 int i;
1912
1913 hw->vmpeg4_ratio = hw->vmpeg4_amstream_dec_info.ratio;
1914
1915 hw->vmpeg4_ratio64 = hw->vmpeg4_amstream_dec_info.ratio64;
1916
1917 hw->vmpeg4_rotation =
1918 (((unsigned long)hw->vmpeg4_amstream_dec_info.param) >> 16) & 0xffff;
1919 hw->sys_mp4_rate = hw->vmpeg4_amstream_dec_info.rate;
1920 hw->frame_width = hw->vmpeg4_amstream_dec_info.width;
1921 hw->frame_height = hw->vmpeg4_amstream_dec_info.height;
1922 hw->frame_dur = 0;
1923 hw->frame_prog = 0;
1924 hw->unstable_pts =
1925 (((unsigned long) hw->vmpeg4_amstream_dec_info.param & 0x40) >> 6);
1926 mmpeg4_debug_print(DECODE_ID(hw), 0,
1927 "param = 0x%x unstable_pts = %d\n",
1928 hw->vmpeg4_amstream_dec_info.param,
1929 hw->unstable_pts);
1930 hw->last_dec_pts = -1;
1931
1932 hw->total_frame = 0;
1933
1934 hw->last_anch_pts = 0;
1935
1936 hw->last_anch_pts_us64 = 0;
1937
1938 hw->last_vop_time_inc = hw->last_duration = 0;
1939
1940 hw->vop_time_inc_since_last_anch = 0;
1941 hw->last_pts = 0;
1942 hw->last_pts64 = 0;
1943 hw->frame_num_since_last_anch = 0;
1944 hw->frame_num = 0;
1945 hw->put_num = 0;
1946 hw->run_count = 0;
1947 hw->not_run_ready = 0;
1948 hw->input_empty = 0;
1949 hw->peek_num = 0;
1950 hw->get_num = 0;
1951
1952 hw->pts_hit = hw->pts_missed = hw->pts_i_hit = hw->pts_i_missed = 0;
1953 hw->refs[0] = -1;
1954 hw->refs[1] = -1;
1955 hw->first_i_frame_ready = 0;
1956 hw->drop_frame_count = 0;
1957 hw->buffer_not_ready = 0;
1958 hw->init_flag = 0;
1959 hw->dec_result = DEC_RESULT_NONE;
1960 hw->timeout_cnt = 0;
1961
1962 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
1963 hw->vfbuf_use[i] = 0;
1964
1965 INIT_KFIFO(hw->display_q);
1966 INIT_KFIFO(hw->newframe_q);
1967
1968 for (i = 0; i < VF_POOL_SIZE; i++) {
1969 const struct vframe_s *vf = &hw->vfpool[i];
1970
1971 hw->vfpool[i].index = DECODE_BUFFER_NUM_MAX;
1972 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1973 }
1974 if (hw->mm_blk_handle) {
1975 decoder_bmmu_box_free(hw->mm_blk_handle);
1976 hw->mm_blk_handle = NULL;
1977 }
1978 hw->mm_blk_handle = decoder_bmmu_box_alloc_box(
1979 DRIVER_NAME,
1980 0,
1981 MAX_BMMU_BUFFER_NUM,
1982 4 + PAGE_SHIFT,
1983 CODEC_MM_FLAGS_CMA_CLEAR |
1984 CODEC_MM_FLAGS_FOR_VDECODER);
1985 INIT_WORK(&hw->work, vmpeg4_work);
1986
1987 init_waitqueue_head(&hw->wait_q);
1988}
1989
1990static s32 vmmpeg4_init(struct vdec_mpeg4_hw_s *hw)
1991{
1992 int trickmode_fffb = 0;
1993 int size = -1, fw_size = 0x1000 * 16;
1994 struct firmware_s *fw = NULL;
1995
1996 fw = vmalloc(sizeof(struct firmware_s) + fw_size);
1997 if (IS_ERR_OR_NULL(fw))
1998 return -ENOMEM;
1999
2000 if (hw->vmpeg4_amstream_dec_info.format ==
2001 VIDEO_DEC_FORMAT_MPEG4_5) {
2002 size = get_firmware_data(VIDEO_DEC_MPEG4_5_MULTI, fw->data);
2003 strncpy(fw->name, "mmpeg4_mc_5", sizeof(fw->name));
2004 } else if (hw->vmpeg4_amstream_dec_info.format ==
2005 VIDEO_DEC_FORMAT_H263) {
2006 size = get_firmware_data(VIDEO_DEC_H263_MULTI, fw->data);
2007 strncpy(fw->name, "mh263_mc", sizeof(fw->name));
2008 } else
2009 pr_err("unsupport mpeg4 sub format %d\n",
2010 hw->vmpeg4_amstream_dec_info.format);
2011 pr_info("mmpeg4 get fw %s, size %x\n", fw->name, size);
2012 if (size < 0) {
2013 pr_err("get firmware failed.");
2014 vfree(fw);
2015 return -1;
2016 }
2017
2018 fw->len = size;
2019 hw->fw = fw;
2020
2021 query_video_status(0, &trickmode_fffb);
2022
2023 pr_info("%s\n", __func__);
2024
2025 amvdec_enable();
2026
2027 init_timer(&hw->check_timer);
2028 hw->check_timer.data = (unsigned long)hw;
2029 hw->check_timer.function = check_timer_func;
2030 hw->check_timer.expires = jiffies + CHECK_INTERVAL;
2031 hw->stat |= STAT_TIMER_ARM;
2032 hw->eos = 0;
2033 WRITE_VREG(DECODE_STOP_POS, udebug_flag);
2034
2035 vmpeg4_local_init(hw);
2036 wmb();
2037
2038 return 0;
2039}
2040
2041static unsigned long run_ready(struct vdec_s *vdec, unsigned long mask)
2042{
2043 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2044
2045 if (hw->eos)
2046 return 0;
2047 if (vdec_stream_based(vdec) && (hw->init_flag == 0)
2048 && pre_decode_buf_level != 0) {
2049 u32 rp, wp, level;
2050
2051 rp = READ_PARSER_REG(PARSER_VIDEO_RP);
2052 wp = READ_PARSER_REG(PARSER_VIDEO_WP);
2053 if (wp < rp)
2054 level = vdec->input.size + wp - rp;
2055 else
2056 level = wp - rp;
2057 if (level < pre_decode_buf_level) {
2058 hw->not_run_ready++;
2059 return 0;
2060 }
2061 }
2062
2063 if (!is_enough_free_buffer(hw)) {
2064 hw->buffer_not_ready++;
2065 return 0;
2066 }
2067
2068 hw->not_run_ready = 0;
2069 hw->buffer_not_ready = 0;
2070 if (vdec->parallel_dec == 1)
2071 return (unsigned long)(CORE_MASK_VDEC_1);
2072 else
2073 return (unsigned long)(CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
2074}
2075
2076static unsigned char get_data_check_sum
2077 (struct vdec_mpeg4_hw_s *hw, int size)
2078{
2079 int jj;
2080 int sum = 0;
2081 u8 *data = NULL;
2082
2083 if (!hw->chunk->block->is_mapped)
2084 data = codec_mm_vmap(hw->chunk->block->start +
2085 hw->chunk->offset, size);
2086 else
2087 data = ((u8 *)hw->chunk->block->start_virt) +
2088 hw->chunk->offset;
2089
2090 for (jj = 0; jj < size; jj++)
2091 sum += data[jj];
2092
2093 if (!hw->chunk->block->is_mapped)
2094 codec_mm_unmap_phyaddr(data);
2095 return sum;
2096}
2097
2098static void run(struct vdec_s *vdec, unsigned long mask,
2099 void (*callback)(struct vdec_s *, void *), void *arg)
2100{
2101 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2102 int size = 0, ret = 0;
2103
2104 hw->run_count++;
2105 hw->vdec_cb_arg = arg;
2106 hw->vdec_cb = callback;
2107 vdec_reset_core(vdec);
2108
2109 if ((vdec_frame_based(vdec)) &&
2110 (hw->dec_result == DEC_RESULT_UNFINISH)) {
2111 vmpeg4_prepare_input(hw);
2112 size = hw->chunk_size;
2113 } else {
2114 size = vdec_prepare_input(vdec, &hw->chunk);
2115 if (size < 4) { /*less than start code size 00 00 01 xx*/
2116 hw->input_empty++;
2117 hw->dec_result = DEC_RESULT_AGAIN;
2118 vdec_schedule_work(&hw->work);
2119 return;
2120 }
2121 if ((vdec_frame_based(vdec)) &&
2122 (hw->chunk != NULL)) {
2123 hw->chunk_offset = hw->chunk->offset;
2124 hw->chunk_size = hw->chunk->size;
2125 hw->chunk_frame_count = 0;
2126 }
2127 }
2128 if (vdec_frame_based(vdec) &&
2129 (debug_enable & 0xc00)) {
2130 u8 *data = NULL;
2131
2132 if (!hw->chunk->block->is_mapped)
2133 data = codec_mm_vmap(hw->chunk->block->start +
2134 hw->chunk->offset, size);
2135 else
2136 data = ((u8 *)hw->chunk->block->start_virt) +
2137 hw->chunk->offset;
2138
2139 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS,
2140 "%s: size 0x%x sum 0x%x %02x %02x %02x %02x %02x %02x .. %02x %02x %02x %02x\n",
2141 __func__, size, get_data_check_sum(hw, size),
2142 data[0], data[1], data[2], data[3],
2143 data[4], data[5], data[size - 4],
2144 data[size - 3], data[size - 2],
2145 data[size - 1]);
2146
2147 if (debug_enable & PRINT_FRAMEBASE_DATA) {
2148 int jj;
2149
2150 for (jj = 0; jj < size; jj++) {
2151 if ((jj & 0xf) == 0)
2152 mmpeg4_debug_print(DECODE_ID(hw),
2153 PRINT_FRAMEBASE_DATA,
2154 "%06x:", jj);
2155 mmpeg4_debug_print(DECODE_ID(hw),
2156 PRINT_FRAMEBASE_DATA,
2157 "%02x ", data[jj]);
2158 if (((jj + 1) & 0xf) == 0)
2159 mmpeg4_debug_print(DECODE_ID(hw),
2160 PRINT_FRAMEBASE_DATA,
2161 "\n");
2162 }
2163 }
2164
2165 if (!hw->chunk->block->is_mapped)
2166 codec_mm_unmap_phyaddr(data);
2167 }
2168
2169 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
2170 "%s, size=%d, %x %x %x %x %x\n",
2171 __func__, size,
2172 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
2173 READ_VREG(VLD_MEM_VIFIFO_WP),
2174 READ_VREG(VLD_MEM_VIFIFO_RP),
2175 READ_PARSER_REG(PARSER_VIDEO_RP),
2176 READ_PARSER_REG(PARSER_VIDEO_WP));
2177
2178 hw->dec_result = DEC_RESULT_NONE;
2179 if (vdec->mc_loaded) {
2180 /*firmware have load before,
2181 and not changes to another.
2182 ignore reload.
2183 */
2184 } else {
2185 ret = amvdec_vdec_loadmc_buf_ex(VFORMAT_MPEG4,hw->fw->name, vdec,
2186 hw->fw->data, hw->fw->len);
2187 if (ret < 0) {
2188 pr_err("[%d] %s: the %s fw loading failed, err: %x\n", vdec->id,
2189 hw->fw->name, tee_enabled() ? "TEE" : "local", ret);
2190 hw->dec_result = DEC_RESULT_FORCE_EXIT;
2191 vdec_schedule_work(&hw->work);
2192 return;
2193 }
2194 vdec->mc_loaded = 1;
2195 vdec->mc_type = VFORMAT_MPEG4;
2196 }
2197 if (vmpeg4_hw_ctx_restore(hw) < 0) {
2198 hw->dec_result = DEC_RESULT_ERROR;
2199 mmpeg4_debug_print(DECODE_ID(hw), 0,
2200 "amvdec_mpeg4: error HW context restore\n");
2201 vdec_schedule_work(&hw->work);
2202 return;
2203 }
2204 if (vdec_frame_based(vdec)) {
2205 size = hw->chunk_size +
2206 (hw->chunk_offset & (VDEC_FIFO_ALIGN - 1));
2207 WRITE_VREG(VIFF_BIT_CNT, size * 8);
2208 }
2209 hw->input_empty = 0;
2210 hw->last_vld_level = 0;
2211 start_process_time(hw);
2212 vdec_enable_input(vdec);
2213 /* wmb before ISR is handled */
2214 wmb();
2215
2216 amvdec_start();
2217 hw->stat |= STAT_VDEC_RUN;
2218 hw->init_flag = 1;
2219 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
2220}
2221
2222static int vmpeg4_stop(struct vdec_mpeg4_hw_s *hw)
2223{
2224 cancel_work_sync(&hw->work);
2225
2226 if (hw->mm_blk_handle) {
2227 decoder_bmmu_box_free(hw->mm_blk_handle);
2228 hw->mm_blk_handle = NULL;
2229 }
2230
2231 if (hw->stat & STAT_TIMER_ARM) {
2232 del_timer_sync(&hw->check_timer);
2233 hw->stat &= ~STAT_TIMER_ARM;
2234 }
2235
2236 if (hw->fw) {
2237 vfree(hw->fw);
2238 hw->fw = NULL;
2239 }
2240 return 0;
2241}
2242static void reset(struct vdec_s *vdec)
2243{
2244 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2245
2246 pr_info("amvdec_mmpeg4: reset.\n");
2247
2248 vmpeg4_local_init(hw);
2249
2250 hw->ctx_valid = 0;
2251}
2252
2253static int ammvdec_mpeg4_probe(struct platform_device *pdev)
2254{
2255 struct vdec_s *pdata = *(struct vdec_s **)pdev->dev.platform_data;
2256 struct vdec_mpeg4_hw_s *hw = NULL;
2257 int config_val = 0;
2258
2259 if (pdata == NULL) {
2260 pr_err("%s memory resource undefined.\n", __func__);
2261 return -EFAULT;
2262 }
2263
2264 hw = vmalloc(sizeof(struct vdec_mpeg4_hw_s));
2265 if (hw == NULL) {
2266 pr_err("\namvdec_mpeg4 decoder driver alloc failed\n");
2267 return -ENOMEM;
2268 }
2269 memset(hw, 0, sizeof(struct vdec_mpeg4_hw_s));
2270
2271 /* the ctx from v4l2 driver. */
2272 hw->v4l2_ctx = pdata->private;
2273
2274 pdata->private = hw;
2275 pdata->dec_status = dec_status;
2276 /* pdata->set_trickmode = set_trickmode; */
2277 pdata->run_ready = run_ready;
2278 pdata->run = run;
2279 pdata->reset = reset;
2280 pdata->irq_handler = vmpeg4_isr;
2281 pdata->threaded_irq_handler = vmpeg4_isr_thread_fn;
2282 pdata->dump_state = vmpeg4_dump_state;
2283
2284 if (pdata->use_vfm_path)
2285 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2286 VFM_DEC_PROVIDER_NAME);
2287 else
2288 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2289 PROVIDER_NAME ".%02x", pdev->id & 0xff);
2290
2291
2292 if (((debug_enable & IGNORE_PARAM_FROM_CONFIG) == 0) && pdata->config_len) {
2293 mmpeg4_debug_print(DECODE_ID(hw), 0, "pdata->config: %s\n", pdata->config);
2294 if (get_config_int(pdata->config, "parm_v4l_buffer_margin",
2295 &config_val) == 0)
2296 hw->dynamic_buf_num_margin = config_val;
2297 else
2298 hw->dynamic_buf_num_margin = dynamic_buf_num_margin;
2299 } else {
2300 hw->dynamic_buf_num_margin = dynamic_buf_num_margin;
2301 }
2302 hw->buf_num = vmpeg4_get_buf_num(hw);
2303
2304 if (pdata->parallel_dec == 1) {
2305 int i;
2306 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
2307 hw->canvas_spec[i] = 0xffffff;
2308 }
2309
2310 vf_provider_init(&pdata->vframe_provider,
2311 pdata->vf_provider_name, &vf_provider_ops, pdata);
2312
2313 platform_set_drvdata(pdev, pdata);
2314 hw->platform_dev = pdev;
2315 hw->blkmode = pdata->canvas_mode;
2316
2317 if (pdata->sys_info) {
2318 hw->vmpeg4_amstream_dec_info = *pdata->sys_info;
2319 if ((hw->vmpeg4_amstream_dec_info.height != 0) &&
2320 (hw->vmpeg4_amstream_dec_info.width >
2321 (MAX_MPEG4_SUPPORT_SIZE/hw->vmpeg4_amstream_dec_info.height))) {
2322 pr_info("ammvdec_mpeg4: oversize, unsupport: %d*%d\n",
2323 hw->vmpeg4_amstream_dec_info.width,
2324 hw->vmpeg4_amstream_dec_info.height);
2325 pdata->dec_status = NULL;
2326 vfree((void *)hw);
2327 hw = NULL;
2328 return -EFAULT;
2329 }
2330 mmpeg4_debug_print(DECODE_ID(hw), 0,
2331 "sysinfo: %d x %d, rate: %d\n",
2332 hw->vmpeg4_amstream_dec_info.width,
2333 hw->vmpeg4_amstream_dec_info.height,
2334 hw->vmpeg4_amstream_dec_info.rate);
2335 hw->is_used_v4l = (((unsigned long)
2336 hw->vmpeg4_amstream_dec_info.param & 0x80) >> 7);
2337 }
2338
2339 if (vmmpeg4_init(hw) < 0) {
2340 pr_err("%s init failed.\n", __func__);
2341
2342 if (hw) {
2343 vfree((void *)hw);
2344 hw = NULL;
2345 }
2346 pdata->dec_status = NULL;
2347 return -ENODEV;
2348 }
2349 vdec_set_prepare_level(pdata, start_decode_buf_level);
2350
2351 if (pdata->parallel_dec == 1)
2352 vdec_core_request(pdata, CORE_MASK_VDEC_1);
2353 else {
2354 vdec_core_request(pdata, CORE_MASK_VDEC_1 | CORE_MASK_HEVC
2355 | CORE_MASK_COMBINE);
2356 }
2357
2358 mmpeg4_debug_print(DECODE_ID(hw), 0,
2359 "%s end.\n", __func__);
2360 return 0;
2361}
2362
2363static int ammvdec_mpeg4_remove(struct platform_device *pdev)
2364{
2365 struct vdec_mpeg4_hw_s *hw =
2366 (struct vdec_mpeg4_hw_s *)
2367 (((struct vdec_s *)(platform_get_drvdata(pdev)))->private);
2368 struct vdec_s *vdec = hw_to_vdec(hw);
2369 int i;
2370
2371 if (vdec->next_status == VDEC_STATUS_DISCONNECTED
2372 && (vdec->status == VDEC_STATUS_ACTIVE)) {
2373 mmpeg4_debug_print(DECODE_ID(hw), 0,
2374 "%s force exit %d\n", __func__, __LINE__);
2375 hw->dec_result = DEC_RESULT_FORCE_EXIT;
2376 vdec_schedule_work(&hw->work);
2377 wait_event_interruptible_timeout(hw->wait_q,
2378 (vdec->status == VDEC_STATUS_CONNECTED),
2379 msecs_to_jiffies(1000)); /* wait for work done */
2380 }
2381
2382 vmpeg4_stop(hw);
2383
2384 if (vdec->parallel_dec == 1)
2385 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1);
2386 else
2387 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
2388 vdec_set_status(hw_to_vdec(hw), VDEC_STATUS_DISCONNECTED);
2389
2390 if (vdec->parallel_dec == 1) {
2391 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
2392 vdec->free_canvas_ex(canvas_y(hw->canvas_spec[i]), vdec->id);
2393 vdec->free_canvas_ex(canvas_u(hw->canvas_spec[i]), vdec->id);
2394 }
2395 }
2396
2397 mmpeg4_debug_print(DECODE_ID(hw), 0, "%s\n", __func__);
2398 vfree((void *)hw);
2399 hw = NULL;
2400
2401 return 0;
2402}
2403
2404/****************************************/
2405#ifdef CONFIG_PM
2406static int mmpeg4_suspend(struct device *dev)
2407{
2408 amvdec_suspend(to_platform_device(dev), dev->power.power_state);
2409 return 0;
2410}
2411
2412static int mmpeg4_resume(struct device *dev)
2413{
2414 amvdec_resume(to_platform_device(dev));
2415 return 0;
2416}
2417
2418static const struct dev_pm_ops mmpeg4_pm_ops = {
2419 SET_SYSTEM_SLEEP_PM_OPS(mmpeg4_suspend, mmpeg4_resume)
2420};
2421#endif
2422
2423static struct platform_driver ammvdec_mpeg4_driver = {
2424 .probe = ammvdec_mpeg4_probe,
2425 .remove = ammvdec_mpeg4_remove,
2426 .driver = {
2427 .name = DRIVER_NAME,
2428#ifdef CONFIG_PM
2429 .pm = &mmpeg4_pm_ops,
2430#endif
2431 }
2432};
2433
2434static struct codec_profile_t amvdec_mpeg4_profile = {
2435 .name = "mmpeg4",
2436 .profile = ""
2437};
2438
2439static int __init ammvdec_mpeg4_driver_init_module(void)
2440{
2441 pr_info("%s \n", __func__);
2442
2443 if (platform_driver_register(&ammvdec_mpeg4_driver)) {
2444 pr_err("failed to register ammvdec_mpeg4 driver\n");
2445 return -ENODEV;
2446 }
2447 vcodec_profile_register(&amvdec_mpeg4_profile);
2448 return 0;
2449}
2450
2451static void __exit ammvdec_mpeg4_driver_remove_module(void)
2452{
2453 pr_info("ammvdec_mpeg4 module remove.\n");
2454
2455 platform_driver_unregister(&ammvdec_mpeg4_driver);
2456}
2457
2458/****************************************/
2459module_param(debug_enable, uint, 0664);
2460MODULE_PARM_DESC(debug_enable,
2461 "\n ammvdec_mpeg4 debug enable\n");
2462
2463module_param(frmbase_cont_bitlevel, uint, 0664);
2464MODULE_PARM_DESC(frmbase_cont_bitlevel, "\nfrmbase_cont_bitlevel\n");
2465
2466module_param(dynamic_buf_num_margin, uint, 0664);
2467MODULE_PARM_DESC(dynamic_buf_num_margin, "\n dynamic_buf_num_margin\n");
2468
2469module_param(radr, uint, 0664);
2470MODULE_PARM_DESC(radr, "\nradr\n");
2471
2472module_param(rval, uint, 0664);
2473MODULE_PARM_DESC(rval, "\nrval\n");
2474
2475module_param(decode_timeout_val, uint, 0664);
2476MODULE_PARM_DESC(decode_timeout_val, "\n ammvdec_mpeg4 decode_timeout_val\n");
2477
2478module_param_array(max_process_time, uint, &max_decode_instance_num, 0664);
2479
2480module_param(pre_decode_buf_level, int, 0664);
2481MODULE_PARM_DESC(pre_decode_buf_level,
2482 "\n ammvdec_mpeg4 pre_decode_buf_level\n");
2483
2484module_param(start_decode_buf_level, int, 0664);
2485MODULE_PARM_DESC(start_decode_buf_level,
2486 "\n ammvdec_mpeg4 start_decode_buf_level\n");
2487
2488module_param(udebug_flag, uint, 0664);
2489MODULE_PARM_DESC(udebug_flag, "\n ammvdec_mpeg4 udebug_flag\n");
2490
2491module_param(without_display_mode, uint, 0664);
2492MODULE_PARM_DESC(without_display_mode, "\n ammvdec_mpeg4 without_display_mode\n");
2493
2494module_init(ammvdec_mpeg4_driver_init_module);
2495module_exit(ammvdec_mpeg4_driver_remove_module);
2496
2497MODULE_DESCRIPTION("AMLOGIC MPEG4 Video Decoder Driver");
2498MODULE_LICENSE("GPL");
2499MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>");
2500
2501
generated by cgit at 2024-05-17 10:00:50 (GMT)