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path: root/drivers/frame_provider/decoder/mpeg4/vmpeg4_multi.c (plain)
blob: d3bdb510503cea4059a9110c892f44f76acd5e6a
1/*
2 * drivers/amlogic/amports/vmpeg4.c
3 *
4 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/types.h>
21#include <linux/errno.h>
22#include <linux/interrupt.h>
23#include <linux/timer.h>
24#include <linux/kfifo.h>
25#include <linux/platform_device.h>
26#include <linux/dma-mapping.h>
27#include <linux/amlogic/media/utils/amstream.h>
28#include <linux/amlogic/media/frame_sync/ptsserv.h>
29
30#include <linux/amlogic/media/vfm/vframe.h>
31#include <linux/amlogic/media/vfm/vframe_provider.h>
32#include <linux/amlogic/media/vfm/vframe_receiver.h>
33#include <linux/amlogic/media/canvas/canvas.h>
34#include <linux/amlogic/media/codec_mm/codec_mm.h>
35#include <linux/amlogic/tee.h>
36#include <linux/amlogic/media/utils/vdec_reg.h>
37#include <linux/amlogic/media/registers/register.h>
38#include "../../../stream_input/amports/amports_priv.h"
39
40#include "../utils/amvdec.h"
41#include "../utils/vdec_input.h"
42#include "../utils/vdec.h"
43#include "../utils/firmware.h"
44#include "../utils/decoder_mmu_box.h"
45#include "../utils/decoder_bmmu_box.h"
46#include <linux/amlogic/media/codec_mm/configs.h>
47#include "../utils/firmware.h"
48
49
50
51#define DRIVER_NAME "ammvdec_mpeg4"
52#define MODULE_NAME "ammvdec_mpeg4"
53
54#define MEM_NAME "codec_mmpeg4"
55
56#define DEBUG_PTS
57
58#define NV21
59#define I_PICTURE 0
60#define P_PICTURE 1
61#define B_PICTURE 2
62#define GET_PIC_TYPE(type) ("IPB####"[type&0x3])
63
64#define ORI_BUFFER_START_ADDR 0x01000000
65#define DEFAULT_MEM_SIZE (32*SZ_1M)
66
67#define INTERLACE_FLAG 0x80
68#define TOP_FIELD_FIRST_FLAG 0x40
69
70/* protocol registers */
71#define MREG_REF0 AV_SCRATCH_1
72#define MREG_REF1 AV_SCRATCH_2
73#define MP4_PIC_RATIO AV_SCRATCH_5
74#define MP4_RATE AV_SCRATCH_3
75#define MP4_ERR_COUNT AV_SCRATCH_6
76#define MP4_PIC_WH AV_SCRATCH_7
77#define MREG_INPUT AV_SCRATCH_8
78#define MREG_BUFFEROUT AV_SCRATCH_9
79#define MP4_NOT_CODED_CNT AV_SCRATCH_A
80#define MP4_VOP_TIME_INC AV_SCRATCH_B
81#define MP4_OFFSET_REG AV_SCRATCH_C
82#define MP4_SYS_RATE AV_SCRATCH_E
83#define MEM_OFFSET_REG AV_SCRATCH_F
84
85#define PARC_FORBIDDEN 0
86#define PARC_SQUARE 1
87#define PARC_CIF 2
88#define PARC_10_11 3
89#define PARC_16_11 4
90#define PARC_40_33 5
91#define PARC_RESERVED 6
92/* values between 6 and 14 are reserved */
93#define PARC_EXTENDED 15
94
95#define VF_POOL_SIZE 16
96#define DECODE_BUFFER_NUM_MAX 8
97#define PUT_INTERVAL (HZ/100)
98#define MAX_BMMU_BUFFER_NUM (DECODE_BUFFER_NUM_MAX + 1)
99#define WORKSPACE_SIZE (12*SZ_64K)
100static u32 buf_size = 32 * 1024 * 1024;
101
102#define CTX_LMEM_SWAP_OFFSET 0
103#define CTX_QUANT_MATRIX_OFFSET 0x800
104/* dcac buffer must align at 4k boundary */
105#define CTX_DCAC_BUF_OFFSET 0x1000
106#define CTX_DECBUF_OFFSET (0x0c0000 + 0x1000)
107
108#define RATE_DETECT_COUNT 5
109#define DURATION_UNIT 96000
110#define PTS_UNIT 90000
111#define CHECK_INTERVAL (HZ/100)
112
113#define DUR2PTS(x) ((x) - ((x) >> 4))
114
115/* 96000/(60fps* 2field) = 800, 96000/10fps = 9600 */
116#define MPEG4_VALID_DUR(x) ((x < 9600) && (x > 799))
117
118#define MAX_MPEG4_SUPPORT_SIZE (1920*1088)
119
120#define DEC_RESULT_NONE 0
121#define DEC_RESULT_DONE 1
122#define DEC_RESULT_AGAIN 2
123#define DEC_RESULT_ERROR 3
124#define DEC_RESULT_FORCE_EXIT 4
125#define DEC_RESULT_EOS 5
126#define DEC_RESULT_UNFINISH 6
127
128#define DEC_DECODE_TIMEOUT 0x21
129#define DECODE_ID(hw) (hw_to_vdec(hw)->id)
130#define DECODE_STOP_POS AV_SCRATCH_K
131static u32 udebug_flag;
132
133static struct vframe_s *vmpeg_vf_peek(void *);
134static struct vframe_s *vmpeg_vf_get(void *);
135static void vmpeg_vf_put(struct vframe_s *, void *);
136static int vmpeg_vf_states(struct vframe_states *states, void *);
137static int vmpeg_event_cb(int type, void *data, void *private_data);
138static int pre_decode_buf_level = 0x800;
139static int debug_enable;
140static unsigned int radr;
141static unsigned int rval;
142/* 0x40bit = 8byte */
143static unsigned int frmbase_cont_bitlevel = 0x40;
144
145#define VMPEG4_DEV_NUM 9
146static unsigned int max_decode_instance_num = VMPEG4_DEV_NUM;
147static unsigned int max_process_time[VMPEG4_DEV_NUM];
148static unsigned int decode_timeout_val = 100;
149
150static u32 without_display_mode;
151
152#undef pr_info
153#define pr_info printk
154unsigned int mpeg4_debug_mask = 0xff;
155
156#define PRINT_FLAG_ERROR 0x0
157#define PRINT_FLAG_RUN_FLOW 0X0001
158#define PRINT_FLAG_TIMEINFO 0x0002
159#define PRINT_FLAG_UCODE_DETAIL 0x0004
160#define PRINT_FLAG_VLD_DETAIL 0x0008
161#define PRINT_FLAG_DEC_DETAIL 0x0010
162#define PRINT_FLAG_BUFFER_DETAIL 0x0020
163#define PRINT_FLAG_RESTORE 0x0040
164#define PRINT_FRAME_NUM 0x0080
165#define PRINT_FLAG_FORCE_DONE 0x0100
166#define PRINT_FLAG_COUNTER 0X0200
167#define PRINT_FRAMEBASE_DATA 0x0400
168#define PRINT_FLAG_VDEC_STATUS 0x0800
169#define PRINT_FLAG_TIMEOUT_STATUS 0x1000
170
171int mmpeg4_debug_print(int index, int debug_flag, const char *fmt, ...)
172{
173 if (((debug_enable & debug_flag) &&
174 ((1 << index) & mpeg4_debug_mask))
175 || (debug_flag == PRINT_FLAG_ERROR)) {
176 unsigned char buf[512];
177 int len = 0;
178 va_list args;
179 va_start(args, fmt);
180 len = sprintf(buf, "%d: ", index);
181 vsnprintf(buf + len, 512-len, fmt, args);
182 pr_info("%s", buf);
183 va_end(args);
184 }
185 return 0;
186}
187
188struct pic_info_t {
189 int index;
190 u32 pic_type;
191 u32 pic_info;
192 u32 pts;
193 u64 pts64;
194 bool pts_valid;
195 u32 duration;
196 u32 repeat_cnt;
197};
198
199struct vdec_mpeg4_hw_s {
200 spinlock_t lock;
201 struct platform_device *platform_dev;
202 /* struct device *cma_dev; */
203
204 DECLARE_KFIFO(newframe_q, struct vframe_s *, VF_POOL_SIZE);
205 DECLARE_KFIFO(display_q, struct vframe_s *, VF_POOL_SIZE);
206 struct vframe_s vfpool[VF_POOL_SIZE];
207
208 s32 vfbuf_use[DECODE_BUFFER_NUM_MAX];
209 u32 frame_width;
210 u32 frame_height;
211 u32 frame_dur;
212 u32 frame_prog;
213
214 u32 ctx_valid;
215 u32 reg_vcop_ctrl_reg;
216 u32 reg_pic_head_info;
217 u32 reg_mpeg1_2_reg;
218 u32 reg_slice_qp;
219 u32 reg_mp4_pic_wh;
220 u32 reg_mp4_rate;
221 u32 reg_mb_info;
222 u32 reg_dc_ac_ctrl;
223 u32 reg_iqidct_control;
224 u32 reg_resync_marker_length;
225 u32 reg_rv_ai_mb_count;
226 struct timer_list check_timer;
227 u32 decode_timeout_count;
228 u32 timeout_cnt;
229 unsigned long int start_process_time;
230
231 u32 last_vld_level;
232 u8 init_flag;
233 u32 eos;
234 void *mm_blk_handle;
235
236 struct vframe_chunk_s *chunk;
237 u32 chunk_offset;
238 u32 chunk_size;
239 u32 chunk_frame_count;
240 u32 stat;
241 unsigned long buf_start;
242 u32 buf_size;
243 /*
244 unsigned long cma_alloc_addr;
245 int cma_alloc_count;
246 */
247 u32 vmpeg4_ratio;
248 u64 vmpeg4_ratio64;
249 u32 rate_detect;
250 u32 vmpeg4_rotation;
251 u32 total_frame;
252 u32 last_vop_time_inc;
253 u32 last_duration;
254 u32 last_anch_pts;
255 u32 vop_time_inc_since_last_anch;
256 u32 frame_num_since_last_anch;
257 u64 last_anch_pts_us64;
258
259 u32 last_pts;
260 u64 last_pts64;
261 u32 pts_hit;
262 u32 pts_missed;
263 u32 pts_i_hit;
264 u32 pts_i_missed;
265 struct pic_info_t pic[DECODE_BUFFER_NUM_MAX];
266 u32 canvas_spec[DECODE_BUFFER_NUM_MAX];
267#ifdef NV21
268 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][2];
269#else
270 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][3];
271#endif
272 struct dec_sysinfo vmpeg4_amstream_dec_info;
273
274 s32 refs[2];
275 int dec_result;
276 struct work_struct work;
277
278 void (*vdec_cb)(struct vdec_s *, void *);
279 void *vdec_cb_arg;
280 u32 frame_num;
281 u32 put_num;
282 u32 sys_mp4_rate;
283 u32 run_count;
284 u32 not_run_ready;
285 u32 buffer_not_ready;
286 u32 input_empty;
287 u32 peek_num;
288 u32 get_num;
289 u32 first_i_frame_ready;
290 u32 drop_frame_count;
291 u32 unstable_pts;
292 u32 last_dec_pts;
293
294 struct firmware_s *fw;
295 u32 blkmode;
296 wait_queue_head_t wait_q;
297};
298static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw);
299static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw);
300static unsigned char
301 get_data_check_sum(struct vdec_mpeg4_hw_s *hw, int size);
302
303#define PROVIDER_NAME "vdec.mpeg4"
304
305/*
306 *int query_video_status(int type, int *value);
307 */
308static const struct vframe_operations_s vf_provider_ops = {
309 .peek = vmpeg_vf_peek,
310 .get = vmpeg_vf_get,
311 .put = vmpeg_vf_put,
312 .event_cb = vmpeg_event_cb,
313 .vf_states = vmpeg_vf_states,
314};
315
316static unsigned char aspect_ratio_table[16] = {
317 PARC_FORBIDDEN,
318 PARC_SQUARE,
319 PARC_CIF,
320 PARC_10_11,
321 PARC_16_11,
322 PARC_40_33,
323 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
324 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
325 PARC_RESERVED, PARC_EXTENDED
326};
327
328static void reset_process_time(struct vdec_mpeg4_hw_s *hw);
329static int find_buffer(struct vdec_mpeg4_hw_s *hw)
330{
331 int i;
332
333 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
334 if (hw->vfbuf_use[i] == 0)
335 return i;
336 }
337
338 return DECODE_BUFFER_NUM_MAX;
339}
340
341static int spec_to_index(struct vdec_mpeg4_hw_s *hw, u32 spec)
342{
343 int i;
344
345 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
346 if (hw->canvas_spec[i] == spec)
347 return i;
348 }
349
350 return -1;
351}
352
353static void set_frame_info(struct vdec_mpeg4_hw_s *hw, struct vframe_s *vf,
354 int buffer_index)
355{
356 int ar = 0;
357 unsigned int num = 0;
358 unsigned int den = 0;
359 unsigned int pixel_ratio = READ_VREG(MP4_PIC_RATIO);
360
361 if (hw->vmpeg4_ratio64 != 0) {
362 num = hw->vmpeg4_ratio64>>32;
363 den = hw->vmpeg4_ratio64 & 0xffffffff;
364 } else {
365 num = hw->vmpeg4_ratio>>16;
366 den = hw->vmpeg4_ratio & 0xffff;
367
368 }
369 if ((num == 0) || (den == 0)) {
370 num = 1;
371 den = 1;
372 }
373
374 if (hw->vmpeg4_ratio == 0) {
375 vf->ratio_control |= (0x90 << DISP_RATIO_ASPECT_RATIO_BIT);
376 /* always stretch to 16:9 */
377 } else if (pixel_ratio > 0x0f) {
378 num = (pixel_ratio >> 8) *
379 hw->frame_width * num;
380 ar = div_u64((pixel_ratio & 0xff) *
381 hw->frame_height * den * 0x100ULL +
382 (num >> 1), num);
383 } else {
384 switch (aspect_ratio_table[pixel_ratio]) {
385 case 0:
386 num = hw->frame_width * num;
387 ar = (hw->frame_height * den *
388 0x100 + (num >> 1)) / num;
389 break;
390 case 1:
391 num = vf->width * num;
392 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
393 break;
394 case 2:
395 num = (vf->width * 12) * num;
396 ar = (vf->height * den * 0x100 * 11 +
397 ((num) >> 1)) / num;
398 break;
399 case 3:
400 num = (vf->width * 10) * num;
401 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
402 num;
403 break;
404 case 4:
405 num = (vf->width * 16) * num;
406 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
407 num;
408 break;
409 case 5:
410 num = (vf->width * 40) * num;
411 ar = (vf->height * den * 0x100 * 33 + (num >> 1)) /
412 num;
413 break;
414 default:
415 num = vf->width * num;
416 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
417 break;
418 }
419 }
420
421 ar = min(ar, DISP_RATIO_ASPECT_RATIO_MAX);
422
423 vf->signal_type = 0;
424 vf->type_original = vf->type;
425 vf->ratio_control = (ar << DISP_RATIO_ASPECT_RATIO_BIT);
426 vf->canvas0Addr = vf->canvas1Addr = -1;
427#ifdef NV21
428 vf->plane_num = 2;
429#else
430 vf->plane_num = 3;
431#endif
432 vf->canvas0_config[0] = hw->canvas_config[buffer_index][0];
433 vf->canvas0_config[1] = hw->canvas_config[buffer_index][1];
434#ifndef NV21
435 vf->canvas0_config[2] = hw->canvas_config[buffer_index][2];
436#endif
437 vf->canvas1_config[0] = hw->canvas_config[buffer_index][0];
438 vf->canvas1_config[1] = hw->canvas_config[buffer_index][1];
439#ifndef NV21
440 vf->canvas1_config[2] = hw->canvas_config[buffer_index][2];
441#endif
442}
443
444static inline void vmpeg4_save_hw_context(struct vdec_mpeg4_hw_s *hw)
445{
446 hw->reg_mpeg1_2_reg = READ_VREG(MPEG1_2_REG);
447 hw->reg_vcop_ctrl_reg = READ_VREG(VCOP_CTRL_REG);
448 hw->reg_pic_head_info = READ_VREG(PIC_HEAD_INFO);
449 hw->reg_slice_qp = READ_VREG(SLICE_QP);
450 hw->reg_mp4_pic_wh = READ_VREG(MP4_PIC_WH);
451 hw->reg_mp4_rate = READ_VREG(MP4_RATE);
452 hw->reg_mb_info = READ_VREG(MB_INFO);
453 hw->reg_dc_ac_ctrl = READ_VREG(DC_AC_CTRL);
454 hw->reg_iqidct_control = READ_VREG(IQIDCT_CONTROL);
455 hw->reg_resync_marker_length = READ_VREG(RESYNC_MARKER_LENGTH);
456 hw->reg_rv_ai_mb_count = READ_VREG(RV_AI_MB_COUNT);
457}
458
459static int update_ref(struct vdec_mpeg4_hw_s *hw, int index)
460{
461 hw->vfbuf_use[index]++;
462
463 if (hw->refs[1] == -1) {
464 hw->refs[1] = index;
465 index = -1;
466 } else if (hw->refs[0] == -1) {
467 hw->refs[0] = hw->refs[1];
468 hw->refs[1] = index;
469 index = hw->refs[0];
470 } else {
471 hw->vfbuf_use[hw->refs[0]]--;
472 hw->refs[0] = hw->refs[1];
473 hw->refs[1] = index;
474 index = hw->refs[0];
475 }
476
477 return index;
478}
479
480
481static int prepare_display_buf(struct vdec_mpeg4_hw_s * hw,
482 struct pic_info_t *pic)
483{
484 struct vframe_s *vf = NULL;
485 struct vdec_s *vdec = hw_to_vdec(hw);
486 int index = pic->index;
487
488 if (pic->pic_info & INTERLACE_FLAG) {
489 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
490 mmpeg4_debug_print(DECODE_ID(hw), 0,
491 "fatal error, no available buffer slot.");
492 return -1;
493 }
494
495 vf->index = pic->index;
496 vf->width = hw->frame_width;
497 vf->height = hw->frame_height;
498 vf->bufWidth = 1920;
499 vf->flag = 0;
500 vf->orientation = hw->vmpeg4_rotation;
501 vf->pts = pic->pts;
502 vf->pts_us64 = pic->pts64;
503 vf->duration = pic->duration >> 1;
504 vf->duration_pulldown = 0;
505 vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ?
506 VIDTYPE_INTERLACE_TOP : VIDTYPE_INTERLACE_BOTTOM;
507#ifdef NV21
508 vf->type |= VIDTYPE_VIU_NV21;
509#endif
510 set_frame_info(hw, vf, pic->index);
511
512 hw->vfbuf_use[pic->index]++;
513 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
514 "field0: pts %d, pts64 %lld, w %d, h %d, dur %d\n",
515 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
516
517 if ((hw->first_i_frame_ready == 0)
518 && (pic->pic_type != I_PICTURE)) {
519 hw->drop_frame_count++;
520 hw->vfbuf_use[index]--;
521 kfifo_put(&hw->newframe_q,
522 (const struct vframe_s *)vf);
523 return 0;
524 } else {
525 vf->mem_handle =
526 decoder_bmmu_box_get_mem_handle(
527 hw->mm_blk_handle, index);
528 kfifo_put(&hw->display_q,
529 (const struct vframe_s *)vf);
530 ATRACE_COUNTER(MODULE_NAME, vf->pts);
531 vdec->vdec_fps_detec(vdec->id);
532 hw->frame_num++;
533 if (without_display_mode == 0) {
534 vf_notify_receiver(vdec->vf_provider_name,
535 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
536 } else
537 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
538 }
539
540 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
541 mmpeg4_debug_print(DECODE_ID(hw), 0,
542 "error, no available buf.\n");
543 hw->dec_result = DEC_RESULT_ERROR;
544 return -1;
545 }
546
547 vf->index = pic->index;
548 vf->width = hw->frame_width;
549 vf->height = hw->frame_height;
550 vf->bufWidth = 1920;
551 vf->flag = 0;
552 vf->orientation = hw->vmpeg4_rotation;
553 vf->pts = 0;
554 vf->pts_us64 = 0;
555 vf->duration = pic->duration >> 1;
556 vf->duration_pulldown = 0;
557 vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ?
558 VIDTYPE_INTERLACE_BOTTOM : VIDTYPE_INTERLACE_TOP;
559#ifdef NV21
560 vf->type |= VIDTYPE_VIU_NV21;
561#endif
562 set_frame_info(hw, vf, pic->index);
563
564 hw->vfbuf_use[pic->index]++;
565 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
566 "filed1: pts %d, pts64 %lld, w %d, h %d, dur: %d\n",
567 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
568 if ((hw->first_i_frame_ready == 0) &&
569 (pic->pic_type != I_PICTURE)) {
570 hw->drop_frame_count++;
571 hw->vfbuf_use[index]--;
572 kfifo_put(&hw->newframe_q,
573 (const struct vframe_s *)vf);
574 } else {
575 vf->mem_handle =
576 decoder_bmmu_box_get_mem_handle(
577 hw->mm_blk_handle, index);
578 kfifo_put(&hw->display_q,
579 (const struct vframe_s *)vf);
580 ATRACE_COUNTER(MODULE_NAME, vf->pts);
581 vdec->vdec_fps_detec(vdec->id);
582 decoder_do_frame_check(vdec, vf);
583 hw->frame_num++;
584 if (without_display_mode == 0) {
585 vf_notify_receiver(vdec->vf_provider_name,
586 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
587 } else
588 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
589 }
590 } else {
591 /* progressive */
592 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
593 mmpeg4_debug_print(DECODE_ID(hw), 0,
594 "error, no available buf\n");
595 hw->dec_result = DEC_RESULT_ERROR;
596 return -1;
597 }
598
599 vf->index = index;
600 vf->width = hw->frame_width;
601 vf->height = hw->frame_height;
602 vf->bufWidth = 1920;
603 vf->flag = 0;
604 vf->orientation = hw->vmpeg4_rotation;
605 vf->pts = pic->pts;
606 vf->pts_us64 = pic->pts64;
607 vf->duration = pic->duration;
608 vf->duration_pulldown = pic->repeat_cnt *
609 pic->duration;
610#ifdef NV21
611 vf->type = VIDTYPE_PROGRESSIVE |
612 VIDTYPE_VIU_FIELD | VIDTYPE_VIU_NV21;
613#else
614 vf->type = VIDTYPE_PROGRESSIVE |
615 VIDTYPE_VIU_FIELD;
616#endif
617 set_frame_info(hw, vf, index);
618
619 hw->vfbuf_use[index]++;
620 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
621 "prog: pts %d, pts64 %lld, w %d, h %d, dur %d\n",
622 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
623
624 if ((hw->first_i_frame_ready == 0) &&
625 (pic->pic_type != I_PICTURE)) {
626 hw->drop_frame_count++;
627 hw->vfbuf_use[index]--;
628 kfifo_put(&hw->newframe_q,
629 (const struct vframe_s *)vf);
630 } else {
631 vf->mem_handle =
632 decoder_bmmu_box_get_mem_handle(
633 hw->mm_blk_handle, index);
634 kfifo_put(&hw->display_q,
635 (const struct vframe_s *)vf);
636 ATRACE_COUNTER(MODULE_NAME, vf->pts);
637 vdec->vdec_fps_detec(vdec->id);
638 decoder_do_frame_check(vdec, vf);
639 hw->frame_num++;
640
641 if (without_display_mode == 0) {
642 vf_notify_receiver(vdec->vf_provider_name,
643 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
644 } else
645 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
646 }
647
648 }
649 return 0;
650}
651
652static void vmpeg4_prepare_input(struct vdec_mpeg4_hw_s *hw)
653{
654 struct vdec_s *vdec = hw_to_vdec(hw);
655 struct vdec_input_s *input = &vdec->input;
656 struct vframe_block_list_s *block = NULL;
657 struct vframe_chunk_s *chunk = hw->chunk;
658 int dummy;
659
660 if (chunk == NULL)
661 return;
662
663 /* full reset to HW input */
664 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0);
665
666 /* reset VLD fifo for all vdec */
667 WRITE_VREG(DOS_SW_RESET0, (1<<5) | (1<<4) | (1<<3));
668 WRITE_VREG(DOS_SW_RESET0, 0);
669
670 dummy = READ_RESET_REG(RESET0_REGISTER);
671 WRITE_VREG(POWER_CTL_VLD, 1 << 4);
672
673 /*
674 *setup HW decoder input buffer (VLD context)
675 * based on input->type and input->target
676 */
677 if (input_frame_based(input)) {
678 block = chunk->block;
679
680 WRITE_VREG(VLD_MEM_VIFIFO_START_PTR, block->start);
681 WRITE_VREG(VLD_MEM_VIFIFO_END_PTR, block->start +
682 block->size - 8);
683 WRITE_VREG(VLD_MEM_VIFIFO_CURR_PTR,
684 round_down(block->start + hw->chunk_offset,
685 VDEC_FIFO_ALIGN));
686
687 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 1);
688 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0);
689
690 /* set to manual mode */
691 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2);
692 WRITE_VREG(VLD_MEM_VIFIFO_RP,
693 round_down(block->start + hw->chunk_offset,
694 VDEC_FIFO_ALIGN));
695 dummy = hw->chunk_offset + hw->chunk_size +
696 VLD_PADDING_SIZE;
697 if (dummy >= block->size)
698 dummy -= block->size;
699 WRITE_VREG(VLD_MEM_VIFIFO_WP,
700 round_down(block->start + dummy,
701 VDEC_FIFO_ALIGN));
702
703 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 3);
704 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2);
705
706 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL,
707 (0x11 << 16) | (1<<10) | (7<<3));
708
709 }
710}
711
712static irqreturn_t vmpeg4_isr_thread_fn(struct vdec_s *vdec, int irq)
713{
714 u32 reg;
715 u32 picture_type;
716 int index;
717 u32 pts, offset = 0;
718 u64 pts_us64 = 0;
719 u32 frame_size, dec_w, dec_h;
720 u32 time_increment_resolution, fixed_vop_rate, vop_time_inc;
721 u32 repeat_cnt, duration = 3200;
722 struct pic_info_t *dec_pic, *disp_pic;
723 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)(vdec->private);
724
725 if (hw->eos)
726 return IRQ_HANDLED;
727
728 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
729 if (READ_VREG(AV_SCRATCH_M) != 0 &&
730 (debug_enable & PRINT_FLAG_UCODE_DETAIL)) {
731 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_UCODE_DETAIL,
732 "dbg %x: %x, level %x, wp %x, rp %x, cnt %x\n",
733 READ_VREG(AV_SCRATCH_M), READ_VREG(AV_SCRATCH_N),
734 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
735 READ_VREG(VLD_MEM_VIFIFO_WP),
736 READ_VREG(VLD_MEM_VIFIFO_RP),
737 READ_VREG(VIFF_BIT_CNT));
738 WRITE_VREG(AV_SCRATCH_M, 0);
739 return IRQ_HANDLED;
740 }
741 reg = READ_VREG(MREG_BUFFEROUT);
742
743 time_increment_resolution = READ_VREG(MP4_RATE);
744 fixed_vop_rate = time_increment_resolution >> 16;
745 time_increment_resolution &= 0xffff;
746 if (time_increment_resolution > 0 &&
747 fixed_vop_rate == 0)
748 hw->sys_mp4_rate = time_increment_resolution;
749
750 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
751 if ((fixed_vop_rate != 0) &&
752 (time_increment_resolution != 0)) {
753 hw->vmpeg4_amstream_dec_info.rate = fixed_vop_rate *
754 DURATION_UNIT / time_increment_resolution;
755 } else if (time_increment_resolution == 0
756 && hw->sys_mp4_rate > 0)
757 time_increment_resolution = hw->sys_mp4_rate;
758 }
759 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL,
760 "time_inc_res = %d, fixed_vop_rate = %d, rate = %d\n",
761 time_increment_resolution, fixed_vop_rate,
762 hw->vmpeg4_amstream_dec_info.rate);
763
764 if (reg == 2) {
765 /* timeout when decoding next frame */
766
767 /* for frame based case, insufficient result may happen
768 * at the beginning when only VOL head is available save
769 * HW context also, such as for the QTable from VCOP register
770 */
771 mmpeg4_debug_print(DECODE_ID(hw),
772 PRINT_FLAG_VLD_DETAIL,
773 "%s, level = %x, vfifo_ctrl = %x, bitcnt = %d\n",
774 __func__,
775 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
776 READ_VREG(VLD_MEM_VIFIFO_CONTROL),
777 READ_VREG(VIFF_BIT_CNT));
778
779 if (vdec_frame_based(vdec)) {
780 //vmpeg4_save_hw_context(hw);
781 hw->dec_result = DEC_RESULT_DONE;
782 vdec_schedule_work(&hw->work);
783 } else {
784 reset_process_time(hw);
785 hw->dec_result = DEC_RESULT_AGAIN;
786 vdec_schedule_work(&hw->work);
787 }
788 return IRQ_HANDLED;
789 } else {
790 reset_process_time(hw);
791 picture_type = (reg >> 3) & 7;
792 repeat_cnt = READ_VREG(MP4_NOT_CODED_CNT);
793 vop_time_inc = READ_VREG(MP4_VOP_TIME_INC);
794
795 index = spec_to_index(hw, READ_VREG(REC_CANVAS_ADDR));
796 if (index < 0) {
797 mmpeg4_debug_print(DECODE_ID(hw), 0,
798 "invalid buffer index %d. rec = %x\n",
799 index, READ_VREG(REC_CANVAS_ADDR));
800 hw->dec_result = DEC_RESULT_ERROR;
801 vdec_schedule_work(&hw->work);
802 return IRQ_HANDLED;
803 }
804 hw->dec_result = DEC_RESULT_DONE;
805 dec_pic = &hw->pic[index];
806 dec_pic->pts_valid = false;
807 dec_pic->pts = 0;
808 dec_pic->pts64 = 0;
809 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
810 "new pic: index=%d, used=%d, repeat=%d, time_inc=%d\n",
811 index, hw->vfbuf_use[index], repeat_cnt, vop_time_inc);
812
813 dec_w = READ_VREG(MP4_PIC_WH)>> 16;
814 dec_h = READ_VREG(MP4_PIC_WH) & 0xffff;
815 if (dec_w != 0)
816 hw->frame_width = dec_w;
817 if (dec_h != 0)
818 hw->frame_height = dec_h;
819
820 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
821 if (vop_time_inc < hw->last_vop_time_inc) {
822 duration = vop_time_inc +
823 time_increment_resolution -
824 hw->last_vop_time_inc;
825 } else {
826 duration = vop_time_inc -
827 hw->last_vop_time_inc;
828 }
829
830 if (duration == hw->last_duration) {
831 hw->rate_detect++;
832 if ((hw->rate_detect >= RATE_DETECT_COUNT) &&
833 (time_increment_resolution != 0)) {
834 hw->vmpeg4_amstream_dec_info.rate =
835 duration * DURATION_UNIT /
836 time_increment_resolution;
837 duration =
838 hw->vmpeg4_amstream_dec_info.rate;
839 }
840 } else {
841 hw->rate_detect = 0;
842 hw->last_duration = duration;
843 }
844 if (MPEG4_VALID_DUR(duration)) {
845 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
846 "warn: duration %x, set 0\n", duration);
847 duration = 0;
848 }
849 } else {
850 duration = hw->vmpeg4_amstream_dec_info.rate;
851#if 0
852 pr_info("info rate = %d, ucode rate = 0x%x:0x%x\n",
853 hw->vmpeg4_amstream_dec_info.rate,
854 READ_VREG(MP4_RATE), vop_time_inc);
855#endif
856 }
857
858 /* frame mode with unstable pts */
859 if (hw->unstable_pts && hw->chunk) {
860 dec_pic->pts_valid = hw->chunk->pts_valid;
861 dec_pic->pts = hw->chunk->pts;
862 dec_pic->pts64 = hw->chunk->pts64;
863 if ((B_PICTURE == picture_type) ||
864 (hw->last_dec_pts == dec_pic->pts))
865 dec_pic->pts_valid = 0;
866
867 hw->last_dec_pts = dec_pic->pts;
868 } else if ((I_PICTURE == picture_type) ||
869 (P_PICTURE == picture_type)) {
870 offset = READ_VREG(MP4_OFFSET_REG);
871 if (hw->chunk) {
872 dec_pic->pts_valid = hw->chunk->pts_valid;
873 dec_pic->pts = hw->chunk->pts;
874 dec_pic->pts64 = hw->chunk->pts64;
875 } else {
876 if (pts_lookup_offset_us64(PTS_TYPE_VIDEO, offset,
877 &pts, &frame_size, 3000, &pts_us64) == 0) {
878 dec_pic->pts_valid = true;
879 dec_pic->pts = pts;
880 dec_pic->pts64 = pts_us64;
881 hw->pts_hit++;
882 } else {
883 dec_pic->pts_valid = false;
884 hw->pts_missed++;
885 }
886 }
887 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
888 "%c, offset=0x%x, pts=0x%x(%d), index=%d, used=%d\n",
889 GET_PIC_TYPE(picture_type), offset, dec_pic->pts,
890 dec_pic->pts_valid, index, hw->vfbuf_use[index]);
891 }
892
893 dec_pic->index = index;
894 dec_pic->pic_info = reg;
895 dec_pic->pic_type = picture_type;
896 dec_pic->duration = duration;
897 hw->vfbuf_use[index] = 0;
898 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
899 "mmpeg4: pic_num: %d, index %d, type %c, pts %x\n",
900 hw->frame_num, index,
901 GET_PIC_TYPE(picture_type),
902 dec_pic->pts);
903
904 /* buffer management */
905 if ((picture_type == I_PICTURE) ||
906 (picture_type == P_PICTURE)) {
907 index = update_ref(hw, index);
908 } else {
909 /* drop B frame or disp immediately.
910 * depend on if there are two ref frames
911 */
912 if (hw->refs[1] == -1)
913 index = -1;
914 }
915 vmpeg4_save_hw_context(hw);
916 if (index < 0) {
917 vdec_schedule_work(&hw->work);
918 return IRQ_HANDLED;
919 }
920 disp_pic = &hw->pic[index];
921
922 if ((hw->first_i_frame_ready == 0) &&
923 (I_PICTURE == disp_pic->pic_type))
924 hw->first_i_frame_ready = 1;
925
926 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
927 "disp: index=%d, pts=%x(%d), used=%d, picout=%c(dec=%c)\n",
928 index, disp_pic->pts, disp_pic->pts_valid,
929 hw->vfbuf_use[index],
930 GET_PIC_TYPE(disp_pic->pic_type),
931 GET_PIC_TYPE(picture_type));
932
933 if (disp_pic->pts_valid) {
934 hw->last_anch_pts = disp_pic->pts;
935 hw->last_anch_pts_us64 = disp_pic->pts64;
936 hw->frame_num_since_last_anch = 0;
937 hw->vop_time_inc_since_last_anch = 0;
938 } else if (vdec_stream_based(vdec)) {
939 disp_pic->pts = hw->last_anch_pts;
940 disp_pic->pts64 = hw->last_anch_pts_us64;
941
942 if ((time_increment_resolution != 0) &&
943 (fixed_vop_rate == 0) &&
944 (hw->vmpeg4_amstream_dec_info.rate == 0)) {
945 /* variable PTS rate */
946 /*bug on variable pts calc,
947 *do as dixed vop first if we
948 *have rate setting before.
949 */
950 if (vop_time_inc > hw->last_vop_time_inc) {
951 duration = vop_time_inc -
952 hw->last_vop_time_inc;
953 } else {
954 duration = vop_time_inc +
955 time_increment_resolution -
956 hw->last_vop_time_inc;
957 }
958
959 hw->vop_time_inc_since_last_anch += duration;
960
961 disp_pic->pts += hw->vop_time_inc_since_last_anch *
962 PTS_UNIT / time_increment_resolution;
963 disp_pic->pts64 += (hw->vop_time_inc_since_last_anch *
964 PTS_UNIT / time_increment_resolution) *
965 100 / 9;
966
967 if (hw->vop_time_inc_since_last_anch >
968 (1 << 14)) {
969 /* avoid overflow */
970 hw->last_anch_pts = disp_pic->pts;
971 hw->last_anch_pts_us64 = disp_pic->pts64;
972 hw->vop_time_inc_since_last_anch = 0;
973 }
974 } else {
975 /* fixed VOP rate */
976 hw->frame_num_since_last_anch++;
977 disp_pic->pts += DUR2PTS(hw->frame_num_since_last_anch *
978 hw->vmpeg4_amstream_dec_info.rate);
979 disp_pic->pts64 += DUR2PTS(
980 hw->frame_num_since_last_anch *
981 hw->vmpeg4_amstream_dec_info.rate) * 100 / 9;
982
983 if (hw->frame_num_since_last_anch > (1 << 15)) {
984 /* avoid overflow */
985 hw->last_anch_pts = disp_pic->pts;
986 hw->last_anch_pts_us64 = disp_pic->pts64;
987 hw->frame_num_since_last_anch = 0;
988 }
989 }
990 } else if (hw->unstable_pts && hw->chunk &&
991 MPEG4_VALID_DUR(duration)) {
992 /* invalid pts calc */
993 hw->frame_num_since_last_anch = hw->chunk_frame_count;
994 disp_pic->pts = hw->last_anch_pts +
995 DUR2PTS(hw->frame_num_since_last_anch *
996 duration);
997 disp_pic->pts64 = hw->last_anch_pts_us64 +
998 DUR2PTS(hw->frame_num_since_last_anch *
999 duration) * 100 / 9;
1000
1001 if (hw->frame_num_since_last_anch > (1 << 15)) {
1002 /* avoid overflow */
1003 hw->last_anch_pts = disp_pic->pts;
1004 hw->last_anch_pts_us64 = disp_pic->pts64;
1005 hw->frame_num_since_last_anch = 0;
1006 } else
1007 disp_pic->pts_valid = 1;
1008 }
1009
1010 if (vdec_frame_based(vdec) &&
1011 (hw->unstable_pts) &&
1012 MPEG4_VALID_DUR(duration)) {
1013
1014 u32 threshold = DUR2PTS(duration) >> 3;
1015
1016 if (disp_pic->pts <= (hw->last_pts + threshold)) {
1017 disp_pic->pts = hw->last_pts + DUR2PTS(duration);
1018 disp_pic->pts64 = hw->last_pts64 +
1019 (DUR2PTS(duration)*100/9);
1020 }
1021 if (!disp_pic->pts_valid) {
1022 disp_pic->pts = 0;
1023 disp_pic->pts64 = 0;
1024 }
1025 }
1026 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1027 "disp: pic_type %c, pts %d(%lld), diff %d, cnt %d\n",
1028 GET_PIC_TYPE(disp_pic->pic_type),
1029 disp_pic->pts,
1030 disp_pic->pts64,
1031 disp_pic->pts - hw->last_pts,
1032 hw->chunk_frame_count);
1033 hw->last_pts = disp_pic->pts;
1034 hw->last_pts64 = disp_pic->pts64;
1035 hw->frame_dur = duration;
1036 disp_pic->duration = duration;
1037 disp_pic->repeat_cnt = repeat_cnt;
1038
1039 prepare_display_buf(hw, disp_pic);
1040
1041 hw->total_frame += repeat_cnt + 1;
1042 hw->last_vop_time_inc = vop_time_inc;
1043
1044 if (vdec_frame_based(vdec) &&
1045 (frmbase_cont_bitlevel != 0) &&
1046 (hw->first_i_frame_ready)) {
1047 u32 consume_byte, res_byte, bitcnt;
1048
1049 bitcnt = READ_VREG(VIFF_BIT_CNT);
1050 res_byte = bitcnt >> 3;
1051
1052 if (hw->chunk_size > res_byte) {
1053 if (bitcnt > frmbase_cont_bitlevel) {
1054 consume_byte = hw->chunk_size - res_byte;
1055
1056 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1057 "%s, size %d, consume %d, res %d\n", __func__,
1058 hw->chunk_size, consume_byte, res_byte);
1059
1060 if (consume_byte > VDEC_FIFO_ALIGN) {
1061 consume_byte -= VDEC_FIFO_ALIGN;
1062 res_byte += VDEC_FIFO_ALIGN;
1063 }
1064 hw->chunk_offset += consume_byte;
1065 hw->chunk_size = res_byte;
1066 hw->dec_result = DEC_RESULT_UNFINISH;
1067 hw->chunk_frame_count++;
1068 hw->unstable_pts = 1;
1069 } else {
1070 hw->chunk_size = 0;
1071 hw->chunk_offset = 0;
1072 }
1073 } else {
1074 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1075 "error: bitbyte %d hw->chunk_size %d\n", res_byte, hw->chunk_size);
1076 hw->chunk_size = 0;
1077 hw->chunk_offset = 0;
1078 }
1079 }
1080 vdec_schedule_work(&hw->work);
1081 }
1082 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
1083 "%s: frame num:%d\n", __func__, hw->frame_num);
1084
1085 return IRQ_HANDLED;
1086}
1087
1088static irqreturn_t vmpeg4_isr(struct vdec_s *vdec, int irq)
1089{
1090 struct vdec_mpeg4_hw_s *hw =
1091 (struct vdec_mpeg4_hw_s *)(vdec->private);
1092
1093 if (hw->eos)
1094 return IRQ_HANDLED;
1095
1096 return IRQ_WAKE_THREAD;
1097}
1098
1099static void flush_output(struct vdec_mpeg4_hw_s * hw)
1100{
1101 struct pic_info_t *pic;
1102
1103 if (hw->vfbuf_use[hw->refs[1]] > 0) {
1104 pic = &hw->pic[hw->refs[1]];
1105 prepare_display_buf(hw, pic);
1106 }
1107}
1108
1109static void vmpeg4_work(struct work_struct *work)
1110{
1111 struct vdec_mpeg4_hw_s *hw =
1112 container_of(work, struct vdec_mpeg4_hw_s, work);
1113 struct vdec_s *vdec = hw_to_vdec(hw);
1114
1115 /* finished decoding one frame or error,
1116 * notify vdec core to switch context
1117 */
1118 if (hw->dec_result != DEC_RESULT_DONE)
1119 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1120 "vmpeg4_work: result=%d,status=%d\n",
1121 hw->dec_result, hw_to_vdec(hw)->next_status);
1122
1123 if (hw->dec_result == DEC_RESULT_UNFINISH) {
1124 if (!hw->ctx_valid)
1125 hw->ctx_valid = 1;
1126
1127 } else if ((hw->dec_result == DEC_RESULT_DONE) ||
1128 ((input_frame_based(&vdec->input)) && hw->chunk)) {
1129 if (!hw->ctx_valid)
1130 hw->ctx_valid = 1;
1131
1132 vdec_vframe_dirty(vdec, hw->chunk);
1133 hw->chunk = NULL;
1134 } else if (hw->dec_result == DEC_RESULT_AGAIN
1135 && (vdec->next_status != VDEC_STATUS_DISCONNECTED)) {
1136 /*
1137 stream base: stream buf empty or timeout
1138 frame base: vdec_prepare_input fail
1139 */
1140 if (!vdec_has_more_input(vdec)) {
1141 hw->dec_result = DEC_RESULT_EOS;
1142 vdec_schedule_work(&hw->work);
1143 return;
1144 }
1145 } else if (hw->dec_result == DEC_RESULT_FORCE_EXIT) {
1146 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1147 "%s: force exit\n", __func__);
1148 if (hw->stat & STAT_ISR_REG) {
1149 amvdec_stop();
1150 vdec_free_irq(VDEC_IRQ_1, (void *)hw);
1151 hw->stat &= ~STAT_ISR_REG;
1152 }
1153 } else if (hw->dec_result == DEC_RESULT_EOS) {
1154 hw->eos = 1;
1155 if (hw->stat & STAT_VDEC_RUN) {
1156 amvdec_stop();
1157 hw->stat &= ~STAT_VDEC_RUN;
1158 }
1159 vdec_vframe_dirty(vdec, hw->chunk);
1160 hw->chunk = NULL;
1161 vdec_clean_input(vdec);
1162 flush_output(hw);
1163 mmpeg4_debug_print(DECODE_ID(hw), 0,
1164 "%s: eos flushed, frame_num %d\n",
1165 __func__, hw->frame_num);
1166 }
1167
1168 if (hw->stat & STAT_VDEC_RUN) {
1169 amvdec_stop();
1170 hw->stat &= ~STAT_VDEC_RUN;
1171 }
1172 /*disable mbox interrupt */
1173 WRITE_VREG(ASSIST_MBOX1_MASK, 0);
1174 del_timer_sync(&hw->check_timer);
1175 hw->stat &= ~STAT_TIMER_ARM;
1176
1177 /* mark itself has all HW resource released and input released */
1178 if (vdec->parallel_dec == 1)
1179 vdec_core_finish_run(vdec, CORE_MASK_VDEC_1);
1180 else
1181 vdec_core_finish_run(vdec, CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
1182
1183 wake_up_interruptible(&hw->wait_q);
1184 if (hw->vdec_cb)
1185 hw->vdec_cb(vdec, hw->vdec_cb_arg);
1186}
1187
1188static struct vframe_s *vmpeg_vf_peek(void *op_arg)
1189{
1190 struct vframe_s *vf;
1191 struct vdec_s *vdec = op_arg;
1192 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1193
1194 if (!hw)
1195 return NULL;
1196 hw->peek_num++;
1197 if (kfifo_peek(&hw->display_q, &vf))
1198 return vf;
1199
1200 return NULL;
1201}
1202
1203static struct vframe_s *vmpeg_vf_get(void *op_arg)
1204{
1205 struct vframe_s *vf;
1206 struct vdec_s *vdec = op_arg;
1207 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1208 hw->get_num++;
1209 if (kfifo_get(&hw->display_q, &vf))
1210 return vf;
1211
1212 return NULL;
1213}
1214
1215static void vmpeg_vf_put(struct vframe_s *vf, void *op_arg)
1216{
1217 struct vdec_s *vdec = op_arg;
1218 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1219
1220 hw->vfbuf_use[vf->index]--;
1221 hw->put_num++;
1222 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
1223 "%s: put num:%d\n",__func__, hw->put_num);
1224 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
1225 "index=%d, used=%d\n", vf->index, hw->vfbuf_use[vf->index]);
1226 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1227}
1228
1229static int vmpeg_event_cb(int type, void *data, void *private_data)
1230{
1231 return 0;
1232}
1233
1234static int vmpeg_vf_states(struct vframe_states *states, void *op_arg)
1235{
1236 unsigned long flags;
1237 struct vdec_s *vdec = op_arg;
1238 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1239
1240 spin_lock_irqsave(&hw->lock, flags);
1241
1242 states->vf_pool_size = VF_POOL_SIZE;
1243 states->buf_free_num = kfifo_len(&hw->newframe_q);
1244 states->buf_avail_num = kfifo_len(&hw->display_q);
1245 states->buf_recycle_num = 0;
1246
1247 spin_unlock_irqrestore(&hw->lock, flags);
1248
1249 return 0;
1250}
1251
1252
1253static int dec_status(struct vdec_s *vdec, struct vdec_info *vstatus)
1254{
1255 struct vdec_mpeg4_hw_s *hw =
1256 (struct vdec_mpeg4_hw_s *)vdec->private;
1257
1258 if (!hw)
1259 return -1;
1260
1261 vstatus->frame_width = hw->frame_width;
1262 vstatus->frame_height = hw->frame_height;
1263 if (0 != hw->vmpeg4_amstream_dec_info.rate)
1264 vstatus->frame_rate = DURATION_UNIT /
1265 hw->vmpeg4_amstream_dec_info.rate;
1266 else
1267 vstatus->frame_rate = DURATION_UNIT;
1268 vstatus->error_count = READ_VREG(MP4_ERR_COUNT);
1269 vstatus->status = hw->stat;
1270 vstatus->frame_dur = hw->frame_dur;
1271 snprintf(vstatus->vdec_name, sizeof(vstatus->vdec_name),
1272 "%s", DRIVER_NAME);
1273
1274 return 0;
1275}
1276
1277/****************************************/
1278static int vmpeg4_canvas_init(struct vdec_mpeg4_hw_s *hw)
1279{
1280 int i, ret;
1281 u32 canvas_width, canvas_height;
1282 u32 decbuf_size, decbuf_y_size;
1283 struct vdec_s *vdec = hw_to_vdec(hw);
1284 unsigned long decbuf_start;
1285
1286 if (buf_size <= 0x00400000) {
1287 /* SD only */
1288 canvas_width = 768;
1289 canvas_height = 576;
1290 decbuf_y_size = 0x80000;
1291 decbuf_size = 0x100000;
1292 } else {
1293 int w = 1920;
1294 int h = 1088;
1295 int align_w, align_h;
1296 int max, min;
1297
1298 align_w = ALIGN(w, 64);
1299 align_h = ALIGN(h, 64);
1300 if (align_w > align_h) {
1301 max = align_w;
1302 min = align_h;
1303 } else {
1304 max = align_h;
1305 min = align_w;
1306 }
1307 /* HD & SD */
1308 if ((max > 1920 || min > 1088) &&
1309 ALIGN(align_w * align_h * 3/2, SZ_64K) * 9 <=
1310 buf_size) {
1311 canvas_width = align_w;
1312 canvas_height = align_h;
1313 decbuf_y_size =
1314 ALIGN(align_w * align_h, SZ_64K);
1315 decbuf_size =
1316 ALIGN(align_w * align_h * 3/2, SZ_64K);
1317 } else { /*1080p*/
1318 if (h > w) {
1319 canvas_width = 1088;
1320 canvas_height = 1920;
1321 } else {
1322 canvas_width = 1920;
1323 canvas_height = 1088;
1324 }
1325 decbuf_y_size = 0x200000;
1326 decbuf_size = 0x300000;
1327 }
1328 }
1329
1330 for (i = 0; i < MAX_BMMU_BUFFER_NUM; i++) {
1331
1332 unsigned canvas;
1333 if (i == (MAX_BMMU_BUFFER_NUM - 1))
1334 decbuf_size = WORKSPACE_SIZE;
1335 ret = decoder_bmmu_box_alloc_buf_phy(hw->mm_blk_handle, i,
1336 decbuf_size, DRIVER_NAME, &decbuf_start);
1337 if (ret < 0) {
1338 pr_err("mmu alloc failed! size 0x%d idx %d\n",
1339 decbuf_size, i);
1340 return ret;
1341 }
1342
1343 if (i == (MAX_BMMU_BUFFER_NUM - 1)) {
1344 hw->buf_start = decbuf_start;
1345 } else {
1346 if (vdec->parallel_dec == 1) {
1347 unsigned tmp;
1348 if (canvas_y(hw->canvas_spec[i]) == 0xff) {
1349 tmp =
1350 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1351 hw->canvas_spec[i] &= ~0xff;
1352 hw->canvas_spec[i] |= tmp;
1353 }
1354 if (canvas_u(hw->canvas_spec[i]) == 0xff) {
1355 tmp =
1356 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1357 hw->canvas_spec[i] &= ~(0xffff << 8);
1358 hw->canvas_spec[i] |= tmp << 8;
1359 hw->canvas_spec[i] |= tmp << 16;
1360 }
1361 canvas = hw->canvas_spec[i];
1362 } else {
1363 canvas = vdec->get_canvas(i, 2);
1364 hw->canvas_spec[i] = canvas;
1365 }
1366
1367 hw->canvas_config[i][0].phy_addr = decbuf_start;
1368 hw->canvas_config[i][0].width = canvas_width;
1369 hw->canvas_config[i][0].height = canvas_height;
1370 hw->canvas_config[i][0].block_mode = hw->blkmode;
1371 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
1372 hw->canvas_config[i][0].endian = 7;
1373 else
1374 hw->canvas_config[i][0].endian = 0;
1375 canvas_config_config(canvas_y(canvas),
1376 &hw->canvas_config[i][0]);
1377
1378 hw->canvas_config[i][1].phy_addr =
1379 decbuf_start + decbuf_y_size;
1380 hw->canvas_config[i][1].width = canvas_width;
1381 hw->canvas_config[i][1].height = (canvas_height >> 1);
1382 hw->canvas_config[i][1].block_mode = hw->blkmode;
1383 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
1384 hw->canvas_config[i][1].endian = 7;
1385 else
1386 hw->canvas_config[i][1].endian = 0;
1387 canvas_config_config(canvas_u(canvas),
1388 &hw->canvas_config[i][1]);
1389 }
1390 }
1391
1392 return 0;
1393}
1394static void vmpeg4_dump_state(struct vdec_s *vdec)
1395{
1396 struct vdec_mpeg4_hw_s *hw =
1397 (struct vdec_mpeg4_hw_s *)(vdec->private);
1398 u32 i;
1399 mmpeg4_debug_print(DECODE_ID(hw), 0,
1400 "====== %s\n", __func__);
1401 mmpeg4_debug_print(DECODE_ID(hw), 0,
1402 "width/height (%d/%d), i_fram:%d, buffer_not_ready %d\n",
1403 hw->frame_width,
1404 hw->frame_height,
1405 hw->first_i_frame_ready,
1406 hw->buffer_not_ready
1407 );
1408 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
1409 mmpeg4_debug_print(DECODE_ID(hw), 0,
1410 "index %d, used %d\n", i, hw->vfbuf_use[i]);
1411 }
1412
1413 mmpeg4_debug_print(DECODE_ID(hw), 0,
1414 "is_framebase(%d), eos %d, state 0x%x, dec_result 0x%x dec_frm %d\n",
1415 vdec_frame_based(vdec),
1416 hw->eos,
1417 hw->stat,
1418 hw->dec_result,
1419 hw->frame_num
1420 );
1421 mmpeg4_debug_print(DECODE_ID(hw), 0,
1422 "is_framebase(%d), put_frm %d run %d not_run_ready %d input_empty %d,drop %d\n",
1423 vdec_frame_based(vdec),
1424 hw->put_num,
1425 hw->run_count,
1426 hw->not_run_ready,
1427 hw->input_empty,
1428 hw->drop_frame_count
1429 );
1430
1431 if (vf_get_receiver(vdec->vf_provider_name)) {
1432 enum receviver_start_e state =
1433 vf_notify_receiver(vdec->vf_provider_name,
1434 VFRAME_EVENT_PROVIDER_QUREY_STATE,
1435 NULL);
1436 mmpeg4_debug_print(DECODE_ID(hw), 0,
1437 "\nreceiver(%s) state %d\n",
1438 vdec->vf_provider_name,
1439 state);
1440 }
1441 mmpeg4_debug_print(DECODE_ID(hw), 0,
1442 "%s, newq(%d/%d), dispq(%d/%d) vf peek/get/put (%d/%d/%d)\n",
1443 __func__,
1444 kfifo_len(&hw->newframe_q), VF_POOL_SIZE,
1445 kfifo_len(&hw->display_q), VF_POOL_SIZE,
1446 hw->peek_num, hw->get_num, hw->put_num
1447 );
1448 mmpeg4_debug_print(DECODE_ID(hw), 0,
1449 "VIFF_BIT_CNT=0x%x\n",
1450 READ_VREG(VIFF_BIT_CNT));
1451 mmpeg4_debug_print(DECODE_ID(hw), 0,
1452 "VLD_MEM_VIFIFO_LEVEL=0x%x\n",
1453 READ_VREG(VLD_MEM_VIFIFO_LEVEL));
1454 mmpeg4_debug_print(DECODE_ID(hw), 0,
1455 "VLD_MEM_VIFIFO_WP=0x%x\n",
1456 READ_VREG(VLD_MEM_VIFIFO_WP));
1457 mmpeg4_debug_print(DECODE_ID(hw), 0,
1458 "VLD_MEM_VIFIFO_RP=0x%x\n",
1459 READ_VREG(VLD_MEM_VIFIFO_RP));
1460 mmpeg4_debug_print(DECODE_ID(hw), 0,
1461 "PARSER_VIDEO_RP=0x%x\n",
1462 READ_PARSER_REG(PARSER_VIDEO_RP));
1463 mmpeg4_debug_print(DECODE_ID(hw), 0,
1464 "PARSER_VIDEO_WP=0x%x\n",
1465 READ_PARSER_REG(PARSER_VIDEO_WP));
1466 if (vdec_frame_based(vdec) &&
1467 debug_enable & PRINT_FRAMEBASE_DATA) {
1468 int jj;
1469 if (hw->chunk && hw->chunk->block &&
1470 hw->chunk->size > 0) {
1471 u8 *data = NULL;
1472
1473 if (!hw->chunk->block->is_mapped)
1474 data = codec_mm_vmap(hw->chunk->block->start +
1475 hw->chunk->offset, hw->chunk->size);
1476 else
1477 data = ((u8 *)hw->chunk->block->start_virt) +
1478 hw->chunk->offset;
1479
1480 mmpeg4_debug_print(DECODE_ID(hw), 0,
1481 "frame data size 0x%x\n",
1482 hw->chunk->size);
1483 for (jj = 0; jj < hw->chunk->size; jj++) {
1484 if ((jj & 0xf) == 0)
1485 mmpeg4_debug_print(DECODE_ID(hw),
1486 PRINT_FRAMEBASE_DATA,
1487 "%06x:", jj);
1488 mmpeg4_debug_print(DECODE_ID(hw),
1489 PRINT_FRAMEBASE_DATA,
1490 "%02x ", data[jj]);
1491 if (((jj + 1) & 0xf) == 0)
1492 mmpeg4_debug_print(DECODE_ID(hw),
1493 PRINT_FRAMEBASE_DATA,
1494 "\n");
1495 }
1496
1497 if (!hw->chunk->block->is_mapped)
1498 codec_mm_unmap_phyaddr(data);
1499 }
1500 }
1501}
1502
1503static void reset_process_time(struct vdec_mpeg4_hw_s *hw)
1504{
1505 if (hw->start_process_time) {
1506 unsigned process_time =
1507 1000 * (jiffies - hw->start_process_time) / HZ;
1508 hw->start_process_time = 0;
1509 if (process_time > max_process_time[DECODE_ID(hw)])
1510 max_process_time[DECODE_ID(hw)] = process_time;
1511 }
1512}
1513static void start_process_time(struct vdec_mpeg4_hw_s *hw)
1514{
1515 hw->decode_timeout_count = 2;
1516 hw->start_process_time = jiffies;
1517}
1518
1519static void timeout_process(struct vdec_mpeg4_hw_s *hw)
1520{
1521 if (hw->stat & STAT_VDEC_RUN) {
1522 amvdec_stop();
1523 hw->stat &= ~STAT_VDEC_RUN;
1524 }
1525 mmpeg4_debug_print(DECODE_ID(hw), 0,
1526 "%s decoder timeout %d\n", __func__, hw->timeout_cnt);
1527 if (vdec_frame_based((hw_to_vdec(hw)))) {
1528 mmpeg4_debug_print(DECODE_ID(hw), 0,
1529 "%s frame_num %d, chunk size 0x%x, chksum 0x%x\n",
1530 __func__,
1531 hw->frame_num,
1532 hw->chunk->size,
1533 get_data_check_sum(hw, hw->chunk->size));
1534 }
1535 hw->timeout_cnt++;
1536 /* timeout: data droped, frame_num inaccurate*/
1537 hw->frame_num++;
1538 reset_process_time(hw);
1539 hw->first_i_frame_ready = 0;
1540 hw->dec_result = DEC_RESULT_DONE;
1541 vdec_schedule_work(&hw->work);
1542}
1543
1544
1545static void check_timer_func(unsigned long arg)
1546{
1547 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)arg;
1548 struct vdec_s *vdec = hw_to_vdec(hw);
1549 unsigned int timeout_val = decode_timeout_val;
1550
1551 if (radr != 0) {
1552 if (rval != 0) {
1553 WRITE_VREG(radr, rval);
1554 pr_info("WRITE_VREG(%x,%x)\n", radr, rval);
1555 } else
1556 pr_info("READ_VREG(%x)=%x\n", radr, READ_VREG(radr));
1557 rval = 0;
1558 radr = 0;
1559 }
1560
1561 if (((debug_enable & PRINT_FLAG_TIMEOUT_STATUS) == 0) &&
1562 (vdec_frame_based(vdec) ||
1563 ((u32)READ_VREG(VLD_MEM_VIFIFO_LEVEL) > 0x100)) &&
1564 (timeout_val > 0) &&
1565 (hw->start_process_time > 0) &&
1566 ((1000 * (jiffies - hw->start_process_time) / HZ)
1567 > timeout_val)) {
1568 if (hw->last_vld_level == READ_VREG(VLD_MEM_VIFIFO_LEVEL)) {
1569 if (hw->decode_timeout_count > 0)
1570 hw->decode_timeout_count--;
1571 if (hw->decode_timeout_count == 0)
1572 timeout_process(hw);
1573 }
1574 hw->last_vld_level = READ_VREG(VLD_MEM_VIFIFO_LEVEL);
1575 }
1576
1577 if (vdec->next_status == VDEC_STATUS_DISCONNECTED) {
1578 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1579 "vdec requested to be disconnected\n");
1580 hw->dec_result = DEC_RESULT_FORCE_EXIT;
1581 vdec_schedule_work(&hw->work);
1582 return;
1583 }
1584
1585 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
1586}
1587
1588static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw)
1589{
1590 int index, i;
1591 void *workspace_buf = NULL;
1592
1593 index = find_buffer(hw);
1594 if (index >= DECODE_BUFFER_NUM_MAX)
1595 return -1;
1596
1597 if (!hw->init_flag) {
1598 if (vmpeg4_canvas_init(hw) < 0)
1599 return -1;
1600 } else {
1601 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
1602 canvas_config_config(canvas_y(hw->canvas_spec[i]),
1603 &hw->canvas_config[i][0]);
1604 canvas_config_config(canvas_u(hw->canvas_spec[i]),
1605 &hw->canvas_config[i][1]);
1606 }
1607 }
1608 /* prepare REF0 & REF1
1609 * points to the past two IP buffers
1610 * prepare REC_CANVAS_ADDR and ANC2_CANVAS_ADDR
1611 * points to the output buffer
1612 */
1613 if (hw->refs[0] == -1) {
1614 WRITE_VREG(MREG_REF0, (hw->refs[1] == -1) ? 0xffffffff :
1615 hw->canvas_spec[hw->refs[1]]);
1616 } else {
1617 WRITE_VREG(MREG_REF0, (hw->refs[0] == -1) ? 0xffffffff :
1618 hw->canvas_spec[hw->refs[0]]);
1619 }
1620 WRITE_VREG(MREG_REF1, (hw->refs[1] == -1) ? 0xffffffff :
1621 hw->canvas_spec[hw->refs[1]]);
1622
1623 WRITE_VREG(REC_CANVAS_ADDR, hw->canvas_spec[index]);
1624 WRITE_VREG(ANC2_CANVAS_ADDR, hw->canvas_spec[index]);
1625
1626 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RESTORE,
1627 "restore ref0=0x%x, ref1=0x%x, rec=0x%x, ctx_valid=%d,index=%d\n",
1628 READ_VREG(MREG_REF0),
1629 READ_VREG(MREG_REF1),
1630 READ_VREG(REC_CANVAS_ADDR),
1631 hw->ctx_valid, index);
1632
1633 /* notify ucode the buffer start address */
1634 workspace_buf = codec_mm_vmap(hw->buf_start, WORKSPACE_SIZE);
1635 if (workspace_buf) {
1636 /* clear to fix decoder timeout at first time */
1637 if (!hw->init_flag)
1638 memset(workspace_buf, 0, WORKSPACE_SIZE);
1639 codec_mm_dma_flush(workspace_buf,
1640 WORKSPACE_SIZE, DMA_TO_DEVICE);
1641 codec_mm_unmap_phyaddr(workspace_buf);
1642 }
1643 WRITE_VREG(MEM_OFFSET_REG, hw->buf_start);
1644
1645 /* disable PSCALE for hardware sharing */
1646 WRITE_VREG(PSCALE_CTRL, 0);
1647
1648 WRITE_VREG(MREG_BUFFEROUT, 0);
1649
1650 /* clear mailbox interrupt */
1651 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
1652
1653 /* enable mailbox interrupt */
1654 WRITE_VREG(ASSIST_MBOX1_MASK, 1);
1655
1656 /* clear repeat count */
1657 WRITE_VREG(MP4_NOT_CODED_CNT, 0);
1658
1659#ifdef NV21
1660 SET_VREG_MASK(MDEC_PIC_DC_CTRL, 1 << 17);
1661#endif
1662
1663#if 1/* /MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
1664 WRITE_VREG(MDEC_PIC_DC_THRESH, 0x404038aa);
1665#endif
1666
1667 WRITE_VREG(MP4_PIC_WH, (hw->ctx_valid) ?
1668 hw->reg_mp4_pic_wh :
1669 ((hw->frame_width << 16) | hw->frame_height));
1670 WRITE_VREG(MP4_SYS_RATE, hw->vmpeg4_amstream_dec_info.rate);
1671
1672 if (hw->ctx_valid) {
1673 WRITE_VREG(DC_AC_CTRL, hw->reg_dc_ac_ctrl);
1674 WRITE_VREG(IQIDCT_CONTROL, hw->reg_iqidct_control);
1675 WRITE_VREG(RESYNC_MARKER_LENGTH, hw->reg_resync_marker_length);
1676 WRITE_VREG(RV_AI_MB_COUNT, hw->reg_rv_ai_mb_count);
1677 }
1678 WRITE_VREG(MPEG1_2_REG, (hw->ctx_valid) ? hw->reg_mpeg1_2_reg : 1);
1679 WRITE_VREG(VCOP_CTRL_REG, hw->reg_vcop_ctrl_reg);
1680 WRITE_VREG(PIC_HEAD_INFO, hw->reg_pic_head_info);
1681 WRITE_VREG(SLICE_QP, hw->reg_slice_qp);
1682 WRITE_VREG(MB_INFO, hw->reg_mb_info);
1683
1684 if (vdec_frame_based(hw_to_vdec(hw)) && hw->chunk) {
1685 /* frame based input */
1686 WRITE_VREG(MREG_INPUT, (hw->chunk->offset & 7) | (1<<7) |
1687 (hw->ctx_valid<<6));
1688 } else {
1689 /* stream based input */
1690 WRITE_VREG(MREG_INPUT, (hw->ctx_valid<<6));
1691 }
1692
1693 return 0;
1694}
1695
1696static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw)
1697{
1698 int i;
1699
1700 hw->vmpeg4_ratio = hw->vmpeg4_amstream_dec_info.ratio;
1701
1702 hw->vmpeg4_ratio64 = hw->vmpeg4_amstream_dec_info.ratio64;
1703
1704 hw->vmpeg4_rotation =
1705 (((unsigned long)hw->vmpeg4_amstream_dec_info.param) >> 16) & 0xffff;
1706 hw->sys_mp4_rate = hw->vmpeg4_amstream_dec_info.rate;
1707 hw->frame_width = hw->vmpeg4_amstream_dec_info.width;
1708 hw->frame_height = hw->vmpeg4_amstream_dec_info.height;
1709 hw->frame_dur = 0;
1710 hw->frame_prog = 0;
1711 hw->unstable_pts =
1712 (((unsigned long) hw->vmpeg4_amstream_dec_info.param & 0x40) >> 6);
1713 mmpeg4_debug_print(DECODE_ID(hw), 0,
1714 "param = 0x%x unstable_pts = %d\n",
1715 hw->vmpeg4_amstream_dec_info.param,
1716 hw->unstable_pts);
1717 hw->last_dec_pts = -1;
1718
1719 hw->total_frame = 0;
1720
1721 hw->last_anch_pts = 0;
1722
1723 hw->last_anch_pts_us64 = 0;
1724
1725 hw->last_vop_time_inc = hw->last_duration = 0;
1726
1727 hw->vop_time_inc_since_last_anch = 0;
1728 hw->last_pts = 0;
1729 hw->last_pts64 = 0;
1730 hw->frame_num_since_last_anch = 0;
1731 hw->frame_num = 0;
1732 hw->put_num = 0;
1733 hw->run_count = 0;
1734 hw->not_run_ready = 0;
1735 hw->input_empty = 0;
1736 hw->peek_num = 0;
1737 hw->get_num = 0;
1738
1739 hw->pts_hit = hw->pts_missed = hw->pts_i_hit = hw->pts_i_missed = 0;
1740 hw->refs[0] = -1;
1741 hw->refs[1] = -1;
1742 hw->first_i_frame_ready = 0;
1743 hw->drop_frame_count = 0;
1744 hw->buffer_not_ready = 0;
1745 hw->init_flag = 0;
1746 hw->dec_result = DEC_RESULT_NONE;
1747 hw->timeout_cnt = 0;
1748
1749 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
1750 hw->vfbuf_use[i] = 0;
1751
1752 INIT_KFIFO(hw->display_q);
1753 INIT_KFIFO(hw->newframe_q);
1754
1755 for (i = 0; i < VF_POOL_SIZE; i++) {
1756 const struct vframe_s *vf = &hw->vfpool[i];
1757
1758 hw->vfpool[i].index = DECODE_BUFFER_NUM_MAX;
1759 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1760 }
1761 if (hw->mm_blk_handle) {
1762 decoder_bmmu_box_free(hw->mm_blk_handle);
1763 hw->mm_blk_handle = NULL;
1764 }
1765 hw->mm_blk_handle = decoder_bmmu_box_alloc_box(
1766 DRIVER_NAME,
1767 0,
1768 MAX_BMMU_BUFFER_NUM,
1769 4 + PAGE_SHIFT,
1770 CODEC_MM_FLAGS_CMA_CLEAR |
1771 CODEC_MM_FLAGS_FOR_VDECODER);
1772 INIT_WORK(&hw->work, vmpeg4_work);
1773
1774 init_waitqueue_head(&hw->wait_q);
1775}
1776
1777static s32 vmmpeg4_init(struct vdec_mpeg4_hw_s *hw)
1778{
1779 int trickmode_fffb = 0;
1780 int size = -1, fw_size = 0x1000 * 16;
1781 struct firmware_s *fw = NULL;
1782
1783 fw = vmalloc(sizeof(struct firmware_s) + fw_size);
1784 if (IS_ERR_OR_NULL(fw))
1785 return -ENOMEM;
1786
1787 if (hw->vmpeg4_amstream_dec_info.format ==
1788 VIDEO_DEC_FORMAT_MPEG4_5) {
1789 size = get_firmware_data(VIDEO_DEC_MPEG4_5_MULTI, fw->data);
1790 strncpy(fw->name, "mmpeg4_mc_5", sizeof(fw->name));
1791 } else if (hw->vmpeg4_amstream_dec_info.format ==
1792 VIDEO_DEC_FORMAT_H263) {
1793 size = get_firmware_data(VIDEO_DEC_H263_MULTI, fw->data);
1794 strncpy(fw->name, "mh263_mc", sizeof(fw->name));
1795 } else
1796 pr_err("unsupport mpeg4 sub format %d\n",
1797 hw->vmpeg4_amstream_dec_info.format);
1798 pr_info("mmpeg4 get fw %s, size %x\n", fw->name, size);
1799 if (size < 0) {
1800 pr_err("get firmware failed.");
1801 vfree(fw);
1802 return -1;
1803 }
1804
1805 fw->len = size;
1806 hw->fw = fw;
1807
1808 query_video_status(0, &trickmode_fffb);
1809
1810 pr_info("%s\n", __func__);
1811
1812 amvdec_enable();
1813
1814 init_timer(&hw->check_timer);
1815 hw->check_timer.data = (unsigned long)hw;
1816 hw->check_timer.function = check_timer_func;
1817 hw->check_timer.expires = jiffies + CHECK_INTERVAL;
1818 hw->stat |= STAT_TIMER_ARM;
1819 hw->eos = 0;
1820 WRITE_VREG(DECODE_STOP_POS, udebug_flag);
1821
1822 vmpeg4_local_init(hw);
1823 wmb();
1824
1825 return 0;
1826}
1827
1828static unsigned long run_ready(struct vdec_s *vdec, unsigned long mask)
1829{
1830 int index;
1831 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1832
1833 if (hw->eos)
1834 return 0;
1835 if (vdec_stream_based(vdec) && (hw->init_flag == 0)
1836 && pre_decode_buf_level != 0) {
1837 u32 rp, wp, level;
1838
1839 rp = READ_PARSER_REG(PARSER_VIDEO_RP);
1840 wp = READ_PARSER_REG(PARSER_VIDEO_WP);
1841 if (wp < rp)
1842 level = vdec->input.size + wp - rp;
1843 else
1844 level = wp - rp;
1845 if (level < pre_decode_buf_level) {
1846 hw->not_run_ready++;
1847 return 0;
1848 }
1849 }
1850
1851 index = find_buffer(hw);
1852 if (index >= DECODE_BUFFER_NUM_MAX) {
1853 hw->buffer_not_ready++;
1854 return 0;
1855 }
1856 hw->not_run_ready = 0;
1857 hw->buffer_not_ready = 0;
1858 if (vdec->parallel_dec == 1)
1859 return (unsigned long)(CORE_MASK_VDEC_1);
1860 else
1861 return (unsigned long)(CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
1862}
1863
1864static unsigned char get_data_check_sum
1865 (struct vdec_mpeg4_hw_s *hw, int size)
1866{
1867 int jj;
1868 int sum = 0;
1869 u8 *data = NULL;
1870
1871 if (!hw->chunk->block->is_mapped)
1872 data = codec_mm_vmap(hw->chunk->block->start +
1873 hw->chunk->offset, size);
1874 else
1875 data = ((u8 *)hw->chunk->block->start_virt) +
1876 hw->chunk->offset;
1877
1878 for (jj = 0; jj < size; jj++)
1879 sum += data[jj];
1880
1881 if (!hw->chunk->block->is_mapped)
1882 codec_mm_unmap_phyaddr(data);
1883 return sum;
1884}
1885
1886static void run(struct vdec_s *vdec, unsigned long mask,
1887 void (*callback)(struct vdec_s *, void *), void *arg)
1888{
1889 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1890 int size = 0, ret = 0;
1891
1892 hw->run_count++;
1893 hw->vdec_cb_arg = arg;
1894 hw->vdec_cb = callback;
1895 vdec_reset_core(vdec);
1896
1897 if ((vdec_frame_based(vdec)) &&
1898 (hw->dec_result == DEC_RESULT_UNFINISH)) {
1899 vmpeg4_prepare_input(hw);
1900 size = hw->chunk_size;
1901 } else {
1902 size = vdec_prepare_input(vdec, &hw->chunk);
1903 if (size < 4) { /*less than start code size 00 00 01 xx*/
1904 hw->input_empty++;
1905 hw->dec_result = DEC_RESULT_AGAIN;
1906 vdec_schedule_work(&hw->work);
1907 return;
1908 }
1909 if ((vdec_frame_based(vdec)) &&
1910 (hw->chunk != NULL)) {
1911 hw->chunk_offset = hw->chunk->offset;
1912 hw->chunk_size = hw->chunk->size;
1913 hw->chunk_frame_count = 0;
1914 }
1915 }
1916 if (vdec_frame_based(vdec) &&
1917 (debug_enable & 0xc00)) {
1918 u8 *data = NULL;
1919
1920 if (!hw->chunk->block->is_mapped)
1921 data = codec_mm_vmap(hw->chunk->block->start +
1922 hw->chunk->offset, size);
1923 else
1924 data = ((u8 *)hw->chunk->block->start_virt) +
1925 hw->chunk->offset;
1926
1927 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS,
1928 "%s: size 0x%x sum 0x%x %02x %02x %02x %02x %02x %02x .. %02x %02x %02x %02x\n",
1929 __func__, size, get_data_check_sum(hw, size),
1930 data[0], data[1], data[2], data[3],
1931 data[4], data[5], data[size - 4],
1932 data[size - 3], data[size - 2],
1933 data[size - 1]);
1934
1935 if (debug_enable & PRINT_FRAMEBASE_DATA) {
1936 int jj;
1937
1938 for (jj = 0; jj < size; jj++) {
1939 if ((jj & 0xf) == 0)
1940 mmpeg4_debug_print(DECODE_ID(hw),
1941 PRINT_FRAMEBASE_DATA,
1942 "%06x:", jj);
1943 mmpeg4_debug_print(DECODE_ID(hw),
1944 PRINT_FRAMEBASE_DATA,
1945 "%02x ", data[jj]);
1946 if (((jj + 1) & 0xf) == 0)
1947 mmpeg4_debug_print(DECODE_ID(hw),
1948 PRINT_FRAMEBASE_DATA,
1949 "\n");
1950 }
1951 }
1952
1953 if (!hw->chunk->block->is_mapped)
1954 codec_mm_unmap_phyaddr(data);
1955 }
1956
1957 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1958 "%s, size=%d, %x %x %x %x %x\n",
1959 __func__, size,
1960 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
1961 READ_VREG(VLD_MEM_VIFIFO_WP),
1962 READ_VREG(VLD_MEM_VIFIFO_RP),
1963 READ_PARSER_REG(PARSER_VIDEO_RP),
1964 READ_PARSER_REG(PARSER_VIDEO_WP));
1965
1966 hw->dec_result = DEC_RESULT_NONE;
1967 if (vdec->mc_loaded) {
1968 /*firmware have load before,
1969 and not changes to another.
1970 ignore reload.
1971 */
1972 } else {
1973 ret = amvdec_vdec_loadmc_buf_ex(VFORMAT_MPEG4,hw->fw->name, vdec,
1974 hw->fw->data, hw->fw->len);
1975 if (ret < 0) {
1976 pr_err("[%d] %s: the %s fw loading failed, err: %x\n", vdec->id,
1977 hw->fw->name, tee_enabled() ? "TEE" : "local", ret);
1978 hw->dec_result = DEC_RESULT_FORCE_EXIT;
1979 vdec_schedule_work(&hw->work);
1980 return;
1981 }
1982 vdec->mc_loaded = 1;
1983 vdec->mc_type = VFORMAT_MPEG4;
1984 }
1985 if (vmpeg4_hw_ctx_restore(hw) < 0) {
1986 hw->dec_result = DEC_RESULT_ERROR;
1987 mmpeg4_debug_print(DECODE_ID(hw), 0,
1988 "amvdec_mpeg4: error HW context restore\n");
1989 vdec_schedule_work(&hw->work);
1990 return;
1991 }
1992 if (vdec_frame_based(vdec)) {
1993 size = hw->chunk_size +
1994 (hw->chunk_offset & (VDEC_FIFO_ALIGN - 1));
1995 WRITE_VREG(VIFF_BIT_CNT, size * 8);
1996 }
1997 hw->input_empty = 0;
1998 hw->last_vld_level = 0;
1999 start_process_time(hw);
2000 vdec_enable_input(vdec);
2001 /* wmb before ISR is handled */
2002 wmb();
2003
2004 amvdec_start();
2005 hw->stat |= STAT_VDEC_RUN;
2006 hw->init_flag = 1;
2007 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
2008}
2009
2010static int vmpeg4_stop(struct vdec_mpeg4_hw_s *hw)
2011{
2012 cancel_work_sync(&hw->work);
2013
2014 if (hw->mm_blk_handle) {
2015 decoder_bmmu_box_free(hw->mm_blk_handle);
2016 hw->mm_blk_handle = NULL;
2017 }
2018
2019 if (hw->stat & STAT_TIMER_ARM) {
2020 del_timer_sync(&hw->check_timer);
2021 hw->stat &= ~STAT_TIMER_ARM;
2022 }
2023
2024 if (hw->fw) {
2025 vfree(hw->fw);
2026 hw->fw = NULL;
2027 }
2028 return 0;
2029}
2030static void reset(struct vdec_s *vdec)
2031{
2032 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2033
2034 pr_info("amvdec_mmpeg4: reset.\n");
2035
2036 vmpeg4_local_init(hw);
2037
2038 hw->ctx_valid = 0;
2039}
2040
2041static int ammvdec_mpeg4_probe(struct platform_device *pdev)
2042{
2043 struct vdec_s *pdata = *(struct vdec_s **)pdev->dev.platform_data;
2044 struct vdec_mpeg4_hw_s *hw = NULL;
2045
2046 if (pdata == NULL) {
2047 pr_err("%s memory resource undefined.\n", __func__);
2048 return -EFAULT;
2049 }
2050
2051 hw = vmalloc(sizeof(struct vdec_mpeg4_hw_s));
2052 if (hw == NULL) {
2053 pr_err("\namvdec_mpeg4 decoder driver alloc failed\n");
2054 return -ENOMEM;
2055 }
2056 memset(hw, 0, sizeof(struct vdec_mpeg4_hw_s));
2057
2058 pdata->private = hw;
2059 pdata->dec_status = dec_status;
2060 /* pdata->set_trickmode = set_trickmode; */
2061 pdata->run_ready = run_ready;
2062 pdata->run = run;
2063 pdata->reset = reset;
2064 pdata->irq_handler = vmpeg4_isr;
2065 pdata->threaded_irq_handler = vmpeg4_isr_thread_fn;
2066 pdata->dump_state = vmpeg4_dump_state;
2067
2068 if (pdata->use_vfm_path)
2069 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2070 VFM_DEC_PROVIDER_NAME);
2071 else
2072 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2073 PROVIDER_NAME ".%02x", pdev->id & 0xff);
2074
2075 if (pdata->parallel_dec == 1) {
2076 int i;
2077 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
2078 hw->canvas_spec[i] = 0xffffff;
2079 }
2080
2081 vf_provider_init(&pdata->vframe_provider,
2082 pdata->vf_provider_name, &vf_provider_ops, pdata);
2083
2084 platform_set_drvdata(pdev, pdata);
2085 hw->platform_dev = pdev;
2086 hw->blkmode = pdata->canvas_mode;
2087
2088
2089 if (pdata->sys_info) {
2090 hw->vmpeg4_amstream_dec_info = *pdata->sys_info;
2091 if ((hw->vmpeg4_amstream_dec_info.height != 0) &&
2092 (hw->vmpeg4_amstream_dec_info.width >
2093 (MAX_MPEG4_SUPPORT_SIZE/hw->vmpeg4_amstream_dec_info.height))) {
2094 pr_info("ammvdec_mpeg4: oversize, unsupport: %d*%d\n",
2095 hw->vmpeg4_amstream_dec_info.width,
2096 hw->vmpeg4_amstream_dec_info.height);
2097 pdata->dec_status = NULL;
2098 vfree((void *)hw);
2099 hw = NULL;
2100 return -EFAULT;
2101 }
2102 mmpeg4_debug_print(DECODE_ID(hw), 0,
2103 "sysinfo: %d x %d, rate: %d\n",
2104 hw->vmpeg4_amstream_dec_info.width,
2105 hw->vmpeg4_amstream_dec_info.height,
2106 hw->vmpeg4_amstream_dec_info.rate);
2107 }
2108
2109 if (vmmpeg4_init(hw) < 0) {
2110 pr_err("%s init failed.\n", __func__);
2111
2112 if (hw) {
2113 vfree((void *)hw);
2114 hw = NULL;
2115 }
2116 pdata->dec_status = NULL;
2117 return -ENODEV;
2118 }
2119 if (pdata->parallel_dec == 1)
2120 vdec_core_request(pdata, CORE_MASK_VDEC_1);
2121 else {
2122 vdec_core_request(pdata, CORE_MASK_VDEC_1 | CORE_MASK_HEVC
2123 | CORE_MASK_COMBINE);
2124 }
2125
2126 mmpeg4_debug_print(DECODE_ID(hw), 0,
2127 "%s end.\n", __func__);
2128
2129 return 0;
2130}
2131
2132static int ammvdec_mpeg4_remove(struct platform_device *pdev)
2133{
2134 struct vdec_mpeg4_hw_s *hw =
2135 (struct vdec_mpeg4_hw_s *)
2136 (((struct vdec_s *)(platform_get_drvdata(pdev)))->private);
2137 struct vdec_s *vdec = hw_to_vdec(hw);
2138 int i;
2139
2140 if (vdec->next_status == VDEC_STATUS_DISCONNECTED
2141 && (vdec->status == VDEC_STATUS_ACTIVE)) {
2142 mmpeg4_debug_print(DECODE_ID(hw), 0,
2143 "%s force exit %d\n", __func__, __LINE__);
2144 hw->dec_result = DEC_RESULT_FORCE_EXIT;
2145 vdec_schedule_work(&hw->work);
2146 wait_event_interruptible_timeout(hw->wait_q,
2147 (vdec->status == VDEC_STATUS_CONNECTED),
2148 msecs_to_jiffies(1000)); /* wait for work done */
2149 }
2150
2151 vmpeg4_stop(hw);
2152
2153 if (vdec->parallel_dec == 1)
2154 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1);
2155 else
2156 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
2157 vdec_set_status(hw_to_vdec(hw), VDEC_STATUS_DISCONNECTED);
2158
2159 if (vdec->parallel_dec == 1) {
2160 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
2161 vdec->free_canvas_ex(canvas_y(hw->canvas_spec[i]), vdec->id);
2162 vdec->free_canvas_ex(canvas_u(hw->canvas_spec[i]), vdec->id);
2163 }
2164 }
2165
2166 mmpeg4_debug_print(DECODE_ID(hw), 0, "%s\n", __func__);
2167 vfree((void *)hw);
2168 hw = NULL;
2169
2170 return 0;
2171}
2172
2173/****************************************/
2174#ifdef CONFIG_PM
2175static int mmpeg4_suspend(struct device *dev)
2176{
2177 amvdec_suspend(to_platform_device(dev), dev->power.power_state);
2178 return 0;
2179}
2180
2181static int mmpeg4_resume(struct device *dev)
2182{
2183 amvdec_resume(to_platform_device(dev));
2184 return 0;
2185}
2186
2187static const struct dev_pm_ops mmpeg4_pm_ops = {
2188 SET_SYSTEM_SLEEP_PM_OPS(mmpeg4_suspend, mmpeg4_resume)
2189};
2190#endif
2191
2192static struct platform_driver ammvdec_mpeg4_driver = {
2193 .probe = ammvdec_mpeg4_probe,
2194 .remove = ammvdec_mpeg4_remove,
2195 .driver = {
2196 .name = DRIVER_NAME,
2197#ifdef CONFIG_PM
2198 .pm = &mmpeg4_pm_ops,
2199#endif
2200 }
2201};
2202
2203static struct codec_profile_t amvdec_mpeg4_profile = {
2204 .name = "mmpeg4",
2205 .profile = ""
2206};
2207
2208static int __init ammvdec_mpeg4_driver_init_module(void)
2209{
2210 pr_info("%s \n", __func__);
2211
2212 if (platform_driver_register(&ammvdec_mpeg4_driver)) {
2213 pr_err("failed to register ammvdec_mpeg4 driver\n");
2214 return -ENODEV;
2215 }
2216 vcodec_profile_register(&amvdec_mpeg4_profile);
2217 return 0;
2218}
2219
2220static void __exit ammvdec_mpeg4_driver_remove_module(void)
2221{
2222 pr_info("ammvdec_mpeg4 module remove.\n");
2223
2224 platform_driver_unregister(&ammvdec_mpeg4_driver);
2225}
2226
2227/****************************************/
2228module_param(debug_enable, uint, 0664);
2229MODULE_PARM_DESC(debug_enable,
2230 "\n ammvdec_mpeg4 debug enable\n");
2231
2232module_param(frmbase_cont_bitlevel, uint, 0664);
2233MODULE_PARM_DESC(frmbase_cont_bitlevel, "\nfrmbase_cont_bitlevel\n");
2234
2235module_param(radr, uint, 0664);
2236MODULE_PARM_DESC(radr, "\nradr\n");
2237
2238module_param(rval, uint, 0664);
2239MODULE_PARM_DESC(rval, "\nrval\n");
2240
2241module_param(decode_timeout_val, uint, 0664);
2242MODULE_PARM_DESC(decode_timeout_val, "\n ammvdec_mpeg4 decode_timeout_val\n");
2243
2244module_param_array(max_process_time, uint, &max_decode_instance_num, 0664);
2245
2246module_param(pre_decode_buf_level, int, 0664);
2247MODULE_PARM_DESC(pre_decode_buf_level,
2248 "\n ammvdec_ mpeg4 pre_decode_buf_level\n");
2249
2250module_param(udebug_flag, uint, 0664);
2251MODULE_PARM_DESC(udebug_flag, "\n ammvdec_mpeg4 udebug_flag\n");
2252
2253module_param(without_display_mode, uint, 0664);
2254MODULE_PARM_DESC(without_display_mode, "\n ammvdec_mpeg4 without_display_mode\n");
2255
2256module_init(ammvdec_mpeg4_driver_init_module);
2257module_exit(ammvdec_mpeg4_driver_remove_module);
2258
2259MODULE_DESCRIPTION("AMLOGIC MPEG4 Video Decoder Driver");
2260MODULE_LICENSE("GPL");
2261MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>");
2262
2263
generated by cgit at 2024-05-17 09:31:31 (GMT)