summaryrefslogtreecommitdiff
path: root/drivers/frame_provider/decoder/mpeg4/vmpeg4_multi.c (plain)
blob: e552855bab28b0f55874d2572564e108b2572046
1/*
2 * drivers/amlogic/amports/vmpeg4.c
3 *
4 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/types.h>
21#include <linux/errno.h>
22#include <linux/interrupt.h>
23#include <linux/timer.h>
24#include <linux/kfifo.h>
25#include <linux/platform_device.h>
26#include <linux/dma-mapping.h>
27#include <linux/amlogic/media/utils/amstream.h>
28#include <linux/amlogic/media/frame_sync/ptsserv.h>
29
30#include <linux/amlogic/media/vfm/vframe.h>
31#include <linux/amlogic/media/vfm/vframe_provider.h>
32#include <linux/amlogic/media/vfm/vframe_receiver.h>
33#include <linux/amlogic/media/canvas/canvas.h>
34#include <linux/amlogic/media/codec_mm/codec_mm.h>
35#include <linux/amlogic/tee.h>
36#include <linux/amlogic/media/utils/vdec_reg.h>
37#include <linux/amlogic/media/registers/register.h>
38#include "../../../stream_input/amports/amports_priv.h"
39
40#include "../utils/amvdec.h"
41#include "../utils/vdec_input.h"
42#include "../utils/vdec.h"
43#include "../utils/firmware.h"
44#include "../utils/decoder_mmu_box.h"
45#include "../utils/decoder_bmmu_box.h"
46#include <linux/amlogic/media/codec_mm/configs.h>
47#include "../utils/firmware.h"
48#include "../utils/vdec_v4l2_buffer_ops.h"
49
50#define DRIVER_NAME "ammvdec_mpeg4"
51#define MODULE_NAME "ammvdec_mpeg4"
52
53#define MEM_NAME "codec_mmpeg4"
54
55#define DEBUG_PTS
56
57#define NV21
58#define I_PICTURE 0
59#define P_PICTURE 1
60#define B_PICTURE 2
61#define GET_PIC_TYPE(type) ("IPB####"[type&0x3])
62
63#define ORI_BUFFER_START_ADDR 0x01000000
64#define DEFAULT_MEM_SIZE (32*SZ_1M)
65
66#define INTERLACE_FLAG 0x80
67#define TOP_FIELD_FIRST_FLAG 0x40
68
69/* protocol registers */
70#define MREG_REF0 AV_SCRATCH_1
71#define MREG_REF1 AV_SCRATCH_2
72#define MP4_PIC_RATIO AV_SCRATCH_5
73#define MP4_RATE AV_SCRATCH_3
74#define MP4_ERR_COUNT AV_SCRATCH_6
75#define MP4_PIC_WH AV_SCRATCH_7
76#define MREG_INPUT AV_SCRATCH_8
77#define MREG_BUFFEROUT AV_SCRATCH_9
78#define MP4_NOT_CODED_CNT AV_SCRATCH_A
79#define MP4_VOP_TIME_INC AV_SCRATCH_B
80#define MP4_OFFSET_REG AV_SCRATCH_C
81#define MP4_SYS_RATE AV_SCRATCH_E
82#define MEM_OFFSET_REG AV_SCRATCH_F
83
84#define PARC_FORBIDDEN 0
85#define PARC_SQUARE 1
86#define PARC_CIF 2
87#define PARC_10_11 3
88#define PARC_16_11 4
89#define PARC_40_33 5
90#define PARC_RESERVED 6
91/* values between 6 and 14 are reserved */
92#define PARC_EXTENDED 15
93
94#define VF_POOL_SIZE 16
95#define DECODE_BUFFER_NUM_MAX 8
96#define PUT_INTERVAL (HZ/100)
97#define MAX_BMMU_BUFFER_NUM (DECODE_BUFFER_NUM_MAX + 1)
98#define WORKSPACE_SIZE (12*SZ_64K)
99static u32 buf_size = 32 * 1024 * 1024;
100
101#define CTX_LMEM_SWAP_OFFSET 0
102#define CTX_QUANT_MATRIX_OFFSET 0x800
103/* dcac buffer must align at 4k boundary */
104#define CTX_DCAC_BUF_OFFSET 0x1000
105#define CTX_DECBUF_OFFSET (0x0c0000 + 0x1000)
106
107#define RATE_DETECT_COUNT 5
108#define DURATION_UNIT 96000
109#define PTS_UNIT 90000
110#define CHECK_INTERVAL (HZ/100)
111
112#define DUR2PTS(x) ((x) - ((x) >> 4))
113
114/* 96000/(60fps* 2field) = 800, 96000/10fps = 9600 */
115#define MPEG4_VALID_DUR(x) ((x < 9600) && (x > 799))
116
117#define MAX_MPEG4_SUPPORT_SIZE (1920*1088)
118
119#define DEC_RESULT_NONE 0
120#define DEC_RESULT_DONE 1
121#define DEC_RESULT_AGAIN 2
122#define DEC_RESULT_ERROR 3
123#define DEC_RESULT_FORCE_EXIT 4
124#define DEC_RESULT_EOS 5
125#define DEC_RESULT_UNFINISH 6
126
127#define DEC_DECODE_TIMEOUT 0x21
128#define DECODE_ID(hw) (hw_to_vdec(hw)->id)
129#define DECODE_STOP_POS AV_SCRATCH_K
130static u32 udebug_flag;
131
132static struct vframe_s *vmpeg_vf_peek(void *);
133static struct vframe_s *vmpeg_vf_get(void *);
134static void vmpeg_vf_put(struct vframe_s *, void *);
135static int vmpeg_vf_states(struct vframe_states *states, void *);
136static int vmpeg_event_cb(int type, void *data, void *private_data);
137static int pre_decode_buf_level = 0x800;
138static int start_decode_buf_level = 0x4000;
139static int debug_enable;
140static unsigned int radr;
141static unsigned int rval;
142/* 0x40bit = 8byte */
143static unsigned int frmbase_cont_bitlevel = 0x40;
144
145#define VMPEG4_DEV_NUM 9
146static unsigned int max_decode_instance_num = VMPEG4_DEV_NUM;
147static unsigned int max_process_time[VMPEG4_DEV_NUM];
148static unsigned int decode_timeout_val = 200;
149
150static u32 without_display_mode;
151
152#undef pr_info
153#define pr_info printk
154unsigned int mpeg4_debug_mask = 0xff;
155
156#define PRINT_FLAG_ERROR 0x0
157#define PRINT_FLAG_RUN_FLOW 0X0001
158#define PRINT_FLAG_TIMEINFO 0x0002
159#define PRINT_FLAG_UCODE_DETAIL 0x0004
160#define PRINT_FLAG_VLD_DETAIL 0x0008
161#define PRINT_FLAG_DEC_DETAIL 0x0010
162#define PRINT_FLAG_BUFFER_DETAIL 0x0020
163#define PRINT_FLAG_RESTORE 0x0040
164#define PRINT_FRAME_NUM 0x0080
165#define PRINT_FLAG_FORCE_DONE 0x0100
166#define PRINT_FLAG_COUNTER 0X0200
167#define PRINT_FRAMEBASE_DATA 0x0400
168#define PRINT_FLAG_VDEC_STATUS 0x0800
169#define PRINT_FLAG_TIMEOUT_STATUS 0x1000
170#define PRINT_FLAG_V4L_DETAIL 0x8000
171
172int mmpeg4_debug_print(int index, int debug_flag, const char *fmt, ...)
173{
174 if (((debug_enable & debug_flag) &&
175 ((1 << index) & mpeg4_debug_mask))
176 || (debug_flag == PRINT_FLAG_ERROR)) {
177 unsigned char buf[512];
178 int len = 0;
179 va_list args;
180 va_start(args, fmt);
181 len = sprintf(buf, "%d: ", index);
182 vsnprintf(buf + len, 512-len, fmt, args);
183 pr_info("%s", buf);
184 va_end(args);
185 }
186 return 0;
187}
188
189struct pic_info_t {
190 int index;
191 u32 pic_type;
192 u32 pic_info;
193 u32 pts;
194 u64 pts64;
195 bool pts_valid;
196 u32 duration;
197 u32 repeat_cnt;
198 ulong v4l_ref_buf_addr;
199};
200
201struct vdec_mpeg4_hw_s {
202 spinlock_t lock;
203 struct platform_device *platform_dev;
204 /* struct device *cma_dev; */
205
206 DECLARE_KFIFO(newframe_q, struct vframe_s *, VF_POOL_SIZE);
207 DECLARE_KFIFO(display_q, struct vframe_s *, VF_POOL_SIZE);
208 struct vframe_s vfpool[VF_POOL_SIZE];
209
210 s32 vfbuf_use[DECODE_BUFFER_NUM_MAX];
211 u32 frame_width;
212 u32 frame_height;
213 u32 frame_dur;
214 u32 frame_prog;
215
216 u32 ctx_valid;
217 u32 reg_vcop_ctrl_reg;
218 u32 reg_pic_head_info;
219 u32 reg_mpeg1_2_reg;
220 u32 reg_slice_qp;
221 u32 reg_mp4_pic_wh;
222 u32 reg_mp4_rate;
223 u32 reg_mb_info;
224 u32 reg_dc_ac_ctrl;
225 u32 reg_iqidct_control;
226 u32 reg_resync_marker_length;
227 u32 reg_rv_ai_mb_count;
228 struct timer_list check_timer;
229 u32 decode_timeout_count;
230 u32 timeout_cnt;
231 unsigned long int start_process_time;
232
233 u32 last_vld_level;
234 u8 init_flag;
235 u32 eos;
236 void *mm_blk_handle;
237
238 struct vframe_chunk_s *chunk;
239 u32 chunk_offset;
240 u32 chunk_size;
241 u32 chunk_frame_count;
242 u32 stat;
243 unsigned long buf_start;
244 u32 buf_size;
245 /*
246 unsigned long cma_alloc_addr;
247 int cma_alloc_count;
248 */
249 u32 vmpeg4_ratio;
250 u64 vmpeg4_ratio64;
251 u32 rate_detect;
252 u32 vmpeg4_rotation;
253 u32 total_frame;
254 u32 last_vop_time_inc;
255 u32 last_duration;
256 u32 last_anch_pts;
257 u32 vop_time_inc_since_last_anch;
258 u32 frame_num_since_last_anch;
259 u64 last_anch_pts_us64;
260
261 u32 last_pts;
262 u64 last_pts64;
263 u32 pts_hit;
264 u32 pts_missed;
265 u32 pts_i_hit;
266 u32 pts_i_missed;
267 struct pic_info_t pic[DECODE_BUFFER_NUM_MAX];
268 u32 canvas_spec[DECODE_BUFFER_NUM_MAX];
269#ifdef NV21
270 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][2];
271#else
272 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][3];
273#endif
274 struct dec_sysinfo vmpeg4_amstream_dec_info;
275
276 s32 refs[2];
277 int dec_result;
278 struct work_struct work;
279
280 void (*vdec_cb)(struct vdec_s *, void *);
281 void *vdec_cb_arg;
282 u32 frame_num;
283 u32 put_num;
284 u32 sys_mp4_rate;
285 u32 run_count;
286 u32 not_run_ready;
287 u32 buffer_not_ready;
288 u32 input_empty;
289 u32 peek_num;
290 u32 get_num;
291 u32 first_i_frame_ready;
292 u32 drop_frame_count;
293 u32 unstable_pts;
294 u32 last_dec_pts;
295
296 struct firmware_s *fw;
297 u32 blkmode;
298 wait_queue_head_t wait_q;
299 bool is_used_v4l;
300 void *v4l2_ctx;
301 bool v4l_params_parsed;
302};
303static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw);
304static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw);
305static unsigned char
306 get_data_check_sum(struct vdec_mpeg4_hw_s *hw, int size);
307
308#define PROVIDER_NAME "vdec.mpeg4"
309
310/*
311 *int query_video_status(int type, int *value);
312 */
313static const struct vframe_operations_s vf_provider_ops = {
314 .peek = vmpeg_vf_peek,
315 .get = vmpeg_vf_get,
316 .put = vmpeg_vf_put,
317 .event_cb = vmpeg_event_cb,
318 .vf_states = vmpeg_vf_states,
319};
320
321static unsigned char aspect_ratio_table[16] = {
322 PARC_FORBIDDEN,
323 PARC_SQUARE,
324 PARC_CIF,
325 PARC_10_11,
326 PARC_16_11,
327 PARC_40_33,
328 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
329 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
330 PARC_RESERVED, PARC_EXTENDED
331};
332
333static void reset_process_time(struct vdec_mpeg4_hw_s *hw);
334
335static int vmpeg4_v4l_alloc_buff_config_canvas(struct vdec_mpeg4_hw_s *hw, int i)
336{
337 int ret;
338 u32 canvas;
339 ulong decbuf_start = 0;
340 int decbuf_y_size = 0;
341 u32 canvas_width = 0, canvas_height = 0;
342 struct vdec_s *vdec = hw_to_vdec(hw);
343 struct vdec_v4l2_buffer *fb = NULL;
344
345 if (hw->pic[i].v4l_ref_buf_addr)
346 return 0;
347
348 ret = vdec_v4l_get_buffer(hw->v4l2_ctx, &fb);
349 if (ret < 0) {
350 mmpeg4_debug_print(DECODE_ID(hw), 0,
351 "[%d] get fb fail.\n",
352 ((struct aml_vcodec_ctx *)
353 (hw->v4l2_ctx))->id);
354 return ret;
355 }
356
357 hw->pic[i].v4l_ref_buf_addr = (ulong)fb;
358 if (fb->num_planes == 1) {
359 decbuf_start = fb->m.mem[0].addr;
360 decbuf_y_size = fb->m.mem[0].offset;
361 canvas_width = ALIGN(hw->frame_width, 64);
362 canvas_height = ALIGN(hw->frame_height, 32);
363 fb->m.mem[0].bytes_used = fb->m.mem[0].size;
364 } else if (fb->num_planes == 2) {
365 decbuf_start = fb->m.mem[0].addr;
366 decbuf_y_size = fb->m.mem[0].size;
367 canvas_width = ALIGN(hw->frame_width, 64);
368 canvas_height = ALIGN(hw->frame_height, 32);
369 fb->m.mem[0].bytes_used = decbuf_y_size;
370 fb->m.mem[1].bytes_used = decbuf_y_size << 1;
371 }
372
373 mmpeg4_debug_print(DECODE_ID(hw), 0, "[%d] %s(), v4l ref buf addr: 0x%x\n",
374 ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id, __func__, fb);
375
376 if (vdec->parallel_dec == 1) {
377 u32 tmp;
378 if (canvas_y(hw->canvas_spec[i]) == 0xff) {
379 tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
380 hw->canvas_spec[i] &= ~0xff;
381 hw->canvas_spec[i] |= tmp;
382 }
383 if (canvas_u(hw->canvas_spec[i]) == 0xff) {
384 tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
385 hw->canvas_spec[i] &= ~(0xffff << 8);
386 hw->canvas_spec[i] |= tmp << 8;
387 hw->canvas_spec[i] |= tmp << 16;
388 }
389 canvas = hw->canvas_spec[i];
390 } else {
391 canvas = vdec->get_canvas(i, 2);
392 hw->canvas_spec[i] = canvas;
393 }
394
395 hw->canvas_config[i][0].phy_addr = decbuf_start;
396 hw->canvas_config[i][0].width = canvas_width;
397 hw->canvas_config[i][0].height = canvas_height;
398 hw->canvas_config[i][0].block_mode = hw->blkmode;
399 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
400 hw->canvas_config[i][0].endian = 7;
401 else
402 hw->canvas_config[i][0].endian = 0;
403 canvas_config_config(canvas_y(canvas),
404 &hw->canvas_config[i][0]);
405
406 hw->canvas_config[i][1].phy_addr =
407 decbuf_start + decbuf_y_size;
408 hw->canvas_config[i][1].width = canvas_width;
409 hw->canvas_config[i][1].height = (canvas_height >> 1);
410 hw->canvas_config[i][1].block_mode = hw->blkmode;
411 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
412 hw->canvas_config[i][1].endian = 7;
413 else
414 hw->canvas_config[i][1].endian = 0;
415 canvas_config_config(canvas_u(canvas),
416 &hw->canvas_config[i][1]);
417
418 return 0;
419}
420
421static bool is_enough_free_buffer(struct vdec_mpeg4_hw_s *hw)
422{
423 int i;
424
425 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
426 if (hw->vfbuf_use[i] == 0)
427 break;
428 }
429
430 return i == DECODE_BUFFER_NUM_MAX ? false : true;
431}
432
433static int find_free_buffer(struct vdec_mpeg4_hw_s *hw)
434{
435 int i;
436
437 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
438 if (hw->vfbuf_use[i] == 0)
439 break;
440 }
441
442 if (i == DECODE_BUFFER_NUM_MAX)
443 return -1;
444
445 if (hw->is_used_v4l)
446 if (vmpeg4_v4l_alloc_buff_config_canvas(hw, i))
447 return -1;
448
449 return i;
450}
451
452static int spec_to_index(struct vdec_mpeg4_hw_s *hw, u32 spec)
453{
454 int i;
455
456 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
457 if (hw->canvas_spec[i] == spec)
458 return i;
459 }
460
461 return -1;
462}
463
464static void set_frame_info(struct vdec_mpeg4_hw_s *hw, struct vframe_s *vf,
465 int buffer_index)
466{
467 int ar = 0;
468 unsigned int num = 0;
469 unsigned int den = 0;
470 unsigned int pixel_ratio = READ_VREG(MP4_PIC_RATIO);
471
472 if (hw->vmpeg4_ratio64 != 0) {
473 num = hw->vmpeg4_ratio64>>32;
474 den = hw->vmpeg4_ratio64 & 0xffffffff;
475 } else {
476 num = hw->vmpeg4_ratio>>16;
477 den = hw->vmpeg4_ratio & 0xffff;
478
479 }
480 if ((num == 0) || (den == 0)) {
481 num = 1;
482 den = 1;
483 }
484
485 if (hw->vmpeg4_ratio == 0) {
486 vf->ratio_control |= (0x90 << DISP_RATIO_ASPECT_RATIO_BIT);
487 /* always stretch to 16:9 */
488 } else if (pixel_ratio > 0x0f) {
489 num = (pixel_ratio >> 8) *
490 hw->frame_width * num;
491 ar = div_u64((pixel_ratio & 0xff) *
492 hw->frame_height * den * 0x100ULL +
493 (num >> 1), num);
494 } else {
495 switch (aspect_ratio_table[pixel_ratio]) {
496 case 0:
497 num = hw->frame_width * num;
498 ar = (hw->frame_height * den *
499 0x100 + (num >> 1)) / num;
500 break;
501 case 1:
502 num = vf->width * num;
503 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
504 break;
505 case 2:
506 num = (vf->width * 12) * num;
507 ar = (vf->height * den * 0x100 * 11 +
508 ((num) >> 1)) / num;
509 break;
510 case 3:
511 num = (vf->width * 10) * num;
512 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
513 num;
514 break;
515 case 4:
516 num = (vf->width * 16) * num;
517 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
518 num;
519 break;
520 case 5:
521 num = (vf->width * 40) * num;
522 ar = (vf->height * den * 0x100 * 33 + (num >> 1)) /
523 num;
524 break;
525 default:
526 num = vf->width * num;
527 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
528 break;
529 }
530 }
531
532 ar = min(ar, DISP_RATIO_ASPECT_RATIO_MAX);
533
534 vf->signal_type = 0;
535 vf->type_original = vf->type;
536 vf->ratio_control = (ar << DISP_RATIO_ASPECT_RATIO_BIT);
537 vf->canvas0Addr = vf->canvas1Addr = -1;
538#ifdef NV21
539 vf->plane_num = 2;
540#else
541 vf->plane_num = 3;
542#endif
543 vf->canvas0_config[0] = hw->canvas_config[buffer_index][0];
544 vf->canvas0_config[1] = hw->canvas_config[buffer_index][1];
545#ifndef NV21
546 vf->canvas0_config[2] = hw->canvas_config[buffer_index][2];
547#endif
548 vf->canvas1_config[0] = hw->canvas_config[buffer_index][0];
549 vf->canvas1_config[1] = hw->canvas_config[buffer_index][1];
550#ifndef NV21
551 vf->canvas1_config[2] = hw->canvas_config[buffer_index][2];
552#endif
553}
554
555static inline void vmpeg4_save_hw_context(struct vdec_mpeg4_hw_s *hw)
556{
557 hw->reg_mpeg1_2_reg = READ_VREG(MPEG1_2_REG);
558 hw->reg_vcop_ctrl_reg = READ_VREG(VCOP_CTRL_REG);
559 hw->reg_pic_head_info = READ_VREG(PIC_HEAD_INFO);
560 hw->reg_slice_qp = READ_VREG(SLICE_QP);
561 hw->reg_mp4_pic_wh = READ_VREG(MP4_PIC_WH);
562 hw->reg_mp4_rate = READ_VREG(MP4_RATE);
563 hw->reg_mb_info = READ_VREG(MB_INFO);
564 hw->reg_dc_ac_ctrl = READ_VREG(DC_AC_CTRL);
565 hw->reg_iqidct_control = READ_VREG(IQIDCT_CONTROL);
566 hw->reg_resync_marker_length = READ_VREG(RESYNC_MARKER_LENGTH);
567 hw->reg_rv_ai_mb_count = READ_VREG(RV_AI_MB_COUNT);
568}
569
570static int update_ref(struct vdec_mpeg4_hw_s *hw, int index)
571{
572 hw->vfbuf_use[index]++;
573
574 if (hw->refs[1] == -1) {
575 hw->refs[1] = index;
576 index = -1;
577 } else if (hw->refs[0] == -1) {
578 hw->refs[0] = hw->refs[1];
579 hw->refs[1] = index;
580 index = hw->refs[0];
581 } else {
582 hw->vfbuf_use[hw->refs[0]]--;
583 hw->refs[0] = hw->refs[1];
584 hw->refs[1] = index;
585 index = hw->refs[0];
586 }
587
588 return index;
589}
590
591static int prepare_display_buf(struct vdec_mpeg4_hw_s * hw,
592 struct pic_info_t *pic)
593{
594 struct vframe_s *vf = NULL;
595 struct vdec_s *vdec = hw_to_vdec(hw);
596 int index = pic->index;
597
598 if (pic->pic_info & INTERLACE_FLAG) {
599 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
600 mmpeg4_debug_print(DECODE_ID(hw), 0,
601 "fatal error, no available buffer slot.");
602 return -1;
603 }
604
605 if (hw->is_used_v4l) {
606 vf->v4l_mem_handle
607 = hw->pic[index].v4l_ref_buf_addr;
608 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL,
609 "[%d] %s(), v4l mem handle: 0x%lx\n",
610 ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id,
611 __func__, vf->v4l_mem_handle);
612 }
613
614 vf->index = pic->index;
615 vf->width = hw->frame_width;
616 vf->height = hw->frame_height;
617 vf->bufWidth = 1920;
618 vf->flag = 0;
619 vf->orientation = hw->vmpeg4_rotation;
620 vf->pts = pic->pts;
621 vf->pts_us64 = pic->pts64;
622 vf->duration = pic->duration >> 1;
623 vf->duration_pulldown = 0;
624 vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ?
625 VIDTYPE_INTERLACE_TOP : VIDTYPE_INTERLACE_BOTTOM;
626#ifdef NV21
627 vf->type |= VIDTYPE_VIU_NV21;
628#endif
629 set_frame_info(hw, vf, pic->index);
630
631 hw->vfbuf_use[pic->index]++;
632 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
633 "field0: pts %d, pts64 %lld, w %d, h %d, dur %d\n",
634 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
635
636 if ((hw->first_i_frame_ready == 0)
637 && (pic->pic_type != I_PICTURE)) {
638 hw->drop_frame_count++;
639 hw->vfbuf_use[index]--;
640 kfifo_put(&hw->newframe_q,
641 (const struct vframe_s *)vf);
642 return 0;
643 } else {
644 vf->mem_handle =
645 decoder_bmmu_box_get_mem_handle(
646 hw->mm_blk_handle, index);
647 kfifo_put(&hw->display_q,
648 (const struct vframe_s *)vf);
649 ATRACE_COUNTER(MODULE_NAME, vf->pts);
650 vdec->vdec_fps_detec(vdec->id);
651 hw->frame_num++;
652 if (without_display_mode == 0) {
653 vf_notify_receiver(vdec->vf_provider_name,
654 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
655 } else
656 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
657 }
658
659 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
660 mmpeg4_debug_print(DECODE_ID(hw), 0,
661 "error, no available buf.\n");
662 hw->dec_result = DEC_RESULT_ERROR;
663 return -1;
664 }
665
666 vf->index = pic->index;
667 vf->width = hw->frame_width;
668 vf->height = hw->frame_height;
669 vf->bufWidth = 1920;
670 vf->flag = 0;
671 vf->orientation = hw->vmpeg4_rotation;
672 vf->pts = 0;
673 vf->pts_us64 = 0;
674 vf->duration = pic->duration >> 1;
675 vf->duration_pulldown = 0;
676 vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ?
677 VIDTYPE_INTERLACE_BOTTOM : VIDTYPE_INTERLACE_TOP;
678#ifdef NV21
679 vf->type |= VIDTYPE_VIU_NV21;
680#endif
681 set_frame_info(hw, vf, pic->index);
682
683 hw->vfbuf_use[pic->index]++;
684 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
685 "filed1: pts %d, pts64 %lld, w %d, h %d, dur: %d\n",
686 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
687 if ((hw->first_i_frame_ready == 0) &&
688 (pic->pic_type != I_PICTURE)) {
689 hw->drop_frame_count++;
690 hw->vfbuf_use[index]--;
691 kfifo_put(&hw->newframe_q,
692 (const struct vframe_s *)vf);
693 } else {
694 vf->mem_handle =
695 decoder_bmmu_box_get_mem_handle(
696 hw->mm_blk_handle, index);
697 kfifo_put(&hw->display_q,
698 (const struct vframe_s *)vf);
699 ATRACE_COUNTER(MODULE_NAME, vf->pts);
700 vdec->vdec_fps_detec(vdec->id);
701 decoder_do_frame_check(vdec, vf);
702 hw->frame_num++;
703 if (without_display_mode == 0) {
704 vf_notify_receiver(vdec->vf_provider_name,
705 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
706 } else
707 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
708 }
709 } else {
710 /* progressive */
711 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
712 mmpeg4_debug_print(DECODE_ID(hw), 0,
713 "error, no available buf\n");
714 hw->dec_result = DEC_RESULT_ERROR;
715 return -1;
716 }
717
718 if (hw->is_used_v4l) {
719 vf->v4l_mem_handle
720 = hw->pic[index].v4l_ref_buf_addr;
721 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL,
722 "[%d] %s(), v4l mem handle: 0x%lx\n",
723 ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id,
724 __func__, vf->v4l_mem_handle);
725 }
726
727 vf->index = index;
728 vf->width = hw->frame_width;
729 vf->height = hw->frame_height;
730 vf->bufWidth = 1920;
731 vf->flag = 0;
732 vf->orientation = hw->vmpeg4_rotation;
733 vf->pts = pic->pts;
734 vf->pts_us64 = pic->pts64;
735 vf->duration = pic->duration;
736 vf->duration_pulldown = pic->repeat_cnt *
737 pic->duration;
738#ifdef NV21
739 vf->type = VIDTYPE_PROGRESSIVE |
740 VIDTYPE_VIU_FIELD | VIDTYPE_VIU_NV21;
741#else
742 vf->type = VIDTYPE_PROGRESSIVE |
743 VIDTYPE_VIU_FIELD;
744#endif
745 set_frame_info(hw, vf, index);
746
747 hw->vfbuf_use[index]++;
748 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
749 "prog: pts %d, pts64 %lld, w %d, h %d, dur %d\n",
750 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
751
752 if ((hw->first_i_frame_ready == 0) &&
753 (pic->pic_type != I_PICTURE)) {
754 hw->drop_frame_count++;
755 hw->vfbuf_use[index]--;
756 kfifo_put(&hw->newframe_q,
757 (const struct vframe_s *)vf);
758 } else {
759 vf->mem_handle =
760 decoder_bmmu_box_get_mem_handle(
761 hw->mm_blk_handle, index);
762 kfifo_put(&hw->display_q,
763 (const struct vframe_s *)vf);
764 ATRACE_COUNTER(MODULE_NAME, vf->pts);
765 vdec->vdec_fps_detec(vdec->id);
766 decoder_do_frame_check(vdec, vf);
767 hw->frame_num++;
768
769 if (without_display_mode == 0) {
770 vf_notify_receiver(vdec->vf_provider_name,
771 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
772 } else
773 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
774 }
775
776 }
777 return 0;
778}
779
780static void vmpeg4_prepare_input(struct vdec_mpeg4_hw_s *hw)
781{
782 struct vdec_s *vdec = hw_to_vdec(hw);
783 struct vdec_input_s *input = &vdec->input;
784 struct vframe_block_list_s *block = NULL;
785 struct vframe_chunk_s *chunk = hw->chunk;
786 int dummy;
787
788 if (chunk == NULL)
789 return;
790
791 /* full reset to HW input */
792 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0);
793
794 /* reset VLD fifo for all vdec */
795 WRITE_VREG(DOS_SW_RESET0, (1<<5) | (1<<4) | (1<<3));
796 WRITE_VREG(DOS_SW_RESET0, 0);
797
798 dummy = READ_RESET_REG(RESET0_REGISTER);
799 WRITE_VREG(POWER_CTL_VLD, 1 << 4);
800
801 /*
802 *setup HW decoder input buffer (VLD context)
803 * based on input->type and input->target
804 */
805 if (input_frame_based(input)) {
806 block = chunk->block;
807
808 WRITE_VREG(VLD_MEM_VIFIFO_START_PTR, block->start);
809 WRITE_VREG(VLD_MEM_VIFIFO_END_PTR, block->start +
810 block->size - 8);
811 WRITE_VREG(VLD_MEM_VIFIFO_CURR_PTR,
812 round_down(block->start + hw->chunk_offset,
813 VDEC_FIFO_ALIGN));
814
815 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 1);
816 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0);
817
818 /* set to manual mode */
819 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2);
820 WRITE_VREG(VLD_MEM_VIFIFO_RP,
821 round_down(block->start + hw->chunk_offset,
822 VDEC_FIFO_ALIGN));
823 dummy = hw->chunk_offset + hw->chunk_size +
824 VLD_PADDING_SIZE;
825 if (dummy >= block->size)
826 dummy -= block->size;
827 WRITE_VREG(VLD_MEM_VIFIFO_WP,
828 round_down(block->start + dummy,
829 VDEC_FIFO_ALIGN));
830
831 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 3);
832 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2);
833
834 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL,
835 (0x11 << 16) | (1<<10) | (7<<3));
836
837 }
838}
839
840static irqreturn_t vmpeg4_isr_thread_fn(struct vdec_s *vdec, int irq)
841{
842 u32 reg;
843 u32 picture_type;
844 int index;
845 u32 pts, offset = 0;
846 u64 pts_us64 = 0;
847 u32 frame_size, dec_w, dec_h;
848 u32 time_increment_resolution, fixed_vop_rate, vop_time_inc;
849 u32 repeat_cnt, duration = 3200;
850 struct pic_info_t *dec_pic, *disp_pic;
851 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)(vdec->private);
852
853 if (hw->eos)
854 return IRQ_HANDLED;
855
856 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
857 if (READ_VREG(AV_SCRATCH_M) != 0 &&
858 (debug_enable & PRINT_FLAG_UCODE_DETAIL)) {
859 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_UCODE_DETAIL,
860 "dbg %x: %x, level %x, wp %x, rp %x, cnt %x\n",
861 READ_VREG(AV_SCRATCH_M), READ_VREG(AV_SCRATCH_N),
862 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
863 READ_VREG(VLD_MEM_VIFIFO_WP),
864 READ_VREG(VLD_MEM_VIFIFO_RP),
865 READ_VREG(VIFF_BIT_CNT));
866 WRITE_VREG(AV_SCRATCH_M, 0);
867 return IRQ_HANDLED;
868 }
869 reg = READ_VREG(MREG_BUFFEROUT);
870
871 time_increment_resolution = READ_VREG(MP4_RATE);
872 fixed_vop_rate = time_increment_resolution >> 16;
873 time_increment_resolution &= 0xffff;
874 if (time_increment_resolution > 0 &&
875 fixed_vop_rate == 0)
876 hw->sys_mp4_rate = time_increment_resolution;
877
878 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
879 if ((fixed_vop_rate != 0) &&
880 (time_increment_resolution != 0)) {
881 hw->vmpeg4_amstream_dec_info.rate = fixed_vop_rate *
882 DURATION_UNIT / time_increment_resolution;
883 } else if (time_increment_resolution == 0
884 && hw->sys_mp4_rate > 0)
885 time_increment_resolution = hw->sys_mp4_rate;
886 }
887 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL,
888 "time_inc_res = %d, fixed_vop_rate = %d, rate = %d\n",
889 time_increment_resolution, fixed_vop_rate,
890 hw->vmpeg4_amstream_dec_info.rate);
891
892 if (reg == 2) {
893 /* timeout when decoding next frame */
894
895 /* for frame based case, insufficient result may happen
896 * at the beginning when only VOL head is available save
897 * HW context also, such as for the QTable from VCOP register
898 */
899 mmpeg4_debug_print(DECODE_ID(hw),
900 PRINT_FLAG_VLD_DETAIL,
901 "%s, level = %x, vfifo_ctrl = %x, bitcnt = %d\n",
902 __func__,
903 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
904 READ_VREG(VLD_MEM_VIFIFO_CONTROL),
905 READ_VREG(VIFF_BIT_CNT));
906
907 if (vdec_frame_based(vdec)) {
908 //vmpeg4_save_hw_context(hw);
909 hw->dec_result = DEC_RESULT_DONE;
910 vdec_schedule_work(&hw->work);
911 } else {
912 reset_process_time(hw);
913 hw->dec_result = DEC_RESULT_AGAIN;
914 vdec_schedule_work(&hw->work);
915 }
916 return IRQ_HANDLED;
917 } else {
918 reset_process_time(hw);
919 picture_type = (reg >> 3) & 7;
920 repeat_cnt = READ_VREG(MP4_NOT_CODED_CNT);
921 vop_time_inc = READ_VREG(MP4_VOP_TIME_INC);
922
923 index = spec_to_index(hw, READ_VREG(REC_CANVAS_ADDR));
924 if (index < 0) {
925 mmpeg4_debug_print(DECODE_ID(hw), 0,
926 "invalid buffer index %d. rec = %x\n",
927 index, READ_VREG(REC_CANVAS_ADDR));
928 hw->dec_result = DEC_RESULT_ERROR;
929 vdec_schedule_work(&hw->work);
930 return IRQ_HANDLED;
931 }
932 hw->dec_result = DEC_RESULT_DONE;
933 dec_pic = &hw->pic[index];
934 dec_pic->pts_valid = false;
935 dec_pic->pts = 0;
936 dec_pic->pts64 = 0;
937 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
938 "new pic: index=%d, used=%d, repeat=%d, time_inc=%d\n",
939 index, hw->vfbuf_use[index], repeat_cnt, vop_time_inc);
940
941 dec_w = READ_VREG(MP4_PIC_WH)>> 16;
942 dec_h = READ_VREG(MP4_PIC_WH) & 0xffff;
943 if (dec_w != 0)
944 hw->frame_width = dec_w;
945 if (dec_h != 0)
946 hw->frame_height = dec_h;
947
948 if (hw->is_used_v4l) {
949 struct aml_vcodec_ctx *ctx =
950 (struct aml_vcodec_ctx *)(hw->v4l2_ctx);
951
952 if (ctx->param_sets_from_ucode && !hw->v4l_params_parsed) {
953 struct aml_vdec_ps_infos ps;
954
955 ps.visible_width = hw->frame_width;
956 ps.visible_height = hw->frame_height;
957 ps.coded_width = ALIGN(hw->frame_width, 64);
958 ps.coded_height = ALIGN(hw->frame_height, 64);
959 ps.dpb_size = MAX_BMMU_BUFFER_NUM - 1;
960 hw->v4l_params_parsed = true;
961 vdec_v4l_set_ps_infos(ctx, &ps);
962 }
963
964 if (!ctx->v4l_codec_ready)
965 return IRQ_HANDLED;
966 }
967
968 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
969 if (vop_time_inc < hw->last_vop_time_inc) {
970 duration = vop_time_inc +
971 time_increment_resolution -
972 hw->last_vop_time_inc;
973 } else {
974 duration = vop_time_inc -
975 hw->last_vop_time_inc;
976 }
977
978 if (duration == hw->last_duration) {
979 hw->rate_detect++;
980 if ((hw->rate_detect >= RATE_DETECT_COUNT) &&
981 (time_increment_resolution != 0)) {
982 hw->vmpeg4_amstream_dec_info.rate =
983 duration * DURATION_UNIT /
984 time_increment_resolution;
985 duration =
986 hw->vmpeg4_amstream_dec_info.rate;
987 }
988 } else {
989 hw->rate_detect = 0;
990 hw->last_duration = duration;
991 }
992 if (MPEG4_VALID_DUR(duration)) {
993 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
994 "warn: duration %x, set 0\n", duration);
995 duration = 0;
996 }
997 } else {
998 duration = hw->vmpeg4_amstream_dec_info.rate;
999#if 0
1000 pr_info("info rate = %d, ucode rate = 0x%x:0x%x\n",
1001 hw->vmpeg4_amstream_dec_info.rate,
1002 READ_VREG(MP4_RATE), vop_time_inc);
1003#endif
1004 }
1005
1006 /* frame mode with unstable pts */
1007 if (hw->unstable_pts && hw->chunk) {
1008 dec_pic->pts_valid = hw->chunk->pts_valid;
1009 dec_pic->pts = hw->chunk->pts;
1010 dec_pic->pts64 = hw->chunk->pts64;
1011 if ((B_PICTURE == picture_type) ||
1012 (hw->last_dec_pts == dec_pic->pts))
1013 dec_pic->pts_valid = 0;
1014
1015 hw->last_dec_pts = dec_pic->pts;
1016 } else if ((I_PICTURE == picture_type) ||
1017 (P_PICTURE == picture_type)) {
1018 offset = READ_VREG(MP4_OFFSET_REG);
1019 if (hw->chunk) {
1020 dec_pic->pts_valid = hw->chunk->pts_valid;
1021 dec_pic->pts = hw->chunk->pts;
1022 dec_pic->pts64 = hw->chunk->pts64;
1023 } else {
1024 if (pts_lookup_offset_us64(PTS_TYPE_VIDEO, offset,
1025 &pts, &frame_size, 3000, &pts_us64) == 0) {
1026 dec_pic->pts_valid = true;
1027 dec_pic->pts = pts;
1028 dec_pic->pts64 = pts_us64;
1029 hw->pts_hit++;
1030 } else {
1031 dec_pic->pts_valid = false;
1032 hw->pts_missed++;
1033 }
1034 }
1035 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1036 "%c, offset=0x%x, pts=0x%x(%d), index=%d, used=%d\n",
1037 GET_PIC_TYPE(picture_type), offset, dec_pic->pts,
1038 dec_pic->pts_valid, index, hw->vfbuf_use[index]);
1039 }
1040
1041 dec_pic->index = index;
1042 dec_pic->pic_info = reg;
1043 dec_pic->pic_type = picture_type;
1044 dec_pic->duration = duration;
1045 hw->vfbuf_use[index] = 0;
1046 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1047 "mmpeg4: pic_num: %d, index %d, type %c, pts %x\n",
1048 hw->frame_num, index,
1049 GET_PIC_TYPE(picture_type),
1050 dec_pic->pts);
1051
1052 /* buffer management */
1053 if ((picture_type == I_PICTURE) ||
1054 (picture_type == P_PICTURE)) {
1055 index = update_ref(hw, index);
1056 } else {
1057 /* drop B frame or disp immediately.
1058 * depend on if there are two ref frames
1059 */
1060 if (hw->refs[1] == -1)
1061 index = -1;
1062 }
1063 vmpeg4_save_hw_context(hw);
1064 if (index < 0) {
1065 vdec_schedule_work(&hw->work);
1066 return IRQ_HANDLED;
1067 }
1068 disp_pic = &hw->pic[index];
1069 if ((hw->first_i_frame_ready == 0) &&
1070 (I_PICTURE == disp_pic->pic_type))
1071 hw->first_i_frame_ready = 1;
1072
1073 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1074 "disp: index=%d, pts=%x(%d), used=%d, picout=%c(dec=%c)\n",
1075 index, disp_pic->pts, disp_pic->pts_valid,
1076 hw->vfbuf_use[index],
1077 GET_PIC_TYPE(disp_pic->pic_type),
1078 GET_PIC_TYPE(picture_type));
1079
1080 if (disp_pic->pts_valid) {
1081 hw->last_anch_pts = disp_pic->pts;
1082 hw->last_anch_pts_us64 = disp_pic->pts64;
1083 hw->frame_num_since_last_anch = 0;
1084 hw->vop_time_inc_since_last_anch = 0;
1085 } else if (vdec_stream_based(vdec)) {
1086 disp_pic->pts = hw->last_anch_pts;
1087 disp_pic->pts64 = hw->last_anch_pts_us64;
1088
1089 if ((time_increment_resolution != 0) &&
1090 (fixed_vop_rate == 0) &&
1091 (hw->vmpeg4_amstream_dec_info.rate == 0)) {
1092 /* variable PTS rate */
1093 /*bug on variable pts calc,
1094 *do as dixed vop first if we
1095 *have rate setting before.
1096 */
1097 if (vop_time_inc > hw->last_vop_time_inc) {
1098 duration = vop_time_inc -
1099 hw->last_vop_time_inc;
1100 } else {
1101 duration = vop_time_inc +
1102 time_increment_resolution -
1103 hw->last_vop_time_inc;
1104 }
1105
1106 hw->vop_time_inc_since_last_anch += duration;
1107
1108 disp_pic->pts += hw->vop_time_inc_since_last_anch *
1109 PTS_UNIT / time_increment_resolution;
1110 disp_pic->pts64 += (hw->vop_time_inc_since_last_anch *
1111 PTS_UNIT / time_increment_resolution) *
1112 100 / 9;
1113
1114 if (hw->vop_time_inc_since_last_anch >
1115 (1 << 14)) {
1116 /* avoid overflow */
1117 hw->last_anch_pts = disp_pic->pts;
1118 hw->last_anch_pts_us64 = disp_pic->pts64;
1119 hw->vop_time_inc_since_last_anch = 0;
1120 }
1121 } else {
1122 /* fixed VOP rate */
1123 hw->frame_num_since_last_anch++;
1124 disp_pic->pts += DUR2PTS(hw->frame_num_since_last_anch *
1125 hw->vmpeg4_amstream_dec_info.rate);
1126 disp_pic->pts64 += DUR2PTS(
1127 hw->frame_num_since_last_anch *
1128 hw->vmpeg4_amstream_dec_info.rate) * 100 / 9;
1129
1130 if (hw->frame_num_since_last_anch > (1 << 15)) {
1131 /* avoid overflow */
1132 hw->last_anch_pts = disp_pic->pts;
1133 hw->last_anch_pts_us64 = disp_pic->pts64;
1134 hw->frame_num_since_last_anch = 0;
1135 }
1136 }
1137 } else if (hw->unstable_pts && hw->chunk &&
1138 MPEG4_VALID_DUR(duration)) {
1139 /* invalid pts calc */
1140 hw->frame_num_since_last_anch = hw->chunk_frame_count;
1141 disp_pic->pts = hw->last_anch_pts +
1142 DUR2PTS(hw->frame_num_since_last_anch *
1143 duration);
1144 disp_pic->pts64 = hw->last_anch_pts_us64 +
1145 DUR2PTS(hw->frame_num_since_last_anch *
1146 duration) * 100 / 9;
1147
1148 if (hw->frame_num_since_last_anch > (1 << 15)) {
1149 /* avoid overflow */
1150 hw->last_anch_pts = disp_pic->pts;
1151 hw->last_anch_pts_us64 = disp_pic->pts64;
1152 hw->frame_num_since_last_anch = 0;
1153 } else
1154 disp_pic->pts_valid = 1;
1155 }
1156
1157 if (vdec_frame_based(vdec) &&
1158 (hw->unstable_pts) &&
1159 MPEG4_VALID_DUR(duration)) {
1160
1161 u32 threshold = DUR2PTS(duration) >> 3;
1162
1163 if (disp_pic->pts <= (hw->last_pts + threshold)) {
1164 disp_pic->pts = hw->last_pts + DUR2PTS(duration);
1165 disp_pic->pts64 = hw->last_pts64 +
1166 (DUR2PTS(duration)*100/9);
1167 }
1168 if (!disp_pic->pts_valid) {
1169 disp_pic->pts = 0;
1170 disp_pic->pts64 = 0;
1171 }
1172 }
1173 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1174 "disp: pic_type %c, pts %d(%lld), diff %d, cnt %d\n",
1175 GET_PIC_TYPE(disp_pic->pic_type),
1176 disp_pic->pts,
1177 disp_pic->pts64,
1178 disp_pic->pts - hw->last_pts,
1179 hw->chunk_frame_count);
1180 hw->last_pts = disp_pic->pts;
1181 hw->last_pts64 = disp_pic->pts64;
1182 hw->frame_dur = duration;
1183 disp_pic->duration = duration;
1184 disp_pic->repeat_cnt = repeat_cnt;
1185
1186 prepare_display_buf(hw, disp_pic);
1187
1188 hw->total_frame += repeat_cnt + 1;
1189 hw->last_vop_time_inc = vop_time_inc;
1190
1191 if (vdec_frame_based(vdec) &&
1192 (frmbase_cont_bitlevel != 0) &&
1193 (hw->first_i_frame_ready)) {
1194 u32 consume_byte, res_byte, bitcnt;
1195
1196 bitcnt = READ_VREG(VIFF_BIT_CNT);
1197 res_byte = bitcnt >> 3;
1198
1199 if (hw->chunk_size > res_byte) {
1200 if (bitcnt > frmbase_cont_bitlevel) {
1201 consume_byte = hw->chunk_size - res_byte;
1202
1203 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1204 "%s, size %d, consume %d, res %d\n", __func__,
1205 hw->chunk_size, consume_byte, res_byte);
1206
1207 if (consume_byte > VDEC_FIFO_ALIGN) {
1208 consume_byte -= VDEC_FIFO_ALIGN;
1209 res_byte += VDEC_FIFO_ALIGN;
1210 }
1211 hw->chunk_offset += consume_byte;
1212 hw->chunk_size = res_byte;
1213 hw->dec_result = DEC_RESULT_UNFINISH;
1214 hw->chunk_frame_count++;
1215 hw->unstable_pts = 1;
1216 } else {
1217 hw->chunk_size = 0;
1218 hw->chunk_offset = 0;
1219 }
1220 } else {
1221 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1222 "error: bitbyte %d hw->chunk_size %d\n", res_byte, hw->chunk_size);
1223 hw->chunk_size = 0;
1224 hw->chunk_offset = 0;
1225 }
1226 }
1227 vdec_schedule_work(&hw->work);
1228 }
1229 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
1230 "%s: frame num:%d\n", __func__, hw->frame_num);
1231
1232 return IRQ_HANDLED;
1233}
1234
1235static irqreturn_t vmpeg4_isr(struct vdec_s *vdec, int irq)
1236{
1237 struct vdec_mpeg4_hw_s *hw =
1238 (struct vdec_mpeg4_hw_s *)(vdec->private);
1239
1240 if (hw->eos)
1241 return IRQ_HANDLED;
1242
1243 return IRQ_WAKE_THREAD;
1244}
1245
1246static void flush_output(struct vdec_mpeg4_hw_s * hw)
1247{
1248 struct pic_info_t *pic;
1249
1250 if (hw->vfbuf_use[hw->refs[1]] > 0) {
1251 pic = &hw->pic[hw->refs[1]];
1252 prepare_display_buf(hw, pic);
1253 }
1254}
1255
1256static int notify_v4l_eos(struct vdec_s *vdec)
1257{
1258 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1259 struct aml_vcodec_ctx *ctx = (struct aml_vcodec_ctx *)(hw->v4l2_ctx);
1260 struct vframe_s *vf = NULL;
1261 struct vdec_v4l2_buffer *fb = NULL;
1262
1263 if (hw->is_used_v4l && hw->eos) {
1264 if (kfifo_get(&hw->newframe_q, &vf) == 0 || vf == NULL) {
1265 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1266 "%s fatal error, no available buffer slot.\n",
1267 __func__);
1268 return -1;
1269 }
1270
1271 if (vdec_v4l_get_buffer(hw->v4l2_ctx, &fb)) {
1272 pr_err("[%d] get fb fail.\n", ctx->id);
1273 return -1;
1274 }
1275
1276 vf->timestamp = ULONG_MAX;
1277 vf->v4l_mem_handle = (unsigned long)fb;
1278 vf->flag = VFRAME_FLAG_EMPTY_FRAME_V4L;
1279
1280 kfifo_put(&hw->display_q, (const struct vframe_s *)vf);
1281 vf_notify_receiver(vdec->vf_provider_name,
1282 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
1283
1284 pr_info("[%d] mpeg4 EOS notify.\n", ctx->id);
1285 }
1286
1287 return 0;
1288}
1289
1290static void vmpeg4_work(struct work_struct *work)
1291{
1292 struct vdec_mpeg4_hw_s *hw =
1293 container_of(work, struct vdec_mpeg4_hw_s, work);
1294 struct vdec_s *vdec = hw_to_vdec(hw);
1295
1296 /* finished decoding one frame or error,
1297 * notify vdec core to switch context
1298 */
1299 if (hw->dec_result != DEC_RESULT_DONE)
1300 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1301 "vmpeg4_work: result=%d,status=%d\n",
1302 hw->dec_result, hw_to_vdec(hw)->next_status);
1303
1304 if (hw->dec_result == DEC_RESULT_UNFINISH) {
1305 if (!hw->ctx_valid)
1306 hw->ctx_valid = 1;
1307
1308 } else if ((hw->dec_result == DEC_RESULT_DONE) ||
1309 ((input_frame_based(&vdec->input)) && hw->chunk)) {
1310 if (!hw->ctx_valid)
1311 hw->ctx_valid = 1;
1312
1313 vdec_vframe_dirty(vdec, hw->chunk);
1314 hw->chunk = NULL;
1315 } else if (hw->dec_result == DEC_RESULT_AGAIN
1316 && (vdec->next_status != VDEC_STATUS_DISCONNECTED)) {
1317 /*
1318 stream base: stream buf empty or timeout
1319 frame base: vdec_prepare_input fail
1320 */
1321 if (!vdec_has_more_input(vdec)) {
1322 hw->dec_result = DEC_RESULT_EOS;
1323 vdec_schedule_work(&hw->work);
1324 return;
1325 }
1326 } else if (hw->dec_result == DEC_RESULT_FORCE_EXIT) {
1327 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1328 "%s: force exit\n", __func__);
1329 if (hw->stat & STAT_ISR_REG) {
1330 amvdec_stop();
1331 vdec_free_irq(VDEC_IRQ_1, (void *)hw);
1332 hw->stat &= ~STAT_ISR_REG;
1333 }
1334 } else if (hw->dec_result == DEC_RESULT_EOS) {
1335 hw->eos = 1;
1336 if (hw->stat & STAT_VDEC_RUN) {
1337 amvdec_stop();
1338 hw->stat &= ~STAT_VDEC_RUN;
1339 }
1340 vdec_vframe_dirty(vdec, hw->chunk);
1341 hw->chunk = NULL;
1342 vdec_clean_input(vdec);
1343 flush_output(hw);
1344
1345 if (hw->is_used_v4l)
1346 notify_v4l_eos(vdec);
1347
1348 mmpeg4_debug_print(DECODE_ID(hw), 0,
1349 "%s: eos flushed, frame_num %d\n",
1350 __func__, hw->frame_num);
1351 }
1352
1353 if (hw->stat & STAT_VDEC_RUN) {
1354 amvdec_stop();
1355 hw->stat &= ~STAT_VDEC_RUN;
1356 }
1357 /*disable mbox interrupt */
1358 WRITE_VREG(ASSIST_MBOX1_MASK, 0);
1359 del_timer_sync(&hw->check_timer);
1360 hw->stat &= ~STAT_TIMER_ARM;
1361
1362 /* mark itself has all HW resource released and input released */
1363 if (vdec->parallel_dec == 1)
1364 vdec_core_finish_run(vdec, CORE_MASK_VDEC_1);
1365 else
1366 vdec_core_finish_run(vdec, CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
1367
1368 wake_up_interruptible(&hw->wait_q);
1369 if (hw->vdec_cb)
1370 hw->vdec_cb(vdec, hw->vdec_cb_arg);
1371}
1372
1373static struct vframe_s *vmpeg_vf_peek(void *op_arg)
1374{
1375 struct vframe_s *vf;
1376 struct vdec_s *vdec = op_arg;
1377 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1378
1379 if (!hw)
1380 return NULL;
1381 hw->peek_num++;
1382 if (kfifo_peek(&hw->display_q, &vf))
1383 return vf;
1384
1385 return NULL;
1386}
1387
1388static struct vframe_s *vmpeg_vf_get(void *op_arg)
1389{
1390 struct vframe_s *vf;
1391 struct vdec_s *vdec = op_arg;
1392 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1393 hw->get_num++;
1394 if (kfifo_get(&hw->display_q, &vf))
1395 return vf;
1396
1397 return NULL;
1398}
1399
1400static void vmpeg_vf_put(struct vframe_s *vf, void *op_arg)
1401{
1402 struct vdec_s *vdec = op_arg;
1403 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1404
1405 hw->vfbuf_use[vf->index]--;
1406 hw->put_num++;
1407 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
1408 "%s: put num:%d\n",__func__, hw->put_num);
1409 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
1410 "index=%d, used=%d\n", vf->index, hw->vfbuf_use[vf->index]);
1411 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1412}
1413
1414static int vmpeg_event_cb(int type, void *data, void *private_data)
1415{
1416 return 0;
1417}
1418
1419static int vmpeg_vf_states(struct vframe_states *states, void *op_arg)
1420{
1421 unsigned long flags;
1422 struct vdec_s *vdec = op_arg;
1423 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1424
1425 spin_lock_irqsave(&hw->lock, flags);
1426
1427 states->vf_pool_size = VF_POOL_SIZE;
1428 states->buf_free_num = kfifo_len(&hw->newframe_q);
1429 states->buf_avail_num = kfifo_len(&hw->display_q);
1430 states->buf_recycle_num = 0;
1431
1432 spin_unlock_irqrestore(&hw->lock, flags);
1433
1434 return 0;
1435}
1436
1437
1438static int dec_status(struct vdec_s *vdec, struct vdec_info *vstatus)
1439{
1440 struct vdec_mpeg4_hw_s *hw =
1441 (struct vdec_mpeg4_hw_s *)vdec->private;
1442
1443 if (!hw)
1444 return -1;
1445
1446 vstatus->frame_width = hw->frame_width;
1447 vstatus->frame_height = hw->frame_height;
1448 if (0 != hw->vmpeg4_amstream_dec_info.rate)
1449 vstatus->frame_rate = DURATION_UNIT /
1450 hw->vmpeg4_amstream_dec_info.rate;
1451 else
1452 vstatus->frame_rate = DURATION_UNIT;
1453 vstatus->error_count = READ_VREG(MP4_ERR_COUNT);
1454 vstatus->status = hw->stat;
1455 vstatus->frame_dur = hw->frame_dur;
1456 snprintf(vstatus->vdec_name, sizeof(vstatus->vdec_name),
1457 "%s", DRIVER_NAME);
1458
1459 return 0;
1460}
1461
1462/****************************************/
1463static int vmpeg4_canvas_init(struct vdec_mpeg4_hw_s *hw)
1464{
1465 int i, ret;
1466 u32 canvas_width, canvas_height;
1467 u32 decbuf_size, decbuf_y_size;
1468 struct vdec_s *vdec = hw_to_vdec(hw);
1469 unsigned long decbuf_start;
1470
1471 if (buf_size <= 0x00400000) {
1472 /* SD only */
1473 canvas_width = 768;
1474 canvas_height = 576;
1475 decbuf_y_size = 0x80000;
1476 decbuf_size = 0x100000;
1477 } else {
1478 int w = 1920;
1479 int h = 1088;
1480 int align_w, align_h;
1481 int max, min;
1482
1483 align_w = ALIGN(w, 64);
1484 align_h = ALIGN(h, 64);
1485 if (align_w > align_h) {
1486 max = align_w;
1487 min = align_h;
1488 } else {
1489 max = align_h;
1490 min = align_w;
1491 }
1492 /* HD & SD */
1493 if ((max > 1920 || min > 1088) &&
1494 ALIGN(align_w * align_h * 3/2, SZ_64K) * 9 <=
1495 buf_size) {
1496 canvas_width = align_w;
1497 canvas_height = align_h;
1498 decbuf_y_size =
1499 ALIGN(align_w * align_h, SZ_64K);
1500 decbuf_size =
1501 ALIGN(align_w * align_h * 3/2, SZ_64K);
1502 } else { /*1080p*/
1503 if (h > w) {
1504 canvas_width = 1088;
1505 canvas_height = 1920;
1506 } else {
1507 canvas_width = 1920;
1508 canvas_height = 1088;
1509 }
1510 decbuf_y_size = 0x200000;
1511 decbuf_size = 0x300000;
1512 }
1513 }
1514
1515 for (i = 0; i < MAX_BMMU_BUFFER_NUM; i++) {
1516
1517 unsigned canvas;
1518
1519 if (i == (MAX_BMMU_BUFFER_NUM - 1))
1520 decbuf_size = WORKSPACE_SIZE;
1521
1522 if (hw->is_used_v4l && !(i == (MAX_BMMU_BUFFER_NUM - 1))) {
1523 continue;
1524 } else {
1525 ret = decoder_bmmu_box_alloc_buf_phy(hw->mm_blk_handle, i,
1526 decbuf_size, DRIVER_NAME, &decbuf_start);
1527 if (ret < 0) {
1528 pr_err("mmu alloc failed! size %d idx %d\n",
1529 decbuf_size, i);
1530 return ret;
1531 }
1532 }
1533
1534 if (i == (MAX_BMMU_BUFFER_NUM - 1)) {
1535 hw->buf_start = decbuf_start;
1536 } else {
1537 if (vdec->parallel_dec == 1) {
1538 unsigned tmp;
1539 if (canvas_y(hw->canvas_spec[i]) == 0xff) {
1540 tmp =
1541 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1542 hw->canvas_spec[i] &= ~0xff;
1543 hw->canvas_spec[i] |= tmp;
1544 }
1545 if (canvas_u(hw->canvas_spec[i]) == 0xff) {
1546 tmp =
1547 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1548 hw->canvas_spec[i] &= ~(0xffff << 8);
1549 hw->canvas_spec[i] |= tmp << 8;
1550 hw->canvas_spec[i] |= tmp << 16;
1551 }
1552 canvas = hw->canvas_spec[i];
1553 } else {
1554 canvas = vdec->get_canvas(i, 2);
1555 hw->canvas_spec[i] = canvas;
1556 }
1557
1558 hw->canvas_config[i][0].phy_addr = decbuf_start;
1559 hw->canvas_config[i][0].width = canvas_width;
1560 hw->canvas_config[i][0].height = canvas_height;
1561 hw->canvas_config[i][0].block_mode = hw->blkmode;
1562 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
1563 hw->canvas_config[i][0].endian = 7;
1564 else
1565 hw->canvas_config[i][0].endian = 0;
1566 canvas_config_config(canvas_y(canvas),
1567 &hw->canvas_config[i][0]);
1568
1569 hw->canvas_config[i][1].phy_addr =
1570 decbuf_start + decbuf_y_size;
1571 hw->canvas_config[i][1].width = canvas_width;
1572 hw->canvas_config[i][1].height = (canvas_height >> 1);
1573 hw->canvas_config[i][1].block_mode = hw->blkmode;
1574 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
1575 hw->canvas_config[i][1].endian = 7;
1576 else
1577 hw->canvas_config[i][1].endian = 0;
1578 canvas_config_config(canvas_u(canvas),
1579 &hw->canvas_config[i][1]);
1580 }
1581 }
1582
1583 return 0;
1584}
1585
1586static void vmpeg4_dump_state(struct vdec_s *vdec)
1587{
1588 struct vdec_mpeg4_hw_s *hw =
1589 (struct vdec_mpeg4_hw_s *)(vdec->private);
1590 u32 i;
1591 mmpeg4_debug_print(DECODE_ID(hw), 0,
1592 "====== %s\n", __func__);
1593 mmpeg4_debug_print(DECODE_ID(hw), 0,
1594 "width/height (%d/%d), i_fram:%d, buffer_not_ready %d\n",
1595 hw->frame_width,
1596 hw->frame_height,
1597 hw->first_i_frame_ready,
1598 hw->buffer_not_ready
1599 );
1600 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
1601 mmpeg4_debug_print(DECODE_ID(hw), 0,
1602 "index %d, used %d\n", i, hw->vfbuf_use[i]);
1603 }
1604
1605 mmpeg4_debug_print(DECODE_ID(hw), 0,
1606 "is_framebase(%d), eos %d, state 0x%x, dec_result 0x%x dec_frm %d\n",
1607 vdec_frame_based(vdec),
1608 hw->eos,
1609 hw->stat,
1610 hw->dec_result,
1611 hw->frame_num
1612 );
1613 mmpeg4_debug_print(DECODE_ID(hw), 0,
1614 "is_framebase(%d), put_frm %d run %d not_run_ready %d input_empty %d,drop %d\n",
1615 vdec_frame_based(vdec),
1616 hw->put_num,
1617 hw->run_count,
1618 hw->not_run_ready,
1619 hw->input_empty,
1620 hw->drop_frame_count
1621 );
1622
1623 if (vf_get_receiver(vdec->vf_provider_name)) {
1624 enum receviver_start_e state =
1625 vf_notify_receiver(vdec->vf_provider_name,
1626 VFRAME_EVENT_PROVIDER_QUREY_STATE,
1627 NULL);
1628 mmpeg4_debug_print(DECODE_ID(hw), 0,
1629 "\nreceiver(%s) state %d\n",
1630 vdec->vf_provider_name,
1631 state);
1632 }
1633 mmpeg4_debug_print(DECODE_ID(hw), 0,
1634 "%s, newq(%d/%d), dispq(%d/%d) vf peek/get/put (%d/%d/%d)\n",
1635 __func__,
1636 kfifo_len(&hw->newframe_q), VF_POOL_SIZE,
1637 kfifo_len(&hw->display_q), VF_POOL_SIZE,
1638 hw->peek_num, hw->get_num, hw->put_num
1639 );
1640 mmpeg4_debug_print(DECODE_ID(hw), 0,
1641 "VIFF_BIT_CNT=0x%x\n",
1642 READ_VREG(VIFF_BIT_CNT));
1643 mmpeg4_debug_print(DECODE_ID(hw), 0,
1644 "VLD_MEM_VIFIFO_LEVEL=0x%x\n",
1645 READ_VREG(VLD_MEM_VIFIFO_LEVEL));
1646 mmpeg4_debug_print(DECODE_ID(hw), 0,
1647 "VLD_MEM_VIFIFO_WP=0x%x\n",
1648 READ_VREG(VLD_MEM_VIFIFO_WP));
1649 mmpeg4_debug_print(DECODE_ID(hw), 0,
1650 "VLD_MEM_VIFIFO_RP=0x%x\n",
1651 READ_VREG(VLD_MEM_VIFIFO_RP));
1652 mmpeg4_debug_print(DECODE_ID(hw), 0,
1653 "PARSER_VIDEO_RP=0x%x\n",
1654 READ_PARSER_REG(PARSER_VIDEO_RP));
1655 mmpeg4_debug_print(DECODE_ID(hw), 0,
1656 "PARSER_VIDEO_WP=0x%x\n",
1657 READ_PARSER_REG(PARSER_VIDEO_WP));
1658 if (vdec_frame_based(vdec) &&
1659 debug_enable & PRINT_FRAMEBASE_DATA) {
1660 int jj;
1661 if (hw->chunk && hw->chunk->block &&
1662 hw->chunk->size > 0) {
1663 u8 *data = NULL;
1664
1665 if (!hw->chunk->block->is_mapped)
1666 data = codec_mm_vmap(hw->chunk->block->start +
1667 hw->chunk->offset, hw->chunk->size);
1668 else
1669 data = ((u8 *)hw->chunk->block->start_virt) +
1670 hw->chunk->offset;
1671
1672 mmpeg4_debug_print(DECODE_ID(hw), 0,
1673 "frame data size 0x%x\n",
1674 hw->chunk->size);
1675 for (jj = 0; jj < hw->chunk->size; jj++) {
1676 if ((jj & 0xf) == 0)
1677 mmpeg4_debug_print(DECODE_ID(hw),
1678 PRINT_FRAMEBASE_DATA,
1679 "%06x:", jj);
1680 mmpeg4_debug_print(DECODE_ID(hw),
1681 PRINT_FRAMEBASE_DATA,
1682 "%02x ", data[jj]);
1683 if (((jj + 1) & 0xf) == 0)
1684 mmpeg4_debug_print(DECODE_ID(hw),
1685 PRINT_FRAMEBASE_DATA,
1686 "\n");
1687 }
1688
1689 if (!hw->chunk->block->is_mapped)
1690 codec_mm_unmap_phyaddr(data);
1691 }
1692 }
1693}
1694
1695static void reset_process_time(struct vdec_mpeg4_hw_s *hw)
1696{
1697 if (hw->start_process_time) {
1698 unsigned process_time =
1699 1000 * (jiffies - hw->start_process_time) / HZ;
1700 hw->start_process_time = 0;
1701 if (process_time > max_process_time[DECODE_ID(hw)])
1702 max_process_time[DECODE_ID(hw)] = process_time;
1703 }
1704}
1705static void start_process_time(struct vdec_mpeg4_hw_s *hw)
1706{
1707 hw->decode_timeout_count = 2;
1708 hw->start_process_time = jiffies;
1709}
1710
1711static void timeout_process(struct vdec_mpeg4_hw_s *hw)
1712{
1713 if (hw->stat & STAT_VDEC_RUN) {
1714 amvdec_stop();
1715 hw->stat &= ~STAT_VDEC_RUN;
1716 }
1717 mmpeg4_debug_print(DECODE_ID(hw), 0,
1718 "%s decoder timeout %d\n", __func__, hw->timeout_cnt);
1719 if (vdec_frame_based((hw_to_vdec(hw)))) {
1720 mmpeg4_debug_print(DECODE_ID(hw), 0,
1721 "%s frame_num %d, chunk size 0x%x, chksum 0x%x\n",
1722 __func__,
1723 hw->frame_num,
1724 hw->chunk->size,
1725 get_data_check_sum(hw, hw->chunk->size));
1726 }
1727 hw->timeout_cnt++;
1728 /* timeout: data droped, frame_num inaccurate*/
1729 hw->frame_num++;
1730 reset_process_time(hw);
1731 hw->first_i_frame_ready = 0;
1732 hw->dec_result = DEC_RESULT_DONE;
1733 vdec_schedule_work(&hw->work);
1734}
1735
1736
1737static void check_timer_func(unsigned long arg)
1738{
1739 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)arg;
1740 struct vdec_s *vdec = hw_to_vdec(hw);
1741 unsigned int timeout_val = decode_timeout_val;
1742
1743 if (radr != 0) {
1744 if (rval != 0) {
1745 WRITE_VREG(radr, rval);
1746 pr_info("WRITE_VREG(%x,%x)\n", radr, rval);
1747 } else
1748 pr_info("READ_VREG(%x)=%x\n", radr, READ_VREG(radr));
1749 rval = 0;
1750 radr = 0;
1751 }
1752
1753 if (((debug_enable & PRINT_FLAG_TIMEOUT_STATUS) == 0) &&
1754 (vdec_frame_based(vdec) ||
1755 ((u32)READ_VREG(VLD_MEM_VIFIFO_LEVEL) > 0x100)) &&
1756 (timeout_val > 0) &&
1757 (hw->start_process_time > 0) &&
1758 ((1000 * (jiffies - hw->start_process_time) / HZ)
1759 > timeout_val)) {
1760 if (hw->last_vld_level == READ_VREG(VLD_MEM_VIFIFO_LEVEL)) {
1761 if (hw->decode_timeout_count > 0)
1762 hw->decode_timeout_count--;
1763 if (hw->decode_timeout_count == 0)
1764 timeout_process(hw);
1765 }
1766 hw->last_vld_level = READ_VREG(VLD_MEM_VIFIFO_LEVEL);
1767 }
1768
1769 if (vdec->next_status == VDEC_STATUS_DISCONNECTED) {
1770 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1771 "vdec requested to be disconnected\n");
1772 hw->dec_result = DEC_RESULT_FORCE_EXIT;
1773 vdec_schedule_work(&hw->work);
1774 return;
1775 }
1776
1777 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
1778}
1779
1780static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw)
1781{
1782 int index, i;
1783 void *workspace_buf = NULL;
1784
1785 index = find_free_buffer(hw);
1786 if (index < 0)
1787 return -1;
1788
1789 if (!hw->init_flag) {
1790 if (vmpeg4_canvas_init(hw) < 0)
1791 return -1;
1792 } else {
1793 if (!hw->is_used_v4l) {
1794 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
1795 canvas_config_config(canvas_y(hw->canvas_spec[i]),
1796 &hw->canvas_config[i][0]);
1797 canvas_config_config(canvas_u(hw->canvas_spec[i]),
1798 &hw->canvas_config[i][1]);
1799 }
1800 }
1801 }
1802 /* prepare REF0 & REF1
1803 * points to the past two IP buffers
1804 * prepare REC_CANVAS_ADDR and ANC2_CANVAS_ADDR
1805 * points to the output buffer
1806 */
1807 if (hw->refs[0] == -1) {
1808 WRITE_VREG(MREG_REF0, (hw->refs[1] == -1) ? 0xffffffff :
1809 hw->canvas_spec[hw->refs[1]]);
1810 } else {
1811 WRITE_VREG(MREG_REF0, (hw->refs[0] == -1) ? 0xffffffff :
1812 hw->canvas_spec[hw->refs[0]]);
1813 }
1814 WRITE_VREG(MREG_REF1, (hw->refs[1] == -1) ? 0xffffffff :
1815 hw->canvas_spec[hw->refs[1]]);
1816
1817 WRITE_VREG(REC_CANVAS_ADDR, hw->canvas_spec[index]);
1818 WRITE_VREG(ANC2_CANVAS_ADDR, hw->canvas_spec[index]);
1819
1820 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RESTORE,
1821 "restore ref0=0x%x, ref1=0x%x, rec=0x%x, ctx_valid=%d,index=%d\n",
1822 READ_VREG(MREG_REF0),
1823 READ_VREG(MREG_REF1),
1824 READ_VREG(REC_CANVAS_ADDR),
1825 hw->ctx_valid, index);
1826
1827 /* notify ucode the buffer start address */
1828 workspace_buf = codec_mm_vmap(hw->buf_start, WORKSPACE_SIZE);
1829 if (workspace_buf) {
1830 /* clear to fix decoder timeout at first time */
1831 if (!hw->init_flag)
1832 memset(workspace_buf, 0, WORKSPACE_SIZE);
1833 codec_mm_dma_flush(workspace_buf,
1834 WORKSPACE_SIZE, DMA_TO_DEVICE);
1835 codec_mm_unmap_phyaddr(workspace_buf);
1836 }
1837 WRITE_VREG(MEM_OFFSET_REG, hw->buf_start);
1838
1839 /* disable PSCALE for hardware sharing */
1840 WRITE_VREG(PSCALE_CTRL, 0);
1841
1842 WRITE_VREG(MREG_BUFFEROUT, 0);
1843
1844 /* clear mailbox interrupt */
1845 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
1846
1847 /* enable mailbox interrupt */
1848 WRITE_VREG(ASSIST_MBOX1_MASK, 1);
1849
1850 /* clear repeat count */
1851 WRITE_VREG(MP4_NOT_CODED_CNT, 0);
1852
1853#ifdef NV21
1854 SET_VREG_MASK(MDEC_PIC_DC_CTRL, 1 << 17);
1855#endif
1856
1857#if 1/* /MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
1858 WRITE_VREG(MDEC_PIC_DC_THRESH, 0x404038aa);
1859#endif
1860
1861 WRITE_VREG(MP4_PIC_WH, (hw->ctx_valid) ?
1862 hw->reg_mp4_pic_wh :
1863 ((hw->frame_width << 16) | hw->frame_height));
1864 WRITE_VREG(MP4_SYS_RATE, hw->vmpeg4_amstream_dec_info.rate);
1865
1866 if (hw->ctx_valid) {
1867 WRITE_VREG(DC_AC_CTRL, hw->reg_dc_ac_ctrl);
1868 WRITE_VREG(IQIDCT_CONTROL, hw->reg_iqidct_control);
1869 WRITE_VREG(RESYNC_MARKER_LENGTH, hw->reg_resync_marker_length);
1870 WRITE_VREG(RV_AI_MB_COUNT, hw->reg_rv_ai_mb_count);
1871 }
1872 WRITE_VREG(MPEG1_2_REG, (hw->ctx_valid) ? hw->reg_mpeg1_2_reg : 1);
1873 WRITE_VREG(VCOP_CTRL_REG, hw->reg_vcop_ctrl_reg);
1874 WRITE_VREG(PIC_HEAD_INFO, hw->reg_pic_head_info);
1875 WRITE_VREG(SLICE_QP, hw->reg_slice_qp);
1876 WRITE_VREG(MB_INFO, hw->reg_mb_info);
1877
1878 if (vdec_frame_based(hw_to_vdec(hw)) && hw->chunk) {
1879 /* frame based input */
1880 WRITE_VREG(MREG_INPUT, (hw->chunk->offset & 7) | (1<<7) |
1881 (hw->ctx_valid<<6));
1882 } else {
1883 /* stream based input */
1884 WRITE_VREG(MREG_INPUT, (hw->ctx_valid<<6));
1885 }
1886
1887 return 0;
1888}
1889
1890static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw)
1891{
1892 int i;
1893
1894 hw->vmpeg4_ratio = hw->vmpeg4_amstream_dec_info.ratio;
1895
1896 hw->vmpeg4_ratio64 = hw->vmpeg4_amstream_dec_info.ratio64;
1897
1898 hw->vmpeg4_rotation =
1899 (((unsigned long)hw->vmpeg4_amstream_dec_info.param) >> 16) & 0xffff;
1900 hw->sys_mp4_rate = hw->vmpeg4_amstream_dec_info.rate;
1901 hw->frame_width = hw->vmpeg4_amstream_dec_info.width;
1902 hw->frame_height = hw->vmpeg4_amstream_dec_info.height;
1903 hw->frame_dur = 0;
1904 hw->frame_prog = 0;
1905 hw->unstable_pts =
1906 (((unsigned long) hw->vmpeg4_amstream_dec_info.param & 0x40) >> 6);
1907 mmpeg4_debug_print(DECODE_ID(hw), 0,
1908 "param = 0x%x unstable_pts = %d\n",
1909 hw->vmpeg4_amstream_dec_info.param,
1910 hw->unstable_pts);
1911 hw->last_dec_pts = -1;
1912
1913 hw->total_frame = 0;
1914
1915 hw->last_anch_pts = 0;
1916
1917 hw->last_anch_pts_us64 = 0;
1918
1919 hw->last_vop_time_inc = hw->last_duration = 0;
1920
1921 hw->vop_time_inc_since_last_anch = 0;
1922 hw->last_pts = 0;
1923 hw->last_pts64 = 0;
1924 hw->frame_num_since_last_anch = 0;
1925 hw->frame_num = 0;
1926 hw->put_num = 0;
1927 hw->run_count = 0;
1928 hw->not_run_ready = 0;
1929 hw->input_empty = 0;
1930 hw->peek_num = 0;
1931 hw->get_num = 0;
1932
1933 hw->pts_hit = hw->pts_missed = hw->pts_i_hit = hw->pts_i_missed = 0;
1934 hw->refs[0] = -1;
1935 hw->refs[1] = -1;
1936 hw->first_i_frame_ready = 0;
1937 hw->drop_frame_count = 0;
1938 hw->buffer_not_ready = 0;
1939 hw->init_flag = 0;
1940 hw->dec_result = DEC_RESULT_NONE;
1941 hw->timeout_cnt = 0;
1942
1943 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
1944 hw->vfbuf_use[i] = 0;
1945
1946 INIT_KFIFO(hw->display_q);
1947 INIT_KFIFO(hw->newframe_q);
1948
1949 for (i = 0; i < VF_POOL_SIZE; i++) {
1950 const struct vframe_s *vf = &hw->vfpool[i];
1951
1952 hw->vfpool[i].index = DECODE_BUFFER_NUM_MAX;
1953 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1954 }
1955 if (hw->mm_blk_handle) {
1956 decoder_bmmu_box_free(hw->mm_blk_handle);
1957 hw->mm_blk_handle = NULL;
1958 }
1959 hw->mm_blk_handle = decoder_bmmu_box_alloc_box(
1960 DRIVER_NAME,
1961 0,
1962 MAX_BMMU_BUFFER_NUM,
1963 4 + PAGE_SHIFT,
1964 CODEC_MM_FLAGS_CMA_CLEAR |
1965 CODEC_MM_FLAGS_FOR_VDECODER);
1966 INIT_WORK(&hw->work, vmpeg4_work);
1967
1968 init_waitqueue_head(&hw->wait_q);
1969}
1970
1971static s32 vmmpeg4_init(struct vdec_mpeg4_hw_s *hw)
1972{
1973 int trickmode_fffb = 0;
1974 int size = -1, fw_size = 0x1000 * 16;
1975 struct firmware_s *fw = NULL;
1976
1977 fw = vmalloc(sizeof(struct firmware_s) + fw_size);
1978 if (IS_ERR_OR_NULL(fw))
1979 return -ENOMEM;
1980
1981 if (hw->vmpeg4_amstream_dec_info.format ==
1982 VIDEO_DEC_FORMAT_MPEG4_5) {
1983 size = get_firmware_data(VIDEO_DEC_MPEG4_5_MULTI, fw->data);
1984 strncpy(fw->name, "mmpeg4_mc_5", sizeof(fw->name));
1985 } else if (hw->vmpeg4_amstream_dec_info.format ==
1986 VIDEO_DEC_FORMAT_H263) {
1987 size = get_firmware_data(VIDEO_DEC_H263_MULTI, fw->data);
1988 strncpy(fw->name, "mh263_mc", sizeof(fw->name));
1989 } else
1990 pr_err("unsupport mpeg4 sub format %d\n",
1991 hw->vmpeg4_amstream_dec_info.format);
1992 pr_info("mmpeg4 get fw %s, size %x\n", fw->name, size);
1993 if (size < 0) {
1994 pr_err("get firmware failed.");
1995 vfree(fw);
1996 return -1;
1997 }
1998
1999 fw->len = size;
2000 hw->fw = fw;
2001
2002 query_video_status(0, &trickmode_fffb);
2003
2004 pr_info("%s\n", __func__);
2005
2006 amvdec_enable();
2007
2008 init_timer(&hw->check_timer);
2009 hw->check_timer.data = (unsigned long)hw;
2010 hw->check_timer.function = check_timer_func;
2011 hw->check_timer.expires = jiffies + CHECK_INTERVAL;
2012 hw->stat |= STAT_TIMER_ARM;
2013 hw->eos = 0;
2014 WRITE_VREG(DECODE_STOP_POS, udebug_flag);
2015
2016 vmpeg4_local_init(hw);
2017 wmb();
2018
2019 return 0;
2020}
2021
2022static unsigned long run_ready(struct vdec_s *vdec, unsigned long mask)
2023{
2024 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2025
2026 if (hw->eos)
2027 return 0;
2028 if (vdec_stream_based(vdec) && (hw->init_flag == 0)
2029 && pre_decode_buf_level != 0) {
2030 u32 rp, wp, level;
2031
2032 rp = READ_PARSER_REG(PARSER_VIDEO_RP);
2033 wp = READ_PARSER_REG(PARSER_VIDEO_WP);
2034 if (wp < rp)
2035 level = vdec->input.size + wp - rp;
2036 else
2037 level = wp - rp;
2038 if (level < pre_decode_buf_level) {
2039 hw->not_run_ready++;
2040 return 0;
2041 }
2042 }
2043
2044 if (!is_enough_free_buffer(hw)) {
2045 hw->buffer_not_ready++;
2046 return 0;
2047 }
2048
2049 hw->not_run_ready = 0;
2050 hw->buffer_not_ready = 0;
2051 if (vdec->parallel_dec == 1)
2052 return (unsigned long)(CORE_MASK_VDEC_1);
2053 else
2054 return (unsigned long)(CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
2055}
2056
2057static unsigned char get_data_check_sum
2058 (struct vdec_mpeg4_hw_s *hw, int size)
2059{
2060 int jj;
2061 int sum = 0;
2062 u8 *data = NULL;
2063
2064 if (!hw->chunk->block->is_mapped)
2065 data = codec_mm_vmap(hw->chunk->block->start +
2066 hw->chunk->offset, size);
2067 else
2068 data = ((u8 *)hw->chunk->block->start_virt) +
2069 hw->chunk->offset;
2070
2071 for (jj = 0; jj < size; jj++)
2072 sum += data[jj];
2073
2074 if (!hw->chunk->block->is_mapped)
2075 codec_mm_unmap_phyaddr(data);
2076 return sum;
2077}
2078
2079static void run(struct vdec_s *vdec, unsigned long mask,
2080 void (*callback)(struct vdec_s *, void *), void *arg)
2081{
2082 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2083 int size = 0, ret = 0;
2084
2085 hw->run_count++;
2086 hw->vdec_cb_arg = arg;
2087 hw->vdec_cb = callback;
2088 vdec_reset_core(vdec);
2089
2090 if ((vdec_frame_based(vdec)) &&
2091 (hw->dec_result == DEC_RESULT_UNFINISH)) {
2092 vmpeg4_prepare_input(hw);
2093 size = hw->chunk_size;
2094 } else {
2095 size = vdec_prepare_input(vdec, &hw->chunk);
2096 if (size < 4) { /*less than start code size 00 00 01 xx*/
2097 hw->input_empty++;
2098 hw->dec_result = DEC_RESULT_AGAIN;
2099 vdec_schedule_work(&hw->work);
2100 return;
2101 }
2102 if ((vdec_frame_based(vdec)) &&
2103 (hw->chunk != NULL)) {
2104 hw->chunk_offset = hw->chunk->offset;
2105 hw->chunk_size = hw->chunk->size;
2106 hw->chunk_frame_count = 0;
2107 }
2108 }
2109 if (vdec_frame_based(vdec) &&
2110 (debug_enable & 0xc00)) {
2111 u8 *data = NULL;
2112
2113 if (!hw->chunk->block->is_mapped)
2114 data = codec_mm_vmap(hw->chunk->block->start +
2115 hw->chunk->offset, size);
2116 else
2117 data = ((u8 *)hw->chunk->block->start_virt) +
2118 hw->chunk->offset;
2119
2120 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS,
2121 "%s: size 0x%x sum 0x%x %02x %02x %02x %02x %02x %02x .. %02x %02x %02x %02x\n",
2122 __func__, size, get_data_check_sum(hw, size),
2123 data[0], data[1], data[2], data[3],
2124 data[4], data[5], data[size - 4],
2125 data[size - 3], data[size - 2],
2126 data[size - 1]);
2127
2128 if (debug_enable & PRINT_FRAMEBASE_DATA) {
2129 int jj;
2130
2131 for (jj = 0; jj < size; jj++) {
2132 if ((jj & 0xf) == 0)
2133 mmpeg4_debug_print(DECODE_ID(hw),
2134 PRINT_FRAMEBASE_DATA,
2135 "%06x:", jj);
2136 mmpeg4_debug_print(DECODE_ID(hw),
2137 PRINT_FRAMEBASE_DATA,
2138 "%02x ", data[jj]);
2139 if (((jj + 1) & 0xf) == 0)
2140 mmpeg4_debug_print(DECODE_ID(hw),
2141 PRINT_FRAMEBASE_DATA,
2142 "\n");
2143 }
2144 }
2145
2146 if (!hw->chunk->block->is_mapped)
2147 codec_mm_unmap_phyaddr(data);
2148 }
2149
2150 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
2151 "%s, size=%d, %x %x %x %x %x\n",
2152 __func__, size,
2153 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
2154 READ_VREG(VLD_MEM_VIFIFO_WP),
2155 READ_VREG(VLD_MEM_VIFIFO_RP),
2156 READ_PARSER_REG(PARSER_VIDEO_RP),
2157 READ_PARSER_REG(PARSER_VIDEO_WP));
2158
2159 hw->dec_result = DEC_RESULT_NONE;
2160 if (vdec->mc_loaded) {
2161 /*firmware have load before,
2162 and not changes to another.
2163 ignore reload.
2164 */
2165 } else {
2166 ret = amvdec_vdec_loadmc_buf_ex(VFORMAT_MPEG4,hw->fw->name, vdec,
2167 hw->fw->data, hw->fw->len);
2168 if (ret < 0) {
2169 pr_err("[%d] %s: the %s fw loading failed, err: %x\n", vdec->id,
2170 hw->fw->name, tee_enabled() ? "TEE" : "local", ret);
2171 hw->dec_result = DEC_RESULT_FORCE_EXIT;
2172 vdec_schedule_work(&hw->work);
2173 return;
2174 }
2175 vdec->mc_loaded = 1;
2176 vdec->mc_type = VFORMAT_MPEG4;
2177 }
2178 if (vmpeg4_hw_ctx_restore(hw) < 0) {
2179 hw->dec_result = DEC_RESULT_ERROR;
2180 mmpeg4_debug_print(DECODE_ID(hw), 0,
2181 "amvdec_mpeg4: error HW context restore\n");
2182 vdec_schedule_work(&hw->work);
2183 return;
2184 }
2185 if (vdec_frame_based(vdec)) {
2186 size = hw->chunk_size +
2187 (hw->chunk_offset & (VDEC_FIFO_ALIGN - 1));
2188 WRITE_VREG(VIFF_BIT_CNT, size * 8);
2189 }
2190 hw->input_empty = 0;
2191 hw->last_vld_level = 0;
2192 start_process_time(hw);
2193 vdec_enable_input(vdec);
2194 /* wmb before ISR is handled */
2195 wmb();
2196
2197 amvdec_start();
2198 hw->stat |= STAT_VDEC_RUN;
2199 hw->init_flag = 1;
2200 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
2201}
2202
2203static int vmpeg4_stop(struct vdec_mpeg4_hw_s *hw)
2204{
2205 cancel_work_sync(&hw->work);
2206
2207 if (hw->mm_blk_handle) {
2208 decoder_bmmu_box_free(hw->mm_blk_handle);
2209 hw->mm_blk_handle = NULL;
2210 }
2211
2212 if (hw->stat & STAT_TIMER_ARM) {
2213 del_timer_sync(&hw->check_timer);
2214 hw->stat &= ~STAT_TIMER_ARM;
2215 }
2216
2217 if (hw->fw) {
2218 vfree(hw->fw);
2219 hw->fw = NULL;
2220 }
2221 return 0;
2222}
2223static void reset(struct vdec_s *vdec)
2224{
2225 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2226
2227 pr_info("amvdec_mmpeg4: reset.\n");
2228
2229 vmpeg4_local_init(hw);
2230
2231 hw->ctx_valid = 0;
2232}
2233
2234static int ammvdec_mpeg4_probe(struct platform_device *pdev)
2235{
2236 struct vdec_s *pdata = *(struct vdec_s **)pdev->dev.platform_data;
2237 struct vdec_mpeg4_hw_s *hw = NULL;
2238
2239 if (pdata == NULL) {
2240 pr_err("%s memory resource undefined.\n", __func__);
2241 return -EFAULT;
2242 }
2243
2244 hw = vmalloc(sizeof(struct vdec_mpeg4_hw_s));
2245 if (hw == NULL) {
2246 pr_err("\namvdec_mpeg4 decoder driver alloc failed\n");
2247 return -ENOMEM;
2248 }
2249 memset(hw, 0, sizeof(struct vdec_mpeg4_hw_s));
2250
2251 /* the ctx from v4l2 driver. */
2252 hw->v4l2_ctx = pdata->private;
2253
2254 pdata->private = hw;
2255 pdata->dec_status = dec_status;
2256 /* pdata->set_trickmode = set_trickmode; */
2257 pdata->run_ready = run_ready;
2258 pdata->run = run;
2259 pdata->reset = reset;
2260 pdata->irq_handler = vmpeg4_isr;
2261 pdata->threaded_irq_handler = vmpeg4_isr_thread_fn;
2262 pdata->dump_state = vmpeg4_dump_state;
2263
2264 if (pdata->use_vfm_path)
2265 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2266 VFM_DEC_PROVIDER_NAME);
2267 else
2268 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2269 PROVIDER_NAME ".%02x", pdev->id & 0xff);
2270
2271 if (pdata->parallel_dec == 1) {
2272 int i;
2273 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
2274 hw->canvas_spec[i] = 0xffffff;
2275 }
2276
2277 vf_provider_init(&pdata->vframe_provider,
2278 pdata->vf_provider_name, &vf_provider_ops, pdata);
2279
2280 platform_set_drvdata(pdev, pdata);
2281 hw->platform_dev = pdev;
2282 hw->blkmode = pdata->canvas_mode;
2283
2284 if (pdata->sys_info) {
2285 hw->vmpeg4_amstream_dec_info = *pdata->sys_info;
2286 if ((hw->vmpeg4_amstream_dec_info.height != 0) &&
2287 (hw->vmpeg4_amstream_dec_info.width >
2288 (MAX_MPEG4_SUPPORT_SIZE/hw->vmpeg4_amstream_dec_info.height))) {
2289 pr_info("ammvdec_mpeg4: oversize, unsupport: %d*%d\n",
2290 hw->vmpeg4_amstream_dec_info.width,
2291 hw->vmpeg4_amstream_dec_info.height);
2292 pdata->dec_status = NULL;
2293 vfree((void *)hw);
2294 hw = NULL;
2295 return -EFAULT;
2296 }
2297 mmpeg4_debug_print(DECODE_ID(hw), 0,
2298 "sysinfo: %d x %d, rate: %d\n",
2299 hw->vmpeg4_amstream_dec_info.width,
2300 hw->vmpeg4_amstream_dec_info.height,
2301 hw->vmpeg4_amstream_dec_info.rate);
2302 hw->is_used_v4l = (((unsigned long)
2303 hw->vmpeg4_amstream_dec_info.param & 0x80) >> 7);
2304 }
2305
2306 if (vmmpeg4_init(hw) < 0) {
2307 pr_err("%s init failed.\n", __func__);
2308
2309 if (hw) {
2310 vfree((void *)hw);
2311 hw = NULL;
2312 }
2313 pdata->dec_status = NULL;
2314 return -ENODEV;
2315 }
2316 vdec_set_prepare_level(pdata, start_decode_buf_level);
2317
2318 if (pdata->parallel_dec == 1)
2319 vdec_core_request(pdata, CORE_MASK_VDEC_1);
2320 else {
2321 vdec_core_request(pdata, CORE_MASK_VDEC_1 | CORE_MASK_HEVC
2322 | CORE_MASK_COMBINE);
2323 }
2324
2325 mmpeg4_debug_print(DECODE_ID(hw), 0,
2326 "%s end.\n", __func__);
2327 return 0;
2328}
2329
2330static int ammvdec_mpeg4_remove(struct platform_device *pdev)
2331{
2332 struct vdec_mpeg4_hw_s *hw =
2333 (struct vdec_mpeg4_hw_s *)
2334 (((struct vdec_s *)(platform_get_drvdata(pdev)))->private);
2335 struct vdec_s *vdec = hw_to_vdec(hw);
2336 int i;
2337
2338 if (vdec->next_status == VDEC_STATUS_DISCONNECTED
2339 && (vdec->status == VDEC_STATUS_ACTIVE)) {
2340 mmpeg4_debug_print(DECODE_ID(hw), 0,
2341 "%s force exit %d\n", __func__, __LINE__);
2342 hw->dec_result = DEC_RESULT_FORCE_EXIT;
2343 vdec_schedule_work(&hw->work);
2344 wait_event_interruptible_timeout(hw->wait_q,
2345 (vdec->status == VDEC_STATUS_CONNECTED),
2346 msecs_to_jiffies(1000)); /* wait for work done */
2347 }
2348
2349 vmpeg4_stop(hw);
2350
2351 if (vdec->parallel_dec == 1)
2352 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1);
2353 else
2354 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
2355 vdec_set_status(hw_to_vdec(hw), VDEC_STATUS_DISCONNECTED);
2356
2357 if (vdec->parallel_dec == 1) {
2358 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
2359 vdec->free_canvas_ex(canvas_y(hw->canvas_spec[i]), vdec->id);
2360 vdec->free_canvas_ex(canvas_u(hw->canvas_spec[i]), vdec->id);
2361 }
2362 }
2363
2364 mmpeg4_debug_print(DECODE_ID(hw), 0, "%s\n", __func__);
2365 vfree((void *)hw);
2366 hw = NULL;
2367
2368 return 0;
2369}
2370
2371/****************************************/
2372#ifdef CONFIG_PM
2373static int mmpeg4_suspend(struct device *dev)
2374{
2375 amvdec_suspend(to_platform_device(dev), dev->power.power_state);
2376 return 0;
2377}
2378
2379static int mmpeg4_resume(struct device *dev)
2380{
2381 amvdec_resume(to_platform_device(dev));
2382 return 0;
2383}
2384
2385static const struct dev_pm_ops mmpeg4_pm_ops = {
2386 SET_SYSTEM_SLEEP_PM_OPS(mmpeg4_suspend, mmpeg4_resume)
2387};
2388#endif
2389
2390static struct platform_driver ammvdec_mpeg4_driver = {
2391 .probe = ammvdec_mpeg4_probe,
2392 .remove = ammvdec_mpeg4_remove,
2393 .driver = {
2394 .name = DRIVER_NAME,
2395#ifdef CONFIG_PM
2396 .pm = &mmpeg4_pm_ops,
2397#endif
2398 }
2399};
2400
2401static struct codec_profile_t amvdec_mpeg4_profile = {
2402 .name = "mmpeg4",
2403 .profile = ""
2404};
2405
2406static int __init ammvdec_mpeg4_driver_init_module(void)
2407{
2408 pr_info("%s \n", __func__);
2409
2410 if (platform_driver_register(&ammvdec_mpeg4_driver)) {
2411 pr_err("failed to register ammvdec_mpeg4 driver\n");
2412 return -ENODEV;
2413 }
2414 vcodec_profile_register(&amvdec_mpeg4_profile);
2415 return 0;
2416}
2417
2418static void __exit ammvdec_mpeg4_driver_remove_module(void)
2419{
2420 pr_info("ammvdec_mpeg4 module remove.\n");
2421
2422 platform_driver_unregister(&ammvdec_mpeg4_driver);
2423}
2424
2425/****************************************/
2426module_param(debug_enable, uint, 0664);
2427MODULE_PARM_DESC(debug_enable,
2428 "\n ammvdec_mpeg4 debug enable\n");
2429
2430module_param(frmbase_cont_bitlevel, uint, 0664);
2431MODULE_PARM_DESC(frmbase_cont_bitlevel, "\nfrmbase_cont_bitlevel\n");
2432
2433module_param(radr, uint, 0664);
2434MODULE_PARM_DESC(radr, "\nradr\n");
2435
2436module_param(rval, uint, 0664);
2437MODULE_PARM_DESC(rval, "\nrval\n");
2438
2439module_param(decode_timeout_val, uint, 0664);
2440MODULE_PARM_DESC(decode_timeout_val, "\n ammvdec_mpeg4 decode_timeout_val\n");
2441
2442module_param_array(max_process_time, uint, &max_decode_instance_num, 0664);
2443
2444module_param(pre_decode_buf_level, int, 0664);
2445MODULE_PARM_DESC(pre_decode_buf_level,
2446 "\n ammvdec_mpeg4 pre_decode_buf_level\n");
2447
2448module_param(start_decode_buf_level, int, 0664);
2449MODULE_PARM_DESC(start_decode_buf_level,
2450 "\n ammvdec_mpeg4 start_decode_buf_level\n");
2451
2452module_param(udebug_flag, uint, 0664);
2453MODULE_PARM_DESC(udebug_flag, "\n ammvdec_mpeg4 udebug_flag\n");
2454
2455module_param(without_display_mode, uint, 0664);
2456MODULE_PARM_DESC(without_display_mode, "\n ammvdec_mpeg4 without_display_mode\n");
2457
2458module_init(ammvdec_mpeg4_driver_init_module);
2459module_exit(ammvdec_mpeg4_driver_remove_module);
2460
2461MODULE_DESCRIPTION("AMLOGIC MPEG4 Video Decoder Driver");
2462MODULE_LICENSE("GPL");
2463MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>");
2464
2465
generated by cgit at 2024-05-17 08:37:51 (GMT)