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path: root/drivers/frame_provider/decoder/mpeg4/vmpeg4_multi.c (plain)
blob: d920436b7fb2fcb252a35ed48544958ea3f89609
1/*
2 * drivers/amlogic/amports/vmpeg4.c
3 *
4 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/types.h>
21#include <linux/errno.h>
22#include <linux/interrupt.h>
23#include <linux/timer.h>
24#include <linux/kfifo.h>
25#include <linux/platform_device.h>
26#include <linux/dma-mapping.h>
27#include <linux/amlogic/media/utils/amstream.h>
28#include <linux/amlogic/media/frame_sync/ptsserv.h>
29
30#include <linux/amlogic/media/vfm/vframe.h>
31#include <linux/amlogic/media/vfm/vframe_provider.h>
32#include <linux/amlogic/media/vfm/vframe_receiver.h>
33#include <linux/amlogic/media/canvas/canvas.h>
34#include <linux/amlogic/media/codec_mm/codec_mm.h>
35#include <linux/amlogic/tee.h>
36#include <linux/amlogic/media/utils/vdec_reg.h>
37#include <linux/amlogic/media/registers/register.h>
38#include "../../../stream_input/amports/amports_priv.h"
39
40#include "../utils/amvdec.h"
41#include "../utils/vdec_input.h"
42#include "../utils/vdec.h"
43#include "../utils/firmware.h"
44#include "../utils/decoder_mmu_box.h"
45#include "../utils/decoder_bmmu_box.h"
46#include <linux/amlogic/media/codec_mm/configs.h>
47#include "../utils/firmware.h"
48#include "../utils/vdec_v4l2_buffer_ops.h"
49
50#define DRIVER_NAME "ammvdec_mpeg4"
51#define MODULE_NAME "ammvdec_mpeg4"
52
53#define MEM_NAME "codec_mmpeg4"
54
55#define DEBUG_PTS
56
57#define NV21
58#define I_PICTURE 0
59#define P_PICTURE 1
60#define B_PICTURE 2
61#define GET_PIC_TYPE(type) ("IPB####"[type&0x3])
62
63#define ORI_BUFFER_START_ADDR 0x01000000
64#define DEFAULT_MEM_SIZE (32*SZ_1M)
65
66#define INTERLACE_FLAG 0x80
67#define TOP_FIELD_FIRST_FLAG 0x40
68
69/* protocol registers */
70#define MREG_REF0 AV_SCRATCH_1
71#define MREG_REF1 AV_SCRATCH_2
72#define MP4_PIC_RATIO AV_SCRATCH_5
73#define MP4_RATE AV_SCRATCH_3
74#define MP4_ERR_COUNT AV_SCRATCH_6
75#define MP4_PIC_WH AV_SCRATCH_7
76#define MREG_INPUT AV_SCRATCH_8
77#define MREG_BUFFEROUT AV_SCRATCH_9
78#define MP4_NOT_CODED_CNT AV_SCRATCH_A
79#define MP4_VOP_TIME_INC AV_SCRATCH_B
80#define MP4_OFFSET_REG AV_SCRATCH_C
81#define MP4_SYS_RATE AV_SCRATCH_E
82#define MEM_OFFSET_REG AV_SCRATCH_F
83
84#define PARC_FORBIDDEN 0
85#define PARC_SQUARE 1
86#define PARC_CIF 2
87#define PARC_10_11 3
88#define PARC_16_11 4
89#define PARC_40_33 5
90#define PARC_RESERVED 6
91/* values between 6 and 14 are reserved */
92#define PARC_EXTENDED 15
93
94#define VF_POOL_SIZE 16
95#define DECODE_BUFFER_NUM_MAX 8
96#define PUT_INTERVAL (HZ/100)
97#define MAX_BMMU_BUFFER_NUM (DECODE_BUFFER_NUM_MAX + 1)
98#define WORKSPACE_SIZE (12*SZ_64K)
99static u32 buf_size = 32 * 1024 * 1024;
100
101#define CTX_LMEM_SWAP_OFFSET 0
102#define CTX_QUANT_MATRIX_OFFSET 0x800
103/* dcac buffer must align at 4k boundary */
104#define CTX_DCAC_BUF_OFFSET 0x1000
105#define CTX_DECBUF_OFFSET (0x0c0000 + 0x1000)
106
107#define RATE_DETECT_COUNT 5
108#define DURATION_UNIT 96000
109#define PTS_UNIT 90000
110#define CHECK_INTERVAL (HZ/100)
111
112#define DUR2PTS(x) ((x) - ((x) >> 4))
113
114/* 96000/(60fps* 2field) = 800, 96000/10fps = 9600 */
115#define MPEG4_VALID_DUR(x) ((x < 9600) && (x > 799))
116
117#define MAX_MPEG4_SUPPORT_SIZE (1920*1088)
118
119#define DEC_RESULT_NONE 0
120#define DEC_RESULT_DONE 1
121#define DEC_RESULT_AGAIN 2
122#define DEC_RESULT_ERROR 3
123#define DEC_RESULT_FORCE_EXIT 4
124#define DEC_RESULT_EOS 5
125#define DEC_RESULT_UNFINISH 6
126
127#define DEC_DECODE_TIMEOUT 0x21
128#define DECODE_ID(hw) (hw_to_vdec(hw)->id)
129#define DECODE_STOP_POS AV_SCRATCH_K
130static u32 udebug_flag;
131
132static struct vframe_s *vmpeg_vf_peek(void *);
133static struct vframe_s *vmpeg_vf_get(void *);
134static void vmpeg_vf_put(struct vframe_s *, void *);
135static int vmpeg_vf_states(struct vframe_states *states, void *);
136static int vmpeg_event_cb(int type, void *data, void *private_data);
137static int pre_decode_buf_level = 0x800;
138static int debug_enable;
139static unsigned int radr;
140static unsigned int rval;
141/* 0x40bit = 8byte */
142static unsigned int frmbase_cont_bitlevel = 0x40;
143
144#define VMPEG4_DEV_NUM 9
145static unsigned int max_decode_instance_num = VMPEG4_DEV_NUM;
146static unsigned int max_process_time[VMPEG4_DEV_NUM];
147static unsigned int decode_timeout_val = 100;
148
149static u32 without_display_mode;
150
151#undef pr_info
152#define pr_info printk
153unsigned int mpeg4_debug_mask = 0xff;
154
155#define PRINT_FLAG_ERROR 0x0
156#define PRINT_FLAG_RUN_FLOW 0X0001
157#define PRINT_FLAG_TIMEINFO 0x0002
158#define PRINT_FLAG_UCODE_DETAIL 0x0004
159#define PRINT_FLAG_VLD_DETAIL 0x0008
160#define PRINT_FLAG_DEC_DETAIL 0x0010
161#define PRINT_FLAG_BUFFER_DETAIL 0x0020
162#define PRINT_FLAG_RESTORE 0x0040
163#define PRINT_FRAME_NUM 0x0080
164#define PRINT_FLAG_FORCE_DONE 0x0100
165#define PRINT_FLAG_COUNTER 0X0200
166#define PRINT_FRAMEBASE_DATA 0x0400
167#define PRINT_FLAG_VDEC_STATUS 0x0800
168#define PRINT_FLAG_TIMEOUT_STATUS 0x1000
169#define PRINT_FLAG_V4L_DETAIL 0x8000
170
171int mmpeg4_debug_print(int index, int debug_flag, const char *fmt, ...)
172{
173 if (((debug_enable & debug_flag) &&
174 ((1 << index) & mpeg4_debug_mask))
175 || (debug_flag == PRINT_FLAG_ERROR)) {
176 unsigned char buf[512];
177 int len = 0;
178 va_list args;
179 va_start(args, fmt);
180 len = sprintf(buf, "%d: ", index);
181 vsnprintf(buf + len, 512-len, fmt, args);
182 pr_info("%s", buf);
183 va_end(args);
184 }
185 return 0;
186}
187
188struct pic_info_t {
189 int index;
190 u32 pic_type;
191 u32 pic_info;
192 u32 pts;
193 u64 pts64;
194 bool pts_valid;
195 u32 duration;
196 u32 repeat_cnt;
197 ulong v4l_ref_buf_addr;
198};
199
200struct vdec_mpeg4_hw_s {
201 spinlock_t lock;
202 struct platform_device *platform_dev;
203 /* struct device *cma_dev; */
204
205 DECLARE_KFIFO(newframe_q, struct vframe_s *, VF_POOL_SIZE);
206 DECLARE_KFIFO(display_q, struct vframe_s *, VF_POOL_SIZE);
207 struct vframe_s vfpool[VF_POOL_SIZE];
208
209 s32 vfbuf_use[DECODE_BUFFER_NUM_MAX];
210 u32 frame_width;
211 u32 frame_height;
212 u32 frame_dur;
213 u32 frame_prog;
214
215 u32 ctx_valid;
216 u32 reg_vcop_ctrl_reg;
217 u32 reg_pic_head_info;
218 u32 reg_mpeg1_2_reg;
219 u32 reg_slice_qp;
220 u32 reg_mp4_pic_wh;
221 u32 reg_mp4_rate;
222 u32 reg_mb_info;
223 u32 reg_dc_ac_ctrl;
224 u32 reg_iqidct_control;
225 u32 reg_resync_marker_length;
226 u32 reg_rv_ai_mb_count;
227 struct timer_list check_timer;
228 u32 decode_timeout_count;
229 u32 timeout_cnt;
230 unsigned long int start_process_time;
231
232 u32 last_vld_level;
233 u8 init_flag;
234 u32 eos;
235 void *mm_blk_handle;
236
237 struct vframe_chunk_s *chunk;
238 u32 chunk_offset;
239 u32 chunk_size;
240 u32 chunk_frame_count;
241 u32 stat;
242 unsigned long buf_start;
243 u32 buf_size;
244 /*
245 unsigned long cma_alloc_addr;
246 int cma_alloc_count;
247 */
248 u32 vmpeg4_ratio;
249 u64 vmpeg4_ratio64;
250 u32 rate_detect;
251 u32 vmpeg4_rotation;
252 u32 total_frame;
253 u32 last_vop_time_inc;
254 u32 last_duration;
255 u32 last_anch_pts;
256 u32 vop_time_inc_since_last_anch;
257 u32 frame_num_since_last_anch;
258 u64 last_anch_pts_us64;
259
260 u32 last_pts;
261 u64 last_pts64;
262 u32 pts_hit;
263 u32 pts_missed;
264 u32 pts_i_hit;
265 u32 pts_i_missed;
266 struct pic_info_t pic[DECODE_BUFFER_NUM_MAX];
267 u32 canvas_spec[DECODE_BUFFER_NUM_MAX];
268#ifdef NV21
269 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][2];
270#else
271 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][3];
272#endif
273 struct dec_sysinfo vmpeg4_amstream_dec_info;
274
275 s32 refs[2];
276 int dec_result;
277 struct work_struct work;
278
279 void (*vdec_cb)(struct vdec_s *, void *);
280 void *vdec_cb_arg;
281 u32 frame_num;
282 u32 put_num;
283 u32 sys_mp4_rate;
284 u32 run_count;
285 u32 not_run_ready;
286 u32 buffer_not_ready;
287 u32 input_empty;
288 u32 peek_num;
289 u32 get_num;
290 u32 first_i_frame_ready;
291 u32 drop_frame_count;
292 u32 unstable_pts;
293 u32 last_dec_pts;
294
295 struct firmware_s *fw;
296 u32 blkmode;
297 wait_queue_head_t wait_q;
298 bool is_used_v4l;
299 void *v4l2_ctx;
300 bool v4l_params_parsed;
301};
302static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw);
303static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw);
304static unsigned char
305 get_data_check_sum(struct vdec_mpeg4_hw_s *hw, int size);
306
307#define PROVIDER_NAME "vdec.mpeg4"
308
309/*
310 *int query_video_status(int type, int *value);
311 */
312static const struct vframe_operations_s vf_provider_ops = {
313 .peek = vmpeg_vf_peek,
314 .get = vmpeg_vf_get,
315 .put = vmpeg_vf_put,
316 .event_cb = vmpeg_event_cb,
317 .vf_states = vmpeg_vf_states,
318};
319
320static unsigned char aspect_ratio_table[16] = {
321 PARC_FORBIDDEN,
322 PARC_SQUARE,
323 PARC_CIF,
324 PARC_10_11,
325 PARC_16_11,
326 PARC_40_33,
327 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
328 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
329 PARC_RESERVED, PARC_EXTENDED
330};
331
332static void reset_process_time(struct vdec_mpeg4_hw_s *hw);
333
334static int vmpeg4_v4l_alloc_buff_config_canvas(struct vdec_mpeg4_hw_s *hw, int i)
335{
336 int ret;
337 u32 canvas;
338 ulong decbuf_start = 0;
339 int decbuf_y_size = 0;
340 u32 canvas_width = 0, canvas_height = 0;
341 struct vdec_s *vdec = hw_to_vdec(hw);
342 struct vdec_v4l2_buffer *fb = NULL;
343
344 if (hw->pic[i].v4l_ref_buf_addr)
345 return 0;
346
347 ret = vdec_v4l_get_buffer(hw->v4l2_ctx, &fb);
348 if (ret < 0) {
349 mmpeg4_debug_print(DECODE_ID(hw), 0,
350 "[%d] get fb fail.\n",
351 ((struct aml_vcodec_ctx *)
352 (hw->v4l2_ctx))->id);
353 return ret;
354 }
355
356 hw->pic[i].v4l_ref_buf_addr = (ulong)fb;
357 if (fb->num_planes == 1) {
358 decbuf_start = fb->m.mem[0].addr;
359 decbuf_y_size = fb->m.mem[0].offset;
360 canvas_width = ALIGN(hw->frame_width, 64);
361 canvas_height = ALIGN(hw->frame_height, 32);
362 fb->m.mem[0].bytes_used = fb->m.mem[0].size;
363 } else if (fb->num_planes == 2) {
364 decbuf_start = fb->m.mem[0].addr;
365 decbuf_y_size = fb->m.mem[0].size;
366 canvas_width = ALIGN(hw->frame_width, 64);
367 canvas_height = ALIGN(hw->frame_height, 32);
368 fb->m.mem[0].bytes_used = decbuf_y_size;
369 fb->m.mem[1].bytes_used = decbuf_y_size << 1;
370 }
371
372 mmpeg4_debug_print(DECODE_ID(hw), 0, "[%d] %s(), v4l ref buf addr: 0x%x\n",
373 ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id, __func__, fb);
374
375 if (vdec->parallel_dec == 1) {
376 u32 tmp;
377 if (canvas_y(hw->canvas_spec[i]) == 0xff) {
378 tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
379 hw->canvas_spec[i] &= ~0xff;
380 hw->canvas_spec[i] |= tmp;
381 }
382 if (canvas_u(hw->canvas_spec[i]) == 0xff) {
383 tmp = vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
384 hw->canvas_spec[i] &= ~(0xffff << 8);
385 hw->canvas_spec[i] |= tmp << 8;
386 hw->canvas_spec[i] |= tmp << 16;
387 }
388 canvas = hw->canvas_spec[i];
389 } else {
390 canvas = vdec->get_canvas(i, 2);
391 hw->canvas_spec[i] = canvas;
392 }
393
394 hw->canvas_config[i][0].phy_addr = decbuf_start;
395 hw->canvas_config[i][0].width = canvas_width;
396 hw->canvas_config[i][0].height = canvas_height;
397 hw->canvas_config[i][0].block_mode = hw->blkmode;
398 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
399 hw->canvas_config[i][0].endian = 7;
400 else
401 hw->canvas_config[i][0].endian = 0;
402 canvas_config_config(canvas_y(canvas),
403 &hw->canvas_config[i][0]);
404
405 hw->canvas_config[i][1].phy_addr =
406 decbuf_start + decbuf_y_size;
407 hw->canvas_config[i][1].width = canvas_width;
408 hw->canvas_config[i][1].height = (canvas_height >> 1);
409 hw->canvas_config[i][1].block_mode = hw->blkmode;
410 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
411 hw->canvas_config[i][1].endian = 7;
412 else
413 hw->canvas_config[i][1].endian = 0;
414 canvas_config_config(canvas_u(canvas),
415 &hw->canvas_config[i][1]);
416
417 return 0;
418}
419
420static bool is_enough_free_buffer(struct vdec_mpeg4_hw_s *hw)
421{
422 int i;
423
424 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
425 if (hw->vfbuf_use[i] == 0)
426 break;
427 }
428
429 return i == DECODE_BUFFER_NUM_MAX ? false : true;
430}
431
432static int find_free_buffer(struct vdec_mpeg4_hw_s *hw)
433{
434 int i;
435
436 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
437 if (hw->vfbuf_use[i] == 0)
438 break;
439 }
440
441 if (i == DECODE_BUFFER_NUM_MAX)
442 return -1;
443
444 if (hw->is_used_v4l)
445 if (vmpeg4_v4l_alloc_buff_config_canvas(hw, i))
446 return -1;
447
448 return i;
449}
450
451static int spec_to_index(struct vdec_mpeg4_hw_s *hw, u32 spec)
452{
453 int i;
454
455 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
456 if (hw->canvas_spec[i] == spec)
457 return i;
458 }
459
460 return -1;
461}
462
463static void set_frame_info(struct vdec_mpeg4_hw_s *hw, struct vframe_s *vf,
464 int buffer_index)
465{
466 int ar = 0;
467 unsigned int num = 0;
468 unsigned int den = 0;
469 unsigned int pixel_ratio = READ_VREG(MP4_PIC_RATIO);
470
471 if (hw->vmpeg4_ratio64 != 0) {
472 num = hw->vmpeg4_ratio64>>32;
473 den = hw->vmpeg4_ratio64 & 0xffffffff;
474 } else {
475 num = hw->vmpeg4_ratio>>16;
476 den = hw->vmpeg4_ratio & 0xffff;
477
478 }
479 if ((num == 0) || (den == 0)) {
480 num = 1;
481 den = 1;
482 }
483
484 if (hw->vmpeg4_ratio == 0) {
485 vf->ratio_control |= (0x90 << DISP_RATIO_ASPECT_RATIO_BIT);
486 /* always stretch to 16:9 */
487 } else if (pixel_ratio > 0x0f) {
488 num = (pixel_ratio >> 8) *
489 hw->frame_width * num;
490 ar = div_u64((pixel_ratio & 0xff) *
491 hw->frame_height * den * 0x100ULL +
492 (num >> 1), num);
493 } else {
494 switch (aspect_ratio_table[pixel_ratio]) {
495 case 0:
496 num = hw->frame_width * num;
497 ar = (hw->frame_height * den *
498 0x100 + (num >> 1)) / num;
499 break;
500 case 1:
501 num = vf->width * num;
502 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
503 break;
504 case 2:
505 num = (vf->width * 12) * num;
506 ar = (vf->height * den * 0x100 * 11 +
507 ((num) >> 1)) / num;
508 break;
509 case 3:
510 num = (vf->width * 10) * num;
511 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
512 num;
513 break;
514 case 4:
515 num = (vf->width * 16) * num;
516 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
517 num;
518 break;
519 case 5:
520 num = (vf->width * 40) * num;
521 ar = (vf->height * den * 0x100 * 33 + (num >> 1)) /
522 num;
523 break;
524 default:
525 num = vf->width * num;
526 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
527 break;
528 }
529 }
530
531 ar = min(ar, DISP_RATIO_ASPECT_RATIO_MAX);
532
533 vf->signal_type = 0;
534 vf->type_original = vf->type;
535 vf->ratio_control = (ar << DISP_RATIO_ASPECT_RATIO_BIT);
536 vf->canvas0Addr = vf->canvas1Addr = -1;
537#ifdef NV21
538 vf->plane_num = 2;
539#else
540 vf->plane_num = 3;
541#endif
542 vf->canvas0_config[0] = hw->canvas_config[buffer_index][0];
543 vf->canvas0_config[1] = hw->canvas_config[buffer_index][1];
544#ifndef NV21
545 vf->canvas0_config[2] = hw->canvas_config[buffer_index][2];
546#endif
547 vf->canvas1_config[0] = hw->canvas_config[buffer_index][0];
548 vf->canvas1_config[1] = hw->canvas_config[buffer_index][1];
549#ifndef NV21
550 vf->canvas1_config[2] = hw->canvas_config[buffer_index][2];
551#endif
552}
553
554static inline void vmpeg4_save_hw_context(struct vdec_mpeg4_hw_s *hw)
555{
556 hw->reg_mpeg1_2_reg = READ_VREG(MPEG1_2_REG);
557 hw->reg_vcop_ctrl_reg = READ_VREG(VCOP_CTRL_REG);
558 hw->reg_pic_head_info = READ_VREG(PIC_HEAD_INFO);
559 hw->reg_slice_qp = READ_VREG(SLICE_QP);
560 hw->reg_mp4_pic_wh = READ_VREG(MP4_PIC_WH);
561 hw->reg_mp4_rate = READ_VREG(MP4_RATE);
562 hw->reg_mb_info = READ_VREG(MB_INFO);
563 hw->reg_dc_ac_ctrl = READ_VREG(DC_AC_CTRL);
564 hw->reg_iqidct_control = READ_VREG(IQIDCT_CONTROL);
565 hw->reg_resync_marker_length = READ_VREG(RESYNC_MARKER_LENGTH);
566 hw->reg_rv_ai_mb_count = READ_VREG(RV_AI_MB_COUNT);
567}
568
569static int update_ref(struct vdec_mpeg4_hw_s *hw, int index)
570{
571 hw->vfbuf_use[index]++;
572
573 if (hw->refs[1] == -1) {
574 hw->refs[1] = index;
575 index = -1;
576 } else if (hw->refs[0] == -1) {
577 hw->refs[0] = hw->refs[1];
578 hw->refs[1] = index;
579 index = hw->refs[0];
580 } else {
581 hw->vfbuf_use[hw->refs[0]]--;
582 hw->refs[0] = hw->refs[1];
583 hw->refs[1] = index;
584 index = hw->refs[0];
585 }
586
587 return index;
588}
589
590static int prepare_display_buf(struct vdec_mpeg4_hw_s * hw,
591 struct pic_info_t *pic)
592{
593 struct vframe_s *vf = NULL;
594 struct vdec_s *vdec = hw_to_vdec(hw);
595 int index = pic->index;
596
597 if (pic->pic_info & INTERLACE_FLAG) {
598 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
599 mmpeg4_debug_print(DECODE_ID(hw), 0,
600 "fatal error, no available buffer slot.");
601 return -1;
602 }
603
604 if (hw->is_used_v4l) {
605 vf->v4l_mem_handle
606 = hw->pic[index].v4l_ref_buf_addr;
607 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL,
608 "[%d] %s(), v4l mem handle: 0x%lx\n",
609 ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id,
610 __func__, vf->v4l_mem_handle);
611 }
612
613 vf->index = pic->index;
614 vf->width = hw->frame_width;
615 vf->height = hw->frame_height;
616 vf->bufWidth = 1920;
617 vf->flag = 0;
618 vf->orientation = hw->vmpeg4_rotation;
619 vf->pts = pic->pts;
620 vf->pts_us64 = pic->pts64;
621 vf->duration = pic->duration >> 1;
622 vf->duration_pulldown = 0;
623 vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ?
624 VIDTYPE_INTERLACE_TOP : VIDTYPE_INTERLACE_BOTTOM;
625#ifdef NV21
626 vf->type |= VIDTYPE_VIU_NV21;
627#endif
628 set_frame_info(hw, vf, pic->index);
629
630 hw->vfbuf_use[pic->index]++;
631 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
632 "field0: pts %d, pts64 %lld, w %d, h %d, dur %d\n",
633 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
634
635 if ((hw->first_i_frame_ready == 0)
636 && (pic->pic_type != I_PICTURE)) {
637 hw->drop_frame_count++;
638 hw->vfbuf_use[index]--;
639 kfifo_put(&hw->newframe_q,
640 (const struct vframe_s *)vf);
641 return 0;
642 } else {
643 vf->mem_handle =
644 decoder_bmmu_box_get_mem_handle(
645 hw->mm_blk_handle, index);
646 kfifo_put(&hw->display_q,
647 (const struct vframe_s *)vf);
648 ATRACE_COUNTER(MODULE_NAME, vf->pts);
649 vdec->vdec_fps_detec(vdec->id);
650 hw->frame_num++;
651 if (without_display_mode == 0) {
652 vf_notify_receiver(vdec->vf_provider_name,
653 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
654 } else
655 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
656 }
657
658 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
659 mmpeg4_debug_print(DECODE_ID(hw), 0,
660 "error, no available buf.\n");
661 hw->dec_result = DEC_RESULT_ERROR;
662 return -1;
663 }
664
665 vf->index = pic->index;
666 vf->width = hw->frame_width;
667 vf->height = hw->frame_height;
668 vf->bufWidth = 1920;
669 vf->flag = 0;
670 vf->orientation = hw->vmpeg4_rotation;
671 vf->pts = 0;
672 vf->pts_us64 = 0;
673 vf->duration = pic->duration >> 1;
674 vf->duration_pulldown = 0;
675 vf->type = (pic->pic_info & TOP_FIELD_FIRST_FLAG) ?
676 VIDTYPE_INTERLACE_BOTTOM : VIDTYPE_INTERLACE_TOP;
677#ifdef NV21
678 vf->type |= VIDTYPE_VIU_NV21;
679#endif
680 set_frame_info(hw, vf, pic->index);
681
682 hw->vfbuf_use[pic->index]++;
683 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
684 "filed1: pts %d, pts64 %lld, w %d, h %d, dur: %d\n",
685 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
686 if ((hw->first_i_frame_ready == 0) &&
687 (pic->pic_type != I_PICTURE)) {
688 hw->drop_frame_count++;
689 hw->vfbuf_use[index]--;
690 kfifo_put(&hw->newframe_q,
691 (const struct vframe_s *)vf);
692 } else {
693 vf->mem_handle =
694 decoder_bmmu_box_get_mem_handle(
695 hw->mm_blk_handle, index);
696 kfifo_put(&hw->display_q,
697 (const struct vframe_s *)vf);
698 ATRACE_COUNTER(MODULE_NAME, vf->pts);
699 vdec->vdec_fps_detec(vdec->id);
700 decoder_do_frame_check(vdec, vf);
701 hw->frame_num++;
702 if (without_display_mode == 0) {
703 vf_notify_receiver(vdec->vf_provider_name,
704 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
705 } else
706 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
707 }
708 } else {
709 /* progressive */
710 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
711 mmpeg4_debug_print(DECODE_ID(hw), 0,
712 "error, no available buf\n");
713 hw->dec_result = DEC_RESULT_ERROR;
714 return -1;
715 }
716
717 if (hw->is_used_v4l) {
718 vf->v4l_mem_handle
719 = hw->pic[index].v4l_ref_buf_addr;
720 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_V4L_DETAIL,
721 "[%d] %s(), v4l mem handle: 0x%lx\n",
722 ((struct aml_vcodec_ctx *)(hw->v4l2_ctx))->id,
723 __func__, vf->v4l_mem_handle);
724 }
725
726 vf->index = index;
727 vf->width = hw->frame_width;
728 vf->height = hw->frame_height;
729 vf->bufWidth = 1920;
730 vf->flag = 0;
731 vf->orientation = hw->vmpeg4_rotation;
732 vf->pts = pic->pts;
733 vf->pts_us64 = pic->pts64;
734 vf->duration = pic->duration;
735 vf->duration_pulldown = pic->repeat_cnt *
736 pic->duration;
737#ifdef NV21
738 vf->type = VIDTYPE_PROGRESSIVE |
739 VIDTYPE_VIU_FIELD | VIDTYPE_VIU_NV21;
740#else
741 vf->type = VIDTYPE_PROGRESSIVE |
742 VIDTYPE_VIU_FIELD;
743#endif
744 set_frame_info(hw, vf, index);
745
746 hw->vfbuf_use[index]++;
747 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
748 "prog: pts %d, pts64 %lld, w %d, h %d, dur %d\n",
749 vf->pts, vf->pts_us64, vf->width, vf->height, vf->duration);
750
751 if ((hw->first_i_frame_ready == 0) &&
752 (pic->pic_type != I_PICTURE)) {
753 hw->drop_frame_count++;
754 hw->vfbuf_use[index]--;
755 kfifo_put(&hw->newframe_q,
756 (const struct vframe_s *)vf);
757 } else {
758 vf->mem_handle =
759 decoder_bmmu_box_get_mem_handle(
760 hw->mm_blk_handle, index);
761 kfifo_put(&hw->display_q,
762 (const struct vframe_s *)vf);
763 ATRACE_COUNTER(MODULE_NAME, vf->pts);
764 vdec->vdec_fps_detec(vdec->id);
765 decoder_do_frame_check(vdec, vf);
766 hw->frame_num++;
767
768 if (without_display_mode == 0) {
769 vf_notify_receiver(vdec->vf_provider_name,
770 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
771 } else
772 vmpeg_vf_put(vmpeg_vf_get(vdec), vdec);
773 }
774
775 }
776 return 0;
777}
778
779static void vmpeg4_prepare_input(struct vdec_mpeg4_hw_s *hw)
780{
781 struct vdec_s *vdec = hw_to_vdec(hw);
782 struct vdec_input_s *input = &vdec->input;
783 struct vframe_block_list_s *block = NULL;
784 struct vframe_chunk_s *chunk = hw->chunk;
785 int dummy;
786
787 if (chunk == NULL)
788 return;
789
790 /* full reset to HW input */
791 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0);
792
793 /* reset VLD fifo for all vdec */
794 WRITE_VREG(DOS_SW_RESET0, (1<<5) | (1<<4) | (1<<3));
795 WRITE_VREG(DOS_SW_RESET0, 0);
796
797 dummy = READ_RESET_REG(RESET0_REGISTER);
798 WRITE_VREG(POWER_CTL_VLD, 1 << 4);
799
800 /*
801 *setup HW decoder input buffer (VLD context)
802 * based on input->type and input->target
803 */
804 if (input_frame_based(input)) {
805 block = chunk->block;
806
807 WRITE_VREG(VLD_MEM_VIFIFO_START_PTR, block->start);
808 WRITE_VREG(VLD_MEM_VIFIFO_END_PTR, block->start +
809 block->size - 8);
810 WRITE_VREG(VLD_MEM_VIFIFO_CURR_PTR,
811 round_down(block->start + hw->chunk_offset,
812 VDEC_FIFO_ALIGN));
813
814 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 1);
815 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL, 0);
816
817 /* set to manual mode */
818 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2);
819 WRITE_VREG(VLD_MEM_VIFIFO_RP,
820 round_down(block->start + hw->chunk_offset,
821 VDEC_FIFO_ALIGN));
822 dummy = hw->chunk_offset + hw->chunk_size +
823 VLD_PADDING_SIZE;
824 if (dummy >= block->size)
825 dummy -= block->size;
826 WRITE_VREG(VLD_MEM_VIFIFO_WP,
827 round_down(block->start + dummy,
828 VDEC_FIFO_ALIGN));
829
830 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 3);
831 WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, 2);
832
833 WRITE_VREG(VLD_MEM_VIFIFO_CONTROL,
834 (0x11 << 16) | (1<<10) | (7<<3));
835
836 }
837}
838
839static irqreturn_t vmpeg4_isr_thread_fn(struct vdec_s *vdec, int irq)
840{
841 u32 reg;
842 u32 picture_type;
843 int index;
844 u32 pts, offset = 0;
845 u64 pts_us64 = 0;
846 u32 frame_size, dec_w, dec_h;
847 u32 time_increment_resolution, fixed_vop_rate, vop_time_inc;
848 u32 repeat_cnt, duration = 3200;
849 struct pic_info_t *dec_pic, *disp_pic;
850 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)(vdec->private);
851
852 if (hw->eos)
853 return IRQ_HANDLED;
854
855 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
856 if (READ_VREG(AV_SCRATCH_M) != 0 &&
857 (debug_enable & PRINT_FLAG_UCODE_DETAIL)) {
858 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_UCODE_DETAIL,
859 "dbg %x: %x, level %x, wp %x, rp %x, cnt %x\n",
860 READ_VREG(AV_SCRATCH_M), READ_VREG(AV_SCRATCH_N),
861 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
862 READ_VREG(VLD_MEM_VIFIFO_WP),
863 READ_VREG(VLD_MEM_VIFIFO_RP),
864 READ_VREG(VIFF_BIT_CNT));
865 WRITE_VREG(AV_SCRATCH_M, 0);
866 return IRQ_HANDLED;
867 }
868 reg = READ_VREG(MREG_BUFFEROUT);
869
870 time_increment_resolution = READ_VREG(MP4_RATE);
871 fixed_vop_rate = time_increment_resolution >> 16;
872 time_increment_resolution &= 0xffff;
873 if (time_increment_resolution > 0 &&
874 fixed_vop_rate == 0)
875 hw->sys_mp4_rate = time_increment_resolution;
876
877 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
878 if ((fixed_vop_rate != 0) &&
879 (time_increment_resolution != 0)) {
880 hw->vmpeg4_amstream_dec_info.rate = fixed_vop_rate *
881 DURATION_UNIT / time_increment_resolution;
882 } else if (time_increment_resolution == 0
883 && hw->sys_mp4_rate > 0)
884 time_increment_resolution = hw->sys_mp4_rate;
885 }
886 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL,
887 "time_inc_res = %d, fixed_vop_rate = %d, rate = %d\n",
888 time_increment_resolution, fixed_vop_rate,
889 hw->vmpeg4_amstream_dec_info.rate);
890
891 if (reg == 2) {
892 /* timeout when decoding next frame */
893
894 /* for frame based case, insufficient result may happen
895 * at the beginning when only VOL head is available save
896 * HW context also, such as for the QTable from VCOP register
897 */
898 mmpeg4_debug_print(DECODE_ID(hw),
899 PRINT_FLAG_VLD_DETAIL,
900 "%s, level = %x, vfifo_ctrl = %x, bitcnt = %d\n",
901 __func__,
902 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
903 READ_VREG(VLD_MEM_VIFIFO_CONTROL),
904 READ_VREG(VIFF_BIT_CNT));
905
906 if (vdec_frame_based(vdec)) {
907 //vmpeg4_save_hw_context(hw);
908 hw->dec_result = DEC_RESULT_DONE;
909 vdec_schedule_work(&hw->work);
910 } else {
911 reset_process_time(hw);
912 hw->dec_result = DEC_RESULT_AGAIN;
913 vdec_schedule_work(&hw->work);
914 }
915 return IRQ_HANDLED;
916 } else {
917 reset_process_time(hw);
918 picture_type = (reg >> 3) & 7;
919 repeat_cnt = READ_VREG(MP4_NOT_CODED_CNT);
920 vop_time_inc = READ_VREG(MP4_VOP_TIME_INC);
921
922 index = spec_to_index(hw, READ_VREG(REC_CANVAS_ADDR));
923 if (index < 0) {
924 mmpeg4_debug_print(DECODE_ID(hw), 0,
925 "invalid buffer index %d. rec = %x\n",
926 index, READ_VREG(REC_CANVAS_ADDR));
927 hw->dec_result = DEC_RESULT_ERROR;
928 vdec_schedule_work(&hw->work);
929 return IRQ_HANDLED;
930 }
931 hw->dec_result = DEC_RESULT_DONE;
932 dec_pic = &hw->pic[index];
933 dec_pic->pts_valid = false;
934 dec_pic->pts = 0;
935 dec_pic->pts64 = 0;
936 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
937 "new pic: index=%d, used=%d, repeat=%d, time_inc=%d\n",
938 index, hw->vfbuf_use[index], repeat_cnt, vop_time_inc);
939
940 dec_w = READ_VREG(MP4_PIC_WH)>> 16;
941 dec_h = READ_VREG(MP4_PIC_WH) & 0xffff;
942 if (dec_w != 0)
943 hw->frame_width = dec_w;
944 if (dec_h != 0)
945 hw->frame_height = dec_h;
946
947 if (hw->is_used_v4l) {
948 struct aml_vcodec_ctx *ctx =
949 (struct aml_vcodec_ctx *)(hw->v4l2_ctx);
950
951 if (ctx->param_sets_from_ucode && !hw->v4l_params_parsed) {
952 struct aml_vdec_pic_infos info;
953
954 info.visible_width = hw->frame_width;
955 info.visible_height = hw->frame_height;
956 info.coded_width = ALIGN(hw->frame_width, 64);
957 info.coded_height = ALIGN(hw->frame_height, 64);
958 info.dpb_size = MAX_BMMU_BUFFER_NUM - 1;
959 hw->v4l_params_parsed = true;
960 vdec_v4l_set_pic_infos(ctx, &info);
961 }
962
963 if (!ctx->v4l_codec_ready)
964 return IRQ_HANDLED;
965 }
966
967 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
968 if (vop_time_inc < hw->last_vop_time_inc) {
969 duration = vop_time_inc +
970 time_increment_resolution -
971 hw->last_vop_time_inc;
972 } else {
973 duration = vop_time_inc -
974 hw->last_vop_time_inc;
975 }
976
977 if (duration == hw->last_duration) {
978 hw->rate_detect++;
979 if ((hw->rate_detect >= RATE_DETECT_COUNT) &&
980 (time_increment_resolution != 0)) {
981 hw->vmpeg4_amstream_dec_info.rate =
982 duration * DURATION_UNIT /
983 time_increment_resolution;
984 duration =
985 hw->vmpeg4_amstream_dec_info.rate;
986 }
987 } else {
988 hw->rate_detect = 0;
989 hw->last_duration = duration;
990 }
991 if (MPEG4_VALID_DUR(duration)) {
992 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
993 "warn: duration %x, set 0\n", duration);
994 duration = 0;
995 }
996 } else {
997 duration = hw->vmpeg4_amstream_dec_info.rate;
998#if 0
999 pr_info("info rate = %d, ucode rate = 0x%x:0x%x\n",
1000 hw->vmpeg4_amstream_dec_info.rate,
1001 READ_VREG(MP4_RATE), vop_time_inc);
1002#endif
1003 }
1004
1005 /* frame mode with unstable pts */
1006 if (hw->unstable_pts && hw->chunk) {
1007 dec_pic->pts_valid = hw->chunk->pts_valid;
1008 dec_pic->pts = hw->chunk->pts;
1009 dec_pic->pts64 = hw->chunk->pts64;
1010 if ((B_PICTURE == picture_type) ||
1011 (hw->last_dec_pts == dec_pic->pts))
1012 dec_pic->pts_valid = 0;
1013
1014 hw->last_dec_pts = dec_pic->pts;
1015 } else if ((I_PICTURE == picture_type) ||
1016 (P_PICTURE == picture_type)) {
1017 offset = READ_VREG(MP4_OFFSET_REG);
1018 if (hw->chunk) {
1019 dec_pic->pts_valid = hw->chunk->pts_valid;
1020 dec_pic->pts = hw->chunk->pts;
1021 dec_pic->pts64 = hw->chunk->pts64;
1022 } else {
1023 if (pts_lookup_offset_us64(PTS_TYPE_VIDEO, offset,
1024 &pts, &frame_size, 3000, &pts_us64) == 0) {
1025 dec_pic->pts_valid = true;
1026 dec_pic->pts = pts;
1027 dec_pic->pts64 = pts_us64;
1028 hw->pts_hit++;
1029 } else {
1030 dec_pic->pts_valid = false;
1031 hw->pts_missed++;
1032 }
1033 }
1034 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1035 "%c, offset=0x%x, pts=0x%x(%d), index=%d, used=%d\n",
1036 GET_PIC_TYPE(picture_type), offset, dec_pic->pts,
1037 dec_pic->pts_valid, index, hw->vfbuf_use[index]);
1038 }
1039
1040 dec_pic->index = index;
1041 dec_pic->pic_info = reg;
1042 dec_pic->pic_type = picture_type;
1043 dec_pic->duration = duration;
1044 hw->vfbuf_use[index] = 0;
1045 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1046 "mmpeg4: pic_num: %d, index %d, type %c, pts %x\n",
1047 hw->frame_num, index,
1048 GET_PIC_TYPE(picture_type),
1049 dec_pic->pts);
1050
1051 /* buffer management */
1052 if ((picture_type == I_PICTURE) ||
1053 (picture_type == P_PICTURE)) {
1054 index = update_ref(hw, index);
1055 } else {
1056 /* drop B frame or disp immediately.
1057 * depend on if there are two ref frames
1058 */
1059 if (hw->refs[1] == -1)
1060 index = -1;
1061 }
1062 vmpeg4_save_hw_context(hw);
1063 if (index < 0) {
1064 vdec_schedule_work(&hw->work);
1065 return IRQ_HANDLED;
1066 }
1067 disp_pic = &hw->pic[index];
1068 if ((hw->first_i_frame_ready == 0) &&
1069 (I_PICTURE == disp_pic->pic_type))
1070 hw->first_i_frame_ready = 1;
1071
1072 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1073 "disp: index=%d, pts=%x(%d), used=%d, picout=%c(dec=%c)\n",
1074 index, disp_pic->pts, disp_pic->pts_valid,
1075 hw->vfbuf_use[index],
1076 GET_PIC_TYPE(disp_pic->pic_type),
1077 GET_PIC_TYPE(picture_type));
1078
1079 if (disp_pic->pts_valid) {
1080 hw->last_anch_pts = disp_pic->pts;
1081 hw->last_anch_pts_us64 = disp_pic->pts64;
1082 hw->frame_num_since_last_anch = 0;
1083 hw->vop_time_inc_since_last_anch = 0;
1084 } else if (vdec_stream_based(vdec)) {
1085 disp_pic->pts = hw->last_anch_pts;
1086 disp_pic->pts64 = hw->last_anch_pts_us64;
1087
1088 if ((time_increment_resolution != 0) &&
1089 (fixed_vop_rate == 0) &&
1090 (hw->vmpeg4_amstream_dec_info.rate == 0)) {
1091 /* variable PTS rate */
1092 /*bug on variable pts calc,
1093 *do as dixed vop first if we
1094 *have rate setting before.
1095 */
1096 if (vop_time_inc > hw->last_vop_time_inc) {
1097 duration = vop_time_inc -
1098 hw->last_vop_time_inc;
1099 } else {
1100 duration = vop_time_inc +
1101 time_increment_resolution -
1102 hw->last_vop_time_inc;
1103 }
1104
1105 hw->vop_time_inc_since_last_anch += duration;
1106
1107 disp_pic->pts += hw->vop_time_inc_since_last_anch *
1108 PTS_UNIT / time_increment_resolution;
1109 disp_pic->pts64 += (hw->vop_time_inc_since_last_anch *
1110 PTS_UNIT / time_increment_resolution) *
1111 100 / 9;
1112
1113 if (hw->vop_time_inc_since_last_anch >
1114 (1 << 14)) {
1115 /* avoid overflow */
1116 hw->last_anch_pts = disp_pic->pts;
1117 hw->last_anch_pts_us64 = disp_pic->pts64;
1118 hw->vop_time_inc_since_last_anch = 0;
1119 }
1120 } else {
1121 /* fixed VOP rate */
1122 hw->frame_num_since_last_anch++;
1123 disp_pic->pts += DUR2PTS(hw->frame_num_since_last_anch *
1124 hw->vmpeg4_amstream_dec_info.rate);
1125 disp_pic->pts64 += DUR2PTS(
1126 hw->frame_num_since_last_anch *
1127 hw->vmpeg4_amstream_dec_info.rate) * 100 / 9;
1128
1129 if (hw->frame_num_since_last_anch > (1 << 15)) {
1130 /* avoid overflow */
1131 hw->last_anch_pts = disp_pic->pts;
1132 hw->last_anch_pts_us64 = disp_pic->pts64;
1133 hw->frame_num_since_last_anch = 0;
1134 }
1135 }
1136 } else if (hw->unstable_pts && hw->chunk &&
1137 MPEG4_VALID_DUR(duration)) {
1138 /* invalid pts calc */
1139 hw->frame_num_since_last_anch = hw->chunk_frame_count;
1140 disp_pic->pts = hw->last_anch_pts +
1141 DUR2PTS(hw->frame_num_since_last_anch *
1142 duration);
1143 disp_pic->pts64 = hw->last_anch_pts_us64 +
1144 DUR2PTS(hw->frame_num_since_last_anch *
1145 duration) * 100 / 9;
1146
1147 if (hw->frame_num_since_last_anch > (1 << 15)) {
1148 /* avoid overflow */
1149 hw->last_anch_pts = disp_pic->pts;
1150 hw->last_anch_pts_us64 = disp_pic->pts64;
1151 hw->frame_num_since_last_anch = 0;
1152 } else
1153 disp_pic->pts_valid = 1;
1154 }
1155
1156 if (vdec_frame_based(vdec) &&
1157 (hw->unstable_pts) &&
1158 MPEG4_VALID_DUR(duration)) {
1159
1160 u32 threshold = DUR2PTS(duration) >> 3;
1161
1162 if (disp_pic->pts <= (hw->last_pts + threshold)) {
1163 disp_pic->pts = hw->last_pts + DUR2PTS(duration);
1164 disp_pic->pts64 = hw->last_pts64 +
1165 (DUR2PTS(duration)*100/9);
1166 }
1167 if (!disp_pic->pts_valid) {
1168 disp_pic->pts = 0;
1169 disp_pic->pts64 = 0;
1170 }
1171 }
1172 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
1173 "disp: pic_type %c, pts %d(%lld), diff %d, cnt %d\n",
1174 GET_PIC_TYPE(disp_pic->pic_type),
1175 disp_pic->pts,
1176 disp_pic->pts64,
1177 disp_pic->pts - hw->last_pts,
1178 hw->chunk_frame_count);
1179 hw->last_pts = disp_pic->pts;
1180 hw->last_pts64 = disp_pic->pts64;
1181 hw->frame_dur = duration;
1182 disp_pic->duration = duration;
1183 disp_pic->repeat_cnt = repeat_cnt;
1184
1185 prepare_display_buf(hw, disp_pic);
1186
1187 hw->total_frame += repeat_cnt + 1;
1188 hw->last_vop_time_inc = vop_time_inc;
1189
1190 if (vdec_frame_based(vdec) &&
1191 (frmbase_cont_bitlevel != 0) &&
1192 (hw->first_i_frame_ready)) {
1193 u32 consume_byte, res_byte, bitcnt;
1194
1195 bitcnt = READ_VREG(VIFF_BIT_CNT);
1196 res_byte = bitcnt >> 3;
1197
1198 if (hw->chunk_size > res_byte) {
1199 if (bitcnt > frmbase_cont_bitlevel) {
1200 consume_byte = hw->chunk_size - res_byte;
1201
1202 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1203 "%s, size %d, consume %d, res %d\n", __func__,
1204 hw->chunk_size, consume_byte, res_byte);
1205
1206 if (consume_byte > VDEC_FIFO_ALIGN) {
1207 consume_byte -= VDEC_FIFO_ALIGN;
1208 res_byte += VDEC_FIFO_ALIGN;
1209 }
1210 hw->chunk_offset += consume_byte;
1211 hw->chunk_size = res_byte;
1212 hw->dec_result = DEC_RESULT_UNFINISH;
1213 hw->chunk_frame_count++;
1214 hw->unstable_pts = 1;
1215 } else {
1216 hw->chunk_size = 0;
1217 hw->chunk_offset = 0;
1218 }
1219 } else {
1220 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1221 "error: bitbyte %d hw->chunk_size %d\n", res_byte, hw->chunk_size);
1222 hw->chunk_size = 0;
1223 hw->chunk_offset = 0;
1224 }
1225 }
1226 vdec_schedule_work(&hw->work);
1227 }
1228 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
1229 "%s: frame num:%d\n", __func__, hw->frame_num);
1230
1231 return IRQ_HANDLED;
1232}
1233
1234static irqreturn_t vmpeg4_isr(struct vdec_s *vdec, int irq)
1235{
1236 struct vdec_mpeg4_hw_s *hw =
1237 (struct vdec_mpeg4_hw_s *)(vdec->private);
1238
1239 if (hw->eos)
1240 return IRQ_HANDLED;
1241
1242 return IRQ_WAKE_THREAD;
1243}
1244
1245static void flush_output(struct vdec_mpeg4_hw_s * hw)
1246{
1247 struct pic_info_t *pic;
1248
1249 if (hw->vfbuf_use[hw->refs[1]] > 0) {
1250 pic = &hw->pic[hw->refs[1]];
1251 prepare_display_buf(hw, pic);
1252 }
1253}
1254
1255static int notify_v4l_eos(struct vdec_s *vdec)
1256{
1257 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1258 struct aml_vcodec_ctx *ctx = (struct aml_vcodec_ctx *)(hw->v4l2_ctx);
1259 struct vframe_s *vf = NULL;
1260 struct vdec_v4l2_buffer *fb = NULL;
1261
1262 if (hw->is_used_v4l && hw->eos) {
1263 if (kfifo_get(&hw->newframe_q, &vf) == 0 || vf == NULL) {
1264 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1265 "%s fatal error, no available buffer slot.\n",
1266 __func__);
1267 return -1;
1268 }
1269
1270 if (vdec_v4l_get_buffer(hw->v4l2_ctx, &fb)) {
1271 pr_err("[%d] get fb fail.\n", ctx->id);
1272 return -1;
1273 }
1274
1275 vf->timestamp = ULONG_MAX;
1276 vf->v4l_mem_handle = (unsigned long)fb;
1277 vf->flag = VFRAME_FLAG_EMPTY_FRAME_V4L;
1278
1279 kfifo_put(&hw->display_q, (const struct vframe_s *)vf);
1280 vf_notify_receiver(vdec->vf_provider_name,
1281 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
1282
1283 pr_info("[%d] mpeg4 EOS notify.\n", ctx->id);
1284 }
1285
1286 return 0;
1287}
1288
1289static void vmpeg4_work(struct work_struct *work)
1290{
1291 struct vdec_mpeg4_hw_s *hw =
1292 container_of(work, struct vdec_mpeg4_hw_s, work);
1293 struct vdec_s *vdec = hw_to_vdec(hw);
1294
1295 /* finished decoding one frame or error,
1296 * notify vdec core to switch context
1297 */
1298 if (hw->dec_result != DEC_RESULT_DONE)
1299 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1300 "vmpeg4_work: result=%d,status=%d\n",
1301 hw->dec_result, hw_to_vdec(hw)->next_status);
1302
1303 if (hw->dec_result == DEC_RESULT_UNFINISH) {
1304 if (!hw->ctx_valid)
1305 hw->ctx_valid = 1;
1306
1307 } else if ((hw->dec_result == DEC_RESULT_DONE) ||
1308 ((input_frame_based(&vdec->input)) && hw->chunk)) {
1309 if (!hw->ctx_valid)
1310 hw->ctx_valid = 1;
1311
1312 vdec_vframe_dirty(vdec, hw->chunk);
1313 hw->chunk = NULL;
1314 } else if (hw->dec_result == DEC_RESULT_AGAIN
1315 && (vdec->next_status != VDEC_STATUS_DISCONNECTED)) {
1316 /*
1317 stream base: stream buf empty or timeout
1318 frame base: vdec_prepare_input fail
1319 */
1320 if (!vdec_has_more_input(vdec)) {
1321 hw->dec_result = DEC_RESULT_EOS;
1322 vdec_schedule_work(&hw->work);
1323 return;
1324 }
1325 } else if (hw->dec_result == DEC_RESULT_FORCE_EXIT) {
1326 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1327 "%s: force exit\n", __func__);
1328 if (hw->stat & STAT_ISR_REG) {
1329 amvdec_stop();
1330 vdec_free_irq(VDEC_IRQ_1, (void *)hw);
1331 hw->stat &= ~STAT_ISR_REG;
1332 }
1333 } else if (hw->dec_result == DEC_RESULT_EOS) {
1334 hw->eos = 1;
1335 if (hw->stat & STAT_VDEC_RUN) {
1336 amvdec_stop();
1337 hw->stat &= ~STAT_VDEC_RUN;
1338 }
1339 vdec_vframe_dirty(vdec, hw->chunk);
1340 hw->chunk = NULL;
1341 vdec_clean_input(vdec);
1342 flush_output(hw);
1343
1344 if (hw->is_used_v4l)
1345 notify_v4l_eos(vdec);
1346
1347 mmpeg4_debug_print(DECODE_ID(hw), 0,
1348 "%s: eos flushed, frame_num %d\n",
1349 __func__, hw->frame_num);
1350 }
1351
1352 if (hw->stat & STAT_VDEC_RUN) {
1353 amvdec_stop();
1354 hw->stat &= ~STAT_VDEC_RUN;
1355 }
1356 /*disable mbox interrupt */
1357 WRITE_VREG(ASSIST_MBOX1_MASK, 0);
1358 del_timer_sync(&hw->check_timer);
1359 hw->stat &= ~STAT_TIMER_ARM;
1360
1361 /* mark itself has all HW resource released and input released */
1362 if (vdec->parallel_dec == 1)
1363 vdec_core_finish_run(vdec, CORE_MASK_VDEC_1);
1364 else
1365 vdec_core_finish_run(vdec, CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
1366
1367 wake_up_interruptible(&hw->wait_q);
1368 if (hw->vdec_cb)
1369 hw->vdec_cb(vdec, hw->vdec_cb_arg);
1370}
1371
1372static struct vframe_s *vmpeg_vf_peek(void *op_arg)
1373{
1374 struct vframe_s *vf;
1375 struct vdec_s *vdec = op_arg;
1376 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1377
1378 if (!hw)
1379 return NULL;
1380 hw->peek_num++;
1381 if (kfifo_peek(&hw->display_q, &vf))
1382 return vf;
1383
1384 return NULL;
1385}
1386
1387static struct vframe_s *vmpeg_vf_get(void *op_arg)
1388{
1389 struct vframe_s *vf;
1390 struct vdec_s *vdec = op_arg;
1391 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1392 hw->get_num++;
1393 if (kfifo_get(&hw->display_q, &vf))
1394 return vf;
1395
1396 return NULL;
1397}
1398
1399static void vmpeg_vf_put(struct vframe_s *vf, void *op_arg)
1400{
1401 struct vdec_s *vdec = op_arg;
1402 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1403
1404 hw->vfbuf_use[vf->index]--;
1405 hw->put_num++;
1406 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
1407 "%s: put num:%d\n",__func__, hw->put_num);
1408 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
1409 "index=%d, used=%d\n", vf->index, hw->vfbuf_use[vf->index]);
1410 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1411}
1412
1413static int vmpeg_event_cb(int type, void *data, void *private_data)
1414{
1415 return 0;
1416}
1417
1418static int vmpeg_vf_states(struct vframe_states *states, void *op_arg)
1419{
1420 unsigned long flags;
1421 struct vdec_s *vdec = op_arg;
1422 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1423
1424 spin_lock_irqsave(&hw->lock, flags);
1425
1426 states->vf_pool_size = VF_POOL_SIZE;
1427 states->buf_free_num = kfifo_len(&hw->newframe_q);
1428 states->buf_avail_num = kfifo_len(&hw->display_q);
1429 states->buf_recycle_num = 0;
1430
1431 spin_unlock_irqrestore(&hw->lock, flags);
1432
1433 return 0;
1434}
1435
1436
1437static int dec_status(struct vdec_s *vdec, struct vdec_info *vstatus)
1438{
1439 struct vdec_mpeg4_hw_s *hw =
1440 (struct vdec_mpeg4_hw_s *)vdec->private;
1441
1442 if (!hw)
1443 return -1;
1444
1445 vstatus->frame_width = hw->frame_width;
1446 vstatus->frame_height = hw->frame_height;
1447 if (0 != hw->vmpeg4_amstream_dec_info.rate)
1448 vstatus->frame_rate = DURATION_UNIT /
1449 hw->vmpeg4_amstream_dec_info.rate;
1450 else
1451 vstatus->frame_rate = DURATION_UNIT;
1452 vstatus->error_count = READ_VREG(MP4_ERR_COUNT);
1453 vstatus->status = hw->stat;
1454 vstatus->frame_dur = hw->frame_dur;
1455 snprintf(vstatus->vdec_name, sizeof(vstatus->vdec_name),
1456 "%s", DRIVER_NAME);
1457
1458 return 0;
1459}
1460
1461/****************************************/
1462static int vmpeg4_canvas_init(struct vdec_mpeg4_hw_s *hw)
1463{
1464 int i, ret;
1465 u32 canvas_width, canvas_height;
1466 u32 decbuf_size, decbuf_y_size;
1467 struct vdec_s *vdec = hw_to_vdec(hw);
1468 unsigned long decbuf_start;
1469
1470 if (buf_size <= 0x00400000) {
1471 /* SD only */
1472 canvas_width = 768;
1473 canvas_height = 576;
1474 decbuf_y_size = 0x80000;
1475 decbuf_size = 0x100000;
1476 } else {
1477 int w = 1920;
1478 int h = 1088;
1479 int align_w, align_h;
1480 int max, min;
1481
1482 align_w = ALIGN(w, 64);
1483 align_h = ALIGN(h, 64);
1484 if (align_w > align_h) {
1485 max = align_w;
1486 min = align_h;
1487 } else {
1488 max = align_h;
1489 min = align_w;
1490 }
1491 /* HD & SD */
1492 if ((max > 1920 || min > 1088) &&
1493 ALIGN(align_w * align_h * 3/2, SZ_64K) * 9 <=
1494 buf_size) {
1495 canvas_width = align_w;
1496 canvas_height = align_h;
1497 decbuf_y_size =
1498 ALIGN(align_w * align_h, SZ_64K);
1499 decbuf_size =
1500 ALIGN(align_w * align_h * 3/2, SZ_64K);
1501 } else { /*1080p*/
1502 if (h > w) {
1503 canvas_width = 1088;
1504 canvas_height = 1920;
1505 } else {
1506 canvas_width = 1920;
1507 canvas_height = 1088;
1508 }
1509 decbuf_y_size = 0x200000;
1510 decbuf_size = 0x300000;
1511 }
1512 }
1513
1514 for (i = 0; i < MAX_BMMU_BUFFER_NUM; i++) {
1515
1516 unsigned canvas;
1517
1518 if (i == (MAX_BMMU_BUFFER_NUM - 1))
1519 decbuf_size = WORKSPACE_SIZE;
1520
1521 if (hw->is_used_v4l && !(i == (MAX_BMMU_BUFFER_NUM - 1))) {
1522 continue;
1523 } else {
1524 ret = decoder_bmmu_box_alloc_buf_phy(hw->mm_blk_handle, i,
1525 decbuf_size, DRIVER_NAME, &decbuf_start);
1526 if (ret < 0) {
1527 pr_err("mmu alloc failed! size %d idx %d\n",
1528 decbuf_size, i);
1529 return ret;
1530 }
1531 }
1532
1533 if (i == (MAX_BMMU_BUFFER_NUM - 1)) {
1534 hw->buf_start = decbuf_start;
1535 } else {
1536 if (vdec->parallel_dec == 1) {
1537 unsigned tmp;
1538 if (canvas_y(hw->canvas_spec[i]) == 0xff) {
1539 tmp =
1540 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1541 hw->canvas_spec[i] &= ~0xff;
1542 hw->canvas_spec[i] |= tmp;
1543 }
1544 if (canvas_u(hw->canvas_spec[i]) == 0xff) {
1545 tmp =
1546 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1547 hw->canvas_spec[i] &= ~(0xffff << 8);
1548 hw->canvas_spec[i] |= tmp << 8;
1549 hw->canvas_spec[i] |= tmp << 16;
1550 }
1551 canvas = hw->canvas_spec[i];
1552 } else {
1553 canvas = vdec->get_canvas(i, 2);
1554 hw->canvas_spec[i] = canvas;
1555 }
1556
1557 hw->canvas_config[i][0].phy_addr = decbuf_start;
1558 hw->canvas_config[i][0].width = canvas_width;
1559 hw->canvas_config[i][0].height = canvas_height;
1560 hw->canvas_config[i][0].block_mode = hw->blkmode;
1561 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
1562 hw->canvas_config[i][0].endian = 7;
1563 else
1564 hw->canvas_config[i][0].endian = 0;
1565 canvas_config_config(canvas_y(canvas),
1566 &hw->canvas_config[i][0]);
1567
1568 hw->canvas_config[i][1].phy_addr =
1569 decbuf_start + decbuf_y_size;
1570 hw->canvas_config[i][1].width = canvas_width;
1571 hw->canvas_config[i][1].height = (canvas_height >> 1);
1572 hw->canvas_config[i][1].block_mode = hw->blkmode;
1573 if (hw->blkmode == CANVAS_BLKMODE_LINEAR)
1574 hw->canvas_config[i][1].endian = 7;
1575 else
1576 hw->canvas_config[i][1].endian = 0;
1577 canvas_config_config(canvas_u(canvas),
1578 &hw->canvas_config[i][1]);
1579 }
1580 }
1581
1582 return 0;
1583}
1584
1585static void vmpeg4_dump_state(struct vdec_s *vdec)
1586{
1587 struct vdec_mpeg4_hw_s *hw =
1588 (struct vdec_mpeg4_hw_s *)(vdec->private);
1589 u32 i;
1590 mmpeg4_debug_print(DECODE_ID(hw), 0,
1591 "====== %s\n", __func__);
1592 mmpeg4_debug_print(DECODE_ID(hw), 0,
1593 "width/height (%d/%d), i_fram:%d, buffer_not_ready %d\n",
1594 hw->frame_width,
1595 hw->frame_height,
1596 hw->first_i_frame_ready,
1597 hw->buffer_not_ready
1598 );
1599 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
1600 mmpeg4_debug_print(DECODE_ID(hw), 0,
1601 "index %d, used %d\n", i, hw->vfbuf_use[i]);
1602 }
1603
1604 mmpeg4_debug_print(DECODE_ID(hw), 0,
1605 "is_framebase(%d), eos %d, state 0x%x, dec_result 0x%x dec_frm %d\n",
1606 vdec_frame_based(vdec),
1607 hw->eos,
1608 hw->stat,
1609 hw->dec_result,
1610 hw->frame_num
1611 );
1612 mmpeg4_debug_print(DECODE_ID(hw), 0,
1613 "is_framebase(%d), put_frm %d run %d not_run_ready %d input_empty %d,drop %d\n",
1614 vdec_frame_based(vdec),
1615 hw->put_num,
1616 hw->run_count,
1617 hw->not_run_ready,
1618 hw->input_empty,
1619 hw->drop_frame_count
1620 );
1621
1622 if (vf_get_receiver(vdec->vf_provider_name)) {
1623 enum receviver_start_e state =
1624 vf_notify_receiver(vdec->vf_provider_name,
1625 VFRAME_EVENT_PROVIDER_QUREY_STATE,
1626 NULL);
1627 mmpeg4_debug_print(DECODE_ID(hw), 0,
1628 "\nreceiver(%s) state %d\n",
1629 vdec->vf_provider_name,
1630 state);
1631 }
1632 mmpeg4_debug_print(DECODE_ID(hw), 0,
1633 "%s, newq(%d/%d), dispq(%d/%d) vf peek/get/put (%d/%d/%d)\n",
1634 __func__,
1635 kfifo_len(&hw->newframe_q), VF_POOL_SIZE,
1636 kfifo_len(&hw->display_q), VF_POOL_SIZE,
1637 hw->peek_num, hw->get_num, hw->put_num
1638 );
1639 mmpeg4_debug_print(DECODE_ID(hw), 0,
1640 "VIFF_BIT_CNT=0x%x\n",
1641 READ_VREG(VIFF_BIT_CNT));
1642 mmpeg4_debug_print(DECODE_ID(hw), 0,
1643 "VLD_MEM_VIFIFO_LEVEL=0x%x\n",
1644 READ_VREG(VLD_MEM_VIFIFO_LEVEL));
1645 mmpeg4_debug_print(DECODE_ID(hw), 0,
1646 "VLD_MEM_VIFIFO_WP=0x%x\n",
1647 READ_VREG(VLD_MEM_VIFIFO_WP));
1648 mmpeg4_debug_print(DECODE_ID(hw), 0,
1649 "VLD_MEM_VIFIFO_RP=0x%x\n",
1650 READ_VREG(VLD_MEM_VIFIFO_RP));
1651 mmpeg4_debug_print(DECODE_ID(hw), 0,
1652 "PARSER_VIDEO_RP=0x%x\n",
1653 READ_PARSER_REG(PARSER_VIDEO_RP));
1654 mmpeg4_debug_print(DECODE_ID(hw), 0,
1655 "PARSER_VIDEO_WP=0x%x\n",
1656 READ_PARSER_REG(PARSER_VIDEO_WP));
1657 if (vdec_frame_based(vdec) &&
1658 debug_enable & PRINT_FRAMEBASE_DATA) {
1659 int jj;
1660 if (hw->chunk && hw->chunk->block &&
1661 hw->chunk->size > 0) {
1662 u8 *data = NULL;
1663
1664 if (!hw->chunk->block->is_mapped)
1665 data = codec_mm_vmap(hw->chunk->block->start +
1666 hw->chunk->offset, hw->chunk->size);
1667 else
1668 data = ((u8 *)hw->chunk->block->start_virt) +
1669 hw->chunk->offset;
1670
1671 mmpeg4_debug_print(DECODE_ID(hw), 0,
1672 "frame data size 0x%x\n",
1673 hw->chunk->size);
1674 for (jj = 0; jj < hw->chunk->size; jj++) {
1675 if ((jj & 0xf) == 0)
1676 mmpeg4_debug_print(DECODE_ID(hw),
1677 PRINT_FRAMEBASE_DATA,
1678 "%06x:", jj);
1679 mmpeg4_debug_print(DECODE_ID(hw),
1680 PRINT_FRAMEBASE_DATA,
1681 "%02x ", data[jj]);
1682 if (((jj + 1) & 0xf) == 0)
1683 mmpeg4_debug_print(DECODE_ID(hw),
1684 PRINT_FRAMEBASE_DATA,
1685 "\n");
1686 }
1687
1688 if (!hw->chunk->block->is_mapped)
1689 codec_mm_unmap_phyaddr(data);
1690 }
1691 }
1692}
1693
1694static void reset_process_time(struct vdec_mpeg4_hw_s *hw)
1695{
1696 if (hw->start_process_time) {
1697 unsigned process_time =
1698 1000 * (jiffies - hw->start_process_time) / HZ;
1699 hw->start_process_time = 0;
1700 if (process_time > max_process_time[DECODE_ID(hw)])
1701 max_process_time[DECODE_ID(hw)] = process_time;
1702 }
1703}
1704static void start_process_time(struct vdec_mpeg4_hw_s *hw)
1705{
1706 hw->decode_timeout_count = 2;
1707 hw->start_process_time = jiffies;
1708}
1709
1710static void timeout_process(struct vdec_mpeg4_hw_s *hw)
1711{
1712 if (hw->stat & STAT_VDEC_RUN) {
1713 amvdec_stop();
1714 hw->stat &= ~STAT_VDEC_RUN;
1715 }
1716 mmpeg4_debug_print(DECODE_ID(hw), 0,
1717 "%s decoder timeout %d\n", __func__, hw->timeout_cnt);
1718 if (vdec_frame_based((hw_to_vdec(hw)))) {
1719 mmpeg4_debug_print(DECODE_ID(hw), 0,
1720 "%s frame_num %d, chunk size 0x%x, chksum 0x%x\n",
1721 __func__,
1722 hw->frame_num,
1723 hw->chunk->size,
1724 get_data_check_sum(hw, hw->chunk->size));
1725 }
1726 hw->timeout_cnt++;
1727 /* timeout: data droped, frame_num inaccurate*/
1728 hw->frame_num++;
1729 reset_process_time(hw);
1730 hw->first_i_frame_ready = 0;
1731 hw->dec_result = DEC_RESULT_DONE;
1732 vdec_schedule_work(&hw->work);
1733}
1734
1735
1736static void check_timer_func(unsigned long arg)
1737{
1738 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)arg;
1739 struct vdec_s *vdec = hw_to_vdec(hw);
1740 unsigned int timeout_val = decode_timeout_val;
1741
1742 if (radr != 0) {
1743 if (rval != 0) {
1744 WRITE_VREG(radr, rval);
1745 pr_info("WRITE_VREG(%x,%x)\n", radr, rval);
1746 } else
1747 pr_info("READ_VREG(%x)=%x\n", radr, READ_VREG(radr));
1748 rval = 0;
1749 radr = 0;
1750 }
1751
1752 if (((debug_enable & PRINT_FLAG_TIMEOUT_STATUS) == 0) &&
1753 (vdec_frame_based(vdec) ||
1754 ((u32)READ_VREG(VLD_MEM_VIFIFO_LEVEL) > 0x100)) &&
1755 (timeout_val > 0) &&
1756 (hw->start_process_time > 0) &&
1757 ((1000 * (jiffies - hw->start_process_time) / HZ)
1758 > timeout_val)) {
1759 if (hw->last_vld_level == READ_VREG(VLD_MEM_VIFIFO_LEVEL)) {
1760 if (hw->decode_timeout_count > 0)
1761 hw->decode_timeout_count--;
1762 if (hw->decode_timeout_count == 0)
1763 timeout_process(hw);
1764 }
1765 hw->last_vld_level = READ_VREG(VLD_MEM_VIFIFO_LEVEL);
1766 }
1767
1768 if (vdec->next_status == VDEC_STATUS_DISCONNECTED) {
1769 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1770 "vdec requested to be disconnected\n");
1771 hw->dec_result = DEC_RESULT_FORCE_EXIT;
1772 vdec_schedule_work(&hw->work);
1773 return;
1774 }
1775
1776 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
1777}
1778
1779static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw)
1780{
1781 int index, i;
1782 void *workspace_buf = NULL;
1783
1784 index = find_free_buffer(hw);
1785 if (index < 0)
1786 return -1;
1787
1788 if (!hw->init_flag) {
1789 if (vmpeg4_canvas_init(hw) < 0)
1790 return -1;
1791 } else {
1792 if (!hw->is_used_v4l) {
1793 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
1794 canvas_config_config(canvas_y(hw->canvas_spec[i]),
1795 &hw->canvas_config[i][0]);
1796 canvas_config_config(canvas_u(hw->canvas_spec[i]),
1797 &hw->canvas_config[i][1]);
1798 }
1799 }
1800 }
1801 /* prepare REF0 & REF1
1802 * points to the past two IP buffers
1803 * prepare REC_CANVAS_ADDR and ANC2_CANVAS_ADDR
1804 * points to the output buffer
1805 */
1806 if (hw->refs[0] == -1) {
1807 WRITE_VREG(MREG_REF0, (hw->refs[1] == -1) ? 0xffffffff :
1808 hw->canvas_spec[hw->refs[1]]);
1809 } else {
1810 WRITE_VREG(MREG_REF0, (hw->refs[0] == -1) ? 0xffffffff :
1811 hw->canvas_spec[hw->refs[0]]);
1812 }
1813 WRITE_VREG(MREG_REF1, (hw->refs[1] == -1) ? 0xffffffff :
1814 hw->canvas_spec[hw->refs[1]]);
1815
1816 WRITE_VREG(REC_CANVAS_ADDR, hw->canvas_spec[index]);
1817 WRITE_VREG(ANC2_CANVAS_ADDR, hw->canvas_spec[index]);
1818
1819 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RESTORE,
1820 "restore ref0=0x%x, ref1=0x%x, rec=0x%x, ctx_valid=%d,index=%d\n",
1821 READ_VREG(MREG_REF0),
1822 READ_VREG(MREG_REF1),
1823 READ_VREG(REC_CANVAS_ADDR),
1824 hw->ctx_valid, index);
1825
1826 /* notify ucode the buffer start address */
1827 workspace_buf = codec_mm_vmap(hw->buf_start, WORKSPACE_SIZE);
1828 if (workspace_buf) {
1829 /* clear to fix decoder timeout at first time */
1830 if (!hw->init_flag)
1831 memset(workspace_buf, 0, WORKSPACE_SIZE);
1832 codec_mm_dma_flush(workspace_buf,
1833 WORKSPACE_SIZE, DMA_TO_DEVICE);
1834 codec_mm_unmap_phyaddr(workspace_buf);
1835 }
1836 WRITE_VREG(MEM_OFFSET_REG, hw->buf_start);
1837
1838 /* disable PSCALE for hardware sharing */
1839 WRITE_VREG(PSCALE_CTRL, 0);
1840
1841 WRITE_VREG(MREG_BUFFEROUT, 0);
1842
1843 /* clear mailbox interrupt */
1844 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
1845
1846 /* enable mailbox interrupt */
1847 WRITE_VREG(ASSIST_MBOX1_MASK, 1);
1848
1849 /* clear repeat count */
1850 WRITE_VREG(MP4_NOT_CODED_CNT, 0);
1851
1852#ifdef NV21
1853 SET_VREG_MASK(MDEC_PIC_DC_CTRL, 1 << 17);
1854#endif
1855
1856#if 1/* /MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
1857 WRITE_VREG(MDEC_PIC_DC_THRESH, 0x404038aa);
1858#endif
1859
1860 WRITE_VREG(MP4_PIC_WH, (hw->ctx_valid) ?
1861 hw->reg_mp4_pic_wh :
1862 ((hw->frame_width << 16) | hw->frame_height));
1863 WRITE_VREG(MP4_SYS_RATE, hw->vmpeg4_amstream_dec_info.rate);
1864
1865 if (hw->ctx_valid) {
1866 WRITE_VREG(DC_AC_CTRL, hw->reg_dc_ac_ctrl);
1867 WRITE_VREG(IQIDCT_CONTROL, hw->reg_iqidct_control);
1868 WRITE_VREG(RESYNC_MARKER_LENGTH, hw->reg_resync_marker_length);
1869 WRITE_VREG(RV_AI_MB_COUNT, hw->reg_rv_ai_mb_count);
1870 }
1871 WRITE_VREG(MPEG1_2_REG, (hw->ctx_valid) ? hw->reg_mpeg1_2_reg : 1);
1872 WRITE_VREG(VCOP_CTRL_REG, hw->reg_vcop_ctrl_reg);
1873 WRITE_VREG(PIC_HEAD_INFO, hw->reg_pic_head_info);
1874 WRITE_VREG(SLICE_QP, hw->reg_slice_qp);
1875 WRITE_VREG(MB_INFO, hw->reg_mb_info);
1876
1877 if (vdec_frame_based(hw_to_vdec(hw)) && hw->chunk) {
1878 /* frame based input */
1879 WRITE_VREG(MREG_INPUT, (hw->chunk->offset & 7) | (1<<7) |
1880 (hw->ctx_valid<<6));
1881 } else {
1882 /* stream based input */
1883 WRITE_VREG(MREG_INPUT, (hw->ctx_valid<<6));
1884 }
1885
1886 return 0;
1887}
1888
1889static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw)
1890{
1891 int i;
1892
1893 hw->vmpeg4_ratio = hw->vmpeg4_amstream_dec_info.ratio;
1894
1895 hw->vmpeg4_ratio64 = hw->vmpeg4_amstream_dec_info.ratio64;
1896
1897 hw->vmpeg4_rotation =
1898 (((unsigned long)hw->vmpeg4_amstream_dec_info.param) >> 16) & 0xffff;
1899 hw->sys_mp4_rate = hw->vmpeg4_amstream_dec_info.rate;
1900 hw->frame_width = hw->vmpeg4_amstream_dec_info.width;
1901 hw->frame_height = hw->vmpeg4_amstream_dec_info.height;
1902 hw->frame_dur = 0;
1903 hw->frame_prog = 0;
1904 hw->unstable_pts =
1905 (((unsigned long) hw->vmpeg4_amstream_dec_info.param & 0x40) >> 6);
1906 mmpeg4_debug_print(DECODE_ID(hw), 0,
1907 "param = 0x%x unstable_pts = %d\n",
1908 hw->vmpeg4_amstream_dec_info.param,
1909 hw->unstable_pts);
1910 hw->last_dec_pts = -1;
1911
1912 hw->total_frame = 0;
1913
1914 hw->last_anch_pts = 0;
1915
1916 hw->last_anch_pts_us64 = 0;
1917
1918 hw->last_vop_time_inc = hw->last_duration = 0;
1919
1920 hw->vop_time_inc_since_last_anch = 0;
1921 hw->last_pts = 0;
1922 hw->last_pts64 = 0;
1923 hw->frame_num_since_last_anch = 0;
1924 hw->frame_num = 0;
1925 hw->put_num = 0;
1926 hw->run_count = 0;
1927 hw->not_run_ready = 0;
1928 hw->input_empty = 0;
1929 hw->peek_num = 0;
1930 hw->get_num = 0;
1931
1932 hw->pts_hit = hw->pts_missed = hw->pts_i_hit = hw->pts_i_missed = 0;
1933 hw->refs[0] = -1;
1934 hw->refs[1] = -1;
1935 hw->first_i_frame_ready = 0;
1936 hw->drop_frame_count = 0;
1937 hw->buffer_not_ready = 0;
1938 hw->init_flag = 0;
1939 hw->dec_result = DEC_RESULT_NONE;
1940 hw->timeout_cnt = 0;
1941
1942 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
1943 hw->vfbuf_use[i] = 0;
1944
1945 INIT_KFIFO(hw->display_q);
1946 INIT_KFIFO(hw->newframe_q);
1947
1948 for (i = 0; i < VF_POOL_SIZE; i++) {
1949 const struct vframe_s *vf = &hw->vfpool[i];
1950
1951 hw->vfpool[i].index = DECODE_BUFFER_NUM_MAX;
1952 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1953 }
1954 if (hw->mm_blk_handle) {
1955 decoder_bmmu_box_free(hw->mm_blk_handle);
1956 hw->mm_blk_handle = NULL;
1957 }
1958 hw->mm_blk_handle = decoder_bmmu_box_alloc_box(
1959 DRIVER_NAME,
1960 0,
1961 MAX_BMMU_BUFFER_NUM,
1962 4 + PAGE_SHIFT,
1963 CODEC_MM_FLAGS_CMA_CLEAR |
1964 CODEC_MM_FLAGS_FOR_VDECODER);
1965 INIT_WORK(&hw->work, vmpeg4_work);
1966
1967 init_waitqueue_head(&hw->wait_q);
1968}
1969
1970static s32 vmmpeg4_init(struct vdec_mpeg4_hw_s *hw)
1971{
1972 int trickmode_fffb = 0;
1973 int size = -1, fw_size = 0x1000 * 16;
1974 struct firmware_s *fw = NULL;
1975
1976 fw = vmalloc(sizeof(struct firmware_s) + fw_size);
1977 if (IS_ERR_OR_NULL(fw))
1978 return -ENOMEM;
1979
1980 if (hw->vmpeg4_amstream_dec_info.format ==
1981 VIDEO_DEC_FORMAT_MPEG4_5) {
1982 size = get_firmware_data(VIDEO_DEC_MPEG4_5_MULTI, fw->data);
1983 strncpy(fw->name, "mmpeg4_mc_5", sizeof(fw->name));
1984 } else if (hw->vmpeg4_amstream_dec_info.format ==
1985 VIDEO_DEC_FORMAT_H263) {
1986 size = get_firmware_data(VIDEO_DEC_H263_MULTI, fw->data);
1987 strncpy(fw->name, "mh263_mc", sizeof(fw->name));
1988 } else
1989 pr_err("unsupport mpeg4 sub format %d\n",
1990 hw->vmpeg4_amstream_dec_info.format);
1991 pr_info("mmpeg4 get fw %s, size %x\n", fw->name, size);
1992 if (size < 0) {
1993 pr_err("get firmware failed.");
1994 vfree(fw);
1995 return -1;
1996 }
1997
1998 fw->len = size;
1999 hw->fw = fw;
2000
2001 query_video_status(0, &trickmode_fffb);
2002
2003 pr_info("%s\n", __func__);
2004
2005 amvdec_enable();
2006
2007 init_timer(&hw->check_timer);
2008 hw->check_timer.data = (unsigned long)hw;
2009 hw->check_timer.function = check_timer_func;
2010 hw->check_timer.expires = jiffies + CHECK_INTERVAL;
2011 hw->stat |= STAT_TIMER_ARM;
2012 hw->eos = 0;
2013 WRITE_VREG(DECODE_STOP_POS, udebug_flag);
2014
2015 vmpeg4_local_init(hw);
2016 wmb();
2017
2018 return 0;
2019}
2020
2021static unsigned long run_ready(struct vdec_s *vdec, unsigned long mask)
2022{
2023 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2024
2025 if (hw->eos)
2026 return 0;
2027 if (vdec_stream_based(vdec) && (hw->init_flag == 0)
2028 && pre_decode_buf_level != 0) {
2029 u32 rp, wp, level;
2030
2031 rp = READ_PARSER_REG(PARSER_VIDEO_RP);
2032 wp = READ_PARSER_REG(PARSER_VIDEO_WP);
2033 if (wp < rp)
2034 level = vdec->input.size + wp - rp;
2035 else
2036 level = wp - rp;
2037 if (level < pre_decode_buf_level) {
2038 hw->not_run_ready++;
2039 return 0;
2040 }
2041 }
2042
2043 if (!is_enough_free_buffer(hw)) {
2044 hw->buffer_not_ready++;
2045 return 0;
2046 }
2047
2048 hw->not_run_ready = 0;
2049 hw->buffer_not_ready = 0;
2050 if (vdec->parallel_dec == 1)
2051 return (unsigned long)(CORE_MASK_VDEC_1);
2052 else
2053 return (unsigned long)(CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
2054}
2055
2056static unsigned char get_data_check_sum
2057 (struct vdec_mpeg4_hw_s *hw, int size)
2058{
2059 int jj;
2060 int sum = 0;
2061 u8 *data = NULL;
2062
2063 if (!hw->chunk->block->is_mapped)
2064 data = codec_mm_vmap(hw->chunk->block->start +
2065 hw->chunk->offset, size);
2066 else
2067 data = ((u8 *)hw->chunk->block->start_virt) +
2068 hw->chunk->offset;
2069
2070 for (jj = 0; jj < size; jj++)
2071 sum += data[jj];
2072
2073 if (!hw->chunk->block->is_mapped)
2074 codec_mm_unmap_phyaddr(data);
2075 return sum;
2076}
2077
2078static void run(struct vdec_s *vdec, unsigned long mask,
2079 void (*callback)(struct vdec_s *, void *), void *arg)
2080{
2081 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2082 int size = 0, ret = 0;
2083
2084 hw->run_count++;
2085 hw->vdec_cb_arg = arg;
2086 hw->vdec_cb = callback;
2087 vdec_reset_core(vdec);
2088
2089 if ((vdec_frame_based(vdec)) &&
2090 (hw->dec_result == DEC_RESULT_UNFINISH)) {
2091 vmpeg4_prepare_input(hw);
2092 size = hw->chunk_size;
2093 } else {
2094 size = vdec_prepare_input(vdec, &hw->chunk);
2095 if (size < 4) { /*less than start code size 00 00 01 xx*/
2096 hw->input_empty++;
2097 hw->dec_result = DEC_RESULT_AGAIN;
2098 vdec_schedule_work(&hw->work);
2099 return;
2100 }
2101 if ((vdec_frame_based(vdec)) &&
2102 (hw->chunk != NULL)) {
2103 hw->chunk_offset = hw->chunk->offset;
2104 hw->chunk_size = hw->chunk->size;
2105 hw->chunk_frame_count = 0;
2106 }
2107 }
2108 if (vdec_frame_based(vdec) &&
2109 (debug_enable & 0xc00)) {
2110 u8 *data = NULL;
2111
2112 if (!hw->chunk->block->is_mapped)
2113 data = codec_mm_vmap(hw->chunk->block->start +
2114 hw->chunk->offset, size);
2115 else
2116 data = ((u8 *)hw->chunk->block->start_virt) +
2117 hw->chunk->offset;
2118
2119 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS,
2120 "%s: size 0x%x sum 0x%x %02x %02x %02x %02x %02x %02x .. %02x %02x %02x %02x\n",
2121 __func__, size, get_data_check_sum(hw, size),
2122 data[0], data[1], data[2], data[3],
2123 data[4], data[5], data[size - 4],
2124 data[size - 3], data[size - 2],
2125 data[size - 1]);
2126
2127 if (debug_enable & PRINT_FRAMEBASE_DATA) {
2128 int jj;
2129
2130 for (jj = 0; jj < size; jj++) {
2131 if ((jj & 0xf) == 0)
2132 mmpeg4_debug_print(DECODE_ID(hw),
2133 PRINT_FRAMEBASE_DATA,
2134 "%06x:", jj);
2135 mmpeg4_debug_print(DECODE_ID(hw),
2136 PRINT_FRAMEBASE_DATA,
2137 "%02x ", data[jj]);
2138 if (((jj + 1) & 0xf) == 0)
2139 mmpeg4_debug_print(DECODE_ID(hw),
2140 PRINT_FRAMEBASE_DATA,
2141 "\n");
2142 }
2143 }
2144
2145 if (!hw->chunk->block->is_mapped)
2146 codec_mm_unmap_phyaddr(data);
2147 }
2148
2149 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
2150 "%s, size=%d, %x %x %x %x %x\n",
2151 __func__, size,
2152 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
2153 READ_VREG(VLD_MEM_VIFIFO_WP),
2154 READ_VREG(VLD_MEM_VIFIFO_RP),
2155 READ_PARSER_REG(PARSER_VIDEO_RP),
2156 READ_PARSER_REG(PARSER_VIDEO_WP));
2157
2158 hw->dec_result = DEC_RESULT_NONE;
2159 if (vdec->mc_loaded) {
2160 /*firmware have load before,
2161 and not changes to another.
2162 ignore reload.
2163 */
2164 } else {
2165 ret = amvdec_vdec_loadmc_buf_ex(VFORMAT_MPEG4,hw->fw->name, vdec,
2166 hw->fw->data, hw->fw->len);
2167 if (ret < 0) {
2168 pr_err("[%d] %s: the %s fw loading failed, err: %x\n", vdec->id,
2169 hw->fw->name, tee_enabled() ? "TEE" : "local", ret);
2170 hw->dec_result = DEC_RESULT_FORCE_EXIT;
2171 vdec_schedule_work(&hw->work);
2172 return;
2173 }
2174 vdec->mc_loaded = 1;
2175 vdec->mc_type = VFORMAT_MPEG4;
2176 }
2177 if (vmpeg4_hw_ctx_restore(hw) < 0) {
2178 hw->dec_result = DEC_RESULT_ERROR;
2179 mmpeg4_debug_print(DECODE_ID(hw), 0,
2180 "amvdec_mpeg4: error HW context restore\n");
2181 vdec_schedule_work(&hw->work);
2182 return;
2183 }
2184 if (vdec_frame_based(vdec)) {
2185 size = hw->chunk_size +
2186 (hw->chunk_offset & (VDEC_FIFO_ALIGN - 1));
2187 WRITE_VREG(VIFF_BIT_CNT, size * 8);
2188 }
2189 hw->input_empty = 0;
2190 hw->last_vld_level = 0;
2191 start_process_time(hw);
2192 vdec_enable_input(vdec);
2193 /* wmb before ISR is handled */
2194 wmb();
2195
2196 amvdec_start();
2197 hw->stat |= STAT_VDEC_RUN;
2198 hw->init_flag = 1;
2199 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
2200}
2201
2202static int vmpeg4_stop(struct vdec_mpeg4_hw_s *hw)
2203{
2204 cancel_work_sync(&hw->work);
2205
2206 if (hw->mm_blk_handle) {
2207 decoder_bmmu_box_free(hw->mm_blk_handle);
2208 hw->mm_blk_handle = NULL;
2209 }
2210
2211 if (hw->stat & STAT_TIMER_ARM) {
2212 del_timer_sync(&hw->check_timer);
2213 hw->stat &= ~STAT_TIMER_ARM;
2214 }
2215
2216 if (hw->fw) {
2217 vfree(hw->fw);
2218 hw->fw = NULL;
2219 }
2220 return 0;
2221}
2222static void reset(struct vdec_s *vdec)
2223{
2224 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
2225
2226 pr_info("amvdec_mmpeg4: reset.\n");
2227
2228 vmpeg4_local_init(hw);
2229
2230 hw->ctx_valid = 0;
2231}
2232
2233static int ammvdec_mpeg4_probe(struct platform_device *pdev)
2234{
2235 struct vdec_s *pdata = *(struct vdec_s **)pdev->dev.platform_data;
2236 struct vdec_mpeg4_hw_s *hw = NULL;
2237
2238 if (pdata == NULL) {
2239 pr_err("%s memory resource undefined.\n", __func__);
2240 return -EFAULT;
2241 }
2242
2243 hw = vmalloc(sizeof(struct vdec_mpeg4_hw_s));
2244 if (hw == NULL) {
2245 pr_err("\namvdec_mpeg4 decoder driver alloc failed\n");
2246 return -ENOMEM;
2247 }
2248 memset(hw, 0, sizeof(struct vdec_mpeg4_hw_s));
2249
2250 /* the ctx from v4l2 driver. */
2251 hw->v4l2_ctx = pdata->private;
2252
2253 pdata->private = hw;
2254 pdata->dec_status = dec_status;
2255 /* pdata->set_trickmode = set_trickmode; */
2256 pdata->run_ready = run_ready;
2257 pdata->run = run;
2258 pdata->reset = reset;
2259 pdata->irq_handler = vmpeg4_isr;
2260 pdata->threaded_irq_handler = vmpeg4_isr_thread_fn;
2261 pdata->dump_state = vmpeg4_dump_state;
2262
2263 if (pdata->use_vfm_path)
2264 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2265 VFM_DEC_PROVIDER_NAME);
2266 else
2267 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
2268 PROVIDER_NAME ".%02x", pdev->id & 0xff);
2269
2270 if (pdata->parallel_dec == 1) {
2271 int i;
2272 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
2273 hw->canvas_spec[i] = 0xffffff;
2274 }
2275
2276 vf_provider_init(&pdata->vframe_provider,
2277 pdata->vf_provider_name, &vf_provider_ops, pdata);
2278
2279 platform_set_drvdata(pdev, pdata);
2280 hw->platform_dev = pdev;
2281 hw->blkmode = pdata->canvas_mode;
2282
2283 if (pdata->sys_info) {
2284 hw->vmpeg4_amstream_dec_info = *pdata->sys_info;
2285 if ((hw->vmpeg4_amstream_dec_info.height != 0) &&
2286 (hw->vmpeg4_amstream_dec_info.width >
2287 (MAX_MPEG4_SUPPORT_SIZE/hw->vmpeg4_amstream_dec_info.height))) {
2288 pr_info("ammvdec_mpeg4: oversize, unsupport: %d*%d\n",
2289 hw->vmpeg4_amstream_dec_info.width,
2290 hw->vmpeg4_amstream_dec_info.height);
2291 pdata->dec_status = NULL;
2292 vfree((void *)hw);
2293 hw = NULL;
2294 return -EFAULT;
2295 }
2296 mmpeg4_debug_print(DECODE_ID(hw), 0,
2297 "sysinfo: %d x %d, rate: %d\n",
2298 hw->vmpeg4_amstream_dec_info.width,
2299 hw->vmpeg4_amstream_dec_info.height,
2300 hw->vmpeg4_amstream_dec_info.rate);
2301 hw->is_used_v4l = (((unsigned long)
2302 hw->vmpeg4_amstream_dec_info.param & 0x80) >> 7);
2303 }
2304
2305 if (vmmpeg4_init(hw) < 0) {
2306 pr_err("%s init failed.\n", __func__);
2307
2308 if (hw) {
2309 vfree((void *)hw);
2310 hw = NULL;
2311 }
2312 pdata->dec_status = NULL;
2313 return -ENODEV;
2314 }
2315
2316 if (pdata->parallel_dec == 1)
2317 vdec_core_request(pdata, CORE_MASK_VDEC_1);
2318 else {
2319 vdec_core_request(pdata, CORE_MASK_VDEC_1 | CORE_MASK_HEVC
2320 | CORE_MASK_COMBINE);
2321 }
2322
2323 mmpeg4_debug_print(DECODE_ID(hw), 0,
2324 "%s end.\n", __func__);
2325 return 0;
2326}
2327
2328static int ammvdec_mpeg4_remove(struct platform_device *pdev)
2329{
2330 struct vdec_mpeg4_hw_s *hw =
2331 (struct vdec_mpeg4_hw_s *)
2332 (((struct vdec_s *)(platform_get_drvdata(pdev)))->private);
2333 struct vdec_s *vdec = hw_to_vdec(hw);
2334 int i;
2335
2336 if (vdec->next_status == VDEC_STATUS_DISCONNECTED
2337 && (vdec->status == VDEC_STATUS_ACTIVE)) {
2338 mmpeg4_debug_print(DECODE_ID(hw), 0,
2339 "%s force exit %d\n", __func__, __LINE__);
2340 hw->dec_result = DEC_RESULT_FORCE_EXIT;
2341 vdec_schedule_work(&hw->work);
2342 wait_event_interruptible_timeout(hw->wait_q,
2343 (vdec->status == VDEC_STATUS_CONNECTED),
2344 msecs_to_jiffies(1000)); /* wait for work done */
2345 }
2346
2347 vmpeg4_stop(hw);
2348
2349 if (vdec->parallel_dec == 1)
2350 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1);
2351 else
2352 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
2353 vdec_set_status(hw_to_vdec(hw), VDEC_STATUS_DISCONNECTED);
2354
2355 if (vdec->parallel_dec == 1) {
2356 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
2357 vdec->free_canvas_ex(canvas_y(hw->canvas_spec[i]), vdec->id);
2358 vdec->free_canvas_ex(canvas_u(hw->canvas_spec[i]), vdec->id);
2359 }
2360 }
2361
2362 mmpeg4_debug_print(DECODE_ID(hw), 0, "%s\n", __func__);
2363 vfree((void *)hw);
2364 hw = NULL;
2365
2366 return 0;
2367}
2368
2369/****************************************/
2370#ifdef CONFIG_PM
2371static int mmpeg4_suspend(struct device *dev)
2372{
2373 amvdec_suspend(to_platform_device(dev), dev->power.power_state);
2374 return 0;
2375}
2376
2377static int mmpeg4_resume(struct device *dev)
2378{
2379 amvdec_resume(to_platform_device(dev));
2380 return 0;
2381}
2382
2383static const struct dev_pm_ops mmpeg4_pm_ops = {
2384 SET_SYSTEM_SLEEP_PM_OPS(mmpeg4_suspend, mmpeg4_resume)
2385};
2386#endif
2387
2388static struct platform_driver ammvdec_mpeg4_driver = {
2389 .probe = ammvdec_mpeg4_probe,
2390 .remove = ammvdec_mpeg4_remove,
2391 .driver = {
2392 .name = DRIVER_NAME,
2393#ifdef CONFIG_PM
2394 .pm = &mmpeg4_pm_ops,
2395#endif
2396 }
2397};
2398
2399static struct codec_profile_t amvdec_mpeg4_profile = {
2400 .name = "mmpeg4",
2401 .profile = ""
2402};
2403
2404static int __init ammvdec_mpeg4_driver_init_module(void)
2405{
2406 pr_info("%s \n", __func__);
2407
2408 if (platform_driver_register(&ammvdec_mpeg4_driver)) {
2409 pr_err("failed to register ammvdec_mpeg4 driver\n");
2410 return -ENODEV;
2411 }
2412 vcodec_profile_register(&amvdec_mpeg4_profile);
2413 return 0;
2414}
2415
2416static void __exit ammvdec_mpeg4_driver_remove_module(void)
2417{
2418 pr_info("ammvdec_mpeg4 module remove.\n");
2419
2420 platform_driver_unregister(&ammvdec_mpeg4_driver);
2421}
2422
2423/****************************************/
2424module_param(debug_enable, uint, 0664);
2425MODULE_PARM_DESC(debug_enable,
2426 "\n ammvdec_mpeg4 debug enable\n");
2427
2428module_param(frmbase_cont_bitlevel, uint, 0664);
2429MODULE_PARM_DESC(frmbase_cont_bitlevel, "\nfrmbase_cont_bitlevel\n");
2430
2431module_param(radr, uint, 0664);
2432MODULE_PARM_DESC(radr, "\nradr\n");
2433
2434module_param(rval, uint, 0664);
2435MODULE_PARM_DESC(rval, "\nrval\n");
2436
2437module_param(decode_timeout_val, uint, 0664);
2438MODULE_PARM_DESC(decode_timeout_val, "\n ammvdec_mpeg4 decode_timeout_val\n");
2439
2440module_param_array(max_process_time, uint, &max_decode_instance_num, 0664);
2441
2442module_param(pre_decode_buf_level, int, 0664);
2443MODULE_PARM_DESC(pre_decode_buf_level,
2444 "\n ammvdec_ mpeg4 pre_decode_buf_level\n");
2445
2446module_param(udebug_flag, uint, 0664);
2447MODULE_PARM_DESC(udebug_flag, "\n ammvdec_mpeg4 udebug_flag\n");
2448
2449module_param(without_display_mode, uint, 0664);
2450MODULE_PARM_DESC(without_display_mode, "\n ammvdec_mpeg4 without_display_mode\n");
2451
2452module_init(ammvdec_mpeg4_driver_init_module);
2453module_exit(ammvdec_mpeg4_driver_remove_module);
2454
2455MODULE_DESCRIPTION("AMLOGIC MPEG4 Video Decoder Driver");
2456MODULE_LICENSE("GPL");
2457MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>");
2458
2459
generated by cgit at 2024-05-17 10:48:40 (GMT)