blob: e7bfd06250358d48e69dd3898b19be313e2ea795
| 1 | /* |
| 2 | * hdmirx_drv.h for HDMI device driver, and declare IO function, |
| 3 | * structure, enum, used in TVIN AFE sub-module processing |
| 4 | * |
| 5 | * Copyright (C) 2013 AMLOGIC, INC. All Rights Reserved. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the smems of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | */ |
| 11 | |
| 12 | #ifndef _HDMICEC_H |
| 13 | #define _HDMICEC_H |
| 14 | |
| 15 | #define CEC_MSG_QUEUE_SIZE 20 |
| 16 | |
| 17 | typedef enum _cec_logic_addr { |
| 18 | E_LA_TV = 0, |
| 19 | E_LA_RECORDER1 = 1, |
| 20 | E_LA_RECORDER2 = 2, |
| 21 | E_LA_TUNER1 = 3, |
| 22 | E_LA_PLAYBACK1 = 4, |
| 23 | E_LA_AUDIO_SYS = 5, |
| 24 | E_LA_TUNER2 = 6, |
| 25 | E_LA_TUNER3 = 7, |
| 26 | E_LA_PLAYBACK2 = 8, |
| 27 | E_LA_RECORER3 = 9, |
| 28 | E_LA_TUNER4 = 10, |
| 29 | E_LA_PLYBACK3 = 11, |
| 30 | RESERVED_1 = 12, |
| 31 | RESERVED_2 = 13, |
| 32 | E_LA_FREE_USE = 14, |
| 33 | E_LA_UNREGISTERED = 15, |
| 34 | E_LA_BROADCAST = 15, |
| 35 | E_LA_MAX = 15, |
| 36 | } _cec_logic_addr; |
| 37 | |
| 38 | typedef enum _cec_dev_type { |
| 39 | E_DEVICE_TYPE_TV = 0, |
| 40 | E_DEVICE_TYPE_RECORDING_DEVICE = 1, |
| 41 | E_DEVICE_TYPE_RESERVED = 2, |
| 42 | E_DEVICE_TYPE_TUNER = 3, |
| 43 | E_DEVICE_TYPE_PLAYBACK_DEVICE = 4, |
| 44 | E_DEVICE_TYPE_AUDIO_SYSTEM = 5, |
| 45 | E_DEVICE_TYPE_PURE_CEC_SWITCH = 6, |
| 46 | E_DEVICE_TYPE_VIDEO_PROCESSOR = 7 |
| 47 | } _cec_dev_type; |
| 48 | |
| 49 | typedef enum _cec_cmd { |
| 50 | //----- One Touch Play ---------------------------- |
| 51 | E_MSG_ACTIVE_SOURCE = 0x82, |
| 52 | E_MSG_IMAGE_VIEW_ON = 0x04, |
| 53 | E_MSG_TEXT_VIEW_ON = 0x0D, |
| 54 | //----- Routing Control --------------------------- |
| 55 | //E_MSG_RC_ACTIVE_SOURCE = 0x82, |
| 56 | E_MSG_INACTIVE_SOURCE = 0x9D, |
| 57 | E_MSG_REQUEST_ACTIVE_SOURCE = 0x85, |
| 58 | E_MSG_ROUTING_CHANGE = 0x80, |
| 59 | E_MSG_ROUTING_INFO = 0x81, |
| 60 | E_MSG_SET_STREM_PATH = 0x86, |
| 61 | //----- Standby Command --------------------------- |
| 62 | E_MSG_STANDBY = 0x36, |
| 63 | //----- One Touch Record--------------------------- |
| 64 | E_MSG_RECORD_ON = 0x09, |
| 65 | E_MSG_RECORD_OFF = 0x0B, |
| 66 | E_MSG_RECORD_STATUS = 0x0A, |
| 67 | E_MSG_RECORD_TV_SCREEN = 0x0F, |
| 68 | //----- Timer programmer -------------------------- CEC1.3a |
| 69 | E_MSG_CLEAR_ANALOG_TIMER = 0x33, |
| 70 | E_MSG_CLEAR_DIGITAL_TIMER = 0x99, |
| 71 | E_MSG_CLEAR_EXT_TIMER = 0xA1, |
| 72 | E_MSG_SET_ANALOG_TIMER = 0x34, |
| 73 | E_MSG_SET_DIGITAL_TIMER = 0x97, |
| 74 | E_MSG_SET_EXT_TIMER = 0xA2, |
| 75 | E_MSG_SET_TIMER_PROGRAM_TITLE = 0x67, |
| 76 | E_MSG_TIMER_CLEARD_STATUS = 0x43, |
| 77 | E_MSG_TIMER_STATUS = 0x35, |
| 78 | //----- System Information ------------------------ |
| 79 | E_MSG_CEC_VERSION = 0x9E, //1.3a |
| 80 | E_MSG_GET_CEC_VERSION = 0x9F, //1.3a |
| 81 | E_MSG_GIVE_PHYSICAL_ADDRESS = 0x83, |
| 82 | E_MSG_REPORT_PHYSICAL_ADDRESS = 0x84, |
| 83 | E_MSG_GET_MENU_LANGUAGE = 0x91, |
| 84 | E_MSG_SET_MENU_LANGUAGE = 0x32, |
| 85 | //E_MSG_POLLING_MESSAGE = ?, |
| 86 | //E_MSG_REC_TYPE_PRESET = 0x00, //parameter ? |
| 87 | //E_MSG_REC_TYPE_OWNSRC = 0x01, //parameter ? |
| 88 | //----- Deck Control Feature----------------------- |
| 89 | E_MSG_DECK_CTRL = 0x42, |
| 90 | E_MSG_DECK_STATUS = 0x1B, |
| 91 | E_MSG_GIVE_DECK_STATUS = 0x1A, |
| 92 | E_MSG_PLAY = 0x41, |
| 93 | //----- Tuner Control ------------------------------ |
| 94 | E_MSG_GIVE_TUNER_STATUS = 0x08, |
| 95 | E_MSG_SEL_ANALOG_SERVICE = 0x92, |
| 96 | E_MSG_SEL_DIGITAL_SERVICE = 0x93, |
| 97 | E_MSG_TUNER_DEVICE_STATUS = 0x07, |
| 98 | E_MSG_TUNER_STEP_DEC = 0x06, |
| 99 | E_MSG_TUNER_STEP_INC = 0x05, |
| 100 | //---------Vendor Specific ------------------------- |
| 101 | //E_MSG_CEC_VERSION = 0x9E, //1.3a |
| 102 | //E_MSG_GET_CEC_VERSION = 0x9F, //1.3a |
| 103 | E_MSG_DEVICE_VENDOR_ID = 0x87, |
| 104 | E_MSG_GIVE_DEVICE_VENDOR_ID = 0x8C, |
| 105 | E_MSG_VENDOR_COMMAND = 0x89, |
| 106 | E_MSG_VENDOR_COMMAND_WITH_ID = 0xA0, //1.3a |
| 107 | E_MSG_VENDOR_RC_BUT_DOWN = 0x8A, |
| 108 | E_MSG_VENDOR_RC_BUT_UP = 0x8B, |
| 109 | //----- OSD Display -------------------------------- |
| 110 | E_MSG_SET_OSD_STRING = 0x64, |
| 111 | //----- Device OSD Name Transfer ------------------------- |
| 112 | E_MSG_OSDNT_GIVE_OSD_NAME = 0x46, |
| 113 | E_MSG_OSDNT_SET_OSD_NAME = 0x47, |
| 114 | //----- Device Menu Control ------------------------ |
| 115 | E_MSG_DMC_MENU_REQUEST = 0x8D, |
| 116 | E_MSG_DMC_MENU_STATUS = 0x8E, |
| 117 | E_MSG_UI_PRESS = 0x44, |
| 118 | E_MSG_UI_RELEASE = 0x45, |
| 119 | //----- Remote Control Passthrough ---------------- |
| 120 | //E_MSG_UI_PRESS = 0x44, |
| 121 | //E_MSG_UI_RELEASE = 0x45, |
| 122 | //----- Power Status ------------------------------ |
| 123 | E_MSG_GIVE_DEVICE_POWER_STATUS = 0x8F, |
| 124 | E_MSG_REPORT_POWER_STATUS = 0x90, |
| 125 | //----- General Protocal Message ------------------ |
| 126 | E_MSG_ABORT_MESSAGE = 0xFF, //Abort msg |
| 127 | E_MSG_FEATURE_ABORT = 0x00, //Feature Abort |
| 128 | //----- System Audio Control ---------------------- |
| 129 | E_MSG_ARC_GIVE_AUDIO_STATUS = 0x71, |
| 130 | E_MSG_ARC_GIVE_SYSTEM_AUDIO_MODE_STATUS = 0x7D, |
| 131 | E_MSG_ARC_REPORT_AUDIO_STATUS = 0x7A, |
| 132 | E_MSG_ARC_SET_SYSTEM_AUDIO_MODE = 0x72, |
| 133 | E_MSG_ARC_SYSTEM_AUDIO_MODE_REQUEST = 0x70, |
| 134 | E_MSG_ARC_SYSTEM_AUDIO_MODE_STATUS = 0x7E, |
| 135 | E_MSG_ARC_SET_AUDIO_RATE = 0x9A, |
| 136 | //----- Audio Return Channel Control ------------- |
| 137 | E_MSG_ARC_INITIATE_ARC = 0xC0, |
| 138 | E_MSG_ARC_REPORT_ARC_INITIATED = 0xC1, |
| 139 | E_MSG_ARC_REPORT_ARC_TERMINATED = 0xC2, |
| 140 | E_MSG_ARC_REQUEST_ARC_INITATION = 0xC3, |
| 141 | E_MSG_ARC_REQUEST_ARC_TERMINATION = 0xC4, |
| 142 | E_MSG_ARC_TERMINATED_ARC = 0xC5, |
| 143 | |
| 144 | E_MSG_CDC_MESSAGE = 0xF8, |
| 145 | //amlogic cmd |
| 146 | //TCL |
| 147 | CMD_TCL_WIFI = 0x01, |
| 148 | CMD_TCL_ETHERNET = 0x02, |
| 149 | CMD_TCL_3D = 0x03, |
| 150 | CMD_TCL_PANEL_REVERSE = 0x04, |
| 151 | CMD_RESERVE1 = 0x05, |
| 152 | CMD_RESERVE2 = 0x06, |
| 153 | CMD_RESERVE3 = 0x07, |
| 154 | //VPU |
| 155 | CMD_VPU_INIT = 0x08, |
| 156 | CMD_VPU_ENABLE = 0x09, |
| 157 | CMD_VPU_BYPASS = 0x0a, |
| 158 | CMD_VPU_OUTPUT_MUX = 0x0b, |
| 159 | CMD_VPU_TIMING = 0x0c, |
| 160 | CMD_VPU_SOURCE = 0x0d, |
| 161 | CMD_RESERVE4 = 0x0e, |
| 162 | CMD_RESERVE5 = 0x0f, |
| 163 | //TCL || AML |
| 164 | CMD_TCL_BRIDGE_SW_VER = 0x10, |
| 165 | //CMD_G9_MAINCODE_VER = 0x10, |
| 166 | CMD_TCL_DEVICE_ID = 0x11, |
| 167 | //CMD_G9_BOOTCODE_VER = 0x11, |
| 168 | CMD_TCL_CLIENT_TYPE = 0x12, |
| 169 | //CMD_INFO_G9_TO_FBC = 0x12, |
| 170 | CMD_TCL_DEVICE_NUM = 0x13, |
| 171 | //CMD_INFO_FBC_TO_G9 = 0x13, |
| 172 | CMD_TCL_ACTIVE_KEY = 0x14, |
| 173 | //CMD_TIME_SYNC = 0x14, |
| 174 | CMD_TCL_ACTIVE_STATUS = 0x15, |
| 175 | //CMD_KEY_TRANSLATION = 0x15, |
| 176 | CMD_RESERVE6 = 0x16, |
| 177 | CMD_RESERVE7 = 0x17, |
| 178 | //DEBUG READ |
| 179 | CMD_DBG_RD_REGISTER_ACCESS = 0x18, |
| 180 | CMD_DBG_RD_MEMORY_ACCESS = 0x19, |
| 181 | CMD_DBG_RD_SPI_ACCESS = 0x1a, |
| 182 | CMD_DBG_RD_VPU_MEMORY_ACCESS = 0x1b, |
| 183 | CMD_DBG_RD_MEMORY_TRANSFER = 0x1c, |
| 184 | CMD_DBG_INPUT_KEY_DOWN = 0x1d, |
| 185 | CMD_DBG_INPUT_KEY_UP = 0x1e, |
| 186 | CMD_DBG_INPUT_REBOOT = 0x1f, |
| 187 | //DEBUG WRITE |
| 188 | CMD_DBG_WR_REGISTER_ACCESS = 0x98, |
| 189 | CMD_DBG_WR_MEMORY_ACCESS = 0x99, |
| 190 | CMD_DBG_WR_SPI_ACCESS = 0x9a, |
| 191 | CMD_DBG_WR_VPU_MEMORY_ACCESS = 0x9b, |
| 192 | CMD_DBG_WR_MEMORY_TRANSFER = 0x9c, |
| 193 | //USER |
| 194 | CMD_NATURE_LIGHT_ONOFF = 0x20, |
| 195 | CMD_USR_BACKLIGHT_ONOFF = 0x21, |
| 196 | CMD_USR_BRIGHTNESS = 0x22, |
| 197 | CMD_USR_CONTRAST = 0x23, |
| 198 | CMD_USR_BACKLIGHT = 0x24, |
| 199 | CMD_RESERVE25 = 0x25, |
| 200 | CMD_USR_SATURATION = 0x26, |
| 201 | CMD_USR_DYNAMIC_CONTRAST = 0x27, |
| 202 | CMD_USR_PICTURE_MODE = 0x28, |
| 203 | CMD_TEST_PATTERN_ONOFF = 0x29, |
| 204 | CMD_TEST_PATTERN_SELECT = 0x2a, |
| 205 | CMD_RESERVE8 = 0x2b, |
| 206 | CMD_RESERVE9 = 0x2c, |
| 207 | CMD_RESERVE10 = 0x2d, |
| 208 | CMD_RESERVE11 = 0x2e, |
| 209 | CMD_USR_GAMMA = 0x2f, |
| 210 | //FACTORY |
| 211 | CMD_DEF_SOUND_MODE = 0x30, |
| 212 | CMD_DEF_COLOR_TEMPERATURE = 0x31, |
| 213 | CMD_DEF_BRIGHTNESS = 0x32, |
| 214 | CMD_DEF_CONTRAST = 0x33, |
| 215 | CMD_DEF_COLOR = 0x34, |
| 216 | CMD_RESERVE12 = 0x35, |
| 217 | CMD_DEF_BACKLIGHT = 0x36, |
| 218 | CMD_RESERVE13 = 0x37, |
| 219 | CMD_AUTO_LUMA_ONOFF = 0x38, |
| 220 | CMD_HISTOGRAM = 0x39, |
| 221 | CMD_BLEND = 0x3a, |
| 222 | CMD_DEMULA = 0x3b, |
| 223 | CMD_COLORSPACE_CONVERSION = 0x3c, |
| 224 | CMD_CM2 = 0x3d, |
| 225 | CMD_RESERVE14 = 0x3e, |
| 226 | CMD_RESERVE15 = 0x3f, |
| 227 | // GAIN & OFFSET & WHITEBLANCE |
| 228 | CMD_DEF_RED_GAIN = 0x40, |
| 229 | CMD_DEF_GREEN_GAIN = 0x41, |
| 230 | CMD_DEF_BLUE_GAIN = 0x42, |
| 231 | CMD_DEF_RED_OFFSET = 0x43, |
| 232 | CMD_DEF_GREEN_OFFSET = 0x44, |
| 233 | CMD_DEF_BLUE_OFFSET = 0x45, |
| 234 | CMD_DEF_PRE_RED_OFFSET = 0x46, |
| 235 | CMD_DEF_PRE_GREEN_OFFSET = 0x47, |
| 236 | CMD_DEF_PRE_BLUE_OFFSET = 0x48, |
| 237 | CMD_RESERVE16 = 0x49, |
| 238 | CMD_WHITEBLANCE = 0x4a, |
| 239 | |
| 240 | CMD_SET_SW_VERSION = 0x57, |
| 241 | CMD_3D = 0xd0, |
| 242 | |
| 243 | CMD_MAX = 0xff |
| 244 | } _cec_cmd; |
| 245 | |
| 246 | typedef struct _cec_msg { |
| 247 | unsigned char addr; //refer as enum _cec_logic_addr |
| 248 | unsigned char cmd; //refer as enum _cec_cmd |
| 249 | unsigned char msg_data[14]; |
| 250 | unsigned char msg_len; |
| 251 | } _cec_msg; |
| 252 | |
| 253 | typedef union tagCECMsgStream { |
| 254 | unsigned char buf[17]; |
| 255 | struct _cec_msg msg; |
| 256 | } CECMsgStream; |
| 257 | |
| 258 | typedef struct _cec_dev_map { |
| 259 | enum _cec_logic_addr logic_addr; |
| 260 | unsigned int phy_addr; |
| 261 | int cec_dev_type; |
| 262 | char cec_dev_name[14]; |
| 263 | } _cec_dev_map; |
| 264 | |
| 265 | typedef struct _cec_msg_queue { |
| 266 | struct _cec_msg cec_msg[CEC_MSG_QUEUE_SIZE]; |
| 267 | int wr_index; |
| 268 | int rd_index; |
| 269 | } _cec_msg_queue; |
| 270 | |
| 271 | |
| 272 | |
| 273 | typedef enum _cec_status { |
| 274 | E_CEC_FEATURE_ABORT = 0x00, |
| 275 | E_CEC_RX_SUCCESS = 0x01, |
| 276 | E_CEC_TX_SUCCESS = 0x02, |
| 277 | E_CEC_RF = 0x04, |
| 278 | E_CEC_LOST_ABT = 0x08, |
| 279 | E_CEC_BIT_SHORT = 0x10, |
| 280 | E_CEC_BIT_LONG = 0x20, |
| 281 | E_CEC_NACK = 0x40, |
| 282 | E_CEC_SYSTEM_BUSY = 0x80, |
| 283 | } _cec_status; |
| 284 | |
| 285 | |
| 286 | typedef enum _cec_map_status { |
| 287 | E_CEC_MAP_UPDATE_START = 0, |
| 288 | E_CEC_MAP_POLLLING = 1, |
| 289 | E_CEC_MAP_GET_VENDOR_ID = 2, |
| 290 | E_CEC_MAP_GET_PHYSICAL_ADDR = 3, |
| 291 | E_CEC_MAP_GET_OSD_NAME = 4, |
| 292 | E_CEC_MAP_GET_CEC_VERSION = 5, |
| 293 | E_CEC_MAP_UPDATE_COMPLETED = 6, |
| 294 | } _cec_map_status; |
| 295 | |
| 296 | #define HDMI_IOC_MAGIC 'H' |
| 297 | #define HDMI_IOC_CEC_ON _IO(HDMI_IOC_MAGIC, 0x01) |
| 298 | #define HDMI_IOC_CEC_OFF _IO(HDMI_IOC_MAGIC, 0x02) |
| 299 | #define HDMI_IOC_CEC_ARC_ON _IO(HDMI_IOC_MAGIC, 0x03) |
| 300 | #define HDMI_IOC_CEC_ARC_OFF _IO(HDMI_IOC_MAGIC, 0x04) |
| 301 | #define HDMI_IOC_CEC_CLEAR_BUFFER _IO(HDMI_IOC_MAGIC, 0x05) |
| 302 | #define HDMI_IOC_CEC_GET_MSG_CNT _IOR(HDMI_IOC_MAGIC, 0x06, int) |
| 303 | #define HDMI_IOC_CEC_GET_MSG _IOR(HDMI_IOC_MAGIC, 0x07, struct _cec_msg) |
| 304 | #define HDMI_IOC_CEC_SENT_MSG _IOW(HDMI_IOC_MAGIC, 0x08, struct _cec_msg) |
| 305 | |
| 306 | //#include <linux/tvin/tvin.h> |
| 307 | //#include "../tvin_global.h" |
| 308 | //#include "../tvin_format_table.h" |
| 309 | |
| 310 | extern void dump_cec_message(int all); |
| 311 | extern void cec_dump_dev_map(void); |
| 312 | extern void clean_cec_message(void); |
| 313 | extern int cec_init(void); |
| 314 | extern void cec_state(bool cec_rx); |
| 315 | extern int cec_handler(bool get_msg, bool get_ack); |
| 316 | extern int hdmirx_cec_rx_monitor(void); |
| 317 | extern int hdmirx_cec_tx_monitor(void); |
| 318 | extern void cec_update_cec_map(void); |
| 319 | extern void cec_post_msg(_cec_logic_addr addr, _cec_cmd cmd, int *data, int length); |
| 320 | |
| 321 | //extern void cec_enable_eom_irq(void); |
| 322 | //tcl |
| 323 | extern void hdmirx_cec_fun_onoff(bool enable); |
| 324 | extern void hdmirx_cec_arc_onoff(bool enable); |
| 325 | extern void hdmirx_cec_clear_rx_buffer(void); |
| 326 | extern void cec_post_msg_to_buf(struct _cec_msg *msg); |
| 327 | extern int hdmirx_get_cec_msg_cnt(void); |
| 328 | extern void clean_cec_message(void); |
| 329 | struct _cec_msg *hdmirx_get_rx_msg(void); |
| 330 | |
| 331 | #endif |
| 332 |