blob: bea78ea408ce05f3fa2fcea74e83130ae48e0b1c
1 | #ifndef __TV_MISC_H__ |
2 | #define __TV_MISC_H__ |
3 | |
4 | #define CC_MIN_ADC_CHANNEL_VAL (0) |
5 | #define CC_MAX_ADC_CHANNEL_VAL (5) |
6 | |
7 | #define CC_I2C_BUS_ON (0) |
8 | #define CC_I2C_BUS_OFF (1) |
9 | |
10 | #define CPQDB_DB_SIZE_ID "tv.db.size.id" |
11 | |
12 | struct erase_info_user { |
13 | uint32_t start; |
14 | uint32_t length; |
15 | }; |
16 | |
17 | extern int *GetFileAttrIntValueStr(const char *fp); |
18 | extern int ReadADCSpecialChannelValue(int adc_channel_num); |
19 | extern int Tv_MiscRegs(const char *cmd); |
20 | |
21 | extern int TvMisc_SetUserCounterTimeOut(int timeout); |
22 | extern int TvMisc_SetUserCounter(int count); |
23 | extern int TvMisc_SetUserPetResetEnable(int enable); |
24 | extern int TvMisc_SetSystemPetResetEnable(int enable); |
25 | extern int TvMisc_SetSystemPetEnable(int enable); |
26 | extern int TvMisc_SetSystemPetCounter(int count); |
27 | extern void TvMisc_EnableWDT(bool kernelpet_disable, unsigned int userpet_enable, unsigned int kernelpet_timeout, unsigned int userpet_timeout, unsigned int userpet_reset); |
28 | extern void TvMisc_DisableWDT(unsigned int userpet_enable); |
29 | extern int I2C_WriteNbyte(int i2c_no, int dev_addr, int slave_addr, int len, unsigned char data_buf[]); |
30 | extern int I2C_ReadNbyte(int i2c_no, int dev_addr, int slave_addr, int len, unsigned char data_buf[]); |
31 | extern int GetTvDBDefineSize(); |
32 | extern int SetFileAttrValue(const char *fp, const char value[]); |
33 | extern int GetFileAttrIntValue(const char *fp); |
34 | |
35 | extern int Get_Fixed_NonStandard(void); |
36 | extern int Set_Fixed_NonStandard(int value); |
37 | |
38 | extern int get_hardware_name(char *hardware); |
39 | |
40 | extern int TvMisc_DeleteDirFiles(const char *strPath, int flag); |
41 | |
42 | extern int cfg_get_one_item(const char *key_str, const char *strDelimit, int item_index, char cfg_str[]); |
43 | extern int Tv_Utils_CheckFs(void); |
44 | extern int Tv_Utils_SetFileAttrStr(const char *file_path, char val_str_buf[]); |
45 | extern int Tv_Utils_GetFileAttrStr(const char *file_path, int buf_size, char val_str_buf[]); |
46 | extern int Tv_Utils_IsFileExist(const char *file_name); |
47 | extern void monitor_info_name_init ( unsigned char *edidbuf ); |
48 | extern void monitor_info_set_name ( unsigned char *edidbuf ); |
49 | extern void monitor_info_set_imagesize ( unsigned char *edidbuf ); |
50 | extern void monitor_info_edid_checksum ( unsigned char *edidbuf ); |
51 | extern int reboot_sys_by_fbc_edid_info(); |
52 | extern int reboot_sys_by_fbc_uart_panel_info(); |
53 | extern int GetPlatformHaveFBCFlag(); |
54 | extern int GetPlatformHaveDDFlag(); |
55 | |
56 | #define CC_PROJECT_INFO_ITEM_MAX_LEN (64) |
57 | |
58 | typedef struct project_info_s { |
59 | char version[CC_PROJECT_INFO_ITEM_MAX_LEN]; |
60 | char panel_type[CC_PROJECT_INFO_ITEM_MAX_LEN]; |
61 | char panel_outputmode[CC_PROJECT_INFO_ITEM_MAX_LEN]; |
62 | char panel_rev[CC_PROJECT_INFO_ITEM_MAX_LEN]; |
63 | char panel_name[CC_PROJECT_INFO_ITEM_MAX_LEN]; |
64 | char amp_curve_name[CC_PROJECT_INFO_ITEM_MAX_LEN]; |
65 | } project_info_t; |
66 | |
67 | extern unsigned int CalCRC32(unsigned int crc, const unsigned char *ptr, unsigned int buf_len); |
68 | extern int GetProjectInfo(project_info_t *proj_info_ptr); |
69 | |
70 | //extern void SSMRewriteEdidInfo ( unsigned char *edidbuf ); |
71 | //extern int HandleEdid ( int op_type, int op_direct, unsigned char edid_buf[], unsigned char def_buf[] ); |
72 | //extern int SSMSetHdmiEdid(); |
73 | #define AML_DBG_REGS_IOC_MAGIC 'R' |
74 | |
75 | typedef struct aml_debug_reg_s { |
76 | unsigned int addr; |
77 | unsigned int val; |
78 | unsigned char mode; |
79 | } aml_debug_reg_t; |
80 | |
81 | typedef struct aml_debug_bit_s { |
82 | unsigned int addr; |
83 | unsigned int val; |
84 | unsigned int start; |
85 | unsigned int len; |
86 | } aml_debug_bit_t; |
87 | |
88 | /*ioctl for reg*/ |
89 | #define AMLDBG_IOC_CBUS_REG_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x01, struct aml_debug_reg_s) |
90 | #define AMLDBG_IOC_CBUS_REG_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x02, struct aml_debug_reg_s) |
91 | #define AMLDBG_IOC_APB_REG_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x03, struct aml_debug_reg_s) |
92 | #define AMLDBG_IOC_APB_REG_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x04, struct aml_debug_reg_s) |
93 | #define AMLDBG_IOC_AXI_REG_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x05, struct aml_debug_reg_s) |
94 | #define AMLDBG_IOC_AXI_REG_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x06, struct aml_debug_reg_s) |
95 | #define AMLDBG_IOC_AHB_REG_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x07, struct aml_debug_reg_s) |
96 | #define AMLDBG_IOC_AHB_REG_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x08, struct aml_debug_reg_s) |
97 | #define AMLDBG_IOC_MPEG_REG_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x09, struct aml_debug_reg_s) |
98 | #define AMLDBG_IOC_MPEG_REG_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x0a, struct aml_debug_reg_s) |
99 | |
100 | /*ioctl for bit*/ |
101 | #define AMLDBG_IOC_CBUS_BIT_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x21, aml_debug_bit_t) |
102 | #define AMLDBG_IOC_CBUS_BIT_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x22, aml_debug_bit_t) |
103 | #define AMLDBG_IOC_APB_BIT_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x23, aml_debug_bit_t) |
104 | #define AMLDBG_IOC_APB_BIT_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x24, aml_debug_bit_t) |
105 | #define AMLDBG_IOC_AXI_BIT_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x25, aml_debug_bit_t) |
106 | #define AMLDBG_IOC_AXI_BIT_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x26, aml_debug_bit_t) |
107 | #define AMLDBG_IOC_AHB_BIT_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x27, aml_debug_bit_t) |
108 | #define AMLDBG_IOC_AHB_BIT_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x28, aml_debug_bit_t) |
109 | #define AMLDBG_IOC_MPEG_BIT_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x29, aml_debug_bit_t) |
110 | #define AMLDBG_IOC_MPEG_BIT_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x30, aml_debug_bit_t) |
111 | |
112 | /*ioctl for gamma*/ |
113 | #define AMLDBG_IOC_SGR_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0X15, int) |
114 | #define AMLDBG_IOC_SGG_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0X16, int) |
115 | #define AMLDBG_IOC_SGB_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0X17, int) |
116 | |
117 | #define AMLDBG_IOC_AAPB_REG_RD _IOR(AML_DBG_REGS_IOC_MAGIC, 0x18, struct aml_debug_reg_s) |
118 | #define AMLDBG_IOC_AAPB_REG_WR _IOW(AML_DBG_REGS_IOC_MAGIC, 0x19, struct aml_debug_reg_s) |
119 | #endif //__TV_MISC_H__ |
120 |